Fix for RA when Msg3 fails
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@@ -84,6 +84,8 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
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}
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}
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else if (dl_config->dl_config_list[i].pdu_type == FAPI_NR_DL_CONFIG_TYPE_RA_DLSCH){
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else if (dl_config->dl_config_list[i].pdu_type == FAPI_NR_DL_CONFIG_TYPE_RA_DLSCH){
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dlsch0 = PHY_vars_UE_g[module_id][cc_id]->dlsch_ra[0];
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dlsch0 = PHY_vars_UE_g[module_id][cc_id]->dlsch_ra[0];
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dlsch0->rnti_type = _RA_RNTI_;
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dlsch0->harq_processes[dlsch0->current_harq_pid]->status = ACTIVE;
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}
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}
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else if (dl_config->dl_config_list[i].pdu_type == FAPI_NR_DL_CONFIG_TYPE_SI_DLSCH){
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else if (dl_config->dl_config_list[i].pdu_type == FAPI_NR_DL_CONFIG_TYPE_SI_DLSCH){
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dlsch0 = PHY_vars_UE_g[module_id][cc_id]->dlsch_SI[0];
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dlsch0 = PHY_vars_UE_g[module_id][cc_id]->dlsch_SI[0];
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@@ -444,19 +444,19 @@ void nr_schedule_msg2(uint16_t rach_frame, uint16_t rach_slot,
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uint8_t start_next_period = (rach_slot-(rach_slot%tdd_period_slot)+tdd_period_slot)%nr_slots_per_frame[mu];
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uint8_t start_next_period = (rach_slot-(rach_slot%tdd_period_slot)+tdd_period_slot)%nr_slots_per_frame[mu];
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*msg2_slot = start_next_period + last_dl_slot_period; // initializing scheduling of slot to next mixed (or last dl) slot
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*msg2_slot = start_next_period + last_dl_slot_period; // initializing scheduling of slot to next mixed (or last dl) slot
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*msg2_frame = (*msg2_slot>(rach_slot))? rach_frame : (rach_frame +1);
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*msg2_frame = ((*msg2_slot>(rach_slot))? rach_frame : (rach_frame+1))%1024;
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// we can't schedule msg2 before sl_ahead since prach
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// we can't schedule msg2 before sl_ahead since prach
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int eff_slot = *msg2_slot+(*msg2_frame-rach_frame)*nr_slots_per_frame[mu];
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int eff_slot = *msg2_slot+(*msg2_frame-rach_frame)*nr_slots_per_frame[mu];
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if ((eff_slot-rach_slot)<=sl_ahead) {
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if ((eff_slot-rach_slot)<=sl_ahead) {
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*msg2_slot = (*msg2_slot+tdd_period_slot)%nr_slots_per_frame[mu];
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*msg2_slot = (*msg2_slot+tdd_period_slot)%nr_slots_per_frame[mu];
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*msg2_frame = (*msg2_slot>(rach_slot))? rach_frame : (rach_frame +1);
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*msg2_frame = ((*msg2_slot>(rach_slot))? rach_frame : (rach_frame+1))%1024;
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}
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}
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if (FR==nr_FR2) {
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if (FR==nr_FR2) {
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int num_tdd_period = *msg2_slot/tdd_period_slot;
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int num_tdd_period = *msg2_slot/tdd_period_slot;
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while((tdd_beam_association[num_tdd_period]!=-1)&&(tdd_beam_association[num_tdd_period]!=beam_index)) {
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while((tdd_beam_association[num_tdd_period]!=-1)&&(tdd_beam_association[num_tdd_period]!=beam_index)) {
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*msg2_slot = (*msg2_slot+tdd_period_slot)%nr_slots_per_frame[mu];
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*msg2_slot = (*msg2_slot+tdd_period_slot)%nr_slots_per_frame[mu];
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*msg2_frame = (*msg2_slot>(rach_slot))? rach_frame : (rach_frame +1);
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*msg2_frame = ((*msg2_slot>(rach_slot))? rach_frame : (rach_frame+1))%1024;
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num_tdd_period = *msg2_slot/tdd_period_slot;
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num_tdd_period = *msg2_slot/tdd_period_slot;
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}
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}
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if(tdd_beam_association[num_tdd_period] == -1)
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if(tdd_beam_association[num_tdd_period] == -1)
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@@ -692,7 +692,7 @@ void nr_get_Msg3alloc(module_id_t module_id,
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if (nr_slots_per_frame[mu]>temp_slot)
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if (nr_slots_per_frame[mu]>temp_slot)
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ra->Msg3_frame = current_frame;
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ra->Msg3_frame = current_frame;
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else
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else
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ra->Msg3_frame = current_frame + (temp_slot/nr_slots_per_frame[mu]);
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ra->Msg3_frame = (current_frame + (temp_slot/nr_slots_per_frame[mu]))%1024;
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// beam association for FR2
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// beam association for FR2
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if (*scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0] >= 257) {
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if (*scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0] >= 257) {
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@@ -520,6 +520,13 @@ void nr_rx_sdu(const module_id_t gnb_mod_idP,
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"expected TC_RNTI %04x to match current RNTI %04x\n",
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"expected TC_RNTI %04x to match current RNTI %04x\n",
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ra->rnti,
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ra->rnti,
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current_rnti);
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current_rnti);
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if( (frameP==ra->Msg3_frame) && (slotP==ra->Msg3_slot) ) {
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LOG_W(NR_MAC, "Random Access %i failed at state %i\n", i, ra->state);
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nr_mac_remove_ra_rnti(gnb_mod_idP, ra->rnti);
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nr_clear_ra_proc(gnb_mod_idP, CC_idP, frameP, ra);
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}
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continue;
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continue;
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}
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}
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