Merge remote-tracking branch 'origin/develop' into harq_latency_control

Conflicts:
	cmake_targets/phy_simulators
	openair1/PHY/CODING/crc_byte.c
	openair2/GNB_APP/gnb_paramdef.h
	openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c
	openair2/RRC/NR/rrc_gNB.c
This commit is contained in:
Raymond Knopp
2022-02-13 09:55:01 +01:00
607 changed files with 31638 additions and 20847 deletions
+32 -12
View File
@@ -24,12 +24,33 @@ loading `libldpc_cl.so` instead of `libldpc.so`:
`make ldpc_cl`
`cp ../../../openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_decoder_kernels_CL.cl`
This command creates the `libldpc_cl.so` shared library. To perform this build successfully, only the OpenCL header `(/usr/include/CL/opencl.h)` and library `(/usr/lib/x86_64-linux-gnu/libOpenCL.so)`are required, they implement OpenCL API support which is not hardware dependent.
```
Scanning dependencies of target nrLDPC_decoder_kernels_CL
Built target nrLDPC_decoder_kernels_CL
Scanning dependencies of target ldpc_cl
Building C object CMakeFiles/ldpc_cl.dir/usr/local/oai/oai-develop/openairinterface5g/openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_decoder_CL.c.o
In file included from /usr/include/CL/cl.h:32,
from /usr/include/CL/opencl.h:38,
from /usr/local/oai/oai-develop/openairinterface5g/openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_decoder_CL.c:49:
/usr/include/CL/cl_version.h:34:9: note: #pragma message: cl_version.h: CL_TARGET_OPENCL_VERSION is not defined. Defaulting to 220 (OpenCL 2.2)
#pragma message("cl_version.h: CL_TARGET_OPENCL_VERSION is not defined. Defaulting to 220 (OpenCL 2.2)")
^~~~~~~
Building C object CMakeFiles/ldpc_cl.dir/usr/local/oai/oai-develop/openairinterface5g/openair1/PHY/CODING/nrLDPC_encoder/ldpc_encoder_optim8segmulti.c.o
Linking C shared module libldpc_cl.so
Built target ldpc_cl
```
At runtime, to successfully use hardware acceleration via OpenCL, you need to install vendor specific packages which deliver the required drivers and tools to make use of their GPU (Nvidia, Intel...) , fpga (Xilinx, Intel) or CPU (Intel, AMD, ARM...) through OpenCL.
`./nr-softmodem -O libconfig:gnb.band78.sa.fr1.106PRB.usrpb210.conf:dbgl5 --rfsim --rfsimulator.serveraddr server --sa --log_config.gtpu_log_level info --loader.ldpc.shlibversion _cl`
``` [LOADER] library libldpc_cl.so successfully loaded
```
------------------------------------------------
[LOADER] library libldpc_cl.so successfully loaded
[HW] Platform 0, OpenCL profile FULL_PROFILE
[HW] Platform 0, OpenCL version OpenCL 2.1 LINUX
[HW] Device 0 is available
@@ -62,8 +83,9 @@ loading `libldpc_cl.so` instead of `libldpc.so`:
`./nr-uesoftmodem -r 106 --numerology 1 --band 78 -C 3619200000 --rfsim --sa -O libconfig:/usr/local/oai/conf/nrue_sim.conf:dbgl5 --nokrnmod --loader.ldpc.shlibversion _cl --log_config.hw_log_level info`
```[CONFIG] shlibversion set to _cl from command line
```
............................................................
[CONFIG] shlibversion set to _cl from command line
[CONFIG] loader.ldpc 1 options set from command line
[LOADER] library libldpc_cl.so successfully loaded
[HW] Platform 0, OpenCL profile FULL_PROFILE
@@ -94,7 +116,6 @@ loading `libldpc_cl.so` instead of `libldpc.so`:
[HW] Device 0, max Work Items size for dimension: 1 512
[HW] Device 0, max Work Items size for dimension: 2 512
------------------------------------------------------------
​```
```
A mechanism to select ldpc implementation is also available in the `ldpctest` phy simulator via the `-v`option, which can be used to specify the version of the ldpc shared library to be used.
@@ -103,7 +124,9 @@ A mechanism to select ldpc implementation is also available in the `ldpctest` ph
Loading libldpc_cuda.so, the cuda implementation of the ldpc decoder:
```$ ./ldpctest -v _cuda
```
$ ./ldpctest -v _cuda
ldpctest -v _cuda
Initializing random number generator, seed 0
block length 8448:
n_trials 1:
@@ -119,18 +142,16 @@ log init done
[CONFIG] loader.ldpc: 1/2 parameters successfully set
[LOADER] library libldpc_cuda.so successfully loaded
...................................
​```
```
Loading libldpc_cl.so, the opencl implementation of the ldpc decoder:
`make ldpc_cl`
`cp ../../../openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_decoder_kernels_CL.cl`
`./ldpctest -v _cl`
```$ ./ldpctest -v _cl
```
$ ./ldpctest -v _cl
Initializing random number generator, seed 0
block length 8448:
n_trials 1:
@@ -164,7 +185,6 @@ log init done
[HW] Device 0, max Work Items size for dimension: 1 512
[HW] Device 0, max Work Items size for dimension: 2 512
................................
​```
```
@@ -174,6 +194,6 @@ Libraries implementing the LDPC algorithms must be named `libldpc<_version>.so`,
`libldpc_cuda.so`has been tested with the `ldpctest` executable, usage from the softmodem's has to be tested.
`libldpc_cl`is under development.
`libldpc_cl.so`is under development.
[oai Wikis home](https://gitlab.eurecom.fr/oai/openairinterface5g/wikis/home)
+14 -4
View File
@@ -514,7 +514,7 @@ int main(int argc, char *argv[])
unsigned char qbits=8;
unsigned int decoded_errors[10000]; // initiate the size of matrix equivalent to size of SNR
int c,i=0, i1 = 0;
int loglvl=OAILOG_WARNING;
int n_trials = 1;
double SNR_step = 0.1;
@@ -525,8 +525,11 @@ int main(int argc, char *argv[])
n_iter_stats_t dec_iter[3];
short BG=0,Zc,Kb=0;
while ((c = getopt (argc, argv, "q:r:s:S:l:G:n:d:i:t:u:hv:")) != -1)
if ( load_configmodule(argc,argv,CONFIG_ENABLECMDLINEONLY) == 0) {
exit_fun(" Error, configuration module init failed\n");
} // must be done before specific options parsing to prevent errasing them
while ((c = getopt (argc, argv, "q:r:s:S:l:L:G:n:d:i:t:u:hv:")) != -1)
switch (c)
{
case 'q':
@@ -544,6 +547,10 @@ int main(int argc, char *argv[])
case 'l':
block_length = atoi(optarg);
break;
case 'L':
loglvl = atoi(optarg);
break;
case 'G':
ldpc_version="_cuda";
@@ -581,10 +588,11 @@ int main(int argc, char *argv[])
printf("BG1 (blocklength > 3840): 1/3, 2/3, 22/25 (8/9) \n");
printf("BG2 (blocklength <= 3840): 1/5, 1/3, 2/3 \n\n");
printf("-h This message\n");
printf("-L <log level, 0(errors), 1(warning), 2(info) 3(debug) 4 (trace)>\n");
printf("-q Quantization bits, Default: 8\n");
printf("-r Nominator rate, (1, 2, 22), Default: 1\n");
printf("-d Denominator rate, (3, 5, 25), Default: 1\n");
printf("-l Block length (l > 3840 -> BG1, rest BG2 ), Default: 8448\n");
printf("-l Block length (l > 3840 -> BG1, rest BG2 ), Default: 8448\n");
printf("-G give 1 to run cuda for LDPC, Default: 0\n");
printf("-n Number of simulation trials, Default: 1\n");
//printf("-M MCS2 for TB 2\n");
@@ -603,6 +611,8 @@ int main(int argc, char *argv[])
printf("n_trials %d: \n", n_trials);
printf("SNR0 %f: \n", SNR0);
logInit();
set_glog(loglvl);
if (ldpc_version != NULL)
load_nrLDPClib(ldpc_version);
+2
View File
@@ -44,6 +44,8 @@
#include "crcext.h"
#include "types.h"
#include <immintrin.h>
#include <wmmintrin.h>
/**
* PCLMULQDQ CRC computation context structure
+34 -25
View File
@@ -30,12 +30,15 @@
Modified in June, 2001, to include the length non multiple of 8
*/
#define USE_INTEL_CRC 1
#ifndef __SSE4_1__
#define USE_INTEL_CRC 0
#else
#define USE_INTEL_CRC __SSE4_1__
#endif
#include "coding_defs.h"
#include "assertions.h"
#ifdef USE_INTEL_CRC
#include "crc_intel.h"
#if USE_INTEL_CRC
#include "crc.h"
#endif
/*ref 36-212 v8.6.0 , pp 8-9 */
@@ -98,7 +101,7 @@ static unsigned short crc11Table[256];
static unsigned char crc8Table[256];
static unsigned char crc6Table[256];
#ifdef USE_INTEL_CRC
#if USE_INTEL_CRC
static DECLARE_ALIGNED(struct crc_pclmulqdq_ctx lte_crc24a_pclmulqdq, 16) = {
0x64e4d700, /**< k1 */
0x2c8c9d00, /**< k2 */
@@ -134,9 +137,9 @@ void crcTableInit (void)
crc8Table[c] = (unsigned char) (crcbit (&c, 1, poly8) >> 24);
crc6Table[c] = (unsigned char) (crcbit (&c, 1, poly6) >> 24);
} while (++c);
#ifdef USE_INTEL_CRC
crc_xmm_be_le_swap128 = _mm_setr_epi32(0x0c0d0e0f, 0x08090a0b,
0x04050607, 0x00010203);
#if USE_INTEL_CRC
crc_xmm_be_le_swap128 = _mm_setr_epi32(0x0c0d0e0f, 0x08090a0b,
0x04050607, 0x00010203);
#endif
}
@@ -153,26 +156,29 @@ unsigned int crc24a (unsigned char * inptr,
{
int octetlen = bitlen / 8; /* Change in octets */
if ( bitlen % 8 /*|| !__builtin_cpu_supports ("pclmul")*/ ) {
unsigned int crc = 0;
int resbit = (bitlen % 8);
while (octetlen-- > 0) {
// printf("crc24a: in %x => crc %x\n",crc,*inptr);
crc = (crc << 8) ^ crc24aTable[(*inptr++) ^ (crc >> 24)];
}
if (resbit > 0)
crc = (crc << resbit) ^ crc24aTable[((*inptr) >> (8 - resbit)) ^ (crc >> (32 - resbit))];
return crc;
} else {
return crc32_calc_pclmulqdq(inptr, octetlen, 0,
if ( bitlen % 8 || !USE_INTEL_CRC ) {
unsigned int crc = 0;
int resbit= (bitlen % 8);
while (octetlen-- > 0) {
// printf("crc24a: in %x => crc %x\n",crc,*inptr);
crc = (crc << 8) ^ crc24aTable[(*inptr++) ^ (crc >> 24)];
}
if (resbit > 0)
crc = (crc << resbit) ^ crc24aTable[((*inptr) >> (8 - resbit)) ^ (crc >> (32 - resbit))];
return crc;
}
#if USE_INTEL_CRC
else {
return crc32_calc_pclmulqdq(inptr, octetlen, 0,
&lte_crc24a_pclmulqdq);
}
#endif
}
#ifdef USE_INTEL_CRC
#if USE_INTEL_CRC
static DECLARE_ALIGNED(struct crc_pclmulqdq_ctx lte_crc24b_pclmulqdq, 16) = {
0x80140500, /**< k1 */
0x42000100, /**< k2 */
@@ -186,8 +192,8 @@ unsigned int crc24b (unsigned char * inptr,
int bitlen)
{
int octetlen = bitlen / 8; /* Change in octets */
if ( bitlen % 8 /*|| !__builtin_cpu_supports ("pclmul") */) {
if ( bitlen % 8 || !USE_INTEL_CRC ) {
unsigned int crc = 0;
int resbit = (bitlen % 8);
@@ -200,10 +206,13 @@ unsigned int crc24b (unsigned char * inptr,
crc = (crc << resbit) ^ crc24bTable[((*inptr) >> (8 - resbit)) ^ (crc >> (32 - resbit))];
return crc;
} else {
}
#if USE_INTEL_CRC
else {
return crc32_calc_pclmulqdq(inptr, octetlen, 0,
&lte_crc24b_pclmulqdq);
}
#endif
}
unsigned int crc24c (unsigned char * inptr,
-541
View File
@@ -1,541 +0,0 @@
/*******************************************************************************
Copyright (c) 2009-2018, Intel Corporation
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
* Redistributions of source code must retain the above copyright notice,
this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
* Neither the name of Intel Corporation nor the names of its contributors
may be used to endorse or promote products derived from this software
without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*******************************************************************************/
/**
* Header file for module with CRC computation methods
*
* PCLMULQDQ implementation is based on work by:
* Erdinc Ozturk
* Vinodh Gopal
* James Guilford
*
* "Fast CRC Computation for Generic Polynomials Using PCLMULQDQ Instruction"
* URL: http://download.intel.com/design/intarch/papers/323102.pdf
*/
#ifndef __CRC_H__
#define __CRC_H__
#include <x86intrin.h>
#include "crcext.h"
#include "types.h"
/**
* PCLMULQDQ CRC computation context structure
*/
struct crc_pclmulqdq_ctx {
/**
* K1 = reminder X^128 / P(X) : 0-63
* K2 = reminder X^192 / P(X) : 64-127
*/
uint64_t k1;
uint64_t k2;
/**
* K3 = reminder X^64 / P(X) : 0-63
* q = quotient X^64 / P(X) : 64-127
*/
uint64_t k3;
uint64_t q;
/**
* p = polynomial / P(X) : 0-63
* res = reserved : 64-127
*/
uint64_t p;
uint64_t res;
};
/**
* Functions and prototypes
*/
/**
* @brief Initializes look-up-table (LUT) for given 8 bit polynomial
*
* @param poly CRC polynomial
* @param lut pointer to look-up-table to be initialized
*/
void crc8_init_lut(const uint8_t poly, uint8_t *lut);
/**
* @brief Calculates 8 bit CRC using LUT method.
*
* @param crc CRC initial value
* @param data pointer to data block to calculate CRC for
* @param data_len size of data block
* @param lut 256x8bits look-up-table pointer
*
* @return New CRC value
*/
__forceinline
uint8_t crc8_calc_lut(const uint8_t *data,
uint32_t data_len,
uint8_t crc,
const uint8_t *lut)
{
if (unlikely(data == NULL || lut == NULL))
return crc;
while (data_len--)
crc = lut[*data++ ^ crc];
return crc;
}
/**
* @brief Initializes look-up-table (LUT) for given 16 bit polynomial
*
* @param poly CRC polynomial
* @param lut pointer to 256x16bits look-up-table to be initialized
*/
void crc16_init_lut(const uint16_t poly, uint16_t *lut);
/**
* @brief Calculates 16 bit CRC using LUT method.
*
* @param crc CRC initial value
* @param data pointer to data block to calculate CRC for
* @param data_len size of data block
* @param lut 256x16bits look-up-table pointer
*
* @return New CRC value
*/
__forceinline
uint16_t crc16_calc_lut(const uint8_t *data,
uint32_t data_len,
uint16_t crc,
const uint16_t *lut)
{
if (unlikely(data == NULL || lut == NULL))
return crc;
while (data_len--)
crc = lut[(crc >> 8) ^ *data++] ^ (crc << 8);
return crc;
}
/**
* @brief Initializes look-up-table (LUT) for given 32 bit polynomial
*
* @param poly CRC polynomial
* @param lut pointer to 256x32bits look-up-table to be initialized
*/
void crc32_init_lut(const uint32_t poly, uint32_t *lut);
/**
* @brief Calculates 32 bit CRC using LUT method.
*
* @param crc CRC initial value
* @param data pointer to data block to calculate CRC for
* @param data_len size of data block
* @param lut 256x32bits look-up-table pointer
*
* @return New CRC value
*/
__forceinline
uint32_t crc32_calc_lut(const uint8_t *data,
uint32_t data_len,
uint32_t crc,
const uint32_t *lut)
{
if (unlikely(data == NULL || lut == NULL))
return crc;
while (data_len--)
crc = lut[(crc >> 24) ^ *data++] ^ (crc << 8);
return crc;
}
/**
* @brief Initializes look up tables for slice-By-2 method.
*
* @param poly CRC polynomial
* @param slice1 slice-by-2 look-up-table 1
* @param slice2 slice-by-2 look-up-table 2
*
* @return New CRC value
*/
void crc16_init_slice2(const uint16_t poly,
uint16_t *slice1,
uint16_t *slice2);
/**
* @brief Calculates 16 bit CRC using Slice-By-2 method.
*
* @param crc CRC initial value
* @param data pointer to data block to calculate CRC for
* @param data_len size of data block
* @param slice1 256x16bits slice look-up-table 1
* @param slice2 256x16bits slice look-up-table 2
*
* @return New CRC value
*/
__forceinline
uint16_t crc16_calc_slice2(const uint8_t *data,
uint32_t data_len,
uint16_t crc,
const uint16_t *slice1,
const uint16_t *slice2)
{
uint_fast32_t i;
if (unlikely(data == NULL))
return crc;
if (unlikely(slice1 == NULL || slice2 == NULL))
return crc;
crc = bswap2(crc);
for (i = (data_len & (~1)), data += (data_len & (~1)); i != 0;
i -= sizeof(uint16_t)) {
crc ^= (*((const uint16_t *)(data - i)));
crc = slice2[(uint8_t)crc] ^ slice1[(uint8_t)(crc >> 8)];
}
crc = bswap2(crc);
if (data_len & 1)
crc = (crc << 8) ^ bswap2(slice1[(crc >> 8) ^ *data]);
return crc;
}
/**
* @brief Initializes look up tables for slice-By-4 method.
*
* @param poly CRC polynomial
* @param slice1 256x32bits slice look-up-table 1
* @param slice2 256x32bits slice look-up-table 2
* @param slice3 256x32bits slice look-up-table 3
* @param slice4 256x32bits slice look-up-table 4
*
* @return New CRC value
*/
void crc32_init_slice4(const uint32_t poly,
uint32_t *slice1, uint32_t *slice2,
uint32_t *slice3, uint32_t *slice4);
/**
* @brief Calculates 32 bit CRC using Slice-By-4 method.
*
* @param data pointer to data block to calculate CRC for
* @param data_len size of data block
* @param crc CRC initial value
* @param slice1 256x32bits slice look-up-table 1
* @param slice2 256x32bits slice look-up-table 2
* @param slice3 256x32bits slice look-up-table 3
* @param slice4 256x32bits slice look-up-table 4
*
* @return New CRC value
*/
__forceinline
uint32_t crc32_calc_slice4(const uint8_t *data,
uint32_t data_len, uint32_t crc,
const uint32_t *slice1, const uint32_t *slice2,
const uint32_t *slice3, const uint32_t *slice4)
{
uint_fast32_t i;
if (unlikely(data == NULL))
return crc;
if (unlikely(slice1 == NULL || slice2 == NULL ||
slice3 == NULL || slice4 == NULL))
return crc;
crc = bswap4(crc);
for (i = data_len & (~3), data += (data_len & (~3)); i != 0;
i -= sizeof(uint32_t)) {
crc ^= (*((const uint32_t *)(data - i)));
crc = slice4[(uint8_t)(crc)] ^
slice3[(uint8_t)(crc >> 8)] ^
slice2[(uint8_t)(crc >> 16)] ^
slice1[(uint8_t)(crc >> 24)];
}
crc = bswap4(crc);
for (i = data_len & 3, data += (data_len & 3); i != 0; i--)
crc = (crc << 8) ^
bswap4(slice1[(crc >> 24) ^ *(data - i)]);
return crc;
}
/**
* @brief Performs one folding round
*
* Logically function operates as follows:
* DATA = READ_NEXT_16BYTES();
* F1 = LSB8(FOLD)
* F2 = MSB8(FOLD)
* T1 = CLMUL( F1, K1 )
* T2 = CLMUL( F2, K2 )
* FOLD = XOR( T1, T2, DATA )
*
* @param data_block 16 byte data block
* @param k1_k2 k1 and k2 constanst enclosed in XMM register
* @param fold running 16 byte folded data
*
* @return New 16 byte folded data
*/
__forceinline
__m128i crc32_folding_round(const __m128i data_block,
const __m128i k1_k2,
const __m128i fold)
{
__m128i tmp = _mm_clmulepi64_si128(fold, k1_k2, 0x11);
return _mm_xor_si128(_mm_clmulepi64_si128(fold, k1_k2, 0x00),
_mm_xor_si128(data_block, tmp));
}
/**
* @brief Performs Barret's reduction from 128 bits to 64 bits
*
* @param data128 128 bits data to be reduced
* @param k3_q k3 and Q constants enclosed in XMM register
*
* @return data reduced to 64 bits
*/
__forceinline
__m128i crc32_reduce_128_to_64(__m128i data128, const __m128i k3_q)
{
__m128i tmp;
tmp = _mm_xor_si128(_mm_clmulepi64_si128(data128, k3_q, 0x01 /* k3 */),
data128);
data128 = _mm_xor_si128(_mm_clmulepi64_si128(tmp, k3_q, 0x01 /* k3 */),
data128);
return _mm_srli_si128(_mm_slli_si128(data128, 8), 8);
}
/**
* @brief Performs Barret's reduction from 64 bits to 32 bits
*
* @param data64 64 bits data to be reduced
* @param k3_q k3 and Q constants enclosed in XMM register
* @param p_res P constant enclosed in XMM register
*
* @return data reduced to 32 bits
*/
__forceinline
uint32_t
crc32_reduce_64_to_32(__m128i fold, const __m128i k3_q, const __m128i p_res)
{
__m128i temp;
temp = _mm_clmulepi64_si128(_mm_srli_si128(fold, 4),
k3_q, 0x10 /* Q */);
temp = _mm_srli_si128(_mm_xor_si128(temp, fold), 4);
temp = _mm_clmulepi64_si128(temp, p_res, 0 /* P */);
return _mm_extract_epi32(_mm_xor_si128(temp, fold), 0);
}
/**
* @brief Calculates 32 bit CRC for given \a data block by applying folding and
* reduction methods.
*
* Algorithm operates on 32 bit CRCs so polynomials and initial values may
* need to be promoted to 32 bits where required.
*
* @param crc initial CRC value (32 bit value)
* @param data pointer to data block
* @param data_len length of \a data block in bytes
* @param params pointer to PCLMULQDQ CRC calculation context
*
* @return CRC for given \a data block (32 bits wide).
*/
__forceinline
uint32_t
crc32_calc_pclmulqdq(const uint8_t *data,
uint32_t data_len, uint32_t crc,
const struct crc_pclmulqdq_ctx *params)
{
__m128i temp, fold, k, swap;
uint32_t n;
if (unlikely(data == NULL || data_len == 0 || params == NULL))
return crc;
#ifdef __KERNEL__
/**
* Preserve FPU context
*/
kernel_fpu_begin();
#endif
/**
* Add 4 bytes to data block size
* This is to secure the following:
* CRC32 = M(X)^32 mod P(X)
* M(X) - message to compute CRC on
* P(X) - CRC polynomial
*/
data_len += 4;
/**
* Load first 16 data bytes in \a fold and
* set \a swap BE<->LE 16 byte conversion variable
*/
fold = _mm_loadu_si128((__m128i *)data);
swap = crc_xmm_be_le_swap128;
/**
* -------------------------------------------------
* Folding all data into single 16 byte data block
* Assumes: \a fold holds first 16 bytes of data
*/
if (unlikely(data_len <= 16)) {
/**
* Data block fits into 16 byte block
* - adjust data block
* - 4 least significant bytes need to be zero
*/
fold = _mm_shuffle_epi8(fold, swap);
fold = _mm_slli_si128(xmm_shift_right(fold, 20 - data_len), 4);
/**
* Apply CRC init value
*/
temp = _mm_insert_epi32(_mm_setzero_si128(), bswap4(crc), 0);
temp = xmm_shift_left(temp, data_len - 4);
fold = _mm_xor_si128(fold, temp);
} else {
/**
* There are 2x16 data blocks or more
*/
__m128i next_data;
/**
* n = number of bytes required to align \a data_len
* to multiple of 16
*/
n = ((~data_len) + 1) & 15;
/**
* Apply CRC initial value and
* get \a fold to BE format
*/
fold = _mm_xor_si128(fold,
_mm_insert_epi32(_mm_setzero_si128(),
crc, 0));
fold = _mm_shuffle_epi8(fold, swap);
/**
* Load next 16 bytes of data and
* adjust \a fold & \a next_data as follows:
*
* CONCAT(fold,next_data) >> (n*8)
*/
next_data = _mm_loadu_si128((__m128i *)&data[16]);
next_data = _mm_shuffle_epi8(next_data, swap);
next_data = _mm_or_si128(xmm_shift_right(next_data, n),
xmm_shift_left(fold, 16 - n));
fold = xmm_shift_right(fold, n);
if (unlikely(data_len <= 32))
/**
* In such unlikely case clear 4 least significant bytes
*/
next_data =
_mm_slli_si128(_mm_srli_si128(next_data, 4), 4);
/**
* Do the initial folding round on 2 first 16 byte chunks
*/
k = _mm_load_si128((__m128i *)(&params->k1));
fold = crc32_folding_round(next_data, k, fold);
if (likely(data_len > 32)) {
/**
* \a data_block needs to be at least 48 bytes long
* in order to get here
*/
__m128i new_data;
/**
* Main folding loop
* - n is adjusted to point to next 16 data block
* to read
* (16+16) = 2x16; represents 2 first data blocks
* processed above
* (- n) is the number of zero bytes padded to
* the message in order to align it to 16 bytes
* - the last 16 bytes is processed separately
*/
for (n = 16 + 16 - n; n < (data_len - 16); n += 16) {
new_data = _mm_loadu_si128((__m128i *)&data[n]);
new_data = _mm_shuffle_epi8(new_data, swap);
fold = crc32_folding_round(new_data, k, fold);
}
/**
* The last folding round works always on 12 bytes
* (12 bytes of data and 4 zero bytes)
* Read from offset -4 is to avoid one
* shift right operation.
*/
new_data = _mm_loadu_si128((__m128i *)&data[n - 4]);
new_data = _mm_shuffle_epi8(new_data, swap);
new_data = _mm_slli_si128(new_data, 4);
fold = crc32_folding_round(new_data, k, fold);
} /* if (data_len > 32) */
}
/**
* -------------------------------------------------
* Reduction 128 -> 32
* Assumes: \a fold holds 128bit folded data
*/
/**
* REDUCTION 128 -> 64
*/
k = _mm_load_si128((__m128i *)(&params->k3));
fold = crc32_reduce_128_to_64(fold, k);
/**
* REDUCTION 64 -> 32
*/
n = crc32_reduce_64_to_32(fold, k,
_mm_load_si128((__m128i *)(&params->p)));
#ifdef __KERNEL__
/**
* - restore FPU context
*/
kernel_fpu_end();
#endif
return n;
}
#endif /* __CRC_H__ */
@@ -25,15 +25,7 @@
* \version 1.0
* \note initial implem - translation of cuda version
*/
/* uses HW component id for log messages ( --log_config.hw_log_level <warning| info|debug|trace>) */
#include <stdio.h>
#include <unistd.h>
#include <cuda_runtime.h>
#include <CL/opencl.h>
#include "PHY/CODING/nrLDPC_decoder/nrLDPC_types.h"
#include "PHY/CODING/nrLDPC_decoder/nrLDPCdecoder_defs.h"
#include "assertions.h"
#include "common/utils/LOG/log.h"
#define MAX_ITERATION 2
#define MC 1
@@ -41,16 +33,29 @@
#define MAX_OCLDEV 10
#define MAX_OCLRUNTIME 5
#define CLSETKERNELARG(A,B,C,D) \
rt=clSetKernelArg(A,B,C,D) ;\
AssertFatal(rt == CL_SUCCESS, "Error %d setting kernel argument index %d\n" , (int)rt, B);
typedef struct{
char x;
char y;
short value;
} h_element;
#ifdef NRLDPC_KERNEL_SOURCE
#include "nrLDPC_decoder_kernels_CL.c"
#else
/* uses HW component id for log messages ( --log_config.hw_log_level <warning| info|debug|trace>) */
#include <stdio.h>
#include <unistd.h>
#include <sys/stat.h>
#include <CL/opencl.h>
#include "PHY/CODING/nrLDPC_decoder/nrLDPC_types.h"
#include "PHY/CODING/nrLDPC_decoder/nrLDPCdecoder_defs.h"
#include "assertions.h"
#include "common/utils/LOG/log.h"
#define CLSETKERNELARG(A,B,C,D) \
rt=clSetKernelArg(A,B,C,D) ;\
AssertFatal(rt == CL_SUCCESS, "Error %d setting kernel argument index %d\n" , (int)rt, B);
#include "../nrLDPC_decoder_LYC/bgs/BG1_compact_in_C.h"
typedef struct{
@@ -213,20 +218,31 @@ void get_CompilErr(cl_program program, int pltf) {
}
size_t load_source(char **source_str) {
int MAX_SOURCE_SIZE=(500*132);
size_t load_source(char **source_str, char *filename) {
FILE *fp;
struct stat st ;
size_t source_size;
fp = fopen("nrLDPC_decoder_kernels_CL.cl", "r");
AssertFatal(fp,"failed to open cl source: %s\n",strerror(errno));
char *src= NULL;
*source_str = (char*)malloc(MAX_SOURCE_SIZE);
source_size = fread( *source_str, 1, MAX_SOURCE_SIZE, fp);
fclose( fp );
return source_size;
if (filename == NULL) {
src = "nrLDPC_decoder_kernels_CL.clc";
} else {
src = filename;
}
fp = fopen(src, "r");
AssertFatal(fp,"failed to open cl source %s: %s\n",src,strerror(errno));
fstat(fileno(fp), &st);
source_size = st.st_size;
*source_str = (char*)malloc(source_size);
source_size = fread( *source_str, 1, source_size, fp);
fclose( fp );
LOG_I(HW,"Loaded kernel sources from %s %u bytes\n", (filename==NULL)?"embedded cl code":src,(unsigned int)source_size );
return source_size;
}
/* from here: entry points in decoder shared lib */
int ldpc_autoinit(void) { // called by the library loader
cl_platform_id platforms[10];
@@ -284,11 +300,11 @@ int ldpc_autoinit(void) { // called by the library loader
ocl.runtime[i].dev_tmp = clCreateBuffer(ocl.runtime[i].context, CL_MEM_READ_ONLY|CL_MEM_HOST_WRITE_ONLY, 68*384, NULL, (cl_int *)&rt);
AssertFatal(rt == CL_SUCCESS, "Error %d creating buffer dev_tmp for platform %i \n" , (int)rt, i);
char *source_str;
size_t source_size=load_source(&source_str);
size_t source_size=load_source(&source_str,"nrLDPC_decoder_kernels_CL.clc");
cl_program program = clCreateProgramWithSource(ocl.runtime[i].context, 1,
(const char **)&source_str, (const size_t *)&source_size, (cl_int *)&rt);
AssertFatal(rt == CL_SUCCESS, "Error %d creating program for platform %i \n" , (int)rt, i);
rt = clBuildProgram(program, ocl.runtime[i].num_devices,ocl.runtime[i].devices, NULL, NULL, NULL);
rt = clBuildProgram(program, ocl.runtime[i].num_devices,ocl.runtime[i].devices, NULL /* compile options */, NULL, NULL);
if (rt == CL_BUILD_PROGRAM_FAILURE) {
get_CompilErr(program,i);
}
@@ -434,3 +450,4 @@ int32_t nrLDPC_decod(t_nrLDPC_dec_params* p_decParams, int8_t* p_llr, int8_t* p_
return MAX_ITERATION;
}
#endif //NRLDPC_KERNEL_SOURCE
@@ -29,16 +29,7 @@
* \note initial implem - translation of cuda version
* \warning
*/
#define define MAX_ITERATION 2
#define MC 1
#define INT32_MAX 2147483647
typedef struct{
char x;
char y;
short value;
} h_element;
//__global char dev_dt [46*68*384];
//__local char *dev_t;
@@ -46,7 +37,7 @@ typedef struct{
//__global unsigned char dev_tmp[68*384];
#define INT32_MAX 2147483647
//__constant h_element dev_h_compact1[46*19] = {}; // used in kernel 1
//__constant h_element dev_h_compact2[68*30] = {}; // used in kernel 2
@@ -299,4 +290,3 @@ __kernel void pack_decoded_bit(__global unsigned char * dev_llr, __global unsign
}
}
}
@@ -38,8 +38,6 @@
#include "common/utils/LOG/log.h"
//#define DEBUG_LDPC
#include "ldpc384_byte.c"
#include "ldpc352_byte.c"
#include "ldpc320_byte.c"
@@ -39,8 +39,6 @@
#include "PHY/TOOLS/time_meas.h"
#include "defs.h"
//#define DEBUG_LDPC
#include "ldpc384_byte.c"
#include "ldpc352_byte.c"
#include "ldpc320_byte.c"
@@ -40,9 +40,6 @@
#include "openair1/PHY/CODING/nrLDPC_defs.h"
#include "ldpc_encode_parity_check.c"
#include "ldpc_generate_coefficient.c"
//#define DEBUG_LDPC
@@ -50,7 +47,7 @@ int nrLDPC_encod(unsigned char **test_input,unsigned char **channel_input,int Zc
{
short nrows=0,ncols=0;
int i,rate=3;
int rate=3;
int no_punctured_columns,removed_bit;
int simd_size;
@@ -96,7 +93,7 @@ int nrLDPC_encod(unsigned char **test_input,unsigned char **channel_input,int Zc
memset(d,0,sizeof(unsigned char) * nrows * Zc);
if(impp->tinput != NULL) start_meas(impp->tinput);
for (i=0; i<block_length; i++) {
for (int i=0; i<block_length; i++) {
c[i] = (test_input[0][i/8]&(128>>(i&7)))>>(7-(i&7));
//printf("c(%d,%d)=%d\n",j,i,temp);
}
@@ -38,7 +38,6 @@
#include "common/utils/LOG/log.h"
#include "PHY/TOOLS/time_meas.h"
#include "openair1/PHY/CODING/nrLDPC_defs.h"
//#define DEBUG_LDPC
#include "ldpc_encode_parity_check.c"
#include "ldpc_generate_coefficient.c"
@@ -38,7 +38,6 @@
#include "common/utils/LOG/log.h"
#include "PHY/TOOLS/time_meas.h"
#include "openair1/PHY/CODING/nrLDPC_defs.h"
//#define DEBUG_LDPC
#include "ldpc_encode_parity_check.c"
#include "ldpc_generate_coefficient.c"
+2 -2
View File
@@ -46,14 +46,14 @@ static loader_shlibfunc_t shlib_fdesc[3];
/* arguments used when called from phy simulators exec's which do not use the config module */
/* arg is used to initialize the config module so that the loader works as expected */
char *arg[64]={"ldpctest","-O","cmdlineonly::dbgl0",NULL,NULL};
char *arg[64]={"ldpctest",NULL};
int load_nrLDPClib(char *version) {
char *ptr = (char*)config_get_if();
char libname[64]="ldpc";
if ( ptr==NULL ) {// phy simulators, config module possibly not loaded
load_configmodule(0,(char **)NULL,CONFIG_ENABLECMDLINEONLY) ;
load_configmodule(1,arg,CONFIG_ENABLECMDLINEONLY) ;
logInit();
}
shlib_fdesc[0].fname = "nrLDPC_decod";
+2 -2
View File
@@ -405,7 +405,7 @@ int nr_rate_matching_ldpc(uint8_t Ilbrm,
ind = (index_k0[BG-1][rvidx]*Ncb/N)*Z;
#ifdef RM_DEBUG
printf("nr_rate_matching_ldpc: E %d, F %d, Foffset %d, k0 %d, Ncb %d, rvidx %d\n", E, F, Foffset,ind, Ncb, rvidx);
printf("nr_rate_matching_ldpc: E %d, F %d, Foffset %d, k0 %d, Ncb %d, rvidx %d, Ilbrm %d\n", E, F, Foffset,ind, Ncb, rvidx, Ilbrm);
#endif
if (Foffset > E) {
@@ -502,7 +502,7 @@ int nr_rate_matching_ldpc_rx(uint8_t Ilbrm,
}
#ifdef RM_DEBUG
printf("nr_rate_matching_ldpc_rx: Clear %d, E %d, k0 %d, Ncb %d, rvidx %d\n", clear, E, ind, Ncb, rvidx);
printf("nr_rate_matching_ldpc_rx: Clear %d, E %d, k0 %d, Ncb %d, rvidx %d, Ilbrm %d\n", clear, E, ind, Ncb, rvidx, Ilbrm);
#endif
if (clear==1) memset(w,0,Ncb*sizeof(int16_t));
+1 -1
View File
@@ -106,7 +106,7 @@ void phy_config_request(PHY_Config_t *phy_config) {
int Ncp = cfg->subframe_config.dl_cyclic_prefix_type.value;
int p_eNB = cfg->rf_config.tx_antenna_ports.value;
uint32_t dl_CarrierFreq = cfg->nfapi_config.earfcn.value;
LOG_I(PHY,"Configuring MIB for instance %d, CCid %d : (band %d,N_RB_DL %d, N_RB_UL %d, Nid_cell %d,eNB_tx_antenna_ports %d,Ncp %d,DL freq %u,phich_config.resource %d, phich_config.duration %d)\n",
LOG_A(PHY,"Configuring MIB for instance %d, CCid %d : (band %d,N_RB_DL %d, N_RB_UL %d, Nid_cell %d,eNB_tx_antenna_ports %d,Ncp %d,DL freq %u,phich_config.resource %d, phich_config.duration %d)\n",
Mod_id, CC_id, eutra_band, dl_Bandwidth, ul_Bandwidth, Nid_cell, p_eNB,Ncp,dl_CarrierFreq,
cfg->phich_config.phich_resource.value,
cfg->phich_config.phich_duration.value);
+1 -1
View File
@@ -548,7 +548,7 @@ void phy_config_dedicated_ue(module_id_t Mod_id,int CC_id,uint8_t eNB_id,
phy_vars_ue->decode_MIB = 0;
}
if(NFAPI_MODE!=NFAPI_UE_STUB_PNF) {
if(NFAPI_MODE!=NFAPI_UE_STUB_PNF && NFAPI_MODE!=NFAPI_MODE_STANDALONE_PNF) {
//phy_vars_ue->pdcch_vars[1][eNB_id]->crnti = phy_vars_ue->pdcch_vars[0][eNB_id]->crnti;
if(phy_vars_ue->pdcch_vars[0][eNB_id]->crnti == 0x1234)
phy_vars_ue->pdcch_vars[0][eNB_id]->crnti = phy_vars_ue->pdcch_vars[1][eNB_id]->crnti;
+27 -1
View File
@@ -195,6 +195,26 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
nr_init_csi_rs(gNB, cfg->cell_config.phy_cell_id.value);
for (int id=0; id<NUMBER_OF_NR_SRS_MAX; id++) {
gNB->nr_srs_info[id] = (nr_srs_info_t *)malloc16_clear(sizeof(nr_srs_info_t));
gNB->nr_srs_info[id]->srs_generated_signal = (int32_t*)malloc16_clear(fp->ofdm_symbol_size*MAX_NUM_NR_SRS_SYMBOLS*sizeof(int32_t));
gNB->nr_srs_info[id]->noise_power = (uint32_t*)malloc16_clear(sizeof(uint32_t));
gNB->nr_srs_info[id]->srs_received_signal = (int32_t **)malloc16(Prx*sizeof(int32_t*));
gNB->nr_srs_info[id]->srs_ls_estimated_channel = (int32_t **)malloc16(Prx*sizeof(int32_t*));
gNB->nr_srs_info[id]->srs_estimated_channel_freq = (int32_t **)malloc16(Prx*sizeof(int32_t*));
gNB->nr_srs_info[id]->srs_estimated_channel_time = (int32_t **)malloc16(Prx*sizeof(int32_t*));
gNB->nr_srs_info[id]->srs_estimated_channel_time_shifted = (int32_t **)malloc16(Prx*sizeof(int32_t*));
for (i=0;i<Prx;i++){
gNB->nr_srs_info[id]->srs_received_signal[i] = (int32_t*)malloc16_clear(fp->ofdm_symbol_size*MAX_NUM_NR_SRS_SYMBOLS*sizeof(int32_t));
gNB->nr_srs_info[id]->srs_ls_estimated_channel[i] = (int32_t*)malloc16_clear(fp->ofdm_symbol_size*MAX_NUM_NR_SRS_SYMBOLS*sizeof(int32_t));
gNB->nr_srs_info[id]->srs_estimated_channel_freq[i] = (int32_t*)malloc16_clear(fp->ofdm_symbol_size*MAX_NUM_NR_SRS_SYMBOLS*sizeof(int32_t));
gNB->nr_srs_info[id]->srs_estimated_channel_time[i] = (int32_t*)malloc16_clear(fp->ofdm_symbol_size*MAX_NUM_NR_SRS_SYMBOLS*sizeof(int32_t));
gNB->nr_srs_info[id]->srs_estimated_channel_time_shifted[i] = (int32_t*)malloc16_clear(fp->ofdm_symbol_size*MAX_NUM_NR_SRS_SYMBOLS*sizeof(int32_t));
}
}
generate_ul_reference_signal_sequences(SHRT_MAX);
/* Generate low PAPR type 1 sequences for PUSCH DMRS, these are used if transform precoding is enabled. */
generate_lowpapr_typ1_refsig_sequences(SHRT_MAX);
@@ -487,7 +507,7 @@ void nr_phy_config_request(NR_PHY_Config_t *phy_config) {
LOG_I(PHY, "DL frequency %lu Hz, UL frequency %lu Hz: band %d, uldl offset %d Hz\n", fp->dl_CarrierFreq, fp->ul_CarrierFreq, fp->nr_band, dlul_offset);
fp->threequarter_fs = openair0_cfg[0].threequarter_fs;
LOG_I(PHY,"Configuring MIB for instance %d, : (Nid_cell %d,DL freq %llu, UL freq %llu)\n",
LOG_A(PHY,"Configuring MIB for instance %d, : (Nid_cell %d,DL freq %llu, UL freq %llu)\n",
Mod_id,
gNB_config->cell_config.phy_cell_id.value,
(unsigned long long)fp->dl_CarrierFreq,
@@ -546,6 +566,12 @@ void init_nr_transport(PHY_VARS_gNB *gNB) {
AssertFatal(gNB->pucch[i]!=NULL,"Can't initialize pucch %d \n", i);
}
for (int i=0; i<NUMBER_OF_NR_SRS_MAX; i++) {
LOG_I(PHY,"Allocating Transport Channel Buffers for SRS %d/%d\n",i,NUMBER_OF_NR_SRS_MAX);
gNB->srs[i] = new_gNB_srs();
AssertFatal(gNB->srs[i]!=NULL,"Can't initialize srs %d \n", i);
}
for (int i=0; i<gNB->number_of_nr_ulsch_max; i++) {
LOG_I(PHY,"Allocating Transport Channel Buffer for ULSCH %d/%d\n",i,gNB->number_of_nr_ulsch_max);
+24 -12
View File
@@ -20,27 +20,19 @@
*/
#include "phy_init.h"
#include "SCHED_UE/sched_UE.h"
#include "PHY/phy_extern_nr_ue.h"
//#include "SIMULATION/TOOLS/sim.h"
/*#include "RadioResourceConfigCommonSIB.h"
#include "RadioResourceConfigDedicated.h"
#include "TDD-Config.h"
#include "MBSFN-SubframeConfigList.h"*/
#include "openair1/PHY/defs_RU.h"
#include "openair1/PHY/impl_defs_nr.h"
#include "common/utils/LOG/vcd_signal_dumper.h"
#include "assertions.h"
#include <math.h>
#include "PHY/MODULATION/nr_modulation.h"
#include "PHY/NR_UE_TRANSPORT/nr_transport_ue.h"
#include "PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h"
//#include "PHY/LTE_REFSIG/lte_refsig.h"
#include "PHY/CODING/nrPolar_tools/nr_polar_pbch_defs.h"
#include "PHY/INIT/phy_init.h"
#include "PHY/NR_REFSIG/pss_nr.h"
#include "PHY/NR_REFSIG/ul_ref_seq_nr.h"
#include "PHY/NR_REFSIG/refsig_defs_ue.h"
#include "PHY/NR_REFSIG/nr_refsig.h"
#include "PHY/MODULATION/nr_modulation.h"
#if 0
void phy_config_harq_ue(module_id_t Mod_id,
@@ -136,6 +128,8 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue,
NR_UE_COMMON *const common_vars = &ue->common_vars;
NR_UE_PBCH **const pbch_vars = ue->pbch_vars;
NR_UE_PRACH **const prach_vars = ue->prach_vars;
NR_UE_SRS **const srs_vars = ue->srs_vars;
int i,j,k,l,slot,symb,q;
int gNB_id;
int th_id;
@@ -318,6 +312,24 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue,
prach_vars[gNB_id] = (NR_UE_PRACH *)malloc16_clear(sizeof(NR_UE_PRACH));
pbch_vars[gNB_id] = (NR_UE_PBCH *)malloc16_clear(sizeof(NR_UE_PBCH));
srs_vars[gNB_id] = (NR_UE_SRS *)malloc16_clear(sizeof(NR_UE_SRS));
srs_vars[gNB_id]->active = false;
ue->nr_srs_info = (nr_srs_info_t *)malloc16_clear(sizeof(nr_srs_info_t));
ue->nr_srs_info->srs_generated_signal = (int32_t *) malloc16_clear( (2*(fp->samples_per_frame)+2048)*sizeof(int32_t) );
ue->nr_srs_info->noise_power = (uint32_t*)malloc16_clear(sizeof(uint32_t));
ue->nr_srs_info->srs_received_signal = (int32_t **)malloc16( fp->nb_antennas_rx*sizeof(int32_t *) );
ue->nr_srs_info->srs_ls_estimated_channel = (int32_t **)malloc16( fp->nb_antennas_rx*sizeof(int32_t *) );
ue->nr_srs_info->srs_estimated_channel_freq = (int32_t **)malloc16( fp->nb_antennas_rx*sizeof(int32_t *) );
ue->nr_srs_info->srs_estimated_channel_time = (int32_t **)malloc16( fp->nb_antennas_rx*sizeof(int32_t *) );
ue->nr_srs_info->srs_estimated_channel_time_shifted = (int32_t **)malloc16( fp->nb_antennas_rx*sizeof(int32_t *) );
for (i=0; i<fp->nb_antennas_rx; i++) {
ue->nr_srs_info->srs_received_signal[i] = (int32_t *) malloc16_clear(fp->ofdm_symbol_size*MAX_NUM_NR_SRS_SYMBOLS*sizeof(int32_t));
ue->nr_srs_info->srs_ls_estimated_channel[i] = (int32_t *) malloc16_clear(fp->ofdm_symbol_size*MAX_NUM_NR_SRS_SYMBOLS*sizeof(int32_t));
ue->nr_srs_info->srs_estimated_channel_freq[i] = (int32_t *) malloc16_clear(fp->ofdm_symbol_size*MAX_NUM_NR_SRS_SYMBOLS*sizeof(int32_t));
ue->nr_srs_info->srs_estimated_channel_time[i] = (int32_t *) malloc16_clear(fp->ofdm_symbol_size*MAX_NUM_NR_SRS_SYMBOLS*sizeof(int32_t));
ue->nr_srs_info->srs_estimated_channel_time_shifted[i] = (int32_t *) malloc16_clear(fp->ofdm_symbol_size*MAX_NUM_NR_SRS_SYMBOLS*sizeof(int32_t));
}
if (abstraction_flag == 0) {
for (th_id=0; th_id<RX_NB_TH_MAX; th_id++) {
@@ -458,7 +470,7 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue,
ue->decode_SIB = 1;
init_nr_prach_tables(839);
init_symbol_rotation(fp);
return 0;
}
@@ -530,6 +542,7 @@ void init_N_TA_offset(PHY_VARS_NR_UE *ue){
void phy_init_nr_top(PHY_VARS_NR_UE *ue) {
NR_DL_FRAME_PARMS *frame_parms = &ue->frame_parms;
crcTableInit();
init_scrambling_luts();
load_dftslib();
init_context_synchro_nr(frame_parms);
generate_ul_reference_signal_sequences(SHRT_MAX);
@@ -541,6 +554,5 @@ void phy_init_nr_top(PHY_VARS_NR_UE *ue) {
//generate_16qam_table();
//generate_RIV_tables();
//init_unscrambling_lut();
//init_scrambling_lut();
//set_taus_seed(1328);
}
+3 -9
View File
@@ -209,7 +209,6 @@ uint32_t get_samples_per_slot(int slot, NR_DL_FRAME_PARMS* fp)
return samp_count;
}
uint32_t get_slot_from_timestamp(openair0_timestamp timestamp_rx, NR_DL_FRAME_PARMS* fp)
{
uint32_t slot_idx = 0;
@@ -251,11 +250,9 @@ int nr_init_frame_parms(nfapi_nr_config_request_scf_t* cfg,
int Ncp = NFAPI_CP_NORMAL;
int mu = cfg->ssb_config.scs_common.value;
#if DISABLE_LOG_X
printf("Initializing frame parms for mu %d, N_RB %d, Ncp %d\n",mu, fp->N_RB_DL, Ncp);
#else
LOG_I(PHY,"Initializing frame parms for mu %d, N_RB %d, Ncp %d\n",mu, fp->N_RB_DL, Ncp);
#endif
if (Ncp == NFAPI_CP_EXTENDED)
AssertFatal(mu == NR_MU_2,"Invalid cyclic prefix %d for numerology index %d\n", Ncp, mu);
@@ -344,11 +341,8 @@ int nr_init_frame_parms_ue(NR_DL_FRAME_PARMS *fp,
AssertFatal(fp->ul_CarrierFreq == (fp->dl_CarrierFreq + uplink_frequency_offset), "Disagreement in uplink frequency for band %d: ul_CarrierFreq = %lu Hz vs expected %lu Hz\n", fp->nr_band, fp->ul_CarrierFreq, fp->dl_CarrierFreq + uplink_frequency_offset);
#if DISABLE_LOG_X
printf("Initializing UE frame parms for mu %d, N_RB %d, Ncp %d\n",fp->numerology_index, fp->N_RB_DL, Ncp);
#else
LOG_I(PHY,"Initializing frame parms for mu %d, N_RB %d, Ncp %d\n",fp->numerology_index, fp->N_RB_DL, Ncp);
#endif
if (Ncp == NFAPI_CP_EXTENDED)
AssertFatal(fp->numerology_index == NR_MU_2,"Invalid cyclic prefix %d for numerology index %d\n", Ncp, fp->numerology_index);
+1 -2
View File
@@ -36,8 +36,7 @@
\param reset resets the generator
\return 32 bits of the gold sequence
*/
uint32_t lte_gold_generic(uint32_t *x1, uint32_t *x2, uint8_t reset);
#include <openair1/PHY/LTE_TRANSPORT/transport_proto.h>
/*!\brief This function generates the LTE Gold sequence (36-211, Sec 7.2), specifically for DL reference signals.
@param frame_parms LTE DL Frame parameters
@@ -42,7 +42,6 @@
#include "common/utils/LOG/log.h"
#include "targets/RT/USER/lte-softmodem.h"
#include <syscall.h>
#include "targets/RT/USER/rt_wrapper.h"
#include <common/utils/threadPool/thread-pool.h>
//#define DEBUG_DLSCH_CODING
@@ -2921,6 +2921,9 @@ int allocate_REs_in_RB_MCH_khz_1dot25(int32_t **txdataF,
uint8_t skip_dc,
LTE_DL_FRAME_PARMS *frame_parms)
{
if (!qam_table_s)
abort();
uint32_t tti_offset;
uint8_t re,offset;
uint8_t qam64_table_offset_re = 0;
@@ -1,75 +0,0 @@
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
#include "PHY/types.h"
/**
\brief Gold Sequence Generation defined in 3x.211
\param x1 x1 shift register
\param x2 x2 shift register / cinit if reset is set
\param reset Reset flag / reinitialize the generator
\return c 32 bits of gold output
*/
extern inline uint32_t lte_gold_generic(uint32_t *x1, uint32_t *x2, uint8_t reset)
{
int32_t n;
// 3GPP 3x.211
// Nc = 1600
// c(n) = [x1(n+Nc) + x2(n+Nc)]mod2
// x1(n+31) = [x1(n+3) + x1(n)]mod2
// x2(n+31) = [x2(n+3) + x2(n+2) + x2(n+1) + x2(n)]mod2
if (reset)
{
// Init value for x1: x1(0) = 1, x1(n) = 0, n=1,2,...,30
// x1(31) = [x1(3) + x1(0)]mod2 = 1
*x1 = 1 + (1U<<31);
// Init value for x2: cinit = sum_{i=0}^30 x2*2^i
// x2(31) = [x2(3) + x2(2) + x2(1) + x2(0)]mod2
// = (*x2>>3) ^ (*x2>>2) + (*x2>>1) + *x2
*x2 = *x2 ^ ((*x2 ^ (*x2>>1) ^ (*x2>>2) ^ (*x2>>3))<<31);
// x1 and x2 contain bits n = 0,1,...,31
// Nc = 1600 bits are skipped at the beginning
// i.e., 1600 / 32 = 50 32bit words
for (n = 1; n < 50; n++)
{
// Compute x1(0),...,x1(27)
*x1 = (*x1>>1) ^ (*x1>>4);
// Compute x1(28),..,x1(31) and xor
*x1 = *x1 ^ (*x1<<31) ^ (*x1<<28);
// Compute x2(0),...,x2(27)
*x2 = (*x2>>1) ^ (*x2>>2) ^ (*x2>>3) ^ (*x2>>4);
// Compute x2(28),..,x2(31) and xor
*x2 = *x2 ^ (*x2<<31) ^ (*x2<<30) ^ (*x2<<29) ^ (*x2<<28);
}
}
*x1 = (*x1>>1) ^ (*x1>>4);
*x1 = *x1 ^ (*x1<<31) ^ (*x1<<28);
*x2 = (*x2>>1) ^ (*x2>>2) ^ (*x2>>3) ^ (*x2>>4);
*x2 = *x2 ^ (*x2<<31) ^ (*x2<<30) ^ (*x2<<29) ^ (*x2<<28);
// c(n) = [x1(n+Nc) + x2(n+Nc)]mod2
return(*x1^*x2);
}
+11 -11
View File
@@ -147,10 +147,10 @@ uint32_t get_TBS_UL(uint8_t mcs, uint16_t nb_rb) {
}
}
int adjust_G2(LTE_DL_FRAME_PARMS *frame_parms, uint32_t *rb_alloc, uint8_t mod_order, uint8_t subframe, uint8_t symbol) {
int adjust_G2(int Ncp, int frame_type, int N_RB_DL, uint32_t *rb_alloc, uint8_t mod_order, uint8_t subframe, uint8_t symbol) {
int rb,re_pbch_sss=0;
int rb_alloc_ind,nsymb;
nsymb = (frame_parms->Ncp==NORMAL) ? 14 : 12;
nsymb = (Ncp==NORMAL) ? 14 : 12;
// printf("adjust_G2 : symbol %d, subframe %d\n",symbol,subframe);
if ((subframe!=0) && (subframe!=5) && (subframe!=6)) // if not PBCH/SSS or SSS
@@ -158,12 +158,12 @@ int adjust_G2(LTE_DL_FRAME_PARMS *frame_parms, uint32_t *rb_alloc, uint8_t mod_o
//first half of slot and TDD (no adjustments in first slot except for subframe 6 - PSS)
if ((symbol<(nsymb>>1))&&
(frame_parms->frame_type == TDD)&&
(frame_type == TDD)&&
(subframe!=6))
return(0);
// after PBCH
if (frame_parms->frame_type==TDD) { //TDD
if (frame_type==TDD) { //TDD
if ((symbol>((nsymb>>1)+3)) &&
(symbol!=(nsymb-1))) ///SSS
return(0);
@@ -185,9 +185,9 @@ int adjust_G2(LTE_DL_FRAME_PARMS *frame_parms, uint32_t *rb_alloc, uint8_t mod_o
return(0);
}
if ((frame_parms->N_RB_DL&1) == 1) { // ODD N_RB_DL
for (rb=((frame_parms->N_RB_DL>>1)-3);
rb<=((frame_parms->N_RB_DL>>1)+3);
if ((N_RB_DL&1) == 1) { // ODD N_RB_DL
for (rb=((N_RB_DL>>1)-3);
rb<=((N_RB_DL>>1)+3);
rb++) {
if (rb < 32)
rb_alloc_ind = (rb_alloc[0]>>rb) & 1;
@@ -201,16 +201,16 @@ int adjust_G2(LTE_DL_FRAME_PARMS *frame_parms, uint32_t *rb_alloc, uint8_t mod_o
rb_alloc_ind = 0;
if (rb_alloc_ind==1) {
if ((rb==(frame_parms->N_RB_DL>>1)-3) ||
(rb==((frame_parms->N_RB_DL>>1)+3))) {
if ((rb==(N_RB_DL>>1)-3) ||
(rb==((N_RB_DL>>1)+3))) {
re_pbch_sss += 6;
} else
re_pbch_sss += 12;
}
}
} else {
for (rb=((frame_parms->N_RB_DL>>1)-3);
rb<((frame_parms->N_RB_DL>>1)+3);
for (rb=((N_RB_DL>>1)-3);
rb<((N_RB_DL>>1)+3);
rb++) {
if (rb < 32)
rb_alloc_ind = (rb_alloc[0]>>rb) & 1;
+1 -1
View File
@@ -44,7 +44,7 @@ void pcfich_scrambling(LTE_DL_FRAME_PARMS *frame_parms,
{
uint32_t i;
uint8_t reset;
uint32_t x1, x2, s=0;
uint32_t x1=0, x2, s=0;
reset = 1;
// x1 is set in lte_gold_generic
+1 -1
View File
@@ -895,7 +895,7 @@ uint32_t rx_pucch(PHY_VARS_eNB *eNB,
int frame,
uint8_t subframe,
uint8_t pucch1_thres,
uint8_t br_flag
int br_flag
)
//-----------------------------------------------------------------------------
{
@@ -101,7 +101,7 @@ int get_G(LTE_DL_FRAME_PARMS *frame_parms,uint16_t nb_rb,uint32_t *rb_alloc,uint
int get_G_khz_1dot25(LTE_DL_FRAME_PARMS *frame_parms,uint16_t nb_rb,uint32_t *rb_alloc,uint8_t mod_order,uint8_t Nl,uint8_t num_pdcch_symbols,int frame,uint8_t subframe, uint8_t beamforming_mode);
int adjust_G(LTE_DL_FRAME_PARMS *frame_parms,uint32_t *rb_alloc,uint8_t mod_order,uint8_t subframe);
int adjust_G2(LTE_DL_FRAME_PARMS *frame_parms,uint32_t *rb_alloc,uint8_t mod_order,uint8_t subframe,uint8_t symbol);
int adjust_G2(int Ncp, int frame_type, int N_RB_DL, uint32_t *rb_alloc,uint8_t mod_order,uint8_t subframe,uint8_t symbol);
#ifndef modOrder
+45 -1
View File
@@ -700,7 +700,51 @@ int find_ulsch(uint16_t rnti, PHY_VARS_eNB *eNB,find_type_t type);
int find_uci(uint16_t rnti, int frame, int subframe, PHY_VARS_eNB *eNB,find_type_t type);
uint32_t lte_gold_generic(uint32_t *x1, uint32_t *x2, uint8_t reset);
static inline uint32_t lte_gold_generic(uint32_t *x1, uint32_t *x2, uint8_t reset)
{
int32_t n;
// 3GPP 3x.211
// Nc = 1600
// c(n) = [x1(n+Nc) + x2(n+Nc)]mod2
// x1(n+31) = [x1(n+3) + x1(n)]mod2
// x2(n+31) = [x2(n+3) + x2(n+2) + x2(n+1) + x2(n)]mod2
if (reset)
{
// Init value for x1: x1(0) = 1, x1(n) = 0, n=1,2,...,30
// x1(31) = [x1(3) + x1(0)]mod2 = 1
*x1 = 1 + (1U<<31);
// Init value for x2: cinit = sum_{i=0}^30 x2*2^i
// x2(31) = [x2(3) + x2(2) + x2(1) + x2(0)]mod2
// = (*x2>>3) ^ (*x2>>2) + (*x2>>1) + *x2
*x2 = *x2 ^ ((*x2 ^ (*x2>>1) ^ (*x2>>2) ^ (*x2>>3))<<31);
// x1 and x2 contain bits n = 0,1,...,31
// Nc = 1600 bits are skipped at the beginning
// i.e., 1600 / 32 = 50 32bit words
for (n = 1; n < 50; n++)
{
// Compute x1(0),...,x1(27)
*x1 = (*x1>>1) ^ (*x1>>4);
// Compute x1(28),..,x1(31) and xor
*x1 = *x1 ^ (*x1<<31) ^ (*x1<<28);
// Compute x2(0),...,x2(27)
*x2 = (*x2>>1) ^ (*x2>>2) ^ (*x2>>3) ^ (*x2>>4);
// Compute x2(28),..,x2(31) and xor
*x2 = *x2 ^ (*x2<<31) ^ (*x2<<30) ^ (*x2<<29) ^ (*x2<<28);
}
}
*x1 = (*x1>>1) ^ (*x1>>4);
*x1 = *x1 ^ (*x1<<31) ^ (*x1<<28);
*x2 = (*x2>>1) ^ (*x2>>2) ^ (*x2>>3) ^ (*x2>>4);
*x2 = *x2 ^ (*x2<<31) ^ (*x2<<30) ^ (*x2<<29) ^ (*x2<<28);
// c(n) = [x1(n+Nc) + x2(n+Nc)]mod2
return(*x1^*x2);
}
/**@}*/
+1 -1
View File
@@ -1293,7 +1293,7 @@ void compute_llr_offset(LTE_DL_FRAME_PARMS *frame_parms,
}
granted_re = nb_rb_alloc * (12-crs_re);
pbch_pss_sss_re = adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,dlsch0_harq->Qm,subframe,symbol);
pbch_pss_sss_re = adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,dlsch0_harq->Qm,subframe,symbol);
pbch_pss_sss_re = (double)pbch_pss_sss_re * ((double)(12-crs_re)/12);
data_re = granted_re - pbch_pss_sss_re;
llr_offset = data_re * dlsch0_harq->Qm * 2;
@@ -370,7 +370,7 @@ int rx_pdsch(PHY_VARS_UE *ue,
#if UE_TIMING_TRACE
stop_meas(&ue->generic_stat_bis[ue->current_thread_id[subframe]][slot]);
LOG_I(PHY, "[AbsSFN %d.%d] Slot%d Symbol %d Flag %d type %d: Pilot/Data extraction %5.2f \n",frame,subframe,slot,symbol,
LOG_D(PHY, "[AbsSFN %d.%d] Slot%d Symbol %d Flag %d type %d: Pilot/Data extraction %5.2f \n",frame,subframe,slot,symbol,
ue->high_speed_flag,type,ue->generic_stat_bis[ue->current_thread_id[subframe]][slot].p_time/(cpuf*1000.0));
#endif
#if UE_TIMING_TRACE
@@ -398,7 +398,7 @@ int rx_pdsch(PHY_VARS_UE *ue,
#if UE_TIMING_TRACE
stop_meas(&ue->generic_stat_bis[ue->current_thread_id[subframe]][slot]);
LOG_I(PHY, "[AbsSFN %d.%d] Slot%d Symbol %d: Channel Scale %5.2f \n",frame,subframe,slot,symbol,ue->generic_stat_bis[ue->current_thread_id[subframe]][slot].p_time/(cpuf*1000.0));
LOG_D(PHY, "[AbsSFN %d.%d] Slot%d Symbol %d: Channel Scale %5.2f \n",frame,subframe,slot,symbol,ue->generic_stat_bis[ue->current_thread_id[subframe]][slot].p_time/(cpuf*1000.0));
start_meas(&ue->generic_stat_bis[ue->current_thread_id[subframe]][slot]);
#endif
@@ -507,7 +507,7 @@ int rx_pdsch(PHY_VARS_UE *ue,
#endif
#if UE_TIMING_TRACE
stop_meas(&ue->generic_stat_bis[ue->current_thread_id[subframe]][slot]);
LOG_I(PHY, "[AbsSFN %d.%d] Slot%d Symbol %d first_symbol_flag %d: Channel Level %5.2f \n",frame,subframe,slot,symbol,first_symbol_flag,
LOG_D(PHY, "[AbsSFN %d.%d] Slot%d Symbol %d first_symbol_flag %d: Channel Level %5.2f \n",frame,subframe,slot,symbol,first_symbol_flag,
ue->generic_stat_bis[ue->current_thread_id[subframe]][slot].p_time/(cpuf*1000.0));
start_meas(&ue->generic_stat_bis[ue->current_thread_id[subframe]][slot]);
#endif
@@ -731,7 +731,7 @@ int rx_pdsch(PHY_VARS_UE *ue,
#if UE_TIMING_TRACE
stop_meas(&ue->generic_stat_bis[ue->current_thread_id[subframe]][slot]);
LOG_I(PHY, "[AbsSFN %d.%d] Slot%d Symbol %d log2_maxh %d Channel Comp %5.2f \n",frame,subframe,slot,symbol,pdsch_vars[eNB_id]->log2_maxh,
LOG_D(PHY, "[AbsSFN %d.%d] Slot%d Symbol %d log2_maxh %d Channel Comp %5.2f \n",frame,subframe,slot,symbol,pdsch_vars[eNB_id]->log2_maxh,
ue->generic_stat_bis[ue->current_thread_id[subframe]][slot].p_time/(cpuf*1000.0));
start_meas(&ue->generic_stat_bis[ue->current_thread_id[subframe]][slot]);
#endif
@@ -805,7 +805,7 @@ int rx_pdsch(PHY_VARS_UE *ue,
#if UE_TIMING_TRACE
stop_meas(&ue->generic_stat_bis[ue->current_thread_id[subframe]][slot]);
LOG_I(PHY, "[AbsSFN %d.%d] Slot%d Symbol %d: Channel Combine %5.2f \n",frame,subframe,slot,symbol,ue->generic_stat_bis[ue->current_thread_id[subframe]][slot].p_time/(cpuf*1000.0));
LOG_D(PHY, "[AbsSFN %d.%d] Slot%d Symbol %d: Channel Combine %5.2f \n",frame,subframe,slot,symbol,ue->generic_stat_bis[ue->current_thread_id[subframe]][slot].p_time/(cpuf*1000.0));
start_meas(&ue->generic_stat_bis[ue->current_thread_id[subframe]][slot]);
#endif
//printf("LLR dlsch0_harq->Qm %d rx_type %d cw0 %d cw1 %d symbol %d \n",dlsch0_harq->Qm,rx_type,codeword_TB0,codeword_TB1,symbol);
@@ -837,7 +837,7 @@ int rx_pdsch(PHY_VARS_UE *ue,
symbol,
first_symbol_flag,
nb_rb,
adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,2,subframe,symbol),
adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,2,subframe,symbol),
beamforming_mode);
} else if (codeword_TB0 == -1) {
dlsch_qpsk_llr(frame_parms,
@@ -846,7 +846,7 @@ int rx_pdsch(PHY_VARS_UE *ue,
symbol,
first_symbol_flag,
nb_rb,
adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,2,subframe,symbol),
adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,2,subframe,symbol),
beamforming_mode);
} else if (rx_type >= rx_IC_single_stream) {
if (dlsch1_harq->Qm == 2) {
@@ -856,7 +856,7 @@ int rx_pdsch(PHY_VARS_UE *ue,
pdsch_vars[eNB_id]->dl_ch_rho2_ext,
pdsch_vars[eNB_id]->llr[0],
symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,2,subframe,symbol),
adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,2,subframe,symbol),
pdsch_vars[eNB_id]->llr128);
if (rx_type==rx_IC_dual_stream) {
@@ -866,7 +866,7 @@ int rx_pdsch(PHY_VARS_UE *ue,
pdsch_vars[eNB_id]->dl_ch_rho_ext[harq_pid][round],
pdsch_vars[eNB_id]->llr[1],
symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch1_harq->rb_alloc_even,2,subframe,symbol),
adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch1_harq->rb_alloc_even,2,subframe,symbol),
pdsch_vars[eNB_id]->llr128_2ndstream);
}
} else if (dlsch1_harq->Qm == 4) {
@@ -877,7 +877,7 @@ int rx_pdsch(PHY_VARS_UE *ue,
pdsch_vars[eNB_id]->dl_ch_rho2_ext,
pdsch_vars[eNB_id]->llr[0],
symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,2,subframe,symbol),
adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,2,subframe,symbol),
pdsch_vars[eNB_id]->llr128);
if (rx_type==rx_IC_dual_stream) {
@@ -888,7 +888,7 @@ int rx_pdsch(PHY_VARS_UE *ue,
pdsch_vars[eNB_id]->dl_ch_rho_ext[harq_pid][round],
pdsch_vars[eNB_id]->llr[1],
symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch1_harq->rb_alloc_even,4,subframe,symbol),
adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch1_harq->rb_alloc_even,4,subframe,symbol),
pdsch_vars[eNB_id]->llr128_2ndstream);
}
} else {
@@ -899,7 +899,7 @@ int rx_pdsch(PHY_VARS_UE *ue,
pdsch_vars[eNB_id]->dl_ch_rho2_ext,
pdsch_vars[eNB_id]->llr[0],
symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,2,subframe,symbol),
adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,2,subframe,symbol),
pdsch_vars[eNB_id]->llr128);
if (rx_type==rx_IC_dual_stream) {
@@ -910,7 +910,7 @@ int rx_pdsch(PHY_VARS_UE *ue,
pdsch_vars[eNB_id]->dl_ch_rho_ext[harq_pid][round],
pdsch_vars[eNB_id]->llr[1],
symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch1_harq->rb_alloc_even,6,subframe,symbol),
adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch1_harq->rb_alloc_even,6,subframe,symbol),
pdsch_vars[eNB_id]->llr128_2ndstream);
}
}
@@ -925,7 +925,7 @@ int rx_pdsch(PHY_VARS_UE *ue,
pdsch_vars[eNB_id]->llr[0],
pdsch_vars[eNB_id]->dl_ch_mag0,
symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,4,subframe,symbol),
adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,4,subframe,symbol),
pdsch_vars[eNB_id]->llr128,
beamforming_mode);
} else if (codeword_TB0 == -1) {
@@ -934,7 +934,7 @@ int rx_pdsch(PHY_VARS_UE *ue,
pdsch_vars[eNB_id]->llr[1],
pdsch_vars[eNB_id]->dl_ch_mag0,
symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,4,subframe,symbol),
adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,4,subframe,symbol),
pdsch_vars[eNB_id]->llr128_2ndstream,
beamforming_mode);
} else if (rx_type >= rx_IC_single_stream) {
@@ -946,7 +946,7 @@ int rx_pdsch(PHY_VARS_UE *ue,
pdsch_vars[eNB_id]->dl_ch_rho2_ext,
pdsch_vars[eNB_id]->llr[0],
symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,4,subframe,symbol),
adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,4,subframe,symbol),
pdsch_vars[eNB_id]->llr128);
if (rx_type==rx_IC_dual_stream) {
@@ -957,7 +957,7 @@ int rx_pdsch(PHY_VARS_UE *ue,
pdsch_vars[eNB_id]->dl_ch_rho_ext[harq_pid][round],
pdsch_vars[eNB_id]->llr[1],
symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch1_harq->rb_alloc_even,2,subframe,symbol),
adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch1_harq->rb_alloc_even,2,subframe,symbol),
pdsch_vars[eNB_id]->llr128_2ndstream);
}
} else if (dlsch1_harq->Qm == 4) {
@@ -969,7 +969,7 @@ int rx_pdsch(PHY_VARS_UE *ue,
pdsch_vars[eNB_id]->dl_ch_rho2_ext,
pdsch_vars[eNB_id]->llr[0],
symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,4,subframe,symbol),
adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,4,subframe,symbol),
pdsch_vars[eNB_id]->llr128);
if (rx_type==rx_IC_dual_stream) {
@@ -981,7 +981,7 @@ int rx_pdsch(PHY_VARS_UE *ue,
pdsch_vars[eNB_id]->dl_ch_rho_ext[harq_pid][round],
pdsch_vars[eNB_id]->llr[1],
symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch1_harq->rb_alloc_even,4,subframe,symbol),
adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch1_harq->rb_alloc_even,4,subframe,symbol),
pdsch_vars[eNB_id]->llr128_2ndstream);
}
} else {
@@ -993,7 +993,7 @@ int rx_pdsch(PHY_VARS_UE *ue,
pdsch_vars[eNB_id]->dl_ch_rho2_ext,
pdsch_vars[eNB_id]->llr[0],
symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,4,subframe,symbol),
adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,4,subframe,symbol),
pdsch_vars[eNB_id]->llr128);
if (rx_type==rx_IC_dual_stream) {
@@ -1005,7 +1005,7 @@ int rx_pdsch(PHY_VARS_UE *ue,
pdsch_vars[eNB_id]->dl_ch_rho_ext[harq_pid][round],
pdsch_vars[eNB_id]->llr[1],
symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch1_harq->rb_alloc_even,6,subframe,symbol),
adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch1_harq->rb_alloc_even,6,subframe,symbol),
pdsch_vars[eNB_id]->llr128_2ndstream);
}
}
@@ -1021,7 +1021,7 @@ int rx_pdsch(PHY_VARS_UE *ue,
pdsch_vars[eNB_id]->dl_ch_mag0,
pdsch_vars[eNB_id]->dl_ch_magb0,
symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,6,subframe,symbol),
adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,6,subframe,symbol),
pdsch_vars[eNB_id]->llr_offset[symbol],
beamforming_mode);
} else if (codeword_TB0 == -1) {
@@ -1031,7 +1031,7 @@ int rx_pdsch(PHY_VARS_UE *ue,
pdsch_vars[eNB_id]->dl_ch_mag0,
pdsch_vars[eNB_id]->dl_ch_magb0,
symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,6,subframe,symbol),
adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,6,subframe,symbol),
pdsch_vars[eNB_id]->llr_offset[symbol],
beamforming_mode);
} else if (rx_type >= rx_IC_single_stream) {
@@ -1043,7 +1043,7 @@ int rx_pdsch(PHY_VARS_UE *ue,
pdsch_vars[eNB_id]->dl_ch_rho2_ext,
pdsch_vars[eNB_id]->llr[0],
symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,6,subframe,symbol),
adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,6,subframe,symbol),
pdsch_vars[eNB_id]->llr128);
if (rx_type==rx_IC_dual_stream) {
@@ -1054,7 +1054,7 @@ int rx_pdsch(PHY_VARS_UE *ue,
pdsch_vars[eNB_id]->dl_ch_rho_ext[harq_pid][round],
pdsch_vars[eNB_id]->llr[1],
symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch1_harq->rb_alloc_even,2,subframe,symbol),
adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch1_harq->rb_alloc_even,2,subframe,symbol),
pdsch_vars[eNB_id]->llr128_2ndstream);
}
} else if (dlsch1_harq->Qm == 4) {
@@ -1066,7 +1066,7 @@ int rx_pdsch(PHY_VARS_UE *ue,
pdsch_vars[eNB_id]->dl_ch_rho2_ext,
pdsch_vars[eNB_id]->llr[0],
symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,6,subframe,symbol),
adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,6,subframe,symbol),
pdsch_vars[eNB_id]->llr128);
if (rx_type==rx_IC_dual_stream) {
@@ -1078,7 +1078,7 @@ int rx_pdsch(PHY_VARS_UE *ue,
pdsch_vars[eNB_id]->dl_ch_rho_ext[harq_pid][round],
pdsch_vars[eNB_id]->llr[1],
symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch1_harq->rb_alloc_even,4,subframe,symbol),
adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch1_harq->rb_alloc_even,4,subframe,symbol),
pdsch_vars[eNB_id]->llr128_2ndstream);
}
} else {
@@ -1090,7 +1090,7 @@ int rx_pdsch(PHY_VARS_UE *ue,
pdsch_vars[eNB_id]->dl_ch_rho2_ext,
(int16_t *)pllr_symbol_cw0,
symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,6,subframe,symbol),
adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,6,subframe,symbol),
pdsch_vars[eNB_id]->llr_offset[symbol]);
if (rx_type==rx_IC_dual_stream) {
@@ -1102,7 +1102,7 @@ int rx_pdsch(PHY_VARS_UE *ue,
pdsch_vars[eNB_id]->dl_ch_rho_ext[harq_pid][round],
(int16_t *)pllr_symbol_cw1,
symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch1_harq->rb_alloc_even,6,subframe,symbol),
adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch1_harq->rb_alloc_even,6,subframe,symbol),
pdsch_vars[eNB_id]->llr_offset[symbol]);
}
}
@@ -1124,7 +1124,7 @@ int rx_pdsch(PHY_VARS_UE *ue,
pdsch_vars[eNB_id]->rxdataF_comp0,
(int16_t *)pllr_symbol_cw0,
symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,2,subframe,symbol),
adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,2,subframe,symbol),
beamforming_mode);
}
@@ -1137,7 +1137,7 @@ int rx_pdsch(PHY_VARS_UE *ue,
pdsch_vars[eNB_id]->llr[0],
pdsch_vars[eNB_id]->dl_ch_mag0,
symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,4,subframe,symbol),
adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,4,subframe,symbol),
pdsch_vars[eNB_id]->llr128,
beamforming_mode);
}
@@ -1152,7 +1152,7 @@ int rx_pdsch(PHY_VARS_UE *ue,
pdsch_vars[eNB_id]->dl_ch_mag0,
pdsch_vars[eNB_id]->dl_ch_magb0,
symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,6,subframe,symbol),
adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,6,subframe,symbol),
pdsch_vars[eNB_id]->llr_offset[symbol],
beamforming_mode);
}
@@ -746,7 +746,7 @@ int32_t dlsch_qpsk_llr_SIC(LTE_DL_FRAME_PARMS *frame_parms,
amp_tmp=amp_tmp<<1; // to compensate for >> 1 shift in modulation
pbch_pss_sss_adjust=adjust_G2(frame_parms,&rb_alloc,2,subframe,symbol);
pbch_pss_sss_adjust=adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL ,&rb_alloc,2,subframe,symbol);
if ((symbol_mod==0) || (symbol_mod==(4-frame_parms->Ncp))) {
if (frame_parms->nb_antenna_ports_eNB!=1)
@@ -981,7 +981,7 @@ void dlsch_16qam_llr_SIC (LTE_DL_FRAME_PARMS *frame_parms,
symbol_mod = (symbol>=(7-frame_parms->Ncp)) ? symbol-(7-frame_parms->Ncp) : symbol;
pbch_pss_sss_adjust=adjust_G2(frame_parms,&rb_alloc,4,subframe,symbol);
pbch_pss_sss_adjust=adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,&rb_alloc,4,subframe,symbol);
if ((symbol_mod==0) || (symbol_mod==(4-frame_parms->Ncp))) {
amp_tmp=0x1fff;//dlsch0->sqrt_rho_b; already taken into account
@@ -1281,7 +1281,7 @@ void dlsch_64qam_llr_SIC(LTE_DL_FRAME_PARMS *frame_parms,
symbol_mod = (symbol>=(7-frame_parms->Ncp)) ? symbol-(7-frame_parms->Ncp) : symbol;
pbch_pss_sss_adjust=adjust_G2(frame_parms,&rb_alloc,6,subframe,symbol);
pbch_pss_sss_adjust=adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,&rb_alloc,6,subframe,symbol);
if ((symbol_mod==0) || (symbol_mod==(4-frame_parms->Ncp))) {
amp_tmp = 0x1fff;//dlsch0->sqrt_rho_b; already taken into account
+5 -7
View File
@@ -44,15 +44,13 @@ void pcfich_unscrambling(LTE_DL_FRAME_PARMS *frame_parms,
int16_t *d)
{
uint32_t i;
uint8_t reset;
uint32_t x1, x2, s=0;
uint8_t reset = 1;
uint32_t x1 = 0; // x1 is set in lte_gold_generic
uint32_t s = 0;
reset = 1;
// x1 is set in lte_gold_generic
x2 = ((((2*frame_parms->Nid_cell)+1)*(1+subframe))<<9) + frame_parms->Nid_cell; //this is c_init in 36.211 Sec 6.7.1
uint32_t x2 = ((((2*frame_parms->Nid_cell)+1)*(1+subframe))<<9) + frame_parms->Nid_cell; //this is c_init in 36.211 Sec 6.7.1
for (i=0; i<32; i++) {
for (uint32_t i=0; i<32; i++) {
if ((i&0x1f)==0) {
s = lte_gold_generic(&x1, &x2, reset);
//printf("lte_gold[%d]=%x\n",i,s);
+2 -2
View File
@@ -336,8 +336,8 @@ void generate_pucch1x(int32_t **txdataF,
inline void pucch2x_scrambling(LTE_DL_FRAME_PARMS *fp,int subframe,uint16_t rnti,uint32_t B,uint8_t *btilde) __attribute__((always_inline));
inline void pucch2x_scrambling(LTE_DL_FRAME_PARMS *fp,int subframe,uint16_t rnti,uint32_t B,uint8_t *btilde) {
static inline void pucch2x_scrambling(LTE_DL_FRAME_PARMS *fp,int subframe,uint16_t rnti,uint32_t B,uint8_t *btilde) __attribute__((always_inline));
static inline void pucch2x_scrambling(LTE_DL_FRAME_PARMS *fp,int subframe,uint16_t rnti,uint32_t B,uint8_t *btilde) {
uint32_t x1, x2, s=0;
int i;
@@ -1303,7 +1303,7 @@ uint32_t conv_nprb(uint8_t ra_header,uint32_t rb_alloc,int N_RB_DL);
int get_G(LTE_DL_FRAME_PARMS *frame_parms,uint16_t nb_rb,uint32_t *rb_alloc,uint8_t mod_order,uint8_t Nl,uint8_t num_pdcch_symbols,int frame,uint8_t subframe, uint8_t beamforming_mode);
int adjust_G(LTE_DL_FRAME_PARMS *frame_parms,uint32_t *rb_alloc,uint8_t mod_order,uint8_t subframe);
int adjust_G2(LTE_DL_FRAME_PARMS *frame_parms,uint32_t *rb_alloc,uint8_t mod_order,uint8_t subframe,uint8_t symbol);
#ifndef modOrder
@@ -36,10 +36,46 @@
//#define DEBUG_CH
//#define DEBUG_PUSCH
//#define SRS_DEBUG
#define NO_INTERP 1
#define dBc(x,y) (dB_fixed(((int32_t)(x))*(x) + ((int32_t)(y))*(y)))
void freq2time(uint16_t ofdm_symbol_size,
int16_t *freq_signal,
int16_t *time_signal) {
switch (ofdm_symbol_size) {
case 128:
idft(IDFT_128, freq_signal, time_signal, 1);
break;
case 256:
idft(IDFT_256, freq_signal, time_signal, 1);
break;
case 512:
idft(IDFT_512, freq_signal, time_signal, 1);
break;
case 1024:
idft(IDFT_1024, freq_signal, time_signal, 1);
break;
case 1536:
idft(IDFT_1536, freq_signal, time_signal, 1);
break;
case 2048:
idft(IDFT_2048, freq_signal, time_signal, 1);
break;
case 4096:
idft(IDFT_4096, freq_signal, time_signal, 1);
break;
case 8192:
idft(IDFT_8192, freq_signal, time_signal, 1);
break;
default:
idft(IDFT_512, freq_signal, time_signal, 1);
break;
}
}
int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
unsigned char Ns,
unsigned short p,
@@ -273,10 +309,10 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
ch,
ul_ch,
8);
//for (int i= 0; i<16; i++)
//printf("ul_ch addr %p %d\n", ul_ch+i, *(ul_ch+i));
pil += 2;
re_offset = (re_offset+2) % gNB->frame_parms.ofdm_symbol_size;
rxF = (int16_t *)&rxdataF[aarx][(soffset+symbol_offset+nushift+re_offset)];
@@ -898,63 +934,9 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
#endif
// Convert to time domain
switch (gNB->frame_parms.ofdm_symbol_size) {
case 128:
idft(IDFT_128,(int16_t*) &ul_ch_estimates[aarx][symbol_offset],
(int16_t*) ul_ch_estimates_time[aarx],
1);
break;
case 256:
idft(IDFT_256,(int16_t*) &ul_ch_estimates[aarx][symbol_offset],
(int16_t*) ul_ch_estimates_time[aarx],
1);
break;
case 512:
idft(IDFT_512,(int16_t*) &ul_ch_estimates[aarx][symbol_offset],
(int16_t*) ul_ch_estimates_time[aarx],
1);
break;
case 1024:
idft(IDFT_1024,(int16_t*) &ul_ch_estimates[aarx][symbol_offset],
(int16_t*) ul_ch_estimates_time[aarx],
1);
break;
case 1536:
idft(IDFT_1536,(int16_t*) &ul_ch_estimates[aarx][symbol_offset],
(int16_t*) ul_ch_estimates_time[aarx],
1);
break;
case 2048:
idft(IDFT_2048,(int16_t*) &ul_ch_estimates[aarx][symbol_offset],
(int16_t*) ul_ch_estimates_time[aarx],
1);
break;
case 4096:
idft(IDFT_4096,(int16_t*) &ul_ch_estimates[aarx][symbol_offset],
(int16_t*) ul_ch_estimates_time[aarx],
1);
break;
case 8192:
idft(IDFT_8192,(int16_t*) &ul_ch_estimates[aarx][symbol_offset],
(int16_t*) ul_ch_estimates_time[aarx],
1);
break;
default:
idft(IDFT_512,(int16_t*) &ul_ch_estimates[aarx][symbol_offset],
(int16_t*) ul_ch_estimates_time[aarx],
1);
break;
}
freq2time(gNB->frame_parms.ofdm_symbol_size,
(int16_t*) &ul_ch_estimates[aarx][symbol_offset],
(int16_t*) ul_ch_estimates_time[aarx]);
}
#ifdef DEBUG_CH
@@ -1091,3 +1073,178 @@ void nr_pusch_ptrs_processing(PHY_VARS_gNB *gNB,
}// last symbol check
}//Antenna loop
}
uint32_t calc_power(uint16_t *x, uint32_t size) {
uint64_t sum_x = 0;
uint64_t sum_x2 = 0;
for(int k = 0; k<size; k++) {
sum_x = sum_x + x[k];
sum_x2 = sum_x2 + x[k]*x[k];
}
return sum_x2/size - (sum_x/size)*(sum_x/size);
}
int nr_srs_channel_estimation(PHY_VARS_gNB *gNB,
int frame,
int slot,
nfapi_nr_srs_pdu_t *srs_pdu,
nr_srs_info_t *nr_srs_info,
int32_t *srs_generated_signal,
int32_t **srs_received_signal,
int32_t **srs_estimated_channel_freq,
int32_t **srs_estimated_channel_time,
int32_t **srs_estimated_channel_time_shifted,
uint32_t *noise_power) {
if(nr_srs_info->sc_list_length == 0) {
LOG_E(NR_PHY, "(%d.%d) nr_srs_info was not generated yet!\n", frame, slot);
return -1;
}
NR_DL_FRAME_PARMS *frame_parms = &gNB->frame_parms;
int32_t **srs_ls_estimated_channel = nr_srs_info->srs_ls_estimated_channel;
uint16_t noise_real[frame_parms->nb_antennas_rx*nr_srs_info->sc_list_length];
uint16_t noise_imag[frame_parms->nb_antennas_rx*nr_srs_info->sc_list_length];
int16_t ls_estimated[2];
for (int ant = 0; ant < frame_parms->nb_antennas_rx; ant++) {
memset(srs_ls_estimated_channel[ant], 0, frame_parms->ofdm_symbol_size*(1<<srs_pdu->num_symbols)*sizeof(int32_t));
memset(srs_estimated_channel_freq[ant], 0, frame_parms->ofdm_symbol_size*(1<<srs_pdu->num_symbols)*sizeof(int32_t));
int16_t *srs_estimated_channel16 = (int16_t *)&srs_estimated_channel_freq[ant][nr_srs_info->sc_list[0]];
for(int sc_idx = 0; sc_idx < nr_srs_info->sc_list_length; sc_idx++) {
int16_t generated_real = srs_generated_signal[nr_srs_info->sc_list[sc_idx]] & 0xFFFF;
int16_t generated_imag = (srs_generated_signal[nr_srs_info->sc_list[sc_idx]] >> 16) & 0xFFFF;
int16_t received_real = srs_received_signal[ant][nr_srs_info->sc_list[sc_idx]] & 0xFFFF;
int16_t received_imag = (srs_received_signal[ant][nr_srs_info->sc_list[sc_idx]] >> 16) & 0xFFFF;
// We know that nr_srs_info->srs_generated_signal_bits bits are enough to represent the generated_real and generated_imag.
// So we only need a nr_srs_info->srs_generated_signal_bits shift to ensure that the result fits into 16 bits.
ls_estimated[0] = (int16_t)(((int32_t)generated_real*received_real + (int32_t)generated_imag*received_imag)>>nr_srs_info->srs_generated_signal_bits);
ls_estimated[1] = (int16_t)(((int32_t)generated_real*received_imag - (int32_t)generated_imag*received_real)>>nr_srs_info->srs_generated_signal_bits);
srs_ls_estimated_channel[ant][nr_srs_info->sc_list[sc_idx]] = ls_estimated[0] + (((int32_t)ls_estimated[1] << 16) & 0xFFFF0000);
// Channel interpolation
if(srs_pdu->comb_size == 0) {
if(sc_idx == 0) { // First subcarrier case
// filt8_start is {12288,8192,4096,0,0,0,0,0}
multadd_real_vector_complex_scalar(filt8_start, ls_estimated, srs_estimated_channel16, 8);
} else if(nr_srs_info->sc_list[sc_idx] < nr_srs_info->sc_list[sc_idx - 1]) { // Start of OFDM symbol case
// filt8_start is {12288,8192,4096,0,0,0,0,0}
srs_estimated_channel16 = (int16_t *)&srs_estimated_channel_freq[ant][nr_srs_info->sc_list[sc_idx + 2]] - sizeof(uint64_t);
multadd_real_vector_complex_scalar(filt8_start, ls_estimated, srs_estimated_channel16, 8);
} else if((sc_idx < (nr_srs_info->sc_list_length - 1) && nr_srs_info->sc_list[sc_idx + 1] < nr_srs_info->sc_list[sc_idx])
|| (sc_idx == (nr_srs_info->sc_list_length - 1))) { // End of OFDM symbol or last subcarrier cases
// filt8_end is {4096,8192,12288,16384,0,0,0,0}
multadd_real_vector_complex_scalar(filt8_end, ls_estimated, srs_estimated_channel16, 8);
} else if(sc_idx%2 == 1) { // 1st middle case
// filt8_middle2 is {4096,8192,8192,8192,4096,0,0,0}
multadd_real_vector_complex_scalar(filt8_middle2, ls_estimated, srs_estimated_channel16, 8);
} else if(sc_idx%2 == 0) { // 2nd middle case
// filt8_middle4 is {0,0,4096,8192,8192,8192,4096,0}
multadd_real_vector_complex_scalar(filt8_middle4, ls_estimated, srs_estimated_channel16, 8);
srs_estimated_channel16 = (int16_t *)&srs_estimated_channel_freq[ant][nr_srs_info->sc_list[sc_idx]];
}
} else {
if(sc_idx == 0) { // First subcarrier case
// filt16_start is {12288,8192,8192,8192,4096,0,0,0,0,0,0,0,0,0,0,0}
multadd_real_vector_complex_scalar(filt16_start, ls_estimated, srs_estimated_channel16, 16);
} else if(nr_srs_info->sc_list[sc_idx] < nr_srs_info->sc_list[sc_idx - 1]) { // Start of OFDM symbol case
srs_estimated_channel16 = (int16_t *)&srs_estimated_channel_freq[ant][nr_srs_info->sc_list[sc_idx + 1]] - sizeof(uint64_t);
// filt16_start is {12288,8192,8192,8192,4096,0,0,0,0,0,0,0,0,0,0,0}
multadd_real_vector_complex_scalar(filt16_start, ls_estimated, srs_estimated_channel16, 16);
} else if((sc_idx < (nr_srs_info->sc_list_length - 1) && nr_srs_info->sc_list[sc_idx + 1] < nr_srs_info->sc_list[sc_idx])
|| (sc_idx == (nr_srs_info->sc_list_length - 1))) { // End of OFDM symbol or last subcarrier cases
// filt16_end is {4096,8192,8192,8192,12288,16384,16384,16384,0,0,0,0,0,0,0,0}
multadd_real_vector_complex_scalar(filt16_end, ls_estimated, srs_estimated_channel16, 16);
} else { // Middle case
// filt16_middle4 is {4096,8192,8192,8192,8192,8192,8192,8192,4096,0,0,0,0,0,0,0}
multadd_real_vector_complex_scalar(filt16_middle4, ls_estimated, srs_estimated_channel16, 16);
srs_estimated_channel16 = (int16_t *)&srs_estimated_channel_freq[ant][nr_srs_info->sc_list[sc_idx]];
}
}
#ifdef SRS_DEBUG
uint64_t subcarrier_offset = frame_parms->first_carrier_offset + srs_pdu->bwp_start*12;
int subcarrier_log = nr_srs_info->sc_list[sc_idx]-subcarrier_offset;
if(subcarrier_log < 0) {
subcarrier_log = subcarrier_log + frame_parms->ofdm_symbol_size;
}
if(sc_idx == 0) {
LOG_I(NR_PHY,"______________________________ Rx antenna %i _______________________________\n", ant);
}
if(subcarrier_log%12 == 0) {
LOG_I(NR_PHY,":::::::::::::::::::::::::::::::::::: %i ::::::::::::::::::::::::::::::::::::\n", subcarrier_log/12);
LOG_I(NR_PHY,"\t __genRe________genIm__|____rxRe_________rxIm__|____lsRe________lsIm_\n");
}
LOG_I(NR_PHY,"(%4i) %6i\t%6i | %6i\t%6i | %6i\t%6i\n",
subcarrier_log,
generated_real, generated_imag,
received_real, received_imag,
ls_estimated[0], ls_estimated[1]);
#endif
}
// Compute noise
for(int sc_idx = 0; sc_idx < nr_srs_info->sc_list_length; sc_idx++) {
noise_real[ant*nr_srs_info->sc_list_length + sc_idx] = abs((int16_t)((srs_ls_estimated_channel[ant][nr_srs_info->sc_list[sc_idx]]-srs_estimated_channel_freq[ant][nr_srs_info->sc_list[sc_idx]]) & 0xFFFF));
noise_imag[ant*nr_srs_info->sc_list_length + sc_idx] = abs((int16_t)(((srs_ls_estimated_channel[ant][nr_srs_info->sc_list[sc_idx]]-srs_estimated_channel_freq[ant][nr_srs_info->sc_list[sc_idx]]) >> 16) & 0xFFFF));
}
// Convert to time domain
freq2time(gNB->frame_parms.ofdm_symbol_size,
(int16_t*) srs_estimated_channel_freq[ant],
(int16_t*) srs_estimated_channel_time[ant]);
memcpy(&srs_estimated_channel_time_shifted[ant][0],
&srs_estimated_channel_time[ant][gNB->frame_parms.ofdm_symbol_size>>1],
(gNB->frame_parms.ofdm_symbol_size>>1)*sizeof(int32_t));
memcpy(&srs_estimated_channel_time_shifted[ant][gNB->frame_parms.ofdm_symbol_size>>1],
&srs_estimated_channel_time[ant][0],
(gNB->frame_parms.ofdm_symbol_size>>1)*sizeof(int32_t));
}
*noise_power = calc_power(noise_real,frame_parms->nb_antennas_rx*nr_srs_info->sc_list_length)
+ calc_power(noise_imag,frame_parms->nb_antennas_rx*nr_srs_info->sc_list_length);
#ifdef SRS_DEBUG
uint64_t subcarrier_offset = frame_parms->first_carrier_offset + srs_pdu->bwp_start*12;
uint8_t R = srs_pdu->comb_size == 0 ? 2 : 4;
for (int ant = 0; ant < frame_parms->nb_antennas_rx; ant++) {
for(int sc_idx = 0; sc_idx < nr_srs_info->sc_list_length; sc_idx++) {
int subcarrier_log = nr_srs_info->sc_list[sc_idx]-subcarrier_offset;
if(subcarrier_log < 0) {
subcarrier_log = subcarrier_log + frame_parms->ofdm_symbol_size;
}
if(sc_idx == 0) {
LOG_I(NR_PHY,"______________________________ Rx antenna %i _______________________________\n", ant);
}
if(subcarrier_log%12 == 0) {
LOG_I(NR_PHY,":::::::::::::::::::::::::::::::::::: %i ::::::::::::::::::::::::::::::::::::\n", subcarrier_log/12);
LOG_I(NR_PHY,"\t __lsRe__________lsIm__|____intRe_______intIm__|____noiRe_______noiIm_\n");
}
for(int r = 0; r<R; r++) {
LOG_I(NR_PHY,"(%4i) %6i\t%6i | %6i\t%6i | %6i\t%6i\n",
subcarrier_log+r,
(int16_t)(srs_ls_estimated_channel[ant][nr_srs_info->sc_list[sc_idx]+r]&0xFFFF),
(int16_t)((srs_ls_estimated_channel[ant][nr_srs_info->sc_list[sc_idx]+r]>>16)&0xFFFF),
(int16_t)(srs_estimated_channel_freq[ant][nr_srs_info->sc_list[sc_idx]+r]&0xFFFF),
(int16_t)((srs_estimated_channel_freq[ant][nr_srs_info->sc_list[sc_idx]+r]>>16)&0xFFFF),
noise_real[ant*nr_srs_info->sc_list_length+sc_idx],
noise_imag[ant*nr_srs_info->sc_list_length+sc_idx]);
}
}
}
LOG_I(NR_PHY,"noise_power = %u\n", *noise_power);
#endif
return 0;
}
@@ -62,4 +62,16 @@ void nr_pusch_ptrs_processing(PHY_VARS_gNB *gNB,
uint8_t nr_tti_rx,
unsigned char symbol,
uint32_t nb_re_pusch);
int nr_srs_channel_estimation(PHY_VARS_gNB *gNB,
int frame,
int slot,
nfapi_nr_srs_pdu_t *srs_pdu,
nr_srs_info_t *nr_srs_info,
int32_t *srs_generated_signal,
int32_t **srs_received_signal,
int32_t **srs_estimated_channel_freq,
int32_t **srs_estimated_channel_time,
int32_t **srs_estimated_channel_time_shifted,
uint32_t *noise_power);
#endif
+22 -16
View File
@@ -105,14 +105,18 @@ void set_ptrs_symb_idx(uint16_t *ptrs_symbols,
uint8_t L_ptrs,
uint16_t ul_dmrs_symb_pos) {
uint8_t i = 0, last_symbol, is_dmrs_symbol, l_ref;
int8_t l_counter;
l_ref = start_symbol;
last_symbol = start_symbol + duration_in_symbols - 1;
int i = 0;
int l_ref = start_symbol;
const int last_symbol = start_symbol + duration_in_symbols - 1;
if (L_ptrs==0) {
LOG_E(PHY,"bug: impossible L_ptrs\n");
*ptrs_symbols = 0;
return;
}
while ( (l_ref + i*L_ptrs) <= last_symbol) {
is_dmrs_symbol = 0;
int is_dmrs_symbol = 0, l_counter;
for(l_counter = l_ref + i*L_ptrs; l_counter >= max(l_ref + (i-1)*L_ptrs + 1, l_ref); l_counter--) {
@@ -259,9 +263,13 @@ void nr_ptrs_cpe_estimation(uint8_t K_ptrs,
uint16_t re_cnt = 0;
uint16_t cnt = 0;
unsigned short nb_re_pdsch = NR_NB_SC_PER_RB * nb_rb;
if (K_ptrs==0) {
LOG_E(PHY,"K_ptrs == 0\n");
return;
}
uint16_t sc_per_symbol = (nb_rb + K_ptrs - 1)/K_ptrs;
int16_t *ptrs_p = (int16_t *)malloc(sizeof(int32_t)*(sc_per_symbol));
int16_t *dmrs_comp_p = (int16_t *)malloc(sizeof(int32_t)*(sc_per_symbol));
struct complex16 ptrs_p[(1 + sc_per_symbol/4)*4];
struct complex16 dmrs_comp_p[(1 + sc_per_symbol/4)*4];
double abs = 0.0;
double real = 0.0;
double imag = 0.0;
@@ -269,7 +277,7 @@ void nr_ptrs_cpe_estimation(uint8_t K_ptrs,
double alpha = 0;
#endif
/* generate PTRS RE for the symbol */
nr_gen_ref_conj_symbols(gold_seq,sc_per_symbol*2,ptrs_p, NR_MOD_TABLE_QPSK_OFFSET,2);// 2 for QPSK
nr_gen_ref_conj_symbols(gold_seq,sc_per_symbol*2,(int16_t*)ptrs_p, NR_MOD_TABLE_QPSK_OFFSET,2);// 2 for QPSK
/* loop over all sub carriers to get compensated RE on ptrs symbols*/
for (int re = 0; re < nb_re_pdsch; re++) {
@@ -283,8 +291,8 @@ void nr_ptrs_cpe_estimation(uint8_t K_ptrs,
0,// start_re is 0 here
ofdm_symbol_size);
if(is_ptrs_re) {
dmrs_comp_p[re_cnt*2] = rxF_comp[re *2];
dmrs_comp_p[(re_cnt*2)+1] = rxF_comp[(re *2)+1];
dmrs_comp_p[re_cnt].r = rxF_comp[re *2];
dmrs_comp_p[re_cnt].i = rxF_comp[(re *2)+1];
re_cnt++;
}
else {
@@ -298,7 +306,7 @@ void nr_ptrs_cpe_estimation(uint8_t K_ptrs,
*ptrs_sc = re_cnt;
/*Multiple compensated data with conj of PTRS */
mult_cpx_vector(dmrs_comp_p, ptrs_p, ptrs_ch_p,(1 + sc_per_symbol/4)*4,15); // 2^15 shifted
mult_cpx_vector((int16_t*)dmrs_comp_p, (int16_t*)ptrs_p, ptrs_ch_p,(1 + sc_per_symbol/4)*4,15); // 2^15 shifted
/* loop over all ptrs sub carriers in a symbol */
/* sum the error vector */
@@ -322,9 +330,6 @@ void nr_ptrs_cpe_estimation(uint8_t K_ptrs,
#ifdef DEBUG_PTRS
printf("[PHY][PTRS]: Estimated Symbol %d -> %d + j* %d \n",symbol, error_est[0], error_est[1] );
#endif
/* free vectors */
free(ptrs_p);
free(dmrs_comp_p);
}
@@ -417,9 +422,10 @@ void get_slope_from_estimates(uint8_t start, uint8_t end, int16_t *est_p, double
/* estimate from slope */
void ptrs_estimate_from_slope(int16_t *error_est, double *slope_p, uint8_t start, uint8_t end)
{
struct complex16 *error=(struct complex16 *) error_est;
for(uint8_t i = 1; i< (end -start);i++) {
error_est[(start+i)*2] = (error_est[start*2] + (int16_t)(i * slope_p[0]));// real
error_est[((start +i)*2)+1] = (error_est[(start*2)+1] + (int16_t)( i * slope_p[1])); //imag
error[start+i].r = error[start].r + (int16_t)(i * slope_p[0]);// real
error[start+i].i = error[start].i + (int16_t)(i * slope_p[1]); //imag
#ifdef DEBUG_PTRS
printf("[PHY][PTRS]: Estimated Symbol %2d -> %4d %4d from Slope (%4f %4f)\n", start+i,error_est[(start+i)*2],error_est[((start +i)*2)+1],
slope_p[0],slope_p[1]);
+99 -99
View File
@@ -108,22 +108,22 @@ EXTERN const char phi_M_ZC_6[6*U_GROUP_NUMBER]
#ifdef INIT_VARIABLES_LOWPAPR_SEQUENCES_NR_H
= {
/* 0 1 2 3 4 5 */
/* 0 */ -3, -1, 3, 3, -1, -3,
/* 1 */ -3, 3, -1, -1, 3, -3,
/* 2 */ -3, -3, -3, 3, 1, -3,
/* 3 */ 1, 1, 1, 3, -1, -3,
/* 4 */ 1, 1, 1, -3, -1, 3,
/* 5 */ -3, 1, -1, -3, -3, -3,
/* 6 */ -3, 1, 3, -3, -3, -3,
/* 7 */ -3, -1, 1, -3, 1, -1,
/* 8 */ -3, -1, -3, 1, -3, -3,
/* 9 */ -3, -3, 1, -3, 3, -3,
/* 0 */ -3, -1, 3, 3, -1, -3,
/* 1 */ -3, 3, -1, -1, 3, -3,
/* 2 */ -3, -3, -3, 3, 1, -3,
/* 3 */ 1, 1, 1, 3, -1, -3,
/* 4 */ 1, 1, 1, -3, -1, 3,
/* 5 */ -3, 1, -1, -3, -3, -3,
/* 6 */ -3, 1, 3, -3, -3, -3,
/* 7 */ -3, -1, 1, -3, 1, -1,
/* 8 */ -3, -1, -3, 1, -3, -3,
/* 9 */ -3, -3, 1, -3, 3, -3,
/* 10 */ -3, 1, 3, 1, -3, -3,
/* 11 */ -3, -1, -3, 1, 1, -3,
/* 12 */ 1, 1, 3, -1, -3, 3,
/* 13 */ 1, 1, 3, 3, -1, 3,
/* 14 */ 1, 1, 1, -3, 3, -1,
/* 15 */ -1, 1, 1, -1, 3, -3,
/* 15 */ 1, 1, 1, -1, 3, -3,
/* 16 */ -3, -1, -1, -1, 3, -1,
/* 17 */ -3, -3, -1, 1, -1, -3,
/* 18 */ -3, -3, -3, 1, -3, -1,
@@ -146,36 +146,36 @@ EXTERN const char phi_M_ZC_12[12*U_GROUP_NUMBER]
#ifdef INIT_VARIABLES_LOWPAPR_SEQUENCES_NR_H
= {
/* 0 1 2 3 4 5 6 7 8 9 10 11 */
/* 0 */ 1, -1, 3, 1, 1, -1, -1, -1, 1, 3, -3, 1,
/* 1 */ -1, -1, -1, -1, 1, -3, -1, 3, 3, -1, -3, 1,
/* 2 */ -3, 1, -3, -3, -3, 3, -3, -1, 1, 1, 1, -3,
/* 3 */ -3, 3, 1, 3, -3, 1, 1, 1, 1, 3, -3, 3,
/* 4 */ -3, 1, 3, -1, -1, -3, -3, -1, -1, 3, 1, -3,
/* 5 */ -1, 1, 1, -1, 1, 3, 3, -1, -1, -3, 1, -3,
/* 6 */ -3, -3, -1, 3, 3, 3, -3, 3, -3, 1, -1, -3,
/* 7 */ -3, 3, -3, 3, 3, -3, -1, -1, 3, 3, 1, -3,
/* 8 */ -3, -1, -3, -1, -1, -3, 3, 3, -1, -1, 1, -3,
/* 9 */ -3, 3, 3, 3, -1, -3, -3, -1, -3, 1, 3, -3,
/* 10 */ 1, 3, -3, 1, 3, 3, 3, 1, -1, 1, -1, 3,
/* 11 */ -1, -3, 3, -1, -3, -3, -3, -1, 1, -1, 1, -3,
/* 12 */ 3, 1, 3, 1, 3, -3, -1, 1, 3, 1, -1, -3,
/* 13 */ -3, -3, 3, 3, 3, -3, -1, 1, -3, 3, 1, -3,
/* 14 */ -3, -1, 1, -3, 1, 3, 3, 3, -1, -3, 3, 3,
/* 15 */ -3, -3, 3, 1, -3, -3, -3, -1, 3, -1, 1, 3,
/* 16 */ -1, 1, 3, -3, 1, -1, 1, -1, -1, -3, 1, -1,
/* 17 */ -3, -1, -1, 1, 3, 1, 1, -1, 1, -1, -3, 1,
/* 18 */ -3, -1, 3, -3, -3, -1, -3, 1, -1, -3, 3, 3,
/* 0 */ -3, 1, -3, -3, -3, 3, -3, -1, 1, 1, 1, -3,
/* 1 */ -3, 3, 1, -3, 1, 3, -1, -1, 1, 3, 3, 3,
/* 2 */ -3, 3, 3, 1, -3, 3, -1, 1, 3, -3, 3, -3,
/* 3 */ -3, -3, -1, 3, 3, 3, -3, 3, -3, 1, -1, -3,
/* 4 */ -3, -1, -1, 1, 3, 1, 1, -1, 1, -1, -3, 1,
/* 5 */ -3, -3, 3, 1, -3, -3, -3, -1, 3, -1, 1, 3,
/* 6 */ 1, -1, 3, -1, -1, -1, -3, -1, 1, 1, 1, -3,
/* 7 */ -1, -3, 3, -1, -3, -3, -3, -1, 1, -1, 1, -3,
/* 8 */ -3, -1, 3, 1, -3, -1, -3, 3, 1, 3, 3, 1,
/* 9 */ -3, -1, -1, -3, -3, -1, -3, 3, 1, 3, -1, -3,
/* 10 */ -3, 3, -3, 3, 3, -3, -1, -1, 3, 3, 1, -3,
/* 11 */ -3, -1, -3, -1, -1, -3, 3, 3, -1, -1, 1, -3,
/* 12 */ -3, -1, 3, -3, -3, -1, -3, 1, -1, -3, 3, 3,
/* 13 */ -3, 1, -1, -1, 3, 3, -3, -1, -1, -3, -1, -3,
/* 14 */ 1, 3, -3, 1, 3, 3, 3, 1, -1, 1, -1, 3,
/* 15 */ -3, 1, 3, -1, -1, -3, -3, -1, -1, 3, 1, -3,
/* 16 */ -1, -1, -1, -1, 1, -3, -1, 3, 3, -1, -3, 1,
/* 17 */ -1, 1, 1, -1, 1, 3, 3, -1, -1, -3, 1, -3,
/* 18 */ -3, 1, 3, 3, -1, -1, -3, 3, 3, -3, 3, -3,
/* 19 */ -3, -3, 3, -3, -1, 3, 3, 3, -1, -3, 1, -3,
/* 20 */ -3, 1, -1, -1, 3, 3, -3, -1, -1, -3, -1, -3,
/* 21 */ -3, 1, 3, 3, -1, -1, -3, 3, 3, -3, 3, -3,
/* 22 */ -3, -1, -1, -3, -3, -1, -3, 3, 1, 3, -1, -3,
/* 23 */ -3, -1, 3, 1, -3, -1, -3, 3, 1, 3, 3, 1,
/* 24 */ -3, 3, 3, 1, -3, 3, -1, 1, 3, -3, 3, -3,
/* 25 */ 3, -1, -3, 3, -3, -1, 3, 3, 3, -3, -1, -3,
/* 26 */ 1, -1, 3, -1, -1, -1, -3, -1, 1, 1, 1, -3,
/* 27 */ -3, 3, 1, -3, 1, 3, -1, -1, 1, 3, 3, 3,
/* 28 */ -3, 3, -3, 3, -3, -3, 3, -1, -1, 1, 3, -3,
/* 29 */ -3, 3, 1, -1, 3, 3, -3, 1, -1, 1, -1, 1,
/* 20 */ 3, 1, 3, 1, 3, -3, -1, 1, 3, 1, -1, -3,
/* 21 */ -3, 3, 1, 3, -3, 1, 1, 1, 1, 3, -3, 3,
/* 22 */ -3, 3, 3, 3, -1, -3, -3, -1, -3, 1, 3, -3,
/* 23 */ 3, -1, -3, 3, -3, -1, 3, 3, 3, -3, -1, -3,
/* 24 */ -3, -1, 1, -3, 1, 3, 3, 3, -1, -3, 3, 3,
/* 25 */ -3, 3, 1, -1, 3, 3, -3, 1, -1, 1, -1, 1,
/* 26 */ -1, 1, 3, -3, 1, -1, 1, -1, -1, -3, 1, -1,
/* 27 */ -3, -3, 3, 3, 3, -3, -1, 1, -3, 3, 1, -3,
/* 28 */ 1, -1, 3, 1, 1, -1, -1, -1, 1, 3, -3, 1,
/* 29 */ -3, 3, -3, 3, -3, -3, 3, -1, -1, 1, 3, -3,
}
#endif
;
@@ -185,36 +185,36 @@ EXTERN const char phi_M_ZC_18[18*U_GROUP_NUMBER]
#ifdef INIT_VARIABLES_LOWPAPR_SEQUENCES_NR_H
= {
/* 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 */
/* 0 */ 3, -3, 3, -1, 1, 3, -3, -1, -3, -3, -1, -3, 3, 1, -1, 3, -3, 3,
/* 1 */ 3, -3, 1, 1, 3, -1, 1, -1, -1, -3, 1, 1, -1, 3, 3, -3, 3, -1,
/* 2 */ -3, 3, -1, -3, -1, -3, 1, 1, -3, -3, -1, -1, 3, -3, 1, 3, 1, 1,
/* 3 */ 1, 1, -1, -1, -3, -1, 1, -3, -3, -3, 1, -3, -1, -1, 1, -1, 3, 1,
/* 4 */ 1, 1, -3, 3, 3, 1, 3, -3, 3, -1, 1, 1, -1, 1, -3, -3, -1, 3,
/* 5 */ -3, -3, 1, -3, 3, 3, 3, -1, 3, 1, 1, -3, -3, -3, 3, -3, -1, -1,
/* 6 */ -1, 3, -1, -3, 3, 1, -3, -1, 3, -3, -1, -1, 1, 1, 1, -1, -1, -1,
/* 7 */ -3, 1, -3, -3, 1, -3, -3, 3, 1, -3, -1, -3, -3, -3, -1, 1, 1, 3,
/* 8 */ 1, -3, -1, -3, 3, 3, -1, -3, 1, -3, -3, -1, -3, -1, 1, 3, 3, 3,
/* 9 */ -3, 3, 1, -1, -1, -1, -1, 1, -1, 3, 3, -3, -1, 1, 3, -1, 3, -1,
/* 10 */ -3, -3, 1, -1, -1, 1, 1, -3, -1, 3, 3, 3, 3, -1, 3, 1, 3, 1,
/* 11 */ -3, -3, 3, 3, -3, 1, 3, -1, -3, 1, -1, -3, 3, -3, -1, -1, -1, 3,
/* 12 */ -3, -3, 3, 3, 3, 1, -3, 1, 3, 3, 1, -3, -3, 3, -1, -3, -1, 1,
/* 13 */ -3, 3, -1, 1, 3, 1, -3, -1, 1, 1, -3, 1, 3, 3, -1, -3, -3, -3,
/* 14 */ -3, 1, -3, -1, -1, 3, 1, -3, -3, -3, -1, -3, -3, 1, 1, 1, -1, -1,
/* 15 */ -3, -3, 3, 3, 3, -1, -1, -3, -1, -1, -1, 3, 1, -3, -3, -1, 3, -1,
/* 16 */ -3, -1, 3, 3, -1, 3, -1, -3, -1, 1, -1, -3, -1, -1, -1, 3, 3, 1,
/* 17 */ -3, -1, -3, -1, -3, 1, 3, -3, -1, 3, 3, 3, 1, -1, -3, 3, -1, -3,
/* 18 */ -3, 3, 1, -1, -1, 3, -3, -1, 1, 1, 1, 1, 1, -1, 3, -1, -3, -1,
/* 19 */ 3, -1, -3, 1, -3, -3, -3, 3, 3, -1, 1, -3, -1, 3, 1, 1, 3, 3,
/* 20 */ 3, 3, 3, -3, -1, -3, -1, 3, -1, 1, -1, -3, 1, -3, -3, -1, 3, 3,
/* 21 */ 3, -1, 3, 1, -3, -3, -1, 1, -3, -3, 3, 3, 3, 1, 3, -3, 3, -3,
/* 22 */ -3, 1, 1, -3, 1, 1, 3, -3, -1, -3, -1, 3, -3, 3, -1, -1, -1, -3,
/* 23 */ -3, -1, -1, -3, 1, -3, 3, -1, -1, -3, 3, 3, -3, -1, 3, -1, -1, -1,
/* 24 */ -3, -3, -3, 1, -3, 3, 1, 1, 3, -3, -3, 1, 3, -1, 3, -3, -3, 3,
/* 25 */ 1, 1, -3, -3, -3, -3, 1, 3, -3, 3, 3, 1, -3, -1, 3, -1, -3, 1,
/* 26 */ 3, -1, -1, 1, -3, -1, -3, -1, -3, -3, -1, -3, 1, 1, 1, -3, -3, 3,
/* 27 */ 3, 1, -3, 1, -3, 3, 3, -1, -3, -3, -1, -3, -3, 3, -3, -1, 1, 3,
/* 0 */ -1, 3, -1, -3, 3, 1, -3, -1, 3, -3, -1, -1, 1, 1, 1, -1, -1, -1,
/* 1 */ 3, -3, 3, -1, 1, 3, -3, -1, -3, -3, -1, -3, 3, 1, -1, 3, -3, 3,
/* 2 */ -3, 3, 1, -1, -1, 3, -3, -1, 1, 1, 1, 1, 1, -1, 3, -1, -3, -1,
/* 3 */ -3, -3, 3, 3, 3, 1, -3, 1, 3, 3, 1, -3, -3, 3, -1, -3, -1, 1,
/* 4 */ 1, 1, -1, -1, -3, -1, 1, -3, -3, -3, 1, -3, -1, -1, 1, -1, 3, 1,
/* 5 */ 3, -3, 1, 1, 3, -1, 1, -1, -1, -3, 1, 1, -1, 3, 3, -3, 3, -1,
/* 6 */ -3, 3, -1, 1, 3, 1, -3, -1, 1, 1, -3, 1, 3, 3, -1, -3, -3, -3,
/* 7 */ 1, 1, -3, 3, 3, 1, 3, -3, 3, -1, 1, 1, -1, 1, -3, -3, -1, 3,
/* 8 */ -3, 1, -3, -3, 1, -3, -3, 3, 1, -3, -1, -3, -3, -3, -1, 1, 1, 3,
/* 9 */ 3, -1, 3, 1, -3, -3, -1, 1, -3, -3, 3, 3, 3, 1, 3, -3, 3, -3,
/* 10 */ -3, -3, -3, 1, -3, 3, 1, 1, 3, -3, -3, 1, 3, -1, 3, -3, -3, 3,
/* 11 */ -3, -3, 3, 3, 3, -1, -1, -3, -1, -1, -1, 3, 1, -3, -3, -1, 3, -1,
/* 12 */ -3, -1, -3, -3, 1, 1, -1, -3, -1, -3, -1, -1, 3, 3, -1, 3, 1, 3,
/* 13 */ 1, 1, -3, -3, -3, -3, 1, 3, -3, 3, 3, 1, -3, -1, 3, -1, -3, 1,
/* 14 */ -3, 3, -1, -3, -1, -3, 1, 1, -3, -3, -1, -1, 3, -3, 1, 3, 1, 1,
/* 15 */ 3, 1, -3, 1, -3, 3, 3, -1, -3, -3, -1, -3, -3, 3, -3, -1, 1, 3,
/* 16 */ -3, -1, -3, -1, -3, 1, 3, -3, -1, 3, 3, 3, 1, -1, -3, 3, -1, -3,
/* 17 */ -3, -1, 3, 3, -1, 3, -1, -3, -1, 1, -1, -3, -1, -1, -1, 3, 3, 1,
/* 18 */ -3, 1, -3, -1, -1, 3, 1, -3, -3, -3, -1, -3, -3, 1, 1, 1, -1, -1,
/* 19 */ 3, 3, 3, -3, -1, -3, -1, 3, -1, 1, -1, -3, 1, -3, -3, -1, 3, 3,
/* 20 */ -3, 1, 1, -3, 1, 1, 3, -3, -1, -3, -1, 3, -3, 3, -1, -1, -1, -3,
/* 21 */ 1, -3, -1, -3, 3, 3, -1, -3, 1, -3, -3, -1, -3, -1, 1, 3, 3, 3,
/* 22 */ -3, -3, 1, -1, -1, 1, 1, -3, -1, 3, 3, 3, 3, -1, 3, 1, 3, 1,
/* 23 */ 3, -1, -3, 1, -3, -3, -3, 3, 3, -1, 1, -3, -1, 3, 1, 1, 3, 3,
/* 24 */ 3, -1, -1, 1, -3, -1, -3, -1, -3, -3, -1, -3, 1, 1, 1, -3, -3, 3,
/* 25 */ -3, -3, 1, -3, 3, 3, 3, -1, 3, 1, 1, -3, -3, -3, 3, -3, -1, -1,
/* 26 */ -3, -1, -1, -3, 1, -3, 3, -1, -1, -3, 3, 3, -3, -1, 3, -1, -1, -1,
/* 27 */ -3, -3, 3, 3, -3, 1, 3, -1, -3, 1, -1, -3, 3, -3, -1, -1, -1, 3,
/* 28 */ -1, -3, 1, -3, -3, -3, 1, 1, 3, 3, -3, 3, 3, -3, -1, 3, -3, 1,
/* 29 */ -3, -1, -3, -3, 1, 1, -1, -3, -1, -3, -1, -1, 3, 3, -1, 3, 1, 3,
/* 29 */ -3, 3, 1, -1, -1, -1, -1, 1, -1, 3, 3, -3, -1, 1, 3, -1, 3, -1,
}
#endif
;
@@ -224,36 +224,36 @@ EXTERN const char phi_M_ZC_24[24*U_GROUP_NUMBER]
#ifdef INIT_VARIABLES_LOWPAPR_SEQUENCES_NR_H
= {
/* 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 */
/* 0 */ -1, -3, 3, 1, 1, -3, 1, -3, -3, 1, -3, -1, -1, 3, -3, 3, 3, 3, -3, 1, 3, 3, -3, -3,
/* 1 */ -1, -3, 3, -1, 3, 1, 3, -1, 1, -3, -1, -3, -1, 1, 3, -3, -1, -3, 3, 3, 3, -3, -3, -3,
/* 2 */ -3, 3, 1, 3, -1, 1, -3, 1, -3, 1, -1, -3, -1, -3, -3, -3, -3, -1, -1, -1, 1, 1, -3, -3,
/* 3 */ 3, -1, 3, -1, 1, -3, 1, 1, -3, -3, 3, -3, -1, -1, -1, -1, -1, -3, -3, -1, 1, 1, -3, -3,
/* 4 */ 1, -3, 3, -1, -3, -1, 3, 3, 1, -1, 1, 1, 3, -3, -1, -3, -3, -3, -1, 3, -3, -1, -3, -3,
/* 5 */ 3, -1, 1, -1, 3, -3, 1, 1, 3, -1, -3, 3, 1, -3, 3, -1, -1, -1, -1, 1, -3, -3, -3, -3,
/* 6 */ -3, 3, -1, 3, 1, -1, -1, -1, 3, 3, 1, 1, 1, 3, 3, 1, -3, -3, -1, 1, -3, 1, 3, -3,
/* 7 */ -3, -1, 1, -3, -3, 1, 1, -3, 3, -1, -1, -3, 1, 3, 1, -1, -3, -1, -3, 1, -3, -3, -3, -3,
/* 8 */ -3, 1, -3, 1, -3, -3, 1, -3, 1, -3, -3, -3, -3, -3, 1, -3, -3, 1, 1, -3, 1, 1, -3, -3,
/* 9 */ 3, -3, -3, -1, 3, 3, -3, -1, 3, 1, 1, 1, 3, -1, 3, -3, -1, 3, -1, 3, 1, -1, -3, -3,
/* 10 */ -3, -3, -1, -1, -1, -3, 1, -1, -3, -1, 3, -3, 1, -3, 3, -3, 3, 3, 1, -1, -1, 1, -3, -3,
/* 11 */ -3, -3, 3, 3, 1, -1, -1, -1, 1, -3, -1, 1, -1, 3, -3, -1, -3, -1, -1, 1, -3, 3, -1, -3,
/* 12 */ -3, -3, 1, -1, 3, 3, -3, -1, 1, -1, -1, 1, 1, -1, -1, 3, -3, 1, -3, 1, -1, -1, -1, -3,
/* 13 */ -3, 1, -3, 3, -1, -1, -1, -3, 3, 1, -1, -3, -1, 1, 3, -1, 1, -1, 1, -3, -3, -3, -3, -3,
/* 14 */ -3, -3, -3, -1, 3, -3, 3, 1, 3, 1, -3, -1, -1, -3, 1, 1, 3, 1, -1, -3, 3, 1, 3, -3,
/* 15 */ 1, 1, -1, -3, -1, 1, 1, -3, 1, -1, 1, -3, 3, -3, -3, 3, -1, -3, 1, 3, -3, 1, -3, -3,
/* 16 */ -3, 3, -1, 3, -1, 3, 3, 1, 1, -3, 1, 3, -3, 3, -3, -3, -1, 1, 3, -3, -1, -1, -3, -3,
/* 17 */ -1, -3, -3, 1, -1, -1, -3, 1, 3, -1, -3, -1, -1, -3, 1, 1, 3, 1, -3, -1, -1, 3, -3, -3,
/* 18 */ -3, 1, -3, 1, -3, 1, 1, 3, 1, -3, -3, -1, 1, 3, -1, -3, 3, 1, -1, -3, -3, -3, -3, -3,
/* 19 */ 3, -3, 3, -1, -3, 1, 3, 1, -1, -1, -3, -1, 3, -3, 3, -1, -1, 3, 3, -3, -3, 3, -3, -3,
/* 20 */ -1, 3, -3, -3, -1, 3, -1, -1, 1, 3, 1, 3, -1, -1, -3, 1, 3, 1, -1, -3, 1, -1, -3, -3,
/* 21 */ -3, 1, -3, -1, -1, 3, 1, 3, -3, 1, -1, 3, 3, -1, -3, 3, -3, -1, -1, -3, -3, -3, 3, -3,
/* 22 */ -3, -1, -1, -3, 1, -3, -3, -1, -1, 3, -1, 1, -1, 3, 1, -3, -1, 3, 1, 1, -1, -1, -3, -3,
/* 23 */ -3, 1, -3, 3, -3, 1, -3, 3, 1, -1, -3, -1, -3, -3, -3, -3, 1, 3, -1, 1, 3, 3, 3, -3,
/* 24 */ -3, -1, 1, -3, -1, -1, 1, 1, 1, 3, 3, -1, 1, -1, 1, -1, -1, -3, -3, -3, 3, 1, -1, -3,
/* 25 */ 3, -3, -1, 1, 3, -1, -1, -3, -1, 3, -1, -3, -1, -3, 3, -1, 3, 1, 1, -3, 3, -3, -3, -3,
/* 26 */ -3, 1, 3, -1, 1, -1, 3, -3, 3, -1, -3, -1, -3, 3, -1, -1, -1, -3, -1, -1, -3, 3, 3, -3,
/* 27 */ -3, 3, -1, -3, -1, -1, -1, 3, -1, -1, 3, -3, -1, 3, -3, 3, -3, -1, 3, 1, 1, -1, -3, -3,
/* 28 */ -3, 1, -1, -3, -3, -1, 1, -3, -1, -3, 1, 1, -1, 1, 1, 3, 3, 3, -1, 1, -1, 1, -1, -3,
/* 29 */ -1, 3, -1, -1, 3, 3, -1, -1, -1, 3, -1, -3, 1, 3, 1, 1, -3, -3, -3, -1, -3, -1, -3, -3,
/* 0 */ -1, -3, 3, -1, 3, 1, 3, -1, 1, -3, -1, -3, -1, 1, 3, -3, -1, -3, 3, 3, 3, -3, -3, -3,
/* 1 */ -1, -3, 3, 1, 1, -3, 1, -3, -3, 1, -3, -1, -1, 3, -3, 3, 3, 3, -3, 1, 3, 3, -3, -3,
/* 2 */ -1, -3, -3, 1, -1, -1, -3, 1, 3, -1, -3, -1, -1, -3, 1, 1, 3, 1, -3, -1, -1, 3, -3, -3,
/* 3 */ 1, -3, 3, -1, -3, -1, 3, 3, 1, -1, 1, 1, 3, -3, -1, -3, -3, -3, -1, 3, -3, -1, -3, -3,
/* 4 */ -1, 3, -3, -3, -1, 3, -1, -1, 1, 3, 1, 3, -1, -1, -3, 1, 3, 1, -1, -3, 1, -1, -3, -3,
/* 5 */ -3, -1, 1, -3, -3, 1, 1, -3, 3, -1, -1, -3, 1, 3, 1, -1, -3, -1, -3, 1, -3, -3, -3, -3,
/* 6 */ -3, 3, 1, 3, -1, 1, -3, 1, -3, 1, -1, -3, -1, -3, -3, -3, -3, -1, -1, -1, 1, 1, -3, -3,
/* 7 */ -3, 1, 3, -1, 1, -1, 3, -3, 3, -1, -3, -1, -3, 3, -1, -1, -1, -3, -1, -1, -3, 3, 3, -3,
/* 8 */ -3, 1, -3, 3, -1, -1, -1, -3, 3, 1, -1, -3, -1, 1, 3, -1, 1, -1, 1, -3, -3, -3, -3, -3,
/* 9 */ 1, 1, -1, -3, -1, 1, 1, -3, 1, -1, 1, -3, 3, -3, -3, 3, -1, -3, 1, 3, -3, 1, -3, -3,
/* 10 */ -3, -3, -3, -1, 3, -3, 3, 1, 3, 1, -3, -1, -1, -3, 1, 1, 3, 1, -1, -3, 3, 1, 3, -3,
/* 11 */ -3, 3, -1, 3, 1, -1, -1, -1, 3, 3, 1, 1, 1, 3, 3, 1, -3, -3, -1, 1, -3, 1, 3, -3,
/* 12 */ 3, -3, 3, -1, -3, 1, 3, 1, -1, -1, -3, -1, 3, -3, 3, -1, -1, 3, 3, -3, -3, 3, -3, -3,
/* 13 */ -3, 3, -1, 3, -1, 3, 3, 1, 1, -3, 1, 3, -3, 3, -3, -3, -1, 1, 3, -3, -1, -1, -3, -3,
/* 14 */ -3, 1, -3, -1, -1, 3, 1, 3, -3, 1, -1, 3, 3, -1, -3, 3, -3, -1, -1, -3, -3, -3, 3, -3,
/* 15 */ -3, -1, -1, -3, 1, -3, -3, -1, -1, 3, -1, 1, -1, 3, 1, -3, -1, 3, 1, 1, -1, -1, -3, -3,
/* 16 */ -3, -3, 1, -1, 3, 3, -3, -1, 1, -1, -1, 1, 1, -1, -1, 3, -3, 1, -3, 1, -1, -1, -1, -3,
/* 17 */ 3, -1, 3, -1, 1, -3, 1, 1, -3, -3, 3, -3, -1, -1, -1, -1, -1, -3, -3, -1, 1, 1, -3, -3,
/* 18 */ 3, 1, -3, 1, -3, -3, 1, -3, 1, -3, -3, -3, -3, -3, 1, -3, -3, 1, 1, -3, 1, 1, -3, -3,
/* 19 */ -3, -3, 3, 3, 1, -1, -1, -1, 1, -3, -1, 1, -1, 3, -3, -1, -3, -1, -1, 1, -3, 3, -1, -3,
/* 20 */ -3, -3, -1, -1, -1, -3, 1, -1, -3, -1, 3, -3, 1, -3, 3, -3, 3, 3, 1, -1, -1, 1, -3, -3,
/* 21 */ 3, -1, 1, -1, 3, -3, 1, 1, 3, -1, -3, 3, 1, -3, 3, -1, -1, -1, -1, 1, -3, -3, -3, -3,
/* 22 */ -3, 1, -3, 3, -3, 1, -3, 3, 1, -1, -3, -1, -3, -3, -3, -3, 1, 3, -1, 1, 3, 3, 3, -3,
/* 23 */ -3, -1, 1, -3, -1, -1, 1, 1, 1, 3, 3, -1, 1, -1, 1, -1, -1, -3, -3, -3, 3, 1, -1, -3,
/* 24 */ -3, 3, -1, -3, -1, -1, -1, 3, -1, -1, 3, -3, -1, 3, -3, 3, -3, -1, 3, 1, 1, -1, -3, -3,
/* 25 */ -3, 1, -1, -3, -3, -1, 1, -3, -1, -3, 1, 1, -1, 1, 1, 3, 3, 3, -1, 1, -1, 1, -1, -3,
/* 26 */ -1, 3, -1, -1, 3, 3, -1, -1, -1, 3, -1, -3, 1, 3, 1, 1, -3, -3, -3, -1, -3, -1, -3, -3,
/* 27 */ 3, -3, -3, -1, 3, 3, -3, -1, 3, 1, 1, 1, 3, -1, 3, -3, -1, 3, -1, 3, 1, -1, -3, -3,
/* 28 */ -3, 1, -3, 1, -3, 1, 1, 3, 1, -3, -3, -1, 1, 3, -1, -3, 3, 1, -1, -3, -3, -3, -3, -3,
/* 29 */ 3, -3, -1, 1, 3, -1, -1, -3, -1, 3, -1, -3, -1, -3, 3, -1, 3, 1, 1, -3, 3, -3, -3, -3,
}
#endif
;
+1 -1
View File
@@ -35,7 +35,7 @@ void nr_generate_csi_rs(PHY_VARS_gNB *gNB,
NR_DL_FRAME_PARMS frame_parms=gNB->frame_parms;
int32_t **txdataF = gNB->common_vars.txdataF;
int txdataF_offset = (slot%2)*frame_parms.samples_per_slot_wCP;
int txdataF_offset = slot*frame_parms.samples_per_slot_wCP;
uint32_t **gold_csi_rs = gNB->nr_gold_csi_rs[slot];
int16_t mod_csi[frame_parms.symbols_per_slot][NR_MAX_CSI_RS_LENGTH>>1] __attribute__((aligned(16)));;
uint16_t b = csi_params.freq_domain;
+22 -27
View File
@@ -66,12 +66,11 @@ void nr_pdcch_scrambling(uint32_t *in,
}
}
void nr_generate_dci(PHY_VARS_gNB *gNB,
nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15,
uint32_t **gold_pdcch_dmrs,
int32_t *txdataF,
int16_t amp,
NR_DL_FRAME_PARMS *frame_parms) {
void nr_generate_dci(nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15,
uint32_t **gold_pdcch_dmrs,
int32_t *txdataF,
int16_t amp,
NR_DL_FRAME_PARMS *frame_parms) {
int16_t mod_dmrs[NR_MAX_CSET_DURATION][NR_MAX_PDCCH_DMRS_LENGTH>>1] __attribute__((aligned(16))); // 3 for the max coreset duration
uint16_t cset_start_sc;
@@ -84,7 +83,8 @@ void nr_generate_dci(PHY_VARS_gNB *gNB,
int n_rb;
// compute rb_offset and n_prb based on frequency allocation
nr_fill_cce_list(gNB,0,pdcch_pdu_rel15);
nr_cce_t cce_list[MAX_DCI_CORESET][NR_MAX_PDCCH_AGG_LEVEL];
nr_fill_cce_list(cce_list,0,pdcch_pdu_rel15);
get_coreset_rballoc(pdcch_pdu_rel15->FreqDomainResource,&n_rb,&rb_offset);
cset_start_sc = frame_parms->first_carrier_offset + (pdcch_pdu_rel15->BWPStart + rb_offset) * NR_NB_SC_PER_RB;
@@ -135,8 +135,8 @@ void nr_generate_dci(PHY_VARS_gNB *gNB,
dci_pdu->AggregationLevel,
0,NULL);
polar_encoder_fast((uint64_t*)dci_pdu->Payload, (void*)encoder_output, n_RNTI,1,currentPtr);
#if DEBUG_CHANNEL_CODING
printf("polar rnti %x,length %d, L %d\n",n_RNTI, dci_pdu->PayloadSizeBits,dci_pdu->AggregationLevel);
#ifdef DEBUG_CHANNEL_CODING
printf("polar rnti %x,length %d, L %d\n",n_RNTI, dci_pdu->PayloadSizeBits,pdcch_pdu_rel15->dci_pdu->AggregationLevel);
printf("DCI PDU: [0]->0x%lx \t [1]->0x%lx\n",
((uint64_t*)dci_pdu->Payload)[0], ((uint64_t*)dci_pdu->Payload)[1]);
printf("Encoded Payload (length:%d dwords):\n", encoded_length>>5);
@@ -175,7 +175,7 @@ void nr_generate_dci(PHY_VARS_gNB *gNB,
int reg_list_order[NR_MAX_PDCCH_AGG_LEVEL] = {};
for (int p = 0; p < NR_MAX_PDCCH_AGG_LEVEL; p++) {
for(int p2 = 0; p2 < dci_pdu->AggregationLevel; p2++) {
if(gNB->cce_list[d][p2].reg_list[0].reg_idx == p * NR_NB_REG_PER_CCE) {
if(cce_list[d][p2].reg_list[0].reg_idx == p * NR_NB_REG_PER_CCE) {
reg_list_order[reg_list_index] = p2;
reg_list_index++;
break;
@@ -191,7 +191,7 @@ void nr_generate_dci(PHY_VARS_gNB *gNB,
for (int reg_in_cce_idx = 0; reg_in_cce_idx < NR_NB_REG_PER_CCE; reg_in_cce_idx++) {
k = cset_start_sc + gNB->cce_list[d][cce_idx].reg_list[reg_in_cce_idx].start_sc_idx;
k = cset_start_sc + cce_list[d][cce_idx].reg_list[reg_in_cce_idx].start_sc_idx;
if (k >= frame_parms->ofdm_symbol_size)
k -= frame_parms->ofdm_symbol_size;
@@ -200,9 +200,9 @@ void nr_generate_dci(PHY_VARS_gNB *gNB,
// dmrs index depends on reference point for k according to 38.211 7.4.1.3.2
if (pdcch_pdu_rel15->CoreSetType == NFAPI_NR_CSET_CONFIG_PDCCH_CONFIG)
dmrs_idx = (gNB->cce_list[d][cce_idx].reg_list[reg_in_cce_idx].reg_idx) * 3;
dmrs_idx = (cce_list[d][cce_idx].reg_list[reg_in_cce_idx].reg_idx) * 3;
else
dmrs_idx = (gNB->cce_list[d][cce_idx].reg_list[reg_in_cce_idx].reg_idx + rb_offset) * 3;
dmrs_idx = (cce_list[d][cce_idx].reg_list[reg_in_cce_idx].reg_idx + rb_offset) * 3;
k_prime = 0;
@@ -250,21 +250,16 @@ void nr_generate_dci(PHY_VARS_gNB *gNB,
} // for (int d=0;d<pdcch_pdu_rel15->numDlDci;d++)
}
void nr_generate_dci_top(PHY_VARS_gNB *gNB,
nfapi_nr_dl_tti_pdcch_pdu *pdcch_pdu,
nfapi_nr_dl_tti_pdcch_pdu *ul_dci_pdu,
uint32_t **gold_pdcch_dmrs,
int32_t *txdataF,
int16_t amp,
NR_DL_FRAME_PARMS *frame_parms) {
void nr_generate_dci_top(processingData_L1tx_t *msgTx,
uint32_t **gold_pdcch_dmrs,
int32_t *txdataF,
int16_t amp,
NR_DL_FRAME_PARMS *frame_parms) {
AssertFatal(pdcch_pdu!=NULL || ul_dci_pdu!=NULL,"At least one pointer has to be !NULL\n");
for (int i=0; i<msgTx->num_ul_pdcch; i++)
nr_generate_dci(&msgTx->ul_pdcch_pdu[i].pdcch_pdu.pdcch_pdu_rel15,gold_pdcch_dmrs,txdataF,amp,frame_parms);
for (int i=0; i<msgTx->num_dl_pdcch; i++)
nr_generate_dci(&msgTx->pdcch_pdu[i].pdcch_pdu_rel15,gold_pdcch_dmrs,txdataF,amp,frame_parms);
if (pdcch_pdu) {
nr_generate_dci(gNB,&pdcch_pdu->pdcch_pdu_rel15,gold_pdcch_dmrs,txdataF,amp,frame_parms);
}
if (ul_dci_pdu) {
nr_generate_dci(gNB,&ul_dci_pdu->pdcch_pdu_rel15,gold_pdcch_dmrs,txdataF,amp,frame_parms);
}
}
+6 -8
View File
@@ -29,13 +29,11 @@ uint16_t nr_get_dci_size(nfapi_nr_dci_format_e format,
nfapi_nr_rnti_type_e rnti_type,
uint16_t N_RB);
void nr_generate_dci_top(PHY_VARS_gNB *gNB,
nfapi_nr_dl_tti_pdcch_pdu *pdcch_pdu,
nfapi_nr_dl_tti_pdcch_pdu *ul_pdcch_pdu,
uint32_t **gold_pdcch_dmrs,
int32_t *txdataF,
int16_t amp,
NR_DL_FRAME_PARMS *frame_parms);
void nr_generate_dci_top(processingData_L1tx_t *msgTx,
uint32_t **gold_pdcch_dmrs,
int32_t *txdataF,
int16_t amp,
NR_DL_FRAME_PARMS *frame_parms);
void nr_pdcch_scrambling(uint32_t *in,
uint32_t size,
@@ -57,6 +55,6 @@ void nr_fill_ul_dci(PHY_VARS_gNB *gNB,
int slot,
nfapi_nr_ul_dci_request_pdus_t *pdcch_pdu);
void nr_fill_cce_list(PHY_VARS_gNB *gNB, uint8_t m,nfapi_nr_dl_tti_pdcch_pdu_rel15_t *);
void nr_fill_cce_list(nr_cce_t cce_list[MAX_DCI_CORESET][NR_MAX_PDCCH_AGG_LEVEL], uint8_t m,nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15);
#endif //__PHY_NR_TRANSPORT_DCI__H
+2 -2
View File
@@ -119,7 +119,7 @@ void nr_fill_cce_list(PHY_VARS_gNB *gNB, uint16_t n_shift, uint8_t m) {
*/
void nr_fill_cce_list(PHY_VARS_gNB *gNB, uint8_t m, nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15) {
void nr_fill_cce_list(nr_cce_t cce_list[MAX_DCI_CORESET][NR_MAX_PDCCH_AGG_LEVEL], uint8_t m, nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15) {
nr_cce_t* cce;
nr_reg_t* reg;
@@ -156,7 +156,7 @@ void nr_fill_cce_list(PHY_VARS_gNB *gNB, uint8_t m, nfapi_nr_dl_tti_pdcch_pdu_r
if (pdcch_pdu_rel15->dci_pdu[d].RNTI != 0xFFFF) LOG_D(PHY, "CCE list generation for candidate %d: bundle size %d ilv size %d CceIndex %d\n", m, bsize, R, pdcch_pdu_rel15->dci_pdu[d].CceIndex);
for (uint8_t cce_idx=0; cce_idx<L; cce_idx++) {
cce = &gNB->cce_list[d][cce_idx];
cce = &cce_list[d][cce_idx];
cce->cce_idx = pdcch_pdu_rel15->dci_pdu[d].CceIndex + cce_idx;
LOG_D(PHY, "cce_idx %d\n", cce->cce_idx);
+41 -98
View File
@@ -47,70 +47,11 @@ void nr_pdsch_codeword_scrambling(uint8_t *in,
uint8_t q,
uint32_t Nid,
uint32_t n_RNTI,
uint32_t* out) {
uint8_t reset, b_idx;
uint32_t x1, x2, s=0;
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_gNB_PDSCH_CODEWORD_SCRAMBLING, 1);
reset = 1;
x2 = (n_RNTI<<15) + (q<<14) + Nid;
for (int i=0; i<size; i++) {
b_idx = i&0x1f;
if (b_idx==0) {
s = lte_gold_generic(&x1, &x2, reset);
reset = 0;
if (i)
out++;
}
*out ^= (((in[i])&1) ^ ((s>>b_idx)&1))<<b_idx;
//printf("i %d b_idx %d in %d s 0x%08x out 0x%08x\n", i, b_idx, in[i], s, *out);
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_gNB_PDSCH_CODEWORD_SCRAMBLING, 0);
uint32_t* out)
{
nr_codeword_scrambling(in, size, q, Nid, n_RNTI, out);
}
void nr_pdsch_codeword_scrambling_optim(uint8_t *in,
uint32_t size,
uint8_t q,
uint32_t Nid,
uint32_t n_RNTI,
uint32_t* out) {
uint32_t x1, x2, s=0,in32;
x2 = (n_RNTI<<15) + (q<<14) + Nid;
s=lte_gold_generic(&x1, &x2, 1);
#if defined(__AVX2__)
for (int i=0; i<((size>>5)+((size&0x1f) > 0 ? 1 : 0)); i++) {
in32=_mm256_movemask_epi8(_mm256_slli_epi16(((__m256i*)in)[i],7));
out[i]=(in32^s);
//printf("in[%d] %x => %x\n",i,in32,out[i]);
s=lte_gold_generic(&x1, &x2, 0);
}
#elif defined(__SSE4__)
_m128i *in128;
for (int i=0; i<((size>>5)+((size&0x1f) > 0 ? 1 : 0)); i++) {
in128=&((__m128i*)in)[i<<1];
((uint16_t*)&in32)[0] = _mm128_movemask_epi8(_mm256_slli_epi16(in128[0],7));
((uint16_t*)&in32)[1] = _mm128_movemask_epi8(_mm256_slli_epi16(in128[1],7));
out[i]=(in32^s);
s=lte_gold_generic(&x1, &x2, 0);
}
//#elsif defined(__arm__) || defined(__aarch64)
#else
nr_pdsch_codeword_scrambling(in,
size,
q,
Nid,
n_RNTI,
out);
#endif
}
void nr_generate_pdsch(processingData_L1tx_t *msgTx,
int frame,
int slot) {
@@ -214,12 +155,12 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx,
for (int q=0; q<rel15->NrOfCodewords; q++)
memset((void*)scrambled_output[q], 0, (encoded_length>>5)*sizeof(uint32_t));
for (int q=0; q<rel15->NrOfCodewords; q++)
nr_pdsch_codeword_scrambling_optim(output,
encoded_length,
q,
rel15->dataScramblingId,
rel15->rnti,
scrambled_output[q]);
nr_pdsch_codeword_scrambling(output,
encoded_length,
q,
rel15->dataScramblingId,
rel15->rnti,
scrambled_output[q]);
stop_meas(dlsch_scrambling_stats);
#ifdef DEBUG_DLSCH
@@ -277,7 +218,7 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx,
if (start_sc >= frame_parms->ofdm_symbol_size)
start_sc -= frame_parms->ofdm_symbol_size;
int txdataF_offset = (slot%2)*frame_parms->samples_per_slot_wCP;
int txdataF_offset = slot*frame_parms->samples_per_slot_wCP;
#ifdef DEBUG_DLSCH_MAPPING
printf("PDSCH resource mapping started (start SC %d\tstart symbol %d\tN_PRB %d\tnb_re %d,nb_layers %d)\n",
@@ -352,6 +293,7 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx,
ptrs_symbol = is_ptrs_symbol(l,dlPtrsSymPos);
if(ptrs_symbol) {
/* PTRS QPSK Modulation for each OFDM symbol in a slot */
printf("Doing ptrs modulation for symbol %d, n_ptrs %d\n",l,n_ptrs);
nr_modulation(pdsch_dmrs[l][0], (n_ptrs<<1), DMRS_MOD_ORDER, mod_ptrs);
}
}
@@ -375,12 +317,12 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx,
/* Map DMRS Symbol */
if ( (dmrs_symbol_map & (1 << l)) &&
(k == ((start_sc+get_dmrs_freq_idx(n, k_prime, delta, dmrs_Type))%(frame_parms->ofdm_symbol_size)))) {
txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)] = (Wt[l_prime]*Wf[k_prime]*amp*mod_dmrs[dmrs_idx<<1]) >> 15;
txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)] = (Wt[l_prime]*Wf[k_prime]*amp*mod_dmrs[(dmrs_idx<<1) + 1]) >> 15;
txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) ] = (Wt[l_prime]*Wf[k_prime]*amp*mod_dmrs[dmrs_idx<<1]) >> 15;
txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 ] = (Wt[l_prime]*Wf[k_prime]*amp*mod_dmrs[(dmrs_idx<<1) + 1]) >> 15;
#ifdef DEBUG_DLSCH_MAPPING
printf("dmrs_idx %d\t l %d \t k %d \t k_prime %d \t n %d \t txdataF: %d %d\n",
dmrs_idx, l, k, k_prime, n, txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)],
txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)]);
dmrs_idx, l, k, k_prime, n, txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1)],
txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + 1]);
#endif
dmrs_idx++;
k_prime++;
@@ -388,30 +330,30 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx,
n+=(k_prime)?0:1;
}
else if(is_ptrs_re){
txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)] = (beta_ptrs*amp*mod_ptrs[ptrs_idx<<1]) >> 15;
txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)] = (beta_ptrs*amp*mod_ptrs[(ptrs_idx<<1) + 1])>> 15;
txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) ] = (beta_ptrs*amp*mod_ptrs[ptrs_idx<<1]) >> 15;
txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + 1] = (beta_ptrs*amp*mod_ptrs[(ptrs_idx<<1) + 1])>> 15;
#ifdef DEBUG_DLSCH_MAPPING
printf("ptrs_idx %d\t l %d \t k %d \t k_prime %d \t n %d \t txdataF: %d %d\n",
printf("ptrs_idx %d\t l %d \t k %d \t k_prime %d \t n %d \t txdataF: %d %d, mod_ptrs: %d %d\n",
ptrs_idx, l, k, k_prime, n, ((int16_t*)txdataF[ap])[((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)],
((int16_t*)txdataF[ap])[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)]);
((int16_t*)txdataF[ap])[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)],mod_ptrs[ptrs_idx<<1],mod_ptrs[(ptrs_idx<<1)+1]);
#endif
ptrs_idx++;
}
/* Map DATA Symbol */
else if( allowed_xlsch_re_in_dmrs_symbol(k,start_sc,frame_parms->ofdm_symbol_size,rel15->numDmrsCdmGrpsNoData,dmrs_Type)) {
txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)] = (amp * tx_layers[ap][m<<1]) >> 15;
txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)] = (amp * tx_layers[ap][(m<<1) + 1]) >> 15;
else if( ptrs_symbol || allowed_xlsch_re_in_dmrs_symbol(k,start_sc,frame_parms->ofdm_symbol_size,rel15->numDmrsCdmGrpsNoData,dmrs_Type)) {
txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) ] = (amp * tx_layers[ap][m<<1]) >> 15;
txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + 1] = (amp * tx_layers[ap][(m<<1) + 1]) >> 15;
#ifdef DEBUG_DLSCH_MAPPING
printf("m %d\t l %d \t k %d \t txdataF: %d %d\n",
m, l, k, txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)],
txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)]);
m, l, k, txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1)],
txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + 1]);
#endif
m++;
}
/* mute RE */
else {
txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)] = 0;
txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)] = 0;
txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) ] = 0;
txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + 1] = 0;
}
if (++k >= frame_parms->ofdm_symbol_size)
k -= frame_parms->ofdm_symbol_size;
@@ -425,8 +367,9 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx,
remaining_re = upper_limit + start_sc - frame_parms->ofdm_symbol_size;
upper_limit = frame_parms->ofdm_symbol_size - start_sc;
}
// fix the alignment issues later, use 64-bit SIMD below instead of 128.
if (0/*(frame_parms->N_RB_DL&1)==0*/) {
__m128i *txF=(__m128i*)&txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size+start_sc+txdataF_offset)<<1)];
__m128i *txF=(__m128i*)&txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size+start_sc)<<1)];
__m128i *txl = (__m128i*)&tx_layers[ap][m<<1];
__m128i amp128=_mm_set1_epi16(amp);
@@ -435,7 +378,7 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx,
} //RE loop, first part
m+=upper_limit;
if (remaining_re > 0) {
txF = (__m128i*)&txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size+txdataF_offset)<<1)];
txF = (__m128i*)&txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size)<<1)];
txl = (__m128i*)&tx_layers[ap][m<<1];
for (int i=0; i<(remaining_re>>2); i++) {
txF[i] = _mm_mulhrs_epi16(amp128,txl[i]);
@@ -443,7 +386,7 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx,
}
}
else {
__m64 *txF=(__m64*)&txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size+start_sc+txdataF_offset)<<1)];
__m64 *txF=(__m64*)&txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size+start_sc)<<1)];
__m64 *txl = (__m64*)&tx_layers[ap][m<<1];
__m64 amp64=_mm_set1_pi16(amp);
@@ -453,31 +396,31 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx,
#ifdef DEBUG_DLSCH_MAPPING
if ((i&1) > 0)
printf("m %d\t l %d \t k %d \t txdataF: %d %d\n",
m, l, start_sc+(i>>1), txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + start_sc+(i>>1))<<1) + (2*txdataF_offset)],
txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + start_sc+(i>>1))<<1) + 1 + (2*txdataF_offset)]);
m, l, start_sc+(i>>1), txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + start_sc+(i>>1))<<1)],
txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + start_sc+(i>>1))<<1) + 1]);
#endif
/* handle this, mute RE */
/*else {
txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)] = 0;
txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)] = 0;
txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) ] = 0;
txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + 1] = 0;
}*/
} //RE loop, first part
m+=upper_limit;
if (remaining_re > 0) {
txF = (__m64*)&txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size+txdataF_offset)<<1)];
txF = (__m64*)&txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size)<<1)];
txl = (__m64*)&tx_layers[ap][m<<1];
for (int i=0; i<(remaining_re>>1); i++) {
txF[i] = _mm_mulhrs_pi16(amp64,txl[i]);
#ifdef DEBUG_DLSCH_MAPPING
if ((i&1) > 0)
printf("m %d\t l %d \t k %d \t txdataF: %d %d\n",
m, l, i>>1, txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + (i>>1))<<1) + (2*txdataF_offset)],
txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + (i>>1))<<1) + 1 + (2*txdataF_offset)]);
m, l, i>>1, txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + (i>>1))<<1) ],
txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + (i>>1))<<1) + 1]);
#endif
/* handle this, mute RE */
/*else {
txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)] = 0;
txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)] = 0;
txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) ] = 0;
txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + 1] = 0;
}*/
} //RE loop, second part
} //
@@ -514,7 +457,7 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx,
if (pmi == 0) {//unitary Precoding
if(ap<rel15->nrOfLayers)
memcpy((void*)&txdataF[ap][l*frame_parms->ofdm_symbol_size + txdataF_offset + k],
(void*)&txdataF_precoding[ap][2*(l*frame_parms->ofdm_symbol_size + txdataF_offset+ k)],
(void*)&txdataF_precoding[ap][2*(l*frame_parms->ofdm_symbol_size + k)],
NR_NB_SC_PER_RB*sizeof(int32_t));
else
memset((void*)&txdataF[ap][l*frame_parms->ofdm_symbol_size + txdataF_offset + k],
@@ -555,7 +498,7 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx,
}
for (int i=0; i<NR_NB_SC_PER_RB; i++) {
int32_t re_offset = l*frame_parms->ofdm_symbol_size + k;
int32_t precodatatx_F = nr_layer_precoder(txdataF_precoding, W_prec, rel15->nrOfLayers, re_offset+txdataF_offset);
int32_t precodatatx_F = nr_layer_precoder(txdataF_precoding, W_prec, rel15->nrOfLayers, re_offset);
((int16_t*)txdataF[ap])[(re_offset<<1) + (2*txdataF_offset)] = ((int16_t *) &precodatatx_F)[0];
((int16_t*)txdataF[ap])[(re_offset<<1) + 1 + (2*txdataF_offset)] = ((int16_t *) &precodatatx_F)[1];
#ifdef DEBUG_DLSCH_MAPPING
-2
View File
@@ -43,8 +43,6 @@ void nr_check_time_alloc(uint8_t S, uint8_t L,nfapi_nr_dl_tti_pdsch_pdu_rel15_t
uint16_t get_RIV(uint16_t rb_start, uint16_t L, uint16_t N_RB);
uint16_t get_SLIV(uint8_t S, uint8_t L);
uint8_t nr_get_S(uint8_t row_idx, uint8_t CP, uint8_t time_alloc_type, uint8_t dmrs_typeA_position);
void nr_get_rbg_parms(NR_BWP_PARMS* bwp, uint8_t config_type);
+6 -4
View File
@@ -108,7 +108,7 @@ NR_gNB_DLSCH_t *new_gNB_dlsch(NR_DL_FRAME_PARMS *frame_parms,
a_segments = a_segments/273 +1;
}
uint16_t dlsch_bytes = a_segments*1056; // allocated bytes per segment
uint32_t dlsch_bytes = a_segments*1056; // allocated bytes per segment
NR_gNB_DLSCH_t *dlsch = malloc16(sizeof(NR_gNB_DLSCH_t));
AssertFatal(dlsch, "cannot allocate dlsch\n");
bzero(dlsch,sizeof(NR_gNB_DLSCH_t));
@@ -213,7 +213,7 @@ void ldpc8blocks( void *p) {
for (int rr=impp->macro_num*8; rr < impp->n_segments && rr < (impp->macro_num+1)*8; rr++ ) {
if (impp->F>0) {
// writing into positions d[r][k-2Zc] as in clause 5.3.2 step 2) in 38.212
memset(&impp->d[rr][Kr-impp->F-2*(*impp->Zc)], impp->F, NR_NULL);
memset(&impp->d[rr][Kr-impp->F-2*(*impp->Zc)], NR_NULL, impp->F);
}
#ifdef DEBUG_DLSCH_CODING
@@ -266,6 +266,8 @@ void ldpc8blocks( void *p) {
for (int i =0; i<16; i++)
printf("output interleaving f[%d]= %d r_offset %u\n", i,impp->output[i+r_offset], r_offset);
if (r==impp->n_segments-1)
write_output("enc_output.m","enc",impp->output,G,1,4);
#endif
r_offset += E;
@@ -292,8 +294,8 @@ int nr_dlsch_encoding(PHY_VARS_gNB *gNB,
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_gNB_DLSCH_ENCODING, VCD_FUNCTION_IN);
uint32_t A = rel15->TBSize[0]<<3;
if ( dlsch->rnti != SI_RNTI )
trace_NRpdu(DIRECTION_DOWNLINK, a, rel15->TBSize[0], 0, WS_C_RNTI, dlsch->rnti, frame, slot,0, 0);
if ( rel15->rnti != SI_RNTI)
trace_NRpdu(DIRECTION_DOWNLINK, a, rel15->TBSize[0], 0, WS_C_RNTI, rel15->rnti, frame, slot,0, 0);
NR_gNB_SCH_STATS_t *stats=NULL;
int first_free=-1;
+1 -5
View File
@@ -32,6 +32,7 @@
*/
#include "nr_dlsch.h"
#include "../../../nfapi/oai_integration/vendor_ext.h"
extern void set_taus_seed(unsigned int seed_type);
@@ -96,11 +97,6 @@ void nr_get_time_domain_allocation_type(nfapi_nr_config_request_t config,
}
}
uint16_t get_SLIV(uint8_t S, uint8_t L) {
return ( (uint16_t)(((L-1)<=7)? (14*(L-1)+S) : (14*(15-L)+(13-S))) );
}
static inline uint8_t get_K0(uint8_t row_idx, uint8_t time_alloc_type) {
return ( (time_alloc_type == NFAPI_NR_PDSCH_TIME_DOMAIN_ALLOC_TYPE_DEFAULT_A)||
(time_alloc_type == NFAPI_NR_PDSCH_TIME_DOMAIN_ALLOC_TYPE_DEFAULT_C)? 0 :
+3 -2
View File
@@ -219,8 +219,7 @@ void nr_init_pbch_interleaver(uint8_t *interleaver) {
*(interleaver+i) = *(nr_pbch_payload_interleaving_pattern+j_ssb++);
}
int nr_generate_pbch(NR_gNB_PBCH *pbch,
nfapi_nr_dl_tti_ssb_pdu *ssb_pdu,
int nr_generate_pbch(nfapi_nr_dl_tti_ssb_pdu *ssb_pdu,
uint8_t *interleaver,
int32_t *txdataF,
int16_t amp,
@@ -239,6 +238,8 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch,
uint64_t a_reversed=0;
LOG_D(PHY, "PBCH generation started\n");
///Payload generation
NR_gNB_PBCH m_pbch;
NR_gNB_PBCH *pbch = &m_pbch;
memset((void *)pbch, 0, sizeof(NR_gNB_PBCH));
pbch->pbch_a=0;
uint8_t ssb_index = ssb_pdu->ssb_pdu_rel15.SsbBlockIndex;
+17 -25
View File
@@ -24,55 +24,47 @@
//#define NR_PSS_DEBUG
int nr_generate_pss( int16_t *d_pss,
int32_t *txdataF,
int nr_generate_pss( int32_t *txdataF,
int16_t amp,
uint8_t ssb_start_symbol,
nfapi_nr_config_request_scf_t* config,
NR_DL_FRAME_PARMS *frame_parms)
{
int i,k,l,m;
int16_t a;
int16_t x[NR_PSS_LENGTH];
const int x_initial[7] = {0, 1, 1 , 0, 1, 1, 1};
uint8_t Nid2 = config->cell_config.phy_cell_id.value % 3;
/// Sequence generation
for (i=0; i < 7; i++)
for (int i=0; i < 7; i++)
x[i] = x_initial[i];
for (i=0; i < (NR_PSS_LENGTH - 7); i++) {
for (int i=0; i < (NR_PSS_LENGTH - 7); i++) {
x[i+7] = (x[i + 4] + x[i]) %2;
}
for (i=0; i < NR_PSS_LENGTH; i++) {
m = (i + 43*Nid2)%(NR_PSS_LENGTH);
d_pss[i] = (1 - 2*x[m]) * 23170;
}
#ifdef NR_PSS_DEBUG
write_output("d_pss.m", "d_pss", (void*)d_pss, NR_PSS_LENGTH, 1, 0);
printf("PSS: ofdm_symbol_size %d, first_carrier_offset %d\n",frame_parms->ofdm_symbol_size,frame_parms->first_carrier_offset);
#endif
/// Resource mapping
a = amp;
// PSS occupies a predefined position (subcarriers 56-182, symbol 0) within the SSB block starting from
k = frame_parms->first_carrier_offset + frame_parms->ssb_start_subcarrier + 56; //and
if (k>= frame_parms->ofdm_symbol_size) k-=frame_parms->ofdm_symbol_size;
// PSS occupies a predefined position (subcarriers 56-182, symbol 0) within the SSB block starting from
int k = frame_parms->first_carrier_offset + frame_parms->ssb_start_subcarrier + 56; //and
if (k>= frame_parms->ofdm_symbol_size) k-=frame_parms->ofdm_symbol_size;
l = ssb_start_symbol;
int l = ssb_start_symbol;
for (m = 0; m < NR_PSS_LENGTH; m++) {
// printf("pss: writing position k %d / %d\n",k,frame_parms->ofdm_symbol_size);
((int16_t*)txdataF)[2*(l*frame_parms->ofdm_symbol_size + k)] = (a * d_pss[m]) >> 15;
k++;
uint8_t Nid2 = config->cell_config.phy_cell_id.value % 3;
for (int i = 0; i < NR_PSS_LENGTH; i++) {
int m = (i + 43*Nid2)%(NR_PSS_LENGTH);
int16_t d_pss = (1 - 2*x[m]) * 23170;
// printf("pss: writing position k %d / %d\n",k,frame_parms->ofdm_symbol_size);
((int16_t*)txdataF)[2*(l*frame_parms->ofdm_symbol_size + k)] = (((int16_t)amp) * d_pss) >> 15;
k++;
if (k >= frame_parms->ofdm_symbol_size)
k-=frame_parms->ofdm_symbol_size;
}
if (k >= frame_parms->ofdm_symbol_size)
k-=frame_parms->ofdm_symbol_size;
}
#ifdef NR_PSS_DEBUG
LOG_M("pss_0.m", "pss_0",
+107
View File
@@ -0,0 +1,107 @@
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
#include "nr_transport_common_proto.h"
#include "PHY/NR_REFSIG/nr_refsig.h"
#include "common/utils/LOG/vcd_signal_dumper.h"
void nr_codeword_scrambling(uint8_t *in,
uint32_t size,
uint8_t q,
uint32_t Nid,
uint32_t n_RNTI,
uint32_t* out)
{
uint32_t x1;
uint32_t x2 = (n_RNTI<<15) + (q<<14) + Nid;
uint32_t s = 0;
#if defined(__AVX2__)
s=lte_gold_generic(&x1, &x2, 1);
for (int i=0; i<((size>>5)+((size&0x1f) > 0 ? 1 : 0)); i++) {
__m256i c = ((__m256i*)in)[i];
uint32_t in32 = _mm256_movemask_epi8(_mm256_slli_epi16(c,7));
out[i]=(in32^s);
//printf("in[%d] %x => %x\n",i,in32,out[i]);
s=lte_gold_generic(&x1, &x2, 0);
}
#elif defined(__SSE4__)
s=lte_gold_generic(&x1, &x2, 1);
__m128i *in128;
for (int i=0; i<((size>>5)+((size&0x1f) > 0 ? 1 : 0)); i++) {
in128=&((__m128i*)in)[i<<1];
uint32_t in32;
((uint16_t*)&in32)[0] = _mm_movemask_epi8(_mm_slli_epi16(in128[0],7));
((uint16_t*)&in32)[1] = _mm_movemask_epi8(_mm_slli_epi16(in128[1],7));
out[i]=(in32^s);
s=lte_gold_generic(&x1, &x2, 0);
}
//#elsif defined(__arm__) || defined(__aarch64)
#else
uint8_t reset = 1;
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_gNB_PDSCH_CODEWORD_SCRAMBLING, 1);
for (int i = 0; i < size; i++) {
const uint8_t b_idx = i&0x1f;
if (b_idx==0) {
s = lte_gold_generic(&x1, &x2, reset);
reset = 0;
if (i)
out++;
}
*out ^= (((in[i])&1) ^ ((s>>b_idx)&1))<<b_idx;
//printf("i %d b_idx %d in %d s 0x%08x out 0x%08x\n", i, b_idx, in[i], s, *out);
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_gNB_PDSCH_CODEWORD_SCRAMBLING, 0);
#endif
}
void nr_codeword_unscrambling(int16_t* llr, uint32_t size, uint8_t q, uint32_t Nid, uint32_t n_RNTI)
{
uint32_t x1;
uint32_t x2 = (n_RNTI << 15) + (q << 14) + Nid;
uint32_t s = 0;
#if defined(__x86_64__) || defined(__i386__)
uint8_t *s8=(uint8_t *)&s;
__m128i *llr128 = (__m128i*)llr;
s = lte_gold_generic(&x1, &x2, 1);
for (int i = 0, j = 0; i < ((size >> 5) + ((size & 0x1f) > 0 ? 1 : 0)); i++, j += 4) {
llr128[j] = _mm_mullo_epi16(llr128[j],byte2m128i[s8[0]]);
llr128[j+1] = _mm_mullo_epi16(llr128[j+1],byte2m128i[s8[1]]);
llr128[j+2] = _mm_mullo_epi16(llr128[j+2],byte2m128i[s8[2]]);
llr128[j+3] = _mm_mullo_epi16(llr128[j+3],byte2m128i[s8[3]]);
s = lte_gold_generic(&x1, &x2, 0);
}
#else
uint8_t reset = 1;
for (uint32_t i=0; i<size; i++) {
if ((i&0x1f)==0) {
s = lte_gold_generic(&x1, &x2, reset);
reset = 0;
}
if (((s>>(i&0x1f))&1)==1)
llr[i] = -llr[i];
}
#endif
}
+20 -27
View File
@@ -23,42 +23,34 @@
//#define NR_SSS_DEBUG
int nr_generate_sss( int16_t *d_sss,
int32_t *txdataF,
int nr_generate_sss( int32_t *txdataF,
int16_t amp,
uint8_t ssb_start_symbol,
nfapi_nr_config_request_scf_t* config,
NR_DL_FRAME_PARMS *frame_parms)
{
int i,k,l;
int m0, m1;
int Nid, Nid1, Nid2;
//int16_t a;
int16_t x0[NR_SSS_LENGTH], x1[NR_SSS_LENGTH];
int16_t x0[NR_SSS_LENGTH];
int16_t x1[NR_SSS_LENGTH];
const int x0_initial[7] = { 1, 0, 0, 0, 0, 0, 0 };
const int x1_initial[7] = { 1, 0, 0, 0, 0, 0, 0 };
/// Sequence generation
Nid = config->cell_config.phy_cell_id.value;
Nid2 = Nid % 3;
Nid1 = (Nid - Nid2)/3;
int Nid = config->cell_config.phy_cell_id.value;
int Nid2 = Nid % 3;
int Nid1 = (Nid - Nid2)/3;
for ( i=0 ; i < 7 ; i++) {
for (int i=0; i < 7; i++) {
x0[i] = x0_initial[i];
x1[i] = x1_initial[i];
}
for ( i=0 ; i < NR_SSS_LENGTH - 7 ; i++) {
for (int i=0; i < NR_SSS_LENGTH - 7; i++) {
x0[i+7] = (x0[i + 4] + x0[i]) % 2;
x1[i+7] = (x1[i + 1] + x1[i]) % 2;
}
m0 = 15*(Nid1/112) + (5*Nid2);
m1 = Nid1 % 112;
for (i = 0; i < NR_SSS_LENGTH ; i++) {
d_sss[i] = (1 - 2*x0[(i + m0) % NR_SSS_LENGTH] ) * (1 - 2*x1[(i + m1) % NR_SSS_LENGTH] ) * 23170;
}
int m0 = 15*(Nid1/112) + (5*Nid2);
int m1 = Nid1 % 112;
#ifdef NR_SSS_DEBUG
write_output("d_sss.m", "d_sss", (void*)d_sss, NR_SSS_LENGTH, 1, 1);
@@ -66,17 +58,18 @@ int nr_generate_sss( int16_t *d_sss,
/// Resource mapping
// SSS occupies a predefined position (subcarriers 56-182, symbol 2) within the SSB block starting from
k = frame_parms->first_carrier_offset + frame_parms->ssb_start_subcarrier + 56; //and
l = ssb_start_symbol + 2;
// SSS occupies a predefined position (subcarriers 56-182, symbol 2) within the SSB block starting from
int k = frame_parms->first_carrier_offset + frame_parms->ssb_start_subcarrier + 56; //and
int l = ssb_start_symbol + 2;
for (int m = 0; m < NR_SSS_LENGTH; m++) {
((int16_t*)txdataF)[2*(l*frame_parms->ofdm_symbol_size + k)] = (amp * d_sss[m]) >> 15;
k++;
for (int i = 0; i < NR_SSS_LENGTH; i++) {
int16_t d_sss = (1 - 2*x0[(i + m0) % NR_SSS_LENGTH] ) * (1 - 2*x1[(i + m1) % NR_SSS_LENGTH] ) * 23170;
((int16_t*)txdataF)[2*(l*frame_parms->ofdm_symbol_size + k)] = (((int16_t)amp) * d_sss) >> 15;
k++;
if (k >= frame_parms->ofdm_symbol_size)
k-=frame_parms->ofdm_symbol_size;
}
if (k >= frame_parms->ofdm_symbol_size)
k-=frame_parms->ofdm_symbol_size;
}
#ifdef NR_SSS_DEBUG
// write_output("sss_0.m", "sss_0", (void*)txdataF[0][l*frame_parms->ofdm_symbol_size], frame_parms->ofdm_symbol_size, 1, 1);
#endif
@@ -77,6 +77,15 @@ void nr_fill_du(uint16_t N_ZC,uint16_t *prach_root_sequence_map);
void init_nr_prach_tables(int N_ZC);
void nr_codeword_scrambling(uint8_t *in,
uint32_t size,
uint8_t q,
uint32_t Nid,
uint32_t n_RNTI,
uint32_t* out);
void nr_codeword_unscrambling(int16_t* llr, uint32_t size, uint8_t q, uint32_t Nid, uint32_t n_RNTI);
/**@}*/
void init_pucch2_luts(void);
+21 -6
View File
@@ -44,8 +44,7 @@
@param
@returns 0 on success
*/
int nr_generate_pss(int16_t *d_pss,
int32_t *txdataF,
int nr_generate_pss(int32_t *txdataF,
int16_t amp,
uint8_t ssb_start_symbol,
nfapi_nr_config_request_scf_t *config,
@@ -57,8 +56,7 @@ int nr_generate_pss(int16_t *d_pss,
@param
@returns 0 on success
*/
int nr_generate_sss(int16_t *d_sss,
int32_t *txdataF,
int nr_generate_sss(int32_t *txdataF,
int16_t amp,
uint8_t ssb_start_symbol,
nfapi_nr_config_request_scf_t *config,
@@ -83,8 +81,7 @@ int nr_generate_pbch_dmrs(uint32_t *gold_pbch_dmrs,
@param
@returns 0 on success
*/
int nr_generate_pbch(NR_gNB_PBCH *pbch,
nfapi_nr_dl_tti_ssb_pdu *ssb_pdu,
int nr_generate_pbch(nfapi_nr_dl_tti_ssb_pdu *ssb_pdu,
uint8_t *interleaver,
int32_t *txdataF,
int16_t amp,
@@ -310,6 +307,24 @@ int nr_find_pucch(uint16_t rnti,
int slot,
PHY_VARS_gNB *gNB);
NR_gNB_SRS_t *new_gNB_srs(void);
int nr_find_srs(uint16_t rnti,
int frame,
int slot,
PHY_VARS_gNB *gNB);
void nr_fill_srs(PHY_VARS_gNB *gNB,
int frame,
int slot,
nfapi_nr_srs_pdu_t *srs_pdu);
int nr_get_srs_signal(PHY_VARS_gNB *gNB,
int frame,
int slot,
nfapi_nr_srs_pdu_t *srs_pdu,
nr_srs_info_t *nr_srs_info,
int32_t **srs_received_signal);
void init_prach_list(PHY_VARS_gNB *gNB);
void init_prach_ru_list(RU_t *ru);
+3 -54
View File
@@ -33,7 +33,6 @@
#include <stdint.h>
#include "PHY/NR_TRANSPORT/nr_transport_common_proto.h"
#include "PHY/NR_TRANSPORT/nr_ulsch.h"
#include "PHY/NR_REFSIG/nr_refsig.h"
int16_t find_nr_ulsch(uint16_t rnti, PHY_VARS_gNB *gNB,find_type_t type) {
@@ -82,59 +81,9 @@ void nr_fill_ulsch(PHY_VARS_gNB *gNB,
}
void nr_ulsch_unscrambling(int16_t* llr,
uint32_t size,
uint8_t q,
uint32_t Nid,
uint32_t n_RNTI) {
uint8_t reset;
uint32_t x1, x2, s=0;
reset = 1;
x2 = (n_RNTI<<15) + Nid;
for (uint32_t i=0; i<size; i++) {
if ((i&0x1f)==0) {
s = lte_gold_generic(&x1, &x2, reset);
reset = 0;
}
if (((s>>(i&0x1f))&1)==1)
llr[i] = -llr[i];
}
}
void nr_ulsch_unscrambling_optim(int16_t* llr,
uint32_t size,
uint8_t q,
uint32_t Nid,
uint32_t n_RNTI) {
#if defined(__x86_64__) || defined(__i386__)
uint32_t x1, x2, s=0;
x2 = (n_RNTI<<15) + Nid;
uint8_t *s8=(uint8_t *)&s;
__m128i *llr128 = (__m128i*)llr;
int j=0;
s = lte_gold_generic(&x1, &x2, 1);
for (int i=0; i<((size>>5)+((size&0x1f) > 0 ? 1 : 0)); i++,j+=4) {
llr128[j] = _mm_mullo_epi16(llr128[j],byte2m128i[s8[0]]);
llr128[j+1] = _mm_mullo_epi16(llr128[j+1],byte2m128i[s8[1]]);
llr128[j+2] = _mm_mullo_epi16(llr128[j+2],byte2m128i[s8[2]]);
llr128[j+3] = _mm_mullo_epi16(llr128[j+3],byte2m128i[s8[3]]);
s = lte_gold_generic(&x1, &x2, 0);
}
#else
nr_ulsch_unscrambling(llr,
size,
q,
Nid,
n_RNTI);
#endif
void nr_ulsch_unscrambling(int16_t* llr, uint32_t size, uint32_t Nid, uint32_t n_RNTI)
{
nr_codeword_unscrambling(llr, size, 0, Nid, n_RNTI);
}
void dump_pusch_stats(FILE *fd,PHY_VARS_gNB *gNB) {
+1 -12
View File
@@ -69,18 +69,7 @@ uint32_t nr_ulsch_decoding(PHY_VARS_gNB *phy_vars_gNB,
@param n_RNTI, CRNTI
*/
void nr_ulsch_unscrambling(int16_t* llr,
uint32_t size,
uint8_t q,
uint32_t Nid,
uint32_t n_RNTI);
void nr_ulsch_unscrambling_optim(int16_t* llr,
uint32_t size,
uint8_t q,
uint32_t Nid,
uint32_t n_RNTI);
void nr_ulsch_unscrambling(int16_t* llr, uint32_t size, uint32_t Nid, uint32_t n_RNTI);
void nr_ulsch_procedures(PHY_VARS_gNB *gNB,
int frame_rx,
+20 -62
View File
@@ -111,7 +111,7 @@ NR_gNB_ULSCH_t *new_gNB_ulsch(uint8_t max_ldpc_iterations,uint16_t N_RB_UL, uint
{
NR_gNB_ULSCH_t *ulsch;
uint8_t exit_flag = 0,i,r;
uint8_t i,r;
uint16_t a_segments = MAX_NUM_NR_ULSCH_SEGMENTS; //number of segments to be allocated
if (N_RB_UL != 273) {
@@ -119,69 +119,27 @@ NR_gNB_ULSCH_t *new_gNB_ulsch(uint8_t max_ldpc_iterations,uint16_t N_RB_UL, uint
a_segments = a_segments/273 +1;
}
uint16_t ulsch_bytes = a_segments*1056; // allocated bytes per segment
ulsch = (NR_gNB_ULSCH_t *)malloc16(sizeof(NR_gNB_ULSCH_t));
if (ulsch) {
memset(ulsch,0,sizeof(NR_gNB_ULSCH_t));
ulsch->max_ldpc_iterations = max_ldpc_iterations;
ulsch->Mlimit = 4;
for (i=0; i<NR_MAX_ULSCH_HARQ_PROCESSES; i++) {
ulsch->harq_processes[i] = (NR_UL_gNB_HARQ_t *)malloc16(sizeof(NR_UL_gNB_HARQ_t));
if (ulsch->harq_processes[i]) {
memset(ulsch->harq_processes[i],0,sizeof(NR_UL_gNB_HARQ_t));
ulsch->harq_processes[i]->b = (uint8_t*)malloc16(ulsch_bytes);
if (ulsch->harq_processes[i]->b)
memset(ulsch->harq_processes[i]->b,0,ulsch_bytes);
else
exit_flag=3;
if (abstraction_flag == 0) {
for (r=0; r<a_segments; r++) {
ulsch->harq_processes[i]->p_nrLDPC_procBuf[r] = nrLDPC_init_mem();
ulsch->harq_processes[i]->c[r] = (uint8_t*)malloc16(8448*sizeof(uint8_t));
if (ulsch->harq_processes[i]->c[r])
memset(ulsch->harq_processes[i]->c[r],0,8448*sizeof(uint8_t));
else
exit_flag=2;
ulsch->harq_processes[i]->d[r] = (int16_t*)malloc16((68*384)*sizeof(int16_t));
if (ulsch->harq_processes[i]->d[r])
memset(ulsch->harq_processes[i]->d[r],0,(68*384)*sizeof(int16_t));
else
exit_flag=2;
ulsch->harq_processes[i]->w[r] = (int16_t*)malloc16((3*(6144+64))*sizeof(int16_t));
if (ulsch->harq_processes[i]->w[r])
memset(ulsch->harq_processes[i]->w[r],0,(3*(6144+64))*sizeof(int16_t));
else
exit_flag=2;
}
}
} else {
exit_flag=1;
uint32_t ulsch_bytes = a_segments*1056; // allocated bytes per segment
ulsch = (NR_gNB_ULSCH_t *)malloc16_clear(sizeof(NR_gNB_ULSCH_t));
ulsch->max_ldpc_iterations = max_ldpc_iterations;
ulsch->Mlimit = 4;
for (i=0; i<NR_MAX_ULSCH_HARQ_PROCESSES; i++) {
ulsch->harq_processes[i] = (NR_UL_gNB_HARQ_t *)malloc16_clear(sizeof(NR_UL_gNB_HARQ_t));
ulsch->harq_processes[i]->b = (uint8_t*)malloc16_clear(ulsch_bytes);
if (abstraction_flag == 0) {
for (r=0; r<a_segments; r++) {
ulsch->harq_processes[i]->p_nrLDPC_procBuf[r] = nrLDPC_init_mem();
ulsch->harq_processes[i]->c[r] = (uint8_t*)malloc16_clear(8448*sizeof(uint8_t));
ulsch->harq_processes[i]->d[r] = (int16_t*)malloc16_clear((68*384)*sizeof(int16_t));
ulsch->harq_processes[i]->w[r] = (int16_t*)malloc16_clear((3*(6144+64))*sizeof(int16_t));
}
}
if (exit_flag==0)
return(ulsch);
}
printf("new_gNB_ulsch with size %zu: exit_flag = %hhu\n",sizeof(NR_UL_gNB_HARQ_t), exit_flag);
free_gNB_ulsch(&ulsch,N_RB_UL);
return(NULL);
return(ulsch);
}
void clean_gNB_ulsch(NR_gNB_ULSCH_t *ulsch)
@@ -505,7 +463,7 @@ uint32_t nr_ulsch_decoding(PHY_VARS_gNB *phy_vars_gNB,
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_gNB_ULSCH_DECODING,1);
harq_process->TBS = pusch_pdu->pusch_data.tb_size;
harq_process->round = nr_rv_round_map[pusch_pdu->pusch_data.rv_index];
harq_process->round = nr_rv_to_round(pusch_pdu->pusch_data.rv_index);
harq_process->new_rx = false; // flag to indicate if this is a new reception for this harq (initialized to false)
if (harq_process->round == 0) {
@@ -1174,7 +1174,7 @@ int nr_rx_pusch(PHY_VARS_gNB *gNB,
uint8_t aarx, aatx;
uint32_t nb_re_pusch, bwp_start_subcarrier;
int avgs;
int avgs = 0;
NR_DL_FRAME_PARMS *frame_parms = &gNB->frame_parms;
nfapi_nr_pusch_pdu_t *rel15_ul = &gNB->ulsch[ulsch_id][0]->harq_processes[harq_pid]->ulsch_pdu;
+4 -2
View File
@@ -47,6 +47,7 @@
#include "PHY/NR_REFSIG/nr_refsig.h"
#include "common/utils/LOG/log.h"
#include "common/utils/LOG/vcd_signal_dumper.h"
#include "nfapi/oai_integration/vendor_ext.h"
#include "nfapi/oai_integration/vendor_ext.h"
@@ -88,7 +89,8 @@ void nr_fill_pucch(PHY_VARS_gNB *gNB,
int frame,
int slot,
nfapi_nr_pucch_pdu_t *pucch_pdu) {
if (NFAPI_MODE == NFAPI_MODE_PNF)
gNB->pucch[0]->active = 0; //check if ture in monolithic mode
int id = nr_find_pucch(pucch_pdu->rnti,frame,slot,gNB);
AssertFatal( (id>=0) && (id<NUMBER_OF_NR_PUCCH_MAX),
"invalid id found for pucch !!! rnti %04x id %d\n",pucch_pdu->rnti,id);
@@ -300,7 +302,7 @@ void nr_decode_pucch0(PHY_VARS_gNB *gNB,
int32_t corr_re[1+frame_parms->nb_antennas_rx][2];
int32_t corr_im[1+frame_parms->nb_antennas_rx][2];
//int32_t no_corr = 0;
int seq_index;
int seq_index = 0;
int64_t temp;
for(i=0;i<nr_sequences;i++){
+139
View File
@@ -0,0 +1,139 @@
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
/*! \file PHY/NR_TRANSPORT/srs_rx.c
* \brief Top-level routines for getting the SRS physical channel
* \date 2021
* \version 1.0
*/
#include <stdio.h>
#include <string.h>
#include <unistd.h>
#include <fcntl.h>
#include "PHY/impl_defs_nr.h"
#include "PHY/defs_nr_common.h"
#include "PHY/defs_gNB.h"
#include <openair1/PHY/CODING/nrSmallBlock/nr_small_block_defs.h>
#include "common/utils/LOG/log.h"
#include "nfapi/oai_integration/vendor_ext.h"
#include "T.h"
//#define SRS_DEBUG
NR_gNB_SRS_t *new_gNB_srs(void){
NR_gNB_SRS_t *srs;
srs = (NR_gNB_SRS_t *)malloc16(sizeof(NR_gNB_SRS_t));
srs->active = 0;
return (srs);
}
int nr_find_srs(uint16_t rnti,
int frame,
int slot,
PHY_VARS_gNB *gNB) {
AssertFatal(gNB!=NULL,"gNB is null\n");
int index = -1;
for (int i=0; i<NUMBER_OF_NR_SRS_MAX; i++) {
AssertFatal(gNB->srs[i]!=NULL,"gNB->srs[%d] is null\n",i);
if ((gNB->srs[i]->active>0) &&
(gNB->srs[i]->srs_pdu.rnti==rnti) &&
(gNB->srs[i]->frame==frame) &&
(gNB->srs[i]->slot==slot)) return(i);
else if ((gNB->srs[i]->active == 0) && (index==-1)) index=i;
}
if (index==-1)
LOG_E(MAC,"SRS list is full\n");
return(index);
}
void nr_fill_srs(PHY_VARS_gNB *gNB,
int frame,
int slot,
nfapi_nr_srs_pdu_t *srs_pdu) {
int id = nr_find_srs(srs_pdu->rnti,frame,slot,gNB);
AssertFatal( (id>=0) && (id<NUMBER_OF_NR_SRS_MAX),
"invalid id found for srs !!! rnti %04x id %d\n",srs_pdu->rnti,id);
NR_gNB_SRS_t *srs = gNB->srs[id];
srs->frame = frame;
srs->slot = slot;
srs->active = 1;
memcpy((void*)&srs->srs_pdu, (void*)srs_pdu, sizeof(nfapi_nr_srs_pdu_t));
}
int nr_get_srs_signal(PHY_VARS_gNB *gNB,
int frame,
int slot,
nfapi_nr_srs_pdu_t *srs_pdu,
nr_srs_info_t *nr_srs_info,
int32_t **srs_received_signal) {
if(nr_srs_info->sc_list_length == 0) {
LOG_E(NR_PHY, "(%d.%d) nr_srs_info was not generated yet!\n", frame, slot);
return -1;
}
int32_t **rxdataF = gNB->common_vars.rxdataF;
NR_DL_FRAME_PARMS *frame_parms = &gNB->frame_parms;
uint16_t n_symbols = (slot&3)*frame_parms->symbols_per_slot; // number of symbols until this slot
uint8_t l0 = frame_parms->symbols_per_slot - 1 - srs_pdu->time_start_position; // starting symbol in this slot
uint64_t symbol_offset = (n_symbols+l0)*frame_parms->ofdm_symbol_size;
int32_t *rx_signal;
for (int ant = 0; ant < frame_parms->nb_antennas_rx; ant++) {
memset(srs_received_signal[ant], 0, frame_parms->ofdm_symbol_size*sizeof(int32_t));
rx_signal = &rxdataF[ant][symbol_offset];
for(int sc_idx = 0; sc_idx < nr_srs_info->sc_list_length; sc_idx++) {
srs_received_signal[ant][nr_srs_info->sc_list[sc_idx]] = rx_signal[nr_srs_info->sc_list[sc_idx]];
#ifdef SRS_DEBUG
uint64_t subcarrier_offset = frame_parms->first_carrier_offset + srs_pdu->bwp_start*12;
int subcarrier_log = nr_srs_info->sc_list[sc_idx]-subcarrier_offset;
if(subcarrier_log < 0) {
subcarrier_log = subcarrier_log + frame_parms->ofdm_symbol_size;
}
if(sc_idx == 0) {
LOG_I(NR_PHY,"________ Rx antenna %i ________\n", ant);
}
if(subcarrier_log%12 == 0) {
LOG_I(NR_PHY,"::::::::::::: %i :::::::::::::\n", subcarrier_log/12);
}
LOG_I(NR_PHY,"(%i) \t%i\t%i\n",
subcarrier_log,
(int16_t)(srs_received_signal[ant][nr_srs_info->sc_list[sc_idx]]&0xFFFF),
(int16_t)((srs_received_signal[ant][nr_srs_info->sc_list[sc_idx]]>>16)&0xFFFF));
#endif
}
}
return 0;
}
@@ -260,3 +260,26 @@ short filt8_avlip5[8] = {
short filt8_avlip6[8] = {
13653,15019,16384,16384,16384,16384,16384,16384};
// Comb size 2
short filt8_start[8] = {
12288,8192,4096,0,0,0,0,0};
short filt8_middle2[8] = {
4096,8192,8192,8192,4096,0,0,0};
short filt8_middle4[8] = {
0,0,4096,8192,8192,8192,4096,0};
short filt8_end[8] = {
4096,8192,12288,16384,0,0,0,0};
// Comb size 4
short filt16_start[16] = {
12288,8192,8192,8192,4096,0,0,0,0,0,0,0,0,0,0,0};
short filt16_middle4[16] = {
4096,8192,8192,8192,8192,8192,8192,8192,4096,0,0,0,0,0,0,0};
short filt16_end[16] = {
4096,8192,8192,8192,12288,16384,16384,16384,0,0,0,0,0,0,0,0};
@@ -182,4 +182,15 @@ extern short filt8_avlip4[8];
extern short filt8_avlip5[8];
extern short filt8_avlip6[8];
/*Comb size 2*/
extern short filt8_start[8];
extern short filt8_middle2[8];
extern short filt8_middle4[8];
extern short filt8_end[8];
/*Comb size 4*/
extern short filt16_start[16];
extern short filt16_middle4[16];
extern short filt16_end[16];
#endif
@@ -141,7 +141,7 @@ NR_UE_DLSCH_t *new_nr_ue_dlsch(uint8_t Kmimo,uint8_t Mdlharq,uint32_t Nsoft,uint
a_segments = (a_segments/273)+1;
}
uint16_t dlsch_bytes = a_segments*1056; // allocated bytes per segment
uint32_t dlsch_bytes = a_segments*1056; // allocated bytes per segment
dlsch = (NR_UE_DLSCH_t *)malloc16(sizeof(NR_UE_DLSCH_t));
if (dlsch) {
@@ -206,25 +206,9 @@ NR_UE_DLSCH_t *new_nr_ue_dlsch(uint8_t Kmimo,uint8_t Mdlharq,uint32_t Nsoft,uint
return(NULL);
}
void nr_dlsch_unscrambling(int16_t *llr,
uint32_t size,
uint8_t q,
uint32_t Nid,
uint32_t n_RNTI) {
uint8_t reset;
uint32_t x1, x2, s=0;
reset = 1;
x2 = (n_RNTI<<15) + (q<<14) + Nid;
for (int i=0; i<size; i++) {
if ((i&0x1f)==0) {
s = lte_gold_generic(&x1, &x2, reset);
reset = 0;
}
if (((s>>(i&0x1f))&1)==1)
llr[i] = -llr[i];
}
void nr_dlsch_unscrambling(int16_t *llr, uint32_t size, uint8_t q, uint32_t Nid, uint32_t n_RNTI)
{
nr_codeword_unscrambling(llr, size, q, Nid, n_RNTI);
}
bool nr_ue_postDecode(PHY_VARS_NR_UE *phy_vars_ue, notifiedFIFO_elt_t *req, bool last, notifiedFIFO_t *nf_p) {
@@ -233,6 +217,10 @@ bool nr_ue_postDecode(PHY_VARS_NR_UE *phy_vars_ue, notifiedFIFO_elt_t *req, bool
NR_UE_DLSCH_t *dlsch = (NR_UE_DLSCH_t *) rdata->dlsch;
int r = rdata->segment_r;
merge_meas(&phy_vars_ue->dlsch_deinterleaving_stats, &rdata->ts_deinterleave);
merge_meas(&phy_vars_ue->dlsch_rate_unmatching_stats, &rdata->ts_rate_unmatch);
merge_meas(&phy_vars_ue->dlsch_ldpc_decoding_stats, &rdata->ts_ldpc_decode);
bool decodeSuccess = (rdata->decodeIterations < (1+dlsch->max_ldpc_iterations));
if (decodeSuccess) {
@@ -271,7 +259,6 @@ bool nr_ue_postDecode(PHY_VARS_NR_UE *phy_vars_ue, notifiedFIFO_elt_t *req, bool
//LOG_D(PHY,"[UE %d] DLSCH: Setting NAK for SFN/SF %d/%d (pid %d, status %d, round %d, TBS %d, mcs %d) Kr %d r %d harq_process->round %d\n",
// phy_vars_ue->Mod_id, frame, nr_slot_rx, harq_pid,harq_process->status, harq_process->round,harq_process->TBS,harq_process->mcs,Kr,r,harq_process->round);
harq_process->ack = 0;
harq_process->round++;
if (harq_process->round >= dlsch->Mlimit) {
harq_process->status = SCH_IDLE;
harq_process->round = 0;
@@ -296,12 +283,6 @@ bool nr_ue_postDecode(PHY_VARS_NR_UE *phy_vars_ue, notifiedFIFO_elt_t *req, bool
void nr_processDLSegment(void* arg) {
ldpcDecode_ue_t *rdata = (ldpcDecode_ue_t*) arg;
NR_UE_DLSCH_t *dlsch = rdata->dlsch;
#if UE_TIMING_TRACE //TBD
PHY_VARS_NR_UE *phy_vars_ue = rdata->phy_vars_ue;
time_stats_t *dlsch_rate_unmatching_stats=&phy_vars_ue->dlsch_rate_unmatching_stats;
time_stats_t *dlsch_turbo_decoding_stats=&phy_vars_ue->dlsch_turbo_decoding_stats;
time_stats_t *dlsch_deinterleaving_stats=&phy_vars_ue->dlsch_deinterleaving_stats;
#endif
NR_DL_UE_HARQ_t *harq_process= rdata->harq_process;
t_nrLDPC_dec_params *p_decoderParms = &rdata->decoderParms;
int length_dec;
@@ -330,7 +311,7 @@ void nr_processDLSegment(void* arg) {
__m128i *pv = (__m128i*)&z;
__m128i *pl = (__m128i*)&l;
uint8_t Ilbrm = 0;
uint8_t Ilbrm = 1;
Kr = harq_process->K; // [hna] overwrites this line "Kr = p_decParams->Z*kb"
Kr_bytes = Kr>>3;
@@ -341,21 +322,16 @@ void nr_processDLSegment(void* arg) {
t_nrLDPC_procBuf **p_nrLDPC_procBuf = harq_process->p_nrLDPC_procBuf;
#if UE_TIMING_TRACE
start_meas(dlsch_deinterleaving_stats);
#endif
start_meas(&rdata->ts_deinterleave);
//VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_DLSCH_DEINTERLEAVING, VCD_FUNCTION_IN);
nr_deinterleaving_ldpc(E,
Qm,
harq_process->w[r], // [hna] w is e
dlsch_llr+r_offset);
//VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_DLSCH_DEINTERLEAVING, VCD_FUNCTION_OUT);
#if UE_TIMING_TRACE
stop_meas(dlsch_deinterleaving_stats);
#endif
#if UE_TIMING_TRACE
start_meas(dlsch_rate_unmatching_stats);
#endif
stop_meas(&rdata->ts_deinterleave);
start_meas(&rdata->ts_rate_unmatch);
/* LOG_D(PHY,"HARQ_PID %d Rate Matching Segment %d (coded bits %d,E %d, F %d,unpunctured/repeated bits %d, TBS %d, mod_order %d, nb_rb %d, Nl %d, rv %d, round %d)...\n",
harq_pid,r, G,E,harq_process->F,
Kr*3,
@@ -380,22 +356,17 @@ void nr_processDLSegment(void* arg) {
harq_process->F,
Kr-harq_process->F-2*(p_decoderParms->Z))==-1) {
//VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_DLSCH_RATE_MATCHING, VCD_FUNCTION_OUT);
#if UE_TIMING_TRACE
stop_meas(dlsch_rate_unmatching_stats);
#endif
stop_meas(&rdata->ts_rate_unmatch);
LOG_E(PHY,"dlsch_decoding.c: Problem in rate_matching\n");
rdata->decodeIterations = dlsch->max_ldpc_iterations + 1;
return;
} else {
#if UE_TIMING_TRACE
stop_meas(dlsch_rate_unmatching_stats);
#endif
return;
}
stop_meas(&rdata->ts_rate_unmatch);
r_offset += E;
if (LOG_DEBUGFLAG(DEBUG_DLSCH_DECOD)) {
LOG_I(PHY,"decoder input(segment %u) :",r);
LOG_D(PHY,"decoder input(segment %u) :",r);
for (int i=0; i<E; i++)
LOG_D(PHY,"%d : %d\n",i,harq_process->d[r][i]);
@@ -418,9 +389,7 @@ void nr_processDLSegment(void* arg) {
}
{
#if UE_TIMING_TRACE
start_meas(dlsch_turbo_decoding_stats);
#endif
start_meas(&rdata->ts_ldpc_decode);
//set first 2*Z_c bits to zeros
memset(&z[0],0,2*harq_process->Z*sizeof(int16_t));
//set Filler bits
@@ -470,9 +439,7 @@ void nr_processDLSegment(void* arg) {
harq_process->c[r][m]= (uint8_t) llrProcBuf[m];
}
#if UE_TIMING_TRACE
stop_meas(dlsch_turbo_decoding_stats);
#endif
stop_meas(&rdata->ts_ldpc_decode);
}
}
@@ -503,6 +470,7 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
// HARQ stats
phy_vars_ue->dl_stats[harq_process->round]++;
LOG_D(PHY,"Round %d RV idx %d\n",harq_process->round,harq_process->rvidx);
uint8_t kc;
uint32_t Tbslbrm;// = 950984;
uint16_t nb_rb;// = 30;
@@ -642,7 +610,6 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
if (LOG_DEBUGFLAG(DEBUG_DLSCH_DECOD))
LOG_I(PHY,"Segmentation: C %d, K %d\n",harq_process->C,harq_process->K);
opp_enabled=1;
Kr = harq_process->K; // [hna] overwrites this line "Kr = p_decParams->Z*kb"
Kr_bytes = Kr>>3;
offset = 0;
@@ -674,6 +641,9 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
rdata->offset = offset;
rdata->dlsch = dlsch;
rdata->dlsch_id = 0;
reset_meas(&rdata->ts_deinterleave);
reset_meas(&rdata->ts_rate_unmatch);
reset_meas(&rdata->ts_ldpc_decode);
pushTpool(&(pool_dl),req);
nbDecode++;
LOG_D(PHY,"Added a block to decode, in pipe: %d\n",nbDecode);
@@ -32,9 +32,6 @@
#include "PHY/phy_extern_nr_ue.h"
#include "PHY/NR_TRANSPORT/nr_transport_proto.h"
#include "nr_transport_proto_ue.h"
//#include "SCHED/defs.h"
//#include "PHY/defs.h"
//#include "extern.h"
#include "PHY/sse_intrin.h"
#include "T.h"
#include "openair1/PHY/NR_UE_ESTIMATION/nr_estimation.h"
@@ -379,13 +376,10 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
len = (pilots==1)? ((config_type==NFAPI_NR_DMRS_TYPE1)?nb_rb*(12-6*dlsch0_harq->n_dmrs_cdm_groups): nb_rb*(12-4*dlsch0_harq->n_dmrs_cdm_groups)):(nb_rb*12);
stop_meas(&ue->generic_stat_bis[proc->thread_id][slot]);
#if DISABLE_LOG_X
printf("[AbsSFN %u.%d] Slot%d Symbol %d type %d: Pilot/Data extraction %5.2f \n",
frame,nr_slot_rx,slot,symbol,type,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0));
#else
LOG_D(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d type %d: Pilot/Data extraction %5.2f \n",
frame,nr_slot_rx,slot,symbol,type,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0));
#endif
if (cpumeas(CPUMEAS_GETSTATE))
LOG_D(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d type %d: Pilot/Data extraction %5.2f \n",
frame,nr_slot_rx,slot,symbol,type,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0));
start_meas(&ue->generic_stat_bis[proc->thread_id][slot]);
n_tx = dlsch0_harq->Nl;
@@ -402,11 +396,9 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
nb_rb_pdsch);
stop_meas(&ue->generic_stat_bis[proc->thread_id][slot]);
#if DISABLE_LOG_X
printf("[AbsSFN %u.%d] Slot%d Symbol %d: Channel Scale %5.2f \n",frame,nr_slot_rx,slot,symbol,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0));
#else
LOG_D(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d: Channel Scale %5.2f \n",frame,nr_slot_rx,slot,symbol,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0));
#endif
if (cpumeas(CPUMEAS_GETSTATE))
LOG_D(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d: Channel Scale %5.2f \n",frame,nr_slot_rx,slot,symbol,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0));
start_meas(&ue->generic_stat_bis[proc->thread_id][slot]);
if (first_symbol_flag==1) {
if (beamforming_mode==0){
@@ -463,11 +455,8 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
#endif
stop_meas(&ue->generic_stat_bis[proc->thread_id][slot]);
#if DISABLE_LOG_X
printf("[AbsSFN %u.%d] Slot%d Symbol %d first_symbol_flag %d: Channel Level %5.2f \n",frame,nr_slot_rx,slot,symbol,first_symbol_flag,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0));
#else
LOG_D(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d first_symbol_flag %d: Channel Level %5.2f \n",frame,nr_slot_rx,slot,symbol,first_symbol_flag,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0));
#endif
if (cpumeas(CPUMEAS_GETSTATE))
LOG_D(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d first_symbol_flag %d: Channel Level %5.2f \n",frame,nr_slot_rx,slot,symbol,first_symbol_flag,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0));
start_meas(&ue->generic_stat_bis[proc->thread_id][slot]);
// Now channel compensation
@@ -515,11 +504,9 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
}
stop_meas(&ue->generic_stat_bis[proc->thread_id][slot]);
#if DISABLE_LOG_X
printf("[AbsSFN %u.%d] Slot%d Symbol %d log2_maxh %d channel_level %d: Channel Comp %5.2f \n", frame, nr_slot_rx, slot, symbol, pdsch_vars[gNB_id]->log2_maxh, proc->channel_level, ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0));
#else
LOG_D(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d log2_maxh %d channel_level %d: Channel Comp %5.2f \n", frame, nr_slot_rx, slot, symbol, pdsch_vars[gNB_id]->log2_maxh, proc->channel_level, ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0));
#endif
if (cpumeas(CPUMEAS_GETSTATE))
LOG_D(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d log2_maxh %d channel_level %d: Channel Comp %5.2f \n", frame, nr_slot_rx, slot, symbol, pdsch_vars[gNB_id]->log2_maxh, proc->channel_level, ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0));
start_meas(&ue->generic_stat_bis[proc->thread_id][slot]);
if (frame_parms->nb_antennas_rx > 1) {
@@ -574,11 +561,9 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
}
stop_meas(&ue->generic_stat_bis[proc->thread_id][slot]);
#if DISABLE_LOG_X
printf("[AbsSFN %u.%d] Slot%d Symbol %d: Channel Combine %5.2f \n",frame,nr_slot_rx,slot,symbol,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0));
#else
LOG_D(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d: Channel Combine %5.2f \n",frame,nr_slot_rx,slot,symbol,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0));
#endif
if (cpumeas(CPUMEAS_GETSTATE))
LOG_D(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d: Channel Combine %5.2f \n",frame,nr_slot_rx,slot,symbol,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0));
start_meas(&ue->generic_stat_bis[proc->thread_id][slot]);
/* Store the valid DL RE's */
pdsch_vars[gNB_id]->dl_valid_re[symbol-1] = len;
@@ -657,11 +642,8 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
}
stop_meas(&ue->generic_stat_bis[proc->thread_id][slot]);
#if DISABLE_LOG_X
printf("[AbsSFN %u.%d] Slot%d Symbol %d: LLR Computation %5.2f \n",frame,nr_slot_rx,slot,symbol,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0));
#else
LOG_D(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d: LLR Computation %5.2f \n",frame,nr_slot_rx,slot,symbol,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0));
#endif
if (cpumeas(CPUMEAS_GETSTATE))
LOG_D(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d: LLR Computation %5.2f \n",frame,nr_slot_rx,slot,symbol,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0));
// Please keep it: useful for debugging
#ifdef DEBUG_PDSCH_RX
@@ -947,7 +947,7 @@ void nr_dlsch_64qam_llr_SIC(NR_DL_FRAME_PARMS *frame_parms,
symbol_mod = (symbol>=(7-frame_parms->Ncp)) ? symbol-(7-frame_parms->Ncp) : symbol;
pbch_pss_sss_adjust=adjust_G2(frame_parms,&rb_alloc,6,subframe,symbol);
pbch_pss_sss_adjust=adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,&rb_alloc,6,subframe,symbol);
if ((symbol_mod==0) || (symbol_mod==(4-frame_parms->Ncp))) {
amp_tmp = 0x1fff;//dlsch0->sqrt_rho_b; already taken into account
+4 -12
View File
@@ -196,8 +196,7 @@ char prefix_string[2][9] = {"NORMAL","EXTENDED"};
int nr_initial_sync(UE_nr_rxtx_proc_t *proc,
PHY_VARS_NR_UE *ue,
int n_frames, int sa,
int dlsch_parallel)
int n_frames, int sa)
{
int32_t sync_pos, sync_pos_frame; // k_ssb, N_ssb_crb, sync_pos2,
@@ -353,21 +352,15 @@ int nr_initial_sync(UE_nr_rxtx_proc_t *proc,
if( (abs(ue->common_vars.freq_offset) > 150) && (ret == 0) )
{
ret=-1;
#if DISABLE_LOG_X
printf("Ignore MIB with high freq offset [%d Hz] estimation \n",ue->common_vars.freq_offset);
#else
LOG_E(HW, "Ignore MIB with high freq offset [%d Hz] estimation \n",ue->common_vars.freq_offset);
#endif
}*/
if (ret==0) { // PBCH found so indicate sync to higher layers and configure frame parameters
//#ifdef DEBUG_INITIAL_SYNCH
#if DISABLE_LOG_X
printf("[UE%d] In synch, rx_offset %d samples\n",ue->Mod_id, ue->rx_offset);
#else
LOG_I(PHY, "[UE%d] In synch, rx_offset %d samples\n",ue->Mod_id, ue->rx_offset);
#endif
//#endif
if (ue->UE_scan_carrier == 0) {
@@ -534,8 +527,7 @@ int nr_initial_sync(UE_nr_rxtx_proc_t *proc,
SI_PDSCH,
ue->dlsch_SI[gnb_id],
NULL,
&ue->dlsch_SI_errors[gnb_id],
dlsch_parallel);
&ue->dlsch_SI_errors[gnb_id]);
// deactivate dlsch once dlsch proc is done
ue->dlsch_SI[gnb_id]->active = 0;
+3 -3
View File
@@ -601,11 +601,11 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
#endif
nr_downlink_indication_t dl_indication;
fapi_nr_rx_indication_t rx_ind;
fapi_nr_rx_indication_t *rx_ind = calloc(1, sizeof(*rx_ind));
uint16_t number_pdus = 1;
nr_fill_dl_indication(&dl_indication, NULL, &rx_ind, proc, ue, gNB_id);
nr_fill_rx_indication(&rx_ind, FAPI_NR_RX_PDU_TYPE_SSB, gNB_id, ue, NULL, NULL, number_pdus);
nr_fill_dl_indication(&dl_indication, NULL, rx_ind, proc, ue, gNB_id);
nr_fill_rx_indication(rx_ind, FAPI_NR_RX_PDU_TYPE_SSB, gNB_id, ue, NULL, NULL, number_pdus, proc);
if (ue->if_inst && ue->if_inst->dl_indication)
ue->if_inst->dl_indication(&dl_indication, NULL);
@@ -1055,14 +1055,15 @@ int nr_ulsch_encoding(PHY_VARS_NR_UE *ue,
@param[in] size, of input bits
@param[in] Nid, cell id
@param[in] n_RNTI, CRNTI
@param[in] uci_on_pusch whether UCI placeholder bits need to be scrambled (true -> no optimized scrambling)
@param[out] out, the scrambled bits
*/
void nr_pusch_codeword_scrambling(uint8_t *in,
uint32_t size,
uint32_t Nid,
uint32_t n_RNTI,
uint32_t* out);
uint32_t size,
uint32_t Nid,
uint32_t n_RNTI,
bool uci_on_pusch,
uint32_t* out);
/** \brief Perform the following functionalities:
- encoding
@@ -1286,8 +1287,8 @@ uint8_t get_transmission_mode(module_id_t Mod_id, uint8_t CC_id, rnti_t rnti);
*/
uint32_t conv_nprb(uint8_t ra_header,uint32_t rb_alloc,int N_RB_DL);
int adjust_G(NR_DL_FRAME_PARMS *frame_parms,uint32_t *rb_alloc,uint8_t mod_order,uint8_t subframe);
int adjust_G2(NR_DL_FRAME_PARMS *frame_parms,uint32_t *rb_alloc,uint8_t mod_order,uint8_t subframe,uint8_t symbol);
//int adjust_G(NR_DL_FRAME_PARMS *frame_parms,uint32_t *rb_alloc,uint8_t mod_order,uint8_t subframe);
//int adjust_G2(NR_DL_FRAME_PARMS *frame_parms,uint32_t *rb_alloc,uint8_t mod_order,uint8_t subframe,uint8_t symbol);
#ifndef modOrder
@@ -1313,16 +1314,6 @@ uint8_t I_TBS2I_MCS(uint8_t I_TBS);
uint8_t SE2I_TBS(float SE,
uint8_t N_PRB,
uint8_t symbPerRB);
/** \brief This function generates the sounding reference symbol (SRS) for the uplink according to 36.211 v8.6.0. If IFFT_FPGA is defined, the SRS is quantized to a QPSK sequence.
@param frame_parms LTE DL Frame Parameters
@param soundingrs_ul_config_dedicated Dynamic configuration from RRC during Connection Establishment
@param txdataF pointer to the frequency domain TX signal
@returns 0 on success*/
int generate_srs(NR_DL_FRAME_PARMS *frame_parms,
SOUNDINGRS_UL_CONFIG_DEDICATED *soundingrs_ul_config_dedicated,
int *txdataF,
int16_t amp,
uint32_t subframe);
/*!
@@ -1352,12 +1343,6 @@ int32_t generate_drs_pusch(PHY_VARS_NR_UE *phy_vars_ue,
uint32_t nb_rb,
uint8_t ant);
/*!
\brief This function initializes the Group Hopping, Sequence Hopping and nPRS sequences for PUCCH/PUSCH according to 36.211 v8.6.0. It should be called after configuration of UE (reception of SIB2/3) and initial configuration of eNB (or after reconfiguration of cell-specific parameters).
@param frame_parms Pointer to a NR_DL_FRAME_PARMS structure (eNB or UE)*/
void init_ul_hopping(NR_DL_FRAME_PARMS *frame_parms);
/*!
\brief This function implements the initialization of paging parameters for UE (See Section 7, 36.304).It must be called after setting IMSImod1024 during UE startup and after receiving SIB2
@param ue Pointer to UE context
@@ -1422,8 +1407,6 @@ double sinr_eff_cqi_calc(PHY_VARS_NR_UE *phy_vars_ue,
uint8_t sinr2cqi(double sinr,uint8_t trans_mode);
int dump_dci(NR_DL_FRAME_PARMS *frame_parms, DCI_ALLOC_t *dci);
int dump_ue_stats(PHY_VARS_NR_UE *phy_vars_ue, UE_nr_rxtx_proc_t *proc, char* buffer, int length, runmode_t mode, int input_level_dBm);
void init_transport_channels(uint8_t);
@@ -1441,8 +1424,7 @@ void generate_RIV_tables(void);
int nr_initial_sync(UE_nr_rxtx_proc_t *proc,
PHY_VARS_NR_UE *phy_vars_ue,
int n_frames,
int sa,
int dlsch_parallel);
int sa);
/*!
\brief This function gets the carrier frequencies either from FP or command-line-set global variables, depending on the availability of the latter
@@ -1513,18 +1495,11 @@ int get_nCCE_offset_l1(int *CCE_table,
const unsigned short rnti,
const unsigned char subframe);
uint16_t get_nCCE(uint8_t num_pdcch_symbols,NR_DL_FRAME_PARMS *frame_parms,uint8_t mi);
uint16_t get_nquad(uint8_t num_pdcch_symbols,NR_DL_FRAME_PARMS *frame_parms,uint8_t mi);
uint8_t get_mi(NR_DL_FRAME_PARMS *frame,uint8_t subframe);
//uint8_t get_mi(NR_DL_FRAME_PARMS *frame,uint8_t subframe);
uint16_t get_nCCE_mac(uint8_t Mod_id,uint8_t CC_id,int num_pdcch_symbols,int subframe);
uint8_t get_num_pdcch_symbols(uint8_t num_dci,DCI_ALLOC_t *dci_alloc,NR_DL_FRAME_PARMS *frame_parms,uint8_t subframe);
void pdcch_interleaving(NR_DL_FRAME_PARMS *frame_parms,int32_t **z, int32_t **wbar,uint8_t n_symbols_pdcch,uint8_t mi);
void nr_pdcch_unscrambling(int16_t *z,
uint16_t scrambling_RNTI,
uint32_t length,
@@ -1539,7 +1514,6 @@ void dlsch_unscrambling(NR_DL_FRAME_PARMS *frame_parms,
uint8_t q,
uint8_t Ns);
void init_ncs_cell(NR_DL_FRAME_PARMS *frame_parms,uint8_t ncs_cell[20][7]);
void generate_pucch1x(int32_t **txdataF,
NR_DL_FRAME_PARMS *frame_parms,
@@ -1587,7 +1561,7 @@ void init_ulsch_power_LUT(void);
@param subframe subframe index to check
@returns 0 on success
*/
int is_prach_subframe(NR_DL_FRAME_PARMS *frame_parms,frame_t frame, uint8_t subframe);
//int is_prach_subframe(NR_DL_FRAME_PARMS *frame_parms,frame_t frame, uint8_t subframe);
/*!
\brief Generate PRACH waveform
@@ -1653,8 +1627,6 @@ void init_scrambling_lut(void);
@param frame_parms Pointer to frame parameters
@returns 1 if subframe is for MBSFN
*/
int is_pmch_subframe(frame_t frame, int subframe, NR_DL_FRAME_PARMS *frame_parms);
uint8_t is_not_pilot(uint8_t pilots, uint8_t re, uint8_t nushift, uint8_t use2ndpilots);
uint8_t is_not_UEspecRS(int8_t lprime, uint8_t re, uint8_t nushift, uint8_t Ncp, uint8_t beamforming_mode);
@@ -1691,8 +1663,7 @@ uint8_t get_prach_prb_offset(NR_DL_FRAME_PARMS *frame_parms,
uint8_t n_ra_prboffset,
uint8_t tdd_mapindex, uint16_t Nf);
uint32_t lte_gold_generic(uint32_t *x1, uint32_t *x2, uint8_t reset);
#include <openair1/PHY/LTE_TRANSPORT/transport_proto.h>
uint8_t nr_dci_decoding_procedure(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
@@ -149,7 +149,7 @@ typedef struct {
/// ACK/NAK Bundling flag
uint8_t bundling;
/// Concatenated "g"-sequences (for definition see 36-212 V15.4.0 2018-12, p.31)
uint8_t g[MAX_NUM_NR_CHANNEL_BITS];
uint8_t g[MAX_NUM_NR_CHANNEL_BITS] __attribute__ ((aligned(32)));
/// Interleaved "h"-sequences (for definition see 36-212 V8.6 2009-03, p.17-18)
uint8_t h[MAX_NUM_NR_CHANNEL_BITS];
/// Scrambled "b"-sequences (for definition see 36-211 V8.6 2009-03, p.14)
@@ -118,7 +118,7 @@ NR_UE_ULSCH_t *new_nr_ue_ulsch(uint16_t N_RB_UL,
a_segments = a_segments/273 +1;
}
uint16_t ulsch_bytes = a_segments*1056; // allocated bytes per segment
uint32_t ulsch_bytes = a_segments*1056; // allocated bytes per segment
ulsch = (NR_UE_ULSCH_t *)malloc16(sizeof(NR_UE_ULSCH_t));
@@ -258,7 +258,6 @@ int nr_ulsch_encoding(PHY_VARS_NR_UE *ue,
Ilbrm = 0;
Tbslbrm = 950984; //max tbs
Coderate = 0.0;
trace_NRpdu(DIRECTION_UPLINK, harq_process->a, harq_process->pusch_pdu.pusch_data.tb_size, 0, WS_C_RNTI, 0, 0, 0,0, 0);
///////////
/////////////////////////////////////////////////////////////////////////////////////////
+29 -8
View File
@@ -45,6 +45,7 @@
#include "executables/nr-softmodem.h"
#include "executables/softmodem-common.h"
#include "PHY/NR_REFSIG/ul_ref_seq_nr.h"
#include <openair2/UTIL/OPT/opt.h>
//#define DEBUG_PUSCH_MAPPING
//#define DEBUG_MAC_PDU
@@ -52,12 +53,12 @@
//extern int32_t uplink_counter;
void nr_pusch_codeword_scrambling(uint8_t *in,
uint32_t size,
uint32_t Nid,
uint32_t n_RNTI,
uint32_t* out) {
void nr_pusch_codeword_scrambling_uci(uint8_t *in,
uint32_t size,
uint32_t Nid,
uint32_t n_RNTI,
uint32_t* out)
{
uint8_t reset, b_idx;
uint32_t x1, x2, s=0, temp_out;
@@ -88,7 +89,19 @@ void nr_pusch_codeword_scrambling(uint8_t *in,
*out ^= (((in[i])&1) ^ ((s>>b_idx)&1))<<b_idx;
//printf("i %d b_idx %d in %d s 0x%08x out 0x%08x\n", i, b_idx, in[i], s, *out);
}
}
void nr_pusch_codeword_scrambling(uint8_t *in,
uint32_t size,
uint32_t Nid,
uint32_t n_RNTI,
bool uci_on_pusch,
uint32_t* out)
{
if (uci_on_pusch)
nr_pusch_codeword_scrambling_uci(in, size, Nid, n_RNTI, out);
else
nr_codeword_scrambling(in, size, 0, Nid, n_RNTI, out);
}
void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
@@ -105,7 +118,8 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
uint32_t scrambled_output[NR_MAX_NB_CODEWORDS][NR_MAX_PDSCH_ENCODED_LENGTH>>5];
int16_t **tx_layers;
int32_t **txdataF;
int8_t Wf[2], Wt[2], l_prime[2], delta;
int8_t Wf[2], Wt[2];
int l_prime[2], delta;
uint8_t nb_dmrs_re_per_rb;
int ap, i;
int sample_offsetF, N_RE_prime;
@@ -162,9 +176,15 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
nb_dmrs_re_per_rb, number_dmrs_symbols, mod_order, Nl);
trace_NRpdu(DIRECTION_UPLINK,
ulsch_ue->harq_processes[harq_pid]->a,
ulsch_ue->harq_processes[harq_pid]->pusch_pdu.pusch_data.tb_size,
0, WS_C_RNTI, rnti, frame, slot, 0, 0);
if (nr_ulsch_encoding(UE, ulsch_ue, frame_parms, harq_pid, G) == -1)
return;
///////////
////////////////////////////////////////////////////////////////////
@@ -179,6 +199,7 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
available_bits,
ulsch_ue->Nid_cell,
rnti,
false,
scrambled_output[cwd_index]); // assume one codeword for the moment
@@ -411,7 +432,7 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
if (is_dmrs == 1) {
// if transform precoding is enabled
if (pusch_pdu->transform_precoding == 0) {
((int16_t*)txdataF[ap])[(sample_offsetF)<<1] = (Wt[l_prime[0]]*Wf[k_prime]*AMP*dmrs_seq[2*dmrs_idx]) >> 15;
((int16_t*)txdataF[ap])[((sample_offsetF)<<1) + 1] = (Wt[l_prime[0]]*Wf[k_prime]*AMP*dmrs_seq[(2*dmrs_idx) + 1]) >> 15;
+2 -2
View File
@@ -805,8 +805,8 @@ void nr_generate_pucch1_old(PHY_VARS_NR_UE *ue,
}
#endif //0
inline void nr_pucch2_3_4_scrambling(uint16_t M_bit,uint16_t rnti,uint16_t n_id,uint64_t *B64,uint8_t *btilde) __attribute__((always_inline));
inline void nr_pucch2_3_4_scrambling(uint16_t M_bit,uint16_t rnti,uint16_t n_id,uint64_t *B64,uint8_t *btilde) {
static inline void nr_pucch2_3_4_scrambling(uint16_t M_bit,uint16_t rnti,uint16_t n_id,uint64_t *B64,uint8_t *btilde) __attribute__((always_inline));
static inline void nr_pucch2_3_4_scrambling(uint16_t M_bit,uint16_t rnti,uint16_t n_id,uint64_t *B64,uint8_t *btilde) {
uint32_t x1, x2, s=0;
int i;
uint8_t c;
+141 -149
View File
@@ -38,7 +38,6 @@
#undef DEFINE_VARIABLES_PHY_IMPLEMENTATION_DEFS_NR_H
#include "PHY/defs_nr_UE.h"
//#include "extern.h"
#include "PHY/NR_REFSIG/ss_pbch_nr.h"
#include "PHY/NR_REFSIG/dmrs_nr.h"
#include "PHY/NR_REFSIG/ul_ref_seq_nr.h"
@@ -47,11 +46,13 @@
#include "PHY/NR_UE_TRANSPORT/srs_modulation_nr.h"
#undef DEFINE_VARIABLES_SRS_MODULATION_NR_H
//#define SRS_DEBUG
/*******************************************************************
*
* NAME : generate_srs
*
* PARAMETERS : pointer to resource set
* PARAMETERS : pointer to srs config pdu
* pointer to transmit buffer
* amplitude scaling for this physical signal
* slot number of transmission
@@ -73,84 +74,94 @@
* - no antenna switching*
*
*********************************************************************/
int32_t generate_srs_nr(SRS_ResourceSet_t *p_srs_resource_set,
NR_DL_FRAME_PARMS *frame_parms,
int32_t *txptr,
int16_t amp,
UE_nr_rxtx_proc_t *proc)
int generate_srs_nr(nfapi_nr_srs_pdu_t *srs_config_pdu,
NR_DL_FRAME_PARMS *frame_parms,
int32_t *txptr,
nr_srs_info_t *nr_srs_info,
int16_t amp,
int frame_number,
int slot_number)
{
uint8_t n_SRS_cs_max;
uint8_t u, v_nu;
uint8_t u;
uint8_t v_nu;
uint32_t f_gh = 0;
SRS_Resource_t *p_SRS_Resource;
int frame_number = proc->frame_tx;
int slot_number = proc->nr_slot_tx;
uint16_t n_SRS, n_SRS_cs_i;
uint16_t n_SRS;
uint16_t n_SRS_cs_i;
double alpha_i;
uint8_t K_TC_p;
uint16_t n_b[B_SRS_NUMBER], F_b, subcarrier;
uint8_t N_b, k_0_overbar_p;
uint16_t n_b[B_SRS_NUMBER];
uint16_t F_b;
uint16_t subcarrier;
uint8_t N_b;
uint8_t k_0_overbar_p;
if (p_srs_resource_set->p_srs_ResourceList[0] == NULL) {
LOG_E(PHY,"generate_srs: No resource associated with the SRS resource set!\n");
return (-1);
}
else {
if (p_srs_resource_set->number_srs_Resource <= MAX_NR_OF_SRS_RESOURCES_PER_SET) {
p_SRS_Resource = p_srs_resource_set->p_srs_ResourceList[0];
}
else {
LOG_E(PHY,"generate_srs: resource number of this resource set %d exceeds maximum supported value %d!\n", p_srs_resource_set->number_srs_Resource, MAX_NR_OF_SRS_RESOURCES_PER_SET);
return (-1);
}
// get parameters from srs_config_pdu
uint8_t B_SRS = srs_config_pdu->bandwidth_index;
uint8_t C_SRS = srs_config_pdu->config_index;
uint8_t b_hop = srs_config_pdu->frequency_hopping;
uint8_t K_TC = 2<<srs_config_pdu->comb_size;
uint8_t K_TC_overbar = srs_config_pdu->comb_offset; // FFS_TODO_NR is this parameter for K_TC_overbar ??
uint8_t n_SRS_cs = srs_config_pdu->cyclic_shift;
uint8_t n_ID_SRS = srs_config_pdu->sequence_id;
uint8_t n_shift = srs_config_pdu->frequency_position; // it adjusts the SRS allocation to align with the common resource block grid in multiples of four
uint8_t n_RRC = srs_config_pdu->frequency_shift;
uint8_t groupOrSequenceHopping = srs_config_pdu->group_or_sequence_hopping;
uint8_t l_offset = srs_config_pdu->time_start_position;
uint16_t T_SRS = srs_config_pdu->t_srs;
uint16_t T_offset = srs_config_pdu->t_offset; // FFS_TODO_NR to check interface with RRC
uint8_t R = 1<<srs_config_pdu->num_repetitions;
uint8_t N_ap = 1<<srs_config_pdu->num_ant_ports; // antenna port for transmission
uint8_t N_symb_SRS = 1<<srs_config_pdu->num_symbols; // consecutive OFDM symbols
uint8_t l0 = frame_parms->symbols_per_slot - 1 - l_offset; // starting position in the time domain
uint8_t k_0_p; // frequency domain starting position
uint64_t subcarrier_offset = frame_parms->first_carrier_offset + srs_config_pdu->bwp_start*N_SC_RB;
if(nr_srs_info) {
nr_srs_info->sc_list_length = 0;
nr_srs_info->srs_generated_signal_bits = log2_approx(amp);
}
if (p_srs_resource_set->resourceType != periodic) {
LOG_E(PHY,"generate_srs: only SRS periodic is supported up to now!\n");
return (-1);
}
/* get parameters from SRS resource configuration */
uint8_t B_SRS = p_SRS_Resource->freqHopping_b_SRS;
uint8_t C_SRS = p_SRS_Resource->freqHopping_c_SRS;
uint8_t b_hop = p_SRS_Resource->freqHopping_b_hop;
uint8_t K_TC = p_SRS_Resource->transmissionComb;
uint8_t K_TC_overbar = p_SRS_Resource->combOffset; /* FFS_TODO_NR is this parameter for K_TC_overbar ?? */
uint8_t n_SRS_cs = p_SRS_Resource->cyclicShift;
uint8_t n_ID_SRS = p_SRS_Resource->sequenceId;
uint8_t n_shift = p_SRS_Resource->freqDomainPosition; /* it adjusts the SRS allocation to align with the common resource block grid in multiples of four */
uint8_t n_RRC = p_SRS_Resource->freqDomainShift;
uint8_t groupOrSequenceHopping = p_SRS_Resource->groupOrSequenceHopping;
uint8_t l_offset = p_SRS_Resource->resourceMapping_startPosition;
uint16_t T_SRS = srs_period[p_SRS_Resource->SRS_Periodicity];
uint16_t T_offset = p_SRS_Resource->SRS_Offset;; /* FFS_TODO_NR to check interface with RRC */
uint8_t R = p_SRS_Resource->resourceMapping_repetitionFactor;
/* TS 38.211 6.4.1.4.1 SRS resource */
uint8_t N_ap = (uint8_t)p_SRS_Resource->nrof_SrsPorts; /* antenna port for transmission */
uint8_t N_symb_SRS = p_SRS_Resource->resourceMapping_nrofSymbols; /* consecutive OFDM symbols */
uint8_t l0 = N_SYMB_SLOT - 1 - l_offset; /* starting position in the time domain */
uint8_t k_0_p; /* frequency domain starting position */
#ifdef SRS_DEBUG
LOG_I(NR_PHY,"Frame = %i, slot = %i\n", frame_number, slot_number);
LOG_I(NR_PHY,"B_SRS = %i\n", B_SRS);
LOG_I(NR_PHY,"C_SRS = %i\n", C_SRS);
LOG_I(NR_PHY,"b_hop = %i\n", b_hop);
LOG_I(NR_PHY,"K_TC = %i\n", K_TC);
LOG_I(NR_PHY,"K_TC_overbar = %i\n", K_TC_overbar);
LOG_I(NR_PHY,"n_SRS_cs = %i\n", n_SRS_cs);
LOG_I(NR_PHY,"n_ID_SRS = %i\n", n_ID_SRS);
LOG_I(NR_PHY,"n_shift = %i\n", n_shift);
LOG_I(NR_PHY,"n_RRC = %i\n", n_RRC);
LOG_I(NR_PHY,"groupOrSequenceHopping = %i\n", groupOrSequenceHopping);
LOG_I(NR_PHY,"l_offset = %i\n", l_offset);
LOG_I(NR_PHY,"T_SRS = %i\n", T_SRS);
LOG_I(NR_PHY,"T_offset = %i\n", T_offset);
LOG_I(NR_PHY,"R = %i\n", R);
LOG_I(NR_PHY,"N_ap = %i\n", N_ap);
LOG_I(NR_PHY,"N_symb_SRS = %i\n", N_symb_SRS);
LOG_I(NR_PHY,"l0 = %i\n", l0);
#endif
if (N_ap != port1) {
LOG_E(PHY, "generate_srs: this number of antenna ports %d is not yet supported!\n", N_ap);
LOG_E(NR_PHY, "generate_srs: this number of antenna ports %d is not yet supported!\n", N_ap);
return (-1);
}
if (N_symb_SRS != 1) {
LOG_E(PHY, "generate_srs: this number of srs symbol %d is not yet supported!\n", N_symb_SRS);
LOG_E(NR_PHY, "generate_srs: this number of srs symbol %d is not yet supported!\n", N_symb_SRS);
return (-1);
}
if (groupOrSequenceHopping != neitherHopping) {
LOG_E(PHY, "generate_srs: sequence hopping is not yet supported!\n");
LOG_E(NR_PHY, "generate_srs: sequence hopping is not yet supported!\n");
return (-1);
}
if (R == 0) {
LOG_E(PHY, "generate_srs: this parameter repetition factor %d is not consistent !\n", R);
LOG_E(NR_PHY, "generate_srs: this parameter repetition factor %d is not consistent !\n", R);
return (-1);
}
else if (R > N_symb_SRS) {
LOG_E(PHY, "generate_srs: R %d can not be greater than N_symb_SRS %d !\n", R, N_symb_SRS);
LOG_E(NR_PHY, "generate_srs: R %d can not be greater than N_symb_SRS %d !\n", R, N_symb_SRS);
return (-1);
}
/* see 38211 6.4.1.4.2 Sequence generation */
@@ -163,15 +174,15 @@ int32_t generate_srs_nr(SRS_ResourceSet_t *p_srs_resource_set,
// delta = 1; /* delta = log2(K_TC) */
}
else {
LOG_E(PHY, "generate_srs: SRS unknown value for K_TC %d !\n", K_TC);
LOG_E(NR_PHY, "generate_srs: SRS unknown value for K_TC %d !\n", K_TC);
return (-1);
}
if (n_SRS_cs >= n_SRS_cs_max) {
LOG_E(PHY, "generate_srs: inconsistent parameter n_SRS_cs %d >= n_SRS_cs_max %d !\n", n_SRS_cs, n_SRS_cs_max);
LOG_E(NR_PHY, "generate_srs: inconsistent parameter n_SRS_cs %d >= n_SRS_cs_max %d !\n", n_SRS_cs, n_SRS_cs_max);
return (-1);
}
if (T_SRS == 0) {
LOG_E(PHY, "generate_srs: inconsistent parameter T_SRS %d can not be equal to zero !\n", T_SRS);
LOG_E(NR_PHY, "generate_srs: inconsistent parameter T_SRS %d can not be equal to zero !\n", T_SRS);
return (-1);
}
else
@@ -180,7 +191,7 @@ int32_t generate_srs_nr(SRS_ResourceSet_t *p_srs_resource_set,
while (srs_periodicity[index] != T_SRS) {
index++;
if (index == SRS_PERIODICITY) {
LOG_E(PHY, "generate_srs: inconsistent parameter T_SRS %d not specified !\n", T_SRS);
LOG_E(NR_PHY, "generate_srs: inconsistent parameter T_SRS %d not specified !\n", T_SRS);
return (-1);
}
}
@@ -202,10 +213,9 @@ int32_t generate_srs_nr(SRS_ResourceSet_t *p_srs_resource_set,
/* A UE may be configured to transmit an SRS resource on adjacent symbols within the last six symbols of a slot, */
/* where all antenna ports of the SRS resource are mapped to each symbol of the resource */
uint8_t l = p_index;
if (l >= N_symb_SRS) {
LOG_E(PHY, "generate_srs: number of antenna ports %d and number of srs symbols %d are different !\n", N_ap, N_symb_SRS);
LOG_E(NR_PHY, "generate_srs: number of antenna ports %d and number of srs symbols %d are different !\n", N_ap, N_symb_SRS);
}
switch(groupOrSequenceHopping) {
@@ -247,7 +257,7 @@ int32_t generate_srs_nr(SRS_ResourceSet_t *p_srs_resource_set,
}
default:
{
LOG_E(PHY, "generate_srs: unknown hopping setting %d !\n", groupOrSequenceHopping);
LOG_E(NR_PHY, "generate_srs: unknown hopping setting %d !\n", groupOrSequenceHopping);
return (-1);
}
}
@@ -274,7 +284,7 @@ int32_t generate_srs_nr(SRS_ResourceSet_t *p_srs_resource_set,
N_b = 1;
}
/* periodicity and offset */
if (p_srs_resource_set->resourceType == aperiodic) {
if (srs_config_pdu->resource_type == aperiodic) {
n_SRS = l/R;
}
else {
@@ -315,7 +325,7 @@ int32_t generate_srs_nr(SRS_ResourceSet_t *p_srs_resource_set,
k_0_p += K_TC * M_sc_b_SRS * n_b[b];
}
subcarrier = (frame_parms->first_carrier_offset) + k_0_p;
subcarrier = subcarrier_offset + k_0_p;
if (subcarrier>frame_parms->ofdm_symbol_size) {
subcarrier -= frame_parms->ofdm_symbol_size;
}
@@ -327,7 +337,7 @@ int32_t generate_srs_nr(SRS_ResourceSet_t *p_srs_resource_set,
}
if (ul_allocated_re[M_sc_b_SRS_index] != M_sc_b_SRS) {
LOG_E(PHY, "generate_srs: srs uplink allocation %d can not be found! \n", M_sc_b_SRS);
LOG_E(NR_PHY, "generate_srs: srs uplink allocation %d can not be found! \n", M_sc_b_SRS);
return (-1);
}
@@ -363,13 +373,31 @@ int32_t generate_srs_nr(SRS_ResourceSet_t *p_srs_resource_set,
txptr[subcarrier] = (real_amp & 0xFFFF) + ((imag_amp<<16)&0xFFFF0000);
if(nr_srs_info) {
nr_srs_info->sc_list[nr_srs_info->sc_list_length] = subcarrier;
nr_srs_info->sc_list_length++;
}
#ifdef SRS_DEBUG
int subcarrier_log = subcarrier-subcarrier_offset;
if(subcarrier_log < 0) {
subcarrier_log = subcarrier_log + frame_parms->ofdm_symbol_size;
}
if( subcarrier_log%12 == 0 ) {
LOG_I(NR_PHY,"------------ %d ------------\n", subcarrier_log/12);
}
LOG_I(NR_PHY,"(%d) \t%i\t%i\n", subcarrier_log, (int16_t)(real_amp&0xFFFF), (int16_t)(imag_amp&0xFFFF));
#endif
subcarrier += (K_TC); /* subcarrier increment */
if (subcarrier >= frame_parms->ofdm_symbol_size)
if (subcarrier >= frame_parms->ofdm_symbol_size) {
subcarrier=subcarrier-frame_parms->ofdm_symbol_size;
}
}
/* process next symbol */
txptr = txptr + frame_parms->ofdm_symbol_size;
//txptr = txptr + frame_parms->ofdm_symbol_size;
}
return (0);
@@ -377,40 +405,7 @@ int32_t generate_srs_nr(SRS_ResourceSet_t *p_srs_resource_set,
/*******************************************************************
*
* NAME : is_srs_period_nr
*
* PARAMETERS : pointer to resource set
* pointer to transmit buffer
* amplitude scaling for this physical signal
* slot number of transmission
* RETURN : 0 if it is a valid slot for transmitting srs
* -1 if srs should not be transmitted
*
* DESCRIPTION : for periodic,
*
*********************************************************************/
int is_srs_period_nr(SRS_Resource_t *p_SRS_Resource, NR_DL_FRAME_PARMS *frame_parms, int frame_tx, int slot_tx)
{
uint16_t T_SRS = srs_period[p_SRS_Resource->SRS_Periodicity];
uint16_t T_offset = p_SRS_Resource->SRS_Offset; /* FFS_TODO_NR to check interface */
if (T_offset > T_SRS) {
LOG_E(PHY,"is_srs_occasion_nr: T_offset %d is greater than T_SRS %d!\n", T_offset, T_SRS);
return (-1);
}
int16_t N_slot_frame = frame_parms->slots_per_frame;
if ((N_slot_frame*frame_tx + slot_tx - T_offset)%T_SRS == 0) {
return (0);
}
else {
return (-1);
}
}
/*******************************************************************
*
* NAME : ue_srs_procedure_nr
* NAME : ue_srs_procedures_nr
*
* PARAMETERS : pointer to ue context
* pointer to rxtx context*
@@ -422,54 +417,51 @@ int is_srs_period_nr(SRS_Resource_t *p_SRS_Resource, NR_DL_FRAME_PARMS *frame_pa
* send srs according to current configuration
*
*********************************************************************/
int ue_srs_procedure_nr(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, uint8_t eNB_id)
int ue_srs_procedures_nr(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, uint8_t gNB_id)
{
if(!ue->srs_vars[0]->active) {
return -1;
}
ue->srs_vars[0]->active = false;
nfapi_nr_srs_pdu_t *srs_config_pdu = (nfapi_nr_srs_pdu_t*)&ue->srs_vars[0]->srs_config_pdu;
#ifdef SRS_DEBUG
LOG_I(NR_PHY,"Frame = %i, slot = %i\n", proc->frame_tx, proc->nr_slot_tx);
LOG_I(NR_PHY,"srs_config_pdu->rnti = 0x%04x\n", srs_config_pdu->rnti);
LOG_I(NR_PHY,"srs_config_pdu->handle = %u\n", srs_config_pdu->handle);
LOG_I(NR_PHY,"srs_config_pdu->bwp_size = %u\n", srs_config_pdu->bwp_size);
LOG_I(NR_PHY,"srs_config_pdu->bwp_start = %u\n", srs_config_pdu->bwp_start);
LOG_I(NR_PHY,"srs_config_pdu->subcarrier_spacing = %u\n", srs_config_pdu->subcarrier_spacing);
LOG_I(NR_PHY,"srs_config_pdu->cyclic_prefix = %u (0: Normal; 1: Extended)\n", srs_config_pdu->cyclic_prefix);
LOG_I(NR_PHY,"srs_config_pdu->num_ant_ports = %u (0 = 1 port, 1 = 2 ports, 2 = 4 ports)\n", srs_config_pdu->num_ant_ports);
LOG_I(NR_PHY,"srs_config_pdu->num_symbols = %u (0 = 1 symbol, 1 = 2 symbols, 2 = 4 symbols)\n", srs_config_pdu->num_symbols);
LOG_I(NR_PHY,"srs_config_pdu->num_repetitions = %u (0 = 1, 1 = 2, 2 = 4)\n", srs_config_pdu->num_repetitions);
LOG_I(NR_PHY,"srs_config_pdu->time_start_position = %u\n", srs_config_pdu->time_start_position);
LOG_I(NR_PHY,"srs_config_pdu->config_index = %u\n", srs_config_pdu->config_index);
LOG_I(NR_PHY,"srs_config_pdu->sequence_id = %u\n", srs_config_pdu->sequence_id);
LOG_I(NR_PHY,"srs_config_pdu->bandwidth_index = %u\n", srs_config_pdu->bandwidth_index);
LOG_I(NR_PHY,"srs_config_pdu->comb_size = %u (0 = comb size 2, 1 = comb size 4, 2 = comb size 8)\n", srs_config_pdu->comb_size);
LOG_I(NR_PHY,"srs_config_pdu->comb_offset = %u\n", srs_config_pdu->comb_offset);
LOG_I(NR_PHY,"srs_config_pdu->cyclic_shift = %u\n", srs_config_pdu->cyclic_shift);
LOG_I(NR_PHY,"srs_config_pdu->frequency_position = %u\n", srs_config_pdu->frequency_position);
LOG_I(NR_PHY,"srs_config_pdu->frequency_shift = %u\n", srs_config_pdu->frequency_shift);
LOG_I(NR_PHY,"srs_config_pdu->frequency_hopping = %u\n", srs_config_pdu->frequency_hopping);
LOG_I(NR_PHY,"srs_config_pdu->group_or_sequence_hopping = %u (0 = No hopping, 1 = Group hopping groupOrSequenceHopping, 2 = Sequence hopping)\n", srs_config_pdu->group_or_sequence_hopping);
LOG_I(NR_PHY,"srs_config_pdu->resource_type = %u (0: aperiodic, 1: semi-persistent, 2: periodic)\n", srs_config_pdu->resource_type);
LOG_I(NR_PHY,"srs_config_pdu->t_srs = %u\n", srs_config_pdu->t_srs);
LOG_I(NR_PHY,"srs_config_pdu->t_offset = %u\n", srs_config_pdu->t_offset);
#endif
NR_DL_FRAME_PARMS *frame_parms = &(ue->frame_parms);
SRS_NR *p_srs_nr = &(ue->frame_parms.srs_nr);
SRS_ResourceSet_t *p_srs_resource_set = frame_parms->srs_nr.p_SRS_ResourceSetList[p_srs_nr->active_srs_Resource_Set];
int generate_srs = 0;
uint16_t symbol_offset = (frame_parms->symbols_per_slot - 1 - srs_config_pdu->time_start_position)*frame_parms->ofdm_symbol_size;
/* is there any resource set which has been configurated ? */
if (p_srs_nr->number_srs_Resource_Set != 0) {
/* what is the current active resource set ? */
if (p_srs_nr->active_srs_Resource_Set > MAX_NR_OF_SRS_RESOURCE_SET) {
LOG_W(PHY,"phy_procedures_UE_TX: srs active %d greater than maximum %d!\n", p_srs_nr->active_srs_Resource_Set, MAX_NR_OF_SRS_RESOURCE_SET);
}
else {
/* SRS resource set configurated ? */
if (p_srs_resource_set != NULL) {
SRS_Resource_t *p_srs_resource = frame_parms->srs_nr.p_SRS_ResourceSetList[p_srs_nr->active_srs_Resource_Set]->p_srs_ResourceList[0];
/* SRS resource configurated ? */
if (p_srs_resource != NULL) {
if (p_srs_resource_set->resourceType == periodic) {
if (is_srs_period_nr(p_srs_resource, frame_parms, proc->frame_tx, proc->nr_slot_tx) == 0) {
generate_srs = 1;
}
}
}
else {
LOG_W(PHY,"phy_procedures_UE_TX: no configurated srs resource!\n");
}
}
}
}
if (generate_srs == 1) {
int16_t txptr = AMP;
uint16_t nsymb = (ue->frame_parms.Ncp==0) ? 14:12;
uint16_t symbol_offset = (int)ue->frame_parms.ofdm_symbol_size*((proc->nr_slot_tx*nsymb)+(nsymb-1));
if (generate_srs_nr(p_srs_resource_set, frame_parms, &ue->common_vars.txdataF[eNB_id][symbol_offset], txptr, proc) == 0) {
return 0;
}
else
{
return (-1);
}
}
else {
return (-1);
if (generate_srs_nr(srs_config_pdu, frame_parms, &ue->common_vars.txdataF[gNB_id][symbol_offset], ue->nr_srs_info,
AMP, proc->frame_tx, proc->nr_slot_tx) == 0) {
return 0;
} else {
return -1;
}
}
@@ -136,15 +136,19 @@ EXTERN const uint16_t srs_periodicity[SRS_PERIODICITY]
/** \brief This function generates the sounding reference symbol (SRS) for the uplink according to 38.211 6.4.1.4 Sounding reference signal
@param frame_parms NR DL Frame parameters
@param txdataF pointer to the frequency domain TX signal
@param nr_srs_info pointer to the srs info structure
@param amp amplitude of generated signal
@param proc pointer to the transmit parameters
@param frame_number frame number
@param slot_number slot number
@returns 0 on success -1 on error with message */
int32_t generate_srs_nr(SRS_ResourceSet_t *p_srs_resource_set,
NR_DL_FRAME_PARMS *frame_parms,
int32_t *txptr,
int16_t amp,
UE_nr_rxtx_proc_t *proc);
int generate_srs_nr(nfapi_nr_srs_pdu_t *srs_config_pdu,
NR_DL_FRAME_PARMS *frame_parms,
int32_t *txptr,
nr_srs_info_t *nr_srs_info,
int16_t amp,
int frame_number,
int slot_number);
/** \brief This function checks for periodic srs if srs should be transmitted in this slot
* @param p_SRS_Resource pointer to active resource
@@ -155,13 +159,14 @@ int32_t generate_srs_nr(SRS_ResourceSet_t *p_srs_resource_set,
int is_srs_period_nr(SRS_Resource_t *p_SRS_Resource,
NR_DL_FRAME_PARMS *frame_parms,
int frame_tx, int slot_tx);
/** \brief This function processes srs configuration
* @param ue context
@param rxtx context
@param current eNB identifier
@param current gNB_id identifier
@returns 0 if srs is transmitted -1 otherwise */
int ue_srs_procedure_nr(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, uint8_t eNB_id);
int ue_srs_procedures_nr(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, uint8_t gNB_id);
#undef EXTERN
#undef INIT_VARIABLES_SRS_MODULATION_NR_H
+1 -1
View File
@@ -42,7 +42,7 @@ int main(int argc, char **argv) {
get_common_options(SOFTMODEM_GNB_BIT );
config_process_cmdline( cmdline_params,sizeof(cmdline_params)/sizeof(paramdef_t),NULL);
CONFIG_CLEARRTFLAG(CONFIG_NOEXITONHELP);
configure_linux();
set_latency_target();
int N_RB=50;
+9 -5
View File
@@ -49,9 +49,15 @@ void reset_stats(FL_OBJECT *button, long arg) {
int i,j,k;
PHY_VARS_eNB *phy_vars_eNB = RC.eNB[0][0];
for (i=0; i<NUMBER_OF_UE_MAX; i++) {
for (k=0; k<8; k++) { //harq_processes
for (j=0; j<phy_vars_eNB->dlsch[i][0]->Mlimit; j++) {
printf("XXX %d %d %d\n",
sizeofArray(phy_vars_eNB->UE_stats),
sizeofArray( phy_vars_eNB->UE_stats[i].dlsch_NAK),
sizeofArray( *phy_vars_eNB->UE_stats[i].dlsch_NAK)
);
for (i=0; i<sizeofArray(phy_vars_eNB->UE_stats); i++) {
for (k=0; k<sizeofArray(phy_vars_eNB->UE_stats[i].dlsch_NAK); k++) { //harq_processes
for (j=0; j<sizeofArray(*phy_vars_eNB->UE_stats[i].dlsch_NAK); j++) {
phy_vars_eNB->UE_stats[i].dlsch_NAK[k][j]=0;
phy_vars_eNB->UE_stats[i].dlsch_ACK[k][j]=0;
phy_vars_eNB->UE_stats[i].dlsch_trials[k][j]=0;
@@ -67,7 +73,6 @@ void reset_stats(FL_OBJECT *button, long arg) {
}
}
static void *scope_thread_eNB(void *arg) {
struct sched_param sched_param;
int UE_id, CC_id;
@@ -75,7 +80,6 @@ static void *scope_thread_eNB(void *arg) {
sched_param.sched_priority = sched_get_priority_min(SCHED_FIFO)+1;
sched_setscheduler(0, SCHED_FIFO,&sched_param);
printf("Scope thread has priority %d\n",sched_param.sched_priority);
while (!oai_exit) {
ue_cnt=0;
+6 -2
View File
@@ -33,7 +33,6 @@
#define ScaleZone 4
#define localBuff(NaMe,SiZe) float NaMe[SiZe]; memset(NaMe,0,sizeof(NaMe));
int otg_enabled;
const FL_COLOR rx_antenna_colors[4] = {FL_RED,FL_BLUE,FL_GREEN,FL_YELLOW};
const FL_COLOR water_colors[4] = {FL_BLUE,FL_GREEN,FL_YELLOW,FL_RED};
@@ -240,7 +239,7 @@ static void genericWaterFall (OAIgraph_t *graph, scopeSample_t *values, const in
for (int pix=0; pix<graph->w; pix++) {
scopeSample_t *end=values+(pix+1)*samplesPerPixel;
end-=2;
AssertFatal(end <= values+datasize,"diff : %ld", end-values+datasize);
AssertFatal(end <= values+datasize,"diff : %tu", end-values+datasize);
double val=0;
for (scopeSample_t *s=values+(pix)*samplesPerPixel;
@@ -449,6 +448,7 @@ static OAI_phy_scope_t *create_phy_scope_gnb(void) {
OAI_phy_scope_t *fdui = calloc(( sizeof *fdui ),1);
// Define form
fdui->phy_scope = fl_bgn_form( FL_NO_BOX, 800, 800 );
fl_set_form_dblbuffer(fdui->phy_scope, 1);
// This the whole UI box
obj = fl_add_box( FL_BORDER_BOX, 0, 0, 800, 800, "" );
fl_set_object_color( obj, FL_BLACK, FL_WHITE );
@@ -530,7 +530,10 @@ static void *scope_thread_gNB(void *arg) {
OAI_phy_scope_t *form_gnb = create_phy_scope_gnb();
while (!oai_exit) {
fl_freeze_form(form_gnb->phy_scope);
phy_scope_gNB(form_gnb, p, nb_ue);
fl_unfreeze_form(form_gnb->phy_scope);
fl_redraw_form(form_gnb->phy_scope);
usleep(99*1000);
}
@@ -801,6 +804,7 @@ static OAI_phy_scope_t *create_phy_scope_nrue( int ID ) {
OAI_phy_scope_t *fdui = calloc(( sizeof *fdui ),1);
// Define form
fdui->phy_scope = fl_bgn_form( FL_NO_BOX, 800, 900 );
fl_set_form_dblbuffer(fdui->phy_scope, 1);
// This the whole UI box
obj = fl_add_box( FL_BORDER_BOX, 0, 0, 800, 900, "" );
fl_set_object_color( obj, FL_BLACK, FL_BLACK );
+3 -25
View File
@@ -25,20 +25,17 @@
#include <unistd.h>
#include <string.h>
#include "assertions.h"
#ifndef PHYSIM
#include <pthread.h>
#include "common/config/config_userapi.h"
#endif
#include <pthread.h>
#include "common/config/config_userapi.h"
#include <common/utils/threadPool/thread-pool.h>
// global var for openair performance profiler
int opp_enabled = 0;
double cpu_freq_GHz __attribute__ ((aligned(32)));
double cpu_freq_GHz __attribute__ ((aligned(32)))=0.0;
#ifndef PHYSIM
static uint32_t max_cpumeasur;
static time_stats_t **measur_table;
notifiedFIFO_t measur_fifo;
#endif
double get_cpu_freq_GHz(void)
{
if (cpu_freq_GHz <1 ) {
@@ -54,24 +51,7 @@ double get_cpu_freq_GHz(void)
return cpu_freq_GHz;
}
int cpumeas(int action)
{
switch (action) {
case CPUMEAS_ENABLE:
opp_enabled = 1;
break;
case CPUMEAS_DISABLE:
opp_enabled = 0;
break;
case CPUMEAS_GETSTATE:
default:
break;
}
return opp_enabled;
}
void print_meas_now(time_stats_t *ts,
const char *name,
@@ -187,7 +167,6 @@ double get_time_meas_us(time_stats_t *ts)
return 0;
}
#ifndef PHYSIM
/* function for the asynchronous measurment module: cpu stat are sent to a dedicated thread
* which is in charge of computing the cpu time spent in a given function/algorithm...
*/
@@ -294,4 +273,3 @@ void end_meas(void) {
msg->msgid = TIMESTAT_MSGID_END ;
pushNotifiedFIFO(&measur_fifo, nfe);
}
#endif
+29 -8
View File
@@ -31,9 +31,7 @@
#include <pthread.h>
#include <linux/kernel.h>
#include <linux/types.h>
#ifndef PHYSIM
#include "common/utils/threadPool/thread-pool.h"
#endif
#include "common/utils/threadPool/thread-pool.h"
// global var to enable openair performance profiler
extern int opp_enabled;
extern double cpu_freq_GHz __attribute__ ((aligned(32)));;
@@ -72,10 +70,8 @@ typedef struct {
char *meas_name; /*!< \brief name to use when printing the measure (not used for PHY simulators)*/
int meas_index; /*!< \brief index of this measure in the measure array (not used for PHY simulators)*/
int meas_enabled; /*!< \brief per measure enablement flag. send_meas tests this flag, unused today in start_meas and stop_meas*/
#ifndef PHYSIM
notifiedFIFO_elt_t *tpoolmsg; /*!< \brief message pushed to the cpu measurment queue to report a measure START or STOP */
time_stats_msg_t *tstatptr; /*!< \brief pointer to the time_stats_msg_t data in the tpoolmsg, stored here for perf considerations*/
#endif
} time_stats_t;
#define MEASURE_ENABLED(X) (X->meas_enabled)
@@ -119,7 +115,24 @@ static inline uint32_t rdtsc_oai(void) {
#define CPUMEAS_DISABLE 0
#define CPUMEAS_ENABLE 1
#define CPUMEAS_GETSTATE 2
int cpumeas(int action);
static inline int cpumeas(int action) {
switch (action) {
case CPUMEAS_ENABLE:
opp_enabled = 1;
break;
case CPUMEAS_DISABLE:
opp_enabled = 0;
break;
case CPUMEAS_GETSTATE:
default:
break;
}
return opp_enabled;
}
static inline void start_meas(time_stats_t *ts) {
if (opp_enabled) {
if (ts->meas_flag==0) {
@@ -166,7 +179,16 @@ static inline void copy_meas(time_stats_t *dst_ts,time_stats_t *src_ts) {
}
}
#ifndef PHYSIM
static inline void merge_meas(time_stats_t *dst_ts, time_stats_t *src_ts)
{
if (!opp_enabled)
return;
dst_ts->trials += src_ts->trials;
dst_ts->diff += src_ts->diff;
if (src_ts->max > dst_ts->max)
dst_ts->max = src_ts->max;
}
extern notifiedFIFO_t measur_fifo;
#define CPUMEASUR_SECTION "cpumeasur"
@@ -188,5 +210,4 @@ extern notifiedFIFO_t measur_fifo;
}
void end_meas(void);
#endif //ifndef PHYSIM
#endif
+25 -10
View File
@@ -397,6 +397,16 @@ typedef struct {
nfapi_nr_pucch_pdu_t pucch_pdu;
} NR_gNB_PUCCH_t;
typedef struct {
uint8_t active;
/// Frame where current SRS pdu was received
uint32_t frame;
/// Slot where current SRS pdu was received
uint32_t slot;
/// ULSCH PDU
nfapi_nr_srs_pdu_t srs_pdu;
} NR_gNB_SRS_t;
typedef struct {
/// \brief Pointers (dynamic) to the received data in the time domain.
/// - first index: rx antenna [0..nb_antennas_rx[
@@ -594,6 +604,8 @@ typedef struct gNB_L1_proc_t_s {
pthread_t L1_stats_thread;
/// pthread structure for printing time meas
pthread_t process_stats_thread;
/// pthread structure for reordering L1 tx thread messages
pthread_t pthread_tx_reorder;
/// flag to indicate first RX acquisition
int first_rx;
/// flag to indicate first TX transmission
@@ -751,11 +763,11 @@ typedef struct PHY_VARS_gNB_s {
// nfapi_nr_ul_dci_request_pdus_t *ul_dci_pdu;
uint16_t num_pdsch_rnti[80];
NR_gNB_PBCH pbch;
nr_cce_t cce_list[MAX_DCI_CORESET][NR_MAX_PDCCH_AGG_LEVEL];
NR_gNB_COMMON common_vars;
NR_gNB_PRACH prach_vars;
NR_gNB_PUSCH *pusch_vars[NUMBER_OF_NR_ULSCH_MAX];
NR_gNB_PUCCH_t *pucch[NUMBER_OF_NR_PUCCH_MAX];
NR_gNB_SRS_t *srs[NUMBER_OF_NR_SRS_MAX];
NR_gNB_PDCCH_t pdcch_pdu[NUMBER_OF_NR_PDCCH_MAX];
NR_gNB_UL_PDCCH_t ul_pdcch_pdu[NUMBER_OF_NR_PDCCH_MAX];
NR_gNB_DLSCH_t *dlsch[NUMBER_OF_NR_DLSCH_MAX][2]; // Nusers times two spatial streams
@@ -769,14 +781,14 @@ typedef struct PHY_VARS_gNB_s {
NR_gNB_UCI_STATS_t uci_stats[NUMBER_OF_NR_UCI_STATS_MAX];
t_nrPolar_params *uci_polarParams;
/// SRS variables
nr_srs_info_t *nr_srs_info[NUMBER_OF_NR_SRS_MAX];
uint8_t pbch_configured;
char gNB_generate_rar;
// PUCCH0 Look-up table for cyclic-shifts
NR_gNB_PUCCH0_LUT_t pucch0_lut;
/// NR synchronization sequences
int16_t d_pss[NR_PSS_LENGTH];
int16_t d_sss[NR_SSS_LENGTH];
/// PBCH DMRS sequence
uint32_t nr_gold_pbch_dmrs[2][64][NR_PBCH_DMRS_LENGTH_DWORD];
@@ -844,8 +856,7 @@ typedef struct PHY_VARS_gNB_s {
/*
time_stats_t phy_proc;
*/
time_stats_t *phy_proc_tx_0;
time_stats_t *phy_proc_tx_1;
time_stats_t *phy_proc_tx[2];
time_stats_t phy_proc_rx;
time_stats_t rx_prach;
/*
@@ -887,11 +898,13 @@ typedef struct PHY_VARS_gNB_s {
*/
notifiedFIFO_t *respDecode;
notifiedFIFO_t *resp_L1;
notifiedFIFO_t *resp_L1_tx;
notifiedFIFO_t *L1_tx_free;
notifiedFIFO_t *L1_tx_filled;
notifiedFIFO_t *L1_tx_out;
notifiedFIFO_t *resp_RU_tx;
tpool_t *threadPool;
int nbDecode;
uint8_t pusch_proc_threads;
uint8_t thread_pool_size;
int number_of_nr_dlsch_max;
int number_of_nr_ulsch_max;
void * scopeData;
@@ -952,12 +965,14 @@ typedef struct processingData_L1tx {
int slot;
openair0_timestamp timestamp_tx;
PHY_VARS_gNB *gNB;
nfapi_nr_dl_tti_pdcch_pdu pdcch_pdu;
nfapi_nr_ul_dci_request_pdus_t ul_pdcch_pdu;
nfapi_nr_dl_tti_pdcch_pdu pdcch_pdu[NFAPI_NR_MAX_NB_CORESETS];
nfapi_nr_ul_dci_request_pdus_t ul_pdcch_pdu[NFAPI_NR_MAX_NB_CORESETS];
NR_gNB_CSIRS_t csirs_pdu[NUMBER_OF_NR_CSIRS_MAX];
NR_gNB_DLSCH_t *dlsch[NUMBER_OF_NR_DLSCH_MAX][2];
NR_gNB_SSB_t ssb[64];
uint16_t num_pdsch_slot;
int num_dl_pdcch;
int num_ul_pdcch;
time_stats_t phy_proc_tx;
} processingData_L1tx_t;
+16 -3
View File
@@ -706,6 +706,11 @@ typedef struct {
fapi_nr_ul_config_prach_pdu prach_pdu;
} NR_UE_PRACH;
typedef struct {
bool active;
fapi_nr_ul_config_srs_pdu srs_config_pdu;
} NR_UE_SRS;
// structure used for multiple SSB detection
typedef struct NR_UE_SSB {
uint8_t i_ssb; // i_ssb between 0 and 7 (it corresponds to ssb_index only for Lmax=4,8)
@@ -815,6 +820,7 @@ typedef struct {
NR_UE_PBCH *pbch_vars[NUMBER_OF_CONNECTED_gNB_MAX];
NR_UE_PDCCH *pdcch_vars[RX_NB_TH_MAX][NUMBER_OF_CONNECTED_gNB_MAX];
NR_UE_PRACH *prach_vars[NUMBER_OF_CONNECTED_gNB_MAX];
NR_UE_SRS *srs_vars[NUMBER_OF_CONNECTED_gNB_MAX];
NR_UE_PUSCH *pusch_vars[RX_NB_TH_MAX][NUMBER_OF_CONNECTED_gNB_MAX];
NR_UE_PUCCH *pucch_vars[RX_NB_TH_MAX][NUMBER_OF_CONNECTED_gNB_MAX];
NR_UE_DLSCH_t *dlsch[RX_NB_TH_MAX][NUMBER_OF_CONNECTED_gNB_MAX][NR_MAX_NB_CODEWORDS]; // two RxTx Threads
@@ -967,6 +973,8 @@ typedef struct {
/// PUSCH contention-based access vars
PUSCH_CA_CONFIG_DEDICATED pusch_ca_config_dedicated[NUMBER_OF_eNB_MAX]; // lola
/// SRS variables
nr_srs_info_t *nr_srs_info;
//#if defined(UPGRADE_RAT_NR)
#if 1
@@ -1004,6 +1012,8 @@ typedef struct {
time_stats_t phy_proc_tx;
time_stats_t phy_proc_rx[RX_NB_TH];
time_stats_t ue_ul_indication_stats;
uint32_t use_ia_receiver;
time_stats_t ofdm_mod_stats;
@@ -1012,7 +1022,6 @@ typedef struct {
time_stats_t ulsch_modulation_stats;
time_stats_t ulsch_segmentation_stats;
time_stats_t ulsch_rate_matching_stats;
time_stats_t ulsch_turbo_encoding_stats;
time_stats_t ulsch_interleaving_stats;
time_stats_t ulsch_multiplexing_stats;
@@ -1025,6 +1034,7 @@ typedef struct {
time_stats_t pdsch_procedures_per_slot_stat[RX_NB_TH][LTE_SLOTS_PER_SUBFRAME];
time_stats_t dlsch_procedures_stat[RX_NB_TH];
time_stats_t rx_pdsch_stats;
time_stats_t ofdm_demod_stats;
time_stats_t dlsch_rx_pdcch_stats;
time_stats_t rx_dft_stats;
@@ -1033,13 +1043,13 @@ typedef struct {
time_stats_t dlsch_decoding_stats[2];
time_stats_t dlsch_demodulation_stats;
time_stats_t dlsch_rate_unmatching_stats;
time_stats_t dlsch_turbo_decoding_stats;
time_stats_t dlsch_ldpc_decoding_stats;
time_stats_t dlsch_deinterleaving_stats;
time_stats_t dlsch_llr_stats;
time_stats_t dlsch_llr_stats_parallelization[RX_NB_TH][LTE_SLOTS_PER_SUBFRAME];
time_stats_t dlsch_unscrambling_stats;
time_stats_t dlsch_rate_matching_stats;
time_stats_t dlsch_turbo_encoding_stats;
time_stats_t dlsch_ldpc_encoding_stats;
time_stats_t dlsch_interleaving_stats;
time_stats_t dlsch_tc_init_stats;
time_stats_t dlsch_tc_alpha_stats;
@@ -1098,6 +1108,9 @@ typedef struct LDPCDecode_ue_s {
int offset;
int Tbslbrm;
int decodeIterations;
time_stats_t ts_deinterleave;
time_stats_t ts_rate_unmatch;
time_stats_t ts_ldpc_decode;
} ldpcDecode_ue_t;
#include "SIMULATION/ETH_TRANSPORT/defs.h"
+25 -1
View File
@@ -107,13 +107,24 @@
#define MAX_NUM_NR_ULSCH_SEGMENTS 34
#define MAX_NR_ULSCH_PAYLOAD_BYTES (MAX_NUM_NR_ULSCH_SEGMENTS*1056)
#define MAX_NUM_NR_SRS_SYMBOLS 4
#define MAX_NUM_NR_CHANNEL_BITS (14*273*12*8) // 14 symbols, 273 RB
#define MAX_NUM_NR_RE (14*273*12)
#define NR_RX_NB_TH 1
#define NR_NB_TH_SLOT 2
extern const uint8_t nr_rv_round_map[4];
extern const uint8_t nr_rv_round_map_ue[4];
static inline
uint8_t nr_rv_to_round(uint8_t rv)
{
for (uint8_t round = 0; round < 4; round++) {
if (nr_rv_round_map[round] == rv)
return round;
}
return 0;
}
typedef enum {
NR_MU_0=0,
@@ -240,6 +251,19 @@ typedef struct {
uint8_t init_msg1;
} NR_PRACH_RESOURCES_t;
typedef struct {
uint16_t sc_list_length;
uint16_t sc_list[6 * NR_MAX_NB_RB];
uint8_t srs_generated_signal_bits;
int32_t *srs_generated_signal;
int32_t **srs_received_signal;
int32_t **srs_ls_estimated_channel;
int32_t **srs_estimated_channel_freq;
int32_t **srs_estimated_channel_time;
int32_t **srs_estimated_channel_time_shifted;
uint32_t *noise_power;
} nr_srs_info_t;
typedef struct NR_DL_FRAME_PARMS NR_DL_FRAME_PARMS;
typedef uint32_t (*get_samples_per_slot_t)(int slot, NR_DL_FRAME_PARMS* fp);
+2 -2
View File
@@ -211,10 +211,10 @@ typedef enum {
srs_sl2560 = 16
} SRS_Periodicity_t;
#define NB_SRS_PERIOD (17)
#define NB_SRS_PERIOD (18)
static const uint16_t srs_period[NB_SRS_PERIOD]
= { 1, 2, 4, 5, 8, 10, 16, 20, 32, 40, 64, 80, 160, 320, 640, 1280, 2560}
= { 0, 1, 2, 4, 5, 8, 10, 16, 20, 32, 40, 64, 80, 160, 320, 640, 1280, 2560}
;
/// SRS_Resource of SRS_Config information element from 38.331 RRC specifications
+1 -46
View File
@@ -107,11 +107,10 @@
* @}
*/
#include <common/utils/utils.h>
#include "defs_eNB.h"
#include "types.h"
/** @addtogroup _PHY_STRUCTURES_
* @{
*/
@@ -315,50 +314,6 @@ typedef struct {
#include "openairinterface5g_limits.h"
#include "assertions.h"
#define cmax(a,b) ((a>b) ? (a) : (b))
#define cmax3(a,b,c) ((cmax(a,b)>c) ? (cmax(a,b)) : (c))
#define cmin(a,b) ((a<b) ? (a) : (b))
#ifdef __cplusplus
#ifdef min
#undef min
#undef max
#endif
#else
#define max(a,b) cmax(a,b)
#define min(a,b) cmin(a,b)
#endif
#ifndef malloc16
# ifdef __AVX2__
# define malloc16(x) memalign(32,x+32)
# else
# define malloc16(x) memalign(16,x+16)
# endif
#endif
#define free16(y,x) free(y)
#define bigmalloc malloc
#define bigmalloc16 malloc16
#define openair_free(y,x) free((y))
#define PAGE_SIZE 4096
#define free_and_zero(PtR) do { \
if (PtR) { \
free(PtR); \
PtR = NULL; \
} \
} while (0)
static inline void* malloc16_clear( size_t size )
{
#ifdef __AVX2__
void* ptr = memalign(32, size+32);
#else
void* ptr = memalign(16, size+16);
#endif
DevAssert(ptr);
memset( ptr, 0, size );
return ptr;
}
#endif //__PHY_IMPLEMENTATION_DEFS_H__
/**@}
*/
+2 -1
View File
@@ -24,6 +24,7 @@
#include "PHY/types.h"
#include "PHY/defs_eNB.h"
#include "PHY/defs_gNB.h"
#include "PHY/defs_UE.h"
char* namepointer_chMag ;
@@ -42,6 +43,7 @@ char* namepointer_log2;
PHY_VARS_UE ***PHY_vars_UE_g;
UL_RCC_IND_t UL_RCC_INFO;
NR_UL_IND_t UL_INFO;
unsigned short rev[2048],rev_times4[8192],rev_half[1024];
unsigned short rev256[256],rev512[512],rev1024[1024],rev4096[4096],rev2048[2048],rev8192[8192];
@@ -80,7 +82,6 @@ const double sinr_to_cqi[4][16]= { {-2.5051, -2.5051, -1.7451, -0.3655, 1.0812,
{ -4.1057, -4.1057, -3.3768, -2.2916, -1.1392, 0.1236, 1.2849, 3.1933, 5.9298, 6.4052, 9.6245, 10.9414, 13.5166, 14.9545, 14.9545, 14.9545}
};
//int cqi_to_mcs[16]={0, 0, 1, 3, 5, 7, 9, 13, 15, 16, 20, 23, 25, 27, 27, 27};
const int cqi_to_mcs[16]= {0, 0, 1, 2, 4, 6, 8, 11, 13, 16, 18, 20, 23, 25, 27, 28};
//for SNR to MI conversion 7 th order Polynomial coeff
-3
View File
@@ -83,9 +83,6 @@ const double sinr_to_cqi[4][16]= { {-2.5051, -2.5051, -1.7451, -0.3655, 1.0812,
{ -4.1057, -4.1057, -3.3768, -2.2916, -1.1392, 0.1236, 1.2849, 3.1933, 5.9298, 6.4052, 9.6245, 10.9414, 13.5166, 14.9545, 14.9545, 14.9545}
};
//int cqi_to_mcs[16]={0, 0, 1, 3, 5, 7, 9, 13, 15, 16, 20, 23, 25, 27, 27, 27};
const int cqi_to_mcs[16]= {0, 0, 1, 2, 4, 6, 8, 11, 13, 16, 18, 20, 23, 25, 27, 28};
//for SNR to MI conversion 7 th order Polynomial coeff
const double q_qam16[8]= {3.21151853033897e-10,5.55435952230651e-09,-2.30760065362117e-07,-6.25587743817859e-06,4.62251036452795e-06,0.00224150813158937,0.0393723140344367,0.245486379182639};
const double q_qpsk[8]= {1.94491167814437e-09,8.40494123817774e-08,4.75527131198034e-07,-2.48946285301621e-05,-0.000347614016158364,0.00209252225437100,0.0742986115462510,0.488297879889425};
-1
View File
@@ -72,7 +72,6 @@ const double sinr_to_cqi[4][16]= { {-2.5051, -2.5051, -1.7451, -0.3655, 1.0812,
{ -4.1057, -4.1057, -3.3768, -2.2916, -1.1392, 0.1236, 1.2849, 3.1933, 5.9298, 6.4052, 9.6245, 10.9414, 13.5166, 14.9545, 14.9545, 14.9545}
};
//int cqi_to_mcs[16]={0, 0, 1, 3, 5, 7, 9, 13, 15, 16, 20, 23, 25, 27, 27, 27};
const int cqi_to_mcs[16]= {0, 0, 1, 2, 4, 6, 8, 11, 13, 16, 18, 20, 23, 25, 27, 28};
//for SNR to MI conversion 7 th order Polynomial coeff
+11 -1
View File
@@ -755,6 +755,7 @@ void fill_sr_indication(int UEid, PHY_VARS_eNB *eNB,uint16_t rnti,int frame,int
pthread_mutex_lock(&eNB->UL_INFO_mutex);
nfapi_sr_indication_t *sr_ind = &eNB->UL_INFO.sr_ind;
nfapi_sr_indication_body_t *sr_ind_body = &sr_ind->sr_indication_body;
assert(sr_ind_body->number_of_srs <= NFAPI_SR_IND_MAX_PDU);
nfapi_sr_indication_pdu_t *pdu = &sr_ind_body->sr_pdu_list[sr_ind_body->number_of_srs];
sr_ind->sfn_sf = frame<<4|subframe;
sr_ind->header.message_id = NFAPI_RX_SR_INDICATION;
@@ -1580,6 +1581,7 @@ void fill_rx_indication(PHY_VARS_eNB *eNB,
pthread_mutex_lock(&eNB->UL_INFO_mutex);
eNB->UL_INFO.rx_ind.sfn_sf = frame<<4| subframe;
eNB->UL_INFO.rx_ind.rx_indication_body.tl.tag = NFAPI_RX_INDICATION_BODY_TAG;
assert(eNB->UL_INFO.rx_ind.rx_indication_body.number_of_pdus <= NFAPI_RX_IND_MAX_PDU);
pdu = &eNB->UL_INFO.rx_ind.rx_indication_body.rx_pdu_list[eNB->UL_INFO.rx_ind.rx_indication_body.number_of_pdus];
// pdu->rx_ue_information.handle = eNB->ulsch[ULSCH_id]->handle;
pdu->rx_ue_information.tl.tag = NFAPI_RX_UE_INFORMATION_TAG;
@@ -1587,7 +1589,11 @@ void fill_rx_indication(PHY_VARS_eNB *eNB,
pdu->rx_indication_rel8.tl.tag = NFAPI_RX_INDICATION_REL8_TAG;
pdu->rx_indication_rel8.length = eNB->ulsch[ULSCH_id]->harq_processes[harq_pid]->TBS>>3;
pdu->rx_indication_rel8.offset = 1; // DJP - I dont understand - but broken unless 1 ???? 0; // filled in at the end of the UL_INFO formation
pdu->data = eNB->ulsch[ULSCH_id]->harq_processes[harq_pid]->decodedBytes;
assert(pdu->rx_indication_rel8.length <= NFAPI_RX_IND_DATA_MAX);
memcpy(pdu->rx_ind_data,
eNB->ulsch[ULSCH_id]->harq_processes[harq_pid]->decodedBytes,
pdu->rx_indication_rel8.length);
// estimate timing advance for MAC
sync_pos = lte_est_timing_advance_pusch(&eNB->frame_parms, eNB->pusch_vars[ULSCH_id]->drs_ch_estimates_time);
timing_advance_update = sync_pos;
@@ -1832,6 +1838,7 @@ int getM(PHY_VARS_eNB *eNB,int frame,int subframe) {
void fill_ulsch_cqi_indication (PHY_VARS_eNB *eNB, uint16_t frame, uint8_t subframe, LTE_UL_eNB_HARQ_t *ulsch_harq, uint16_t rnti) {
pthread_mutex_lock (&eNB->UL_INFO_mutex);
assert(eNB->UL_INFO.cqi_ind.cqi_indication_body.number_of_cqis <= NFAPI_CQI_IND_MAX_PDU);
nfapi_cqi_indication_pdu_t *pdu = &eNB->UL_INFO.cqi_ind.cqi_indication_body.cqi_pdu_list[eNB->UL_INFO.cqi_ind.cqi_indication_body.number_of_cqis];
nfapi_cqi_indication_raw_pdu_t *raw_pdu = &eNB->UL_INFO.cqi_ind.cqi_indication_body.cqi_raw_pdu_list[eNB->UL_INFO.cqi_ind.cqi_indication_body.number_of_cqis];
pdu->instance_length = 0;
@@ -1878,6 +1885,7 @@ void fill_ulsch_harq_indication (PHY_VARS_eNB *eNB, LTE_UL_eNB_HARQ_t *ulsch_har
//AssertFatal(DLSCH_id>=0,"DLSCH_id doesn't exist\n");
pthread_mutex_lock(&eNB->UL_INFO_mutex);
assert(eNB->UL_INFO.harq_ind.harq_indication_body.number_of_harqs <= NFAPI_HARQ_IND_MAX_PDU);
nfapi_harq_indication_pdu_t *pdu = &eNB->UL_INFO.harq_ind.harq_indication_body.harq_pdu_list[eNB->UL_INFO.harq_ind.harq_indication_body.number_of_harqs];
int M;
int i;
@@ -1948,6 +1956,7 @@ void fill_uci_harq_indication (int UEid, PHY_VARS_eNB *eNB, LTE_eNB_UCI *uci, in
pthread_mutex_lock(&eNB->UL_INFO_mutex);
nfapi_harq_indication_t *ind = &eNB->UL_INFO.harq_ind;
nfapi_harq_indication_body_t *body = &ind->harq_indication_body;
assert(eNB->UL_INFO.harq_ind.harq_indication_body.number_of_harqs <= NFAPI_HARQ_IND_MAX_PDU);
nfapi_harq_indication_pdu_t *pdu = &body->harq_pdu_list[eNB->UL_INFO.harq_ind.harq_indication_body.number_of_harqs];
ind->sfn_sf = frame<<4|subframe;
ind->header.message_id = NFAPI_HARQ_INDICATION;
@@ -2124,6 +2133,7 @@ void fill_uci_harq_indication (int UEid, PHY_VARS_eNB *eNB, LTE_eNB_UCI *uci, in
void fill_crc_indication (PHY_VARS_eNB *eNB, int ULSCH_id, int frame, int subframe, uint8_t crc_flag) {
pthread_mutex_lock(&eNB->UL_INFO_mutex);
assert(eNB->UL_INFO.crc_ind.crc_indication_body.number_of_crcs <= NFAPI_CRC_IND_MAX_PDU);
nfapi_crc_indication_pdu_t *pdu = &eNB->UL_INFO.crc_ind.crc_indication_body.crc_pdu_list[eNB->UL_INFO.crc_ind.crc_indication_body.number_of_crcs];
eNB->UL_INFO.crc_ind.sfn_sf = frame<<4 | subframe;
eNB->UL_INFO.crc_ind.header.message_id = NFAPI_CRC_INDICATION;
+53 -51
View File
@@ -149,9 +149,10 @@ void nr_schedule_response(NR_Sched_Rsp_t *Sched_INFO){
gNB = RC.gNB[Mod_id];
start_meas(&gNB->schedule_response_stats);
notifiedFIFO_elt_t *res;
res = pullTpool(gNB->resp_L1_tx, gNB->threadPool);
processingData_L1tx_t *msgTx = (processingData_L1tx_t *)NotifiedFifoData(res);
nfapi_nr_config_request_scf_t *cfg = &gNB->gNB_config;
int slot_type = nr_slot_select(cfg,frame,slot);
uint8_t number_dl_pdu = (DL_req==NULL) ? 0 : DL_req->dl_tti_request_body.nPDUs;
uint8_t number_ul_dci_pdu = (UL_dci_req==NULL) ? 0 : UL_dci_req->numPdus;
@@ -159,60 +160,57 @@ void nr_schedule_response(NR_Sched_Rsp_t *Sched_INFO){
uint8_t number_tx_data_pdu = (TX_req == NULL) ? 0 : TX_req->Number_of_PDUs;
if (NFAPI_MODE == NFAPI_MONOLITHIC){
if (DL_req != NULL && TX_req!=NULL && (number_dl_pdu > 0 || number_ul_dci_pdu > 0 || number_ul_tti_pdu > 0))
LOG_D(PHY,"NFAPI: Sched_INFO:SFN/SLOT:%04d/%d DL_req:SFN/SLO:%04d/%d:dl_pdu:%d tx_req:SFN/SLOT:%04d/%d:pdus:%d;ul_dci %d ul_tti %d\n",
frame,slot,
DL_req->SFN,DL_req->Slot,number_dl_pdu,
TX_req->SFN,TX_req->Slot,TX_req->Number_of_PDUs,
number_ul_dci_pdu,number_ul_tti_pdu);
int pdcch_received=0;
msgTx->num_pdsch_slot=0;
msgTx->pdcch_pdu.pdcch_pdu_rel15.numDlDci = 0;
msgTx->ul_pdcch_pdu.pdcch_pdu.pdcch_pdu_rel15.numDlDci = 0;
msgTx->slot = slot;
msgTx->frame = frame;
if (slot_type == NR_DOWNLINK_SLOT || slot_type == NR_MIXED_SLOT) {
notifiedFIFO_elt_t *res;
res = pullTpool(gNB->L1_tx_free, gNB->threadPool);
processingData_L1tx_t *msgTx = (processingData_L1tx_t *)NotifiedFifoData(res);
for (int i=0;i<number_dl_pdu;i++) {
nfapi_nr_dl_tti_request_pdu_t *dl_tti_pdu = &DL_req->dl_tti_request_body.dl_tti_pdu_list[i];
LOG_D(PHY,"NFAPI: dl_pdu %d : type %d\n",i,dl_tti_pdu->PDUType);
switch (dl_tti_pdu->PDUType) {
case NFAPI_NR_DL_TTI_SSB_PDU_TYPE:
handle_nr_nfapi_ssb_pdu(msgTx,frame,slot,
dl_tti_pdu);
break;
msgTx->num_pdsch_slot=0;
msgTx->num_dl_pdcch=0;
msgTx->num_ul_pdcch=number_ul_dci_pdu;
msgTx->slot = slot;
msgTx->frame = frame;
case NFAPI_NR_DL_TTI_PDCCH_PDU_TYPE:
AssertFatal(pdcch_received == 0, "pdcch_received is not 0, we can only handle one PDCCH PDU per slot\n");
msgTx->pdcch_pdu = dl_tti_pdu->pdcch_pdu;
for (int i=0;i<number_dl_pdu;i++) {
nfapi_nr_dl_tti_request_pdu_t *dl_tti_pdu = &DL_req->dl_tti_request_body.dl_tti_pdu_list[i];
LOG_D(PHY,"NFAPI: dl_pdu %d : type %d\n",i,dl_tti_pdu->PDUType);
switch (dl_tti_pdu->PDUType) {
case NFAPI_NR_DL_TTI_SSB_PDU_TYPE:
handle_nr_nfapi_ssb_pdu(msgTx,frame,slot,
dl_tti_pdu);
break;
pdcch_received = 1;
break;
case NFAPI_NR_DL_TTI_PDCCH_PDU_TYPE:
LOG_D(PHY,"frame %d, slot %d, Got NFAPI_NR_DL_TTI_PDCCH_PDU_TYPE for %d.%d\n",frame,slot,DL_req->SFN,DL_req->Slot);
msgTx->pdcch_pdu[msgTx->num_dl_pdcch] = dl_tti_pdu->pdcch_pdu;
msgTx->num_dl_pdcch++;
break;
case NFAPI_NR_DL_TTI_CSI_RS_PDU_TYPE:
LOG_D(PHY,"frame %d, slot %d, Got NFAPI_NR_DL_TTI_CSI_RS_PDU_TYPE for %d.%d\n",frame,slot,DL_req->SFN,DL_req->Slot);
handle_nfapi_nr_csirs_pdu(msgTx,frame,slot,
&dl_tti_pdu->csi_rs_pdu);
break;
case NFAPI_NR_DL_TTI_CSI_RS_PDU_TYPE:
LOG_D(PHY,"frame %d, slot %d, Got NFAPI_NR_DL_TTI_CSI_RS_PDU_TYPE for %d.%d\n",frame,slot,DL_req->SFN,DL_req->Slot);
handle_nfapi_nr_csirs_pdu(msgTx,frame,slot,&dl_tti_pdu->csi_rs_pdu);
break;
case NFAPI_NR_DL_TTI_PDSCH_PDU_TYPE:
LOG_D(PHY,"frame %d, slot %d, Got NFAPI_NR_DL_TTI_PDSCH_PDU_TYPE for %d.%d\n",frame,slot,DL_req->SFN,DL_req->Slot);
nfapi_nr_dl_tti_pdsch_pdu_rel15_t *pdsch_pdu_rel15 = &dl_tti_pdu->pdsch_pdu.pdsch_pdu_rel15;
uint16_t pduIndex = pdsch_pdu_rel15->pduIndex;
AssertFatal(TX_req->pdu_list[pduIndex].num_TLV == 1, "TX_req->pdu_list[%d].num_TLV %d != 1\n",
pduIndex,TX_req->pdu_list[pduIndex].num_TLV);
uint8_t *sdu = (uint8_t *)TX_req->pdu_list[pduIndex].TLVs[0].value.direct;
AssertFatal(msgTx->num_pdsch_slot < gNB->number_of_nr_dlsch_max,"Number of PDSCH PDUs %d exceeded the limit %d\n",
msgTx->num_pdsch_slot,gNB->number_of_nr_dlsch_max);
handle_nr_nfapi_pdsch_pdu(msgTx,&dl_tti_pdu->pdsch_pdu, sdu);
case NFAPI_NR_DL_TTI_PDSCH_PDU_TYPE:
LOG_D(PHY,"frame %d, slot %d, Got NFAPI_NR_DL_TTI_PDSCH_PDU_TYPE for %d.%d\n",frame,slot,DL_req->SFN,DL_req->Slot);
nfapi_nr_dl_tti_pdsch_pdu_rel15_t *pdsch_pdu_rel15 = &dl_tti_pdu->pdsch_pdu.pdsch_pdu_rel15;
uint16_t pduIndex = pdsch_pdu_rel15->pduIndex;
AssertFatal(TX_req->pdu_list[pduIndex].num_TLV == 1, "TX_req->pdu_list[%d].num_TLV %d != 1\n",
pduIndex,TX_req->pdu_list[pduIndex].num_TLV);
uint8_t *sdu = (uint8_t *)TX_req->pdu_list[pduIndex].TLVs[0].value.direct;
AssertFatal(msgTx->num_pdsch_slot < gNB->number_of_nr_dlsch_max,"Number of PDSCH PDUs %d exceeded the limit %d\n",
msgTx->num_pdsch_slot,gNB->number_of_nr_dlsch_max);
handle_nr_nfapi_pdsch_pdu(msgTx,&dl_tti_pdu->pdsch_pdu, sdu);
}
}
for (int i=0; i<number_ul_dci_pdu; i++)
msgTx->ul_pdcch_pdu[i] = UL_dci_req->ul_dci_pdu_list[i];
pushNotifiedFIFO(gNB->L1_tx_filled,res);
}
if (number_ul_dci_pdu > 0)
msgTx->ul_pdcch_pdu = UL_dci_req->ul_dci_pdu_list[number_ul_dci_pdu-1]; // copy the last pdu
pushNotifiedFIFO(gNB->resp_L1_tx,res);
for (int i = 0; i < number_ul_tti_pdu; i++) {
switch (UL_tti_req->pdus_list[i].pdu_type) {
case NFAPI_NR_UL_CONFIG_PUSCH_PDU_TYPE:
@@ -229,6 +227,10 @@ void nr_schedule_response(NR_Sched_Rsp_t *Sched_INFO){
nr_fill_prach(gNB, UL_tti_req->SFN, UL_tti_req->Slot, prach_pdu);
if (gNB->RU_list[0]->if_south == LOCAL_RF) nr_fill_prach_ru(gNB->RU_list[0], UL_tti_req->SFN, UL_tti_req->Slot, prach_pdu);
break;
case NFAPI_NR_UL_CONFIG_SRS_PDU_TYPE:
LOG_D(PHY,"frame %d, slot %d, Got NFAPI_NR_UL_CONFIG_SRS_PDU_TYPE for %d.%d\n", frame, slot, UL_tti_req->SFN, UL_tti_req->Slot);
nr_fill_srs(gNB,UL_tti_req->SFN, UL_tti_req->Slot, &UL_tti_req->pdus_list[i].srs_pdu);
break;
}
}
}
@@ -241,12 +243,12 @@ void nr_schedule_response(NR_Sched_Rsp_t *Sched_INFO){
if (number_ul_dci_pdu>0)
oai_nfapi_ul_dci_req(UL_dci_req);
if (number_dl_pdu>0)
oai_nfapi_dl_tti_req(DL_req);
if (number_tx_data_pdu>0)
oai_nfapi_tx_data_req(TX_req);
if (number_dl_pdu>0)
oai_nfapi_dl_tti_req(DL_req);
}
stop_meas(&gNB->schedule_response_stats);
}
+7 -6
View File
@@ -155,7 +155,7 @@ void nr_feptx_ofdm_2thread(RU_t *ru,int frame_tx,int tti_tx) {
int aa = 0;//physical antenna number
int ret = 0;
int ofdm_mask_full = (1<<(ru->nb_tx*2))-1;
int txdataF_offset = ((tti_tx%2)*fp->samples_per_slot_wCP);
int txdataF_offset = (tti_tx*fp->samples_per_slot_wCP);
if (nr_slot_select(cfg,frame_tx,slot) == NR_UPLINK_SLOT) return;
for (aa=0; aa<ru->nb_tx; aa++) memset(ru->common.txdataF[aa],0,fp->samples_per_slot_wCP*sizeof(int32_t));
@@ -300,7 +300,7 @@ static void *nr_feptx_thread(void *param) {
ofdm_mask_full = (1<<(ru->nb_tx*2))-1;
if(ru->num_gNB != 0){
txdataF_offset = ((slot%2)*fp->samples_per_slot_wCP);
txdataF_offset = (slot*fp->samples_per_slot_wCP);
////////////precoding////////////
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_PREC+feptx->index+1 , 1);
@@ -464,7 +464,7 @@ void nr_feptx_prec(RU_t *ru,int frame_tx,int tti_tx) {
int32_t ***bw;
int i=0;
int slot_tx = tti_tx;
int txdataF_offset = ((tti_tx%2)*fp->samples_per_slot_wCP);
int txdataF_offset = (tti_tx*fp->samples_per_slot_wCP);
start_meas(&ru->precoding_stats);
AssertFatal(ru->nb_log_antennas > 0,"ru->nb_log_antennas is 0!\n");
@@ -477,9 +477,10 @@ void nr_feptx_prec(RU_t *ru,int frame_tx,int tti_tx) {
memcpy((void*)ru->common.txdataF[i],
(void*)&gNB->common_vars.txdataF[i][txdataF_offset],
fp->samples_per_slot_wCP*sizeof(int32_t));
memcpy((void*)&ru->common.beam_id[i][slot_tx*fp->symbols_per_slot],
(void*)&gNB->common_vars.beam_id[i][slot_tx*fp->symbols_per_slot],
fp->symbols_per_slot*sizeof(uint8_t));
if (ru->do_precoding == 1)
memcpy((void*)&ru->common.beam_id[i][slot_tx*fp->symbols_per_slot],
(void*)&gNB->common_vars.beam_id[i][slot_tx*fp->symbols_per_slot],
fp->symbols_per_slot*sizeof(uint8_t));
}
if (ru->nb_tx == 1 && ru->nb_log_antennas == 1) {
+76 -41
View File
@@ -19,19 +19,13 @@
* contact@openairinterface.org
*/
#include "PHY/phy_extern.h"
#include "PHY/defs_gNB.h"
#include "sched_nr.h"
#include "PHY/NR_REFSIG/dmrs_nr.h"
#include "PHY/NR_TRANSPORT/nr_transport_proto.h"
#include "PHY/NR_TRANSPORT/nr_dlsch.h"
#include "PHY/NR_TRANSPORT/nr_ulsch.h"
#include "PHY/NR_TRANSPORT/nr_dci.h"
#include "PHY/NR_ESTIMATION/nr_ul_estimation.h"
#include "PHY/NR_UE_TRANSPORT/pucch_nr.h"
#include "SCHED/sched_eNB.h"
#include "sched_nr.h"
#include "SCHED/sched_common_extern.h"
#include "nfapi/open-nFAPI/nfapi/public_inc/nfapi_interface.h"
#include "nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface.h"
#include "fapi_nr_l1.h"
@@ -39,6 +33,7 @@
#include "common/utils/LOG/vcd_signal_dumper.h"
#include "PHY/INIT/phy_init.h"
#include "PHY/MODULATION/nr_modulation.h"
#include "PHY/NR_UE_TRANSPORT/srs_modulation_nr.h"
#include "T.h"
#include "executables/nr-softmodem.h"
#include "executables/softmodem-common.h"
@@ -74,7 +69,7 @@ void nr_common_signal_procedures (PHY_VARS_gNB *gNB,int frame,int slot,nfapi_nr_
int **txdataF = gNB->common_vars.txdataF;
uint8_t ssb_index, n_hf;
uint16_t ssb_start_symbol;
int txdataF_offset = (slot%2)*fp->samples_per_slot_wCP;
int txdataF_offset = slot*fp->samples_per_slot_wCP;
uint16_t slots_per_hf = (fp->slots_per_frame)>>1;
if (slot<slots_per_hf)
@@ -91,8 +86,8 @@ void nr_common_signal_procedures (PHY_VARS_gNB *gNB,int frame,int slot,nfapi_nr_
nr_set_ssb_first_subcarrier(cfg, fp); // setting the first subcarrier
LOG_D(PHY,"SS TX: frame %d, slot %d, start_symbol %d\n",frame,slot, ssb_start_symbol);
nr_generate_pss(gNB->d_pss, &txdataF[0][txdataF_offset], AMP, ssb_start_symbol, cfg, fp);
nr_generate_sss(gNB->d_sss, &txdataF[0][txdataF_offset], AMP, ssb_start_symbol, cfg, fp);
nr_generate_pss(&txdataF[0][txdataF_offset], AMP, ssb_start_symbol, cfg, fp);
nr_generate_sss(&txdataF[0][txdataF_offset], AMP, ssb_start_symbol, cfg, fp);
if (cfg->carrier_config.num_tx_ant.value <= 4)
nr_generate_pbch_dmrs(gNB->nr_gold_pbch_dmrs[n_hf][ssb_index&7],&txdataF[0][txdataF_offset], AMP, ssb_start_symbol, cfg, fp);
@@ -114,8 +109,7 @@ void nr_common_signal_procedures (PHY_VARS_gNB *gNB,int frame,int slot,nfapi_nr_
gNB->common_vars.beam_id[0][slot*fp->symbols_per_slot+j] = cfg->ssb_table.ssb_beam_id_list[ssb_index].beam_id.value;
}
nr_generate_pbch(&gNB->pbch,
&ssb_pdu,
nr_generate_pbch(&ssb_pdu,
gNB->nr_pbch_interleaver,
&txdataF[0][txdataF_offset],
AMP,
@@ -128,12 +122,13 @@ void phy_procedures_gNB_TX(processingData_L1tx_t *msgTx,
int frame,
int slot,
int do_meas) {
int aa;
PHY_VARS_gNB *gNB = msgTx->gNB;
NR_DL_FRAME_PARMS *fp=&gNB->frame_parms;
nfapi_nr_config_request_scf_t *cfg = &gNB->gNB_config;
int offset = gNB->CC_id;
int txdataF_offset = (slot%2)*fp->samples_per_slot_wCP;
int txdataF_offset = slot*fp->samples_per_slot_wCP;
if ((cfg->cell_config.frame_duplex_type.value == TDD) &&
(nr_slot_select(cfg,frame,slot) == NR_UPLINK_SLOT)) return;
@@ -158,18 +153,15 @@ void phy_procedures_gNB_TX(processingData_L1tx_t *msgTx,
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_gNB_COMMON_TX,0);
int num_dl_dci = msgTx->pdcch_pdu.pdcch_pdu_rel15.numDlDci;
int num_ul_dci = msgTx->ul_pdcch_pdu.pdcch_pdu.pdcch_pdu_rel15.numDlDci;
int num_pdcch_pdus = msgTx->num_ul_pdcch + msgTx->num_dl_pdcch;
if (num_dl_dci > 0 || num_ul_dci > 0) {
LOG_D(PHY, "[gNB %d] Frame %d slot %d Calling nr_generate_dci_top (number of UL/DL DCI %d/%d)\n",
gNB->Mod_id, frame, slot, num_ul_dci, num_dl_dci);
if (num_pdcch_pdus > 0) {
LOG_D(PHY, "[gNB %d] Frame %d slot %d Calling nr_generate_dci_top (number of UL/DL PDCCH PDUs %d/%d)\n",
gNB->Mod_id, frame, slot, msgTx->num_ul_pdcch, msgTx->num_dl_pdcch);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_gNB_PDCCH_TX,1);
nr_generate_dci_top(gNB,
num_dl_dci > 0 ? &msgTx->pdcch_pdu : NULL,
num_ul_dci > 0 ? &msgTx->ul_pdcch_pdu.pdcch_pdu : NULL,
nr_generate_dci_top(msgTx,
gNB->nr_gold_pdcch_dmrs[slot],
&gNB->common_vars.txdataF[0][txdataF_offset],
AMP, fp);
@@ -186,7 +178,7 @@ void phy_procedures_gNB_TX(processingData_L1tx_t *msgTx,
for (int i=0;i<NUMBER_OF_NR_CSIRS_MAX;i++){
NR_gNB_CSIRS_t *csirs = &msgTx->csirs_pdu[i];
if ((csirs->active == 1)) {
if (csirs->active == 1) {
LOG_D(PHY, "CSI-RS generation started in frame %d.%d\n",frame,slot);
nfapi_nr_dl_tti_csi_rs_pdu_rel15_t csi_params = csirs->csirs_pdu.csi_rs_pdu_rel15;
nr_generate_csi_rs(gNB, AMP, csi_params, gNB->gNB_config.cell_config.phy_cell_id.value, slot);
@@ -194,8 +186,6 @@ void phy_procedures_gNB_TX(processingData_L1tx_t *msgTx,
}
}
if (do_meas==1) stop_meas(&msgTx->phy_proc_tx);
// if ((frame&127) == 0) dump_pdsch_stats(gNB);
//apply the OFDM symbol rotation here
@@ -204,19 +194,10 @@ void phy_procedures_gNB_TX(processingData_L1tx_t *msgTx,
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_gNB_TX+offset,0);
if (do_meas==1) stop_meas(&msgTx->phy_proc_tx);
}
/*
if ((cfg->subframe_config.duplex_mode.value == TDD) &&
((nr_slot_select(fp,frame,slot)&NR_DOWNLINK_SLOT)==SF_DL)) return;
// VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_ENB_RX,1);
*/
void nr_postDecode(PHY_VARS_gNB *gNB, notifiedFIFO_elt_t *req) {
ldpcDecode_t *rdata = (ldpcDecode_t*) NotifiedFifoData(req);
NR_UL_gNB_HARQ_t *ulsch_harq = rdata->ulsch_harq;
@@ -263,7 +244,7 @@ void nr_postDecode(PHY_VARS_gNB *gNB, notifiedFIFO_elt_t *req) {
nr_fill_indication(gNB,ulsch_harq->frame, ulsch_harq->slot, rdata->ulsch_id, rdata->harq_pid, 0,0);
//dumpsig=1;
} else {
LOG_I(PHY,"[gNB %d] ULSCH: Setting NAK for SFN/SF %d/%d (pid %d, ndi %d, status %d, round %d, RV %d, prb_start %d, prb_size %d, TBS %d) r %d\n",
LOG_D(PHY,"[gNB %d] ULSCH: Setting NAK for SFN/SF %d/%d (pid %d, ndi %d, status %d, round %d, RV %d, prb_start %d, prb_size %d, TBS %d) r %d\n",
gNB->Mod_id, ulsch_harq->frame, ulsch_harq->slot,
rdata->harq_pid, pusch_pdu->pusch_data.new_data_indicator, ulsch_harq->status,
ulsch_harq->round,
@@ -358,10 +339,11 @@ void nr_ulsch_procedures(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx, int ULSCH
number_dmrs_symbols, // number of dmrs symbols irrespective of single or double symbol dmrs
pusch_pdu->qam_mod_order,
pusch_pdu->nrOfLayers);
LOG_D(PHY,"rb_size %d, number_symbols %d, nb_re_dmrs %d, number_dmrs_symbols %d, qam_mod_order %d, nrOfLayer %d\n",
LOG_D(PHY,"rb_size %d, number_symbols %d, nb_re_dmrs %d, dmrs symbol positions %d, number_dmrs_symbols %d, qam_mod_order %d, nrOfLayer %d\n",
pusch_pdu->rb_size,
number_symbols,
nb_re_dmrs,
pusch_pdu->ul_dmrs_symb_pos,
number_dmrs_symbols, // number of dmrs symbols irrespective of single or double symbol dmrs
pusch_pdu->qam_mod_order,
pusch_pdu->nrOfLayers);
@@ -369,11 +351,10 @@ void nr_ulsch_procedures(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx, int ULSCH
//------------------- ULSCH unscrambling -------------------
//----------------------------------------------------------
start_meas(&gNB->ulsch_unscrambling_stats);
nr_ulsch_unscrambling_optim(gNB->pusch_vars[ULSCH_id]->llr,
G,
0,
pusch_pdu->data_scrambling_id,
pusch_pdu->rnti);
nr_ulsch_unscrambling(gNB->pusch_vars[ULSCH_id]->llr,
G,
pusch_pdu->data_scrambling_id,
pusch_pdu->rnti);
stop_meas(&gNB->ulsch_unscrambling_stats);
//----------------------------------------------------------
//--------------------- ULSCH decoding ---------------------
@@ -455,6 +436,7 @@ void nr_fill_indication(PHY_VARS_gNB *gNB, int frame, int slot_rx, int ULSCH_id,
if (0/*pusch_pdu->mcs_index == 9*/) {
__attribute__((unused))
#ifdef __AVX2__
int off = ((pusch_pdu->rb_size&1) == 1)? 4:0;
#else
@@ -600,6 +582,20 @@ void fill_ul_rb_mask(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx) {
}
}
for (int i=0;i<NUMBER_OF_NR_SRS_MAX;i++) {
NR_gNB_SRS_t *srs = gNB->srs[i];
if (srs) {
if ((srs->active == 1) && (srs->frame == frame_rx) && (srs->slot == slot_rx)) {
nfapi_nr_srs_pdu_t *srs_pdu = &srs->srs_pdu;
for(int symbol = 0; symbol<(1<<srs_pdu->num_symbols); symbol++) {
for(rb = srs_pdu->bwp_start; rb < (srs_pdu->bwp_start+srs_pdu->bwp_size); rb++) {
gNB->rb_mask_ul[gNB->frame_parms.symbols_per_slot-srs_pdu->time_start_position-1+symbol][rb>>5] |= 1<<(rb&31);
}
}
}
}
}
}
void phy_procedures_gNB_common_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx) {
@@ -659,6 +655,8 @@ int phy_procedures_gNB_uespec_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx) {
for (int i=0;i<NUMBER_OF_NR_PUCCH_MAX;i++){
NR_gNB_PUCCH_t *pucch = gNB->pucch[i];
if (pucch) {
if (NFAPI_MODE == NFAPI_MODE_PNF)
pucch->frame = frame_rx;
if ((pucch->active == 1) &&
(pucch->frame == frame_rx) &&
(pucch->slot == slot_rx) ) {
@@ -805,6 +803,43 @@ int phy_procedures_gNB_uespec_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx) {
}
}
}
for (int i=0;i<NUMBER_OF_NR_SRS_MAX;i++) {
NR_gNB_SRS_t *srs = gNB->srs[i];
if (srs) {
if ((srs->active == 1) && (srs->frame == frame_rx) && (srs->slot == slot_rx)) {
LOG_D(NR_PHY, "(%d.%d) gNB is waiting for SRS, id = %i\n", frame_rx, slot_rx, i);
nfapi_nr_srs_pdu_t *srs_pdu = &srs->srs_pdu;
// At least currently, the configuration is constant, so it is enough to generate the sequence just once.
if(gNB->nr_srs_info[i]->sc_list_length == 0) {
generate_srs_nr(srs_pdu, &gNB->frame_parms, gNB->nr_srs_info[i]->srs_generated_signal, gNB->nr_srs_info[i], AMP, frame_rx, slot_rx);
}
nr_get_srs_signal(gNB,frame_rx,slot_rx,srs_pdu, gNB->nr_srs_info[i], gNB->nr_srs_info[i]->srs_received_signal);
nr_srs_channel_estimation(gNB,frame_rx,slot_rx,srs_pdu,
gNB->nr_srs_info[i],
gNB->nr_srs_info[i]->srs_generated_signal,
gNB->nr_srs_info[i]->srs_received_signal,
gNB->nr_srs_info[i]->srs_estimated_channel_freq,
gNB->nr_srs_info[i]->srs_estimated_channel_time,
gNB->nr_srs_info[i]->srs_estimated_channel_time_shifted,
gNB->nr_srs_info[i]->noise_power);
T(T_GNB_PHY_UL_FREQ_CHANNEL_ESTIMATE, T_INT(0), T_INT(srs_pdu->rnti), T_INT(frame_rx), T_INT(0), T_INT(0),
T_BUFFER(gNB->nr_srs_info[i]->srs_estimated_channel_freq[0], gNB->frame_parms.ofdm_symbol_size*sizeof(int32_t)));
T(T_GNB_PHY_UL_TIME_CHANNEL_ESTIMATE, T_INT(0), T_INT(srs_pdu->rnti), T_INT(frame_rx), T_INT(0), T_INT(0),
T_BUFFER(gNB->nr_srs_info[i]->srs_estimated_channel_time_shifted[0], gNB->frame_parms.ofdm_symbol_size*sizeof(int32_t)));
srs->active = 0;
}
}
}
stop_meas(&gNB->phy_proc_rx);
// figure out a better way to choose slot_rx, 19 is ok for a particular TDD configuration with 30kHz SCS
if ((frame_rx&127) == 0 && slot_rx==19) {
+3 -22
View File
@@ -358,31 +358,12 @@ int16_t nr_pucch_power_cntl(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t s
*/
void nr_pusch_power_cntl(PHY_VARS_NR_UE *phy_vars_ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t j, uint8_t abstraction_flag);
/*! \brief This function implements the power control mechanism for SRS from 36.213.
@param phy_vars_ue PHY variables
@param proc Pointer to proc descriptor
@param eNB_id Index of eNB
@param j index of type of PUSCH (SPS, Normal, Msg3)
@returns Transmit power
*/
void nr_srs_power_cntl(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t *pnb_rb_srs, uint8_t abstraction_flag);
void nr_get_cqipmiri_params(PHY_VARS_NR_UE *ue,uint8_t eNB_id);
void nr_dump_dlsch(PHY_VARS_NR_UE *phy_vars_ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t subframe,uint8_t harq_pid);
void nr_dump_dlsch_SI(PHY_VARS_NR_UE *phy_vars_ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t subframe);
void nr_dump_dlsch_ra(PHY_VARS_NR_UE *phy_vars_ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t subframe);
int nr_is_srs_occasion_common(NR_DL_FRAME_PARMS *frame_parms,int frame_tx,int subframe_tx);
void nr_compute_srs_pos(lte_frame_type_t frameType,uint16_t isrs,uint16_t *psrsPeriodicity,uint16_t *psrsOffset);
void set_tx_harq_id(NR_UE_ULSCH_t *ulsch, int harq_pid, int slot_tx);
int get_tx_harq_id(NR_UE_ULSCH_t *ulsch, int slot_tx);
@@ -416,7 +397,8 @@ void nr_fill_rx_indication(fapi_nr_rx_indication_t *rx_ind,
PHY_VARS_NR_UE *ue,
NR_UE_DLSCH_t *dlsch0,
NR_UE_DLSCH_t *dlsch1,
uint16_t n_pdus);
uint16_t n_pdus,
UE_nr_rxtx_proc_t *proc);
bool nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
@@ -424,8 +406,7 @@ bool nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
PDSCH_t pdsch,
NR_UE_DLSCH_t *dlsch0,
NR_UE_DLSCH_t *dlsch1,
int *dlsch_errors,
uint8_t dlsch_parallel);
int *dlsch_errors);
int nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
+215 -11
View File
@@ -39,11 +39,176 @@
#include "PHY/defs_nr_UE.h"
#include "PHY/impl_defs_nr.h"
#include "utils.h"
extern PHY_VARS_NR_UE ***PHY_vars_UE_g;
const char *dl_pdu_type[]={"DCI", "DLSCH", "RA_DLSCH", "SI_DLSCH", "P_DLSCH"};
const char *ul_pdu_type[]={"PRACH", "PUCCH", "PUSCH", "SRS"};
queue_t nr_rx_ind_queue;
queue_t nr_crc_ind_queue;
queue_t nr_uci_ind_queue;
int8_t nr_ue_scheduled_response_stub(nr_scheduled_response_t *scheduled_response) {
if(scheduled_response != NULL)
{
if (scheduled_response->ul_config != NULL)
{
fapi_nr_ul_config_request_t *ul_config = scheduled_response->ul_config;
AssertFatal(ul_config->number_pdus < sizeof(ul_config->ul_config_list) / sizeof(ul_config->ul_config_list[0]),
"Too many ul_config pdus %d", ul_config->number_pdus);
for (int i = 0; i < ul_config->number_pdus; ++i)
{
LOG_I(PHY, "In %s: processing type %d PDU of %d total UL PDUs (ul_config %p) \n",
__FUNCTION__, ul_config->ul_config_list[i].pdu_type, ul_config->number_pdus, ul_config);
uint8_t pdu_type = ul_config->ul_config_list[i].pdu_type;
switch (pdu_type)
{
case (FAPI_NR_UL_CONFIG_TYPE_PUSCH):
{
nfapi_nr_rx_data_indication_t *rx_ind = CALLOC(1, sizeof(*rx_ind));
nfapi_nr_crc_indication_t *crc_ind = CALLOC(1, sizeof(*crc_ind));
nfapi_nr_ue_pusch_pdu_t *pusch_config_pdu = &ul_config->ul_config_list[i].pusch_config_pdu;
if (scheduled_response->tx_request)
{
AssertFatal(scheduled_response->tx_request->number_of_pdus <
sizeof(scheduled_response->tx_request->tx_request_body) / sizeof(scheduled_response->tx_request->tx_request_body[0]),
"Too many tx_req pdus %d", scheduled_response->tx_request->number_of_pdus);
rx_ind->header.message_id = NFAPI_NR_PHY_MSG_TYPE_RX_DATA_INDICATION;
rx_ind->sfn = scheduled_response->ul_config->sfn;
rx_ind->slot = scheduled_response->ul_config->slot;
rx_ind->number_of_pdus = scheduled_response->tx_request->number_of_pdus;
rx_ind->pdu_list = CALLOC(rx_ind->number_of_pdus, sizeof(*rx_ind->pdu_list));
for (int j = 0; j < rx_ind->number_of_pdus; j++)
{
fapi_nr_tx_request_body_t *tx_req_body = &scheduled_response->tx_request->tx_request_body[j];
rx_ind->pdu_list[j].handle = pusch_config_pdu->handle;
rx_ind->pdu_list[j].harq_id = pusch_config_pdu->pusch_data.harq_process_id;
rx_ind->pdu_list[j].pdu_length = tx_req_body->pdu_length;
rx_ind->pdu_list[j].pdu = CALLOC(tx_req_body->pdu_length, sizeof(*rx_ind->pdu_list[j].pdu));
memcpy(rx_ind->pdu_list[j].pdu, tx_req_body->pdu, tx_req_body->pdu_length * sizeof(*rx_ind->pdu_list[j].pdu));
rx_ind->pdu_list[j].rnti = pusch_config_pdu->rnti;
rx_ind->pdu_list[j].timing_advance = scheduled_response->tx_request->tx_config.timing_advance;
rx_ind->pdu_list[j].ul_cqi = scheduled_response->tx_request->tx_config.ul_cqi;
char buffer[1024];
hexdump(rx_ind->pdu_list[j].pdu, rx_ind->pdu_list[j].pdu_length, buffer, sizeof(buffer));
LOG_D(NR_MAC, "Hexdump of pdu %s before queuing rx_ind\n",
buffer);
}
crc_ind->header.message_id = NFAPI_NR_PHY_MSG_TYPE_CRC_INDICATION;
crc_ind->number_crcs = scheduled_response->ul_config->number_pdus;
crc_ind->sfn = scheduled_response->ul_config->sfn;
crc_ind->slot = scheduled_response->ul_config->slot;
crc_ind->crc_list = CALLOC(crc_ind->number_crcs, sizeof(*crc_ind->crc_list));
for (int j = 0; j < crc_ind->number_crcs; j++)
{
crc_ind->crc_list[j].handle = pusch_config_pdu->handle;
crc_ind->crc_list[j].harq_id = pusch_config_pdu->pusch_data.harq_process_id;
LOG_D(NR_MAC, "This is the harq pid %d for crc_list[%d]\n", crc_ind->crc_list[j].harq_id, j);
LOG_D(NR_MAC, "This is sched sfn/sl [%d %d] and crc sfn/sl [%d %d]\n",
scheduled_response->frame, scheduled_response->slot, crc_ind->sfn, crc_ind->slot);
crc_ind->crc_list[j].num_cb = pusch_config_pdu->pusch_data.num_cb;
crc_ind->crc_list[j].rnti = pusch_config_pdu->rnti;
crc_ind->crc_list[j].tb_crc_status = 0;
crc_ind->crc_list[j].timing_advance = scheduled_response->tx_request->tx_config.timing_advance;
crc_ind->crc_list[j].ul_cqi = 255;
}
if (!put_queue(&nr_rx_ind_queue, rx_ind))
{
LOG_E(NR_MAC, "Put_queue failed for rx_ind\n");
for (int i = 0; i < rx_ind->number_of_pdus; i++)
{
free(rx_ind->pdu_list[i].pdu);
rx_ind->pdu_list[i].pdu = NULL;
}
free(rx_ind->pdu_list);
rx_ind->pdu_list = NULL;
free(rx_ind);
rx_ind = NULL;
}
if (!put_queue(&nr_crc_ind_queue, crc_ind))
{
LOG_E(NR_MAC, "Put_queue failed for crc_ind\n");
free(crc_ind->crc_list);
crc_ind->crc_list = NULL;
free(crc_ind);
crc_ind = NULL;
}
LOG_D(PHY, "In %s: Filled queue rx/crc_ind which was filled by ulconfig. \n", __FUNCTION__);
scheduled_response->tx_request->number_of_pdus = 0;
}
break;
}
default:
LOG_I(NR_MAC, "Unknown ul_config->pdu_type %d\n", pdu_type);
break;
}
}
scheduled_response->ul_config->number_pdus = 0;
}
if (scheduled_response->dl_config != NULL)
{
fapi_nr_dl_config_request_t *dl_config = scheduled_response->dl_config;
AssertFatal(dl_config->number_pdus < sizeof(dl_config->dl_config_list) / sizeof(dl_config->dl_config_list[0]),
"Too many dl_config pdus %d", dl_config->number_pdus);
for (int i = 0; i < dl_config->number_pdus; ++i)
{
LOG_D(PHY, "In %s: processing %s PDU of %d total DL PDUs (dl_config %p) \n",
__FUNCTION__, dl_pdu_type[dl_config->dl_config_list[i].pdu_type - 1], dl_config->number_pdus, dl_config);
uint8_t pdu_type = dl_config->dl_config_list[i].pdu_type;
switch (pdu_type)
{
case (FAPI_NR_DL_CONFIG_TYPE_DLSCH):
{
nfapi_nr_uci_indication_t *uci_ind = CALLOC(1, sizeof(*uci_ind));
uci_ind->header.message_id = NFAPI_NR_PHY_MSG_TYPE_UCI_INDICATION;
uci_ind->sfn = scheduled_response->frame;
uci_ind->slot = scheduled_response->slot;
uci_ind->num_ucis = 1;
uci_ind->uci_list = CALLOC(uci_ind->num_ucis, sizeof(*uci_ind->uci_list));
for (int j = 0; j < uci_ind->num_ucis; j++)
{
nfapi_nr_uci_pucch_pdu_format_0_1_t *pdu_0_1 = &uci_ind->uci_list[j].pucch_pdu_format_0_1;
uci_ind->uci_list[j].pdu_type = NFAPI_NR_UCI_FORMAT_0_1_PDU_TYPE;
uci_ind->uci_list[j].pdu_size = sizeof(nfapi_nr_uci_pucch_pdu_format_0_1_t);
memset(pdu_0_1, 0, sizeof(*pdu_0_1));
pdu_0_1->handle = 0;
pdu_0_1->rnti = dl_config->dl_config_list[i].dlsch_config_pdu.rnti;
pdu_0_1->pucch_format = 1;
pdu_0_1->ul_cqi = 255;
pdu_0_1->timing_advance = 0;
pdu_0_1->rssi = 0;
}
LOG_I(NR_PHY, "In %s: Filled queue uci_ind which was filled by dlconfig.\n"
"uci_num %d, SFN/SLOT: [%d, %d]\n",
__FUNCTION__, uci_ind->num_ucis, uci_ind->sfn, uci_ind->slot);
if (!put_queue(&nr_uci_ind_queue, uci_ind))
{
LOG_E(NR_MAC, "Put_queue failed for uci_ind\n");
free(uci_ind->uci_list);
free(uci_ind);
}
break;
}
}
}
}
}
return 0;
}
int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
@@ -105,7 +270,7 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
dlsch0->active = 1;
dlsch0->rnti = dl_config->dl_config_list[i].dlsch_config_pdu.rnti;
LOG_D(PHY,"current_harq_pid = %d\n", current_harq_pid);
LOG_D(PHY,"slot %d current_harq_pid = %d\n",slot, current_harq_pid);
NR_DL_UE_HARQ_t *dlsch0_harq = dlsch0->harq_processes[current_harq_pid];
if (dlsch0_harq){
@@ -131,9 +296,10 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
dlsch0_harq->mcs_table=dlsch_config_pdu->mcs_table;
downlink_harq_process(dlsch0_harq, dlsch0->current_harq_pid, dlsch_config_pdu->ndi, dlsch_config_pdu->rv, dlsch0->rnti_type);
if (dlsch0_harq->status != ACTIVE) {
// dlsch0_harq->status not ACTIVE may be due to false retransmission. Reset the
// following flag to skip PDSCH procedures in that case.
// dlsch0_harq->status not ACTIVE due to false retransmission
// Reset the following flag to skip PDSCH procedures in that case and retrasmit harq status
dlsch0->active = 0;
update_harq_status(module_id,dlsch0->current_harq_pid,dlsch0_harq->ack);
}
/* PTRS */
dlsch0_harq->PTRSFreqDensity = dlsch_config_pdu->PTRSFreqDensity;
@@ -152,8 +318,10 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
if (scheduled_response->ul_config != NULL){
fapi_nr_ul_config_request_t *ul_config = scheduled_response->ul_config;
int pdu_done = 0;
pthread_mutex_lock(&ul_config->mutex_ul_config);
LOG_D(PHY, "%d.%d ul S ul_config %p pdu_done %d number_pdus %d\n", scheduled_response->frame, slot, ul_config, pdu_done, ul_config->number_pdus);
for (i = 0; i < ul_config->number_pdus; ++i){
AssertFatal(ul_config->ul_config_list[i].pdu_type <= FAPI_NR_UL_CONFIG_TYPES,"pdu_type %d out of bounds\n",ul_config->ul_config_list[i].pdu_type);
@@ -167,6 +335,9 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
nfapi_nr_ue_pusch_pdu_t *pusch_config_pdu;
/* PUCCH */
fapi_nr_ul_config_pucch_pdu *pucch_config_pdu;
LOG_D(PHY, "%d.%d ul B ul_config %p t %d pdu_done %d number_pdus %d\n", scheduled_response->frame, slot, ul_config, pdu_type, pdu_done, ul_config->number_pdus);
/* SRS */
fapi_nr_ul_config_srs_pdu *srs_config_pdu;
switch (pdu_type){
@@ -188,10 +359,13 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
if (scheduled_response->tx_request) {
for (int j=0; j<scheduled_response->tx_request->number_of_pdus; j++) {
fapi_nr_tx_request_body_t *tx_req_body = &scheduled_response->tx_request->tx_request_body[j];
if (tx_req_body->pdu_index == i) {
if ((tx_req_body->pdu_index == i) && (tx_req_body->pdu_length > 0)) {
LOG_D(PHY,"%d.%d Copying %d bytes to harq_process_ul_ue->a (harq_pid %d)\n",scheduled_response->frame,slot,tx_req_body->pdu_length,current_harq_pid);
memcpy(harq_process_ul_ue->a, tx_req_body->pdu, tx_req_body->pdu_length);
harq_process_ul_ue->status = ACTIVE;
ul_config->ul_config_list[i].pdu_type = FAPI_NR_UL_CONFIG_TYPE_DONE; // not handle it any more
pdu_done++;
LOG_D(PHY, "%d.%d ul A ul_config %p t %d pdu_done %d number_pdus %d\n", scheduled_response->frame, slot, ul_config, pdu_type, pdu_done, ul_config->number_pdus);
break;
}
}
@@ -215,6 +389,9 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
memcpy((void*)&(pucch_vars->pucch_pdu[j]), (void*)pucch_config_pdu, sizeof(fapi_nr_ul_config_pucch_pdu));
pucch_vars->active[j] = true;
found = true;
ul_config->ul_config_list[i].pdu_type = FAPI_NR_UL_CONFIG_TYPE_DONE; // not handle it any more
pdu_done++;
LOG_D(PHY, "%d.%d ul A ul_config %p t %d pdu_done %d number_pdus %d\n", scheduled_response->frame, slot, ul_config, pdu_type, pdu_done, ul_config->number_pdus);
break;
}
}
@@ -226,18 +403,45 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
// prach config pdu
prach_config_pdu = &ul_config->ul_config_list[i].prach_config_pdu;
memcpy((void*)&(PHY_vars_UE_g[module_id][cc_id]->prach_vars[gNB_id]->prach_pdu), (void*)prach_config_pdu, sizeof(fapi_nr_ul_config_prach_pdu));
ul_config->ul_config_list[i].pdu_type = FAPI_NR_UL_CONFIG_TYPE_DONE; // not handle it any more
pdu_done++;
LOG_D(PHY, "%d.%d ul A ul_config %p t %d pdu_done %d number_pdus %d\n", scheduled_response->frame, slot, ul_config, pdu_type, pdu_done, ul_config->number_pdus);
break;
case (FAPI_NR_UL_CONFIG_TYPE_DONE):
pdu_done++; // count the no of pdu processed
LOG_D(PHY, "%d.%d ul A ul_config %p t %d pdu_done %d number_pdus %d\n", scheduled_response->frame, slot, ul_config, pdu_type, pdu_done, ul_config->number_pdus);
break;
case (FAPI_NR_UL_CONFIG_TYPE_SRS):
// srs config pdu
srs_config_pdu = &ul_config->ul_config_list[i].srs_config_pdu;
memcpy((void*)&(PHY_vars_UE_g[module_id][cc_id]->srs_vars[gNB_id]->srs_config_pdu), (void*)srs_config_pdu, sizeof(fapi_nr_ul_config_srs_pdu));
PHY_vars_UE_g[module_id][cc_id]->srs_vars[gNB_id]->active = true;
ul_config->ul_config_list[i].pdu_type = FAPI_NR_UL_CONFIG_TYPE_DONE; // not handle it any more
pdu_done++;
break;
default:
ul_config->ul_config_list[i].pdu_type = FAPI_NR_UL_CONFIG_TYPE_DONE; // not handle it any more
pdu_done++; // count the no of pdu processed
LOG_D(PHY, "%d.%d ul A ul_config %p t %d pdu_done %d number_pdus %d\n", scheduled_response->frame, slot, ul_config, pdu_type, pdu_done, ul_config->number_pdus);
break;
}
}
if (scheduled_response->tx_request)
scheduled_response->tx_request->number_of_pdus = 0;
ul_config->sfn = 0;
ul_config->slot = 0;
ul_config->number_pdus = 0;
memset(ul_config->ul_config_list, 0, sizeof(ul_config->ul_config_list));
//Clear the fields when all the config pdu are done
if (pdu_done == ul_config->number_pdus) {
if (scheduled_response->tx_request)
scheduled_response->tx_request->number_of_pdus = 0;
ul_config->sfn = 0;
ul_config->slot = 0;
ul_config->number_pdus = 0;
LOG_D(PHY, "%d.%d clear ul_config %p\n", scheduled_response->frame, slot, ul_config);
memset(ul_config->ul_config_list, 0, sizeof(ul_config->ul_config_list));
}
pthread_mutex_unlock(&ul_config->mutex_ul_config);
}
}
+5
View File
@@ -34,14 +34,19 @@
#define __FAPI_NR_UE_L1_H__
#include "NR_IF_Module.h"
#include "openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.h"
#include "openair2/LAYER2/NR_MAC_UE/mac_proto.h"
/**\brief NR UE FAPI-like P7 messages, scheduled response from L2 indicating L1
\param scheduled_response including transmission config(dl_config, ul_config) and data transmission (tx_req)*/
int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response);
int8_t nr_ue_scheduled_response_stub(nr_scheduled_response_t *scheduled_response);
/**\brief NR UE FAPI-like P5 message, physical configuration from L2 to configure L1
\param scheduled_response including transmission config(dl_config, ul_config) and data transmission (tx_req)*/
int8_t nr_ue_phy_config_request(nr_phy_config_t *phy_config);
void update_harq_status(module_id_t module_id, uint8_t harq_pid, uint8_t ack_nack);
#endif
+8 -9
View File
@@ -331,7 +331,6 @@ void init_downlink_harq_status(NR_DL_UE_HARQ_t *dl_harq)
void downlink_harq_process(NR_DL_UE_HARQ_t *dl_harq, int harq_pid, int ndi, int rv, uint8_t rnti_type) {
if (rnti_type == _SI_RNTI_ ||
rnti_type == _P_RNTI_ ||
rnti_type == _RA_RNTI_) {
@@ -350,39 +349,39 @@ void downlink_harq_process(NR_DL_UE_HARQ_t *dl_harq, int harq_pid, int ndi, int
dl_harq->DCINdi = ndi;
break;
case 1:
dl_harq->round = 2;
dl_harq->round = 3;
dl_harq->status = ACTIVE;
dl_harq->first_rx = 0;
if (dl_harq->DCINdi != ndi) {
LOG_E(PHY,"Missed previous DCI detections. NDI toggled but rv %d does not correspond to first reception\n",rv);
dl_harq->status = ACTIVE;
dl_harq->first_rx = 1;
dl_harq->DCINdi = ndi;
}
else if (dl_harq->ack)
else if (dl_harq->ack == 1)
dl_harq->status = SCH_IDLE;
break;
case 2:
dl_harq->round = 1;
dl_harq->status = ACTIVE;
dl_harq->first_rx = 0;
if (dl_harq->DCINdi != ndi) {
LOG_E(PHY,"Missed previous DCI detections. NDI toggled but rv %d does not correspond to first reception\n",rv);
dl_harq->status = ACTIVE;
dl_harq->first_rx = 1;
dl_harq->DCINdi = ndi;
}
else if (dl_harq->ack)
else if (dl_harq->ack == 1)
dl_harq->status = SCH_IDLE;
break;
case 3:
dl_harq->round = 3;
dl_harq->round = 2;
dl_harq->status = ACTIVE;
dl_harq->first_rx = 0;
if (dl_harq->DCINdi != ndi) {
LOG_E(PHY,"Missed previous DCI detections. NDI toggled but rv %d does not correspond to first reception\n",rv);
dl_harq->status = ACTIVE;
dl_harq->first_rx = 1;
dl_harq->DCINdi = ndi;
}
else if (dl_harq->ack)
else if (dl_harq->ack == 1)
dl_harq->status = SCH_IDLE;
break;
default:
+99 -363
View File
@@ -38,15 +38,12 @@
#include "PHY/defs_nr_UE.h"
#include "PHY/phy_extern_nr_ue.h"
#include "PHY/MODULATION/modulation_UE.h"
#include "PHY/NR_REFSIG/refsig_defs_ue.h"
#include "PHY/NR_UE_TRANSPORT/nr_transport_ue.h"
#include "PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h"
#include "SCHED_NR_UE/defs.h"
#include "SCHED_NR_UE/pucch_uci_ue_nr.h"
#include "PHY/NR_UE_TRANSPORT/srs_modulation_nr.h"
#include "SCHED_NR/extern.h"
#include "SCHED_NR_UE/phy_sch_processing_time.h"
#include "PHY/NR_UE_ESTIMATION/nr_estimation.h"
#include "PHY/NR_TRANSPORT/nr_dci.h"
#ifdef EMOS
#include "SCHED/phy_procedures_emos.h"
#endif
@@ -60,6 +57,7 @@
//#define NR_PDCCH_SCHED_DEBUG
//#define NR_PUCCH_SCHED
//#define NR_PUCCH_SCHED_DEBUG
//#define NR_PDSCH_DEBUG
#ifndef PUCCH
#define PUCCH
@@ -78,8 +76,6 @@ fifo_dump_emos_UE emos_dump_UE;
char nr_mode_string[NUM_UE_MODE][20] = {"NOT SYNCHED","PRACH","RAR","RA_WAIT_CR", "PUSCH", "RESYNCH"};
const uint8_t nr_rv_round_map_ue[4] = {0, 2, 1, 3};
#if defined(EXMIMO) || defined(OAI_USRP) || defined(OAI_BLADERF) || defined(OAI_LMSSDR) || defined(OAI_ADRV9371_ZC706)
extern uint64_t downlink_frequency[MAX_NUM_CCs][4];
#endif
@@ -121,7 +117,8 @@ void nr_fill_rx_indication(fapi_nr_rx_indication_t *rx_ind,
PHY_VARS_NR_UE *ue,
NR_UE_DLSCH_t *dlsch0,
NR_UE_DLSCH_t *dlsch1,
uint16_t n_pdus){
uint16_t n_pdus,
UE_nr_rxtx_proc_t *proc ){
NR_DL_FRAME_PARMS *frame_parms = &ue->frame_parms;
@@ -130,6 +127,16 @@ void nr_fill_rx_indication(fapi_nr_rx_indication_t *rx_ind,
LOG_E(PHY, "In %s: multiple number of DL PDUs not supported yet...\n", __FUNCTION__);
}
if (pdu_type != FAPI_NR_RX_PDU_TYPE_SSB)
trace_NRpdu(DIRECTION_DOWNLINK,
dlsch0->harq_processes[dlsch0->current_harq_pid]->b,
dlsch0->harq_processes[dlsch0->current_harq_pid]->TBS / 8,
pdu_type,
WS_C_RNTI,
dlsch0->rnti,
proc->frame_rx,
proc->nr_slot_rx,
0,0);
switch (pdu_type){
case FAPI_NR_RX_PDU_TYPE_SIB:
rx_ind->rx_indication_body[n_pdus - 1].pdsch_pdu.harq_pid = dlsch0->current_harq_pid;
@@ -275,16 +282,17 @@ void phy_procedures_nrUE_TX(PHY_VARS_NR_UE *ue,
LOG_D(PHY,"****** start TX-Chain for AbsSubframe %d.%d ******\n", frame_tx, slot_tx);
start_meas(&ue->phy_proc_tx);
if (ue->UE_mode[gNB_id] <= PUSCH){
for (uint8_t harq_pid = 0; harq_pid < ue->ulsch[proc->thread_id][gNB_id][0]->number_harq_processes_for_pusch; harq_pid++) {
if (ue->ulsch[proc->thread_id][gNB_id][0]->harq_processes[harq_pid]->status == ACTIVE)
nr_ue_ulsch_procedures(ue, harq_pid, frame_tx, slot_tx, proc->thread_id, gNB_id);
}
}
if (ue->UE_mode[gNB_id] == PUSCH) {
ue_srs_procedures_nr(ue, proc, gNB_id);
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_TX, VCD_FUNCTION_OUT);
@@ -478,193 +486,14 @@ int nr_ue_pdcch_procedures(uint8_t gNB_id,
int frame_rx = proc->frame_rx;
int nr_slot_rx = proc->nr_slot_rx;
unsigned int dci_cnt=0;
fapi_nr_dci_indication_t dci_ind = {0};
fapi_nr_dci_indication_t *dci_ind = calloc(1, sizeof(*dci_ind));
nr_downlink_indication_t dl_indication;
NR_UE_PDCCH *pdcch_vars = ue->pdcch_vars[proc->thread_id][gNB_id];
fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15 = &pdcch_vars->pdcch_config[n_ss];
/*
// unsigned int dci_cnt=0, i; //removed for nr_ue_pdcch_procedures and added in the loop for nb_coreset_active
#ifdef NR_PDCCH_SCHED_DEBUG
printf("<-NR_PDCCH_PHY_PROCEDURES_LTE_UE (nr_ue_pdcch_procedures)-> Entering function nr_ue_pdcch_procedures() \n");
#endif
start_meas(&ue->dlsch_rx_pdcch_stats);
int frame_rx = proc->frame_rx;
int nr_slot_rx = proc->nr_slot_rx;
NR_DCI_ALLOC_t dci_alloc_rx[8];
//uint8_t next1_thread_id = proc->thread_id== (RX_NB_TH-1) ? 0:(proc->thread_id+1);
//uint8_t next2_thread_id = next1_thread_id== (RX_NB_TH-1) ? 0:(next1_thread_id+1);
// table dci_fields_sizes_cnt contains dci_fields_sizes for each time a dci is decoded in the slot
// each element represents the size in bits for each dci field, for each decoded dci -> [dci_cnt-1]
// each time a dci is decode at dci_cnt, the values of the table dci_fields_sizes[i][j] will be copied at table dci_fields_sizes_cnt[dci_cnt-1][i][j]
// table dci_fields_sizes_cnt[dci_cnt-1][i][j] will then be used in function nr_extract_dci_info
uint8_t dci_fields_sizes_cnt[MAX_NR_DCI_DECODED_SLOT][NBR_NR_DCI_FIELDS][NBR_NR_FORMATS];
int nb_searchspace_active=0;
NR_UE_PDCCH **pdcch_vars = ue->pdcch_vars[proc->thread_id];
NR_UE_PDCCH *pdcch_vars2 = ue->pdcch_vars[proc->thread_id][gNB_id];
// s in TS 38.212 Subclause 10.1, for each active BWP the UE can deal with 10 different search spaces
// Higher layers have updated the number of searchSpaces with are active in the current slot and this value is stored in variable nb_searchspace_total
int nb_searchspace_total = pdcch_vars2->nb_search_space;
pdcch_vars[gNB_id]->crnti = 0x1234; //to be check how to set when using loop memory
uint16_t c_rnti=pdcch_vars[gNB_id]->crnti;
uint16_t cs_rnti=0,new_rnti=0,tc_rnti=0;
uint16_t p_rnti=P_RNTI;
uint16_t si_rnti=SI_RNTI;
uint16_t ra_rnti=99;
uint16_t sp_csi_rnti=0,sfi_rnti=0,int_rnti=0,tpc_pusch_rnti=0,tpc_pucch_rnti=0,tpc_srs_rnti=0; //FIXME
uint16_t crc_scrambled_values[TOTAL_NBR_SCRAMBLED_VALUES] =
{c_rnti,cs_rnti,new_rnti,tc_rnti,p_rnti,si_rnti,ra_rnti,sp_csi_rnti,sfi_rnti,int_rnti,tpc_pusch_rnti,tpc_pucch_rnti,tpc_srs_rnti};
#ifdef NR_PDCCH_SCHED_DEBUG
printf("<-NR_PDCCH_PHY_PROCEDURES_LTE_UE (nr_ue_pdcch_procedures)-> there is a bug in FAPI to calculate nb_searchspace_total=%d\n",nb_searchspace_total);
#endif
if (nb_searchspace_total>1) nb_searchspace_total=1; // to be removed when fixing bug in FAPI
#ifdef NR_PDCCH_SCHED_DEBUG
printf("<-NR_PDCCH_PHY_PROCEDURES_LTE_UE (nr_ue_pdcch_procedures)-> there is a bug in FAPI to calculate nb_searchspace_total so we set it to 1...\n");
printf("<-NR_PDCCH_PHY_PROCEDURES_LTE_UE (nr_ue_pdcch_procedures)-> the number of searchSpaces active in the current slot(%d) is %d) \n",
nr_slot_rx,nb_searchspace_total);
#endif
//FK: we define dci_ind and dl_indication as local variables, this way the call to the mac should be thread safe
fapi_nr_dci_indication_t dci_ind;
nr_downlink_indication_t dl_indication;
// p in TS 38.212 Subclause 10.1, for each active BWP the UE can deal with 3 different CORESETs (including coresetId 0 for common search space)
//int nb_coreset_total = NR_NBR_CORESET_ACT_BWP;
unsigned int dci_cnt=0;
// this table contains 56 (NBR_NR_DCI_FIELDS) elements for each dci field and format described in TS 38.212. Each element represents the size in bits for each dci field
//uint8_t dci_fields_sizes[NBR_NR_DCI_FIELDS][NBR_NR_FORMATS] = {{0}};
// this is the UL bandwidth part. FIXME! To be defined where this value comes from
// uint16_t n_RB_ULBWP = 106;
// this is the DL bandwidth part. FIXME! To be defined where this value comes from
// First we have to identify each searchSpace active at a time and do PDCCH monitoring corresponding to current searchSpace
// Up to 10 searchSpaces can be configured to UE (s<=10)
for (nb_searchspace_active=0; nb_searchspace_active<nb_searchspace_total; nb_searchspace_active++){
int nb_coreset_active=nb_searchspace_active;
//int do_pdcch_monitoring_current_slot=1; // this variable can be removed and fapi is handling
// The following code has been removed as it is handled by higher layers (fapi)
//
// Verify that monitoring is required at the slot nr_slot_rx. We will run pdcch procedure only if do_pdcch_monitoring_current_slot=1
// For Type0-PDCCH searchspace, we need to calculate the monitoring slot from Tables 13-1 .. 13-15 in TS 38.213 Subsection 13
//NR_UE_SLOT_PERIOD_OFFSET_t sl_period_offset_mon = pdcch_vars2->searchSpace[nb_searchspace_active].monitoringSlotPeriodicityAndOffset;
//if (sl_period_offset_mon == nr_sl1) {
//do_pdcch_monitoring_current_slot=1; // PDCCH monitoring in every slot
//} else if (nr_slot_rx%(uint16_t)sl_period_offset_mon == pdcch_vars2->searchSpace[nb_searchspace_active].monitoringSlotPeriodicityAndOffset_offset) {
//do_pdcch_monitoring_current_slot=1; // PDCCH monitoring in every monitoringSlotPeriodicityAndOffset slot with offset
//}
// FIXME
// For PDCCH monitoring when overlap with SS/PBCH according to 38.213 v15.1.0 Section 10
// To be implemented LATER !!!
//int _offset,_index,_M;
//int searchSpace_id = pdcch_vars2->searchSpace[nb_searchspace_active].searchSpaceId;
#ifdef NR_PDCCH_SCHED_DEBUG
printf("<-NR_PDCCH_PHY_PROCEDURES_LTE_UE (nr_ue_pdcch_procedures)-> nb_searchspace_active=%d do_pdcch_monitoring_current_slot=%d (to be removed)\n",
nb_searchspace_active,
do_pdcch_monitoring_current_slot);
#endif
// if (do_pdcch_monitoring_current_slot) {
// the searchSpace indicates that we need to monitor PDCCH in current nr_slot_rx
// get the parameters describing the current SEARCHSPACE
// the CORESET id applicable to the current SearchSpace
//int searchSpace_coreset_id = pdcch_vars2->searchSpace[nb_searchspace_active].controlResourceSetId;
// FIXME this variable is a bit string (14 bits) identifying every OFDM symbol in a slot.
// at the moment we will not take into consideration this variable and we will consider that the OFDM symbol offset is always the first OFDM in a symbol
uint16_t symbol_within_slot_mon = pdcch_vars2->searchSpace[nb_searchspace_active].monitoringSymbolWithinSlot;
// get the remaining parameters describing the current SEARCHSPACE: // FIXME! To be defined where we get this information from
//NR_UE_SEARCHSPACE_nbrCAND_t num_cand_L1 = pdcch_vars2->searchSpace[nb_searchspace_active].nrofCandidates_aggrlevel1;
//NR_UE_SEARCHSPACE_nbrCAND_t num_cand_L2 = pdcch_vars2->searchSpace[nb_searchspace_active].nrofCandidates_aggrlevel2;
//NR_UE_SEARCHSPACE_nbrCAND_t num_cand_L4 = pdcch_vars2->searchSpace[nb_searchspace_active].nrofCandidates_aggrlevel4;
//NR_UE_SEARCHSPACE_nbrCAND_t num_cand_L8 = pdcch_vars2->searchSpace[nb_searchspace_active].nrofCandidates_aggrlevel8;
//NR_UE_SEARCHSPACE_nbrCAND_t num_cand_L16 = pdcch_vars2->searchSpace[nb_searchspace_active].nrofCandidates_aggrlevel16;
// FIXME! A table of five enum elements
// searchSpaceType indicates whether this is a common search space or a UE-specific search space
//int searchSpaceType = pdcch_vars2->searchSpace[nb_searchspace_active].searchSpaceType.type;
NR_SEARCHSPACE_TYPE_t searchSpaceType = ue_specific;//common;
#ifdef NR_PDCCH_SCHED_DEBUG
printf("<-NR_PDCCH_PHY_PROCEDURES_LTE_UE (nr_ue_pdcch_procedures)-> searchSpaceType=%d is hardcoded THIS HAS TO BE FIXED!!!\n",
searchSpaceType);
#endif
//while ((searchSpace_coreset_id != pdcch_vars2->coreset[nb_coreset_active].controlResourceSetId) && (nb_coreset_active<nb_coreset_total)) {
// we need to identify the CORESET associated to the active searchSpace
//nb_coreset_active++;
if (nb_coreset_active >= nb_coreset_total) return 0; // the coreset_id could not be found. There is a problem
}
//we do not need these parameters yet
// get the parameters describing the current CORESET
//int coreset_duration = pdcch_vars2->coreset[nb_coreset_active].duration;
//uint64_t coreset_freq_dom = pdcch_vars2->coreset[nb_coreset_active].frequencyDomainResources;
//int coreset_shift_index = pdcch_vars2->coreset[nb_coreset_active].cce_reg_mappingType.shiftIndex;
// NR_UE_CORESET_REG_bundlesize_t coreset_bundlesize = pdcch_vars2->coreset[nb_coreset_active].cce_reg_mappingType.reg_bundlesize;
// NR_UE_CORESET_interleaversize_t coreset_interleaversize = pdcch_vars2->coreset[nb_coreset_active].cce_reg_mappingType.interleaversize;
// NR_UE_CORESET_precoder_granularity_t precoder_granularity = pdcch_vars2->coreset[nb_coreset_active].precoderGranularity;
// int tci_statesPDCCH = pdcch_vars2->coreset[nb_coreset_active].tciStatesPDCCH;
// int tci_present = pdcch_vars2->coreset[nb_coreset_active].tciPresentInDCI;
// uint16_t pdcch_DMRS_scrambling_id = pdcch_vars2->coreset[nb_coreset_active].pdcchDMRSScramblingID;
// A set of PDCCH candidates for a UE to monitor is defined in terms of PDCCH search spaces.
// Searchspace types:
// Type0-PDCCH common search space for a DCI format with CRC scrambled by a SI-RNTI
// number of consecutive resource blocks and a number of consecutive symbols for
// the control resource set of the Type0-PDCCH common search space from
// the four most significant bits of RMSI-PDCCH-Config as described in Tables 13-1 through 13-10
// and determines PDCCH monitoring occasions
// from the four least significant bits of RMSI-PDCCH-Config,
// included in MasterInformationBlock, as described in Tables 13-11 through 13-15
// Type0A-PDCCH common search space for a DCI format with CRC scrambled by a SI-RNTI
// Type1-PDCCH common search space for a DCI format with CRC scrambled by a RA-RNTI, or a TC-RNTI, or a C-RNTI
// Type2-PDCCH common search space for a DCI format with CRC scrambled by a P-RNTI
// Type3-PDCCH common search space for a DCI format with CRC scrambled by INT-RNTI, or SFI-RNTI,
// or TPC-PUSCH-RNTI, or TPC-PUCCH-RNTI, or TPC-SRS-RNTI, or C-RNTI, or CS-RNTI(s), or SP-CSI-RNTI
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_PDCCH_PROCEDURES, VCD_FUNCTION_IN);
start_meas(&ue->dlsch_rx_pdcch_stats);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_RX_PDCCH, VCD_FUNCTION_IN);
#ifdef NR_PDCCH_SCHED_DEBUG
printf("<-NR_PDCCH_PHY_PROCEDURES_LTE_UE (nr_ue_pdcch_procedures)-> Entering function nr_rx_pdcch with gNB_id=%d (nb_coreset_active=%d, (symbol_within_slot_mon&0x3FFF)=%d, searchSpaceType=%d)\n",
gNB_id,nb_coreset_active,(symbol_within_slot_mon&0x3FFF),
searchSpaceType);
#endif
nr_rx_pdcch(ue,
frame_rx,
nr_slot_rx,
gNB_id,
//(ue->frame_parms.mode1_flag == 1) ? SISO : ALAMOUTI,
SISO,
ue->high_speed_flag,
ue->is_secondary_ue,
nb_coreset_active,
(symbol_within_slot_mon&0x3FFF),
searchSpaceType);
#ifdef NR_PDCCH_SCHED_DEBUG
printf("<-NR_PDCCH_PHY_PROCEDURES_LTE_UE (nr_ue_pdcch_procedures)-> Ending function nr_rx_pdcch(nb_coreset_active=%d, (symbol_within_slot_mon&0x3FFF)=%d, searchSpaceType=%d)\n",
nb_coreset_active,(symbol_within_slot_mon&0x3FFF),
searchSpaceType);
#endif
*/
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_RX_PDCCH, VCD_FUNCTION_IN);
nr_rx_pdcch(ue, proc, rel15);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_RX_PDCCH, VCD_FUNCTION_OUT);
@@ -677,7 +506,7 @@ int nr_ue_pdcch_procedures(uint8_t gNB_id,
n_ss);
#endif
dci_cnt = nr_dci_decoding_procedure(ue, proc, &dci_ind, rel15);
dci_cnt = nr_dci_decoding_procedure(ue, proc, dci_ind, rel15);
#ifdef NR_PDCCH_SCHED_DEBUG
LOG_I(PHY,"<-NR_PDCCH_PHY_PROCEDURES_LTE_UE (nr_ue_pdcch_procedures)-> Ending function nr_dci_decoding_procedure() -> dci_cnt=%u\n",dci_cnt);
@@ -691,52 +520,16 @@ int nr_ue_pdcch_procedures(uint8_t gNB_id,
ue->Mod_id,frame_rx%1024,nr_slot_rx,nr_mode_string[ue->UE_mode[gNB_id]],
i + 1,
dci_cnt,
dci_ind.dci_list[i].rnti,
dci_ind.dci_list[i].dci_format);
dci_ind->dci_list[i].rnti,
dci_ind->dci_list[i].dci_format);
}
ue->pdcch_vars[proc->thread_id][gNB_id]->dci_received += dci_cnt;
dci_ind.number_of_dcis = dci_cnt;
/*
for (int i=0; i<dci_cnt; i++) {
memset(&dci_ind.dci_list[i].dci,0,sizeof(fapi_nr_dci_pdu_rel15_t));
dci_ind.dci_list[i].rnti = dci_alloc_rx[i].rnti;
dci_ind.dci_list[i].dci_format = dci_alloc_rx[i].format;
dci_ind.dci_list[i].n_CCE = dci_alloc_rx[i].firstCCE;
dci_ind.dci_list[i].N_CCE = (int)dci_alloc_rx[i].L;
status = nr_extract_dci_info(ue,
gNB_id,
ue->frame_parms.frame_type,
dci_alloc_rx[i].dci_length,
dci_alloc_rx[i].rnti,
dci_alloc_rx[i].dci_pdu,
&dci_ind.dci_list[i].dci,
dci_fields_sizes_cnt[i],
dci_alloc_rx[i].format,
nr_slot_rx,
pdcch_vars2->n_RB_BWP[nb_searchspace_active],
pdcch_vars2->n_RB_BWP[nb_searchspace_active],
crc_scrambled_values);
if(status == 0) {
LOG_W(PHY,"<-NR_PDCCH_PHY_PROCEDURES_UE (nr_ue_pdcch_procedures)-> bad DCI %d !!! \n",dci_alloc_rx[i].format);
return(-1);
}
LOG_D(PHY,"<-NR_PDCCH_PHY_PROCEDURES_UE (nr_ue_pdcch_procedures)-> Ending function nr_extract_dci_info()\n");
} // end for loop dci_cnt
*/
// fill dl_indication message
nr_fill_dl_indication(&dl_indication, &dci_ind, NULL, proc, ue, gNB_id);
// send to mac
ue->if_inst->dl_indication(&dl_indication, NULL);
dci_ind->number_of_dcis = dci_cnt;
// fill dl_indication message
nr_fill_dl_indication(&dl_indication, dci_ind, NULL, proc, ue, gNB_id);
// send to mac
ue->if_inst->dl_indication(&dl_indication, NULL);
stop_meas(&ue->dlsch_rx_pdcch_stats);
@@ -811,6 +604,7 @@ int nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int gNB_
first_symbol_with_data++;
}
start_meas(&ue->rx_pdsch_stats);
for (m = s0; m < (s1 + s0); m++) {
dual_stream_UE = 0;
@@ -844,12 +638,13 @@ int nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int gNB_
} else AssertFatal(1==0,"Not RA_PDSCH, SI_PDSCH or PDSCH\n");
stop_meas(&ue->dlsch_llr_stats_parallelization[proc->thread_id][slot]);
LOG_D(PHY, "[AbsSFN %d.%d] LLR Computation Symbol %d %5.2f \n",frame_rx,nr_slot_rx,m,ue->dlsch_llr_stats_parallelization[proc->thread_id][slot].p_time/(cpuf*1000.0));
if (cpumeas(CPUMEAS_GETSTATE))
LOG_D(PHY, "[AbsSFN %d.%d] LLR Computation Symbol %d %5.2f \n",frame_rx,nr_slot_rx,m,ue->dlsch_llr_stats_parallelization[proc->thread_id][slot].p_time/(cpuf*1000.0));
if(first_symbol_flag) {
proc->first_symbol_available = 1;
}
} // CRNTI active
stop_meas(&ue->rx_pdsch_stats);
}
return 0;
}
@@ -860,8 +655,7 @@ bool nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
PDSCH_t pdsch,
NR_UE_DLSCH_t *dlsch0,
NR_UE_DLSCH_t *dlsch1,
int *dlsch_errors,
uint8_t dlsch_parallel) {
int *dlsch_errors) {
if (dlsch0==NULL)
AssertFatal(0,"dlsch0 should be defined at this level \n");
@@ -873,7 +667,7 @@ bool nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
NR_UE_PDSCH *pdsch_vars;
uint16_t dmrs_len = get_num_dmrs(dlsch0->harq_processes[dlsch0->current_harq_pid]->dlDmrsSymbPos);
nr_downlink_indication_t dl_indication;
fapi_nr_rx_indication_t rx_ind;
fapi_nr_rx_indication_t *rx_ind = calloc(1, sizeof(*rx_ind));
uint16_t number_pdus = 1;
// params for UL time alignment procedure
NR_UL_TIME_ALIGNMENT_t *ul_time_alignment = &ue->ul_time_alignment[gNB_id];
@@ -990,29 +784,26 @@ bool nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
harq_pid,
pdsch==PDSCH?1:0,
dlsch0->harq_processes[harq_pid]->TBS>256?1:0);
if( dlsch_parallel) {
LOG_T(PHY,"dlsch decoding is parallelized, ret = %d\n", ret);
}
else {
LOG_T(PHY,"Sequential dlsch decoding , ret = %d\n", ret);
}
LOG_T(PHY,"dlsch decoding, ret = %d\n", ret);
if(ret<dlsch0->max_ldpc_iterations+1)
dec = true;
switch (pdsch) {
case RA_PDSCH:
nr_fill_dl_indication(&dl_indication, NULL, &rx_ind, proc, ue, gNB_id);
nr_fill_rx_indication(&rx_ind, FAPI_NR_RX_PDU_TYPE_RAR, gNB_id, ue, dlsch0, NULL, number_pdus);
nr_fill_dl_indication(&dl_indication, NULL, rx_ind, proc, ue, gNB_id);
nr_fill_rx_indication(rx_ind, FAPI_NR_RX_PDU_TYPE_RAR, gNB_id, ue, dlsch0, NULL, number_pdus, proc);
ue->UE_mode[gNB_id] = RA_RESPONSE;
break;
case PDSCH:
nr_fill_dl_indication(&dl_indication, NULL, &rx_ind, proc, ue, gNB_id);
nr_fill_rx_indication(&rx_ind, FAPI_NR_RX_PDU_TYPE_DLSCH, gNB_id, ue, dlsch0, NULL, number_pdus);
nr_fill_dl_indication(&dl_indication, NULL, rx_ind, proc, ue, gNB_id);
nr_fill_rx_indication(rx_ind, FAPI_NR_RX_PDU_TYPE_DLSCH, gNB_id, ue, dlsch0, NULL, number_pdus, proc);
break;
case SI_PDSCH:
nr_fill_dl_indication(&dl_indication, NULL, &rx_ind, proc, ue, gNB_id);
nr_fill_rx_indication(&rx_ind, FAPI_NR_RX_PDU_TYPE_SIB, gNB_id, ue, dlsch0, NULL, number_pdus);
nr_fill_dl_indication(&dl_indication, NULL, rx_ind, proc, ue, gNB_id);
nr_fill_rx_indication(rx_ind, FAPI_NR_RX_PDU_TYPE_SIB, gNB_id, ue, dlsch0, NULL, number_pdus, proc);
break;
default:
break;
@@ -1020,14 +811,13 @@ bool nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
LOG_D(PHY, "In %s DL PDU length in bits: %d, in bytes: %d \n", __FUNCTION__, dlsch0->harq_processes[harq_pid]->TBS, dlsch0->harq_processes[harq_pid]->TBS / 8);
stop_meas(&ue->dlsch_decoding_stats[proc->thread_id]);
LOG_D(PHY, " --> Unscrambling for CW0 %5.3f\n",
(ue->dlsch_unscrambling_stats.p_time)/(cpuf*1000.0));
LOG_D(PHY, "AbsSubframe %d.%d --> LDPC Decoding for CW0 %5.3f\n",
frame_rx%1024, nr_slot_rx,(ue->dlsch_decoding_stats[proc->thread_id].p_time)/(cpuf*1000.0));
stop_meas(&ue->dlsch_decoding_stats[proc->thread_id]);
if (cpumeas(CPUMEAS_GETSTATE)) {
LOG_D(PHY, " --> Unscrambling for CW0 %5.3f\n",
(ue->dlsch_unscrambling_stats.p_time)/(cpuf*1000.0));
LOG_D(PHY, "AbsSubframe %d.%d --> LDPC Decoding for CW0 %5.3f\n",
frame_rx%1024, nr_slot_rx,(ue->dlsch_decoding_stats[proc->thread_id].p_time)/(cpuf*1000.0));
}
if(is_cw1_active) {
// start ldpc decode for CW 1
@@ -1071,30 +861,17 @@ bool nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
harq_pid,
pdsch==PDSCH?1:0,//proc->decoder_switch,
dlsch1->harq_processes[harq_pid]->TBS>256?1:0);
if(dlsch_parallel) {
LOG_T(PHY,"CW dlsch decoding is parallelized, ret1 = %d\n", ret1);
}
else {
LOG_T(PHY,"CW dlsch decoding, ret1 = %d\n", ret1);
LOG_T(PHY,"CWW sequential dlsch decoding, ret1 = %d\n", ret1);
}
stop_meas(&ue->dlsch_decoding_stats[proc->thread_id]);
LOG_D(PHY, " --> Unscrambling for CW1 %5.3f\n",
(ue->dlsch_unscrambling_stats.p_time)/(cpuf*1000.0));
LOG_D(PHY, "AbsSubframe %d.%d --> ldpc Decoding for CW1 %5.3f\n",
frame_rx%1024, nr_slot_rx,(ue->dlsch_decoding_stats[proc->thread_id].p_time)/(cpuf*1000.0));
LOG_D(PHY,"AbsSubframe %d.%d --> ldpc Decoding for CW1 %5.3f\n",
frame_rx%1024, nr_slot_rx,(ue->dlsch_decoding_stats[proc->thread_id].p_time)/(cpuf*1000.0));
LOG_D(PHY, "harq_pid: %d, TBS expected dlsch1: %d \n", harq_pid, dlsch1->harq_processes[harq_pid]->TBS);
stop_meas(&ue->dlsch_decoding_stats[proc->thread_id]);
if (cpumeas(CPUMEAS_GETSTATE)) {
LOG_D(PHY, " --> Unscrambling for CW1 %5.3f\n",
(ue->dlsch_unscrambling_stats.p_time)/(cpuf*1000.0));
LOG_D(PHY, "AbsSubframe %d.%d --> ldpc Decoding for CW1 %5.3f\n",
frame_rx%1024, nr_slot_rx,(ue->dlsch_decoding_stats[proc->thread_id].p_time)/(cpuf*1000.0));
}
LOG_D(PHY, "harq_pid: %d, TBS expected dlsch1: %d \n", harq_pid, dlsch1->harq_processes[harq_pid]->TBS);
}
LOG_D(PHY," ------ end ldpc decoder for AbsSubframe %d.%d ------ decoded in %d \n", frame_rx, nr_slot_rx, ret);
// send to mac
if (ue->if_inst && ue->if_inst->dl_indication) {
ue->if_inst->dl_indication(&dl_indication, ul_time_alignment);
@@ -1395,8 +1172,8 @@ void *UE_thread_slot1_dl_processing(void *arg) {
stop_meas(&ue->ue_front_end_per_slot_stat[proc->thread_id][1]);
LOG_D(PHY, "[AbsSFN %d.%d] Slot1: FFT + Channel Estimate + Pdsch Proc Slot0 %5.2f \n",frame_rx,nr_slot_rx,ue->ue_front_end_per_slot_stat[proc->thread_id][1].p_time/(cpuf*1000.0));
if (cpumeas(CPUMEAS_GETSTATE))
LOG_D(PHY, "[AbsSFN %d.%d] Slot1: FFT + Channel Estimate + Pdsch Proc Slot0 %5.2f \n",frame_rx,nr_slot_rx,ue->ue_front_end_per_slot_stat[proc->thread_id][1].p_time/(cpuf*1000.0));
//wait until pdcch is decoded
uint32_t wait = 0;
@@ -1485,7 +1262,8 @@ void *UE_thread_slot1_dl_processing(void *arg) {
//printf("Set available LLR slot1 to 1 AbsSubframe %d.%d \n",frame_rx,nr_slot_rx);
stop_meas(&ue->pdsch_procedures_per_slot_stat[proc->thread_id][1]);
LOG_D(PHY, "[AbsSFN %d.%d] Slot1: LLR Computation %5.2f \n",frame_rx,nr_slot_rx,ue->pdsch_procedures_per_slot_stat[proc->thread_id][1].p_time/(cpuf*1000.0));
if (cpumeas(CPUMEAS_GETSTATE))
LOG_D(PHY, "[AbsSFN %d.%d] Slot1: LLR Computation %5.2f \n",frame_rx,nr_slot_rx,ue->pdsch_procedures_per_slot_stat[proc->thread_id][1].p_time/(cpuf*1000.0));
if (pthread_mutex_lock(&proc->mutex_slot1_dl_processing) != 0) {
LOG_E( PHY, "[SCHED][UE] error locking mutex for UE RXTX\n" );
@@ -1597,6 +1375,7 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,
NR_DL_FRAME_PARMS *fp = &ue->frame_parms;
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_RX, VCD_FUNCTION_IN);
start_meas(&ue->phy_proc_rx[proc->thread_id]);
LOG_D(PHY," ****** start RX-Chain for Frame.Slot %d.%d (energy %d dB)****** \n",
frame_rx%1024, nr_slot_rx,
@@ -1778,8 +1557,7 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,
SI_PDSCH,
ue->dlsch_SI[gNB_id],
NULL,
&ue->dlsch_SI_errors[gNB_id],
dlsch_parallel);
&ue->dlsch_SI_errors[gNB_id]);
// deactivate dlsch once dlsch proc is done
ue->dlsch_SI[gNB_id]->active = 0;
@@ -1803,8 +1581,7 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,
P_PDSCH,
ue->dlsch_p[gNB_id],
NULL,
&ue->dlsch_p_errors[gNB_id],
dlsch_parallel);
&ue->dlsch_p_errors[gNB_id]);
// deactivate dlsch once dlsch proc is done
ue->dlsch_p[gNB_id]->active = 0;
@@ -1827,19 +1604,17 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,
RA_PDSCH,
ue->dlsch_ra[gNB_id],
NULL,
&ue->dlsch_ra_errors[gNB_id],
dlsch_parallel);
&ue->dlsch_ra_errors[gNB_id]);
// deactivate dlsch once dlsch proc is done
ue->dlsch_ra[gNB_id]->active = 0;
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC_RA, VCD_FUNCTION_OUT);
}
// do procedures for C-RNTI
if (ue->dlsch[proc->thread_id][gNB_id][0]->active == 1) {
LOG_D(PHY, "DLSCH data reception at nr_slot_rx: %d \n \n", nr_slot_rx);
LOG_D(PHY, "DLSCH data reception at nr_slot_rx: %d\n", nr_slot_rx);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC, VCD_FUNCTION_IN);
start_meas(&ue->dlsch_procedures_stat[proc->thread_id]);
@@ -1851,14 +1626,13 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,
PDSCH,
ue->dlsch[proc->thread_id][gNB_id][0],
ue->dlsch[proc->thread_id][gNB_id][1],
&ue->dlsch_errors[gNB_id],
dlsch_parallel);
&ue->dlsch_errors[gNB_id]);
stop_meas(&ue->dlsch_procedures_stat[proc->thread_id]);
LOG_D(PHY, "[SFN %d] Slot1: Pdsch Proc %5.2f\n",nr_slot_rx,ue->pdsch_procedures_stat[proc->thread_id].p_time/(cpuf*1000.0));
LOG_D(PHY, "[SFN %d] Slot0 Slot1: Dlsch Proc %5.2f\n",nr_slot_rx,ue->dlsch_procedures_stat[proc->thread_id].p_time/(cpuf*1000.0));
if (cpumeas(CPUMEAS_GETSTATE)) {
LOG_D(PHY, "[SFN %d] Slot1: Pdsch Proc %5.2f\n",nr_slot_rx,ue->pdsch_procedures_stat[proc->thread_id].p_time/(cpuf*1000.0));
LOG_D(PHY, "[SFN %d] Slot0 Slot1: Dlsch Proc %5.2f\n",nr_slot_rx,ue->dlsch_procedures_stat[proc->thread_id].p_time/(cpuf*1000.0));
}
// deactivate dlsch once dlsch proc is done
ue->dlsch[proc->thread_id][gNB_id][0]->active = 0;
@@ -1867,87 +1641,49 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,
}
start_meas(&ue->generic_stat);
start_meas(&ue->generic_stat);
#if 0
if (nr_slot_rx==9) {
if (frame_rx % 10 == 0) {
if ((ue->dlsch_received[gNB_id] - ue->dlsch_received_last[gNB_id]) != 0)
ue->dlsch_fer[gNB_id] = (100*(ue->dlsch_errors[gNB_id] - ue->dlsch_errors_last[gNB_id]))/(ue->dlsch_received[gNB_id] - ue->dlsch_received_last[gNB_id]);
if(nr_slot_rx==5 && ue->dlsch[proc->thread_id][gNB_id][0]->harq_processes[ue->dlsch[proc->thread_id][gNB_id][0]->current_harq_pid]->nb_rb > 20){
//write_output("decoder_llr.m","decllr",dlsch_llr,G,1,0);
//write_output("llr.m","llr", &ue->pdsch_vars[proc->thread_id][gNB_id]->llr[0][0],(14*nb_rb*12*dlsch1_harq->Qm) - 4*(nb_rb*4*dlsch1_harq->Qm),1,0);
write_output("rxdataF0_current.m" , "rxdataF0", &ue->common_vars.common_vars_rx_data_per_thread[proc->thread_id].rxdataF[0][0],14*fp->ofdm_symbol_size,1,1);
//write_output("rxdataF0_previous.m" , "rxdataF0_prev_sss", &ue->common_vars.common_vars_rx_data_per_thread[next_thread_id].rxdataF[0][0],14*fp->ofdm_symbol_size,1,1);
//write_output("rxdataF0_previous.m" , "rxdataF0_prev", &ue->common_vars.common_vars_rx_data_per_thread[next_thread_id].rxdataF[0][0],14*fp->ofdm_symbol_size,1,1);
write_output("dl_ch_estimates.m", "dl_ch_estimates_sfn5", &ue->common_vars.common_vars_rx_data_per_thread[proc->thread_id].dl_ch_estimates[0][0][0],14*fp->ofdm_symbol_size,1,1);
write_output("dl_ch_estimates_ext.m", "dl_ch_estimatesExt_sfn5", &ue->pdsch_vars[proc->thread_id][gNB_id]->dl_ch_estimates_ext[0][0],14*fp->N_RB_DL*12,1,1);
write_output("rxdataF_comp00.m","rxdataF_comp00", &ue->pdsch_vars[proc->thread_id][gNB_id]->rxdataF_comp0[0][0],14*fp->N_RB_DL*12,1,1);
//write_output("magDLFirst.m", "magDLFirst", &phy_vars_ue->pdsch_vars[proc->thread_id][gNB_id]->dl_ch_mag0[0][0],14*fp->N_RB_DL*12,1,1);
//write_output("magDLSecond.m", "magDLSecond", &phy_vars_ue->pdsch_vars[proc->thread_id][gNB_id]->dl_ch_magb0[0][0],14*fp->N_RB_DL*12,1,1);
AssertFatal (0,"");
}
#endif
// duplicate harq structure
/*
uint8_t current_harq_pid = ue->dlsch[proc->thread_id][gNB_id][0]->current_harq_pid;
NR_DL_UE_HARQ_t *current_harq_processes = ue->dlsch[proc->thread_id][gNB_id][0]->harq_processes[current_harq_pid];
NR_DL_UE_HARQ_t *harq_processes_dest = ue->dlsch[next1_thread_id][gNB_id][0]->harq_processes[current_harq_pid];
NR_DL_UE_HARQ_t *harq_processes_dest1 = ue->dlsch[next2_thread_id][gNB_id][0]->harq_processes[current_harq_pid];
*/
/*nr_harq_status_t *current_harq_ack = &ue->dlsch[proc->thread_id][gNB_id][0]->harq_ack[nr_slot_rx];
nr_harq_status_t *harq_ack_dest = &ue->dlsch[next1_thread_id][gNB_id][0]->harq_ack[nr_slot_rx];
nr_harq_status_t *harq_ack_dest1 = &ue->dlsch[next2_thread_id][gNB_id][0]->harq_ack[nr_slot_rx];
*/
//copy_harq_proc_struct(harq_processes_dest, current_harq_processes);
//copy_ack_struct(harq_ack_dest, current_harq_ack);
//copy_harq_proc_struct(harq_processes_dest1, current_harq_processes);
//copy_ack_struct(harq_ack_dest1, current_harq_ack);
if (nr_slot_rx==9) {
if (frame_rx % 10 == 0) {
if ((ue->dlsch_received[gNB_id] - ue->dlsch_received_last[gNB_id]) != 0)
ue->dlsch_fer[gNB_id] = (100*(ue->dlsch_errors[gNB_id] - ue->dlsch_errors_last[gNB_id]))/(ue->dlsch_received[gNB_id] - ue->dlsch_received_last[gNB_id]);
ue->dlsch_errors_last[gNB_id] = ue->dlsch_errors[gNB_id];
ue->dlsch_received_last[gNB_id] = ue->dlsch_received[gNB_id];
}
ue->dlsch_errors_last[gNB_id] = ue->dlsch_errors[gNB_id];
ue->dlsch_received_last[gNB_id] = ue->dlsch_received[gNB_id];
}
ue->bitrate[gNB_id] = (ue->total_TBS[gNB_id] - ue->total_TBS_last[gNB_id])*100;
ue->total_TBS_last[gNB_id] = ue->total_TBS[gNB_id];
LOG_D(PHY,"[UE %d] Calculating bitrate Frame %d: total_TBS = %d, total_TBS_last = %d, bitrate %f kbits\n",
ue->Mod_id,frame_rx,ue->total_TBS[gNB_id],
ue->total_TBS_last[gNB_id],(float) ue->bitrate[gNB_id]/1000.0);
ue->bitrate[gNB_id] = (ue->total_TBS[gNB_id] - ue->total_TBS_last[gNB_id])*100;
ue->total_TBS_last[gNB_id] = ue->total_TBS[gNB_id];
LOG_D(PHY,"[UE %d] Calculating bitrate Frame %d: total_TBS = %d, total_TBS_last = %d, bitrate %f kbits\n",
ue->Mod_id,frame_rx,ue->total_TBS[gNB_id],
ue->total_TBS_last[gNB_id],(float) ue->bitrate[gNB_id]/1000.0);
#if UE_AUTOTEST_TRACE
if ((frame_rx % 100 == 0)) {
LOG_I(PHY,"[UE %d] AUTOTEST Metric : UE_DLSCH_BITRATE = %5.2f kbps (frame = %d) \n", ue->Mod_id, (float) ue->bitrate[gNB_id]/1000.0, frame_rx);
}
if ((frame_rx % 100 == 0)) {
LOG_I(PHY,"[UE %d] AUTOTEST Metric : UE_DLSCH_BITRATE = %5.2f kbps (frame = %d) \n", ue->Mod_id, (float) ue->bitrate[gNB_id]/1000.0, frame_rx);
}
#endif
}
}
stop_meas(&ue->generic_stat);
stop_meas(&ue->generic_stat);
if (cpumeas(CPUMEAS_GETSTATE))
LOG_D(PHY,"after tubo until end of Rx %5.2f \n",ue->generic_stat.p_time/(cpuf*1000.0));
#ifdef EMOS
phy_procedures_emos_UE_RX(ue,slot,gNB_id);
phy_procedures_emos_UE_RX(ue,slot,gNB_id);
#endif
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_RX, VCD_FUNCTION_OUT);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_RX, VCD_FUNCTION_OUT);
stop_meas(&ue->phy_proc_rx[proc->thread_id]);
LOG_D(PHY, "------FULL RX PROC [SFN %d]: %5.2f ------\n",nr_slot_rx,ue->phy_proc_rx[proc->thread_id].p_time/(cpuf*1000.0));
stop_meas(&ue->phy_proc_rx[proc->thread_id]);
if (cpumeas(CPUMEAS_GETSTATE))
LOG_D(PHY, "------FULL RX PROC [SFN %d]: %5.2f ------\n",nr_slot_rx,ue->phy_proc_rx[proc->thread_id].p_time/(cpuf*1000.0));
//#endif //pdsch
LOG_D(PHY," ****** end RX-Chain for AbsSubframe %d.%d ****** \n", frame_rx%1024, nr_slot_rx);
return (0);
LOG_D(PHY," ****** end RX-Chain for AbsSubframe %d.%d ****** \n", frame_rx%1024, nr_slot_rx);
return (0);
}
+11 -10
View File
@@ -3193,7 +3193,7 @@ void ue_pdsch_procedures(PHY_VARS_UE *ue,
slot = 1;
stop_meas(&ue->dlsch_llr_stats_parallelization[ue->current_thread_id[subframe_rx]][slot]);
LOG_I(PHY, "[AbsSFN %d.%d] LLR Computation Symbol %d %5.2f \n",proc->frame_rx,subframe_rx,m,ue->dlsch_llr_stats_parallelization[ue->current_thread_id[subframe_rx]][slot].p_time/(cpuf*1000.0));
LOG_D(PHY, "[AbsSFN %d.%d] LLR Computation Symbol %d %5.2f \n",proc->frame_rx,subframe_rx,m,ue->dlsch_llr_stats_parallelization[ue->current_thread_id[subframe_rx]][slot].p_time/(cpuf*1000.0));
}
if(first_symbol_flag) {
@@ -3686,6 +3686,7 @@ void *UE_thread_slot1_dl_processing(void *arg) {
if ( (proc->sub_frame_start+1)%RX_NB_TH == 1 && threads.slot1_proc_two != -1 )
CPU_SET(threads.slot1_proc_two, &cpuset);
// cppcheck-suppress moduloAlwaysTrueFalse
if ( (proc->sub_frame_start+1)%RX_NB_TH == 2 && threads.slot1_proc_three != -1 )
CPU_SET(threads.slot1_proc_three, &cpuset);
@@ -3825,7 +3826,7 @@ void *UE_thread_slot1_dl_processing(void *arg) {
if ( LOG_DEBUGFLAG(UE_TIMING)) {
stop_meas(&ue->ue_front_end_per_slot_stat[ue->current_thread_id[subframe_rx]][1]);
LOG_I(PHY, "[AbsSFN %d.%d] Slot1: FFT + Channel Estimate + Pdsch Proc Slot0 %5.2f \n",frame_rx,subframe_rx,ue->ue_front_end_per_slot_stat[ue->current_thread_id[subframe_rx]][1].p_time/(cpuf*1000.0));
LOG_D(PHY, "[AbsSFN %d.%d] Slot1: FFT + Channel Estimate + Pdsch Proc Slot0 %5.2f \n",frame_rx,subframe_rx,ue->ue_front_end_per_slot_stat[ue->current_thread_id[subframe_rx]][1].p_time/(cpuf*1000.0));
}
//wait until pdcch is decoded
@@ -3919,7 +3920,7 @@ void *UE_thread_slot1_dl_processing(void *arg) {
if ( LOG_DEBUGFLAG(UE_TIMING)) {
stop_meas(&ue->pdsch_procedures_per_slot_stat[ue->current_thread_id[subframe_rx]][1]);
LOG_I(PHY, "[AbsSFN %d.%d] Slot1: LLR Computation %5.2f \n",frame_rx,subframe_rx,ue->pdsch_procedures_per_slot_stat[ue->current_thread_id[subframe_rx]][1].p_time/(cpuf*1000.0));
LOG_D(PHY, "[AbsSFN %d.%d] Slot1: LLR Computation %5.2f \n",frame_rx,subframe_rx,ue->pdsch_procedures_per_slot_stat[ue->current_thread_id[subframe_rx]][1].p_time/(cpuf*1000.0));
}
if (pthread_mutex_lock(&proc->mutex_slot1_dl_processing) != 0) {
@@ -4145,7 +4146,7 @@ int phy_procedures_slot_parallelization_UE_RX(PHY_VARS_UE *ue,
LOG_E(PHY,"[UE %d] Frame %d, subframe %d: Error in pdcch procedures\n",ue->Mod_id,frame_rx,subframe_rx);
if (LOG_DEBUGFLAG(UE_TIMING)) {
LOG_I(PHY, "[AbsSFN %d.%d] Slot0: PDCCH %5.2f \n",frame_rx,subframe_rx,ue->pdcch_procedures_stat[ue->current_thread_id[subframe_rx]].p_time/(cpuf*1000.0));
LOG_D(PHY, "[AbsSFN %d.%d] Slot0: PDCCH %5.2f \n",frame_rx,subframe_rx,ue->pdcch_procedures_stat[ue->current_thread_id[subframe_rx]].p_time/(cpuf*1000.0));
}
//proc->dci_slot0_available = 1;
@@ -4155,7 +4156,7 @@ int phy_procedures_slot_parallelization_UE_RX(PHY_VARS_UE *ue,
//proc->dci_slot0_available=1;
if (LOG_DEBUGFLAG(UE_TIMING)) {
stop_meas(&ue->pdcch_procedures_stat[ue->current_thread_id[subframe_rx]]);
LOG_I(PHY, "[AbsSFN %d.%d] Slot0: PDCCH %5.2f \n",frame_rx,subframe_rx,ue->pdcch_procedures_stat[ue->current_thread_id[subframe_rx]].p_time/(cpuf*1000.0));
LOG_D(PHY, "[AbsSFN %d.%d] Slot0: PDCCH %5.2f \n",frame_rx,subframe_rx,ue->pdcch_procedures_stat[ue->current_thread_id[subframe_rx]].p_time/(cpuf*1000.0));
}
}
@@ -4164,7 +4165,7 @@ int phy_procedures_slot_parallelization_UE_RX(PHY_VARS_UE *ue,
// first slot has been processed (FFTs + Channel Estimation, PCFICH/PHICH/PDCCH)
if (LOG_DEBUGFLAG(UE_TIMING)) {
stop_meas(&ue->ue_front_end_per_slot_stat[ue->current_thread_id[subframe_rx]][0]);
LOG_I(PHY, "[AbsSFN %d.%d] Slot0: FFT + Channel Estimate + PCFICH/PHICH/PDCCH %5.2f \n",frame_rx,subframe_rx,
LOG_D(PHY, "[AbsSFN %d.%d] Slot0: FFT + Channel Estimate + PCFICH/PHICH/PDCCH %5.2f \n",frame_rx,subframe_rx,
ue->ue_front_end_per_slot_stat[ue->current_thread_id[subframe_rx]][0].p_time/(cpuf*1000.0));
}
@@ -4178,7 +4179,7 @@ int phy_procedures_slot_parallelization_UE_RX(PHY_VARS_UE *ue,
if (LOG_DEBUGFLAG(UE_TIMING)) {
stop_meas(&ue->ue_front_end_stat[ue->current_thread_id[subframe_rx]]);
LOG_I(PHY, "[AbsSFN %d.%d] FULL FE Processing %5.2f \n",frame_rx,subframe_rx,ue->ue_front_end_per_slot_stat[ue->current_thread_id[subframe_rx]][0].p_time/(cpuf*1000.0));
LOG_D(PHY, "[AbsSFN %d.%d] FULL FE Processing %5.2f \n",frame_rx,subframe_rx,ue->ue_front_end_per_slot_stat[ue->current_thread_id[subframe_rx]][0].p_time/(cpuf*1000.0));
}
/**** End Subframe FE Processing ****/
@@ -4266,7 +4267,7 @@ int phy_procedures_slot_parallelization_UE_RX(PHY_VARS_UE *ue,
if (LOG_DEBUGFLAG(UE_TIMING)) {
stop_meas(&ue->pdsch_procedures_per_slot_stat[ue->current_thread_id[subframe_rx]][0]);
LOG_I(PHY, "[AbsSFN %d.%d] Slot0: LLR Computation %5.2f \n",frame_rx,subframe_rx,ue->pdsch_procedures_per_slot_stat[ue->current_thread_id[subframe_rx]][0].p_time/(cpuf*1000.0));
LOG_D(PHY, "[AbsSFN %d.%d] Slot0: LLR Computation %5.2f \n",frame_rx,subframe_rx,ue->pdsch_procedures_per_slot_stat[ue->current_thread_id[subframe_rx]][0].p_time/(cpuf*1000.0));
}
//wait until LLR Slot1 is done
@@ -4279,7 +4280,7 @@ int phy_procedures_slot_parallelization_UE_RX(PHY_VARS_UE *ue,
if (LOG_DEBUGFLAG(UE_TIMING)) {
stop_meas(&ue->pdsch_procedures_stat[ue->current_thread_id[subframe_rx]]);
LOG_I(PHY, "[AbsSFN %d.%d] Full LLR Computation %5.2f \n",frame_rx,subframe_rx,ue->pdsch_procedures_stat[ue->current_thread_id[subframe_rx]].p_time/(cpuf*1000.0));
LOG_D(PHY, "[AbsSFN %d.%d] Full LLR Computation %5.2f \n",frame_rx,subframe_rx,ue->pdsch_procedures_stat[ue->current_thread_id[subframe_rx]].p_time/(cpuf*1000.0));
}
//=====================================================================//
@@ -4351,7 +4352,7 @@ int phy_procedures_slot_parallelization_UE_RX(PHY_VARS_UE *ue,
if (LOG_DEBUGFLAG(UE_TIMING)) {
stop_meas(&ue->dlsch_procedures_stat[ue->current_thread_id[subframe_rx]]);
LOG_I(PHY, "[AbsSFN %d.%d] Channel Decoder: %5.2f \n",frame_rx,subframe_rx,ue->dlsch_procedures_stat[ue->current_thread_id[subframe_rx]].p_time/(cpuf*1000.0));
LOG_D(PHY, "[AbsSFN %d.%d] Channel Decoder: %5.2f \n",frame_rx,subframe_rx,ue->dlsch_procedures_stat[ue->current_thread_id[subframe_rx]].p_time/(cpuf*1000.0));
}
// duplicate harq structure
+1 -1
View File
@@ -115,7 +115,7 @@ void pusch_power_cntl(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t eNB_id,uint8_
}
int8_t get_PHR(uint8_t Mod_id, uint8_t CC_id,uint8_t eNB_index) {
if(NFAPI_MODE!=NFAPI_UE_STUB_PNF)
if(NFAPI_MODE!=NFAPI_UE_STUB_PNF && NFAPI_MODE!=NFAPI_MODE_STANDALONE_PNF)
return PHY_vars_UE_g[Mod_id][CC_id]->ulsch[eNB_index]->PHR;
else
return 40; // l1l2 simulator => ideal conditions
@@ -56,7 +56,7 @@ struct nlmsghdr *nas_nlh_rx = NULL;
struct iovec nas_iov_tx;
struct iovec nas_iov_rx = {nl_rx_buf, sizeof(nl_rx_buf)};
int nas_sock_fd[MAX_MOBILES_PER_ENB];
int nas_sock_fd[MAX_MOBILES_PER_ENB*2]; //Allocated for both LTE UE and NR UE.
int nas_sock_mbms_fd;
@@ -70,7 +70,7 @@ static int tun_alloc(char *dev) {
int fd, err;
if( (fd = open("/dev/net/tun", O_RDWR)) < 0 ) {
printf("[TUN] failed to open /dev/net/tun\n");
LOG_E(PDCP, "[TUN] failed to open /dev/net/tun\n");
return -1;
}
@@ -95,15 +95,20 @@ static int tun_alloc(char *dev) {
}
int netlink_init_mbms_tun(char *ifprefix) {
int netlink_init_mbms_tun(char *ifprefix, int id) {//for UE, id = 1, 2, ...,
int ret;
char ifname[64];
sprintf(ifname, "oaitun_%.3s1",ifprefix); // added "1": for historical reasons
if (id > 0) {
sprintf(ifname, "oaitun_%.3s%d", ifprefix, id-1);
}
else {
sprintf(ifname, "oaitun_%.3s1", ifprefix); // added "1": for historical reasons
}
nas_sock_mbms_fd = tun_alloc(ifname);
if (nas_sock_mbms_fd == -1) {
printf("[NETLINK] Error opening socket %s (%d:%s)\n",ifname,errno, strerror(errno));
printf("[NETLINK] Error opening mbms socket %s (%d:%s)\n",ifname,errno, strerror(errno));
exit(1);
}
@@ -123,88 +128,36 @@ int netlink_init_mbms_tun(char *ifprefix) {
nas_src_addr.nl_pid = 1;//getpid(); /* self pid */
nas_src_addr.nl_groups = 0; /* not in mcast groups */
ret = bind(nas_sock_mbms_fd, (struct sockaddr *)&nas_src_addr, sizeof(nas_src_addr));
memset(&nas_dest_addr, 0, sizeof(nas_dest_addr));
nas_dest_addr.nl_family = AF_NETLINK;
nas_dest_addr.nl_pid = 0; /* For Linux Kernel */
nas_dest_addr.nl_groups = 0; /* unicast */
// TX PART
nas_nlh_tx=(struct nlmsghdr *)malloc(NLMSG_SPACE(NL_MAX_PAYLOAD));
memset(nas_nlh_tx, 0, NLMSG_SPACE(NL_MAX_PAYLOAD));
/* Fill the netlink message header */
nas_nlh_tx->nlmsg_len = NLMSG_SPACE(NL_MAX_PAYLOAD);
nas_nlh_tx->nlmsg_pid = 1;//getpid(); /* self pid */
nas_nlh_tx->nlmsg_flags = 0;
nas_iov_tx.iov_base = (void *)nas_nlh_tx;
nas_iov_tx.iov_len = nas_nlh_tx->nlmsg_len;
memset(&nas_msg_tx,0,sizeof(nas_msg_tx));
nas_msg_tx.msg_name = (void *)&nas_dest_addr;
nas_msg_tx.msg_namelen = sizeof(nas_dest_addr);
nas_msg_tx.msg_iov = &nas_iov_tx;
nas_msg_tx.msg_iovlen = 1;
// RX PART
memset(&nas_msg_rx,0,sizeof(nas_msg_rx));
nas_msg_rx.msg_name = (void *)&nas_src_addr;
nas_msg_rx.msg_namelen = sizeof(nas_src_addr);
nas_msg_rx.msg_iov = &nas_iov_rx;
nas_msg_rx.msg_iovlen = 1;
return 1;
}
int netlink_init_tun(char *ifprefix, int num_if) {
int netlink_init_tun(char *ifprefix, int num_if, int id) {//for UE, id = 1, 2, ...,
int ret;
char ifname[64];
for (int i = 0; i < num_if; i++) {
int begx = (id == 0) ? 0 : id - 1;
int endx = (id == 0) ? num_if : id;
for (int i = begx; i < endx; i++) {
sprintf(ifname, "oaitun_%.3s%d",ifprefix,i+1);
nas_sock_fd[i] = tun_alloc(ifname);
if (nas_sock_fd[i] == -1) {
printf("[NETLINK] Error opening socket %s (%d:%s)\n",ifname,errno, strerror(errno));
LOG_E(PDCP, "TUN: Error opening socket %s (%d:%s)\n",ifname,errno, strerror(errno));
exit(1);
}
printf("[NETLINK]Opened socket %s with fd nas_sock_fd[%d]=%d\n",
LOG_I(PDCP, "TUN: Opened socket %s with fd nas_sock_fd[%d]=%d\n",
ifname, i, nas_sock_fd[i]);
ret = fcntl(nas_sock_fd[i],F_SETFL,O_NONBLOCK);
if (ret == -1) {
printf("[NETLINK] Error fcntl (%d:%s)\n",errno, strerror(errno));
LOG_E(PDCP, "TUN: Error fcntl (%d:%s)\n",errno, strerror(errno));
if (LINK_ENB_PDCP_TO_IP_DRIVER) {
exit(1);
}
}
memset(&nas_src_addr, 0, sizeof(nas_src_addr));
nas_src_addr.nl_family = AF_NETLINK;
nas_src_addr.nl_pid = 1;//getpid(); /* self pid */
nas_src_addr.nl_groups = 0; /* not in mcast groups */
ret = bind(nas_sock_fd[i], (struct sockaddr *)&nas_src_addr, sizeof(nas_src_addr));
memset(&nas_dest_addr, 0, sizeof(nas_dest_addr));
nas_dest_addr.nl_family = AF_NETLINK;
nas_dest_addr.nl_pid = 0; /* For Linux Kernel */
nas_dest_addr.nl_groups = 0; /* unicast */
// TX PART
nas_nlh_tx=(struct nlmsghdr *)malloc(NLMSG_SPACE(NL_MAX_PAYLOAD));
memset(nas_nlh_tx, 0, NLMSG_SPACE(NL_MAX_PAYLOAD));
/* Fill the netlink message header */
nas_nlh_tx->nlmsg_len = NLMSG_SPACE(NL_MAX_PAYLOAD);
nas_nlh_tx->nlmsg_pid = 1;//getpid(); /* self pid */
nas_nlh_tx->nlmsg_flags = 0;
nas_iov_tx.iov_base = (void *)nas_nlh_tx;
nas_iov_tx.iov_len = nas_nlh_tx->nlmsg_len;
memset(&nas_msg_tx,0,sizeof(nas_msg_tx));
nas_msg_tx.msg_name = (void *)&nas_dest_addr;
nas_msg_tx.msg_namelen = sizeof(nas_dest_addr);
nas_msg_tx.msg_iov = &nas_iov_tx;
nas_msg_tx.msg_iovlen = 1;
// RX PART
memset(&nas_msg_rx,0,sizeof(nas_msg_rx));
nas_msg_rx.msg_name = (void *)&nas_src_addr;
nas_msg_rx.msg_namelen = sizeof(nas_src_addr);
nas_msg_rx.msg_iov = &nas_iov_rx;
nas_msg_rx.msg_iovlen = 1;
} /* for */
return 1;
@@ -216,7 +169,7 @@ int netlink_init(void) {
nas_sock_fd[0] = socket(PF_NETLINK, SOCK_RAW,GRAAL_NETLINK_ID);
if (nas_sock_fd[0] == -1) {
printf("[NETLINK] Error opening socket %d (%d:%s)\n",nas_sock_fd[0],errno, strerror(errno));
printf("[NETLINK] Error opening GRAAL_NETLINK_ID socket %d (%d:%s)\n",nas_sock_fd[0],errno, strerror(errno));
if (LINK_ENB_PDCP_TO_IP_DRIVER) {
exit(1);
@@ -244,6 +197,7 @@ int netlink_init(void) {
nas_dest_addr.nl_pid = 0; /* For Linux Kernel */
nas_dest_addr.nl_groups = 0; /* unicast */
// TX PART
free(nas_nlh_tx);
nas_nlh_tx=(struct nlmsghdr *)malloc(NLMSG_SPACE(NL_MAX_PAYLOAD));
memset(nas_nlh_tx, 0, NLMSG_SPACE(NL_MAX_PAYLOAD));
/* Fill the netlink message header */
@@ -266,3 +220,8 @@ int netlink_init(void) {
return(nas_sock_fd[0]);
}
void netlink_cleanup(void)
{
free(nas_nlh_tx);
nas_nlh_tx = NULL;
}
+3 -2
View File
@@ -62,7 +62,8 @@ int multicast_link_read_data_from_sock(uint8_t eNB_flag);
void clear_eNB_transport_info(uint8_t);
void clear_UE_transport_info(uint8_t);
int netlink_init(void);
int netlink_init_tun(char *ifsuffix, int num_if);
int netlink_init_mbms_tun(char *ifsuffix);
int netlink_init_tun(char *ifsuffix, int num_if, int id);
int netlink_init_mbms_tun(char *ifsuffix, int id);
void netlink_cleanup(void);
#endif /* EMU_PROTO_H_ */
+6 -5
View File
@@ -134,16 +134,16 @@ struct option * parse_oai_options(paramdef_t *options) {
void display_options_values(paramdef_t *options, int verbose) {
for(paramdef_t * ptr=options; ptr->optname[0]!=0; ptr++) {
char varText[256]="need specific display";
char varText[256]={0};
if (ptr->voidptr != NULL) {
if ( (ptr->paramflags & PARAMFLAG_BOOL) )
strcpy(varText, *(bool *)ptr->iptr ? "True": "False" );
else switch (ptr->type) {
case TYPE_INT:
sprintf(varText,"%d",*ptr->iptr);
break;
case TYPE_INT:
sprintf(varText,"%d",*ptr->iptr);
break;
case TYPE_DOUBLE:
sprintf(varText,"%.2f",*ptr->dblptr);
break;
@@ -157,6 +157,7 @@ void display_options_values(paramdef_t *options, int verbose) {
break;
default:
strcpy(varText,"Need specific display");
printf("not decoded type\n");
exit(1);
}
+19 -8
View File
@@ -634,7 +634,7 @@ int main(int argc, char **argv) {
// num_layers = 1;
perfect_ce = 0;
static paramdef_t options[] = {
{ "awgn", "Use AWGN channel and not multipath", PARAMFLAG_BOOL, strptr:NULL, defintval:0, TYPE_INT, 0, NULL, NULL },
{ "awgn", "Use AWGN channel and not multipath", PARAMFLAG_BOOL, iptr:&awgn_flag, defintval:0, TYPE_INT, 0, NULL, NULL },
{ "Abstx", "Turns on calibration mode for abstraction.", PARAMFLAG_BOOL, iptr:&abstx, defintval:0, TYPE_INT, 0 },
{ "bTDD", "Set the tdd configuration mode",0, iptr:&tdd_config, defintval:3, TYPE_INT, 0 },
{ "BnbRBs", "The LTE bandwith in RBs (100 is 20MHz)",0, iptr:&N_RB_DL, defintval:25, TYPE_INT, 0 },
@@ -1234,7 +1234,7 @@ int main(int argc, char **argv) {
break;
}
for (k=0; k<NUMBER_OF_UE_MAX; k++) {
for (k=0; k<NUMBER_OF_DLSCH_MAX; k++) {
// Create transport channel structures for 2 transport blocks (MIMO)
for (i=0; i<2; i++) {
eNB->dlsch[k][i] = new_eNB_dlsch(Kmimo,8,Nsoft,N_RB_DL,0,&eNB->frame_parms);
@@ -1247,6 +1247,17 @@ int main(int argc, char **argv) {
eNB->dlsch[k][i]->rnti = n_rnti+k;
}
}
for (int i=0;i<NUMBER_OF_ULSCH_MAX; i++) {
LOG_I(PHY,"Allocating Transport Channel Buffer for ULSCH %d/%d\n",i,NUMBER_OF_ULSCH_MAX);
eNB->ulsch[i] = new_eNB_ulsch(MAX_TURBO_ITERATIONS,eNB->frame_parms.N_RB_UL, 0);
if (!eNB->ulsch[i]) {
LOG_E(PHY,"Can't get eNB ulsch structures\n");
exit(-1);
}
}
/* allocate memory for both subframes (only one is really used
* but there is now "copy_harq_proc_struct" which needs both
@@ -1815,12 +1826,12 @@ int main(int argc, char **argv) {
if (t_rx > 2000 )
n_rx_dropped++;
appendVarArray(table_tx, &t_tx);
appendVarArray(table_tx_ifft, &t_tx_ifft);
appendVarArray(table_rx, &t_rx );
appendVarArray(table_rx_fft, &t_rx_fft );
appendVarArray(table_rx_demod, &t_rx_demod );
appendVarArray(table_rx_dec, &t_rx_dec );
appendVarArray(&table_tx, &t_tx);
appendVarArray(&table_tx_ifft, &t_tx_ifft);
appendVarArray(&table_rx, &t_rx );
appendVarArray(&table_rx_fft, &t_rx_fft );
appendVarArray(&table_rx_demod, &t_rx_demod );
appendVarArray(&table_rx_dec, &t_rx_dec );
} //trials
// round_trials[0]: number of code word : goodput the protocol

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