common function to generate FAPI PUSCH payload
This commit is contained in:
@@ -46,13 +46,6 @@
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#include <executables/softmodem-common.h>
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#include <executables/softmodem-common.h>
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// forward declaration of functions used in this file
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static void fill_msg3_pusch_pdu(nfapi_nr_pusch_pdu_t *pusch_pdu,
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const NR_sched_pusch_t *sched_pusch,
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NR_ServingCellConfigCommon_t *scc,
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NR_UE_info_t *UE,
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int scs,
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int fh);
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static void nr_fill_rar(uint8_t Mod_idP, NR_UE_info_t *UE, uint8_t *dlsch_buffer, nfapi_nr_pusch_pdu_t *pusch_pdu);
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static void nr_fill_rar(uint8_t Mod_idP, NR_UE_info_t *UE, uint8_t *dlsch_buffer, nfapi_nr_pusch_pdu_t *pusch_pdu);
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static const float ssb_per_rach_occasion[8] = {0.125, 0.25, 0.5, 1, 2, 4, 8};
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static const float ssb_per_rach_occasion[8] = {0.125, 0.25, 0.5, 1, 2, 4, 8};
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@@ -814,7 +807,6 @@ static void nr_generate_Msg3_retransmission(module_id_t module_idP,
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TYPE_TC_RNTI_,
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TYPE_TC_RNTI_,
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ra->Msg3_tda_id);
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ra->Msg3_tda_id);
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int mu = ul_bwp->scs;
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int slots_frame = nr_mac->frame_structure.numb_slots_frame;
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int slots_frame = nr_mac->frame_structure.numb_slots_frame;
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uint16_t K2 = tda_info.k2 + get_NTN_Koffset(scc);
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uint16_t K2 = tda_info.k2 + get_NTN_Koffset(scc);
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const int sched_frame = (frame + (slot + K2) / slots_frame) % MAX_FRAME_NUMBER;
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const int sched_frame = (frame + (slot + K2) / slots_frame) % MAX_FRAME_NUMBER;
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@@ -829,7 +821,6 @@ static void nr_generate_Msg3_retransmission(module_id_t module_idP,
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reset_beam_status(&nr_mac->beam_info, sched_frame, sched_slot, UE->UE_beam_index, slots_frame, beam_ul.new_beam);
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reset_beam_status(&nr_mac->beam_info, sched_frame, sched_slot, UE->UE_beam_index, slots_frame, beam_ul.new_beam);
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return;
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return;
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}
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}
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int fh = 0;
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int buffer_index = ul_buffer_index(sched_frame, sched_slot, slots_frame, nr_mac->vrb_map_UL_size);
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int buffer_index = ul_buffer_index(sched_frame, sched_slot, slots_frame, nr_mac->vrb_map_UL_size);
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uint16_t *vrb_map_UL = &nr_mac->common_channels[CC_id].vrb_map_UL[beam_ul.idx][buffer_index * MAX_BWP_SIZE];
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uint16_t *vrb_map_UL = &nr_mac->common_channels[CC_id].vrb_map_UL[beam_ul.idx][buffer_index * MAX_BWP_SIZE];
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@@ -901,10 +892,15 @@ static void nr_generate_Msg3_retransmission(module_id_t module_idP,
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"Invalid future_ul_tti_req->n_pdus %d\n", future_ul_tti_req->n_pdus);
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"Invalid future_ul_tti_req->n_pdus %d\n", future_ul_tti_req->n_pdus);
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future_ul_tti_req->pdus_list[future_ul_tti_req->n_pdus].pdu_type = NFAPI_NR_UL_CONFIG_PUSCH_PDU_TYPE;
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future_ul_tti_req->pdus_list[future_ul_tti_req->n_pdus].pdu_type = NFAPI_NR_UL_CONFIG_PUSCH_PDU_TYPE;
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future_ul_tti_req->pdus_list[future_ul_tti_req->n_pdus].pdu_size = sizeof(nfapi_nr_pusch_pdu_t);
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future_ul_tti_req->pdus_list[future_ul_tti_req->n_pdus].pdu_size = sizeof(nfapi_nr_pusch_pdu_t);
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nfapi_nr_pusch_pdu_t *pusch_pdu = &future_ul_tti_req->pdus_list[future_ul_tti_req->n_pdus].pusch_pdu;
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nfapi_nr_pusch_pdu_t *pusch_pdu = prepare_pusch_pdu(future_ul_tti_req,
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memset(pusch_pdu, 0, sizeof(nfapi_nr_pusch_pdu_t));
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UE,
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scc,
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fill_msg3_pusch_pdu(pusch_pdu, &sched_pusch, scc, UE, mu, fh);
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&sched_pusch,
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get_transformPrecoding(ul_bwp, NR_UL_DCI_FORMAT_0_0, 0),
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0,
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ra->msg3_round,
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ul_bwp->pusch_Config && ul_bwp->pusch_Config->frequencyHopping,
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UE->rnti);
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future_ul_tti_req->n_pdus += 1;
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future_ul_tti_req->n_pdus += 1;
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// generation of DCI 0_0 to schedule msg3 retransmission
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// generation of DCI 0_0 to schedule msg3 retransmission
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@@ -1132,87 +1128,6 @@ static bool nr_get_Msg3alloc(gNB_MAC_INST *mac, int CC_id, int current_slot, fra
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return true;
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return true;
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}
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}
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static void fill_msg3_pusch_pdu(nfapi_nr_pusch_pdu_t *pusch_pdu,
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const NR_sched_pusch_t *sched_pusch,
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NR_ServingCellConfigCommon_t *scc,
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NR_UE_info_t *UE,
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int scs,
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int fh)
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{
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const NR_RA_t *ra = UE->ra;
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pusch_pdu->pdu_bit_map = PUSCH_PDU_BITMAP_PUSCH_DATA;
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pusch_pdu->rnti = UE->rnti;
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pusch_pdu->handle = 0;
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pusch_pdu->bwp_start = sched_pusch->bwp_info.bwpStart;
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pusch_pdu->bwp_size = sched_pusch->bwp_info.bwpSize;
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pusch_pdu->subcarrier_spacing = scs;
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pusch_pdu->cyclic_prefix = 0;
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pusch_pdu->mcs_table = 0;
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if (scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->msg3_transformPrecoder == NULL)
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pusch_pdu->transform_precoding = 1; // disabled
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else {
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pusch_pdu->transform_precoding = 0; // enabled
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pusch_pdu->dfts_ofdm.low_papr_group_number = *scc->physCellId % 30;
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pusch_pdu->dfts_ofdm.low_papr_sequence_number = 0;
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if (scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->groupHoppingEnabledTransformPrecoding)
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AssertFatal(1==0,"Hopping mode is not supported in transform precoding\n");
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}
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pusch_pdu->data_scrambling_id = *scc->physCellId;
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pusch_pdu->nrOfLayers = 1;
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pusch_pdu->ul_dmrs_symb_pos = get_l_prime(sched_pusch->tda_info.nrOfSymbols,
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sched_pusch->tda_info.mapping_type,
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pusch_dmrs_pos2,
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pusch_len1,
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sched_pusch->tda_info.startSymbolIndex,
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scc->dmrs_TypeA_Position);
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LOG_D(NR_MAC,
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"MSG3 start_sym:%d NR Symb:%d mappingtype:%d, ul_dmrs_symb_pos:%x\n",
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sched_pusch->tda_info.startSymbolIndex,
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sched_pusch->tda_info.nrOfSymbols,
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sched_pusch->tda_info.mapping_type,
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pusch_pdu->ul_dmrs_symb_pos);
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pusch_pdu->dmrs_config_type = 0;
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pusch_pdu->ul_dmrs_scrambling_id = *scc->physCellId; //If provided and the PUSCH is not a msg3 PUSCH, otherwise, L2 should set this to physical cell id.
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pusch_pdu->pusch_identity = *scc->physCellId; //If provided and the PUSCH is not a msg3 PUSCH, otherwise, L2 should set this to physical cell id.
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pusch_pdu->scid = 0; //DMRS sequence initialization [TS38.211, sec 6.4.1.1.1]. Should match what is sent in DCI 0_1, otherwise set to 0.
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pusch_pdu->dmrs_ports = 1; // 6.2.2 in 38.214 only port 0 to be used
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// no data in dmrs symbols as in 6.2.2 in 38.214
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pusch_pdu->num_dmrs_cdm_grps_no_data = sched_pusch->tda_info.nrOfSymbols <= 2 ? 1 : 2;
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pusch_pdu->resource_alloc = 1; //type 1
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memset(pusch_pdu->rb_bitmap, 0, sizeof(pusch_pdu->rb_bitmap));
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pusch_pdu->rb_start = sched_pusch->rbStart;
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AssertFatal(sched_pusch->rbSize <= pusch_pdu->bwp_size, "MSG3 allocated number of RBs exceed the BWP size\n");
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pusch_pdu->rb_size = sched_pusch->rbSize;
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pusch_pdu->vrb_to_prb_mapping = 0;
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pusch_pdu->frequency_hopping = fh;
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//pusch_pdu->tx_direct_current_location;
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//The uplink Tx Direct Current location for the carrier. Only values in the value range of this field between 0 and 3299,
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//which indicate the subcarrier index within the carrier corresponding 1o the numerology of the corresponding uplink BWP and value 3300,
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//which indicates "Outside the carrier" and value 3301, which indicates "Undetermined position within the carrier" are used. [TS38.331, UplinkTxDirectCurrentBWP IE]
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pusch_pdu->uplink_frequency_shift_7p5khz = 0;
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//Resource Allocation in time domain
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pusch_pdu->start_symbol_index = sched_pusch->tda_info.startSymbolIndex;
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pusch_pdu->nr_of_symbols = sched_pusch->tda_info.nrOfSymbols;
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//Optional Data only included if indicated in pduBitmap
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pusch_pdu->pusch_data.rv_index = nr_get_rv(ra->msg3_round % 4);
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pusch_pdu->pusch_data.harq_process_id = 0;
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pusch_pdu->pusch_data.new_data_indicator = (ra->msg3_round == 0) ? 1 : 0;;
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pusch_pdu->pusch_data.num_cb = 0;
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// Beamforming
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pusch_pdu->beamforming.num_prgs = 0;
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pusch_pdu->beamforming.prg_size = 0; // bwp_size;
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pusch_pdu->beamforming.dig_bf_interface = 1;
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pusch_pdu->beamforming.prgs_list[0].dig_bf_interface_list[0].beam_idx = UE->UE_beam_index;
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pusch_pdu->target_code_rate = sched_pusch->R;
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pusch_pdu->qam_mod_order = sched_pusch->Qm;
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pusch_pdu->mcs_index = sched_pusch->mcs;
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pusch_pdu->pusch_data.tb_size = sched_pusch->tb_size;
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pusch_pdu->maintenance_parms_v3.ldpcBaseGraph = get_BG(sched_pusch->tb_size << 3, sched_pusch->R);
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}
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static void nr_add_msg3(module_id_t module_idP, int CC_id, frame_t frameP, slot_t slotP, NR_UE_info_t *UE, uint8_t *RAR_pdu)
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static void nr_add_msg3(module_id_t module_idP, int CC_id, frame_t frameP, slot_t slotP, NR_UE_info_t *UE, uint8_t *RAR_pdu)
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{
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{
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gNB_MAC_INST *mac = RC.nrmac[module_idP];
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gNB_MAC_INST *mac = RC.nrmac[module_idP];
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@@ -1251,8 +1166,6 @@ static void nr_add_msg3(module_id_t module_idP, int CC_id, frame_t frameP, slot_
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ra->Msg3_slot);
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ra->Msg3_slot);
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future_ul_tti_req->pdus_list[future_ul_tti_req->n_pdus].pdu_type = NFAPI_NR_UL_CONFIG_PUSCH_PDU_TYPE;
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future_ul_tti_req->pdus_list[future_ul_tti_req->n_pdus].pdu_type = NFAPI_NR_UL_CONFIG_PUSCH_PDU_TYPE;
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future_ul_tti_req->pdus_list[future_ul_tti_req->n_pdus].pdu_size = sizeof(nfapi_nr_pusch_pdu_t);
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future_ul_tti_req->pdus_list[future_ul_tti_req->n_pdus].pdu_size = sizeof(nfapi_nr_pusch_pdu_t);
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nfapi_nr_pusch_pdu_t *pusch_pdu = &future_ul_tti_req->pdus_list[future_ul_tti_req->n_pdus].pusch_pdu;
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memset(pusch_pdu, 0, sizeof(nfapi_nr_pusch_pdu_t));
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NR_tda_info_t tda_info = get_ul_tda_info(ul_bwp, 0, NR_SearchSpace__searchSpaceType_PR_common, TYPE_TC_RNTI_, ra->Msg3_tda_id);
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NR_tda_info_t tda_info = get_ul_tda_info(ul_bwp, 0, NR_SearchSpace__searchSpaceType_PR_common, TYPE_TC_RNTI_, ra->Msg3_tda_id);
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NR_pusch_dmrs_t dmrs_info = get_ul_dmrs_params(scc, ul_bwp, &tda_info, 1);
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NR_pusch_dmrs_t dmrs_info = get_ul_dmrs_params(scc, ul_bwp, &tda_info, 1);
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@@ -1289,7 +1202,6 @@ static void nr_add_msg3(module_id_t module_idP, int CC_id, frame_t frameP, slot_
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.dmrs_info = dmrs_info
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.dmrs_info = dmrs_info
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};
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};
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const int fh = (ul_bwp->pusch_Config && ul_bwp->pusch_Config->frequencyHopping) ? 1 : 0;
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LOG_D(NR_MAC,
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LOG_D(NR_MAC,
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"UE %04x: %d.%d Adding Msg3 UL Config Request for (%d,%d) : (%d,%d,%d)\n",
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"UE %04x: %d.%d Adding Msg3 UL Config Request for (%d,%d) : (%d,%d,%d)\n",
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UE->rnti,
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UE->rnti,
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@@ -1301,7 +1213,15 @@ static void nr_add_msg3(module_id_t module_idP, int CC_id, frame_t frameP, slot_
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ra->msg3_first_rb,
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ra->msg3_first_rb,
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ra->msg3_round);
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ra->msg3_round);
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fill_msg3_pusch_pdu(pusch_pdu, &sched_pusch, scc, UE, ul_bwp->scs, fh);
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nfapi_nr_pusch_pdu_t *pusch_pdu = prepare_pusch_pdu(future_ul_tti_req,
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UE,
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scc,
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&sched_pusch,
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get_transformPrecoding(ul_bwp, NR_UL_DCI_FORMAT_0_0, 0),
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0,
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0,
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ul_bwp->pusch_Config && ul_bwp->pusch_Config->frequencyHopping,
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UE->rnti);
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future_ul_tti_req->n_pdus += 1;
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future_ul_tti_req->n_pdus += 1;
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// calling function to fill rar message
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// calling function to fill rar message
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@@ -2254,6 +2254,106 @@ static void pf_ul(module_id_t module_id,
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}
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}
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}
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}
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nfapi_nr_pusch_pdu_t *prepare_pusch_pdu(nfapi_nr_ul_tti_request_t *future_ul_tti_req,
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const NR_UE_info_t *UE,
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const NR_ServingCellConfigCommon_t *scc,
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const NR_sched_pusch_t *sched_pusch,
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int transform_precoding,
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int harq_id,
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int harq_round,
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int fh,
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int rnti)
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{
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nfapi_nr_pusch_pdu_t *pusch_pdu = &future_ul_tti_req->pdus_list[future_ul_tti_req->n_pdus].pusch_pdu;
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memset(pusch_pdu, 0, sizeof(nfapi_nr_pusch_pdu_t));
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const NR_UE_UL_BWP_t *ul_bwp = &UE->current_UL_BWP;
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pusch_pdu->pdu_bit_map = PUSCH_PDU_BITMAP_PUSCH_DATA;
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pusch_pdu->rnti = rnti;
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pusch_pdu->handle = 0; //not yet used
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pusch_pdu->bwp_size = sched_pusch->bwp_info.bwpSize;
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pusch_pdu->bwp_start = sched_pusch->bwp_info.bwpStart;
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pusch_pdu->subcarrier_spacing = ul_bwp->scs;
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pusch_pdu->cyclic_prefix = 0;
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pusch_pdu->target_code_rate = sched_pusch->R;
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pusch_pdu->qam_mod_order = sched_pusch->Qm;
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pusch_pdu->mcs_index = sched_pusch->mcs;
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pusch_pdu->mcs_table = ul_bwp->mcs_table;
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pusch_pdu->transform_precoding = transform_precoding;
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if (ul_bwp->pusch_Config && ul_bwp->pusch_Config->dataScramblingIdentityPUSCH)
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pusch_pdu->data_scrambling_id = *ul_bwp->pusch_Config->dataScramblingIdentityPUSCH;
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else
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pusch_pdu->data_scrambling_id = *scc->physCellId;
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pusch_pdu->nrOfLayers = sched_pusch->nrOfLayers;
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// DMRS
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pusch_pdu->num_dmrs_cdm_grps_no_data = sched_pusch->dmrs_info.num_dmrs_cdm_grps_no_data;
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pusch_pdu->dmrs_ports = ((1 << sched_pusch->nrOfLayers) - 1);
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pusch_pdu->ul_dmrs_symb_pos = sched_pusch->dmrs_info.ul_dmrs_symb_pos;
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pusch_pdu->dmrs_config_type = sched_pusch->dmrs_info.dmrs_config_type;
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pusch_pdu->scid = sched_pusch->dmrs_info.scid; // DMRS sequence initialization [TS38.211, sec 6.4.1.1.1]
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pusch_pdu->pusch_identity = sched_pusch->dmrs_info.pusch_identity;
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pusch_pdu->ul_dmrs_scrambling_id = sched_pusch->dmrs_info.dmrs_scrambling_id;
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/* Allocation in frequency domain */
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pusch_pdu->resource_alloc = 1; //type 1
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pusch_pdu->rb_start = sched_pusch->rbStart;
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pusch_pdu->rb_size = sched_pusch->rbSize;
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pusch_pdu->vrb_to_prb_mapping = 0;
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pusch_pdu->frequency_hopping = fh;
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/* Resource Allocation in time domain */
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||||||
|
pusch_pdu->start_symbol_index = sched_pusch->tda_info.startSymbolIndex;
|
||||||
|
pusch_pdu->nr_of_symbols = sched_pusch->tda_info.nrOfSymbols;
|
||||||
|
/* PUSCH PDU */
|
||||||
|
pusch_pdu->pusch_data.rv_index = nr_get_rv(harq_round % 4);
|
||||||
|
pusch_pdu->pusch_data.harq_process_id = harq_id;
|
||||||
|
pusch_pdu->pusch_data.new_data_indicator = (harq_round == 0) ? 1 : 0; // not NDI but indicator for new transmission
|
||||||
|
pusch_pdu->pusch_data.tb_size = sched_pusch->tb_size;
|
||||||
|
pusch_pdu->pusch_data.num_cb = 0; // CBG not supported
|
||||||
|
// Beamforming
|
||||||
|
pusch_pdu->beamforming.num_prgs = 0;
|
||||||
|
pusch_pdu->beamforming.prg_size = 0; // bwp_size;
|
||||||
|
pusch_pdu->beamforming.dig_bf_interface = 1;
|
||||||
|
pusch_pdu->beamforming.prgs_list[0].dig_bf_interface_list[0].beam_idx = UE->UE_beam_index;
|
||||||
|
/* TRANSFORM PRECODING --------------------------------------------------------*/
|
||||||
|
if (pusch_pdu->transform_precoding == NR_PUSCH_Config__transformPrecoder_enabled) {
|
||||||
|
// U as specified in section 6.4.1.1.1.2 in 38.211, if sequence hopping and group hopping are disabled
|
||||||
|
pusch_pdu->dfts_ofdm.low_papr_group_number = sched_pusch->dmrs_info.pusch_identity % 30;
|
||||||
|
pusch_pdu->dfts_ofdm.low_papr_sequence_number = sched_pusch->dmrs_info.low_papr_sequence_number;
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
pusch_pdu->maintenance_parms_v3.ldpcBaseGraph = get_BG(sched_pusch->tb_size << 3, sched_pusch->R);
|
||||||
|
pusch_pdu->maintenance_parms_v3.tbSizeLbrmBytes = 0;
|
||||||
|
if (UE->sc_info.rateMatching_PUSCH) {
|
||||||
|
// TBS_LBRM according to section 5.4.2.1 of 38.212
|
||||||
|
long *maxMIMO_Layers = UE->sc_info.maxMIMO_Layers_PUSCH;
|
||||||
|
if (!maxMIMO_Layers && ul_bwp && ul_bwp->pusch_Config)
|
||||||
|
maxMIMO_Layers = ul_bwp->pusch_Config->maxRank;
|
||||||
|
AssertFatal (maxMIMO_Layers != NULL,"Option with max MIMO layers not configured is not supported\n");
|
||||||
|
pusch_pdu->maintenance_parms_v3.tbSizeLbrmBytes = nr_compute_tbslbrm(ul_bwp->mcs_table,
|
||||||
|
UE->sc_info.ul_bw_tbslbrm,
|
||||||
|
*maxMIMO_Layers);
|
||||||
|
}
|
||||||
|
/* PUSCH PTRS */
|
||||||
|
if (sched_pusch->dmrs_info.ptrsConfig) {
|
||||||
|
bool valid_ptrs_setup = false;
|
||||||
|
pusch_pdu->pusch_ptrs.ptrs_ports_list = calloc_or_fail(2, sizeof(nfapi_nr_ptrs_ports_t));
|
||||||
|
valid_ptrs_setup = set_ul_ptrs_values(sched_pusch->dmrs_info.ptrsConfig,
|
||||||
|
pusch_pdu->rb_size,
|
||||||
|
pusch_pdu->mcs_index,
|
||||||
|
pusch_pdu->mcs_table,
|
||||||
|
&pusch_pdu->pusch_ptrs.ptrs_freq_density,
|
||||||
|
&pusch_pdu->pusch_ptrs.ptrs_time_density,
|
||||||
|
&pusch_pdu->pusch_ptrs.ptrs_ports_list->ptrs_re_offset,
|
||||||
|
&pusch_pdu->pusch_ptrs.num_ptrs_ports,
|
||||||
|
&pusch_pdu->pusch_ptrs.ul_ptrs_power,
|
||||||
|
pusch_pdu->nr_of_symbols);
|
||||||
|
if (valid_ptrs_setup == true)
|
||||||
|
pusch_pdu->pdu_bit_map |= PUSCH_PDU_BITMAP_PUSCH_PTRS; // enable PUSCH PTRS
|
||||||
|
} else
|
||||||
|
pusch_pdu->pdu_bit_map &= ~PUSCH_PDU_BITMAP_PUSCH_PTRS; // disable PUSCH PTRS
|
||||||
|
return pusch_pdu;
|
||||||
|
}
|
||||||
|
|
||||||
static bool nr_ulsch_preprocessor(module_id_t module_id, frame_t frame, slot_t slot)
|
static bool nr_ulsch_preprocessor(module_id_t module_id, frame_t frame, slot_t slot)
|
||||||
{
|
{
|
||||||
gNB_MAC_INST *nr_mac = RC.nrmac[module_id];
|
gNB_MAC_INST *nr_mac = RC.nrmac[module_id];
|
||||||
@@ -2475,9 +2575,16 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, slot_t slot, nfapi_
|
|||||||
"Invalid future_ul_tti_req->n_pdus %d\n", future_ul_tti_req->n_pdus);
|
"Invalid future_ul_tti_req->n_pdus %d\n", future_ul_tti_req->n_pdus);
|
||||||
|
|
||||||
future_ul_tti_req->pdus_list[future_ul_tti_req->n_pdus].pdu_type = NFAPI_NR_UL_CONFIG_PUSCH_PDU_TYPE;
|
future_ul_tti_req->pdus_list[future_ul_tti_req->n_pdus].pdu_type = NFAPI_NR_UL_CONFIG_PUSCH_PDU_TYPE;
|
||||||
future_ul_tti_req->pdus_list[future_ul_tti_req->n_pdus].pdu_size = sizeof(nfapi_nr_pusch_pdu_t);
|
future_ul_tti_req->pdus_list[future_ul_tti_req->n_pdus].pdu_size = sizeof(nfapi_nr_pusch_pdu_t);
|
||||||
nfapi_nr_pusch_pdu_t *pusch_pdu = &future_ul_tti_req->pdus_list[future_ul_tti_req->n_pdus].pusch_pdu;
|
nfapi_nr_pusch_pdu_t *pusch_pdu = prepare_pusch_pdu(future_ul_tti_req,
|
||||||
memset(pusch_pdu, 0, sizeof(nfapi_nr_pusch_pdu_t));
|
UE,
|
||||||
|
scc,
|
||||||
|
sched_pusch,
|
||||||
|
current_BWP->transform_precoding,
|
||||||
|
harq_id,
|
||||||
|
cur_harq->round,
|
||||||
|
current_BWP->pusch_Config && current_BWP->pusch_Config->frequencyHopping,
|
||||||
|
rnti);
|
||||||
future_ul_tti_req->n_pdus += 1;
|
future_ul_tti_req->n_pdus += 1;
|
||||||
|
|
||||||
LOG_D(NR_MAC,
|
LOG_D(NR_MAC,
|
||||||
@@ -2489,73 +2596,10 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, slot_t slot, nfapi_
|
|||||||
future_ul_tti_req->SFN,
|
future_ul_tti_req->SFN,
|
||||||
future_ul_tti_req->Slot);
|
future_ul_tti_req->Slot);
|
||||||
|
|
||||||
pusch_pdu->pdu_bit_map = PUSCH_PDU_BITMAP_PUSCH_DATA;
|
|
||||||
pusch_pdu->rnti = rnti;
|
|
||||||
pusch_pdu->handle = 0; //not yet used
|
|
||||||
|
|
||||||
/* FAPI: BWP */
|
|
||||||
|
|
||||||
pusch_pdu->bwp_size = sched_pusch->bwp_info.bwpSize;
|
|
||||||
pusch_pdu->bwp_start = sched_pusch->bwp_info.bwpStart;
|
|
||||||
pusch_pdu->subcarrier_spacing = current_BWP->scs;
|
|
||||||
pusch_pdu->cyclic_prefix = 0;
|
|
||||||
|
|
||||||
/* FAPI: PUSCH information always included */
|
|
||||||
pusch_pdu->target_code_rate = sched_pusch->R;
|
|
||||||
pusch_pdu->qam_mod_order = sched_pusch->Qm;
|
|
||||||
pusch_pdu->mcs_index = sched_pusch->mcs;
|
|
||||||
pusch_pdu->mcs_table = current_BWP->mcs_table;
|
|
||||||
pusch_pdu->transform_precoding = current_BWP->transform_precoding;
|
|
||||||
if (current_BWP->pusch_Config && current_BWP->pusch_Config->dataScramblingIdentityPUSCH)
|
|
||||||
pusch_pdu->data_scrambling_id = *current_BWP->pusch_Config->dataScramblingIdentityPUSCH;
|
|
||||||
else
|
|
||||||
pusch_pdu->data_scrambling_id = *scc->physCellId;
|
|
||||||
pusch_pdu->nrOfLayers = sched_pusch->nrOfLayers;
|
|
||||||
|
|
||||||
/* FAPI: DMRS */
|
|
||||||
pusch_pdu->num_dmrs_cdm_grps_no_data = sched_pusch->dmrs_info.num_dmrs_cdm_grps_no_data;
|
|
||||||
pusch_pdu->dmrs_ports = ((1 << sched_pusch->nrOfLayers) - 1);
|
|
||||||
pusch_pdu->ul_dmrs_symb_pos = sched_pusch->dmrs_info.ul_dmrs_symb_pos;
|
|
||||||
pusch_pdu->dmrs_config_type = sched_pusch->dmrs_info.dmrs_config_type;
|
|
||||||
pusch_pdu->scid = sched_pusch->dmrs_info.scid; // DMRS sequence initialization [TS38.211, sec 6.4.1.1.1]
|
|
||||||
pusch_pdu->pusch_identity = sched_pusch->dmrs_info.pusch_identity;
|
|
||||||
pusch_pdu->ul_dmrs_scrambling_id = sched_pusch->dmrs_info.dmrs_scrambling_id;
|
|
||||||
/* FAPI: Pusch Allocation in frequency domain */
|
|
||||||
pusch_pdu->resource_alloc = 1; //type 1
|
|
||||||
pusch_pdu->rb_start = sched_pusch->rbStart;
|
|
||||||
pusch_pdu->rb_size = sched_pusch->rbSize;
|
|
||||||
pusch_pdu->vrb_to_prb_mapping = 0;
|
|
||||||
if (current_BWP->pusch_Config==NULL || current_BWP->pusch_Config->frequencyHopping==NULL)
|
|
||||||
pusch_pdu->frequency_hopping = 0;
|
|
||||||
else
|
|
||||||
pusch_pdu->frequency_hopping = 1;
|
|
||||||
|
|
||||||
/* FAPI: Resource Allocation in time domain */
|
|
||||||
pusch_pdu->start_symbol_index = sched_pusch->tda_info.startSymbolIndex;
|
|
||||||
pusch_pdu->nr_of_symbols = sched_pusch->tda_info.nrOfSymbols;
|
|
||||||
|
|
||||||
/* PUSCH PDU */
|
|
||||||
AssertFatal(cur_harq->round < nr_mac->ul_bler.harq_round_max,
|
|
||||||
"RV index %d is out of bounds\n",
|
|
||||||
cur_harq->round % 4);
|
|
||||||
pusch_pdu->pusch_data.rv_index = nr_get_rv(cur_harq->round % 4);
|
|
||||||
pusch_pdu->pusch_data.harq_process_id = harq_id;
|
|
||||||
pusch_pdu->pusch_data.new_data_indicator = (cur_harq->round == 0) ? 1 : 0; // not NDI but indicator for new transmission
|
|
||||||
pusch_pdu->pusch_data.tb_size = sched_pusch->tb_size;
|
|
||||||
pusch_pdu->pusch_data.num_cb = 0; //CBG not supported
|
|
||||||
|
|
||||||
// Beamforming
|
|
||||||
pusch_pdu->beamforming.num_prgs = 0;
|
|
||||||
pusch_pdu->beamforming.prg_size = 0; // bwp_size;
|
|
||||||
pusch_pdu->beamforming.dig_bf_interface = 1;
|
|
||||||
pusch_pdu->beamforming.prgs_list[0].dig_bf_interface_list[0].beam_idx = UE->UE_beam_index;
|
|
||||||
|
|
||||||
pusch_pdu->maintenance_parms_v3.ldpcBaseGraph = get_BG(sched_pusch->tb_size<<3,sched_pusch->R);
|
|
||||||
|
|
||||||
// Calacualte the normalized tx_power for PHR
|
// Calacualte the normalized tx_power for PHR
|
||||||
long *deltaMCS = current_BWP->pusch_Config ? current_BWP->pusch_Config->pusch_PowerControl->deltaMCS : NULL;
|
long *deltaMCS = current_BWP->pusch_Config ? current_BWP->pusch_Config->pusch_PowerControl->deltaMCS : NULL;
|
||||||
int tbs_bits = pusch_pdu->pusch_data.tb_size << 3;
|
int tbs_bits = pusch_pdu->pusch_data.tb_size << 3;
|
||||||
|
|
||||||
sched_pusch->phr_txpower_calc = compute_ph_factor(current_BWP->scs,
|
sched_pusch->phr_txpower_calc = compute_ph_factor(current_BWP->scs,
|
||||||
tbs_bits,
|
tbs_bits,
|
||||||
sched_pusch->rbSize,
|
sched_pusch->rbSize,
|
||||||
@@ -2565,48 +2609,6 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, slot_t slot, nfapi_
|
|||||||
deltaMCS,
|
deltaMCS,
|
||||||
false);
|
false);
|
||||||
|
|
||||||
NR_UE_ServingCell_Info_t *sc_info = &UE->sc_info;
|
|
||||||
if (sc_info->rateMatching_PUSCH) {
|
|
||||||
// TBS_LBRM according to section 5.4.2.1 of 38.212
|
|
||||||
long *maxMIMO_Layers = sc_info->maxMIMO_Layers_PUSCH;
|
|
||||||
if (!maxMIMO_Layers)
|
|
||||||
maxMIMO_Layers = current_BWP->pusch_Config->maxRank;
|
|
||||||
AssertFatal (maxMIMO_Layers != NULL,"Option with max MIMO layers not configured is not supported\n");
|
|
||||||
pusch_pdu->maintenance_parms_v3.tbSizeLbrmBytes =
|
|
||||||
nr_compute_tbslbrm(current_BWP->mcs_table, sc_info->ul_bw_tbslbrm, *maxMIMO_Layers);
|
|
||||||
} else
|
|
||||||
pusch_pdu->maintenance_parms_v3.tbSizeLbrmBytes = 0;
|
|
||||||
|
|
||||||
LOG_D(NR_MAC,
|
|
||||||
"PUSCH PDU : data_scrambling_identity %x, dmrs_scrambling_id %x\n",
|
|
||||||
pusch_pdu->data_scrambling_id,
|
|
||||||
pusch_pdu->ul_dmrs_scrambling_id);
|
|
||||||
/* TRANSFORM PRECODING --------------------------------------------------------*/
|
|
||||||
if (pusch_pdu->transform_precoding == NR_PUSCH_Config__transformPrecoder_enabled) {
|
|
||||||
|
|
||||||
// U as specified in section 6.4.1.1.1.2 in 38.211, if sequence hopping and group hopping are disabled
|
|
||||||
pusch_pdu->dfts_ofdm.low_papr_group_number = pusch_pdu->pusch_identity % 30;
|
|
||||||
pusch_pdu->dfts_ofdm.low_papr_sequence_number = sched_pusch->dmrs_info.low_papr_sequence_number;
|
|
||||||
LOG_D(NR_MAC,
|
|
||||||
"TRANSFORM PRECODING IS ENABLED. CDM groups: %d, U: %d MCS table: %d\n",
|
|
||||||
pusch_pdu->num_dmrs_cdm_grps_no_data,
|
|
||||||
pusch_pdu->dfts_ofdm.low_papr_group_number,
|
|
||||||
current_BWP->mcs_table);
|
|
||||||
}
|
|
||||||
/* PUSCH PTRS */
|
|
||||||
if (sched_pusch->dmrs_info.ptrsConfig) {
|
|
||||||
bool valid_ptrs_setup = false;
|
|
||||||
pusch_pdu->pusch_ptrs.ptrs_ports_list = calloc_or_fail(2, sizeof(nfapi_nr_ptrs_ports_t));
|
|
||||||
valid_ptrs_setup = set_ul_ptrs_values(sched_pusch->dmrs_info.ptrsConfig,
|
|
||||||
pusch_pdu->rb_size, pusch_pdu->mcs_index, pusch_pdu->mcs_table,
|
|
||||||
&pusch_pdu->pusch_ptrs.ptrs_freq_density,&pusch_pdu->pusch_ptrs.ptrs_time_density,
|
|
||||||
&pusch_pdu->pusch_ptrs.ptrs_ports_list->ptrs_re_offset,&pusch_pdu->pusch_ptrs.num_ptrs_ports,
|
|
||||||
&pusch_pdu->pusch_ptrs.ul_ptrs_power, pusch_pdu->nr_of_symbols);
|
|
||||||
if (valid_ptrs_setup == true)
|
|
||||||
pusch_pdu->pdu_bit_map |= PUSCH_PDU_BITMAP_PUSCH_PTRS; // enable PUSCH PTRS
|
|
||||||
} else
|
|
||||||
pusch_pdu->pdu_bit_map &= ~PUSCH_PDU_BITMAP_PUSCH_PTRS; // disable PUSCH PTRS
|
|
||||||
|
|
||||||
/* look up the PDCCH PDU for this BWP and CORESET. If it does not exist,
|
/* look up the PDCCH PDU for this BWP and CORESET. If it does not exist,
|
||||||
* create it */
|
* create it */
|
||||||
NR_SearchSpace_t *ss = sched_ctrl->search_space;
|
NR_SearchSpace_t *ss = sched_ctrl->search_space;
|
||||||
|
|||||||
@@ -323,6 +323,15 @@ void nr_check_Msg4_MsgB_Ack(module_id_t module_id, frame_t frame, slot_t slot, N
|
|||||||
void mac_remove_nr_ue(gNB_MAC_INST *nr_mac, rnti_t rnti);
|
void mac_remove_nr_ue(gNB_MAC_INST *nr_mac, rnti_t rnti);
|
||||||
NR_UE_info_t *get_new_nr_ue_inst(uid_allocator_t *uia, rnti_t rnti, NR_CellGroupConfig_t *CellGroup);
|
NR_UE_info_t *get_new_nr_ue_inst(uid_allocator_t *uia, rnti_t rnti, NR_CellGroupConfig_t *CellGroup);
|
||||||
int nr_get_default_pucch_res(int pucch_ResourceCommon);
|
int nr_get_default_pucch_res(int pucch_ResourceCommon);
|
||||||
|
nfapi_nr_pusch_pdu_t *prepare_pusch_pdu(nfapi_nr_ul_tti_request_t *future_ul_tti_req,
|
||||||
|
const NR_UE_info_t *UE,
|
||||||
|
const NR_ServingCellConfigCommon_t *scc,
|
||||||
|
const NR_sched_pusch_t *sched_pusch,
|
||||||
|
int transform_precoding,
|
||||||
|
int harq_id,
|
||||||
|
int harq_round,
|
||||||
|
int fh,
|
||||||
|
int rnti);
|
||||||
nfapi_nr_dl_tti_pdsch_pdu_rel15_t *prepare_pdsch_pdu(nfapi_nr_dl_tti_request_pdu_t *dl_tti_pdsch_pdu,
|
nfapi_nr_dl_tti_pdsch_pdu_rel15_t *prepare_pdsch_pdu(nfapi_nr_dl_tti_request_pdu_t *dl_tti_pdsch_pdu,
|
||||||
const gNB_MAC_INST *mac,
|
const gNB_MAC_INST *mac,
|
||||||
const NR_UE_info_t *UE,
|
const NR_UE_info_t *UE,
|
||||||
|
|||||||
Reference in New Issue
Block a user