Merge remote-tracking branch 'origin/develop' into NR_UE_CSIRS_scheduling
This commit is contained in:
francescomani
@@ -118,11 +118,18 @@ typedef struct {
|
||||
short rsrp_dBm;
|
||||
} fapi_nr_ssb_pdu_t;
|
||||
|
||||
typedef struct {
|
||||
uint32_t pdu_length;
|
||||
uint8_t* pdu;
|
||||
uint32_t sibs_mask;
|
||||
} fapi_nr_sib_pdu_t;
|
||||
|
||||
typedef struct {
|
||||
uint8_t pdu_type;
|
||||
union {
|
||||
fapi_nr_pdsch_pdu_t pdsch_pdu;
|
||||
fapi_nr_ssb_pdu_t ssb_pdu;
|
||||
fapi_nr_sib_pdu_t sib_pdu;
|
||||
};
|
||||
} fapi_nr_rx_indication_body_t;
|
||||
|
||||
@@ -332,7 +339,33 @@ typedef struct
|
||||
} nfapi_nr_ue_pusch_pdu_t;
|
||||
|
||||
typedef struct {
|
||||
} fapi_nr_ul_srs_parms_v4;
|
||||
|
||||
typedef struct {
|
||||
uint16_t rnti; // UE RNTI, Value: 1->65535
|
||||
uint32_t handle; // An opaque handling returned in the SRS.indication
|
||||
uint16_t bwp_size; // Bandwidth part size [3GPP TS 38.213, sec 12]. Number of contiguous PRBs allocated to the BWP, Value: 1->275
|
||||
uint16_t bwp_start; // Bandwidth part start RB index from reference CRB [3GPP TS 38.213, sec 12], Value: 0->274
|
||||
uint8_t subcarrier_spacing; // subcarrierSpacing [3GPP TS 38.211, sec 4.2], Value:0->4
|
||||
uint8_t cyclic_prefix; // Cyclic prefix type [3GPP TS 38.211, sec 4.2], 0: Normal; 1: Extended
|
||||
uint8_t num_ant_ports; // Number of antenna ports N_SRS_ap [3GPP TS 38.211, Sec 6.4.1.4.1], Value: 0 = 1 port, 1 = 2 ports, 2 = 4 ports
|
||||
uint8_t num_symbols; // Number of symbols N_SRS_symb [3GPP TS 38.211, Sec 6.4.1.4.1], Value: 0 = 1 symbol, 1 = 2 symbols, 2 = 4 symbols
|
||||
uint8_t num_repetitions; // Repetition factor R [3GPP TS 38.211, Sec 6.4.1.4.3], Value: 0 = 1, 1 = 2, 2 = 4
|
||||
uint8_t time_start_position; // Starting position in the time domain l_0 [3GPP TS 38.211, Sec 6.4.1.4.1], Note: the MAC undertakes the translation from startPosition to l_0, Value: 0 --> 13
|
||||
uint8_t config_index; // SRS bandwidth config index C_SRS [3GPP TS 38.211, Sec 6.4.1.4.3], Value: 0 --> 63
|
||||
uint16_t sequence_id; // SRS sequence ID n_SRS_ID [3GPP TS 38.211, Sec 6.4.1.4.2], Value: 0 --> 1023
|
||||
uint8_t bandwidth_index; // SRS bandwidth index B_SRS [3GPP TS 38.211, Sec 6.4.1.4.3], Value: 0 --> 3
|
||||
uint8_t comb_size; // Transmission comb size K_TC [3GPP TS 38.211, Sec 6.4.1.4.2], Value: 0 = comb size 2, 1 = comb size 4, 2 = comb size 8 (Rel16)
|
||||
uint8_t comb_offset; // Transmission comb offset K'_TC[3GPP TS 38.211, Sec 6.4.1.4.3], Value: 0 --> 1 (combSize = 0), Value: 0 --> 3 (combSize = 1), Value: 0 --> 7 (combSize = 2)
|
||||
uint8_t cyclic_shift; // Cyclic shift n_CS_SRS [3GPP TS 38.211, Sec 6.4.1.4.2], Value: 0 --> 7 (combSize = 0), Value: 0 --> 11 (combSize = 1), Value: 0 --> 5 (combSize = 2)
|
||||
uint8_t frequency_position; // Frequency domain position n_RRC [3GPP TS 38.211, Sec 6.4.1.4.3], Value: 0 --> 67
|
||||
uint16_t frequency_shift; // Frequency domain shift n_shift [3GPP TS 38.211, Sec 6.4.1.4.3], Value: 0 --> 268
|
||||
uint8_t frequency_hopping; // Frequency hopping b_hop [3GPP TS 38.211, Sec 6.4.1.4.3], Value: 0 --> 3
|
||||
uint8_t group_or_sequence_hopping; // Group or sequence hopping configuration (RRC parameter groupOrSequenceHopping in SRSResource IE), Value: 0 = No hopping, 1 = Group hopping groupOrSequenceHopping, 2 = Sequence hopping
|
||||
uint8_t resource_type; // Type of SRS resource allocation [3GPP TS 38.211, Sec 6.4.1.4.3], Value: 0: aperiodic, 1: semi-persistent, 2: periodic
|
||||
uint16_t t_srs; // SRS-Periodicity in slots [3GPP TS 38.211, Sec 6.4.1.4.4], Value: 1,2,3,4,5,8,10,16,20,32,40,64,80,160,320,640,1280,2560
|
||||
uint16_t t_offset; // Slot offset value [3GPP TS 38.211, Sec 6.4.1.4.3], Value:0->2559
|
||||
nfapi_nr_ue_ul_beamforming_t beamforming;
|
||||
} fapi_nr_ul_config_srs_pdu;
|
||||
|
||||
typedef struct {
|
||||
@@ -341,11 +374,13 @@ typedef struct {
|
||||
fapi_nr_ul_config_prach_pdu prach_config_pdu;
|
||||
fapi_nr_ul_config_pucch_pdu pucch_config_pdu;
|
||||
nfapi_nr_ue_pusch_pdu_t pusch_config_pdu;
|
||||
fapi_nr_ul_config_srs_pdu srs_config_pdu;
|
||||
fapi_nr_ul_config_srs_pdu srs_config_pdu;
|
||||
};
|
||||
} fapi_nr_ul_config_request_pdu_t;
|
||||
|
||||
typedef struct {
|
||||
//uint16_t sfn;
|
||||
//uint16_t slot;
|
||||
uint16_t sfn;
|
||||
uint16_t slot;
|
||||
uint8_t number_pdus;
|
||||
@@ -403,10 +438,13 @@ typedef struct {
|
||||
uint8_t tb2_rv;
|
||||
uint8_t harq_process_nbr;
|
||||
vrb_to_prb_mapping_t vrb_to_prb_mapping;
|
||||
uint8_t dai;
|
||||
double scaling_factor_S;
|
||||
int8_t accumulated_delta_PUCCH;
|
||||
uint8_t pucch_resource_id;
|
||||
uint8_t pdsch_to_harq_feedback_time_ind;
|
||||
uint8_t n_dmrs_cdm_groups;
|
||||
uint8_t dmrs_ports[10];
|
||||
uint16_t dmrs_ports;
|
||||
uint8_t n_front_load_symb;
|
||||
uint8_t tci_state;
|
||||
fapi_nr_dl_srs_config_t srs_config;
|
||||
@@ -493,6 +531,437 @@ typedef struct {
|
||||
} fapi_nr_dl_config_request_t;
|
||||
|
||||
|
||||
//
|
||||
// P5
|
||||
//
|
||||
|
||||
|
||||
|
||||
typedef struct {
|
||||
fapi_nr_coreset_t coreset;
|
||||
|
||||
uint8_t monitoring_slot_peridicity;
|
||||
uint8_t monitoring_slot_offset;
|
||||
uint16_t duration;
|
||||
uint16_t monitoring_symbols_within_slot;
|
||||
uint8_t number_of_candidates[5]; // aggregation level 1, 2, 4, 8, 16
|
||||
|
||||
uint8_t dci_2_0_number_of_candidates[5]; // aggregation level 1, 2, 4, 8, 16
|
||||
uint8_t dci_2_3_monitorying_periodicity;
|
||||
uint8_t dci_2_3_number_of_candidates;
|
||||
|
||||
} fapi_nr_search_space_t;
|
||||
|
||||
typedef struct {
|
||||
fapi_nr_search_space_t search_space_sib1;
|
||||
fapi_nr_search_space_t search_space_others_sib;
|
||||
fapi_nr_search_space_t search_space_paging;
|
||||
//fapi_nr_coreset_t coreset_ra; // common coreset
|
||||
fapi_nr_search_space_t search_space_ra;
|
||||
} fapi_nr_pdcch_config_common_t;
|
||||
|
||||
typedef struct {
|
||||
uint8_t k0;
|
||||
uint8_t mapping_type;
|
||||
uint8_t symbol_starting;
|
||||
uint8_t symbol_length;
|
||||
} fapi_nr_pdsch_time_domain_resource_allocation_t;
|
||||
|
||||
typedef struct {
|
||||
fapi_nr_pdsch_time_domain_resource_allocation_t allocation_list[FAPI_NR_MAX_NUM_DL_ALLOCATIONS];
|
||||
} fapi_nr_pdsch_config_common_t;
|
||||
|
||||
typedef struct {
|
||||
uint8_t prach_configuration_index;
|
||||
uint8_t msg1_fdm;
|
||||
uint8_t msg1_frequency_start;
|
||||
uint8_t zero_correlation_zone_config;
|
||||
uint8_t preamble_received_target_power;
|
||||
uint8_t preamble_transmission_max;
|
||||
uint8_t power_ramping_step;
|
||||
uint8_t ra_window_size;
|
||||
|
||||
uint8_t total_number_of_preamble;
|
||||
uint8_t ssb_occasion_per_rach;
|
||||
uint8_t cb_preamble_per_ssb;
|
||||
|
||||
uint8_t group_a_msg3_size;
|
||||
uint8_t group_a_number_of_preamble;
|
||||
uint8_t group_b_power_offset;
|
||||
uint8_t contention_resolution_timer;
|
||||
uint8_t rsrp_threshold_ssb;
|
||||
uint8_t rsrp_threshold_ssb_sul;
|
||||
uint8_t prach_length; // l839, l139
|
||||
uint8_t prach_root_sequence_index; // 0 - 837 for l839, 0 - 137 for l139
|
||||
uint8_t msg1_subcarrier_spacing;
|
||||
uint8_t restrictedset_config;
|
||||
uint8_t msg3_transform_precoding;
|
||||
} fapi_nr_rach_config_common_t;
|
||||
|
||||
typedef struct {
|
||||
uint8_t k2;
|
||||
uint8_t mapping_type;
|
||||
uint8_t symbol_starting;
|
||||
uint8_t symbol_length;
|
||||
} fapi_nr_pusch_time_domain_resource_allocation_t;
|
||||
|
||||
typedef struct {
|
||||
uint8_t group_hopping_enabled_transform_precoding;
|
||||
fapi_nr_pusch_time_domain_resource_allocation_t allocation_list[FAPI_NR_MAX_NUM_UL_ALLOCATIONS];
|
||||
uint8_t msg3_delta_preamble;
|
||||
uint8_t p0_nominal_with_grant;
|
||||
} fapi_nr_pusch_config_common_t;
|
||||
|
||||
typedef struct {
|
||||
uint8_t pucch_resource_common;
|
||||
uint8_t pucch_group_hopping;
|
||||
uint8_t hopping_id;
|
||||
uint8_t p0_nominal;
|
||||
} fapi_nr_pucch_config_common_t;
|
||||
|
||||
typedef struct {
|
||||
|
||||
fapi_nr_pdcch_config_common_t pdcch_config_common;
|
||||
fapi_nr_pdsch_config_common_t pdsch_config_common;
|
||||
|
||||
} fapi_nr_dl_bwp_common_config_t;
|
||||
|
||||
|
||||
|
||||
typedef struct {
|
||||
uint16_t int_rnti;
|
||||
uint8_t time_frequency_set;
|
||||
uint8_t dci_payload_size;
|
||||
uint8_t serving_cell_id[FAPI_NR_MAX_NUM_SERVING_CELLS]; // interrupt configuration per serving cell
|
||||
uint8_t position_in_dci[FAPI_NR_MAX_NUM_SERVING_CELLS]; // interrupt configuration per serving cell
|
||||
} fapi_nr_downlink_preemption_t;
|
||||
|
||||
typedef struct {
|
||||
uint8_t tpc_index;
|
||||
uint8_t tpc_index_sul;
|
||||
uint8_t target_cell;
|
||||
} fapi_nr_pusch_tpc_command_config_t;
|
||||
|
||||
typedef struct {
|
||||
uint8_t tpc_index_pcell;
|
||||
uint8_t tpc_index_pucch_scell;
|
||||
} fapi_nr_pucch_tpc_command_config_t;
|
||||
|
||||
typedef struct {
|
||||
uint8_t starting_bit_of_format_2_3;
|
||||
uint8_t feild_type_format_2_3;
|
||||
} fapi_nr_srs_tpc_command_config_t;
|
||||
|
||||
typedef struct {
|
||||
fapi_nr_downlink_preemption_t downlink_preemption;
|
||||
fapi_nr_pusch_tpc_command_config_t tpc_pusch;
|
||||
fapi_nr_pucch_tpc_command_config_t tpc_pucch;
|
||||
fapi_nr_srs_tpc_command_config_t tpc_srs;
|
||||
} fapi_nr_pdcch_config_dedicated_t;
|
||||
|
||||
typedef struct {
|
||||
uint8_t dmrs_type;
|
||||
uint8_t dmrs_addition_position;
|
||||
uint8_t max_length;
|
||||
uint16_t scrambling_id0;
|
||||
uint16_t scrambling_id1;
|
||||
uint8_t ptrs_frequency_density[2]; // phase tracking rs
|
||||
uint8_t ptrs_time_density[3]; // phase tracking rs
|
||||
uint8_t ptrs_epre_ratio; // phase tracking rs
|
||||
uint8_t ptrs_resource_element_offset; // phase tracking rs
|
||||
} fapi_nr_dmrs_downlink_config_t;
|
||||
|
||||
typedef struct {
|
||||
uint8_t bwp_or_cell_level;
|
||||
uint8_t pattern_type;
|
||||
uint32_t resource_blocks[9]; // bitmaps type 275 bits
|
||||
uint8_t slot_type; // bitmaps type one/two slot(s)
|
||||
uint32_t symbols_in_resouece_block; // bitmaps type 14/28 bits
|
||||
uint8_t periodic; // bitmaps type
|
||||
uint32_t pattern[2]; // bitmaps type 2/4/5/8/10/20/40 bits
|
||||
|
||||
fapi_nr_coreset_t coreset; // coreset
|
||||
|
||||
uint8_t subcarrier_spacing;
|
||||
uint8_t mode;
|
||||
} fapi_nr_rate_matching_pattern_group_t;
|
||||
|
||||
typedef struct {
|
||||
// resource mapping
|
||||
uint8_t row; // row1/row2/row4/other
|
||||
uint16_t frequency_domain_allocation; // 4/12/3/6 bits
|
||||
uint8_t number_of_ports;
|
||||
uint8_t first_ofdm_symbol_in_time_domain;
|
||||
uint8_t first_ofdm_symbol_in_time_domain2;
|
||||
uint8_t cdm_type;
|
||||
uint8_t density; // .5/1/3
|
||||
uint8_t density_dot5_type; // even/odd PRBs
|
||||
|
||||
uint8_t frequency_band_starting_rb; // freqBand
|
||||
uint8_t frequency_band_number_of_rb; // freqBand
|
||||
|
||||
// periodicityAndOffset
|
||||
uint8_t periodicity; // slot4/5/8/10/16/20/32/40/64/80/160/320/640
|
||||
uint32_t offset; // 0..639 bits
|
||||
} fapi_nr_zp_csi_rs_resource_t;
|
||||
|
||||
typedef struct {
|
||||
uint16_t data_scrambling_id_pdsch;
|
||||
fapi_nr_dmrs_downlink_config_t dmrs_dl_for_pdsch_mapping_type_a;
|
||||
fapi_nr_dmrs_downlink_config_t dmrs_dl_for_pdsch_mapping_type_b;
|
||||
uint8_t vrb_to_prb_interleaver;
|
||||
uint8_t resource_allocation;
|
||||
fapi_nr_pdsch_time_domain_resource_allocation_t allocation_list[FAPI_NR_MAX_NUM_DL_ALLOCATIONS];
|
||||
uint8_t pdsch_aggregation_factor;
|
||||
fapi_nr_rate_matching_pattern_group_t rate_matching_pattern_group1;
|
||||
fapi_nr_rate_matching_pattern_group_t rate_matching_pattern_group2;
|
||||
uint8_t rbg_size;
|
||||
uint8_t mcs_table;
|
||||
uint8_t max_num_of_code_word_scheduled_by_dci;
|
||||
uint8_t bundle_size; // prb_bundling static
|
||||
uint8_t bundle_size_set1; // prb_bundling dynamic
|
||||
uint8_t bundle_size_set2; // prb_bundling dynamic
|
||||
fapi_nr_zp_csi_rs_resource_t periodically_zp_csi_rs_resource_set[FAPI_NR_MAX_NUM_ZP_CSI_RS_RESOURCE_PER_SET];
|
||||
} fapi_nr_pdsch_config_dedicated_t;
|
||||
|
||||
typedef struct {
|
||||
uint16_t starting_prb;
|
||||
uint8_t intra_slot_frequency_hopping;
|
||||
uint16_t second_hop_prb;
|
||||
uint8_t format; // pucch format 0..4
|
||||
uint8_t initial_cyclic_shift;
|
||||
uint8_t number_of_symbols;
|
||||
uint8_t starting_symbol_index;
|
||||
uint8_t time_domain_occ;
|
||||
uint8_t number_of_prbs;
|
||||
uint8_t occ_length;
|
||||
uint8_t occ_index;
|
||||
} fapi_nr_pucch_resource_t;
|
||||
|
||||
typedef struct {
|
||||
uint8_t periodicity;
|
||||
uint8_t number_of_harq_process;
|
||||
fapi_nr_pucch_resource_t n1_pucch_an;
|
||||
} fapi_nr_sps_config_t;
|
||||
|
||||
typedef struct {
|
||||
uint8_t beam_failure_instance_max_count;
|
||||
uint8_t beam_failure_detection_timer;
|
||||
} fapi_nr_radio_link_monitoring_config_t;
|
||||
|
||||
typedef struct {
|
||||
fapi_nr_pdcch_config_dedicated_t pdcch_config_dedicated;
|
||||
fapi_nr_pdsch_config_dedicated_t pdsch_config_dedicated;
|
||||
fapi_nr_sps_config_t sps_config;
|
||||
fapi_nr_radio_link_monitoring_config_t radio_link_monitoring_config;
|
||||
|
||||
} fapi_nr_dl_bwp_dedicated_config_t;
|
||||
|
||||
typedef struct {
|
||||
fapi_nr_rach_config_common_t rach_config_common;
|
||||
fapi_nr_pusch_config_common_t pusch_config_common;
|
||||
fapi_nr_pucch_config_common_t pucch_config_common;
|
||||
|
||||
} fapi_nr_ul_bwp_common_config_t;
|
||||
|
||||
typedef struct {
|
||||
uint8_t inter_slot_frequency_hopping;
|
||||
uint8_t additional_dmrs;
|
||||
uint8_t max_code_rate;
|
||||
uint8_t number_of_slots;
|
||||
uint8_t pi2bpsk;
|
||||
uint8_t simultaneous_harq_ack_csi;
|
||||
} fapi_nr_pucch_format_config_t;
|
||||
|
||||
typedef struct {
|
||||
fapi_nr_pucch_format_config_t format1;
|
||||
fapi_nr_pucch_format_config_t format2;
|
||||
fapi_nr_pucch_format_config_t format3;
|
||||
fapi_nr_pucch_format_config_t format4;
|
||||
fapi_nr_pucch_resource_t multi_csi_pucch_resources[2];
|
||||
uint8_t dl_data_to_ul_ack[8];
|
||||
// pucch power control
|
||||
uint8_t deltaF_pucch_f0;
|
||||
uint8_t deltaF_pucch_f1;
|
||||
uint8_t deltaF_pucch_f2;
|
||||
uint8_t deltaF_pucch_f3;
|
||||
uint8_t deltaF_pucch_f4;
|
||||
uint8_t two_pucch_pc_adjusment_states;
|
||||
} fapi_nr_pucch_config_dedicated_t;
|
||||
|
||||
typedef struct {
|
||||
uint8_t dmrs_type;
|
||||
uint8_t dmrs_addition_position;
|
||||
uint8_t ptrs_uplink_config; // to indicate if PTRS Uplink is configured of not
|
||||
uint8_t ptrs_type; //cp-OFDM, dft-S-OFDM
|
||||
uint16_t ptrs_frequency_density[2];
|
||||
uint8_t ptrs_time_density[3];
|
||||
uint8_t ptrs_max_number_of_ports;
|
||||
uint8_t ptrs_resource_element_offset;
|
||||
uint8_t ptrs_power;
|
||||
uint16_t ptrs_sample_density[5];
|
||||
uint8_t ptrs_time_density_transform_precoding;
|
||||
|
||||
uint8_t max_length;
|
||||
uint16_t scrambling_id0;
|
||||
uint16_t scrambling_id1;
|
||||
uint8_t npusch_identity;
|
||||
uint8_t disable_sequence_group_hopping;
|
||||
uint8_t sequence_hopping_enable;
|
||||
} fapi_nr_dmrs_uplink_config_t;
|
||||
|
||||
typedef struct {
|
||||
uint8_t tpc_accmulation;
|
||||
uint8_t msg3_alpha;
|
||||
uint8_t p0_nominal_with_grant;
|
||||
uint8_t two_pusch_pc_adjustments_states;
|
||||
uint8_t delta_mcs;
|
||||
} fapi_nr_pusch_power_control_t;
|
||||
|
||||
typedef enum {tx_config_codebook = 1, tx_config_nonCodebook = 2} tx_config_t;
|
||||
typedef enum {transform_precoder_enabled = 0, transform_precoder_disabled = 1} transform_precoder_t;
|
||||
typedef enum {
|
||||
codebook_subset_fullyAndPartialAndNonCoherent = 1,
|
||||
codebook_subset_partialAndNonCoherent = 2,
|
||||
codebook_subset_nonCoherent = 3} codebook_subset_t;
|
||||
typedef struct {
|
||||
uint16_t data_scrambling_identity;
|
||||
tx_config_t tx_config;
|
||||
fapi_nr_dmrs_uplink_config_t dmrs_ul_for_pusch_mapping_type_a;
|
||||
fapi_nr_dmrs_uplink_config_t dmrs_ul_for_pusch_mapping_type_b;
|
||||
fapi_nr_pusch_power_control_t pusch_power_control;
|
||||
uint8_t frequency_hopping;
|
||||
uint16_t frequency_hopping_offset_lists[4];
|
||||
uint8_t resource_allocation;
|
||||
fapi_nr_pusch_time_domain_resource_allocation_t allocation_list[FAPI_NR_MAX_NUM_UL_ALLOCATIONS];
|
||||
uint8_t pusch_aggregation_factor;
|
||||
uint8_t mcs_table;
|
||||
uint8_t mcs_table_transform_precoder;
|
||||
transform_precoder_t transform_precoder;
|
||||
codebook_subset_t codebook_subset;
|
||||
uint8_t max_rank;
|
||||
uint8_t rbg_size;
|
||||
|
||||
//uci-OnPUSCH
|
||||
uint8_t uci_on_pusch_type; //dynamic, semi-static
|
||||
uint8_t beta_offset_ack_index1[4];
|
||||
uint8_t beta_offset_ack_index2[4];
|
||||
uint8_t beta_offset_ack_index3[4];
|
||||
uint8_t beta_offset_csi_part1_index1[4];
|
||||
uint8_t beta_offset_csi_part1_index2[4];
|
||||
uint8_t beta_offset_csi_part2_index1[4];
|
||||
uint8_t beta_offset_csi_part2_index2[4];
|
||||
|
||||
uint8_t tp_pi2BPSK;
|
||||
} fapi_nr_pusch_config_dedicated_t;
|
||||
|
||||
typedef struct {
|
||||
uint8_t frequency_hopping;
|
||||
fapi_nr_dmrs_uplink_config_t cg_dmrs_configuration;
|
||||
uint8_t mcs_table;
|
||||
uint8_t mcs_table_transform_precoder;
|
||||
|
||||
//uci-OnPUSCH
|
||||
uint8_t uci_on_pusch_type; //dynamic, semi-static
|
||||
uint8_t beta_offset_ack_index1[4];
|
||||
uint8_t beta_offset_ack_index2[4];
|
||||
uint8_t beta_offset_ack_index3[4];
|
||||
uint8_t beta_offset_csi_part1_index1[4];
|
||||
uint8_t beta_offset_csi_part1_index2[4];
|
||||
uint8_t beta_offset_csi_part2_index1[4];
|
||||
uint8_t beta_offset_csi_part2_index2[4];
|
||||
|
||||
uint8_t resource_allocation;
|
||||
// rgb-Size structure missing in spec.
|
||||
uint8_t power_control_loop_to_use;
|
||||
// p0-PUSCH-Alpha
|
||||
uint8_t p0;
|
||||
uint8_t alpha;
|
||||
|
||||
uint8_t transform_precoder;
|
||||
uint8_t number_of_harq_process;
|
||||
uint8_t rep_k;
|
||||
uint8_t rep_k_rv;
|
||||
uint8_t periodicity;
|
||||
uint8_t configured_grant_timer;
|
||||
// rrc-ConfiguredUplinkGrant
|
||||
uint16_t time_domain_offset;
|
||||
uint8_t time_domain_allocation;
|
||||
uint32_t frequency_domain_allocation;
|
||||
uint8_t antenna_ports;
|
||||
uint8_t dmrs_seq_initialization;
|
||||
uint8_t precoding_and_number_of_layers;
|
||||
uint8_t srs_resource_indicator;
|
||||
uint8_t mcs_and_tbs;
|
||||
uint8_t frequency_hopping_offset;
|
||||
uint8_t path_loss_reference_index;
|
||||
|
||||
} fapi_nr_configured_grant_config_t;
|
||||
|
||||
typedef struct {
|
||||
uint8_t qcl_type1_serving_cell_index;
|
||||
uint8_t qcl_type1_bwp_id;
|
||||
uint8_t qcl_type1_rs_type; // csi-rs or ssb
|
||||
uint8_t qcl_type1_nzp_csi_rs_resource_id;
|
||||
uint8_t qcl_type1_ssb_index;
|
||||
uint8_t qcl_type1_type;
|
||||
|
||||
uint8_t qcl_type2_serving_cell_index;
|
||||
uint8_t qcl_type2_bwp_id;
|
||||
uint8_t qcl_type2_rs_type; // csi-rs or ssb
|
||||
uint8_t qcl_type2_nzp_csi_rs_resource_id;
|
||||
uint8_t qcl_type2_ssb_index;
|
||||
uint8_t qcl_type2_type;
|
||||
|
||||
} fapi_nr_tci_state_t;
|
||||
|
||||
typedef struct {
|
||||
uint8_t root_sequence_index;
|
||||
// rach genertic
|
||||
uint8_t prach_configuration_index;
|
||||
uint8_t msg1_fdm;
|
||||
uint8_t msg1_frequency_start;
|
||||
uint8_t zero_correlation_zone_config;
|
||||
uint8_t preamble_received_target_power;
|
||||
uint8_t preamble_transmission_max;
|
||||
uint8_t power_ramping_step;
|
||||
uint8_t ra_window_size;
|
||||
|
||||
uint8_t rsrp_threshold_ssb;
|
||||
// PRACH-ResourceDedicatedBFR
|
||||
uint8_t bfr_ssb_index[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
|
||||
uint8_t bfr_ssb_ra_preamble_index[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
|
||||
// NZP-CSI-RS-Resource
|
||||
uint8_t bfr_csi_rs_nzp_resource_mapping[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
|
||||
uint8_t bfr_csi_rs_power_control_offset[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
|
||||
uint8_t bfr_csi_rs_power_control_offset_ss[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
|
||||
uint16_t bfr_csi_rs_scrambling_id[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
|
||||
uint8_t bfr_csi_rs_resource_periodicity[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
|
||||
uint16_t bfr_csi_rs_resource_offset[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
|
||||
fapi_nr_tci_state_t qcl_infomation_periodic_csi_rs[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
|
||||
|
||||
uint8_t bfr_csirs_ra_occasions[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
|
||||
uint8_t bfr_csirs_ra_preamble_index[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS][FAPI_NR_MAX_RA_OCCASION_PER_CSIRS];
|
||||
|
||||
uint8_t ssb_per_rach_occasion;
|
||||
uint8_t ra_ssb_occasion_mask_index;
|
||||
fapi_nr_search_space_t recovery_search_space;
|
||||
// RA-Prioritization
|
||||
uint8_t power_ramping_step_high_priority;
|
||||
uint8_t scaling_factor_bi;
|
||||
uint8_t beam_failure_recovery_timer;
|
||||
} fapi_nr_beam_failure_recovery_config_t;
|
||||
|
||||
typedef struct {
|
||||
fapi_nr_pucch_config_dedicated_t pucch_config_dedicated;
|
||||
fapi_nr_pusch_config_dedicated_t pusch_config_dedicated;
|
||||
fapi_nr_configured_grant_config_t configured_grant_config;
|
||||
// SRS-Config
|
||||
uint8_t srs_tpc_accumulation;
|
||||
fapi_nr_beam_failure_recovery_config_t beam_failure_recovery_config;
|
||||
|
||||
} fapi_nr_ul_bwp_dedicated_config_t;
|
||||
|
||||
#define FAPI_NR_CONFIG_REQUEST_MASK_PBCH 0x01
|
||||
#define FAPI_NR_CONFIG_REQUEST_MASK_DL_BWP_COMMON 0x02
|
||||
#define FAPI_NR_CONFIG_REQUEST_MASK_UL_BWP_COMMON 0x04
|
||||
|
||||
@@ -27,6 +27,8 @@
|
||||
#define NFAPI_PNF_PARAM_GENERAL_OUI_LENGTH 3
|
||||
#define NFAPI_MAX_NUM_RF_BANDS 16
|
||||
|
||||
#define NFAPI_MAX_PACKED_MESSAGE_SIZE 8192
|
||||
|
||||
// The following definition control the size of arrays used in the interface.
|
||||
// These may be changed if desired. They are used in the encoder to make sure
|
||||
// that the user has not specified a 'count' larger than the max array, and also
|
||||
@@ -122,12 +124,13 @@ typedef struct {
|
||||
|
||||
// Convenience methods to convert between SFN/SLOT formats
|
||||
#define NFAPI_SFNSLOT2DEC(_sfn,_slot) ( _sfn*20 + _slot ) // total count of slots
|
||||
#define NFAPI_SFNSLOTDEC2SFNSLOT(_sfnslot_dec) ((((_sfnslot_dec) / 20) << 4) | (((_sfnslot_dec) - (((_sfnslot_dec) / 20) * 10)) & 0x3F))
|
||||
#define NFAPI_SFNSLOTDEC2SFNSLOT(_sfnslot_dec) ((((_sfnslot_dec) / 20) << 6) | (((_sfnslot_dec) - (((_sfnslot_dec) / 20) * 20)) & 0x3F))
|
||||
|
||||
#define NFAPI_SFNSLOT2SFN(_sfnslot) ((_sfnslot) >> 6)
|
||||
#define NFAPI_SFNSLOT2SLOT(_sfnslot) ((_sfnslot) & 0x3F)
|
||||
#define NFAPI_SFNSLOTDEC2SFN(_sfnslot_dec) ((_sfnslot_dec) / 20)
|
||||
#define NFAPI_SFNSLOTDEC2SLOT(_sfnslot_dec) ((_sfnslot_dec) % 20)
|
||||
#define NFAPI_SFNSLOT2HEX(_sfn,_slot) ((_sfn << 6) | (_slot & 0x3F))
|
||||
|
||||
#define NFAPI_MAX_SFNSLOTDEC 1024*20 // 20 is for numerology 1
|
||||
|
||||
@@ -706,7 +709,6 @@ typedef struct {
|
||||
#define NFAPI_PHICH_CONFIG_PHICH_DURATION_TAG 0x0015
|
||||
#define NFAPI_PHICH_CONFIG_PHICH_POWER_OFFSET_TAG 0x0016
|
||||
|
||||
|
||||
typedef struct {
|
||||
nfapi_uint16_tlv_t primary_synchronization_signal_epre_eprers;
|
||||
nfapi_uint16_tlv_t secondary_synchronization_signal_epre_eprers;
|
||||
@@ -2497,7 +2499,7 @@ typedef struct {
|
||||
typedef struct {
|
||||
nfapi_p7_message_header_t header;
|
||||
uint32_t t1;
|
||||
int32_t delta_sfn_sf;
|
||||
int32_t delta_sfn_sf;
|
||||
nfapi_vendor_extension_tlv_t vendor_extension;
|
||||
} nfapi_dl_node_sync_t;
|
||||
|
||||
@@ -2872,11 +2874,12 @@ typedef struct {
|
||||
} nfapi_rx_indication_rel9_t;
|
||||
#define NFAPI_RX_INDICATION_REL9_TAG 0x2025
|
||||
|
||||
#define NFAPI_RX_IND_DATA_MAX 8192
|
||||
typedef struct {
|
||||
nfapi_rx_ue_information rx_ue_information;
|
||||
nfapi_rx_indication_rel8_t rx_indication_rel8;
|
||||
nfapi_rx_indication_rel9_t rx_indication_rel9;
|
||||
uint8_t* data;
|
||||
uint8_t rx_ind_data[NFAPI_RX_IND_DATA_MAX];
|
||||
} nfapi_rx_indication_pdu_t;
|
||||
|
||||
#define NFAPI_RX_IND_MAX_PDU 100
|
||||
|
||||
@@ -984,6 +984,8 @@ typedef struct {
|
||||
/// A value indicating how the BCH payload is generated. This should match the PARAM/CONFIG TLVs. Value: 0: MAC generates the full PBCH payload, see Table 3-41, where bchPayload has 31 bits 1: PHY generates the timing PBCH bits, see Table 3-41, where the bchPayload has 24 bits 2: PHY generates the full PBCH payload
|
||||
uint8_t bchPayloadFlag;
|
||||
uint32_t bchPayload;
|
||||
/// A value indicating the channel quality between the gNB and nrUE. Value: 0->255 dBM
|
||||
uint8_t ssbRsrp;
|
||||
nfapi_nr_tx_precoding_and_beamforming_t precoding_and_beamforming;
|
||||
} nfapi_nr_dl_tti_ssb_pdu_rel15_t;
|
||||
|
||||
@@ -1310,7 +1312,7 @@ typedef struct
|
||||
uint8_t comb_offset;//Transmission comb offset 𝑘 ̄ TC [TS38.211, Sec 6.4.1.4.3] Value: 0 → 1 (combSize = 0) Value: 0 → 3 (combSize = 1)
|
||||
uint8_t cyclic_shift;
|
||||
uint8_t frequency_position;
|
||||
uint8_t frequency_shift;
|
||||
uint16_t frequency_shift;
|
||||
uint8_t frequency_hopping;
|
||||
uint8_t group_or_sequence_hopping;//Group or sequence hopping configuration (RRC parameter groupOrSequenceHopping in SRS-Resource
|
||||
uint8_t resource_type;//Type of SRS resource allocation
|
||||
@@ -1400,9 +1402,6 @@ typedef struct
|
||||
} nfapi_nr_ul_dci_request_t;
|
||||
*/
|
||||
|
||||
// normally one PDU per coreset per BWP
|
||||
#define NFAPI_NR_MAX_UL_DCI_PDUS 4
|
||||
|
||||
typedef struct {
|
||||
/// only possible value 0: PDCCH PDU
|
||||
uint16_t PDUType;
|
||||
@@ -1416,7 +1415,7 @@ typedef struct {
|
||||
uint16_t SFN;
|
||||
uint16_t Slot;
|
||||
uint8_t numPdus;
|
||||
nfapi_nr_ul_dci_request_pdus_t ul_dci_pdu_list[NFAPI_NR_MAX_UL_DCI_PDUS];
|
||||
nfapi_nr_ul_dci_request_pdus_t ul_dci_pdu_list[NFAPI_NR_MAX_NB_CORESETS];
|
||||
} nfapi_nr_ul_dci_request_t;
|
||||
|
||||
//3.4.5 slot_errors
|
||||
@@ -1476,7 +1475,7 @@ typedef enum {
|
||||
//section 3.4.7 rx_data_indication
|
||||
|
||||
//table 3-61
|
||||
|
||||
#define NFAPI_NR_RX_DATA_IND_MAX_PDU 100
|
||||
typedef struct
|
||||
{
|
||||
uint32_t handle;
|
||||
@@ -1497,12 +1496,13 @@ typedef struct
|
||||
uint16_t sfn;
|
||||
uint16_t slot;
|
||||
uint16_t number_of_pdus;
|
||||
nfapi_nr_rx_data_pdu_t *pdu_list;
|
||||
nfapi_nr_rx_data_pdu_t *pdu_list;
|
||||
|
||||
} nfapi_nr_rx_data_indication_t;
|
||||
|
||||
//3.4.8 crc_indication
|
||||
//table 3-62
|
||||
#define NFAPI_NR_CRC_IND_MAX_PDU 100
|
||||
typedef struct
|
||||
{
|
||||
uint32_t handle;
|
||||
@@ -1642,6 +1642,7 @@ typedef enum {
|
||||
NFAPI_NR_UCI_FORMAT_2_3_4_PDU_TYPE = 2,
|
||||
} nfapi_nr_uci_pdu_type_e;
|
||||
|
||||
#define NFAPI_NR_UCI_IND_MAX_PDU 100
|
||||
typedef struct
|
||||
{
|
||||
uint16_t pdu_type; // 0 for PDU on PUSCH, 1 for PUCCH format 0 or 1, 2 for PUCCH format 2 to 4
|
||||
@@ -1678,7 +1679,7 @@ typedef struct
|
||||
nfapi_nr_srs_indication_reported_symbol_resource_block_t* rb_list;
|
||||
}nfapi_nr_srs_indication_reported_symbol_t;
|
||||
|
||||
|
||||
#define NFAPI_NR_SRS_IND_MAX_PDU 100
|
||||
typedef struct
|
||||
{
|
||||
uint32_t handle;
|
||||
|
||||
+783
-783
File diff suppressed because it is too large
Load Diff
@@ -29,7 +29,7 @@
|
||||
|
||||
static uint32_t get_packed_msg_len(uintptr_t msgHead, uintptr_t msgEnd) {
|
||||
if (msgEnd < msgHead) {
|
||||
NFAPI_TRACE(NFAPI_TRACE_ERROR, "get_packed_msg_len: Error in pointers supplied %d, %d\n", msgHead, msgEnd);
|
||||
NFAPI_TRACE(NFAPI_TRACE_ERROR, "get_packed_msg_len: Error in pointers supplied %lu, %lu\n", msgHead, msgEnd);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
@@ -263,8 +263,8 @@ static uint8_t pack_nr_pnf_config_request(void *msg, uint8_t **ppWritePackedMsg,
|
||||
|
||||
static uint8_t pack_pnf_config_request(void *msg, uint8_t **ppWritePackedMsg, uint8_t *end, nfapi_p4_p5_codec_config_t *config) {
|
||||
nfapi_pnf_config_request_t *pNfapiMsg = (nfapi_pnf_config_request_t *)msg;
|
||||
return (pack_tlv(NFAPI_PNF_PHY_RF_TAG, &pNfapiMsg->pnf_phy_rf_config, ppWritePackedMsg, end, &pack_pnf_phy_rf_config_value) &&
|
||||
push8(pNfapiMsg->num_tlvs,ppWritePackedMsg,end) &&
|
||||
return (push8(pNfapiMsg->num_tlvs,ppWritePackedMsg,end) &&
|
||||
pack_tlv(NFAPI_PNF_PHY_RF_TAG, &pNfapiMsg->pnf_phy_rf_config, ppWritePackedMsg, end, &pack_pnf_phy_rf_config_value) &&
|
||||
pack_vendor_extension_tlv(pNfapiMsg->vendor_extension, ppWritePackedMsg, end, config));
|
||||
}
|
||||
|
||||
@@ -429,16 +429,6 @@ static uint8_t pack_embms_mbsfn_config_value(void *tlv, uint8_t **ppWritePackedM
|
||||
pusharray8(value->fourframes_flag, 8,value->num_mbsfn_config,ppWritePackedMsg, end) &&
|
||||
pusharrays32(value->mbsfn_subframeconfig, 8, value->num_mbsfn_config, ppWritePackedMsg, end));
|
||||
}
|
||||
// static uint8_t unpack_embms_mbsfn_config_value(void* tlv, uint8_t **ppReadPackedMsg, uint8_t* end)
|
||||
// {
|
||||
// nfapi_embms_mbsfn_config_t* value = (nfapi_embms_mbsfn_config_t*)tlv;
|
||||
|
||||
// return ( pull16(ppReadPackedMsg, &value->num_mbsfn_config, end) &&
|
||||
// pull16(ppReadPackedMsg, &value->radioframe_allocation_period, end) &&
|
||||
// pull16(ppReadPackedMsg, &value->radioframe_allocation_offset, end) &&
|
||||
// pull8(ppReadPackedMsg, &value->fourframes_flag, end) &&
|
||||
// pullarrays32(ppReadPackedMsg, value->mbsfn_subframeconfig, 8, value->num_mbsfn_config, end));
|
||||
// }
|
||||
|
||||
static uint8_t pack_param_response(void *msg, uint8_t **ppWritePackedMsg, uint8_t *end, nfapi_p4_p5_codec_config_t *config) {
|
||||
nfapi_param_response_t *pNfapiMsg = (nfapi_param_response_t *)msg;
|
||||
@@ -707,8 +697,7 @@ static uint8_t pack_config_request(void *msg, uint8_t **ppWritePackedMsg, uint8_
|
||||
pack_tlv(NFAPI_NFAPI_NMM_GSM_FREQUENCY_BANDS_TAG, &(pNfapiMsg->nfapi_config.nmm_gsm_frequency_bands), ppWritePackedMsg, end, &pack_nmm_frequency_bands_value) &&
|
||||
pack_tlv(NFAPI_NFAPI_NMM_UMTS_FREQUENCY_BANDS_TAG, &(pNfapiMsg->nfapi_config.nmm_umts_frequency_bands), ppWritePackedMsg, end, &pack_nmm_frequency_bands_value) &&
|
||||
pack_tlv(NFAPI_NFAPI_NMM_LTE_FREQUENCY_BANDS_TAG, &(pNfapiMsg->nfapi_config.nmm_lte_frequency_bands), ppWritePackedMsg, end, &pack_nmm_frequency_bands_value) &&
|
||||
pack_tlv(NFAPI_NFAPI_NMM_UPLINK_RSSI_SUPPORTED_TAG, &(pNfapiMsg->nfapi_config.nmm_uplink_rssi_supported), ppWritePackedMsg, end, &pack_uint8_tlv_value) &&
|
||||
pack_vendor_extension_tlv(pNfapiMsg->vendor_extension, ppWritePackedMsg, end, config) );
|
||||
pack_tlv(NFAPI_NFAPI_NMM_UPLINK_RSSI_SUPPORTED_TAG, &(pNfapiMsg->nfapi_config.nmm_uplink_rssi_supported), ppWritePackedMsg, end, &pack_uint8_tlv_value));
|
||||
}
|
||||
|
||||
|
||||
@@ -734,47 +723,50 @@ static uint8_t pack_nr_config_request(void *msg, uint8_t **ppWritePackedMsg, uin
|
||||
pack_tlv(NFAPI_NR_CONFIG_UL_K0_TAG, &(pNfapiMsg->carrier_config.ul_k0[1]), ppWritePackedMsg, end, &pack_uint16_tlv_value) &&
|
||||
pack_tlv(NFAPI_NR_CONFIG_UPLINK_BANDWIDTH_TAG, &(pNfapiMsg->carrier_config.uplink_bandwidth), ppWritePackedMsg, end, &pack_uint16_tlv_value) &&
|
||||
pack_tlv(NFAPI_NR_CONFIG_UPLINK_FREQUENCY_TAG, &(pNfapiMsg->carrier_config.uplink_frequency), ppWritePackedMsg, end, &pack_uint32_tlv_value) &&
|
||||
pack_tlv(NFAPI_NR_CONFIG_FREQUENCY_SHIFT_7P5KHZ_TAG, &(pNfapiMsg->carrier_config.frequency_shift_7p5khz), ppWritePackedMsg, end, &pack_uint8_tlv_value) &&
|
||||
|
||||
pack_tlv(NFAPI_NR_CONFIG_FRAME_DUPLEX_TYPE_TAG, &(pNfapiMsg->cell_config.frame_duplex_type), ppWritePackedMsg, end, &pack_uint8_tlv_value) &&
|
||||
pack_tlv(NFAPI_NR_CONFIG_PHY_CELL_ID_TAG, &(pNfapiMsg->cell_config.phy_cell_id), ppWritePackedMsg, end, &pack_uint8_tlv_value) &&
|
||||
pack_tlv(NFAPI_NR_CONFIG_PHY_CELL_ID_TAG, &(pNfapiMsg->cell_config.phy_cell_id), ppWritePackedMsg, end, &pack_uint16_tlv_value) &&
|
||||
|
||||
pack_tlv(NFAPI_NR_CONFIG_PRACH_MULTIPLE_CARRIERS_IN_A_BAND_TAG, &(pNfapiMsg->prach_config.prach_multiple_carriers_in_a_band), ppWritePackedMsg, end, &pack_uint8_tlv_value) &&
|
||||
pack_tlv(NFAPI_NR_CONFIG_PRACH_CONFIG_INDEX_TAG, &(pNfapiMsg->prach_config.prach_ConfigurationIndex), ppWritePackedMsg, end, &pack_uint8_tlv_value) &&
|
||||
pack_tlv(NFAPI_NR_CONFIG_NUM_PRACH_FD_OCCASIONS_TAG, &(pNfapiMsg->prach_config.num_prach_fd_occasions), ppWritePackedMsg, end, &pack_uint8_tlv_value) &&
|
||||
pack_tlv(NFAPI_NR_CONFIG_PRACH_SEQUENCE_LENGTH_TAG, &(pNfapiMsg->prach_config.prach_sequence_length), ppWritePackedMsg, end, &pack_uint8_tlv_value) &&
|
||||
pack_tlv(NFAPI_NR_CONFIG_RESTRICTED_SET_CONFIG_TAG, &(pNfapiMsg->prach_config.restricted_set_config), ppWritePackedMsg, end, &pack_uint8_tlv_value) &&
|
||||
pack_tlv(NFAPI_NR_CONFIG_SSB_PER_RACH_TAG, &(pNfapiMsg->prach_config.ssb_per_rach), ppWritePackedMsg, end, &pack_uint8_tlv_value) &&
|
||||
pack_tlv(NFAPI_NR_CONFIG_PRACH_SUB_C_SPACING_TAG, &(pNfapiMsg->prach_config.prach_sub_c_spacing), ppWritePackedMsg, end, &pack_uint8_tlv_value) &&
|
||||
pack_tlv(NFAPI_NR_CONFIG_PRACH_ROOT_SEQUENCE_INDEX_TAG, &(pNfapiMsg->prach_config.num_prach_fd_occasions_list[0].prach_root_sequence_index), ppWritePackedMsg, end, &pack_uint16_tlv_value) &&
|
||||
pack_tlv(NFAPI_NR_CONFIG_K1_TAG, &(pNfapiMsg->prach_config.num_prach_fd_occasions_list[0].k1), ppWritePackedMsg, end, &pack_uint16_tlv_value) &&
|
||||
pack_tlv(NFAPI_NR_CONFIG_PRACH_ZERO_CORR_CONF_TAG, &(pNfapiMsg->prach_config.num_prach_fd_occasions_list[0].prach_zero_corr_conf), ppWritePackedMsg, end, &pack_uint8_tlv_value) &&
|
||||
pack_tlv(NFAPI_NR_CONFIG_PRACH_SUB_C_SPACING_TAG, &(pNfapiMsg->prach_config.prach_sub_c_spacing), ppWritePackedMsg, end, &pack_uint8_tlv_value) &&
|
||||
pack_tlv(NFAPI_NR_CONFIG_PRACH_ROOT_SEQUENCE_INDEX_TAG, &(pNfapiMsg->prach_config.num_prach_fd_occasions_list[0].prach_root_sequence_index), ppWritePackedMsg, end, &pack_uint16_tlv_value) &&
|
||||
pack_tlv(NFAPI_NR_CONFIG_K1_TAG, &(pNfapiMsg->prach_config.num_prach_fd_occasions_list[0].k1), ppWritePackedMsg, end, &pack_uint16_tlv_value) &&
|
||||
pack_tlv(NFAPI_NR_CONFIG_PRACH_ZERO_CORR_CONF_TAG, &(pNfapiMsg->prach_config.num_prach_fd_occasions_list[0].prach_zero_corr_conf), ppWritePackedMsg, end, &pack_uint8_tlv_value) &&
|
||||
pack_tlv(NFAPI_NR_CONFIG_NUM_ROOT_SEQUENCES_TAG, &(pNfapiMsg->prach_config.num_prach_fd_occasions_list[0].num_root_sequences), ppWritePackedMsg, end, &pack_uint8_tlv_value) &&
|
||||
|
||||
|
||||
pack_tlv(NFAPI_NR_CONFIG_SCS_COMMON_TAG, &(pNfapiMsg->ssb_config.scs_common), ppWritePackedMsg, end, &pack_uint8_tlv_value) &&
|
||||
pack_tlv(NFAPI_NR_CONFIG_BCH_PAYLOAD_TAG, &(pNfapiMsg->ssb_config.bch_payload), ppWritePackedMsg, end, &pack_uint8_tlv_value) &&
|
||||
pack_tlv(NFAPI_NR_CONFIG_SS_PBCH_POWER_TAG, &(pNfapiMsg->ssb_config.ss_pbch_power), ppWritePackedMsg, end, &pack_uint32_tlv_value) &&
|
||||
|
||||
pack_tlv(NFAPI_NR_CONFIG_BETA_PSS_TAG, &(pNfapiMsg->ssb_table.beta_pss), ppWritePackedMsg, end, &pack_uint8_tlv_value) &&
|
||||
pack_tlv(NFAPI_NR_CONFIG_MIB_TAG, &(pNfapiMsg->ssb_table.MIB), ppWritePackedMsg, end, &pack_uint32_tlv_value) &&
|
||||
pack_tlv(NFAPI_NR_CONFIG_SSB_MASK_TAG, &(pNfapiMsg->ssb_table.ssb_mask_list[0].ssb_mask), ppWritePackedMsg, end, &pack_uint32_tlv_value) &&
|
||||
pack_tlv(NFAPI_NR_CONFIG_SSB_MASK_TAG, &(pNfapiMsg->ssb_table.ssb_mask_list[1].ssb_mask), ppWritePackedMsg, end, &pack_uint32_tlv_value) &&
|
||||
|
||||
// TODO: Not sure what's going on, ssb_mask_list[1] packing below seems to match unpack, but is causing problems
|
||||
// pack_tlv(NFAPI_NR_CONFIG_SSB_MASK_TAG, &(pNfapiMsg->ssb_table.ssb_mask_list[1].ssb_mask), ppWritePackedMsg, end, &pack_uint32_tlv_value) &&
|
||||
pack_tlv(NFAPI_NR_CONFIG_BEAM_ID_TAG, &(pNfapiMsg->ssb_table.ssb_beam_id_list[0].beam_id), ppWritePackedMsg, end, &pack_uint8_tlv_value) &&
|
||||
pack_tlv(NFAPI_NR_CONFIG_SSB_OFFSET_POINT_A_TAG, &(pNfapiMsg->ssb_table.ssb_offset_point_a), ppWritePackedMsg, end, &pack_uint16_tlv_value) &&
|
||||
pack_tlv(NFAPI_NR_CONFIG_SSB_PERIOD_TAG, &(pNfapiMsg->ssb_table.ssb_period), ppWritePackedMsg, end, &pack_uint8_tlv_value) &&
|
||||
pack_tlv(NFAPI_NR_CONFIG_SSB_SUBCARRIER_OFFSET_TAG, &(pNfapiMsg->ssb_table.ssb_subcarrier_offset), ppWritePackedMsg, end, &pack_uint8_tlv_value) &&
|
||||
pack_tlv(NFAPI_NR_CONFIG_SS_PBCH_MULTIPLE_CARRIERS_IN_A_BAND_TAG, &(pNfapiMsg->ssb_table.ss_pbch_multiple_carriers_in_a_band), ppWritePackedMsg, end, &pack_uint8_tlv_value) &&
|
||||
pack_tlv(NFAPI_NR_CONFIG_MULTIPLE_CELLS_SS_PBCH_IN_A_CARRIER_TAG, &(pNfapiMsg->ssb_table.multiple_cells_ss_pbch_in_a_carrier), ppWritePackedMsg, end, &pack_uint8_tlv_value) &&
|
||||
|
||||
pack_tlv(NFAPI_NR_CONFIG_TDD_PERIOD_TAG, &(pNfapiMsg->tdd_table.tdd_period), ppWritePackedMsg, end, &pack_uint8_tlv_value) &&
|
||||
pack_tlv(NFAPI_NR_NFAPI_P7_PNF_ADDRESS_IPV4_TAG, &(pNfapiMsg->nfapi_config.p7_pnf_address_ipv4), ppWritePackedMsg, end, &pack_ipv4_address_value) &&
|
||||
pack_tlv(NFAPI_NR_NFAPI_P7_PNF_ADDRESS_IPV6_TAG, &(pNfapiMsg->nfapi_config.p7_pnf_address_ipv6), ppWritePackedMsg, end, &pack_ipv6_address_value) &&
|
||||
pack_tlv(NFAPI_NR_NFAPI_P7_PNF_PORT_TAG, &(pNfapiMsg->nfapi_config.p7_pnf_port), ppWritePackedMsg, end, &pack_uint16_tlv_value) &&
|
||||
|
||||
pack_tlv(NFAPI_NR_NFAPI_P7_VNF_ADDRESS_IPV4_TAG, &(pNfapiMsg->nfapi_config.p7_vnf_address_ipv4), ppWritePackedMsg, end, &pack_ipv4_address_value) &&
|
||||
pack_tlv(NFAPI_NR_NFAPI_P7_VNF_ADDRESS_IPV6_TAG, &(pNfapiMsg->nfapi_config.p7_vnf_address_ipv6), ppWritePackedMsg, end, &pack_ipv6_address_value) &&
|
||||
pack_tlv(NFAPI_NR_NFAPI_P7_VNF_PORT_TAG, &(pNfapiMsg->nfapi_config.p7_vnf_port), ppWritePackedMsg, end, &pack_uint16_tlv_value) &&
|
||||
//pack_tlv(NFAPI_NR_NFAPI_RF_BANDS_TAG, &(pNfapiMsg->nfapi_config.rf_bands), ppWritePackedMsg, end, &pack_rf_bands_value) &&
|
||||
pack_tlv(NFAPI_NR_NFAPI_TIMING_INFO_MODE_TAG, &(pNfapiMsg->nfapi_config.timing_info_mode), ppWritePackedMsg, end, &pack_uint8_tlv_value) &&
|
||||
pack_tlv(NFAPI_NR_NFAPI_TIMING_INFO_PERIOD_TAG, &(pNfapiMsg->nfapi_config.timing_info_period), ppWritePackedMsg, end, &pack_uint8_tlv_value) &&
|
||||
pack_tlv(NFAPI_NR_NFAPI_P7_PNF_ADDRESS_IPV4_TAG, &(pNfapiMsg->nfapi_config.p7_pnf_address_ipv4), ppWritePackedMsg, end, &pack_ipv4_address_value) &&
|
||||
pack_tlv(NFAPI_NR_NFAPI_P7_PNF_ADDRESS_IPV6_TAG, &(pNfapiMsg->nfapi_config.p7_pnf_address_ipv6), ppWritePackedMsg, end, &pack_ipv6_address_value) &&
|
||||
pack_tlv(NFAPI_NR_NFAPI_P7_PNF_PORT_TAG, &(pNfapiMsg->nfapi_config.p7_pnf_port), ppWritePackedMsg, end, &pack_uint16_tlv_value) &&
|
||||
pack_tlv(NFAPI_NR_NFAPI_TIMING_WINDOW_TAG, &(pNfapiMsg->nfapi_config.timing_window), ppWritePackedMsg, end, &pack_uint8_tlv_value) &&
|
||||
//pack_tlv(NFAPI_NR_NFAPI_UPLINK_UES_PER_SUBFRAME_TAG, &(pNfapiMsg->nfapi_config.ul_ue_per_sf), ppWritePackedMsg, end, &pack_uint8_tlv_value) &&
|
||||
|
||||
pack_vendor_extension_tlv(pNfapiMsg->vendor_extension, ppWritePackedMsg, end, config) );
|
||||
pack_tlv(NFAPI_NR_NFAPI_TIMING_INFO_MODE_TAG, &(pNfapiMsg->nfapi_config.timing_info_mode), ppWritePackedMsg, end, &pack_uint8_tlv_value) &&
|
||||
pack_tlv(NFAPI_NR_NFAPI_TIMING_INFO_PERIOD_TAG, &(pNfapiMsg->nfapi_config.timing_info_period), ppWritePackedMsg, end, &pack_uint8_tlv_value));
|
||||
}
|
||||
|
||||
static uint8_t pack_nr_config_response(void *msg, uint8_t **ppWritePackedMsg, uint8_t *end, nfapi_p4_p5_codec_config_t *config) {
|
||||
@@ -785,7 +777,7 @@ static uint8_t pack_nr_config_response(void *msg, uint8_t **ppWritePackedMsg, ui
|
||||
|
||||
static uint8_t pack_config_response(void *msg, uint8_t **ppWritePackedMsg, uint8_t *end, nfapi_p4_p5_codec_config_t *config) {
|
||||
nfapi_config_response_t *pNfapiMsg = (nfapi_config_response_t *)msg;
|
||||
return ( push8(pNfapiMsg->error_code, ppWritePackedMsg, end) &&
|
||||
return ( push32(pNfapiMsg->error_code, ppWritePackedMsg, end) &&
|
||||
pack_vendor_extension_tlv(pNfapiMsg->vendor_extension, ppWritePackedMsg, end, config) );
|
||||
}
|
||||
|
||||
@@ -1036,7 +1028,7 @@ static uint8_t pack_p5_message_body(nfapi_p4_p5_message_header_t *header, uint8_
|
||||
|
||||
static uint32_t get_packed_msg_len(uintptr_t msgHead, uintptr_t msgEnd) {
|
||||
if (msgEnd < msgHead) {
|
||||
NFAPI_TRACE(NFAPI_TRACE_ERROR, "get_packed_msg_len: Error in pointers supplied %d, %d\n", msgHead, msgEnd);
|
||||
NFAPI_TRACE(NFAPI_TRACE_ERROR, "get_packed_msg_len: Error in pointers supplied %lu, %lu\n", msgHead, msgEnd);
|
||||
return 0;
|
||||
}
|
||||
|
||||
@@ -1351,13 +1343,13 @@ static uint8_t unpack_nr_pnf_config_request(uint8_t **ppReadPackedMsg, uint8_t *
|
||||
}
|
||||
|
||||
|
||||
|
||||
static uint8_t unpack_pnf_config_request(uint8_t **ppReadPackedMsg, uint8_t *end, void *msg, nfapi_p4_p5_codec_config_t *config) {
|
||||
nfapi_pnf_config_request_t *pNfapiMsg = (nfapi_pnf_config_request_t *)msg;
|
||||
unpack_tlv_t unpack_fns[] = {
|
||||
{ NFAPI_PNF_PHY_RF_TAG, &pNfapiMsg->pnf_phy_rf_config, &unpack_pnf_phy_rf_config_value},
|
||||
};
|
||||
return unpack_tlv_list(unpack_fns, sizeof(unpack_fns)/sizeof(unpack_tlv_t), ppReadPackedMsg, end, config, &pNfapiMsg->vendor_extension);
|
||||
return (pull8(ppReadPackedMsg, &pNfapiMsg->num_tlvs, end) &&
|
||||
unpack_tlv_list(unpack_fns, sizeof(unpack_fns)/sizeof(unpack_tlv_t), ppReadPackedMsg, end, config, &pNfapiMsg->vendor_extension));
|
||||
}
|
||||
|
||||
|
||||
@@ -1723,6 +1715,7 @@ static uint8_t unpack_config_request(uint8_t **ppReadPackedMsg, uint8_t *end, vo
|
||||
return ( pull8(ppReadPackedMsg, &pNfapiMsg->num_tlv, end) &&
|
||||
unpack_tlv_list(unpack_fns, sizeof(unpack_fns)/sizeof(unpack_tlv_t), ppReadPackedMsg, end, config, &pNfapiMsg->vendor_extension));
|
||||
}
|
||||
|
||||
static uint8_t unpack_nr_config_request(uint8_t **ppReadPackedMsg, uint8_t *end, void *msg, nfapi_p4_p5_codec_config_t* config)
|
||||
{
|
||||
nfapi_nr_config_request_scf_t *pNfapiMsg = (nfapi_nr_config_request_scf_t*)msg;
|
||||
@@ -1732,13 +1725,14 @@ static uint8_t unpack_nr_config_request(uint8_t **ppReadPackedMsg, uint8_t *end,
|
||||
for(int i=0;i<40;i++)
|
||||
pNfapiMsg->tdd_table.max_tdd_periodicity_list[i].max_num_of_symbol_per_slot_list = (nfapi_nr_max_num_of_symbol_per_slot_t*) malloc(14*sizeof(nfapi_nr_max_num_of_symbol_per_slot_t));
|
||||
|
||||
pNfapiMsg->prach_config.num_prach_fd_occasions_list=(nfapi_nr_num_prach_fd_occasions_t *) malloc(sizeof(nfapi_nr_num_prach_fd_occasions_t));
|
||||
|
||||
for(int i = 0; i < 40; i++){ //unpacking tdd slot config
|
||||
for(int symbol = 0; symbol<14;symbol++){
|
||||
pull8(ppReadPackedMsg,&pNfapiMsg->tdd_table.max_tdd_periodicity_list[i].max_num_of_symbol_per_slot_list[symbol].slot_config.value, end);
|
||||
}
|
||||
}
|
||||
pNfapiMsg->prach_config.num_prach_fd_occasions_list=(nfapi_nr_num_prach_fd_occasions_t *) malloc(sizeof(nfapi_nr_num_prach_fd_occasions_t));
|
||||
|
||||
unpack_tlv_t unpack_fns[] =
|
||||
{
|
||||
{ NFAPI_NR_CONFIG_DL_BANDWIDTH_TAG, &(pNfapiMsg->carrier_config.dl_bandwidth), &unpack_uint16_tlv_value},
|
||||
@@ -1751,8 +1745,13 @@ static uint8_t unpack_nr_config_request(uint8_t **ppReadPackedMsg, uint8_t *end,
|
||||
{ NFAPI_NR_CONFIG_UL_K0_TAG, &(pNfapiMsg->carrier_config.ul_k0[1]), &unpack_uint16_tlv_value},
|
||||
{ NFAPI_NR_CONFIG_UPLINK_BANDWIDTH_TAG, &(pNfapiMsg->carrier_config.uplink_bandwidth), &unpack_uint16_tlv_value},
|
||||
{ NFAPI_NR_CONFIG_UPLINK_FREQUENCY_TAG, &(pNfapiMsg->carrier_config.uplink_frequency), &unpack_uint32_tlv_value},
|
||||
{ NFAPI_NR_CONFIG_FREQUENCY_SHIFT_7P5KHZ_TAG, &(pNfapiMsg->carrier_config.frequency_shift_7p5khz), &unpack_uint8_tlv_value},
|
||||
|
||||
{ NFAPI_NR_CONFIG_FRAME_DUPLEX_TYPE_TAG, &(pNfapiMsg->cell_config.frame_duplex_type), &unpack_uint8_tlv_value},
|
||||
{ NFAPI_NR_CONFIG_PHY_CELL_ID_TAG, &(pNfapiMsg->cell_config.phy_cell_id), &unpack_uint8_tlv_value},
|
||||
{ NFAPI_NR_CONFIG_PHY_CELL_ID_TAG, &(pNfapiMsg->cell_config.phy_cell_id), &unpack_uint16_tlv_value},
|
||||
|
||||
{ NFAPI_NR_CONFIG_PRACH_MULTIPLE_CARRIERS_IN_A_BAND_TAG, &(pNfapiMsg->prach_config.prach_multiple_carriers_in_a_band), &unpack_uint8_tlv_value},
|
||||
{ NFAPI_NR_CONFIG_PRACH_CONFIG_INDEX_TAG, &(pNfapiMsg->prach_config.prach_ConfigurationIndex), &unpack_uint8_tlv_value},
|
||||
{ NFAPI_NR_CONFIG_NUM_PRACH_FD_OCCASIONS_TAG, &(pNfapiMsg->prach_config.num_prach_fd_occasions), &unpack_uint8_tlv_value},
|
||||
{ NFAPI_NR_CONFIG_PRACH_SEQUENCE_LENGTH_TAG, &(pNfapiMsg->prach_config.prach_sequence_length), &unpack_uint8_tlv_value},
|
||||
{ NFAPI_NR_CONFIG_RESTRICTED_SET_CONFIG_TAG, &(pNfapiMsg->prach_config.restricted_set_config), &unpack_uint8_tlv_value},
|
||||
@@ -1764,29 +1763,37 @@ static uint8_t unpack_nr_config_request(uint8_t **ppReadPackedMsg, uint8_t *end,
|
||||
{ NFAPI_NR_CONFIG_NUM_ROOT_SEQUENCES_TAG, &(pNfapiMsg->prach_config.num_prach_fd_occasions_list[0].num_root_sequences), &unpack_uint8_tlv_value},
|
||||
|
||||
{ NFAPI_NR_CONFIG_SCS_COMMON_TAG, &(pNfapiMsg->ssb_config.scs_common), &unpack_uint8_tlv_value},
|
||||
{ NFAPI_NR_CONFIG_BCH_PAYLOAD_TAG, &(pNfapiMsg->ssb_config.bch_payload), &unpack_uint8_tlv_value},
|
||||
{ NFAPI_NR_CONFIG_SS_PBCH_POWER_TAG, &(pNfapiMsg->ssb_config.ss_pbch_power), &unpack_uint32_tlv_value},
|
||||
|
||||
{ NFAPI_NR_CONFIG_BETA_PSS_TAG, &(pNfapiMsg->ssb_table.beta_pss), &unpack_uint8_tlv_value},
|
||||
{ NFAPI_NR_CONFIG_MIB_TAG, &(pNfapiMsg->ssb_table.MIB), &unpack_uint32_tlv_value},
|
||||
{ NFAPI_NR_CONFIG_SSB_MASK_TAG, &(pNfapiMsg->ssb_table.ssb_mask_list[0].ssb_mask), &unpack_uint32_tlv_value},
|
||||
{ NFAPI_NR_CONFIG_SSB_MASK_TAG, &(pNfapiMsg->ssb_table.ssb_mask_list[1].ssb_mask), &unpack_uint32_tlv_value},
|
||||
|
||||
// TODO: Not sure what's going on, ssb_mask_list[1] unpacking below seems to match pack, but is causing problems
|
||||
// { NFAPI_NR_CONFIG_SSB_MASK_TAG, &(pNfapiMsg->ssb_table.ssb_mask_list[1].ssb_mask), &unpack_uint32_tlv_value},
|
||||
{ NFAPI_NR_CONFIG_BEAM_ID_TAG, &(pNfapiMsg->ssb_table.ssb_beam_id_list[0].beam_id), &unpack_uint8_tlv_value},
|
||||
{ NFAPI_NR_CONFIG_SSB_OFFSET_POINT_A_TAG, &(pNfapiMsg->ssb_table.ssb_offset_point_a), &unpack_uint16_tlv_value},
|
||||
{ NFAPI_NR_CONFIG_SSB_PERIOD_TAG, &(pNfapiMsg->ssb_table.ssb_period), &unpack_uint8_tlv_value},
|
||||
{ NFAPI_NR_CONFIG_SSB_SUBCARRIER_OFFSET_TAG, &(pNfapiMsg->ssb_table.ssb_subcarrier_offset), &unpack_uint8_tlv_value},
|
||||
{ NFAPI_NR_CONFIG_SS_PBCH_MULTIPLE_CARRIERS_IN_A_BAND_TAG, &(pNfapiMsg->ssb_table.ss_pbch_multiple_carriers_in_a_band), &unpack_uint8_tlv_value},
|
||||
{ NFAPI_NR_CONFIG_MULTIPLE_CELLS_SS_PBCH_IN_A_CARRIER_TAG, &(pNfapiMsg->ssb_table.multiple_cells_ss_pbch_in_a_carrier), &unpack_uint8_tlv_value},
|
||||
|
||||
{ NFAPI_NR_CONFIG_TDD_PERIOD_TAG, &(pNfapiMsg->tdd_table.tdd_period), &unpack_uint8_tlv_value},
|
||||
{ NFAPI_NR_NFAPI_P7_PNF_ADDRESS_IPV6_TAG, &(pNfapiMsg->nfapi_config.p7_pnf_address_ipv6), &unpack_ipv6_address_value},
|
||||
{ NFAPI_NR_NFAPI_P7_PNF_PORT_TAG, &(pNfapiMsg->nfapi_config.p7_pnf_port), &unpack_uint16_tlv_value},
|
||||
|
||||
{ NFAPI_NR_NFAPI_P7_VNF_ADDRESS_IPV4_TAG, &(pNfapiMsg->nfapi_config.p7_vnf_address_ipv4), &unpack_ipv4_address_value},
|
||||
{ NFAPI_NR_NFAPI_P7_VNF_ADDRESS_IPV6_TAG, &(pNfapiMsg->nfapi_config.p7_vnf_address_ipv6), &unpack_ipv6_address_value},
|
||||
{ NFAPI_NR_NFAPI_P7_VNF_PORT_TAG, &(pNfapiMsg->nfapi_config.p7_vnf_port), &unpack_uint16_tlv_value},
|
||||
{ NFAPI_NR_NFAPI_P7_PNF_ADDRESS_IPV4_TAG, &(pNfapiMsg->nfapi_config.p7_pnf_address_ipv4), &unpack_ipv4_address_value},
|
||||
{ NFAPI_NR_NFAPI_P7_PNF_ADDRESS_IPV6_TAG, &(pNfapiMsg->nfapi_config.p7_pnf_address_ipv6), &unpack_ipv6_address_value},
|
||||
{ NFAPI_NR_NFAPI_P7_PNF_PORT_TAG, &(pNfapiMsg->nfapi_config.p7_pnf_port), &unpack_uint16_tlv_value},
|
||||
{ NFAPI_NR_NFAPI_TIMING_WINDOW_TAG, &(pNfapiMsg->nfapi_config.timing_window), &unpack_uint8_tlv_value},
|
||||
{ NFAPI_NR_NFAPI_TIMING_INFO_MODE_TAG, &(pNfapiMsg->nfapi_config.timing_info_mode), &unpack_uint8_tlv_value},
|
||||
{ NFAPI_NR_NFAPI_TIMING_INFO_PERIOD_TAG, &(pNfapiMsg->nfapi_config.timing_info_period), &unpack_uint8_tlv_value},
|
||||
{ NFAPI_NR_NFAPI_TIMING_WINDOW_TAG, &(pNfapiMsg->nfapi_config.timing_window), &unpack_uint8_tlv_value},
|
||||
};
|
||||
|
||||
return ( pull8(ppReadPackedMsg, &pNfapiMsg->num_tlv, end) &&
|
||||
unpack_tlv_list(unpack_fns, sizeof(unpack_fns)/sizeof(unpack_tlv_t), ppReadPackedMsg, end, config, &pNfapiMsg->vendor_extension));
|
||||
|
||||
|
||||
}
|
||||
|
||||
static uint8_t unpack_config_response(uint8_t **ppReadPackedMsg, uint8_t *end, void *msg, nfapi_p4_p5_codec_config_t *config) {
|
||||
@@ -2386,3 +2393,4 @@ int nfapi_p5_message_unpack(void *pMessageBuf, uint32_t messageBufLen, void *pUn
|
||||
|
||||
return result;
|
||||
}
|
||||
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
Reference in New Issue
Block a user