From 530f96278df602f13f190623693dc98168952f22 Mon Sep 17 00:00:00 2001 From: Robert Schmidt Date: Fri, 25 Oct 2024 13:45:12 +0200 Subject: [PATCH 01/16] Rearrange FHI architecture to support M-plane Co-authored-by: Teodora --- radio/fhi_72/oran-config.c | 21 +++++++++++++++++++-- radio/fhi_72/oran-config.h | 10 +++++----- radio/fhi_72/oran-init.c | 27 ++++++--------------------- radio/fhi_72/oran-init.h | 3 +-- radio/fhi_72/oran_isolate.c | 12 +++++++++++- 5 files changed, 42 insertions(+), 31 deletions(-) diff --git a/radio/fhi_72/oran-config.c b/radio/fhi_72/oran-config.c index 2973fdc2b0..23649b18b7 100644 --- a/radio/fhi_72/oran-config.c +++ b/radio/fhi_72/oran-config.c @@ -560,7 +560,7 @@ uint8_t *get_ether_addr(const char *addr, struct rte_ether_addr *ether_addr) return NULL; } -bool set_fh_init(struct xran_fh_init *fh_init) +static bool set_fh_init(struct xran_fh_init *fh_init) { memset(fh_init, 0, sizeof(*fh_init)); @@ -765,7 +765,7 @@ static bool set_maxmin_pd(const paramdef_t *pd, int num, const char *name, uint1 } extern uint32_t to_nrarfcn(int nr_bandP, uint64_t dl_CarrierFreq, uint8_t scs_index, uint32_t bw); -bool set_fh_config(int ru_idx, int num_rus, const openair0_config_t *oai0, struct xran_fh_config *fh_config) +static bool set_fh_config(int ru_idx, int num_rus, const openair0_config_t *oai0, struct xran_fh_config *fh_config) { AssertFatal(num_rus == 1 || num_rus == 2, "only support 1 or 2 RUs as of now\n"); AssertFatal(ru_idx < num_rus, "illegal ru_idx %d: must be < %d\n", ru_idx, num_rus); @@ -886,3 +886,20 @@ bool set_fh_config(int ru_idx, int num_rus, const openair0_config_t *oai0, struc return true; } + +bool get_xran_config(const openair0_config_t *openair0_cfg, struct xran_fh_init *fh_init, struct xran_fh_config *fh_config) +{ + if (!set_fh_init(fh_init)) { + printf("could not read FHI 7.2/ORAN config\n"); + return false; + } + + for (int32_t o_xu_id = 0; o_xu_id < fh_init->xran_ports; o_xu_id++) { + if (!set_fh_config(o_xu_id, fh_init->xran_ports, openair0_cfg, &fh_config[o_xu_id])) { + printf("could not read FHI 7.2/RU-specific config\n"); + return false; + } + } + + return true; +} diff --git a/radio/fhi_72/oran-config.h b/radio/fhi_72/oran-config.h index 77f04d8e0c..c5a086638f 100644 --- a/radio/fhi_72/oran-config.h +++ b/radio/fhi_72/oran-config.h @@ -26,13 +26,13 @@ #include "stdint.h" struct xran_fh_init; -void print_fh_init(const struct xran_fh_init *fh_init); struct xran_fh_config; -void print_fh_config(const struct xran_fh_config *fh_config); - -bool set_fh_init(struct xran_fh_init *fh_init); struct openair0_config; -bool set_fh_config(int ru_idx, int num_rus, const struct openair0_config *oai0_cfg, struct xran_fh_config *fh_config); + +bool get_xran_config(const struct openair0_config *openair0_cfg, struct xran_fh_init *fh_init, struct xran_fh_config *fh_config); + +void print_fh_init(const struct xran_fh_init *fh_init); +void print_fh_config(const struct xran_fh_config *fh_config); // hack to workaround LiteOn limitation extern int g_kbar; diff --git a/radio/fhi_72/oran-init.c b/radio/fhi_72/oran-init.c index 7a629ce5aa..e290db561b 100644 --- a/radio/fhi_72/oran-init.c +++ b/radio/fhi_72/oran-init.c @@ -396,35 +396,20 @@ static void oran_allocate_buffers(void *handle, xran_5g_prach_req(pi->instanceHandle, prach, prachdecomp, oai_xran_fh_rx_prach_callback, &portInstances->prach_tag); } -int *oai_oran_initialize(const openair0_config_t *openair0_cfg) +int *oai_oran_initialize(struct xran_fh_init *xran_fh_init, struct xran_fh_config *xran_fh_config) { int32_t xret = 0; - struct xran_fh_init init = {0}; - if (!set_fh_init(&init)) { - printf("could not read FHI 7.2/ORAN config\n"); - return NULL; - } - print_fh_init(&init); - - /* read all configuration before starting anything */ - struct xran_fh_config xran_fh_config[XRAN_PORTS_NUM] = {0}; - for (int32_t o_xu_id = 0; o_xu_id < init.xran_ports; o_xu_id++) { - if (!set_fh_config(o_xu_id, init.xran_ports, openair0_cfg, &xran_fh_config[o_xu_id])) { - printf("could not read FHI 7.2/RU-specific config\n"); - return NULL; - } - print_fh_config(&xran_fh_config[o_xu_id]); - } - - xret = xran_init(0, NULL, &init, NULL, &gxran_handle); + print_fh_init(xran_fh_init); + xret = xran_init(0, NULL, xran_fh_init, NULL, &gxran_handle); if (xret != XRAN_STATUS_SUCCESS) { printf("xran_init failed %d\n", xret); exit(-1); } /** process all the O-RU|O-DU for use case */ - for (int32_t o_xu_id = 0; o_xu_id < init.xran_ports; o_xu_id++) { + for (int32_t o_xu_id = 0; o_xu_id < xran_fh_init->xran_ports; o_xu_id++) { + print_fh_config(&xran_fh_config[o_xu_id]); xret = xran_open(gxran_handle, &xran_fh_config[o_xu_id]); if (xret != XRAN_STATUS_SUCCESS) { printf("xran_open failed %d\n", xret); @@ -432,7 +417,7 @@ int *oai_oran_initialize(const openair0_config_t *openair0_cfg) } int sector = 0; - printf("Initialize ORAN port instance %d (%d) sector %d\n", o_xu_id, init.xran_ports, sector); + printf("Initialize ORAN port instance %d (%d) sector %d\n", o_xu_id, xran_fh_init->xran_ports, sector); oran_port_instance_t *pi = &gPortInst[o_xu_id][sector]; struct xran_cb_tag tag = {.cellId = sector, .oXuId = o_xu_id}; pi->prach_tag = tag; diff --git a/radio/fhi_72/oran-init.h b/radio/fhi_72/oran-init.h index dad57a60c3..b9f31d9889 100644 --- a/radio/fhi_72/oran-init.h +++ b/radio/fhi_72/oran-init.h @@ -57,7 +57,6 @@ typedef struct oran_port_instance_t { extern struct xran_fh_config gxran_fh_config[XRAN_PORTS_NUM]; extern void *gxran_handle; -struct openair0_config; -int *oai_oran_initialize(const struct openair0_config *openair0_cfg); +int *oai_oran_initialize(struct xran_fh_init *fh_init, struct xran_fh_config *fh_config); #endif /* ORAN_INIT_H */ diff --git a/radio/fhi_72/oran_isolate.c b/radio/fhi_72/oran_isolate.c index 32bdb7c771..8f81337855 100644 --- a/radio/fhi_72/oran_isolate.c +++ b/radio/fhi_72/oran_isolate.c @@ -33,6 +33,7 @@ #include "openair1/PHY/defs_gNB.h" #include "common/utils/threadPool/thread-pool.h" #include "oaioran.h" +#include "oran-config.h" // include the following file for VERSIONX, version of xran lib, to print it during // startup. Only relevant for printing, if it ever makes problem, remove this @@ -317,7 +318,16 @@ __attribute__((__visibility__("default"))) int transport_init(openair0_device *d LOG_I(HW, "Initializing O-RAN 7.2 FH interface through xran library (compiled against headers of %s)\n", VERSIONX); initNotifiedFIFO(&oran_sync_fifo); - eth->oran_priv = oai_oran_initialize(openair0_cfg); + + struct xran_fh_init fh_init = {0}; + struct xran_fh_config fh_config[XRAN_PORTS_NUM] = {0}; +#ifndef OAI_MPLANE_SUPPORT + bool success = get_xran_config(openair0_cfg, &fh_init, fh_config); + AssertFatal(success, "cannot get configuration for xran\n"); +#else + /* TODO: M-plane integration */ +#endif + eth->oran_priv = oai_oran_initialize(&fh_init, fh_config); AssertFatal(eth->oran_priv != NULL, "can not initialize fronthaul"); // create message queues for ORAN sync return 0; From f30453968f2f09429fe4b366bf7dc4e24174c7aa Mon Sep 17 00:00:00 2001 From: Teodora Date: Tue, 12 Nov 2024 16:38:42 +0100 Subject: [PATCH 02/16] xran integration improvements - identification of each parameter in fh_init and fh_config structs - identification of unused parameters in xran library - identification of parameters used for CAT A O-RU => CAT B not supported in this release --- radio/fhi_72/oran-config.c | 370 ++++++++++++++++++------------------- radio/fhi_72/oran-params.h | 4 +- 2 files changed, 183 insertions(+), 191 deletions(-) diff --git a/radio/fhi_72/oran-config.c b/radio/fhi_72/oran-config.c index 23649b18b7..4f828b8a1a 100644 --- a/radio/fhi_72/oran-config.c +++ b/radio/fhi_72/oran-config.c @@ -27,6 +27,7 @@ #include "xran_fh_o_du.h" #include "xran_cp_api.h" #include "rte_ether.h" +#include #include "stdio.h" #include "string.h" @@ -234,13 +235,14 @@ void print_fh_init(const struct xran_fh_init *fh_init) dpdkBasebandFecMode %d\n\ dpdkBasebandDevice %s\n\ filePrefix %s\n\ - mtu %d\n", + mtu %d\n\ + p_o_du_addr %s\n", fh_init->xran_ports, fh_init->dpdkBasebandFecMode, fh_init->dpdkBasebandDevice, fh_init->filePrefix, - fh_init->mtu); - print_ether_addr(" p_o_du_addr", fh_init->xran_ports * fh_init->io_cfg.num_vfs, (struct rte_ether_addr *)fh_init->p_o_du_addr); + fh_init->mtu, + fh_init->p_o_du_addr); print_ether_addr(" p_o_ru_addr", fh_init->xran_ports * fh_init->io_cfg.num_vfs, (struct rte_ether_addr *)fh_init->p_o_ru_addr); printf("\ totalBfWeights %d\n", @@ -448,15 +450,19 @@ void print_fh_config(const struct xran_fh_config *fh_config) printf("\ bbdev_enc %p\n\ bbdev_dec %p\n\ - tx_cp_eAxC2Vf [not implemented by fhi_lib]\n\ - tx_up_eAxC2Vf [not implemented by fhi_lib]\n\ - rx_cp_eAxC2Vf [not implemented by fhi_lib]\n\ - rx_up_eAxC2Vf [not implemented by fhi_lib]\n\ + tx_cp_eAxC2Vf %p\n\ + tx_up_eAxC2Vf %p\n\ + rx_cp_eAxC2Vf %p\n\ + rx_up_eAxC2Vf %p\n\ log_level %d\n\ max_sections_per_slot %d\n\ max_sections_per_symbol %d\n", fh_config->bbdev_enc, fh_config->bbdev_dec, + fh_config->tx_cp_eAxC2Vf, + fh_config->tx_up_eAxC2Vf, + fh_config->rx_cp_eAxC2Vf, + fh_config->rx_up_eAxC2Vf, fh_config->log_level, fh_config->max_sections_per_slot, fh_config->max_sections_per_symbol); @@ -483,52 +489,66 @@ static uint64_t get_u64_mask(const paramdef_t *pd) return mask; } -static bool set_fh_io_cfg(struct xran_io_cfg *io_cfg, const paramdef_t *fhip, int nump) +static bool set_fh_io_cfg(struct xran_io_cfg *io_cfg, const paramdef_t *fhip, int nump, const int num_rus) { DevAssert(fhip != NULL); int num_dev = gpd(fhip, nump, ORAN_CONFIG_DPDK_DEVICES)->numelt; AssertFatal(num_dev > 0, "need to provide DPDK devices for O-RAN 7.2 Fronthaul\n"); AssertFatal(num_dev < 17, "too many DPDK devices for O-RAN 7.2 Fronthaul\n"); - io_cfg->id = 0; // 0 = O-DU - io_cfg->num_vfs = num_dev; - io_cfg->num_rxq = 2; // Assume two HW RX queues per RU - for (int i = 0; i < num_dev; ++i) - io_cfg->dpdk_dev[i] = strdup(gpd(fhip, nump, ORAN_CONFIG_DPDK_DEVICES)->strlistptr[i]); - //io_cfg->bbdev_dev = NULL; - io_cfg->bbdev_mode = XRAN_BBDEV_NOT_USED; // none - io_cfg->dpdkIoVaMode = 0; /* IOVA mode */ - io_cfg->dpdkMemorySize = *gpd(fhip, nump, ORAN_CONFIG_DPDK_MEM_SIZE)->uptr; - io_cfg->core = *gpd(fhip, nump, ORAN_CONFIG_IO_CORE)->iptr; - io_cfg->system_core = *gpd(fhip, nump, ORAN_CONFIG_SYSTEM_CORE)->iptr; - io_cfg->pkt_proc_core = get_u64_mask(gpd(fhip, nump, ORAN_CONFIG_WORKER_CORES)); - io_cfg->pkt_proc_core_64_127 = 0x0; // bitmap 0 -> no core - io_cfg->pkt_aux_core = 0; /* sapmle app says 0 = "do not start" */ - io_cfg->timing_core = *gpd(fhip, nump, ORAN_CONFIG_IO_CORE)->iptr; /* sample app: equal to io_core */ - //io_cfg->port = {0}; // all 0 - io_cfg->io_sleep = 0; // no sleep - io_cfg->nEthLinePerPort = *gpd(fhip, nump, ORAN_CONFIG_NETHPERPORT)->uptr; - io_cfg->nEthLineSpeed = *gpd(fhip, nump, ORAN_CONFIG_NETHSPEED)->uptr; - io_cfg->one_vf_cu_plane = 0; // false: C/U-plane don't share VF - // io_cfg->eowd_cmn[0] // all 0 - // io_cfg->eowd_cmn[1] // all 0 - // io_cfg->eowd_port[0]... // all 0 + io_cfg->id = 0; // 0 -> xran as O-DU; 1 -> xran as O-RU + io_cfg->num_vfs = num_dev; // number of VFs for C-plane and U-plane (should be even); max = XRAN_VF_MAX + io_cfg->num_rxq = 1; // number of RX queues per VF + for (int i = 0; i < num_dev; ++i) { + io_cfg->dpdk_dev[i] = strdup(gpd(fhip, nump, ORAN_CONFIG_DPDK_DEVICES)->strlistptr[i]); // VFs devices + } + io_cfg->bbdev_dev[0] = NULL; // BBDev dev name; max devices = 1 + io_cfg->bbdev_mode = XRAN_BBDEV_NOT_USED; // DPDK for BBDev + io_cfg->dpdkIoVaMode = 0; // IOVA mode + io_cfg->dpdkMemorySize = *gpd(fhip, nump, ORAN_CONFIG_DPDK_MEM_SIZE)->uptr; // DPDK max memory allocation + + /* the following core assignment is needed for rte_eal_init() function within xran library; + these parameters are machine specific */ + io_cfg->core = *gpd(fhip, nump, ORAN_CONFIG_IO_CORE)->iptr; // core used for IO; absolute CPU core ID for xran library, it should be an isolated core + io_cfg->system_core = *gpd(fhip, nump, ORAN_CONFIG_SYSTEM_CORE)->iptr; // absolute CPU core ID for DPDK control threads, it should be an isolated core + io_cfg->pkt_proc_core = get_u64_mask(gpd(fhip, nump, ORAN_CONFIG_WORKER_CORES)); // worker mask 0-63 + io_cfg->pkt_proc_core_64_127 = 0x0; // worker mask 64-127; to be used if machine supports more than 64 cores + io_cfg->pkt_aux_core = 0; // sample app says 0 = "do not start" + io_cfg->timing_core = *gpd(fhip, nump, ORAN_CONFIG_IO_CORE)->iptr; // core used by xran + + // io_cfg->port[XRAN_VF_MAX] // VFs ports; filled within xran library + io_cfg->io_sleep = 0; // enable sleep on PMD cores; 0 -> no sleep + io_cfg->nEthLinePerPort = *gpd(fhip, nump, ORAN_CONFIG_NETHPERPORT)->uptr; // 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) + io_cfg->nEthLineSpeed = *gpd(fhip, nump, ORAN_CONFIG_NETHSPEED)->uptr; // 10G,25G,40G,100G speed of Physical connection on O-RU + io_cfg->one_vf_cu_plane = (io_cfg->num_vfs == num_rus); // C-plane and U-plane use one VF + + /* use owdm to calculate T12 and T34 -> CUS specification, section 2.3.3.3 */ + // io_cfg->eowd_cmn[2] // ecpri one-way delay measurements common settings for O-DU and O-RU + // io_cfg->eowd_port[2][XRAN_VF_MAX] // ecpri owd measurements per port variables for O-DU and O-RU return true; } static bool set_fh_eaxcid_conf(struct xran_eaxcid_config *eaxcid_conf, enum xran_category cat) { - // values taken from sample app + /* CUS specification, section 3.1.3.1.6 + DU_port_ID - used to differentiate processing units at O-DU (e.g., different baseband cards). + BandSector_ID - aggregated cell identifier (distinguishes bands and sectors supported by the O-RU). + CC_ID - distinguishes Carrier Components supported by the O-RU. + RU_Port_ID - designates logical flows such as data layers or spatial streams, and logical flows such as separate + numerologies (e.g. PRACH) or signaling channels requiring special antenna assignments such as SRS. + The assignment of the DU_port_ID, BandSector_ID, CC_ID, and RU_Port_ID + as part of the eAxC ID is done solely by the O-DU via the M-plane. + Each ID field has a flexible bit allocation, but the total eAxC ID field length is fixed, 16 bits. */ switch (cat) { case XRAN_CATEGORY_A: eaxcid_conf->mask_cuPortId = 0xf000; eaxcid_conf->mask_bandSectorId = 0x0f00; eaxcid_conf->mask_ccId = 0x00f0; eaxcid_conf->mask_ruPortId = 0x000f; - eaxcid_conf->bit_cuPortId = 12; - eaxcid_conf->bit_bandSectorId = 8; - eaxcid_conf->bit_ccId = 4; + eaxcid_conf->bit_cuPortId = 0; + eaxcid_conf->bit_bandSectorId = 0; // total number of band sectors supported by O-RU should be retreived by M-plane - && + eaxcid_conf->bit_ccId = 0; // total number of CC supported by O-RU should be retreived by M-plane - eaxcid_conf->bit_ruPortId = 0; break; case XRAN_CATEGORY_B: @@ -560,7 +580,7 @@ uint8_t *get_ether_addr(const char *addr, struct rte_ether_addr *ether_addr) return NULL; } -static bool set_fh_init(struct xran_fh_init *fh_init) +static bool set_fh_init(struct xran_fh_init *fh_init, enum xran_category xran_cat) { memset(fh_init, 0, sizeof(*fh_init)); @@ -588,42 +608,28 @@ static bool set_fh_init(struct xran_fh_init *fh_init) sprintf(aprefix, "%s", CONFIG_STRING_ORAN); const int nfh = sizeofArray(FHconfigs); config_getlist(config_get_if(), &FH_ConfigList, FHconfigs, nfh, aprefix); - int num_rus = FH_ConfigList.numelt; - int num_ru_addr = gpd(fhip, nump, ORAN_CONFIG_RU_ADDR)->numelt; - int num_du_addr = gpd(fhip, nump, ORAN_CONFIG_DU_ADDR)->numelt; - int num_vfs = gpd(fhip, nump, ORAN_CONFIG_DPDK_DEVICES)->numelt; - if (num_ru_addr != num_du_addr) { - printf("need to have same number of DUs and RUs!\n"); - return false; - } - if (num_ru_addr != num_vfs) { - printf("need to have as many RU/DU entries as DPDK devices (one VF for CP and UP each)\n"); - return false; - } - if (!set_fh_io_cfg(&fh_init->io_cfg, fhip, nump)) + int num_rus = FH_ConfigList.numelt; // based on the number of fh_config sections -> number of RUs + + if (!set_fh_io_cfg(&fh_init->io_cfg, fhip, nump, num_rus)) return false; - if (!set_fh_eaxcid_conf(&fh_init->eAxCId_conf, XRAN_CATEGORY_A)) + if (!set_fh_eaxcid_conf(&fh_init->eAxCId_conf, xran_cat)) return false; - fh_init->xran_ports = num_rus; - fh_init->dpdkBasebandFecMode = 0; - fh_init->dpdkBasebandDevice = NULL; - fh_init->filePrefix = strdup(*gpd(fhip, nump, ORAN_CONFIG_FILE_PREFIX)->strptr); // see DPDK --file-prefix + fh_init->xran_ports = num_rus; // since we use xran as O-DU, xran_ports is set to the number of RUs + fh_init->dpdkBasebandFecMode = 0; // DPDK Baseband FEC device mode (0-SW, 1-HW); not used in xran + fh_init->dpdkBasebandDevice = NULL; // DPDK Baseband device address; not used in xran + /* used to specify a unique prefix for shared memory, and files created by multiple DPDK processes; + is it necessary */ + fh_init->filePrefix = strdup(*gpd(fhip, nump, ORAN_CONFIG_FILE_PREFIX)->strptr); + /* maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be + communicated in a single xRAN network layer transaction. Supported 1500 bytes and 9600 bytes (Jumbo Frame); + xran only checks if (MTU <= 1500), therefore setting any value > 1500, xran assumes 9600 value is used */ fh_init->mtu = *gpd(fhip, nump, ORAN_CONFIG_MTU)->uptr; - // if multiple RUs: xran_ethdi_init_dpdk_io() iterates over - // &p_o_ru_addr[i] - char **du_addrs = gpd(fhip, nump, ORAN_CONFIG_DU_ADDR)->strlistptr; - fh_init->p_o_du_addr = calloc(num_du_addr, sizeof(struct rte_ether_addr)); - AssertFatal(fh_init->p_o_du_addr != NULL, "out of memory\n"); - for (int i = 0; i < num_du_addr; ++i) { - struct rte_ether_addr *ea = (struct rte_ether_addr *)fh_init->p_o_du_addr; - if (get_ether_addr(du_addrs[i], &ea[i]) == NULL) { - printf("could not read ethernet address '%s' for DU!\n", du_addrs[i]); - return false; - } - } + fh_init->p_o_du_addr = NULL; // DPDK retreives DU MAC address within the xran library with rte_eth_macaddr_get() function + + int num_ru_addr = gpd(fhip, nump, ORAN_CONFIG_RU_ADDR)->numelt; fh_init->p_o_ru_addr = calloc(num_ru_addr, sizeof(struct rte_ether_addr)); char **ru_addrs = gpd(fhip, nump, ORAN_CONFIG_RU_ADDR)->strlistptr; AssertFatal(fh_init->p_o_ru_addr != NULL, "out of memory\n"); @@ -634,42 +640,12 @@ static bool set_fh_init(struct xran_fh_init *fh_init) return false; } } - fh_init->totalBfWeights = 32; + + fh_init->totalBfWeights = 0; // only used if id = O_RU (for emulation); C-plane extension types; section 5.4.6 of CUS spec return true; } -static enum xran_cp_filterindex get_prach_filterindex_fr1(duplex_mode_t mode, int prach_index) -{ - if (mode == duplex_mode_TDD) { - // 38.211 table 6.3.3.2-3 "unpaired spectrum" -> TDD - switch (prach_index) { - case 0 ... 39: - case 256 ... 262: - return XRAN_FILTERINDEX_PRACH_012; - case 40 ... 66: - return XRAN_FILTERINDEX_PRACH_3; - case 67 ... 255: - return XRAN_FILTERINDEX_PRACH_ABC; - } - } else if (mode == duplex_mode_FDD) { - // 38.211 table 6.3.3.2-2 "paired spectrum" -> FDD - switch (prach_index) { - case 0 ... 59: - return XRAN_FILTERINDEX_PRACH_012; - case 60 ... 86: - return XRAN_FILTERINDEX_PRACH_3; - case 87 ... 255: - return XRAN_FILTERINDEX_PRACH_ABC; - default: - AssertFatal(false, "unknown PRACH index %d\n", prach_index); - } - } else { - AssertFatal(false, "unsupported duplex mode %d\n", mode); - } - return XRAN_FILTERINDEX_STANDARD; -} - // PRACH guard interval. Raymond: "[it] is not in the configuration, (i.e. it // is deterministic depending on others). LiteON must hard-code this in the // O-RU itself, benetel doesn't (as O-RAN specifies). So we will need to tell @@ -678,73 +654,82 @@ static enum xran_cp_filterindex get_prach_filterindex_fr1(duplex_mode_t mode, in int g_kbar; static bool set_fh_prach_config(const openair0_config_t *oai0, + const uint32_t max_num_ant, const paramdef_t *prachp, int nprach, struct xran_prach_config *prach_config) { const split7_config_t *s7cfg = &oai0->split7; - prach_config->nPrachConfIdx = s7cfg->prach_index; - prach_config->nPrachSubcSpacing = oai0->nr_scs_for_raster; - prach_config->nPrachZeroCorrConf = 0; - prach_config->nPrachRestrictSet = 0; - prach_config->nPrachRootSeqIdx = 0; - prach_config->nPrachFreqStart = s7cfg->prach_freq_start; - prach_config->nPrachFreqOffset = (s7cfg->prach_freq_start * 12 - oai0->num_rb_dl * 6) * 2; - if (oai0->nr_band < 100) - prach_config->nPrachFilterIdx = get_prach_filterindex_fr1(oai0->duplex_mode, s7cfg->prach_index); - else - prach_config->nPrachFilterIdx = XRAN_FILTERINDEX_PRACH_ABC; + prach_config->nPrachConfIdx = s7cfg->prach_index; // PRACH Configuration Index + prach_config->nPrachSubcSpacing = oai0->nr_scs_for_raster; // 0 -> 15kHz, 1 -> 30kHz, 2 -> 60kHz, 3 -> 120kHz + prach_config->nPrachZeroCorrConf = 0; // PRACH zeroCorrelationZoneConfig; should be saved from config file; not used in xran + prach_config->nPrachRestrictSet = 0; /* PRACH restrictedSetConfig; should be saved from config file; 0 = unrestricted, + 1 = restricted type A, 2=restricted type B; not used in xran */ + prach_config->nPrachRootSeqIdx = 0; // PRACH Root Sequence Index; should be saved from config file; 1 = 839, 2 = 139; not used in xran + prach_config->nPrachFreqStart = s7cfg->prach_freq_start; // PRACH frequency start (MSG1) + prach_config->nPrachFreqOffset = (s7cfg->prach_freq_start * 12 - oai0->num_rb_dl * 6) * 2; // PRACH frequency offset + prach_config->nPrachFilterIdx = 0; /* PRACH filter index; not used in xran; + in E release hardcoded to XRAN_FILTERINDEX_PRACH_ABC (preamble format A1~3, B1~4, C0, C2) + in F release properly calculated */ + + /* Return values after initialization */ prach_config->startSymId = 0; prach_config->lastSymId = 0; prach_config->startPrbc = 0; prach_config->numPrbc = 0; prach_config->timeOffset = 0; prach_config->freqOffset = 0; - prach_config->eAxC_offset = *gpd(prachp, nprach, ORAN_PRACH_CONFIG_EAXC_OFFSET)->u8ptr; + + /* xran defines PDSCH eAxC IDs as [0...Ntx-1]; + xran defines PUSCH eAxC IDs as [0...Nrx-1]; + PRACH offset must be >= max(Ntx, Nrx) */ + uint8_t offset = *gpd(prachp, nprach, ORAN_PRACH_CONFIG_EAXC_OFFSET)->u8ptr; + prach_config->eAxC_offset = (offset != 0) ? offset : max_num_ant; g_kbar = *gpd(prachp, nprach, ORAN_PRACH_CONFIG_KBAR)->uptr; return true; } -static bool set_fh_srs_config(struct xran_srs_config *srs_config) -{ - srs_config->symbMask = 0; - srs_config->eAxC_offset = 8; - return true; -} - static bool set_fh_frame_config(const openair0_config_t *oai0, struct xran_frame_config *frame_config) { const split7_config_t *s7cfg = &oai0->split7; - frame_config->nFrameDuplexType = oai0->duplex_mode == duplex_mode_TDD ? XRAN_TDD : XRAN_FDD; - frame_config->nNumerology = oai0->nr_scs_for_raster; + frame_config->nFrameDuplexType = oai0->duplex_mode == duplex_mode_TDD ? XRAN_TDD : XRAN_FDD; // Frame Duplex type: 0 -> FDD, 1 -> TDD + frame_config->nNumerology = oai0->nr_scs_for_raster; /* 0 -> 15kHz, 1 -> 30kHz, 2 -> 60kHz + 3 -> 120kHz, 4 -> 240kHz */ + + if (frame_config->nFrameDuplexType == XRAN_FDD) + return true; + + // TDD periodicity frame_config->nTddPeriod = s7cfg->n_tdd_period; + // TDD Slot configuration struct xran_slot_config *sc = &frame_config->sSlotConfig[0]; for (int slot = 0; slot < frame_config->nTddPeriod; ++slot) for (int sym = 0; sym < 14; ++sym) sc[slot].nSymbolType[sym] = s7cfg->slot_dirs[slot].sym_dir[sym]; + return true; } -static bool set_fh_ru_config(const paramdef_t *rup, uint16_t fftSize, int nru, struct xran_ru_config *ru_config) +static bool set_fh_ru_config(const paramdef_t *rup, uint16_t fftSize, int nru, enum xran_category xran_cat, struct xran_ru_config *ru_config) { - ru_config->xranTech = XRAN_RAN_5GNR; - ru_config->xranCat = XRAN_CATEGORY_A; - ru_config->xranCompHdrType = XRAN_COMP_HDR_TYPE_STATIC; - ru_config->iqWidth = *gpd(rup, nru, ORAN_RU_CONFIG_IQWIDTH)->uptr; + ru_config->xranTech = XRAN_RAN_5GNR; // 5GNR or LTE + ru_config->xranCat = xran_cat; // mode: Catergory A or Category B + ru_config->xranCompHdrType = XRAN_COMP_HDR_TYPE_STATIC; // dynamic or static udCompHdr handling + ru_config->iqWidth = *gpd(rup, nru, ORAN_RU_CONFIG_IQWIDTH)->uptr; // IQ bit width AssertFatal(ru_config->iqWidth <= 16, "IQ Width cannot be > 16!\n"); - ru_config->compMeth = ru_config->iqWidth < 16 ? XRAN_COMPMETHOD_BLKFLOAT : XRAN_COMPMETHOD_NONE; - ru_config->iqWidth_PRACH = *gpd(rup, nru, ORAN_RU_CONFIG_IQWIDTH_PRACH)->uptr; + ru_config->compMeth = ru_config->iqWidth < 16 ? XRAN_COMPMETHOD_BLKFLOAT : XRAN_COMPMETHOD_NONE; // compression method + ru_config->iqWidth_PRACH = *gpd(rup, nru, ORAN_RU_CONFIG_IQWIDTH_PRACH)->uptr; // IQ bit width for PRACH AssertFatal(ru_config->iqWidth_PRACH <= 16, "IQ Width for PRACH cannot be > 16!\n"); - ru_config->compMeth_PRACH = ru_config->iqWidth_PRACH < 16 ? XRAN_COMPMETHOD_BLKFLOAT : XRAN_COMPMETHOD_NONE; + ru_config->compMeth_PRACH = ru_config->iqWidth_PRACH < 16 ? XRAN_COMPMETHOD_BLKFLOAT : XRAN_COMPMETHOD_NONE; // compression method for PRACH AssertFatal(fftSize > 0, "FFT size cannot be 0\n"); - ru_config->fftSize = fftSize; - ru_config->byteOrder = XRAN_NE_BE_BYTE_ORDER; - ru_config->iqOrder = XRAN_I_Q_ORDER; - ru_config->xran_max_frame = 0; + ru_config->fftSize = fftSize; // FFT Size + ru_config->byteOrder = XRAN_NE_BE_BYTE_ORDER; // order of bytes in int16_t in buffer; big or little endian + ru_config->iqOrder = XRAN_I_Q_ORDER; // order of IQs in the buffer + ru_config->xran_max_frame = 0; // max frame number supported; if not specified, default of 1023 is used return true; } @@ -764,14 +749,12 @@ static bool set_maxmin_pd(const paramdef_t *pd, int num, const char *name, uint1 return true; } -extern uint32_t to_nrarfcn(int nr_bandP, uint64_t dl_CarrierFreq, uint8_t scs_index, uint32_t bw); -static bool set_fh_config(int ru_idx, int num_rus, const openair0_config_t *oai0, struct xran_fh_config *fh_config) +static bool set_fh_config(int ru_idx, int num_rus, enum xran_category xran_cat, const openair0_config_t *oai0, struct xran_fh_config *fh_config) { AssertFatal(num_rus == 1 || num_rus == 2, "only support 1 or 2 RUs as of now\n"); AssertFatal(ru_idx < num_rus, "illegal ru_idx %d: must be < %d\n", ru_idx, num_rus); DevAssert(oai0->tx_num_channels > 0 && oai0->rx_num_channels > 0); DevAssert(oai0->tx_bw > 0 && oai0->rx_bw > 0); - //AssertFatal(oai0->tx_num_channels == oai0->rx_num_channels, "cannot handle unequal number of TX/RX channels\n"); DevAssert(oai0->tx_freq[0] > 0); for (int i = 1; i < oai0->tx_num_channels; ++i) DevAssert(oai0->tx_freq[0] == oai0->tx_freq[i]); @@ -782,12 +765,6 @@ static bool set_fh_config(int ru_idx, int num_rus, const openair0_config_t *oai0 DevAssert(oai0->nr_scs_for_raster > 0); AssertFatal(oai0->threequarter_fs == 0, "cannot use three-quarter sampling with O-RAN 7.2 split\n"); - // we simply assume that the loading process provides function to_nrarfcn() - // to calculate the ARFCN numbers from frequency. That is not clean, but the - // best we can do without copy-pasting the function. - uint32_t nDLCenterFreqARFCN = to_nrarfcn(oai0->nr_band, oai0->tx_freq[0], oai0->nr_scs_for_raster, oai0->tx_bw); - uint32_t nULCenterFreqARFCN = to_nrarfcn(oai0->nr_band, oai0->rx_freq[0], oai0->nr_scs_for_raster, oai0->rx_bw); - paramdef_t FHconfigs[] = ORAN_FH_DESC; paramlist_def_t FH_ConfigList = {CONFIG_STRING_ORAN_FH}; char aprefix[MAX_OPTNAME_SIZE] = {0}; @@ -819,30 +796,30 @@ static bool set_fh_config(int ru_idx, int num_rus, const openair0_config_t *oai0 memset(fh_config, 0, sizeof(*fh_config)); - fh_config->dpdk_port = ru_idx; - fh_config->sector_id = 0; - fh_config->nCC = 1; - fh_config->neAxc = oai0->tx_num_channels / num_rus; - fh_config->neAxcUl = oai0->rx_num_channels / num_rus; - fh_config->nAntElmTRx = oai0->tx_num_channels / num_rus; - fh_config->nDLFftSize = 0; - fh_config->nULFftSize = 0; - fh_config->nDLRBs = oai0->num_rb_dl; - fh_config->nULRBs = oai0->num_rb_dl; - fh_config->nDLAbsFrePointA = 0; - fh_config->nULAbsFrePointA = 0; - fh_config->nDLCenterFreqARFCN = nDLCenterFreqARFCN; - fh_config->nULCenterFreqARFCN = nULCenterFreqARFCN; - fh_config->ttiCb = NULL; - fh_config->ttiCbParam = NULL; - fh_config->Tadv_cp_dl = *gpd(fhp, nfh, ORAN_FH_CONFIG_TADV_CP_DL)->uptr; - if (!set_maxmin_pd(fhp, nfh, ORAN_FH_CONFIG_T2A_CP_DL, &fh_config->T2a_min_cp_dl, &fh_config->T2a_max_cp_dl)) + fh_config->dpdk_port = ru_idx; // DPDK port number used for FH + fh_config->sector_id = 0; // Band sector ID for FH; not used in xran + fh_config->nCC = 1; // number of Component carriers supported on FH; M-plane info + fh_config->neAxc = RTE_MAX(oai0->tx_num_channels / num_rus, oai0->rx_num_channels / num_rus); // number of eAxc supported on one CC = max(PDSCH, PUSCH) + fh_config->neAxcUl = 0; // number of eAxc supported on one CC for UL direction = PUSCH; used only if XRAN_CATEGORY_B + fh_config->nAntElmTRx = 0; // number of antenna elements for TX and RX = SRS; used only if XRAN_CATEGORY_B + fh_config->nDLFftSize = 0; // DL FFT size; not used in xran + fh_config->nULFftSize = 0; // UL FFT size; not used in xran + fh_config->nDLRBs = oai0->num_rb_dl; // DL PRB + fh_config->nULRBs = oai0->num_rb_dl; // UL PRB; in xran not used as id = O_DU, but used in oaioran.c/oran-init.c + fh_config->nDLAbsFrePointA = 0; // Abs Freq Point A of the Carrier Center Frequency for in KHz Value; not used in xran + fh_config->nULAbsFrePointA = 0; // Abs Freq Point A of the Carrier Center Frequency for in KHz Value; not used in xran + fh_config->nDLCenterFreqARFCN = 0; // center frequency for DL in NR-ARFCN; not used in xran + fh_config->nULCenterFreqARFCN = 0; // center frequency for UL in NR-ARFCN; not used in xran + fh_config->ttiCb = NULL; // check tti_to_phy_cb(), tx_cp_dl_cb() and tx_cp_ul_cb => first_call + fh_config->ttiCbParam = NULL; // check tti_to_phy_cb(), tx_cp_dl_cb() and tx_cp_ul_cb => first_call + fh_config->Tadv_cp_dl = *gpd(fhp, nfh, ORAN_FH_CONFIG_TADV_CP_DL)->uptr; // not used in xran + if (!set_maxmin_pd(fhp, nfh, ORAN_FH_CONFIG_T2A_CP_DL, &fh_config->T2a_min_cp_dl, &fh_config->T2a_max_cp_dl)) // not used in xran return false; - if (!set_maxmin_pd(fhp, nfh, ORAN_FH_CONFIG_T2A_CP_UL, &fh_config->T2a_min_cp_ul, &fh_config->T2a_max_cp_ul)) + if (!set_maxmin_pd(fhp, nfh, ORAN_FH_CONFIG_T2A_CP_UL, &fh_config->T2a_min_cp_ul, &fh_config->T2a_max_cp_ul)) // not used in xran return false; - if (!set_maxmin_pd(fhp, nfh, ORAN_FH_CONFIG_T2A_UP, &fh_config->T2a_min_up, &fh_config->T2a_max_up)) + if (!set_maxmin_pd(fhp, nfh, ORAN_FH_CONFIG_T2A_UP, &fh_config->T2a_min_up, &fh_config->T2a_max_up)) // not used in xran return false; - if (!set_maxmin_pd(fhp, nfh, ORAN_FH_CONFIG_TA3, &fh_config->Ta3_min, &fh_config->Ta3_max)) + if (!set_maxmin_pd(fhp, nfh, ORAN_FH_CONFIG_TA3, &fh_config->Ta3_min, &fh_config->Ta3_max)) // not used in xran return false; if (!set_maxmin_pd(fhp, nfh, ORAN_FH_CONFIG_T1A_CP_DL, &fh_config->T1a_min_cp_dl, &fh_config->T1a_max_cp_dl)) return false; @@ -852,50 +829,67 @@ static bool set_fh_config(int ru_idx, int num_rus, const openair0_config_t *oai0 return false; if (!set_maxmin_pd(fhp, nfh, ORAN_FH_CONFIG_TA4, &fh_config->Ta4_min, &fh_config->Ta4_max)) return false; - fh_config->enableCP = 1; - fh_config->prachEnable = 1; - fh_config->srsEnable = 0; - fh_config->puschMaskEnable = 0; - fh_config->puschMaskSlot = 0; - fh_config->cp_vlan_tag = *gpd(fhp, nfh, ORAN_FH_CONFIG_CP_VLAN_TAG)->uptr; - fh_config->up_vlan_tag = *gpd(fhp, nfh, ORAN_FH_CONFIG_UP_VLAN_TAG)->uptr; - fh_config->debugStop = 0; - fh_config->debugStopCount = 0; - fh_config->DynamicSectionEna = 0; - fh_config->GPS_Alpha = 0; - fh_config->GPS_Beta = 0; + fh_config->enableCP = 1; // enable C-plane + fh_config->prachEnable = 1; // enable PRACH + fh_config->srsEnable = 0; // enable SRS; used only if XRAN_CATEGORY_B + fh_config->puschMaskEnable = 0; // enable PUSCH mask; only used if id = O_RU + fh_config->puschMaskSlot = 0; // specific which slot PUSCH channel masked; only used if id = O_RU + fh_config->cp_vlan_tag = *gpd(fhp, nfh, ORAN_FH_CONFIG_CP_VLAN_TAG)->uptr; // C-plane VLAN tag; not used in xran; needed for M-plane + fh_config->up_vlan_tag = *gpd(fhp, nfh, ORAN_FH_CONFIG_UP_VLAN_TAG)->uptr; // U-plane VLAN tag; not used in xran; needed for M-plane + fh_config->debugStop = 0; // enable auto stop; not used in xran + fh_config->debugStopCount = 0; // enable auto stop after number of Tx packets; not used in xran + fh_config->DynamicSectionEna = 0; // enable dynamic C-Plane section allocation; not used in xran + fh_config->GPS_Alpha = 0; // refers to alpha as defined in section 9.7.2 of ORAN spec. this value should be alpha*(1/1.2288ns), range 0 - 1e7 (ns); offset_nsec = (pConf->GPS_Beta - offset_sec * 100) * 1e7 + pConf->GPS_Alpha + fh_config->GPS_Beta = 0; // beta value as defined in section 9.7.2 of ORAN spec. range -32767 ~ +32767; offset_sec = pConf->GPS_Beta / 100 - if (!set_fh_prach_config(oai0, prachp, nprach, &fh_config->prach_conf)) - return false; - if (!set_fh_srs_config(&fh_config->srs_conf)) + if (!set_fh_prach_config(oai0, fh_config->neAxc, prachp, nprach, &fh_config->prach_conf)) return false; + /* SRS only used if XRAN_CATEGORY_B + Note: srs_config->eAxC_offset >= prach_config->eAxC_offset + PRACH */ + // fh_config->srs_conf = {0}; if (!set_fh_frame_config(oai0, &fh_config->frame_conf)) return false; - if (!set_fh_ru_config(rup, oai0->split7.fftSize, nru, &fh_config->ru_conf)) + if (!set_fh_ru_config(rup, oai0->split7.fftSize, nru, xran_cat, &fh_config->ru_conf)) return false; - fh_config->bbdev_enc = NULL; - fh_config->bbdev_dec = NULL; - // fh_config->tx_cp_eAxC2Vf [not implemented by fhi_lib] - // fh_config->tx_up_eAxC2Vf [not implemented by fhi_lib] - // fh_config->rx_cp_eAxC2Vf [not implemented by fhi_lib] - // fh_config->rx_up_eAxC2Vf [not implemented by fhi_lib] - fh_config->log_level = 1; - fh_config->max_sections_per_slot = 8; - fh_config->max_sections_per_symbol = 8; + fh_config->bbdev_enc = NULL; // call back to poll BBDev encoder + fh_config->bbdev_dec = NULL; // call back to poll BBDev decoder + + /* CUS specification, section 3.1.3.1.6 + This parameter is an eAxC identifier (eAxC ID) and identifies the specific data flow associated with each + C-Plane (ecpriRtcid) or U-Plane (ecpriPcid) message. + Each of bellow parameters is a matrix [XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR*2 + XRAN_MAX_ANT_ARRAY_ELM_NR] */ + // fh_config->tx_cp_eAxC2Vf // mapping of C-Plane (ecpriRtcid) to VF; not used in xran + // fh_config->tx_up_eAxC2Vf // mapping of U-Plane (ecpriPcid) to VF; not used in xran + // fh_config->rx_cp_eAxC2Vf // mapping of C-Plane (ecpriRtcid) to VF; not used in xran + // fh_config->rx_up_eAxC2Vf // mapping of U-Plane (ecpriPcid) to VF; not used in xran + + fh_config->log_level = 1; // configuration of log level; 1 -> enabled + + /* Parameters that should be retreived via M-plane + O-RU defines them for Section Type 1 (Most DL/UL radio channels) and 3 (PRACH and mixed-numerology channels) + Note: When PRACH having same numerology as other UL channels, Section type 1 can alternatively be used by O-DU for PRACH signaling. + In this case, O-RU is not expected to perform any PRACH specific processing. */ + fh_config->max_sections_per_slot = 0; // not used in xran + fh_config->max_sections_per_symbol = 0; // not used in xran return true; } bool get_xran_config(const openair0_config_t *openair0_cfg, struct xran_fh_init *fh_init, struct xran_fh_config *fh_config) { - if (!set_fh_init(fh_init)) { + /* This xran integration release is only valid for O-RU CAT A. + Therefore, each FH parameter is hardcoded to CAT A. + If you are interested in CAT B, please be aware that parameters of fh_init and fh_config structs must be modified accordingly. */ + enum xran_category xran_cat = XRAN_CATEGORY_A; + + if (!set_fh_init(fh_init, xran_cat)) { printf("could not read FHI 7.2/ORAN config\n"); return false; } for (int32_t o_xu_id = 0; o_xu_id < fh_init->xran_ports; o_xu_id++) { - if (!set_fh_config(o_xu_id, fh_init->xran_ports, openair0_cfg, &fh_config[o_xu_id])) { + if (!set_fh_config(o_xu_id, fh_init->xran_ports, xran_cat, openair0_cfg, &fh_config[o_xu_id])) { printf("could not read FHI 7.2/RU-specific config\n"); return false; } diff --git a/radio/fhi_72/oran-params.h b/radio/fhi_72/oran-params.h index ff8058f9ca..e9de03660c 100644 --- a/radio/fhi_72/oran-params.h +++ b/radio/fhi_72/oran-params.h @@ -31,7 +31,6 @@ #define ORAN_CONFIG_SYSTEM_CORE "system_core" #define ORAN_CONFIG_IO_CORE "io_core" #define ORAN_CONFIG_WORKER_CORES "worker_cores" -#define ORAN_CONFIG_DU_ADDR "du_addr" #define ORAN_CONFIG_RU_ADDR "ru_addr" #define ORAN_CONFIG_MTU "mtu" #define ORAN_CONFIG_FILE_PREFIX "file_prefix" @@ -47,9 +46,8 @@ {ORAN_CONFIG_SYSTEM_CORE, "DPDK control threads core\n", PARAMFLAG_MANDATORY, .iptr=NULL, .defintval=0, TYPE_INT, 0}, \ {ORAN_CONFIG_IO_CORE, "DPDK Core used for IO\n", PARAMFLAG_MANDATORY, .iptr=NULL, .defintval=4, TYPE_INT, 0}, \ {ORAN_CONFIG_WORKER_CORES, "CPU Cores to use for workers\n", PARAMFLAG_MANDATORY, .uptr=NULL, .defintarrayval=NULL,TYPE_UINTARRAY, 0}, \ - {ORAN_CONFIG_DU_ADDR, "Ether addr of DU\n", PARAMFLAG_MANDATORY, .strlistptr=NULL, .defstrlistval=NULL, TYPE_STRINGLIST, 0}, \ {ORAN_CONFIG_RU_ADDR, "Ether addr of RU\n", PARAMFLAG_MANDATORY, .strlistptr=NULL, .defstrlistval=NULL, TYPE_STRINGLIST, 0}, \ - {ORAN_CONFIG_MTU, "MTU of Eth interface\n", PARAMFLAG_MANDATORY, .uptr=NULL, .defuintval=1500, TYPE_UINT, 0}, \ + {ORAN_CONFIG_MTU, "MTU of Eth interface\n", 0, .uptr=NULL, .defuintval=1500, TYPE_UINT, 0}, \ {ORAN_CONFIG_FILE_PREFIX, "DPDK file-prefix\n", 0, .strptr=NULL, .defstrval="wls_0", TYPE_STRING, 0}, \ {ORAN_CONFIG_NETHPERPORT, "number of links per port\n", 0, .uptr=NULL, .defuintval=1, TYPE_UINT, 0}, \ {ORAN_CONFIG_NETHSPEED, "ethernet speed link\n", 0, .uptr=NULL, .defuintval=10, TYPE_UINT, 0}, \ From 306e7538d9cdc32bd38105f00284f334a51abac6 Mon Sep 17 00:00:00 2001 From: Teodora Date: Fri, 15 Nov 2024 15:33:22 +0100 Subject: [PATCH 03/16] Correct Benetel550 config file - match PLMN to CN - correct frequency point A to match desired center frequency - adjust puxch_TargetSNRx10 --- ...sa.band78.273prb.fhi72.4x4-benetel550.conf | 54 +++++++++---------- 1 file changed, 27 insertions(+), 27 deletions(-) diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.273prb.fhi72.4x4-benetel550.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.273prb.fhi72.4x4-benetel550.conf index a8f072a199..7207c8d1a6 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.273prb.fhi72.4x4-benetel550.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.273prb.fhi72.4x4-benetel550.conf @@ -11,20 +11,20 @@ gNBs = // Tracking area code, 0x0000 and 0xfffe are reserved values tracking_area_code = 1; - plmn_list = ({ mcc = 001; mnc = 01; mnc_length = 2; snssaiList = ( { sst = 1; }); }); + plmn_list = ({ mcc = 208; mnc = 99; mnc_length = 2; snssaiList = ( { sst = 1; }); }); nr_cellid = 1; ////////// Physical parameters: - pdsch_AntennaPorts_XP = 2; + pdsch_AntennaPorts_XP = 2; pdsch_AntennaPorts_N1 = 2; maxMIMO_layers = 2; - pusch_AntennaPorts = 4; + pusch_AntennaPorts = 4; do_CSIRS = 1; - do_SRS = 0 ; - sib1_tda = 15; -# force_UL256qam_off = 1; + do_SRS = 0; + sib1_tda = 15; + # force_UL256qam_off = 1; pdcch_ConfigSIB1 = ( { @@ -41,11 +41,12 @@ gNBs = # n_TimingAdvanceOffset = 0; # downlinkConfigCommon #frequencyInfoDL - # this is 3450.72 MHz (center frequency) + # center frequency = 3350.01 MHz + # selected SSB frequency = 3349.92 MHz absoluteFrequencySSB = 623328; dl_frequencyBand = 78; - # this is 3401.58 MHz - dl_absoluteFrequencyPointA = 620052; + # frequency point A = 3300.87 MHz + dl_absoluteFrequencyPointA = 620058; #scs-SpecificCarrierList dl_offstToCarrier = 0; # subcarrierSpacing @@ -157,7 +158,6 @@ gNBs = ssPBCH_BlockPower = 0; } - ); @@ -187,12 +187,12 @@ MACRLCs = ( num_cc = 1; tr_s_preference = "local_L1"; tr_n_preference = "local_RRC"; - pusch_TargetSNRx10 = 230; - pucch_TargetSNRx10 = 250; - dl_bler_target_upper=.35; - dl_bler_target_lower=.15; - ul_bler_target_upper=.35; - ul_bler_target_lower=.15; + pusch_TargetSNRx10 = 180; + pucch_TargetSNRx10 = 220; + dl_bler_target_upper = .35; + dl_bler_target_lower = .15; + ul_bler_target_upper = .35; + ul_bler_target_lower = .15; pusch_FailureThres = 1000; ul_max_mcs = 28; } @@ -218,7 +218,7 @@ RUs = ( local_rf = "no"; nb_tx = 4; nb_rx = 4; - att_tx = 0 + att_tx = 0; att_rx = 0; bands = [78]; max_pdschReferenceSignalPower = -27; @@ -228,7 +228,7 @@ RUs = ( ru_thread_core = 9; sl_ahead = 10; tr_preference = "raw_if4p5"; # important: activate FHI7.2 - do_precoding = 0; # needs to match O-RU configuration + do_precoding = 0; # needs to match O-RU configuration } ); @@ -251,15 +251,15 @@ security = { log_config : { - global_log_level ="info"; - hw_log_level ="info"; - phy_log_level ="info"; - mac_log_level ="info"; - rlc_log_level ="info"; - pdcp_log_level ="info"; - rrc_log_level ="info"; - ngap_log_level ="info"; - f1ap_log_level ="info"; + global_log_level = "info"; + hw_log_level = "info"; + phy_log_level = "info"; + mac_log_level = "info"; + rlc_log_level = "info"; + pdcp_log_level = "info"; + rrc_log_level = "info"; + ngap_log_level = "info"; + f1ap_log_level = "info"; }; fhi_72 = { From 31613ec8bcdc9038ffd4c679fee3652a857523bd Mon Sep 17 00:00:00 2001 From: Teodora Date: Fri, 15 Nov 2024 15:40:52 +0100 Subject: [PATCH 04/16] Correct VVDN config file - add frequency values (center frequency, SSB and point A) - CN interface fixed - adjust puxch_TargetSNRx10, and ru_thread_core --- .../gnb.sa.band77.273prb.fhi72.4x4-vvdn.conf | 52 ++++++++----------- 1 file changed, 21 insertions(+), 31 deletions(-) diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band77.273prb.fhi72.4x4-vvdn.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band77.273prb.fhi72.4x4-vvdn.conf index 254f3cfe90..5d756b9f9b 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band77.273prb.fhi72.4x4-vvdn.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band77.273prb.fhi72.4x4-vvdn.conf @@ -13,18 +13,17 @@ gNBs = tracking_area_code = 1; plmn_list = ({ mcc = 208; mnc = 99; mnc_length = 2; snssaiList = ( { sst = 1; }); }); - //nr_cellid = 12345678L; nr_cellid = 1; ////////// Physical parameters: - pdsch_AntennaPorts_XP = 2; + pdsch_AntennaPorts_XP = 2; pdsch_AntennaPorts_N1 = 2; maxMIMO_layers = 2; - pusch_AntennaPorts = 4; + pusch_AntennaPorts = 4; do_CSIRS = 1; - do_SRS = 0 ; - sib1_tda = 15; + do_SRS = 0; + sib1_tda = 15; pdcch_ConfigSIB1 = ( { @@ -41,10 +40,11 @@ gNBs = # n_TimingAdvanceOffset = 0; # downlinkConfigCommon #frequencyInfoDL - # this is 3450.72 MHz (center frequency) + # center frequency = 3999.36 MHz + # selected SSB frequency = 3999.36 MHz absoluteFrequencySSB = 666624; dl_frequencyBand = 77; - # this is 3401.58 MHz + # frequency point A = 3950.22 MHz dl_absoluteFrequencyPointA = 663348; #scs-SpecificCarrierList dl_offstToCarrier = 0; @@ -157,7 +157,6 @@ gNBs = ssPBCH_BlockPower = 0; } - ); @@ -175,8 +174,8 @@ gNBs = NETWORK_INTERFACES : { - GNB_IPV4_ADDRESS_FOR_NG_AMF = "172.21.16.108/22"; - GNB_IPV4_ADDRESS_FOR_NGU = "172.21.16.108/22"; + GNB_IPV4_ADDRESS_FOR_NG_AMF = "172.21.16.51"; + GNB_IPV4_ADDRESS_FOR_NGU = "172.21.16.51"; GNB_PORT_FOR_S1U = 2152; # Spec 2152 }; } @@ -187,12 +186,12 @@ MACRLCs = ( num_cc = 1; tr_s_preference = "local_L1"; tr_n_preference = "local_RRC"; - pusch_TargetSNRx10 = 300; - pucch_TargetSNRx10 = 200; - # dl_bler_target_upper=.35; - # dl_bler_target_lower=.15; - ul_bler_target_upper=.35; - ul_bler_target_lower=.15; + pusch_TargetSNRx10 = 180; + pucch_TargetSNRx10 = 250; + # dl_bler_target_upper = .35; + # dl_bler_target_lower = .15; + ul_bler_target_upper = .35; + ul_bler_target_lower = .15; pusch_FailureThres = 100; } ); @@ -204,7 +203,7 @@ L1s = ( prach_dtx_threshold = 130 pucch0_dtx_threshold = 80; pusch_dtx_threshold = -100; -#thread_pool_size = 8; + # thread_pool_size = 8; tx_amp_backoff_dB = 3; L1_rx_thread_core = 8; L1_tx_thread_core = 10; @@ -217,30 +216,20 @@ RUs = ( local_rf = "no"; nb_tx = 4; nb_rx = 4; - att_tx = 0 + att_tx = 0; att_rx = 0; bands = [77]; max_pdschReferenceSignalPower = -27; max_rxgain = 75; sf_extension = 0; eNB_instances = [0]; - ru_thread_core = 6; + ru_thread_core = 9; sl_ahead = 5; - clock_src = "internal"; tr_preference = "raw_if4p5"; # important: activate FHI7.2 - do_precoding = 0; # needs to match O-RU configuration + do_precoding = 0; # needs to match O-RU configuration } ); -rfsimulator : -{ - serveraddr = "server"; - serverport = "4043"; - options = (); #("saviq"); or/and "chanmod" - modelname = "AWGN"; - IQfile = "/tmp/rfsimulator.iqs"; -}; - security = { # preferred ciphering algorithms # the first one of the list that an UE supports in chosen @@ -258,7 +247,8 @@ security = { drb_integrity = "no"; }; -log_config : { +log_config : +{ global_log_level = "info"; hw_log_level = "info"; phy_log_level = "info"; From d246520f7735a3ec0fe981b2ffecc4b1ef09205b Mon Sep 17 00:00:00 2001 From: Teodora Date: Thu, 21 Nov 2024 16:49:09 +0100 Subject: [PATCH 05/16] Correct LITEON config file - remove useless whitespaces - add comments for used frequencies --- ...gnb.sa.band78.273prb.fhi72.4x4-liteon.conf | 61 +++++++++---------- 1 file changed, 30 insertions(+), 31 deletions(-) diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.273prb.fhi72.4x4-liteon.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.273prb.fhi72.4x4-liteon.conf index 2cc2cbeee7..427cf1164f 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.273prb.fhi72.4x4-liteon.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.273prb.fhi72.4x4-liteon.conf @@ -17,13 +17,13 @@ gNBs = ////////// Physical parameters: - pdsch_AntennaPorts_XP = 2; + pdsch_AntennaPorts_XP = 2; pdsch_AntennaPorts_N1 = 2; maxMIMO_layers = 2; - pusch_AntennaPorts = 4; + pusch_AntennaPorts = 4; do_CSIRS = 1; - do_SRS = 0 ; - sib1_tda = 15; + do_SRS = 0; + sib1_tda = 15; pdcch_ConfigSIB1 = ( { @@ -40,10 +40,11 @@ gNBs = # n_TimingAdvanceOffset = 0; # downlinkConfigCommon #frequencyInfoDL - # this is 3450.72 MHz (center frequency) + # center frequency = 3450.72 MHz + # selected SSB frequency = 3450.72 MHz absoluteFrequencySSB = 630048; dl_frequencyBand = 78; - # this is 3401.58 MHz + # frequency point A = 3401.58 MHz dl_absoluteFrequencyPointA = 626772; #scs-SpecificCarrierList dl_offstToCarrier = 0; @@ -156,7 +157,6 @@ gNBs = ssPBCH_BlockPower = 0; } - ); @@ -174,8 +174,8 @@ gNBs = NETWORK_INTERFACES : { - GNB_IPV4_ADDRESS_FOR_NG_AMF = "172.21.16.108/22"; - GNB_IPV4_ADDRESS_FOR_NGU = "172.21.16.108/22"; + GNB_IPV4_ADDRESS_FOR_NG_AMF = "172.21.16.51"; + GNB_IPV4_ADDRESS_FOR_NGU = "172.21.16.51"; GNB_PORT_FOR_S1U = 2152; # Spec 2152 }; } @@ -186,12 +186,12 @@ MACRLCs = ( num_cc = 1; tr_s_preference = "local_L1"; tr_n_preference = "local_RRC"; - pusch_TargetSNRx10 = 300; + pusch_TargetSNRx10 = 200; pucch_TargetSNRx10 = 200; - # dl_bler_target_upper=.35; - # dl_bler_target_lower=.15; - ul_bler_target_upper=.35; - ul_bler_target_lower=.15; + # dl_bler_target_upper = .35; + # dl_bler_target_lower = .15; + ul_bler_target_upper = .35; + ul_bler_target_lower = .15; pusch_FailureThres = 100; } ); @@ -215,18 +215,17 @@ RUs = ( local_rf = "no"; nb_tx = 4; nb_rx = 4; - att_tx = 0; # TODO relevant? - att_rx = 0; # TODO relevant? + att_tx = 0; + att_rx = 0; bands = [78]; max_pdschReferenceSignalPower = -27; - max_rxgain = 75; # TODO relevant? - sf_extension = 0; # TODO relevant? - eNB_instances = [0]; # TODO is relevant? - ru_thread_core = 6; + max_rxgain = 75; + sf_extension = 0; + eNB_instances = [0]; + ru_thread_core = 9; sl_ahead = 5; tr_preference = "raw_if4p5"; # important: activate FHI7.2 - do_precoding = 0; # needs to match O-RU configuration - + do_precoding = 0; # needs to match O-RU configuration } ); @@ -249,15 +248,15 @@ security = { log_config : { - global_log_level ="info"; - hw_log_level ="info"; - phy_log_level ="info"; - mac_log_level ="info"; - rlc_log_level ="info"; - pdcp_log_level ="info"; - rrc_log_level ="info"; - ngap_log_level ="info"; - f1ap_log_level ="info"; + global_log_level = "info"; + hw_log_level = "info"; + phy_log_level = "info"; + mac_log_level = "info"; + rlc_log_level = "info"; + pdcp_log_level = "info"; + rrc_log_level = "info"; + ngap_log_level = "info"; + f1ap_log_level = "info"; }; fhi_72 = { From c58ab971afdea4d5ea344a41dd892dc5f9895bb4 Mon Sep 17 00:00:00 2001 From: Teodora Date: Fri, 15 Nov 2024 15:50:02 +0100 Subject: [PATCH 06/16] Update fhi_72 section in config files --- .../gnb.sa.band77.273prb.fhi72.4x4-vvdn.conf | 26 ++++++++---------- ...sa.band78.273prb.fhi72.4x4-benetel550.conf | 9 ++----- ...gnb.sa.band78.273prb.fhi72.4x4-liteon.conf | 27 +++++++++---------- 3 files changed, 25 insertions(+), 37 deletions(-) diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band77.273prb.fhi72.4x4-vvdn.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band77.273prb.fhi72.4x4-vvdn.conf index 5d756b9f9b..2954e6e096 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band77.273prb.fhi72.4x4-vvdn.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band77.273prb.fhi72.4x4-vvdn.conf @@ -261,29 +261,25 @@ log_config : }; fhi_72 = { - dpdk_devices = ("0000:31:06.0", "0000:31:06.1"); + dpdk_devices = ("0000:c1:11.0", "0000:c1:11.1"); # one VF can be used as well system_core = 0; - io_core = 4; + io_core = 1; worker_cores = (2); - du_addr = ("76:76:64:6e:00:01", "76:76:64:6e:00:01"); ru_addr = ("98:ae:71:01:c5:eb", "98:ae:71:01:c5:eb"); - mtu = 9216; # check if xran uses this properly + mtu = 9600; fh_config = ({ Tadv_cp_dl = 125; - T2a_cp_dl = (285, 429); # (min, max) - T2a_cp_ul = (285, 429); # (min, max) - T2a_up = (125, 428); # (min, max) - Ta3 = (130, 170); # (min, max) - T1a_cp_dl = (285, 470); # (min, max) - T1a_cp_ul = (285, 429); # (min, max) - T1a_up = (125, 350); # (min, max) - Ta4 = (110, 180); # (min, max) + T2a_cp_dl = (285, 429); + T2a_cp_ul = (285, 429); + T2a_up = (125, 428); + Ta3 = (130, 170); + T1a_cp_dl = (285, 470); + T1a_cp_ul = (285, 429); + T1a_up = (125, 350); + Ta4 = (110, 180); ru_config = { iq_width = 9; iq_width_prach = 9; }; - prach_config = { - eAxC_offset = 4; - }; }); }; diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.273prb.fhi72.4x4-benetel550.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.273prb.fhi72.4x4-benetel550.conf index 7207c8d1a6..ba96da73ce 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.273prb.fhi72.4x4-benetel550.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.273prb.fhi72.4x4-benetel550.conf @@ -263,14 +263,12 @@ log_config : }; fhi_72 = { - dpdk_devices = ("0000:c1:11.0", "0000:c1:11.1"); + dpdk_devices = ("0000:c1:11.0", "0000:c1:11.1"); # one VF can be used as well system_core = 0; io_core = 1; worker_cores = (2); - du_addr = ("00:11:22:33:44:66", "00:11:22:33:44:67"); ru_addr = ("70:b3:d5:e1:5b:81", "70:b3:d5:e1:5b:81"); - mtu = 9216; - file_prefix = "fhi_72"; + mtu = 9600; fh_config = ({ Tadv_cp_dl = 125; T2a_cp_dl = (259, 500); @@ -285,8 +283,5 @@ fhi_72 = { iq_width = 9; iq_width_prach = 9; }; - prach_config = { - eAxC_offset = 4; - }; }); }; diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.273prb.fhi72.4x4-liteon.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.273prb.fhi72.4x4-liteon.conf index 427cf1164f..f1698391a0 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.273prb.fhi72.4x4-liteon.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.273prb.fhi72.4x4-liteon.conf @@ -260,29 +260,26 @@ log_config : }; fhi_72 = { - dpdk_devices = ("0000:31:06.0", "0000:31:06.1"); + dpdk_devices = ("0000:c1:11.0", "0000:c1:11.1"); # one VF can be used as well system_core = 0; - io_core = 4; + io_core = 1; worker_cores = (2); - du_addr = ("00:11:22:33:44:99", "00:11:22:33:44:99"); ru_addr = ("e8:c7:4f:1e:c7:11", "e8:c7:4f:1e:c7:11"); - mtu = 1500; # check if xran uses this properly fh_config = ({ Tadv_cp_dl = 125; - T2a_cp_dl = (285, 429); # (min, max) - T2a_cp_ul = (285, 429); # (min, max) - T2a_up = (125, 428); # (min, max) - Ta3 = (130, 170); # (min, max) - T1a_cp_dl = (285, 429); # (min, max) - T1a_cp_ul = (285, 429); # (min, max) - T1a_up = (96, 196); # (min, max) - Ta4 = (110, 180); # (min, max) + T2a_cp_dl = (285, 429); + T2a_cp_ul = (285, 429); + T2a_up = (125, 428); + Ta3 = (130, 170); + T1a_cp_dl = (285, 429); + T1a_cp_ul = (285, 429); + T1a_up = (96, 196); + Ta4 = (110, 180); ru_config = { - iq_width = 9; - iq_width_prach = 9; + iq_width = 8; + iq_width_prach = 8; }; prach_config = { - eAxC_offset = 4; kbar = 0; }; }); From cd259132f1a8821d359dc3194aeeb7b811889291 Mon Sep 17 00:00:00 2001 From: Teodora Date: Fri, 15 Nov 2024 16:04:02 +0100 Subject: [PATCH 07/16] Add 4x2 100MHz Benetel550 config file --- ...sa.band78.273prb.fhi72.4x2-benetel550.conf | 285 ++++++++++++++++++ 1 file changed, 285 insertions(+) create mode 100644 targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.273prb.fhi72.4x2-benetel550.conf diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.273prb.fhi72.4x2-benetel550.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.273prb.fhi72.4x2-benetel550.conf new file mode 100644 index 0000000000..2c25a63348 --- /dev/null +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.273prb.fhi72.4x2-benetel550.conf @@ -0,0 +1,285 @@ +Active_gNBs = ( "gNB-OAI"); +# Asn1_verbosity, choice in: none, info, annoying +Asn1_verbosity = "none"; + +gNBs = +( + { + ////////// Identification parameters: + gNB_ID = 0xe00; + gNB_name = "gNB-OAI"; + + // Tracking area code, 0x0000 and 0xfffe are reserved values + tracking_area_code = 1; + plmn_list = ({ mcc = 208; mnc = 99; mnc_length = 2; snssaiList = ( { sst = 1; }); }); + + nr_cellid = 1; + + ////////// Physical parameters: + + pdsch_AntennaPorts_XP = 2; + pusch_AntennaPorts = 2; + do_CSIRS = 1; + do_SRS = 0; + sib1_tda = 15; + # force_UL256qam_off = 1; + + pdcch_ConfigSIB1 = ( + { + controlResourceSetZero = 11; + searchSpaceZero = 0; + } + ); + + servingCellConfigCommon = ( + { + #spCellConfigCommon + + physCellId = 0; + # n_TimingAdvanceOffset = 0; +# downlinkConfigCommon + #frequencyInfoDL + # center frequency = 3350.01 MHz + # selected SSB frequency = 3349.92 MHz + absoluteFrequencySSB = 623328; + dl_frequencyBand = 78; + # frequency point A = 3300.87 MHz + dl_absoluteFrequencyPointA = 620058; + #scs-SpecificCarrierList + dl_offstToCarrier = 0; +# subcarrierSpacing +# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 + dl_subcarrierSpacing = 1; + dl_carrierBandwidth = 273; + #initialDownlinkBWP + #genericParameters + initialDLBWPlocationAndBandwidth = 1099; #38.101-1 Table 5.3.2-1 + # +# subcarrierSpacing +# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 + initialDLBWPsubcarrierSpacing = 1; + #pdcch-ConfigCommon + initialDLBWPcontrolResourceSetZero = 11; + initialDLBWPsearchSpaceZero = 0; + + #uplinkConfigCommon + #frequencyInfoUL + ul_frequencyBand = 78; + #scs-SpecificCarrierList + ul_offstToCarrier = 0; +# subcarrierSpacing +# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 + ul_subcarrierSpacing = 1; + ul_carrierBandwidth = 273; + pMax = 23; + #initialUplinkBWP + #genericParameters + initialULBWPlocationAndBandwidth = 1099; +# subcarrierSpacing +# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 + initialULBWPsubcarrierSpacing = 1; + #rach-ConfigCommon + #rach-ConfigGeneric + prach_ConfigurationIndex = 151; +#prach_msg1_FDM +#0 = one, 1=two, 2=four, 3=eight + prach_msg1_FDM = 0; + prach_msg1_FrequencyStart = 0; + zeroCorrelationZoneConfig = 0; + preambleReceivedTargetPower = -100; +#preamblTransMax (0...10) = (3,4,5,6,7,8,10,20,50,100,200) + preambleTransMax = 8; +#powerRampingStep +# 0=dB0,1=dB2,2=dB4,3=dB6 + powerRampingStep = 3; +#ra_ReponseWindow +#1,2,4,8,10,20,40,80 + ra_ResponseWindow = 5; +#ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR +#1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen + ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 3; +#oneHalf (0..15) 4,8,12,16,...60,64 + ssb_perRACH_OccasionAndCB_PreamblesPerSSB = 15; +#ra_ContentionResolutionTimer +#(0..7) 8,16,24,32,40,48,56,64 + ra_ContentionResolutionTimer = 7; + rsrp_ThresholdSSB = 19; +#prach-RootSequenceIndex_PR +#1 = 839, 2 = 139 + prach_RootSequenceIndex_PR = 2; + prach_RootSequenceIndex = 1; + # SCS for msg1, can only be 15 for 30 kHz < 6 GHz, takes precendence over the one derived from prach-ConfigIndex + # + msg1_SubcarrierSpacing = 1, +# restrictedSetConfig +# 0=unrestricted, 1=restricted type A, 2=restricted type B + restrictedSetConfig = 0, + +# this is the offset between the last PRACH preamble power and the Msg3 PUSCH, 2 times the field value in dB + msg3_DeltaPreamble = 2; + p0_NominalWithGrant = -96; + +# pucch-ConfigCommon setup : +# pucchGroupHopping +# 0 = neither, 1= group hopping, 2=sequence hopping + pucchGroupHopping = 0; + hoppingId = 0; + p0_nominal = -96; + + ssb_PositionsInBurst_Bitmap = 0x1; + +# ssb_periodicityServingCell +# 0 = ms5, 1=ms10, 2=ms20, 3=ms40, 4=ms80, 5=ms160, 6=spare2, 7=spare1 + ssb_periodicityServingCell = 2; + +# dmrs_TypeA_position +# 0 = pos2, 1 = pos3 + dmrs_TypeA_Position = 0; + +# subcarrierSpacing +# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 + subcarrierSpacing = 1; + + + #tdd-UL-DL-ConfigurationCommon +# subcarrierSpacing +# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 + referenceSubcarrierSpacing = 1; + # pattern1 + # dl_UL_TransmissionPeriodicity + # 0=ms0p5, 1=ms0p625, 2=ms1, 3=ms1p25, 4=ms2, 5=ms2p5, 6=ms5, 7=ms10 + dl_UL_TransmissionPeriodicity = 6; + nrofDownlinkSlots = 7; + nrofDownlinkSymbols = 6; + nrofUplinkSlots = 2; + nrofUplinkSymbols = 4; + + ssPBCH_BlockPower = 0; + } + ); + + + # ------- SCTP definitions + SCTP : + { + # Number of streams to use in input/output + SCTP_INSTREAMS = 2; + SCTP_OUTSTREAMS = 2; + }; + + + ////////// AMF parameters: + amf_ip_address = ({ ipv4 = "172.21.6.5"; }); + + NETWORK_INTERFACES : + { + GNB_IPV4_ADDRESS_FOR_NG_AMF = "172.21.16.51"; + GNB_IPV4_ADDRESS_FOR_NGU = "172.21.16.51"; + GNB_PORT_FOR_S1U = 2152; # Spec 2152 + }; + } +); + +MACRLCs = ( +{ + num_cc = 1; + tr_s_preference = "local_L1"; + tr_n_preference = "local_RRC"; + pusch_TargetSNRx10 = 180; + pucch_TargetSNRx10 = 220; + dl_bler_target_upper = .35; + dl_bler_target_lower = .15; + ul_bler_target_upper = .35; + ul_bler_target_lower = .15; + pusch_FailureThres = 1000; + ul_max_mcs = 28; +} +); + +L1s = ( +{ + num_cc = 1; + tr_n_preference = "local_mac"; + prach_dtx_threshold = 100; + pucch0_dtx_threshold = 80; + pusch_dtx_threshold = 10; + max_ldpc_iterations = 15; + tx_amp_backoff_dB = 12; # needs to match O-RU configuration + L1_rx_thread_core = 8; + L1_tx_thread_core = 10; + phase_compensation = 0; # needs to match O-RU configuration +} +); + +RUs = ( +{ + local_rf = "no"; + nb_tx = 4; + nb_rx = 2; + att_tx = 0; + att_rx = 0; + bands = [78]; + max_pdschReferenceSignalPower = -27; + max_rxgain = 75; + sf_extension = 0; + eNB_instances = [0]; + ru_thread_core = 9; + sl_ahead = 10; + tr_preference = "raw_if4p5"; # important: activate FHI7.2 + do_precoding = 0; # needs to match O-RU configuration +} +); + +security = { + # preferred ciphering algorithms + # the first one of the list that an UE supports in chosen + # valid values: nea0, nea1, nea2, nea3 + ciphering_algorithms = ( "nea0" ); + + # preferred integrity algorithms + # the first one of the list that an UE supports in chosen + # valid values: nia0, nia1, nia2, nia3 + integrity_algorithms = ( "nia2", "nia0" ); + + # setting 'drb_ciphering' to "no" disables ciphering for DRBs, no matter + # what 'ciphering_algorithms' configures; same thing for 'drb_integrity' + drb_ciphering = "yes"; + drb_integrity = "no"; +}; + +log_config : +{ + global_log_level = "info"; + hw_log_level = "info"; + phy_log_level = "info"; + mac_log_level = "info"; + rlc_log_level = "info"; + pdcp_log_level = "info"; + rrc_log_level = "info"; + ngap_log_level = "info"; + f1ap_log_level = "info"; +}; + +fhi_72 = { + dpdk_devices = ("0000:c1:11.0", "0000:c1:11.1"); # one VF can be used as well + system_core = 0; + io_core = 1; + worker_cores = (2); + ru_addr = ("70:b3:d5:e1:5b:81", "70:b3:d5:e1:5b:81"); + mtu = 9600; + fh_config = ({ + Tadv_cp_dl = 125; + T2a_cp_dl = (259, 500); + T2a_cp_ul = (25, 500); + T2a_up = (134, 375); + Ta3 = (152, 160); + T1a_cp_dl = (419, 470); + T1a_cp_ul = (285, 336); + T1a_up = (294, 345); + Ta4 = (0, 200); + ru_config = { + iq_width = 9; + iq_width_prach = 9; + }; + }); +}; From 83367ee7ffe9fdde4b6bee5a7f1bf3f67b7a3937 Mon Sep 17 00:00:00 2001 From: Teodora Date: Fri, 15 Nov 2024 16:25:21 +0100 Subject: [PATCH 08/16] Add 2x2 100MHz VVDN config file --- .../gnb.sa.band77.273prb.fhi72.2x2-vvdn.conf | 283 ++++++++++++++++++ 1 file changed, 283 insertions(+) create mode 100644 targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band77.273prb.fhi72.2x2-vvdn.conf diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band77.273prb.fhi72.2x2-vvdn.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band77.273prb.fhi72.2x2-vvdn.conf new file mode 100644 index 0000000000..ab97c214e2 --- /dev/null +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band77.273prb.fhi72.2x2-vvdn.conf @@ -0,0 +1,283 @@ +Active_gNBs = ( "gNB-OAI"); +# Asn1_verbosity, choice in: none, info, annoying +Asn1_verbosity = "none"; + +gNBs = +( + { + ////////// Identification parameters: + gNB_ID = 0xe00; + gNB_name = "gNB-OAI"; + + // Tracking area code, 0x0000 and 0xfffe are reserved values + tracking_area_code = 1; + plmn_list = ({ mcc = 208; mnc = 99; mnc_length = 2; snssaiList = ( { sst = 1; }); }); + + nr_cellid = 1; + + ////////// Physical parameters: + + pdsch_AntennaPorts_XP = 2; + pusch_AntennaPorts = 2; + do_CSIRS = 1; + do_SRS = 0; + sib1_tda = 15; + + pdcch_ConfigSIB1 = ( + { + controlResourceSetZero = 11; + searchSpaceZero = 0; + } + ); + + servingCellConfigCommon = ( + { + #spCellConfigCommon + + physCellId = 0; + # n_TimingAdvanceOffset = 0; +# downlinkConfigCommon + #frequencyInfoDL + # center frequency = 3999.36 MHz + # selected SSB frequency = 3999.36 MHz + absoluteFrequencySSB = 666624; + dl_frequencyBand = 77; + # frequency point A = 3950.22 MHz + dl_absoluteFrequencyPointA = 663348; + #scs-SpecificCarrierList + dl_offstToCarrier = 0; +# subcarrierSpacing +# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 + dl_subcarrierSpacing = 1; + dl_carrierBandwidth = 273; + #initialDownlinkBWP + #genericParameters + initialDLBWPlocationAndBandwidth = 1099; #38.101-1 Table 5.3.2-1 + # +# subcarrierSpacing +# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 + initialDLBWPsubcarrierSpacing = 1; + #pdcch-ConfigCommon + initialDLBWPcontrolResourceSetZero = 11; + initialDLBWPsearchSpaceZero = 0; + + #uplinkConfigCommon + #frequencyInfoUL + ul_frequencyBand = 77; + #scs-SpecificCarrierList + ul_offstToCarrier = 0; +# subcarrierSpacing +# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 + ul_subcarrierSpacing = 1; + ul_carrierBandwidth = 273; + pMax = 23; + #initialUplinkBWP + #genericParameters + initialULBWPlocationAndBandwidth = 1099; +# subcarrierSpacing +# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 + initialULBWPsubcarrierSpacing = 1; + #rach-ConfigCommon + #rach-ConfigGeneric + prach_ConfigurationIndex = 159; +#prach_msg1_FDM +#0 = one, 1=two, 2=four, 3=eight + prach_msg1_FDM = 0; + prach_msg1_FrequencyStart = 0; + zeroCorrelationZoneConfig = 0; + preambleReceivedTargetPower = -100; +#preamblTransMax (0...10) = (3,4,5,6,7,8,10,20,50,100,200) + preambleTransMax = 7; +#powerRampingStep +# 0=dB0,1=dB2,2=dB4,3=dB6 + powerRampingStep = 2; +#ra_ReponseWindow +#1,2,4,8,10,20,40,80 + ra_ResponseWindow = 5; +#ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR +#1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen + ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 3; +#oneHalf (0..15) 4,8,12,16,...60,64 + ssb_perRACH_OccasionAndCB_PreamblesPerSSB = 15; +#ra_ContentionResolutionTimer +#(0..7) 8,16,24,32,40,48,56,64 + ra_ContentionResolutionTimer = 7; + rsrp_ThresholdSSB = 19; +#prach-RootSequenceIndex_PR +#1 = 839, 2 = 139 + prach_RootSequenceIndex_PR = 2; + prach_RootSequenceIndex = 1; + # SCS for msg1, can only be 15 for 30 kHz < 6 GHz, takes precendence over the one derived from prach-ConfigIndex + # + msg1_SubcarrierSpacing = 1, +# restrictedSetConfig +# 0=unrestricted, 1=restricted type A, 2=restricted type B + restrictedSetConfig = 0, + +# this is the offset between the last PRACH preamble power and the Msg3 PUSCH, 2 times the field value in dB + msg3_DeltaPreamble = 2; + p0_NominalWithGrant = -100; + +# pucch-ConfigCommon setup : +# pucchGroupHopping +# 0 = neither, 1= group hopping, 2=sequence hopping + pucchGroupHopping = 0; + hoppingId = 0; + p0_nominal = -96; + + ssb_PositionsInBurst_Bitmap = 0x1; + +# ssb_periodicityServingCell +# 0 = ms5, 1=ms10, 2=ms20, 3=ms40, 4=ms80, 5=ms160, 6=spare2, 7=spare1 + ssb_periodicityServingCell = 2; + +# dmrs_TypeA_position +# 0 = pos2, 1 = pos3 + dmrs_TypeA_Position = 0; + +# subcarrierSpacing +# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 + subcarrierSpacing = 1; + + + #tdd-UL-DL-ConfigurationCommon +# subcarrierSpacing +# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 + referenceSubcarrierSpacing = 1; + # pattern1 + # dl_UL_TransmissionPeriodicity + # 0=ms0p5, 1=ms0p625, 2=ms1, 3=ms1p25, 4=ms2, 5=ms2p5, 6=ms5, 7=ms10 + dl_UL_TransmissionPeriodicity = 5; + nrofDownlinkSlots = 3; + nrofDownlinkSymbols = 6; + nrofUplinkSlots = 1; + nrofUplinkSymbols = 4; + + ssPBCH_BlockPower = 0; + } + ); + + + # ------- SCTP definitions + SCTP : + { + # Number of streams to use in input/output + SCTP_INSTREAMS = 2; + SCTP_OUTSTREAMS = 2; + }; + + + ////////// AMF parameters: + amf_ip_address = ({ ipv4 = "172.21.6.5"; }); + + NETWORK_INTERFACES : + { + GNB_IPV4_ADDRESS_FOR_NG_AMF = "172.21.16.51"; + GNB_IPV4_ADDRESS_FOR_NGU = "172.21.16.51"; + GNB_PORT_FOR_S1U = 2152; # Spec 2152 + }; + } +); + +MACRLCs = ( +{ + num_cc = 1; + tr_s_preference = "local_L1"; + tr_n_preference = "local_RRC"; + pusch_TargetSNRx10 = 180; + pucch_TargetSNRx10 = 250; + # dl_bler_target_upper = .35; + # dl_bler_target_lower = .15; + ul_bler_target_upper = .35; + ul_bler_target_lower = .15; + pusch_FailureThres = 100; +} +); + +L1s = ( +{ + num_cc = 1; + tr_n_preference = "local_mac"; + prach_dtx_threshold = 130 + pucch0_dtx_threshold = 80; + pusch_dtx_threshold = -100; + # thread_pool_size = 8; + tx_amp_backoff_dB = 3; + L1_rx_thread_core = 8; + L1_tx_thread_core = 10; + phase_compensation = 0; # needs to match O-RU configuration +} +); + +RUs = ( +{ + local_rf = "no"; + nb_tx = 2; + nb_rx = 2; + att_tx = 0; + att_rx = 0; + bands = [77]; + max_pdschReferenceSignalPower = -27; + max_rxgain = 75; + sf_extension = 0; + eNB_instances = [0]; + ru_thread_core = 9; + sl_ahead = 5; + tr_preference = "raw_if4p5"; # important: activate FHI7.2 + do_precoding = 0; # needs to match O-RU configuration +} +); + +security = { + # preferred ciphering algorithms + # the first one of the list that an UE supports in chosen + # valid values: nea0, nea1, nea2, nea3 + ciphering_algorithms = ( "nea0" ); + + # preferred integrity algorithms + # the first one of the list that an UE supports in chosen + # valid values: nia0, nia1, nia2, nia3 + integrity_algorithms = ( "nia2", "nia0" ); + + # setting 'drb_ciphering' to "no" disables ciphering for DRBs, no matter + # what 'ciphering_algorithms' configures; same thing for 'drb_integrity' + drb_ciphering = "yes"; + drb_integrity = "no"; +}; + +log_config : +{ + global_log_level = "info"; + hw_log_level = "info"; + phy_log_level = "info"; + mac_log_level = "info"; + rlc_log_level = "info"; + pdcp_log_level = "info"; + rrc_log_level = "info"; + ngap_log_level = "info"; + f1ap_log_level = "info"; +}; + +fhi_72 = { + dpdk_devices = ("0000:c1:11.0", "0000:c1:11.1"); # one VF can be used as well + system_core = 0; + io_core = 1; + worker_cores = (2); + ru_addr = ("98:ae:71:01:c5:eb", "98:ae:71:01:c5:eb"); + mtu = 9600; + fh_config = ({ + Tadv_cp_dl = 125; + T2a_cp_dl = (285, 429); + T2a_cp_ul = (285, 429); + T2a_up = (125, 428); + Ta3 = (130, 170); + T1a_cp_dl = (285, 470); + T1a_cp_ul = (285, 429); + T1a_up = (125, 350); + Ta4 = (110, 180); + ru_config = { + iq_width = 16; + iq_width_prach = 16; + }; + }); +}; From 6dfa051ecd4d43b6498dbc2f11f2437fb4a2b9be Mon Sep 17 00:00:00 2001 From: Teodora Date: Fri, 15 Nov 2024 16:47:32 +0100 Subject: [PATCH 09/16] Add 4x4 40MHz VVDN config file --- .../gnb.sa.band77.106prb.fhi72.4x4-vvdn.conf | 286 ++++++++++++++++++ 1 file changed, 286 insertions(+) create mode 100644 targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band77.106prb.fhi72.4x4-vvdn.conf diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band77.106prb.fhi72.4x4-vvdn.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band77.106prb.fhi72.4x4-vvdn.conf new file mode 100644 index 0000000000..8f9d6460c7 --- /dev/null +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band77.106prb.fhi72.4x4-vvdn.conf @@ -0,0 +1,286 @@ +Active_gNBs = ( "gNB-OAI"); +# Asn1_verbosity, choice in: none, info, annoying +Asn1_verbosity = "none"; + +gNBs = +( + { + ////////// Identification parameters: + gNB_ID = 0xe00; + gNB_name = "gNB-OAI"; + + // Tracking area code, 0x0000 and 0xfffe are reserved values + tracking_area_code = 1; + plmn_list = ({ mcc = 208; mnc = 99; mnc_length = 2; snssaiList = ( { sst = 1; }); }); + + nr_cellid = 1; + + ////////// Physical parameters: + + pdsch_AntennaPorts_XP = 2; + pdsch_AntennaPorts_N1 = 2; + maxMIMO_layers = 2; + pusch_AntennaPorts = 4; + do_CSIRS = 1; + do_SRS = 0; + sib1_tda = 15; + + pdcch_ConfigSIB1 = ( + { + controlResourceSetZero = 11; + searchSpaceZero = 0; + } + ); + + servingCellConfigCommon = ( + { + #spCellConfigCommon + + physCellId = 0; + # n_TimingAdvanceOffset = 0; +# downlinkConfigCommon + #frequencyInfoDL + # center frequency = 3999.36 MHz + # selected SSB frequency = 3999.36 MHz + absoluteFrequencySSB = 666624; + dl_frequencyBand = 77; + # frequency point A = 3980.28 MHz + dl_absoluteFrequencyPointA = 665352; + #scs-SpecificCarrierList + dl_offstToCarrier = 0; +# subcarrierSpacing +# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 + dl_subcarrierSpacing = 1; + dl_carrierBandwidth = 106; + #initialDownlinkBWP + #genericParameters + initialDLBWPlocationAndBandwidth = 28875; #38.101-1 Table 5.3.2-1 + # +# subcarrierSpacing +# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 + initialDLBWPsubcarrierSpacing = 1; + #pdcch-ConfigCommon + initialDLBWPcontrolResourceSetZero = 11; + initialDLBWPsearchSpaceZero = 0; + + #uplinkConfigCommon + #frequencyInfoUL + ul_frequencyBand = 77; + #scs-SpecificCarrierList + ul_offstToCarrier = 0; +# subcarrierSpacing +# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 + ul_subcarrierSpacing = 1; + ul_carrierBandwidth = 106; + pMax = 23; + #initialUplinkBWP + #genericParameters + initialULBWPlocationAndBandwidth = 28875; +# subcarrierSpacing +# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 + initialULBWPsubcarrierSpacing = 1; + #rach-ConfigCommon + #rach-ConfigGeneric + prach_ConfigurationIndex = 159; +#prach_msg1_FDM +#0 = one, 1=two, 2=four, 3=eight + prach_msg1_FDM = 0; + prach_msg1_FrequencyStart = 0; + zeroCorrelationZoneConfig = 0; + preambleReceivedTargetPower = -100; +#preamblTransMax (0...10) = (3,4,5,6,7,8,10,20,50,100,200) + preambleTransMax = 7; +#powerRampingStep +# 0=dB0,1=dB2,2=dB4,3=dB6 + powerRampingStep = 2; +#ra_ReponseWindow +#1,2,4,8,10,20,40,80 + ra_ResponseWindow = 5; +#ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR +#1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen + ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 3; +#oneHalf (0..15) 4,8,12,16,...60,64 + ssb_perRACH_OccasionAndCB_PreamblesPerSSB = 15; +#ra_ContentionResolutionTimer +#(0..7) 8,16,24,32,40,48,56,64 + ra_ContentionResolutionTimer = 7; + rsrp_ThresholdSSB = 19; +#prach-RootSequenceIndex_PR +#1 = 839, 2 = 139 + prach_RootSequenceIndex_PR = 2; + prach_RootSequenceIndex = 1; + # SCS for msg1, can only be 15 for 30 kHz < 6 GHz, takes precendence over the one derived from prach-ConfigIndex + # + msg1_SubcarrierSpacing = 1, +# restrictedSetConfig +# 0=unrestricted, 1=restricted type A, 2=restricted type B + restrictedSetConfig = 0, + +# this is the offset between the last PRACH preamble power and the Msg3 PUSCH, 2 times the field value in dB + msg3_DeltaPreamble = 2; + p0_NominalWithGrant = -100; + +# pucch-ConfigCommon setup : +# pucchGroupHopping +# 0 = neither, 1= group hopping, 2=sequence hopping + pucchGroupHopping = 0; + hoppingId = 0; + p0_nominal = -96; + + ssb_PositionsInBurst_Bitmap = 0x1; + +# ssb_periodicityServingCell +# 0 = ms5, 1=ms10, 2=ms20, 3=ms40, 4=ms80, 5=ms160, 6=spare2, 7=spare1 + ssb_periodicityServingCell = 2; + +# dmrs_TypeA_position +# 0 = pos2, 1 = pos3 + dmrs_TypeA_Position = 0; + +# subcarrierSpacing +# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 + subcarrierSpacing = 1; + + + #tdd-UL-DL-ConfigurationCommon +# subcarrierSpacing +# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 + referenceSubcarrierSpacing = 1; + # pattern1 + # dl_UL_TransmissionPeriodicity + # 0=ms0p5, 1=ms0p625, 2=ms1, 3=ms1p25, 4=ms2, 5=ms2p5, 6=ms5, 7=ms10 + dl_UL_TransmissionPeriodicity = 5; + nrofDownlinkSlots = 3; + nrofDownlinkSymbols = 6; + nrofUplinkSlots = 1; + nrofUplinkSymbols = 4; + + ssPBCH_BlockPower = 0; + } + + ); + + + # ------- SCTP definitions + SCTP : + { + # Number of streams to use in input/output + SCTP_INSTREAMS = 2; + SCTP_OUTSTREAMS = 2; + }; + + + ////////// AMF parameters: + amf_ip_address = ({ ipv4 = "172.21.6.5"; }); + + NETWORK_INTERFACES : + { + GNB_IPV4_ADDRESS_FOR_NG_AMF = "172.21.16.51"; + GNB_IPV4_ADDRESS_FOR_NGU = "172.21.16.51"; + GNB_PORT_FOR_S1U = 2152; # Spec 2152 + }; + } +); + +MACRLCs = ( +{ + num_cc = 1; + tr_s_preference = "local_L1"; + tr_n_preference = "local_RRC"; + pusch_TargetSNRx10 = 200; + pucch_TargetSNRx10 = 200; + # dl_bler_target_upper = .35; + # dl_bler_target_lower = .15; + ul_bler_target_upper = .35; + ul_bler_target_lower = .15; + pusch_FailureThres = 100; +} +); + +L1s = ( +{ + num_cc = 1; + tr_n_preference = "local_mac"; + prach_dtx_threshold = 110; + pucch0_dtx_threshold = 80; + pusch_dtx_threshold = -100; + # thread_pool_size = 8; + tx_amp_backoff_dB = 3; + L1_rx_thread_core = 8; + L1_tx_thread_core = 10; + phase_compensation = 0; # needs to match O-RU configuration +} +); + +RUs = ( +{ + local_rf = "no"; + nb_tx = 4; + nb_rx = 4; + att_tx = 0; + att_rx = 0; + bands = [77]; + max_pdschReferenceSignalPower = -27; + max_rxgain = 75; + sf_extension = 0; + eNB_instances = [0]; + ru_thread_core = 9; + sl_ahead = 5; + tr_preference = "raw_if4p5"; # important: activate FHI7.2 + do_precoding = 0; # needs to match O-RU configuration +} +); + +security = { + # preferred ciphering algorithms + # the first one of the list that an UE supports in chosen + # valid values: nea0, nea1, nea2, nea3 + ciphering_algorithms = ( "nea0" ); + + # preferred integrity algorithms + # the first one of the list that an UE supports in chosen + # valid values: nia0, nia1, nia2, nia3 + integrity_algorithms = ( "nia2", "nia0" ); + + # setting 'drb_ciphering' to "no" disables ciphering for DRBs, no matter + # what 'ciphering_algorithms' configures; same thing for 'drb_integrity' + drb_ciphering = "yes"; + drb_integrity = "no"; +}; + +log_config : +{ + global_log_level = "info"; + hw_log_level = "info"; + phy_log_level = "info"; + mac_log_level = "info"; + rlc_log_level = "info"; + pdcp_log_level = "info"; + rrc_log_level = "info"; + ngap_log_level = "info"; + f1ap_log_level = "info"; +}; + +fhi_72 = { + dpdk_devices = ("0000:c1:11.0", "0000:c1:11.1"); # one VF can be used as well + system_core = 0; + io_core = 1; + worker_cores = (2); + ru_addr = ("98:ae:71:01:c5:eb", "98:ae:71:01:c5:eb"); + mtu = 9600; + fh_config = ({ + Tadv_cp_dl = 125; + T2a_cp_dl = (285, 429); + T2a_cp_ul = (285, 429); + T2a_up = (125, 428); + Ta3 = (130, 170); + T1a_cp_dl = (285, 470); + T1a_cp_ul = (285, 429); + T1a_up = (125, 350); + Ta4 = (110, 180); + ru_config = { + iq_width = 9; + iq_width_prach = 9; + }; + }); +}; From c2d169094f506d6bea2d2d1a4b059dab1626cd10 Mon Sep 17 00:00:00 2001 From: Teodora Date: Tue, 19 Nov 2024 16:39:14 +0100 Subject: [PATCH 10/16] Add 4x4 100MHz Metanoia config file --- ...b.sa.band78.273prb.fhi72.4x4-metanoia.conf | 269 ++++++++++++++++++ 1 file changed, 269 insertions(+) create mode 100644 targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.273prb.fhi72.4x4-metanoia.conf diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.273prb.fhi72.4x4-metanoia.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.273prb.fhi72.4x4-metanoia.conf new file mode 100644 index 0000000000..cf3e429709 --- /dev/null +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.273prb.fhi72.4x4-metanoia.conf @@ -0,0 +1,269 @@ +Active_gNBs = ( "oai-du"); +# Asn1_verbosity, choice in: none, info, annoying +Asn1_verbosity = "none"; +gNBs = +( + { + ////////// Identification parameters: + gNB_ID = 0xe00; + gNB_name = "oai-du"; + // Tracking area code, 0x0000 and 0xfffe are reserved values + tracking_area_code = 1; + plmn_list = ({ mcc = 208; mnc = 99; mnc_length = 2; snssaiList = ( { sst = 1; }); }); + + nr_cellid = 1; + + ////////// Physical parameters: + pdsch_AntennaPorts_XP = 2; + pusch_AntennaPorts = 4; + pdsch_AntennaPorts_N1 = 2; + maxMIMO_layers = 4; + do_CSIRS = 1; + do_SRS = 0; + force_UL256qam_off = 1; + # sib1_tda = 15; + + pdcch_ConfigSIB1 = ( + { + controlResourceSetZero = 12; + searchSpaceZero = 0; + } + ); + servingCellConfigCommon = ( + { + #spCellConfigCommon + physCellId = 0; +# downlinkConfigCommon + #frequencyInfoDL + # center frequency = 3750 MHz + # selected SSB frequency = 3748.8 MHz + absoluteFrequencySSB = 649920; + dl_frequencyBand = 78; + # frequency point A = 3700.86 MHz + dl_absoluteFrequencyPointA = 646724; + #scs-SpecificCarrierList + dl_offstToCarrier = 0; +# subcarrierSpacing +# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 + dl_subcarrierSpacing = 1; + dl_carrierBandwidth = 273; + #initialDownlinkBWP + #genericParameters + # this is RBstart=0,L=162 (275*(275-L+1))+(274-RBstart)) + initialDLBWPlocationAndBandwidth = 1099; + # +# subcarrierSpacing +# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 + initialDLBWPsubcarrierSpacing = 1; + #pdcch-ConfigCommon + initialDLBWPcontrolResourceSetZero = 12; + initialDLBWPsearchSpaceZero = 0; + #uplinkConfigCommon + #frequencyInfoUL + ul_frequencyBand = 78; + #scs-SpecificCarrierList + ul_offstToCarrier = 0; +# subcarrierSpacing +# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 + ul_subcarrierSpacing = 1; + ul_carrierBandwidth = 273; + pMax = 20; + #initialUplinkBWP + #genericParameters + initialULBWPlocationAndBandwidth = 1099; +# subcarrierSpacing +# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 + initialULBWPsubcarrierSpacing = 1; + #rach-ConfigCommon + #rach-ConfigGeneric + prach_ConfigurationIndex = 151; +#prach_msg1_FDM +#0 = one, 1=two, 2=four, 3=eight + prach_msg1_FDM = 0; + prach_msg1_FrequencyStart = 0; + zeroCorrelationZoneConfig = 12; + preambleReceivedTargetPower = -96; +#preamblTransMax (0...10) = (3,4,5,6,7,8,10,20,50,100,200) + preambleTransMax = 6; +#powerRampingStep +# 0=dB0,1=dB2,2=dB4,3=dB6 + powerRampingStep = 1; +#ra_ReponseWindow +#1,2,4,8,10,20,40,80 + ra_ResponseWindow = 5; +#ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR +#1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen + ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 3; +#oneHalf (0..15) 4,8,12,16,...60,64 + ssb_perRACH_OccasionAndCB_PreamblesPerSSB = 15; +#ra_ContentionResolutionTimer +#(0..7) 8,16,24,32,40,48,56,64 + ra_ContentionResolutionTimer = 7; + rsrp_ThresholdSSB = 19; +#prach-RootSequenceIndex_PR +#1 = 839, 2 = 139 + prach_RootSequenceIndex_PR = 2; + prach_RootSequenceIndex = 1; + # SCS for msg1, can only be 15 for 30 kHz < 6 GHz, takes precendence over the one derived from prach-ConfigIndex + # + msg1_SubcarrierSpacing = 1, +# restrictedSetConfig +# 0=unrestricted, 1=restricted type A, 2=restricted type B + restrictedSetConfig = 0, + msg3_DeltaPreamble = 1; + p0_NominalWithGrant = -90; +# pucch-ConfigCommon setup : +# pucchGroupHopping +# 0 = neither, 1= group hopping, 2=sequence hopping + pucchGroupHopping = 0; + hoppingId = 40; + p0_nominal = -90; +# ssb_PositionsInBurs_BitmapPR +# 1=short, 2=medium, 3=long + ssb_PositionsInBurst_PR = 2; + ssb_PositionsInBurst_Bitmap = 1; +# ssb_periodicityServingCell +# 0 = ms5, 1=ms10, 2=ms20, 3=ms40, 4=ms80, 5=ms160, 6=spare2, 7=spare1 + ssb_periodicityServingCell = 2; +# dmrs_TypeA_position +# 0 = pos2, 1 = pos3 + dmrs_TypeA_Position = 0; +# subcarrierSpacing +# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 + subcarrierSpacing = 1; + #tdd-UL-DL-ConfigurationCommon +# subcarrierSpacing +# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 + referenceSubcarrierSpacing = 1; + # pattern1 + # dl_UL_TransmissionPeriodicity + # 0=ms0p5, 1=ms0p625, 2=ms1, 3=ms1p25, 4=ms2, 5=ms2p5, 6=ms5, 7=ms10 + dl_UL_TransmissionPeriodicity = 5; #6; + nrofDownlinkSlots = 3; #7; + nrofDownlinkSymbols = 6; + nrofUplinkSlots = 1; #2; + nrofUplinkSymbols = 4; + ssPBCH_BlockPower = -10; + } + ); + # ------- SCTP definitions + SCTP : + { + # Number of streams to use in input/output + SCTP_INSTREAMS = 2; + SCTP_OUTSTREAMS = 2; + }; + + ////////// AMF parameters: + amf_ip_address = ({ ipv4 = "172.21.6.5"; }); + + NETWORK_INTERFACES : + { + GNB_IPV4_ADDRESS_FOR_NG_AMF = "172.21.16.51"; + GNB_IPV4_ADDRESS_FOR_NGU = "172.21.16.51"; + GNB_PORT_FOR_S1U = 2152; # Spec 2152 + }; + } +); + +MACRLCs = ( +{ + num_cc = 1; + tr_s_preference = "local_L1"; + tr_n_preference = "local_RRC"; + pusch_TargetSNRx10 = 220; + pucch_TargetSNRx10 = 220; + ul_bler_target_upper = .35; + ul_bler_target_lower = .15; + pusch_FailureThres = 100; + ul_max_mcs = 28; +} +); + +L1s = ( +{ + num_cc = 1; + tr_n_preference = "local_mac"; + prach_dtx_threshold = 130; + pucch0_dtx_threshold = 80; + pusch_dtx_threshold = 10; + max_ldpc_iterations = 15; + tx_amp_backoff_dB = 12; # needs to match O-RU configuration + L1_rx_thread_core = 8; + L1_tx_thread_core = 10; # relevant after merge of l1_tx_thread + phase_compensation = 0; # needs to match O-RU configuration +} +); + +RUs = ( +{ + local_rf = "no"; + nb_tx = 4; + nb_rx = 4; + att_tx = 0; + att_rx = 0; + bands = [78]; + max_pdschReferenceSignalPower = -27; + max_rxgain = 75; + sf_extension = 0; + eNB_instances = [0]; + ru_thread_core = 9; + sl_ahead = 10; + tr_preference = "raw_if4p5"; # important: activate FHI7.2 + do_precoding = 0; # needs to match O-RU configuration +} +); + +security = { + # preferred ciphering algorithms + # the first one of the list that an UE supports in chosen + # valid values: nea0, nea1, nea2, nea3 + ciphering_algorithms = ( "nea0" ); + + # preferred integrity algorithms + # the first one of the list that an UE supports in chosen + # valid values: nia0, nia1, nia2, nia3 + integrity_algorithms = ( "nia2", "nia0" ); + + # setting 'drb_ciphering' to "no" disables ciphering for DRBs, no matter + # what 'ciphering_algorithms' configures; same thing for 'drb_integrity' + drb_ciphering = "yes"; + drb_integrity = "no"; +}; + +log_config : +{ + global_log_level = "info"; + hw_log_level = "info"; + phy_log_level = "info"; + mac_log_level = "info"; + rlc_log_level = "info"; + pdcp_log_level = "info"; + rrc_log_level = "info"; + ngap_log_level = "info"; + f1ap_log_level = "info"; +}; + +fhi_72 = { + dpdk_devices = ("0000:c1:11.0", "0000:c1:11.1"); # one VF can be used as well + system_core = 0; + io_core = 1; + worker_cores = (2); + ru_addr = ("00:e0:0c:00:ae:06", "00:e0:0c:00:ae:06"); + mtu = 9000; + fh_config = ({ + Tadv_cp_dl = 125; + T2a_cp_dl = (285, 429); + T2a_cp_ul = (285, 429); + T2a_up = (125, 428); + Ta3 = (130, 170); + T1a_cp_dl = (285, 470); + T1a_cp_ul = (285, 429); + T1a_up = (125, 350); + Ta4 = (110, 180); + ru_config = { + iq_width = 9; + iq_width_prach = 9; + }; + }); +}; From 1121d86e76ca5c807d3ef65743e0dc8bf75b3927 Mon Sep 17 00:00:00 2001 From: Teodora Date: Mon, 18 Nov 2024 21:29:07 +0100 Subject: [PATCH 11/16] Change 4x4 100MHz Benetel 650 config file --- ...a.band77.273prb.fhi72.4x4-benetel650.conf} | 126 ++++++++---------- 1 file changed, 52 insertions(+), 74 deletions(-) rename targets/PROJECTS/GENERIC-NR-5GC/CONF/{gnb.sa.band78.273prb.fhi72.4x4-benetel650.conf => gnb-du.sa.band77.273prb.fhi72.4x4-benetel650.conf} (76%) diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.273prb.fhi72.4x4-benetel650.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb-du.sa.band77.273prb.fhi72.4x4-benetel650.conf similarity index 76% rename from targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.273prb.fhi72.4x4-benetel650.conf rename to targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb-du.sa.band77.273prb.fhi72.4x4-benetel650.conf index 767c551881..5072dc32bb 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.273prb.fhi72.4x4-benetel650.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb-du.sa.band77.273prb.fhi72.4x4-benetel650.conf @@ -1,4 +1,4 @@ -Active_gNBs = ( "gNB-OAI"); +Active_gNBs = ( "gNB-OAI-DU"); # Asn1_verbosity, choice in: none, info, annoying Asn1_verbosity = "none"; @@ -7,24 +7,25 @@ gNBs = { ////////// Identification parameters: gNB_ID = 0xe00; - gNB_name = "gNB-OAI"; + gNB_DU_ID = 0xe00; + gNB_name = "gNB-OAI-DU"; // Tracking area code, 0x0000 and 0xfffe are reserved values tracking_area_code = 1; - plmn_list = ({ mcc = 208; mnc = 99; mnc_length = 2; snssaiList = ( { sst = 1;}); }); + plmn_list = ({ mcc = 208; mnc = 99; mnc_length = 2; snssaiList = ( { sst = 1; }); }); nr_cellid = 1; ////////// Physical parameters: - pdsch_AntennaPorts_XP = 2; + pdsch_AntennaPorts_XP = 2; pdsch_AntennaPorts_N1 = 2; - maxMIMO_layers = 2; pusch_AntennaPorts = 4; do_CSIRS = 1; - do_SRS = 0 ; - sib1_tda = 15; - #force_UL256qam_off = 1; + do_SRS = 0; + sib1_tda = 15; + force_UL256qam_off = 1; + # maxMIMO_layers = 2; pdcch_ConfigSIB1 = ( { @@ -41,11 +42,12 @@ gNBs = # n_TimingAdvanceOffset = 0; # downlinkConfigCommon #frequencyInfoDL - # this is 3450.72 MHz (center frequency) - absoluteFrequencySSB = 623328; - dl_frequencyBand = 78; - # this is 3401.58 MHz - dl_absoluteFrequencyPointA = 620052; + # center frequency = 3950.4 MHz + # selected SSB frequency = 3950.4 MHz + absoluteFrequencySSB = 663360; + dl_frequencyBand = 77; + # frequency point A = 3901.26 MHz + dl_absoluteFrequencyPointA = 660084; #scs-SpecificCarrierList dl_offstToCarrier = 0; # subcarrierSpacing @@ -65,7 +67,7 @@ gNBs = #uplinkConfigCommon #frequencyInfoUL - ul_frequencyBand = 78; + ul_frequencyBand = 77; #scs-SpecificCarrierList ul_offstToCarrier = 0; # subcarrierSpacing @@ -149,17 +151,18 @@ gNBs = # pattern1 # dl_UL_TransmissionPeriodicity # 0=ms0p5, 1=ms0p625, 2=ms1, 3=ms1p25, 4=ms2, 5=ms2p5, 6=ms5, 7=ms10 - dl_UL_TransmissionPeriodicity = 6; - nrofDownlinkSlots = 7; + dl_UL_TransmissionPeriodicity = 5; + nrofDownlinkSlots = 3; nrofDownlinkSymbols = 6; - nrofUplinkSlots = 2; + nrofUplinkSlots = 1; nrofUplinkSymbols = 4; - ssPBCH_BlockPower = 10; + ssPBCH_BlockPower = 5; } ); + # ------- SCTP definitions SCTP : { @@ -167,17 +170,6 @@ gNBs = SCTP_INSTREAMS = 2; SCTP_OUTSTREAMS = 2; }; - - - ////////// AMF parameters: - amf_ip_address = ({ ipv4 = "172.21.6.5"; }); - - NETWORK_INTERFACES : - { - GNB_IPV4_ADDRESS_FOR_NG_AMF = "172.21.16.51"; - GNB_IPV4_ADDRESS_FOR_NGU = "172.21.16.51"; - GNB_PORT_FOR_S1U = 2152; # Spec 2152 - }; } ); @@ -186,18 +178,26 @@ MACRLCs = ( { num_cc = 1; tr_s_preference = "local_L1"; - tr_n_preference = "local_RRC"; - pusch_TargetSNRx10 = 230; + tr_n_preference = "f1"; + local_n_if_name = "enp193s0f0"; + local_n_address = "172.21.16.51"; + remote_n_address = "172.21.6.90"; + local_n_portc = 500; + local_n_portd = 2153; + remote_n_portc = 501; + remote_n_portd = 2153; + pusch_TargetSNRx10 = 170; pucch_TargetSNRx10 = 230; - dl_bler_target_upper=.35; - dl_bler_target_lower=.15; - ul_bler_target_upper=.35; - ul_bler_target_lower=.15; + dl_bler_target_upper = .35; + dl_bler_target_lower = .15; + ul_bler_target_upper = .35; + ul_bler_target_lower = .15; pusch_FailureThres = 100; + ul_max_mcs = 28; + min_grant_prb = 1; } ); - L1s = ( { num_cc = 1; @@ -218,59 +218,40 @@ RUs = ( local_rf = "no"; nb_tx = 4; nb_rx = 4; - att_tx = 0 + att_tx = 0; att_rx = 0; - bands = [78]; + bands = [77]; max_pdschReferenceSignalPower = -27; max_rxgain = 75; sf_extension = 0; eNB_instances = [0]; ru_thread_core = 9; - sl_ahead = 10; + sl_ahead = 5; tr_preference = "raw_if4p5"; # important: activate FHI7.2 - do_precoding = 0; # needs to match O-RU configuration + do_precoding = 0; # needs to match O-RU configuration } ); -security = { - # preferred ciphering algorithms - # the first one of the list that an UE supports in chosen - # valid values: nea0, nea1, nea2, nea3 - ciphering_algorithms = ( "nea0" ); - - # preferred integrity algorithms - # the first one of the list that an UE supports in chosen - # valid values: nia0, nia1, nia2, nia3 - integrity_algorithms = ( "nia2", "nia0" ); - - # setting 'drb_ciphering' to "no" disables ciphering for DRBs, no matter - # what 'ciphering_algorithms' configures; same thing for 'drb_integrity' - drb_ciphering = "yes"; - drb_integrity = "no"; -}; - log_config : { - global_log_level ="info"; - hw_log_level ="info"; - phy_log_level ="info"; - mac_log_level ="info"; - rlc_log_level ="info"; - pdcp_log_level ="info"; - rrc_log_level ="info"; - ngap_log_level ="info"; - f1ap_log_level ="info"; + global_log_level = "info"; + hw_log_level = "info"; + phy_log_level = "info"; + mac_log_level = "info"; + rlc_log_level = "info"; + pdcp_log_level = "info"; + rrc_log_level = "info"; + ngap_log_level = "info"; + f1ap_log_level = "info"; }; fhi_72 = { - dpdk_devices = ("0000:c1:11.0", "0000:c1:11.1"); + dpdk_devices = ("0000:c1:11.0", "0000:c1:11.1"); # one VF can be used as well system_core = 0; io_core = 1; worker_cores = (2); - du_addr = ("00:11:22:33:44:66", "00:11:22:33:44:67"); - ru_addr = ("70:b3:d5:e1:5b:ff", "70:b3:d5:e1:5b:ff"); - mtu = 9216; - file_prefix = "fhi_72"; + ru_addr = ("8c:1f:64:d1:10:46","8c:1f:64:d1:10:46"); + mtu = 9600; fh_config = ({ Tadv_cp_dl = 125; T2a_cp_dl = (259, 500); @@ -285,8 +266,5 @@ fhi_72 = { iq_width = 9; iq_width_prach = 9; }; - prach_config = { - eAxC_offset = 4; - }; }); }; From d27dd1554df5eb1f4a11312c3bbebe65904d5e62 Mon Sep 17 00:00:00 2001 From: Teodora Date: Mon, 18 Nov 2024 21:32:15 +0100 Subject: [PATCH 12/16] Change 8x8 100MHz Benetel config file - 650-550 config file deleted - 650-650 config file added --- ...nd77.273prb.fhi72.8x8-benetel650_650.conf} | 123 +++++++++--------- 1 file changed, 62 insertions(+), 61 deletions(-) rename targets/PROJECTS/GENERIC-NR-5GC/CONF/{gnb-du.sa.band78.106prb.fhi72.8x8-benetel-650-550.conf => gnb-du.sa.band77.273prb.fhi72.8x8-benetel650_650.conf} (82%) diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb-du.sa.band78.106prb.fhi72.8x8-benetel-650-550.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb-du.sa.band77.273prb.fhi72.8x8-benetel650_650.conf similarity index 82% rename from targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb-du.sa.band78.106prb.fhi72.8x8-benetel-650-550.conf rename to targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb-du.sa.band77.273prb.fhi72.8x8-benetel650_650.conf index 9c26f76d9e..fa54c07424 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb-du.sa.band78.106prb.fhi72.8x8-benetel-650-550.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb-du.sa.band77.273prb.fhi72.8x8-benetel650_650.conf @@ -22,10 +22,11 @@ gNBs = pdsch_AntennaPorts_N1 = 2; pusch_AntennaPorts = 8; do_CSIRS = 1; - do_SRS = 0 ; - sib1_tda = 15; -# force_UL256qam_off = 1; - maxMIMO_layers = 2; + do_SRS = 0; + sib1_tda = 15; + force_UL256qam_off = 1; + maxMIMO_layers = 2; + pdcch_ConfigSIB1 = ( { controlResourceSetZero = 11; @@ -41,20 +42,21 @@ gNBs = # n_TimingAdvanceOffset = 0; # downlinkConfigCommon #frequencyInfoDL - # this is 3430.56 MHz (center frequency) - absoluteFrequencySSB = 628704; - dl_frequencyBand = 78; - # this is 3411.48 MHz - dl_absoluteFrequencyPointA = 627432; + # center frequency = 3950.4 MHz + # selected SSB frequency = 3950.4 MHz + absoluteFrequencySSB = 663360; + dl_frequencyBand = 77; + # frequency point A = 3901.26 MHz + dl_absoluteFrequencyPointA = 660084; #scs-SpecificCarrierList dl_offstToCarrier = 0; # subcarrierSpacing # 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 dl_subcarrierSpacing = 1; - dl_carrierBandwidth = 106; + dl_carrierBandwidth = 273; #initialDownlinkBWP #genericParameters - initialDLBWPlocationAndBandwidth = 28875; #38.101-1 Table 5.3.2-1 + initialDLBWPlocationAndBandwidth = 1099; #38.101-1 Table 5.3.2-1 # # subcarrierSpacing # 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 @@ -65,23 +67,23 @@ gNBs = #uplinkConfigCommon #frequencyInfoUL - ul_frequencyBand = 78; + ul_frequencyBand = 77; #scs-SpecificCarrierList ul_offstToCarrier = 0; # subcarrierSpacing # 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 ul_subcarrierSpacing = 1; - ul_carrierBandwidth = 106; + ul_carrierBandwidth = 273; pMax = 23; #initialUplinkBWP #genericParameters - initialULBWPlocationAndBandwidth = 28875; + initialULBWPlocationAndBandwidth = 1099; # subcarrierSpacing # 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 initialULBWPsubcarrierSpacing = 1; #rach-ConfigCommon #rach-ConfigGeneric - prach_ConfigurationIndex = 154; + prach_ConfigurationIndex = 151; #prach_msg1_FDM #0 = one, 1=two, 2=four, 3=eight prach_msg1_FDM = 0; @@ -127,7 +129,7 @@ gNBs = hoppingId = 0; p0_nominal = -96; - ssb_PositionsInBurst_Bitmap = 0x10001L; + ssb_PositionsInBurst_Bitmap = 0x1; # ssb_periodicityServingCell # 0 = ms5, 1=ms10, 2=ms20, 3=ms40, 4=ms80, 5=ms160, 6=spare2, 7=spare1 @@ -142,16 +144,20 @@ gNBs = subcarrierSpacing = 1; -#tdd-UL-DL-ConfigurationCommon -# 0=ms0p5, 1=ms0p625, 2=ms1, 3=ms1p25, 4=ms2, 5=ms2p5, 6=ms5, 7=ms10 8=ms3 9=ms4 + #tdd-UL-DL-ConfigurationCommon +# subcarrierSpacing +# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 referenceSubcarrierSpacing = 1; - dl_UL_TransmissionPeriodicity = 8; - nrofDownlinkSlots = 3; - nrofDownlinkSymbols = 6; - nrofUplinkSlots = 2; - nrofUplinkSymbols = 4; + # pattern1 + # dl_UL_TransmissionPeriodicity + # 0=ms0p5, 1=ms0p625, 2=ms1, 3=ms1p25, 4=ms2, 5=ms2p5, 6=ms5, 7=ms10 + dl_UL_TransmissionPeriodicity = 5; + nrofDownlinkSlots = 3; + nrofDownlinkSymbols = 6; + nrofUplinkSlots = 1; + nrofUplinkSymbols = 4; - ssPBCH_BlockPower = 10; + ssPBCH_BlockPower = 10; } ); @@ -180,14 +186,15 @@ MACRLCs = ( local_n_portd = 2153; remote_n_portc = 501; remote_n_portd = 2153; - pusch_TargetSNRx10 = 230; - pucch_TargetSNRx10 = 270; - dl_bler_target_upper = .35; - dl_bler_target_lower = .15; - ul_bler_target_upper = .35; - ul_bler_target_lower = .15; + pusch_TargetSNRx10 = 120; + pucch_TargetSNRx10 = 200; + dl_bler_target_upper = .35; + dl_bler_target_lower = .15; + ul_bler_target_upper = .35; + ul_bler_target_lower = .15; pusch_FailureThres = 100; ul_max_mcs = 28; + min_grant_prb = 1; } ); @@ -211,18 +218,17 @@ RUs = ( local_rf = "no"; nb_tx = 8; nb_rx = 8; - att_tx = 0 + att_tx = 0; att_rx = 0; - bands = [78]; + bands = [77]; max_pdschReferenceSignalPower = -27; max_rxgain = 75; sf_extension = 0; eNB_instances = [0]; ru_thread_core = 9; sl_ahead = 10; - clock_src = "internal"; tr_preference = "raw_if4p5"; # important: activate FHI7.2 - do_precoding = 0; # needs to match O-RU configuration + do_precoding = 0; # needs to match O-RU configuration } ); @@ -233,39 +239,21 @@ log_config : phy_log_level = "info"; mac_log_level = "info"; rlc_log_level = "info"; + pdcp_log_level = "info"; + rrc_log_level = "info"; + ngap_log_level = "info"; f1ap_log_level = "info"; }; fhi_72 = { - dpdk_devices = ("0000:01:01.0", "0000:01:01.1", "0000:01:01.2", "0000:01:01.3"); + dpdk_devices = ("0000:01:01.0", "0000:01:01.1", "0000:01:01.2", "0000:01:01.3"); # two VFs can be used as well system_core = 0; io_core = 1; worker_cores = (2); - du_addr = ("00:11:22:33:44:66","00:11:22:33:44:67","00:11:22:33:44:68","00:11:22:33:44:69"); - ru_addr = ("70:b3:d5:e1:5b:ff","70:b3:d5:e1:5b:ff","70:b3:d5:e1:5b:81", "70:b3:d5:e1:5b:81"); - mtu = 9216; - file_prefix = "fhi_72"; + ru_addr = ("8c:1f:64:d1:10:46","8c:1f:64:d1:10:46","8c:1f:64:d1:10:43","8c:1f:64:d1:10:43"); # if two VFs, set two RU MAC addresses (one per RU) + mtu = 9600; fh_config = ( -# RAN650 - { - Tadv_cp_dl = 125; - T2a_cp_dl = (259, 500); - T2a_cp_ul = (25, 500); - T2a_up = (134, 375); - Ta3 = (152, 160); - T1a_cp_dl = (419, 470); - T1a_cp_ul = (285, 336); - T1a_up = (294, 345); - Ta4 = (0, 200); - ru_config = { - iq_width = 9; - iq_width_prach = 9; - }; - prach_config = { - eAxC_offset = 4; - }; - }, -# RAN550 +# RAN650 #1 { Tadv_cp_dl = 125; T2a_cp_dl = (259, 500); @@ -280,8 +268,21 @@ fhi_72 = { iq_width = 9; iq_width_prach = 9; }; - prach_config = { - eAxC_offset = 4; + }, +# RAN650 #2 + { + Tadv_cp_dl = 125; + T2a_cp_dl = (259, 500); + T2a_cp_ul = (25, 500); + T2a_up = (134, 375); + Ta3 = (152, 160); + T1a_cp_dl = (419, 470); + T1a_cp_ul = (285, 336); + T1a_up = (294, 345); + Ta4 = (0, 200); + ru_config = { + iq_width = 9; + iq_width_prach = 9; }; }); }; From 6a810f154df135441a9ba26f497025e560b3700a Mon Sep 17 00:00:00 2001 From: Teodora Date: Fri, 22 Nov 2024 12:23:01 +0100 Subject: [PATCH 13/16] Correct CI Benetel 550 4x4 100MHz config file --- ...sa.band78.273prb.fhi72.4x4-benetel550.conf | 48 +++++++++---------- 1 file changed, 22 insertions(+), 26 deletions(-) diff --git a/ci-scripts/conf_files/gnb.sa.band78.273prb.fhi72.4x4-benetel550.conf b/ci-scripts/conf_files/gnb.sa.band78.273prb.fhi72.4x4-benetel550.conf index 139923e65a..de2a610371 100644 --- a/ci-scripts/conf_files/gnb.sa.band78.273prb.fhi72.4x4-benetel550.conf +++ b/ci-scripts/conf_files/gnb.sa.band78.273prb.fhi72.4x4-benetel550.conf @@ -22,9 +22,9 @@ gNBs = maxMIMO_layers = 2; pusch_AntennaPorts = 4; do_CSIRS = 1; - do_SRS = 0 ; - sib1_tda = 15; -# force_UL256qam_off = 1; + do_SRS = 0; + sib1_tda = 15; + # force_UL256qam_off = 1; pdcch_ConfigSIB1 = ( { @@ -41,10 +41,11 @@ gNBs = # n_TimingAdvanceOffset = 0; # downlinkConfigCommon #frequencyInfoDL - # this is 3450.72 MHz (center frequency) + # center frequency = 3350.01 MHz + # selected SSB frequency = 3349.92 MHz absoluteFrequencySSB = 623328; dl_frequencyBand = 78; - # this is 3401.58 MHz + # frequency point A = 3300.87 MHz dl_absoluteFrequencyPointA = 620052; #scs-SpecificCarrierList dl_offstToCarrier = 0; @@ -189,10 +190,10 @@ MACRLCs = ( tr_n_preference = "local_RRC"; pusch_TargetSNRx10 = 100; pucch_TargetSNRx10 = 200; - dl_bler_target_upper=.35; - dl_bler_target_lower=.15; - ul_bler_target_upper=.35; - ul_bler_target_lower=.15; + dl_bler_target_upper = .35; + dl_bler_target_lower = .15; + ul_bler_target_upper = .35; + ul_bler_target_lower = .15; pusch_FailureThres = 1000; ul_max_mcs = 28; } @@ -218,7 +219,7 @@ RUs = ( local_rf = "no"; nb_tx = 4; nb_rx = 4; - att_tx = 0 + att_tx = 0; att_rx = 0; bands = [78]; max_pdschReferenceSignalPower = -27; @@ -228,7 +229,7 @@ RUs = ( ru_thread_core = 5; sl_ahead = 10; tr_preference = "raw_if4p5"; # important: activate FHI7.2 - do_precoding = 0; # needs to match O-RU configuration + do_precoding = 0; # needs to match O-RU configuration } ); @@ -251,15 +252,15 @@ security = { log_config : { - global_log_level ="info"; - hw_log_level ="info"; - phy_log_level ="info"; - mac_log_level ="info"; - rlc_log_level ="info"; - pdcp_log_level ="info"; - rrc_log_level ="info"; - ngap_log_level ="info"; - f1ap_log_level ="info"; + global_log_level = "info"; + hw_log_level = "info"; + phy_log_level = "info"; + mac_log_level = "info"; + rlc_log_level = "info"; + pdcp_log_level = "info"; + rrc_log_level = "info"; + ngap_log_level = "info"; + f1ap_log_level = "info"; }; fhi_72 = { @@ -267,10 +268,8 @@ fhi_72 = { system_core = 0; io_core = 1; worker_cores = (2); - du_addr = ("00:11:22:33:44:66", "00:11:22:33:44:67"); ru_addr = ("70:b3:d5:e1:5b:81", "70:b3:d5:e1:5b:81"); - mtu = 9216; - file_prefix = "fhi_72"; + mtu = 9600; fh_config = ({ Tadv_cp_dl = 125; T2a_cp_dl = (259, 500); @@ -285,8 +284,5 @@ fhi_72 = { iq_width = 9; iq_width_prach = 9; }; - prach_config = { - eAxC_offset = 4; - }; }); }; From 4ed939e4a9ba043e2328db435c1aa0467b7dd05a Mon Sep 17 00:00:00 2001 From: Teodora Date: Fri, 22 Nov 2024 12:21:52 +0100 Subject: [PATCH 14/16] Correct CI VVDN 4x4 100MHz config file --- .../gnb.sa.band77.273prb.fhi72.4x4-vvdn.conf | 51 +++++++------------ 1 file changed, 19 insertions(+), 32 deletions(-) diff --git a/ci-scripts/conf_files/gnb.sa.band77.273prb.fhi72.4x4-vvdn.conf b/ci-scripts/conf_files/gnb.sa.band77.273prb.fhi72.4x4-vvdn.conf index b89b385ad9..b9c569b625 100644 --- a/ci-scripts/conf_files/gnb.sa.band77.273prb.fhi72.4x4-vvdn.conf +++ b/ci-scripts/conf_files/gnb.sa.band77.273prb.fhi72.4x4-vvdn.conf @@ -13,7 +13,6 @@ gNBs = tracking_area_code = 1; plmn_list = ({ mcc = 208; mnc = 97; mnc_length = 2; snssaiList = ( { sst = 1; }); }); - //nr_cellid = 12345678L; nr_cellid = 1; ////////// Physical parameters: @@ -23,7 +22,7 @@ gNBs = maxMIMO_layers = 2; pusch_AntennaPorts = 4; do_CSIRS = 1; - do_SRS = 0 ; + do_SRS = 0; pdcch_ConfigSIB1 = ( { @@ -38,10 +37,11 @@ gNBs = physCellId = 0; # downlinkConfigCommon #frequencyInfoDL - # this is 3450.72 MHz (center frequency) + # center frequency = 3999.36 MHz + # selected SSB frequency = 3999.36 MHz absoluteFrequencySSB = 666624; dl_frequencyBand = 77; - # this is 3401.58 MHz + # frequency point A = 3950.22 MHz dl_absoluteFrequencyPointA = 663348; #scs-SpecificCarrierList dl_offstToCarrier = 0; @@ -186,8 +186,8 @@ MACRLCs = ( tr_n_preference = "local_RRC"; pusch_TargetSNRx10 = 180; pucch_TargetSNRx10 = 230; - ul_bler_target_upper=.35; - ul_bler_target_lower=.15; + ul_bler_target_upper = .35; + ul_bler_target_lower = .15; pusch_FailureThres = 100; } ); @@ -211,7 +211,7 @@ RUs = ( local_rf = "no"; nb_tx = 4; nb_rx = 4; - att_tx = 0 + att_tx = 0; att_rx = 0; bands = [77]; max_pdschReferenceSignalPower = -27; @@ -220,21 +220,11 @@ RUs = ( eNB_instances = [0]; ru_thread_core = 5; sl_ahead = 5; - clock_src = "internal"; tr_preference = "raw_if4p5"; # important: activate FHI7.2 - do_precoding = 0; # needs to match O-RU configuration + do_precoding = 0; # needs to match O-RU configuration } ); -rfsimulator : -{ - serveraddr = "server"; - serverport = "4043"; - options = (); #("saviq"); or/and "chanmod" - modelname = "AWGN"; - IQfile = "/tmp/rfsimulator.iqs"; -}; - security = { # preferred ciphering algorithms # the first one of the list that an UE supports in chosen @@ -252,7 +242,8 @@ security = { drb_integrity = "no"; }; -log_config : { +log_config : +{ global_log_level = "info"; hw_log_level = "info"; phy_log_level = "info"; @@ -269,25 +260,21 @@ fhi_72 = { system_core = 0; io_core = 1; worker_cores = (2); - du_addr = ("76:76:64:6e:00:01", "76:76:64:6e:00:01"); ru_addr = ("98:ae:71:01:c5:eb", "98:ae:71:01:c5:eb"); - mtu = 9216; # check if xran uses this properly + mtu = 9600; fh_config = ({ Tadv_cp_dl = 125; - T2a_cp_dl = (285, 429); # (min, max) - T2a_cp_ul = (285, 429); # (min, max) - T2a_up = (125, 428); # (min, max) - Ta3 = (130, 170); # (min, max) - T1a_cp_dl = (285, 470); # (min, max) - T1a_cp_ul = (285, 429); # (min, max) - T1a_up = (125, 350); # (min, max) - Ta4 = (110, 180); # (min, max) + T2a_cp_dl = (285, 429); + T2a_cp_ul = (285, 429); + T2a_up = (125, 428); + Ta3 = (130, 170); + T1a_cp_dl = (285, 470); + T1a_cp_ul = (285, 429); + T1a_up = (125, 350); + Ta4 = (110, 180); ru_config = { iq_width = 9; iq_width_prach = 9; }; - prach_config = { - eAxC_offset = 4; - }; }); }; From b55ee54183fac0b879adafe4dfc9d07a8cc368ff Mon Sep 17 00:00:00 2001 From: Teodora Date: Thu, 14 Nov 2024 18:16:01 +0100 Subject: [PATCH 15/16] Update steps for configuring VF(s) in README - add option to configure one or two VFs - add support for Mellanox NIC --- doc/ORAN_FHI7.2_Tutorial.md | 178 +++++++++++++++++++++++++----------- 1 file changed, 124 insertions(+), 54 deletions(-) diff --git a/doc/ORAN_FHI7.2_Tutorial.md b/doc/ORAN_FHI7.2_Tutorial.md index a077778162..4045f3cab7 100644 --- a/doc/ORAN_FHI7.2_Tutorial.md +++ b/doc/ORAN_FHI7.2_Tutorial.md @@ -42,7 +42,10 @@ NICs we have tested so far: |E810-C |4.20 0x8001784e 22.0.9 | |Intel XXV710 |6.02 0x80003888 | -**Note**: With AMD servers/desktop machines with PCIe 5.0 we have only used E810 cards. +**Note**: + +- With AMD servers/desktop machines with PCIe 5.0 we have only used E810 cards. +- If you are using Mellanox NIC, please be aware that DPDK can't bind the NIC as vfio-pci. Instead it must be bind with mlx driver. PTP enabled switches and grandmaster clock we have in are lab: @@ -617,63 +620,103 @@ The 7.2 fronthaul uses the xran library, which requires DPDK. In this step, we need to configure network interfaces to send data to the RU, and configure DPDK to bind to the corresponding PCI interfaces. More specifically, in the following we use [SR-IOV](https://en.wikipedia.org/wiki/Single-root_input/output_virtualization) -to create multiple virtual functions (VFs) through which Control plane (C +to create one or multiple virtual functions (VFs) through which Control plane (C plane) and User plane (U plane) traffic will flow. The following commands are not persistant, and have to be repeated after reboot. In the following, we will use these short hands: -- `physical-interface`: Physical network interface through which you can access the RU -- `vlan`: VLAN tags as defined in the RU configuration -- `mtu`: the MTU as specified by the RU vendor, and supported by the NIC -- `du-c-plane-mac-addr`: DU C plane MAC address -- `pci-address-c-plane-vf`: PCI bus address of the VF for C plane -- `du-u-plane-mac-addr`: DU U plane MAC address -- `pci-address-u-plane-vf`: PCI bus address of the VF for U plane +- `IF_NAME`: Physical network interface through which you can access the RU +- `VLAN`: the VLAN tag as recommended by the RU vendor +- `MTU`: the MTU as specified by the RU vendor, and supported by the NIC +- `DU_U_PLANE_MAC_ADD`: DU U plane MAC address +- `U_PLANE_PCI_BUS_ADD`: PCI bus address of the VF for U plane +- `DU_C_PLANE_MAC_ADD`: DU C plane MAC address +- `C_PLANE_PCI_BUS_ADD`: PCI bus address of the VF for C plane In the configuration file, in option `fhi_72.dpdk_devices`, the first PCI address is for U-plane and the second for C-plane. -For both the MAC addresses, you might use the MAC addresses which are -pre-configured in the RUs (typically `00:11:22:33:44:66`, but that is not -always the case). Note that if your system has Intel E-810 NIC cards/ICE -driver, you have to choose different MAC addresses (valid for above-mentioned -kernels). If the RU vendor requires untagged traffic, remove the VLAN tagging +RU might support either one DU MAC address for both CU planes or two different. +i.e. VVDN Gen3, Metanoia support only one, Benetel550 supports both cases + + +**Note** + +- X710 NIC supports the same DU MAC address for multiple VFs +- E-810 NIC requires different DU MAC addresses for multiple VFs + +If the RU vendor requires untagged traffic, remove the VLAN tagging in the below command and configure VLAN on the switch as "access VLAN". In case the MTU is different than 1500, you have to update the MTU on the switch interface as well. -First, set maximum ring buffers: +### Set maximum ring buffers: + +As a first step, please set up the maximum allowed buffer size to your desired interface. To check the maximum value, please execute the following command: ```bash -sudo ethtool -g -sudo ethtool -G rx 4096 # assumes 4096 is max -sudo ethtool -G tx 4096 # assumes 4096 is max +sudo ethtool -g $IF_NAME ``` -Set the maximum MTU in the physical interface: ```bash -sudo ifconfig mtu +set -x +IF_NAME= +MAX_RING_BUFFER_SIZE= + +sudo ethtool -G $IF_NAME rx $MAX_RING_BUFFER_SIZE tx $MAX_RING_BUFFER_SIZE ``` -(Re-)create two VFs, load the Linux "Base Driver for Intel Ethernet Adaptive -Virtual Function" (in case you use Intel ethernet card), and set up the VFs. +### Set the maximum MTU in the physical interface: +```bash +set -x +IF_NAME= +MTU= + +sudo ip link set $IF_NAME mtu $MTU +``` + +### (Re-)create VF(s) + +#### one VF ```bash +set -x +IF_NAME= +DU_CU_PLANE_MAC_ADD= +VLAN= +MTU= + sudo modprobe iavf -sudo sh -c echo "0" > /sys/class/net//device/sriov_numvfs -sudo sh -c echo "2" > /sys/class/net//device/sriov_numvfs -sudo ip link set vf 0 mac vlan mtu spoofchk off -sudo ip link set vf 1 mac vlan mtu spoofchk off +sudo sh -c 'echo 0 > /sys/class/net/$IF_NAME/device/sriov_numvfs' +sudo sh -c 'echo 1 > /sys/class/net/$IF_NAME/device/sriov_numvfs' +sudo ip link set $IF_NAME vf 0 mac $DU_CU_PLANE_MAC_ADD vlan $VLAN mtu $MTU spoofchk off # set CU planes PCI address ``` -After running the above commands, the kernel created virtual functions that +#### two VFs + +```bash +set -x +IF_NAME= +DU_U_PLANE_MAC_ADD= +DU_C_PLANE_MAC_ADD= # can be same as for U plane -> depends if the NIC supports the same MAC address +VLAN= +MTU= + +sudo modprobe iavf +sudo sh -c 'echo 0 > /sys/class/net/$IF_NAME/device/sriov_numvfs' +sudo sh -c 'echo 2 > /sys/class/net/$IF_NAME/device/sriov_numvfs' +sudo ip link set $IF_NAME vf 0 mac $DU_U_PLANE_MAC_ADD vlan $VLAN mtu $MTU spoofchk off # set U plane PCI address +sudo ip link set $IF_NAME vf 1 mac $DU_C_PLANE_MAC_ADD vlan $VLAN mtu $MTU spoofchk off # set C plane PCI address +``` + +After running the above commands, the kernel created VF(s) that have been assigned a PCI address under the same device and vendor ID. For instance, use `sudo lshw -c network -businfo` to get a list of PCI addresses -and interface names, locate the PCI address of ``, then use +and interface names, locate the PCI address of `$IF_NAME`, then use `lspci | grep Virtual` to get all virtual interfaces and use the ones with the same Device/Vendor ID parts (first two numbers).
-Example +Example with two VFs The machine in this example has an Intel X710 card. The interface in question is `eno12409`. Running `lshw` gives: @@ -706,41 +749,68 @@ The hardware card `31:00.1` has two associated virtual functions `31:06.0` and `31:06.1`.
+### Bind VF(s) + Now, unbind any pre-existing DPDK devices, load the "Virtual Function I/O" -driver `vfio_pci`, and bind DPDK to these devices: +driver `vfio_pci` or `mlx5_core`, and bind DPDK to these devices. -``` -sudo /usr/local/bin/dpdk-devbind.py --unbind -sudo /usr/local/bin/dpdk-devbind.py --unbind -sudo modprobe vfio_pci -sudo /usr/local/bin/dpdk-devbind.py --bind vfio-pci -sudo /usr/local/bin/dpdk-devbind.py --bind vfio-pci +#### Bind one VF + +```bash +set -x +CU_PLANE_PCI_BUS_ADD= +DRIVER= # set to `vfio_pci` or `mlx5_core`, depending on your NIC + +sudo /usr/local/bin/dpdk-devbind.py --unbind $CU_PLANE_PCI_BUS_ADD +sudo modprobe $DRIVER +sudo /usr/local/bin/dpdk-devbind.py --bind $DRIVER $CU_PLANE_PCI_BUS_ADD ``` -We recommand to put the above commands into a script file to quickly repeat them. +#### Bind two VFs + +```bash +set -x +U_PLANE_PCI_BUS_ADD= +C_PLANE_PCI_BUS_ADD= +DRIVER= # set to `vfio_pci` or `mlx5_core`, depending on your NIC + +sudo /usr/local/bin/dpdk-devbind.py --unbind $U_PLANE_PCI_BUS_ADD +sudo /usr/local/bin/dpdk-devbind.py --unbind $C_PLANE_PCI_BUS_ADD +sudo modprobe $DRIVER +sudo /usr/local/bin/dpdk-devbind.py --bind $DRIVER $U_PLANE_PCI_BUS_ADD +sudo /usr/local/bin/dpdk-devbind.py --bind $DRIVER $C_PLANE_PCI_BUS_ADD +``` + +We recommand to put the above four steps into one script file to quickly repeat them.
-Example script for Benetel 550-A/650 with Intel X710 on host +Example script for Benetel 550-A/650 with Intel X710 on host with two VFs -```console +```bash set -x +IF_NAME=eno12409 +MAX_RING_BUFFER_SIZE=4096 +MTU=9600 +DU_U_PLANE_MAC_ADD=00:11:22:33:44:66 +DU_C_PLANE_MAC_ADD=00:11:22:33:44:67 +VLAN=3 +U_PLANE_PCI_BUS_ADD=31:06.0 +C_PLANE_PCI_BUS_ADD=31:06.1 +DRIVER=vfio_pci -sudo ethtool -G eno12409 rx 4096 -sudo ethtool -G eno12409 tx 4096 -sudo ifconfig eno12409 mtu 9216 - -sudo modprobe -r iavf +sudo ethtool -G $IF_NAME rx $MAX_RING_BUFFER_SIZE tx $MAX_RING_BUFFER_SIZE +sudo ip link set $IF_NAME mtu $MTU sudo modprobe iavf -sudo sh -c 'echo 0 > /sys/class/net/eno12409/device/sriov_numvfs' -sudo sh -c 'echo 2 > /sys/class/net/eno12409/device/sriov_numvfs' -sudo ip link set eno12409 vf 0 mac 00:11:22:33:44:66 vlan 3 qos 0 spoofchk off mtu 9216 -sudo ip link set eno12409 vf 1 mac 00:11:22:33:44:67 vlan 3 qos 0 spoofchk off mtu 9216 - -sudo /usr/local/bin/dpdk-devbind.py --unbind 31:06.0 -sudo /usr/local/bin/dpdk-devbind.py --unbind 31:06.1 -sudo modprobe vfio-pci -sudo /usr/local/bin/dpdk-devbind.py --bind vfio-pci 31:06.0 -sudo /usr/local/bin/dpdk-devbind.py --bind vfio-pci 31:06.1 +sudo sh -c 'echo 0 > /sys/class/net/$IF_NAME/device/sriov_numvfs' +sudo sh -c 'echo 2 > /sys/class/net/$IF_NAME/device/sriov_numvfs' +sudo ip link set $IF_NAME vf 0 mac $DU_U_PLANE_MAC_ADD vlan $VLAN mtu $MTU spoofchk off # set U plane PCI address +sudo ip link set $IF_NAME vf 1 mac $DU_C_PLANE_MAC_ADD vlan $VLAN mtu $MTU spoofchk off # set C plane PCI address +sleep 1 +sudo /usr/local/bin/dpdk-devbind.py --unbind $U_PLANE_PCI_BUS_ADD +sudo /usr/local/bin/dpdk-devbind.py --unbind $C_PLANE_PCI_BUS_ADD +sudo modprobe $DRIVER +sudo /usr/local/bin/dpdk-devbind.py --bind $DRIVER $U_PLANE_PCI_BUS_ADD +sudo /usr/local/bin/dpdk-devbind.py --bind $DRIVER $C_PLANE_PCI_BUS_ADD ```
From b334feb92b8335691e9290eb3a5d4a09a9963450 Mon Sep 17 00:00:00 2001 From: Teodora Date: Fri, 15 Nov 2024 17:50:07 +0100 Subject: [PATCH 16/16] Update gNB fhi_72 configuration steps in README --- doc/ORAN_FHI7.2_Tutorial.md | 170 ++++++++++++++++++++++-------------- 1 file changed, 105 insertions(+), 65 deletions(-) diff --git a/doc/ORAN_FHI7.2_Tutorial.md b/doc/ORAN_FHI7.2_Tutorial.md index 4045f3cab7..d0e66fe68c 100644 --- a/doc/ORAN_FHI7.2_Tutorial.md +++ b/doc/ORAN_FHI7.2_Tutorial.md @@ -484,12 +484,15 @@ Contact the RU vendor and get the configuration manual to understand the below c ### Benetel 650 -- **Valid only for version RAN650-1v1.0.4-dda1bf5** -- TDD pattern `DDDDDDDSUU`, 5ms +**Valid only for version RAN650-1v1.0.4-dda1bf5** + +The OAI configuration file [`gnb-du.sa.band77.273prb.fhi72.4x4-benetel650.conf`](../targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb-du.sa.band77.273prb.fhi72.4x4-benetel650.conf) corresponds to: +- TDD pattern `DDDSU`, 2.5ms - Bandwidth 100MHz -- MTU 9216 (this is the maximum we can configure on our switch) +- MTU 9600 - 4TX4R -- The OAI configuration file [`gnb.sa.band78.273prb.fhi72.4x4-benetel650.conf`](../targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.273prb.fhi72.4x4-benetel650.conf) corresponds to below RU configuration. + +#### RU configuration After switching on the radio or rebooting, wait for the radio bring up to complete, which you can follow using `tail -f /tmp/logs/radio_status`. Once you will see `[INFO] Radio bringup complete`, you can configure the RU via editing `/etc/ru_config.cfg` @@ -509,12 +512,15 @@ dl_ul_tuning_special_slot=0xfd00000 ### Benetel 550 +**Valid only for version RAN550-1v1.0.4-605a25a** -- **Valid only for version RAN550-1v1.0.4-605a25a** +The OAI configuration file [`gnb.sa.band78.273prb.fhi72.4x4-benetel550.conf`](../targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.273prb.fhi72.4x4-benetel550.conf) corresponds to: - TDD pattern `DDDDDDDSUU`, 5ms - Bandwidth 100MHz +- MTU 9600 - 4TX4R -- The OAI configuration file [`gnb.sa.band78.273prb.fhi72.4x4-benetel550.conf`](../targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.273prb.fhi72.4x4-benetel550.conf) corresponds to below RU configuration. + +#### RU configuration After switching on the radio or rebooting, wait for the radio bring up to complete, which you can follow using `tail -f /tmp/logs/radio_status`. Once you will see `[INFO] Radio bringup complete`, you can configure the RU via editing `/etc/ru_config.cfg` @@ -532,48 +538,56 @@ flexran_prach_workaround=disabled dl_tuning_special_slot=0x13b6 ``` -### LiteON +### LITEON +**Verson 01.00.08** +The OAI configuration file [`gnb.sa.band78.273prb.fhi72.4x4-liteon.conf`](../targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.273prb.fhi72.4x4-liteon.conf) corresponds to: - TDD pattern `DDDSU`, 2.5ms - Bandwidth 100MHz -- Default MTU is 1500 +- MTU 1500 (the above mentioned LITEON version doesn't support jumbo frames) + +#### RU configuration SSH to the unit as user `user`. Write `enable` in the terminal to enter the configuration console; the password should be in the user guide. Use the command `show oru-status` to check the RU status. The output should be similar to: - ```bash # show oru-status Sync State : SYNCHRONIZED RF State : Ready DPD : Ready +DuConnected : notReady ``` -Once the RU is PTP synced, and RF state and DPD are `Ready`, write `configure` in the terminal to set: +Also, you can use `show running-config` to display the current RU configuration. +Once the RU is PTP synced, and RF state and DPD are `Ready`, write `configure terminal` to set: - Center frequency - Bandwidth - Compression Bitwidth - TX/RX attenuation -To configure 4TX and 4RX antennas, you have to repeat the below steps after every reboot, so don't restart the RU after entering below commands: - +After each reboot, the PRACH has to be manually configured. +To do so, please login to RU as user `root` and run below commands: ```bash devmem 0x80001014 32 0x00050004 devmem 0x80001018 32 0x00070006 devmem 0x8000201C 32 0x00000001 ``` -If you want to set MTU size to 9000 then use the below command: - +If you have RU version that supports jumbo frames, please enable it as: ```bash devmem 0x8000200C 32 0x00000001 ``` ### VVDN LPRU +**Version 3.x** + +The OAI configuration file [`gnb.sa.band77.273prb.fhi72.4x4-vvdn.conf`](../targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band77.273prb.fhi72.4x4-vvdn.conf) corresponds to: - TDD pattern `DDDSU`, 2.5ms - Bandwidth 100MHz -- MTU 9216 (this is the maximum we can configure on our switch) -- The OAI configuration file [`gnb.sa.band77.273prb.fhi72.4x4-vvdn.conf`](../targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band77.273prb.fhi72.4x4-vvdn.conf) corresponds to below RU configuration. +- MTU 9600 + +#### RU configuration Check in the RU user manual how to configure the center frequency. There are multiple ways to do it. We set the center frequency by editing `sysrepocfg` database. You can use `sysrepocfg --edit=vi -d running` to do the same. You can edit the `startup` database to make the center frequency change persistent. @@ -607,13 +621,37 @@ Execute the below commands on every restart ```bash xml_parser 4x4-config.xml ## To enable prach compression -mw.l a0010024 1919 +mw.l a0010024 1919 # format ` ## This will show the current configuration /etc/scripts/lpru_configuration.sh ## Edit the sysrepo to ACTIVATE the carrier when you want to use the RU +## option 1 - activation by writing directly in register +mw.l a0050010 3 # e.g. VLAN = 4 => `mw.l a0050010 43` +## option 2 - activation via sysrepocfg command sysrepocfg --edit=vi -d running ``` +### Metanoia RU + +**Version 2.0.6** + +The OAI configuration file [`gnb.sa.band78.273prb.fhi72.4x4-metanoia.conf`](../targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.273prb.fhi72.4x4-metanoia.conf) corresponds to: +- TDD pattern `DDDSU`, 2.5ms (`DDDDDDDSUU`, 5ms, also supported) +- Bandwidth 100MHz +- 4TX4R + +The RU configuration is stored in `/etc/rumanager.conf`. The required modifications: +1. `processing_element/vlan_id` +2. `processing_element/du_mac_address` +3. `low_level_tx_endpoint/compression_type` -> `STATIC` +4. `low_level_rx_endpoint/compression_type` -> `STATIC` +5. `low_level_rx_endpoint/compression/fs-offset` -> `8` +6. `center-of-channel-bandwidth` -> `3750000000` +7. `tx_gain_correction` -> tested with `6020` (please be careful to not fry the RU) +8. `rx_gain_correction` -> tested with `-903` (please be careful to not fry the RU) + +At this stage, RU must be rebooted so the changes apply. + ## Configure Network Interfaces and DPDK VFs The 7.2 fronthaul uses the xran library, which requires DPDK. In this step, we @@ -821,9 +859,19 @@ sudo /usr/local/bin/dpdk-devbind.py --bind $DRIVER $C_PLANE_PCI_BUS_ADD **Beware in the following section to let in the range of isolated cores the parameters that should be (i.e. `L1s.L1_rx_thread_core`, `L1s.L1_tx_thread_core`, `RUs.ru_thread_core`, `fhi_72.io_core` and `fhi_72.worker_cores`)** Sample configuration files for OAI gNB, specific to the manufacturer of the radio unit, are available at: -1. LITE-ON RU: [`gnb.sa.band78.273prb.fhi72.4x4-liteon.conf`](../targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.273prb.fhi72.4x4-liteon.conf) (band n78, 273 PRBs, 3.5GHz center freq, 4x4 antenna configuration with 9 bit I/Q samples (compressed) for PUSCH/PDSCH/PRACH, 2-layer DL MIMO, UL SISO) -2. Benetel 650 RU: [`gnb.sa.band78.273prb.fhi72.4x4-benetel650.conf`](../targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.273prb.fhi72.4x2-benetel650.conf) (band n78, 273 PRBs, 3.5GHz center freq, 4x2 antenna configuration with 9 bit I/Q samples (compressed) for PUSCH/PDSCH/PRACH, 2-layer DL MIMO, UL SISO) -3. VVDN RU: [`gnb.sa.band77.273prb.fhi72.4x4-vvdn.conf`](../targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band77.273prb.fhi72.4x4-vvdn.conf) (band n77, 273 PRBs, 4.0GHz center freq, 4x4 antenna configuration with 9 bit I/Q samples (compressed) for PUSCH/PDSCH/PRACH, 2-layer DL MIMO, UL SISO) +1. LITEON RU: +[`gnb.sa.band78.273prb.fhi72.4x4-liteon.conf`](../targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.273prb.fhi72.4x4-liteon.conf) +2. VVDN RU: +[`gnb.sa.band77.273prb.fhi72.4x4-vvdn.conf`](../targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band77.273prb.fhi72.4x4-vvdn.conf) +[`gnb.sa.band77.106prb.fhi72.4x4-vvdn.conf`](../targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band77.106prb.fhi72.4x4-vvdn.conf) +[`gnb.sa.band77.273prb.fhi72.2x2-vvdn.conf`](../targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band77.273prb.fhi72.2x2-vvdn.conf) +3. Benetel 650 RU: +[`gnb-du.sa.band77.273prb.fhi72.4x4-benetel650.conf`](../targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb-du.sa.band77.273prb.fhi72.4x4-benetel650.conf) +4. Benetel 550 RU: +[`gnb.sa.band78.273prb.fhi72.4x4-benetel550.conf`](../targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.273prb.fhi72.4x4-benetel550.conf) +[`gnb.sa.band78.273prb.fhi72.4x2-benetel550.conf`](../targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.273prb.fhi72.4x2-benetel550.conf) +5. Metanoia RU: +[`gnb.sa.band78.273prb.fhi72.4x4-metanoia.conf`](../targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.273prb.fhi72.4x4-metanoia.conf) Edit the sample OAI gNB configuration file and check following parameters: @@ -848,16 +896,15 @@ Edit the sample OAI gNB configuration file and check following parameters: * `fhi_72` (FrontHaul Interface) section: this config follows the structure that is employed by the xRAN library (`xran_fh_init` and `xran_fh_config` structs in the code): - * `dpdk_devices`: PCI addresses of NIC VFs binded to the DPDK (not the physical NIC but the VFs, use `lspci | grep Virtual`) + * `dpdk_devices`: PCI addresses of NIC VFs binded to the DPDK (not the physical NIC but the VFs, use `lspci | grep Virtual`) in the format `{VF-U-plane, VF-C-plane}`; + if one VF used per RU, U and C planes will share the same VF => depends on the RU capabilities * `system_core`: absolute CPU core ID for DPDK control threads, it should be an isolated core, in our environment we are using CPU 0 (`rte_mp_handle`, `eal-intr-thread`, `iavf-event-thread`) * `io_core`: absolute CPU core ID for XRAN library, it should be an isolated core, in our environment we are using CPU 4 * `worker_cores`: array of absolute CPU core IDs for XRAN library, they should be isolated cores, in our environment we are using CPU 2 - * `du_addr`: DU C- and U-plane MAC-addresses (format `UU:VV:WW:XX:YY:ZZ`, - hexadecimal numbers) - * `ru_addr`: RU C- and U-plane MAC-addresses (format `UU:VV:WW:XX:YY:ZZ`, - hexadecimal numbers) - * `mtu`: Maximum Transmission Unit for the RU, specified by RU vendor + * `ru_addr`: RU U- and C-plane MAC-addresses (format `UU:VV:WW:XX:YY:ZZ`, hexadecimal numbers) + * `mtu`: Maximum Transmission Unit for the RU, specified by RU vendor; either 1500 or 9600 B (Jumbo Frames); if not set, 1500 is used + * `file_prefix` : used to specify a unique prefix for shared memory and files created by multiple DPDK processes; if not set, default value of `wls_0` is used * `dpdk_mem_size`: the huge page size that should be pre-allocated by DPDK _for NUMA node 0_; by default, this is 8192 MiB (corresponding to 8 huge pages à 1024 MiB each, see above). In the current implementation, you @@ -874,17 +921,19 @@ Edit the sample OAI gNB configuration file and check following parameters: * `iq_width_prach`: Width of PRACH IQ samples: if 16, no compression, if <16, applies compression * `prach_config`: PRACH-specific configuration - * `eAxC_offset`: PRACH antenna offset + * `eAxC_offset`: PRACH antenna offset; if not set, default value of `N = max(Nrx,Ntx)` is used * `kbar`: the PRACH guard interval, provided in RU Layer mapping (eAxC offsets) happens as follows: -- For PUSCH/PDSCH, the layers are mapped to `[0,1,...,N-1]` where `N` is the +- For PUSCH/PDSCH, the layers are mapped to `[0,1,...,Nrx-1]/[0,1,...,Ntx-1]` where `Nrx/Ntx` is the respective RX/TX number of antennas. -- For PRACH, the layers are mapped to `[No,No+1,...No+N-1]` where No is the - `fhi_72.fh_config.[0].prach_config.eAxC_offset` and `N` the number of receive - antennas. +- For PRACH, the layers are mapped to `[No,No+1,...No+Nrx-1]` where `No` is the + `fhi_72.fh_config.[0].prach_config.eAxC_offset`. Please be aware that the following equation must be fullfilled: `No >= max(Nrx,Ntx)`. -xRAN SRS reception is not supported. +**Note** + +- At the moment, OAI is compatible with CAT A O-RU only. Therefore, SRS is not supported. +- XRAN retreives DU MAC address with `rte_eth_macaddr_get()` function. Hence, `fhi_72.du_addr` parameter is not taken into account. # Start and Operation of OAI gNB @@ -990,7 +1039,7 @@ Some caveats: For two RUs each using a 4x4 configuration, make sure to configure the 8x8 configuration, i.e., set `nb_tx` and `nb_rx` under `RUs` to 8 each (NOT two -RUs!). Also, set the antenna port information as listed above, i.e., +`RUs`!). Also, set the antenna port information as listed above, i.e., ``` pdsch_AntennaPorts_XP = 2; @@ -1004,11 +1053,10 @@ Next, configure the `fhi_72` section as indicated below: ``` fhi_72 = { - dpdk_devices = ("ru1_up_vf_pci", "ru1_cp_vf_pci", "ru2_up_vf_pci", "ru2_cp_vf_pci"); + dpdk_devices = ("ru1_up_vf_pci", "ru1_cp_vf_pci", "ru2_up_vf_pci", "ru2_cp_vf_pci"); # two VFs can be used as well // core config as always - du_addr = ("du_ru1_up_mac_addr", "du_ru1_cp_mac_addr", "du_ru2_up_mac_addr", "du_ru2_cp_mac_addr"); - ru_addr = ("ru1_up_mac_addr", "ru1_cp_mac_addr", "ru2_up_mac_addr", "ru2_cp_mac_addr"); - // mtu, file_prefix ... + ru_addr = ("ru1_up_mac_addr", "ru1_cp_mac_addr", "ru2_up_mac_addr", "ru2_cp_mac_addr"); # if two VFs, set two RU MAC addresses (one per RU) + // mtu fh_config = ( { // timing, ru_config, prach_config of RU1 @@ -1020,12 +1068,12 @@ fhi_72 = { }; ``` -i.e., for `dpdk_devices`, `du_addr`, and `ru_addr` is configured for +i.e., for `dpdk_devices`, and `ru_addr` is configured for both RUs in a (flat) array, and the individual radio configuration is given for each RU individually inside the `fh_config`.
-Sample FHI 7.2 configuration for two RUs (Benetel 550 and 650) +Sample FHI 7.2 configuration for two RUs (2 x Benetel 650) ``` fhi_72 = { @@ -1033,12 +1081,10 @@ fhi_72 = { system_core = 0; io_core = 1; worker_cores = (2); - du_addr = ("00:11:22:33:44:66","00:11:22:33:44:67","00:11:22:33:44:66","00:11:22:33:44:67"); - ru_addr = ("70:b3:d5:e1:5b:ff","70:b3:d5:e1:5b:ff","70:b3:d5:e1:5b:81", "70:b3:d5:e1:5b:81"); - mtu = 9216; - file_prefix = "fhi_72"; + ru_addr = ("8c:1f:64:d1:10:46","8c:1f:64:d1:10:46","8c:1f:64:d1:10:43","8c:1f:64:d1:10:43") + mtu = 9600; fh_config = ( -# RAN650 +# RAN650 #1 { Tadv_cp_dl = 125; T2a_cp_dl = (259, 500); @@ -1053,11 +1099,8 @@ fhi_72 = { iq_width = 9; iq_width_prach = 9; }; - prach_config = { - eAxC_offset = 4; - }; }, -# RAN550 +# RAN650 #2 { Tadv_cp_dl = 125; T2a_cp_dl = (259, 500); @@ -1072,38 +1115,35 @@ fhi_72 = { iq_width = 9; iq_width_prach = 9; }; - prach_config = { - eAxC_offset = 4; - }; }); ```
Compare also with the example (DU) configuration in -[`gnb-du.sa.band78.106prb.fhi72.8x8-benetel-650-550.conf`](../targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb-du.sa.band78.106prb.fhi72.8x8-benetel-650-550.conf). +[`gnb-du.sa.band77.273prb.fhi72.8x8-benetel650_650.conf`](../targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb-du.sa.band77.273prb.fhi72.8x8-benetel650_650.conf). Afterwards, start the gNB with the modified configuration file. If everything went well, you should see the RU counters for both RUs go up: ``` -[NR_PHY] [o-du 0][rx 614400 pps 61440 kbps 844953][tx 1275076 pps 127488 kbps 1998585][Total Msgs_Rcvd 614400] -[NR_PHY] [o_du0][pusch0 107520 prach0 46080] -[NR_PHY] [o_du0][pusch1 107520 prach1 46080] -[NR_PHY] [o_du0][pusch2 107520 prach2 46080] -[NR_PHY] [o_du0][pusch3 107520 prach3 46080] -[NR_PHY] [o-du 1][rx 614400 pps 61440 kbps 844953][tx 1275076 pps 127488 kbps 1998585][Total Msgs_Rcvd 614400] -[NR_PHY] [o_du1][pusch0 107520 prach0 46080] -[NR_PHY] [o_du1][pusch1 107520 prach1 46080] -[NR_PHY] [o_du1][pusch2 107520 prach2 46080] -[NR_PHY] [o_du1][pusch3 107520 prach3 46080] +[NR_PHY] [o-du 0][rx 63488 pps 63264 kbps 2759808][tx 127684 pps 127116 kbps 4717971][Total Msgs_Rcvd 63488] +[NR_PHY] [o_du0][pusch0 14336 prach0 1536] +[NR_PHY] [o_du0][pusch1 14336 prach1 1536] +[NR_PHY] [o_du0][pusch2 14336 prach2 1536] +[NR_PHY] [o_du0][pusch3 14336 prach3 1536] +[NR_PHY] [o-du 1][rx 63544 pps 63320 kbps 2763240][tx 127684 pps 127116 kbps 4717971][Total Msgs_Rcvd 63544] +[NR_PHY] [o_du1][pusch0 14350 prach0 1536] +[NR_PHY] [o_du1][pusch1 14350 prach1 1536] +[NR_PHY] [o_du1][pusch2 14350 prach2 1536] +[NR_PHY] [o_du1][pusch3 14350 prach3 1536] ``` You can also verify that there is signal on all RX antennas like so: ```bash $ cat nrL1_stats.log [...] -max_IO = 66 (81), min_I0 = 0 (53), avg_I0 = 51 dB(46.48.45.46.51.56.55.45.) -PRACH I0 = 38.0 dB +max_IO = 55 (85), min_I0 = 0 (136), avg_I0 = 44 dB(43.44.43.45.44.43.43.45.) +PRACH I0 = 30.6 dB ``` Note the eight entries after `avg_IO`. @@ -1119,7 +1159,7 @@ Your email should contain below information: - A clear subject in your email. - For all the queries there should be [Query\] in the subject of the email and for problems there should be [Problem\]. - In case of a problem, add a small description. -- Do not share any photos unless you want to share a diagram. +- Do not share any screenshots/photos unless you want to share a diagram. - OAI gNB/DU/CU/CU-CP/CU-UP configuration file in `.conf` format only. - Logs of OAI gNB/DU/CU/CU-CP/CU-UP in `.log` or `.txt` format only. - RU Vendor and Version.