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Merge branch 'trx_write_thread' into NR_RRCConfiguration_trx_thread

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Conflicts:
	executables/nr-ru.c
	targets/ARCH/USRP/USERSPACE/LIB/usrp_lib.cpp
This commit is contained in:
WANG Tsu-Han
2020-03-05 18:31:21 +01:00
parent f2bc346ab7 cc4a0c742e
commit e08b5c1c38
9 changed files with 212 additions and 48 deletions
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targets/ARCH/USRP/USERSPACE/LIB/usrp_lib.cpp
+134 -36
View File
@@ -49,6 +49,8 @@
#include "common_lib.h"
#include "assertions.h"
#include "common/utils/LOG/vcd_signal_dumper.h"
#include <sys/resource.h>
#include "usrp_lib.h"
@@ -413,43 +415,15 @@ static int trx_usrp_write(openair0_device *device,
int nsamps,
int cc,
int flags) {
int ret=0;
usrp_state_t *s = (usrp_state_t *)device->priv;
int nsamps2; // aligned to upper 32 or 16 byte boundary
int flags_lsb = flags&0xff;
int flags_msb = (flags>>8)&0xff;
#if defined(__x86_64) || defined(__i386__)
#ifdef __AVX2__
nsamps2 = (nsamps+7)>>3;
__m256i buff_tx[8][nsamps2];
#else
nsamps2 = (nsamps+3)>>2;
__m128i buff_tx[8][nsamps2];
#endif
#elif defined(__arm__)
nsamps2 = (nsamps+3)>>2;
int16x8_t buff_tx[8][nsamps2];
#else
#error Unsupported CPU architecture, USRP device cannot be built
#endif
// bring RX data into 12 LSBs for softmodem RX
for (int i=0; i<cc; i++) {
for (int j=0; j<nsamps2; j++) {
#if defined(__x86_64__) || defined(__i386__)
#ifdef __AVX2__
buff_tx[i][j] = _mm256_slli_epi16(((__m256i *)buff[i])[j],4);
#else
buff_tx[i][j] = _mm_slli_epi16(((__m128i *)buff[i])[j],4);
#endif
#elif defined(__arm__)
buff_tx[i][j] = vshlq_n_s16(((int16x8_t *)buff[i])[j],4);
#endif
}
}
int end;
openair0_thread_t *write_thread = &device->write_thread;
openair0_write_package_t *write_package = write_thread->write_package;
AssertFatal( MAX_WRITE_THREAD_BUFFER_SIZE >= cc,"Do not support more than %d cc number\n", MAX_WRITE_THREAD_BUFFER_SIZE);
boolean_t first_packet_state=false,last_packet_state=false;
@@ -481,11 +455,111 @@ static int trx_usrp_write(openair0_device *device,
first_packet_state = false;
last_packet_state = true;
}
pthread_mutex_lock(&write_thread->mutex_write);
if(write_thread->count_write >= MAX_WRITE_THREAD_PACKAGE){
LOG_W("Buffer overflow, count_write = %d, start = %d end = %d, resetting write package\n", write_thread->count_write, write_thread->start, write_thread->end);
write_thread->end = write_thread->start;
write_thread->count_write = 0;
}
end = write_thread->end;
write_package[end].timestamp = timestamp;
write_package[end].nsamps = nsamps;
write_package[end].cc = cc;
write_package[end].first_packet = first_packet_state;
write_package[end].last_packet = last_packet_state;
for (int i = 0; i < cc; i++)
write_package[end].buff[i] = buff[i];
write_thread->count_write++;
write_thread->end = (write_thread->end + 1)% MAX_WRITE_THREAD_PACKAGE;
pthread_cond_signal(&write_thread->cond_write);
pthread_mutex_unlock(&write_thread->mutex_write);
return 0;
}
//-----------------------start--------------------------
/*! \brief Called to send samples to the USRP RF target
@param device pointer to the device structure specific to the RF hardware target
@param timestamp The timestamp at which the first sample MUST be sent
@param buff Buffer which holds the samples
@param nsamps number of samples to be sent
@param antenna_id index of the antenna if the device has multiple antennas
@param flags flags must be set to TRUE if timestamp parameter needs to be applied
*/
void *trx_usrp_write_thread(void * arg){
int ret=0;
openair0_device *device=(openair0_device *)arg;
openair0_thread_t *write_thread = &device->write_thread;
openair0_write_package_t *write_package = write_thread->write_package;
usrp_state_t *s;
int nsamps2; // aligned to upper 32 or 16 byte boundary
int start;
openair0_timestamp timestamp;
void **buff;
int nsamps;
int cc;
signed char first_packet;
signed char last_packet;
while(1){
pthread_mutex_lock(&write_thread->mutex_write);
while (write_thread->count_write == 0) {
pthread_cond_wait(&write_thread->cond_write,&write_thread->mutex_write); // this unlocks mutex_rxtx while waiting and then locks it again
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_TRX_WRITE_THREAD, 1 );
s = (usrp_state_t *)device->priv;
start = write_thread->start;
timestamp = write_package[start].timestamp;
buff = write_package[start].buff;
nsamps = write_package[start].nsamps;
cc = write_package[start].cc;
first_packet = write_package[start].first_packet;
last_packet = write_package[start].last_packet;
write_thread->start = (write_thread->start + 1)% MAX_WRITE_THREAD_PACKAGE;
write_thread->count_write--;
pthread_mutex_unlock(&write_thread->mutex_write);
if(write_thread->count_write != 0){
LOG_W(HW,"count write = %d, start = %d, end = %d\n", write_thread->count_write, write_thread->start, write_thread->end);
}
#if defined(__x86_64) || defined(__i386__)
#ifdef __AVX2__
nsamps2 = (nsamps+7)>>3;
__m256i buff_tx[8][nsamps2];
#else
nsamps2 = (nsamps+3)>>2;
__m128i buff_tx[8][nsamps2];
#endif
#elif defined(__arm__)
nsamps2 = (nsamps+3)>>2;
int16x8_t buff_tx[8][nsamps2];
#else
#error Unsupported CPU architecture, USRP device cannot be built
#endif
// bring RX data into 12 LSBs for softmodem RX
for (int i=0; i<cc; i++) {
for (int j=0; j<nsamps2; j++) {
#if defined(__x86_64__) || defined(__i386__)
#ifdef __AVX2__
buff_tx[i][j] = _mm256_slli_epi16(((__m256i *)buff[i])[j],4);
#else
buff_tx[i][j] = _mm_slli_epi16(((__m128i *)buff[i])[j],4);
#endif
#elif defined(__arm__)
buff_tx[i][j] = vshlq_n_s16(((int16x8_t *)buff[i])[j],4);
#endif
}
}
s->tx_md.has_time_spec = true;
s->tx_md.start_of_burst = (s->tx_count==0) ? true : first_packet_state;
s->tx_md.end_of_burst = last_packet_state;
s->tx_md.start_of_burst = (s->tx_count==0) ? true : first_packet;
s->tx_md.end_of_burst = last_packet;
s->tx_md.time_spec = uhd::time_spec_t::from_ticks(timestamp, s->sample_rate);
s->tx_count++;
@@ -510,11 +584,34 @@ static int trx_usrp_write(openair0_device *device,
ret = (int)s->tx_stream->send(&(((int16_t *)buff_tx[0])[0]), nsamps, s->tx_md);
}
if (ret != nsamps) LOG_E(HW,"[xmit] tx samples %d != %d\n",ret,nsamps);
if (ret != nsamps) LOG_E(HW,"[xmit] tx samples %d != %d\n",ret,nsamps);
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_USRP_SEND_RETURN, ret );
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_TRX_WRITE_THREAD, 0 );
return ret;
if(0) break;
}
return NULL;
}
int trx_write_init(openair0_device *device){
uhd::set_thread_priority_safe(1.0);
openair0_thread_t *write_thread = &device->write_thread;
printf("initializing tx write thread\n");
write_thread->start = 0;
write_thread->end = 0;
write_thread->count_write = 0;
printf("end of tx write thread\n");
pthread_create(&write_thread->pthread_write,NULL,trx_usrp_write_thread,(void *)device);
return(0);
}
//---------------------end-------------------------
/*! \brief Receive samples from iq file.
* Read \ref nsamps samples from each channel to buffers. buff[0] is the array for
* the first channel. *ptimestamp is the time at which the first sample
@@ -944,6 +1041,7 @@ extern "C" {
device->trx_stop_func = trx_usrp_stop;
device->trx_set_freq_func = trx_usrp_set_freq;
device->trx_set_gains_func = trx_usrp_set_gains;
device->trx_write_init = trx_write_init;
if ( s->recplay_mode == RECPLAY_REPLAYMODE) {
// Replay subframes from from file