nr ue : frame configuration and pucch changes
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+82
-10
@@ -67,6 +67,69 @@ extern double cpuf;
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static nfapi_nr_config_request_t config_t;
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static nfapi_nr_config_request_t* config =&config_t;
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/*
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* NR SLOT PROCESSING SEQUENCE
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*
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* Processing occurs with following steps for connected mode:
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*
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* - Rx samples for a slot are received,
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* - PDCCH processing (including DCI extraction for downlink and uplink),
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* - PDSCH processing (including transport blocks decoding),
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* - PUCCH/PUSCH (transmission of acknowledgements, CSI, ... or data).
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*
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* Time between reception of the slot and related transmission depends on UE processing performance.
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* It is defined by the value NR_UE_CAPABILITY_SLOT_RX_TO_TX.
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*
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* In NR, network gives the duration between Rx slot and Tx slot in the DCI:
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* - for reception of a PDSCH and its associated acknowledgment slot (with a PUCCH or a PUSCH),
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* - for reception of an uplink grant and its associated PUSCH slot.
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*
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* So duration between reception and it associated transmission depends on its transmission slot given in the DCI.
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* NR_UE_CAPABILITY_SLOT_RX_TO_TX means the minimum duration but higher duration can be given by the network because UE can support it.
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*
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* Slot k
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* -------+------------+--------
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* Frame | Tx samples |
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* Subframe | buffer |
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* Slot n -------+------------+--------
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* ------ +------------+-------- |
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* | Rx samples | |
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* | buffer | |
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* -------+------------+-------- |
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* | |
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* V |
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* +------------+ |
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* | PDCCH | |
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* | processing | |
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* +------------+ |
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* | | |
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* | v |
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* | +------------+ |
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* | | PDSCH | |
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* | | processing | decoding result |
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* | +------------+ -> ACK/NACK of PDSCH |
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* | | |
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* | v |
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* | +-------------+------------+ |
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* | | PUCCH/PUSCH | Tx samples | |
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* | | processing | transfer | |
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* | +-------------+------------+ |
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* | |
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* |/___________________________________________________________\|
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* \ duration between reception and associated transmission /
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*
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* Remark: processing is done slot by slot, it can be distribute on different threads which are executed in parallel.
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* This is an architecture optimization in order to cope with real time constraints.
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* By example, for LTE, subframe processing is spread over 4 different threads.
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*
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*/
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#ifndef NO_RAT_NR
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#define DURATION_RX_TO_TX (NR_UE_CAPABILITY_SLOT_RX_TO_TX) /* for NR this will certainly depends to such UE capability which is not yet defined */
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#else
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#define DURATION_RX_TO_TX (4) /* For LTE, this duration is fixed to 4 and it is linked to LTE standard for both modes FDD/TDD */
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#endif
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#define FRAME_PERIOD 100000000ULL
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#define DAQ_PERIOD 66667ULL
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#define FIFO_PRIORITY 40
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@@ -586,9 +649,7 @@ static void *UE_thread_rxn_txnp4(void *arg) {
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#ifndef NO_RAT_NR
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// Process Rx data for one sub-frame
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nr_slot_t nr_slot ; //= slot_select_nr(&UE->frame_parms, proc->frame_tx, proc->nr_tti_tx);
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if (nr_slot == NR_TDD_DOWNLINK_SLOT) {
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if (slot_select_nr(&UE->frame_parms, proc->frame_tx, proc->nr_tti_tx) & NR_DOWNLINK_SLOT) {
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#else
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// Process Rx data for one sub-frame
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lte_subframe_t sf_type = subframe_select( &UE->frame_parms, proc->subframe_rx);
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@@ -695,11 +756,15 @@ static void *UE_thread_rxn_txnp4(void *arg) {
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// Prepare the future Tx data
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#if 0
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#ifndef NO_RAT_NR
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if (slot_select_nr(&UE->frame_parms, proc->frame_tx, proc->nr_tti_tx) & NR_UPLINK_SLOT)
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#else
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if ((subframe_select( &UE->frame_parms, proc->subframe_tx) == SF_UL) ||
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(UE->frame_parms.frame_type == FDD) )
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if (UE->mode != loop_through_memory)
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phy_procedures_UE_TX(UE,proc,0,0,UE->mode,no_relay);
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#endif
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#endif
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#if 0
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if ((subframe_select( &UE->frame_parms, proc->subframe_tx) == SF_S) &&
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(UE->frame_parms.frame_type == TDD))
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@@ -810,7 +875,7 @@ void *UE_thread(void *arg) {
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if (UE->mode != loop_through_memory) {
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for (int i=0; i<UE->frame_parms.nb_antennas_rx; i++)
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rxp[i] = (void*)&dummy_rx[i][0];
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for (int sf=0; sf<10; sf++)
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for (int sf=0; sf<LTE_NUMBER_OF_SUBFRAMES_PER_FRAME; sf++)
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// printf("Reading dummy sf %d\n",sf);
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UE->rfdevice.trx_read_func(&UE->rfdevice,
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×tamp,
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@@ -857,7 +922,8 @@ void *UE_thread(void *arg) {
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} else {
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tti_nr++;
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tti_nr%=10*UE->frame_parms.ttis_per_subframe;
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int ttis_per_frame = LTE_NUMBER_OF_SUBFRAMES_PER_FRAME*UE->frame_parms.ttis_per_subframe;
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tti_nr %= ttis_per_frame;
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UE_nr_rxtx_proc_t *proc = &UE->proc.proc_rxtx[thread_idx];
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// update thread index for received subframe
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UE->current_thread_id[tti_nr] = thread_idx;
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@@ -878,7 +944,7 @@ void *UE_thread(void *arg) {
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txp[i] = (void*)&UE->common_vars.txdata[i][((tti_nr+2)%10*UE->frame_parms.ttis_per_subframe)*UE->frame_parms.samples_per_tti];
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int readBlockSize, writeBlockSize;
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if (tti_nr<(10*UE->frame_parms.ttis_per_subframe-1)) {
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if (tti_nr<(ttis_per_frame - 1)) {
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readBlockSize=UE->frame_parms.samples_per_tti;
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writeBlockSize=UE->frame_parms.samples_per_tti;
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} else {
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@@ -917,7 +983,7 @@ void *UE_thread(void *arg) {
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writeBlockSize,
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UE->frame_parms.nb_antennas_tx,
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1),"");
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if( tti_nr==(10*UE->frame_parms.ttis_per_subframe-1)) {
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if( tti_nr==(ttis_per_frame-1)) {
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// read in first symbol of next frame and adjust for timing drift
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int first_symbols=writeBlockSize-readBlockSize;
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if ( first_symbols > 0 )
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@@ -954,13 +1020,19 @@ void *UE_thread(void *arg) {
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for (th_id=0; th_id < RX_NB_TH; th_id++) {
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UE->proc.proc_rxtx[th_id].gotIQs=readTime(gotIQs);
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}
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proc->nr_tti_rx=tti_nr;
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proc->nr_tti_tx=(tti_nr+4)%(10*UE->frame_parms.ttis_per_subframe);
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proc->subframe_rx=tti_nr>>((uint8_t)(log2 (UE->frame_parms.ttis_per_subframe)));
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proc->frame_tx = proc->frame_rx + (proc->subframe_rx>5?1:0);
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proc->frame_tx = proc->frame_rx;
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proc->nr_tti_tx= tti_nr + DURATION_RX_TO_TX;
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if (proc->nr_tti_tx > ttis_per_frame) {
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proc->frame_tx = (proc->frame_tx + 1)%MAX_FRAME_NUMBER;
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proc->nr_tti_tx %= ttis_per_frame;
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}
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proc->subframe_tx=(proc->nr_tti_tx)>>((uint8_t)(log2 (UE->frame_parms.ttis_per_subframe)));
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proc->timestamp_tx = timestamp+
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(4*UE->frame_parms.samples_per_tti)-
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(DURATION_RX_TO_TX*UE->frame_parms.samples_per_tti)-
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UE->frame_parms.ofdm_symbol_size-UE->frame_parms.nb_prefix_samples0;
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proc->instance_cnt_rxtx++;
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