change sched_ctrlCommon to be SIB1 specific and to allow to store search spaces for each SSB at pre-configuration
This commit is contained in:
@@ -345,8 +345,8 @@ static int set_bwconfig(char *buf, int debug, telnet_printfunc_t prnt)
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ERROR_MSG_RET("unhandled option %s\n", buf);
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ERROR_MSG_RET("unhandled option %s\n", buf);
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}
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}
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free(RC.nrmac[0]->sched_ctrlCommon);
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free(RC.nrmac[0]->sched_ctrlSIB1);
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RC.nrmac[0]->sched_ctrlCommon = NULL;
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RC.nrmac[0]->sched_ctrlSIB1 = NULL;
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free_MIB_NR(mac->common_channels[0].mib);
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free_MIB_NR(mac->common_channels[0].mib);
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mac->common_channels[0].mib = get_new_MIB_NR(scc);
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mac->common_channels[0].mib = get_new_MIB_NR(scc);
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@@ -777,21 +777,17 @@ static void initialize_beam_information(NR_beam_info_t *beam_info, int mu, int s
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}
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}
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}
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}
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static void config_sched_ctrlCommon(gNB_MAC_INST *nr_mac)
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static void config_sched_ctrlSIB1(gNB_MAC_INST *nr_mac)
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{
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{
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const NR_MIB_t *mib = nr_mac->common_channels[0].mib->message.choice.mib;
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const NR_MIB_t *mib = nr_mac->common_channels[0].mib->message.choice.mib;
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NR_ServingCellConfigCommon_t *scc = nr_mac->common_channels[0].ServingCellConfigCommon;
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NR_ServingCellConfigCommon_t *scc = nr_mac->common_channels[0].ServingCellConfigCommon;
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NR_UE_sched_ctrl_t *sched_ctrlCommon = calloc_or_fail(1, sizeof(*sched_ctrlCommon));
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NR_sched_ctrl_sib1_t *sched_ctrlCommon = calloc_or_fail(1, sizeof(*sched_ctrlCommon));
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nr_mac->sched_ctrlCommon = sched_ctrlCommon;
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nr_mac->sched_ctrlSIB1 = sched_ctrlCommon;
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sched_ctrlCommon->search_space = calloc_or_fail(1, sizeof(*sched_ctrlCommon->search_space));
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sched_ctrlCommon->coreset = calloc_or_fail(1, sizeof(*sched_ctrlCommon->coreset));
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NR_SubcarrierSpacing_t scs = *scc->ssbSubcarrierSpacing;
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NR_SubcarrierSpacing_t scs = *scc->ssbSubcarrierSpacing;
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const long band = *scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0];
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const long band = *scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0];
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const int bw = scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->carrierBandwidth;
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const int bw = scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->carrierBandwidth;
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uint16_t ssb_start_symbol = get_ssb_start_symbol(band, scs, 0);
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int8_t ssb_period = *scc->ssb_periodicityServingCell;
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int8_t ssb_period = *scc->ssb_periodicityServingCell;
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uint8_t ssb_frame_periodicity = 1;
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uint8_t ssb_frame_periodicity = 1;
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if (ssb_period > 1)
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if (ssb_period > 1)
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@@ -802,23 +798,27 @@ static void config_sched_ctrlCommon(gNB_MAC_INST *nr_mac)
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const int prb_offset = frequency_range == FR1 ? nr_mac->ssb_OffsetPointA >> scs : nr_mac->ssb_OffsetPointA >> (scs - 2);
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const int prb_offset = frequency_range == FR1 ? nr_mac->ssb_OffsetPointA >> scs : nr_mac->ssb_OffsetPointA >> (scs - 2);
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NR_Type0_PDCCH_CSS_config_t type0_PDCCH_CSS_config = {0};
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NR_Type0_PDCCH_CSS_config_t type0_PDCCH_CSS_config = {0};
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get_type0_PDCCH_CSS_config_parameters(&type0_PDCCH_CSS_config,
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for (int i = 0; i < get_max_ssbs(scc); i++) {
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0,
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if (is_ssb_configured(scc, i)) {
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mib,
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uint16_t ssb_start_symbol = get_ssb_start_symbol(band, scs, i);
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numb_slots_frame,
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get_type0_PDCCH_CSS_config_parameters(&type0_PDCCH_CSS_config,
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nr_mac->ssb_SubcarrierOffset,
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0,
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ssb_start_symbol,
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mib,
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scs,
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numb_slots_frame,
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frequency_range,
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nr_mac->ssb_SubcarrierOffset,
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band,
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ssb_start_symbol,
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bw,
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scs,
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0,
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frequency_range,
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ssb_frame_periodicity,
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band,
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prb_offset);
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bw,
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i,
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fill_searchSpaceZero(sched_ctrlCommon->search_space, numb_slots_frame, &type0_PDCCH_CSS_config);
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ssb_frame_periodicity,
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prb_offset);
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fill_coresetZero(sched_ctrlCommon->coreset, &type0_PDCCH_CSS_config);
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fill_searchSpaceZero(&sched_ctrlCommon->search_space[i], numb_slots_frame, &type0_PDCCH_CSS_config);
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}
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}
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// CSET0 doesn't depend on SSB index
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fill_coresetZero(&sched_ctrlCommon->coreset, &type0_PDCCH_CSS_config);
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nr_mac->cset0_bwp_start = type0_PDCCH_CSS_config.cset_start_rb;
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nr_mac->cset0_bwp_start = type0_PDCCH_CSS_config.cset_start_rb;
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nr_mac->cset0_bwp_size = type0_PDCCH_CSS_config.num_rbs;
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nr_mac->cset0_bwp_size = type0_PDCCH_CSS_config.num_rbs;
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}
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}
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@@ -890,7 +890,7 @@ void nr_mac_config_scc(gNB_MAC_INST *nrmac, NR_ServingCellConfigCommon_t *scc, c
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find_SSB_and_RO_available(nrmac);
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find_SSB_and_RO_available(nrmac);
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if (IS_SA_MODE(get_softmodem_params()))
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if (IS_SA_MODE(get_softmodem_params()))
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config_sched_ctrlCommon(nrmac);
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config_sched_ctrlSIB1(nrmac);
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seq_arr_init(&nrmac->ul_tda, sizeof(NR_tda_info_t));
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seq_arr_init(&nrmac->ul_tda, sizeof(NR_tda_info_t));
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init_ul_tda_info(scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList, &nrmac->ul_tda);
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init_ul_tda_info(scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList, &nrmac->ul_tda);
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@@ -114,57 +114,46 @@ static int encode_mib(NR_BCCH_BCH_Message_t *mib, frame_t frame, uint8_t *buffer
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return encode_size;
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return encode_size;
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}
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}
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static void schedule_one_ssb(gNB_MAC_INST *gNB,
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int get_max_ssbs(const NR_ServingCellConfigCommon_t *scc)
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nfapi_nr_dl_tti_request_body_t *dl_req,
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const long band,
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const NR_SubcarrierSpacing_t scs,
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const int i_ssb,
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const int rel_slot,
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const frame_t frameP,
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const slot_t slotP,
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const int CC_id,
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const uint8_t ssb_frame_periodicity,
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const frequency_range_t FR)
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{
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{
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// if start symbol is in current slot, schedule current SSB, fill VRB map and call get_type0_PDCCH_CSS_config_parameters
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int L_max = 0;
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const int slots_per_frame = gNB->frame_structure.numb_slots_frame;
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switch (scc->ssb_PositionsInBurst->present) {
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const uint16_t offset_pointa = gNB->ssb_OffsetPointA;
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case NR_ServingCellConfigCommon__ssb_PositionsInBurst_PR_shortBitmap:
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NR_COMMON_channels_t *cc = &gNB->common_channels[CC_id];
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L_max = 4;
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NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon;
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break;
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const NR_MIB_t *mib = cc->mib->message.choice.mib;
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case NR_ServingCellConfigCommon__ssb_PositionsInBurst_PR_mediumBitmap:
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uint32_t mib_pdu = (*(uint32_t *)cc->MIB_pdu) & ((1 << 24) - 1);
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L_max = 8;
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uint8_t ssbSubcarrierOffset = gNB->ssb_SubcarrierOffset;
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break;
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const int bw = scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->carrierBandwidth;
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case NR_ServingCellConfigCommon__ssb_PositionsInBurst_PR_longBitmap:
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uint16_t ssb_start_symbol = get_ssb_start_symbol(band, scs, i_ssb);
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L_max = 64;
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NR_beam_alloc_t beam =
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break;
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beam_allocation_procedure(&gNB->beam_info, frameP, slotP, get_beam_from_ssbidx(gNB, i_ssb), slots_per_frame);
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default:
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AssertFatal(beam.idx >= 0, "Cannot allocate SSB %d in any available beam\n", i_ssb);
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AssertFatal(false, "Invalid SSB configuration\n");
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const uint16_t beam_index =
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convert_to_fapi_beam(get_allocated_beam(&gNB->beam_info, frameP, slotP, slots_per_frame, beam.idx), gNB->beam_info.beam_mode);
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const int prb_offset = (FR == FR2) ? offset_pointa >> (scs - 2) : offset_pointa >> scs;
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schedule_ssb(frameP, slotP, scc, dl_req, i_ssb, beam_index, ssbSubcarrierOffset, offset_pointa, mib_pdu);
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fill_ssb_vrb_map(cc,
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prb_offset,
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(FR == FR2) ? ssbSubcarrierOffset >> (scs - 2) : ssbSubcarrierOffset,
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ssb_start_symbol,
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CC_id,
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beam.idx);
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if (IS_SA_MODE(get_softmodem_params())) {
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get_type0_PDCCH_CSS_config_parameters(&gNB->type0_PDCCH_CSS_config[i_ssb],
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frameP,
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mib,
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slots_per_frame,
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ssbSubcarrierOffset,
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ssb_start_symbol,
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scs,
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FR,
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band,
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bw,
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i_ssb,
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ssb_frame_periodicity,
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prb_offset);
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gNB->type0_PDCCH_CSS_config[i_ssb].active = true;
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}
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}
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return L_max;
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}
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bool is_ssb_configured(const NR_ServingCellConfigCommon_t *scc, int ssb_index)
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{
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const BIT_STRING_t *shortBitmap = &scc->ssb_PositionsInBurst->choice.shortBitmap;
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const BIT_STRING_t *mediumBitmap = &scc->ssb_PositionsInBurst->choice.mediumBitmap;
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const BIT_STRING_t *longBitmap = &scc->ssb_PositionsInBurst->choice.longBitmap;
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int pos = 0;
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switch (scc->ssb_PositionsInBurst->present) {
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case NR_ServingCellConfigCommon__ssb_PositionsInBurst_PR_shortBitmap:
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pos = shortBitmap->buf[0] >> (7 - ssb_index);
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break;
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case NR_ServingCellConfigCommon__ssb_PositionsInBurst_PR_mediumBitmap:
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pos = mediumBitmap->buf[0] >> (7 - ssb_index);
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break;
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case NR_ServingCellConfigCommon__ssb_PositionsInBurst_PR_longBitmap:
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pos = longBitmap->buf[ssb_index / 8] >> (7 - (ssb_index % 8));
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break;
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default:
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AssertFatal(false, "Invalid SSB configuration\n");
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}
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return pos & 0x01;
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}
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}
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void schedule_nr_mib(module_id_t module_idP, frame_t frameP, slot_t slotP, nfapi_nr_dl_tti_request_t *DL_req)
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void schedule_nr_mib(module_id_t module_idP, frame_t frameP, slot_t slotP, nfapi_nr_dl_tti_request_t *DL_req)
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@@ -175,6 +164,7 @@ void schedule_nr_mib(module_id_t module_idP, frame_t frameP, slot_t slotP, nfapi
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for (int CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++) {
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for (int CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++) {
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NR_COMMON_channels_t *cc = &gNB->common_channels[CC_id];
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NR_COMMON_channels_t *cc = &gNB->common_channels[CC_id];
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const NR_MIB_t *mib = cc->mib->message.choice.mib;
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NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon;
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NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon;
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const int slots_per_frame = gNB->frame_structure.numb_slots_frame;
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const int slots_per_frame = gNB->frame_structure.numb_slots_frame;
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dl_req = &DL_req->dl_tti_request_body;
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dl_req = &DL_req->dl_tti_request_body;
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@@ -195,6 +185,7 @@ void schedule_nr_mib(module_id_t module_idP, frame_t frameP, slot_t slotP, nfapi
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mib_sdu_length);
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mib_sdu_length);
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}
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}
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uint32_t mib_pdu = (*(uint32_t *)cc->MIB_pdu) & ((1 << 24) - 1);
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int8_t ssb_period = *scc->ssb_periodicityServingCell;
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int8_t ssb_period = *scc->ssb_periodicityServingCell;
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uint8_t ssb_frame_periodicity = 1; // every how many frames SSB are generated
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uint8_t ssb_frame_periodicity = 1; // every how many frames SSB are generated
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@@ -212,45 +203,45 @@ void schedule_nr_mib(module_id_t module_idP, frame_t frameP, slot_t slotP, nfapi
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NR_SubcarrierSpacing_t scs = *scc->ssbSubcarrierSpacing;
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NR_SubcarrierSpacing_t scs = *scc->ssbSubcarrierSpacing;
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const long band = *scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0];
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const long band = *scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0];
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const int bw = scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->carrierBandwidth;
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const BIT_STRING_t *shortBitmap = &scc->ssb_PositionsInBurst->choice.shortBitmap;
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const uint16_t offset_pointa = gNB->ssb_OffsetPointA;
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const BIT_STRING_t *mediumBitmap = &scc->ssb_PositionsInBurst->choice.mediumBitmap;
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uint8_t ssbSubcarrierOffset = gNB->ssb_SubcarrierOffset;
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const BIT_STRING_t *longBitmap = &scc->ssb_PositionsInBurst->choice.longBitmap;
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const int L_max = get_max_ssbs(scc);
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const frequency_range_t frequency_range = scc->ssb_PositionsInBurst->present == 3 ? FR2 : FR1;
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switch (scc->ssb_PositionsInBurst->present) {
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const int prb_offset = frequency_range == FR1 ? offset_pointa >> scs : offset_pointa >> (scs - 2);
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case 1:
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for (int i_ssb = 0; i_ssb < L_max; i_ssb++) {
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// short bitmap (<3GHz) max 4 SSBs
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if (is_ssb_configured(scc, i_ssb)) {
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for (int i_ssb = 0; i_ssb < 4; i_ssb++) {
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uint16_t ssb_start_symbol = get_ssb_start_symbol(band, scs, i_ssb);
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if ((shortBitmap->buf[0] >> (7 - i_ssb)) & 0x01) {
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// if start symbol is in current slot, schedule current SSB, fill VRB map and call get_type0_PDCCH_CSS_config_parameters
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uint16_t ssb_start_symbol = get_ssb_start_symbol(band, scs, i_ssb);
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if ((ssb_start_symbol / 14) == rel_slot) {
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if ((ssb_start_symbol / 14) == rel_slot)
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NR_beam_alloc_t beam = beam_allocation_procedure(&gNB->beam_info,
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schedule_one_ssb(gNB, dl_req, band, scs, i_ssb, rel_slot, frameP, slotP, CC_id, ssb_frame_periodicity, FR1);
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frameP,
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slotP,
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get_beam_from_ssbidx(gNB, i_ssb),
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slots_per_frame);
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AssertFatal(beam.idx >= 0, "Cannot allocate SSB %d in any available beam\n", i_ssb);
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const uint16_t alloc_beam_idx = get_allocated_beam(&gNB->beam_info, frameP, slotP, slots_per_frame, beam.idx);
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const uint16_t fapi_beam = convert_to_fapi_beam(alloc_beam_idx, gNB->beam_info.beam_mode);
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schedule_ssb(frameP, slotP, scc, dl_req, i_ssb, fapi_beam, ssbSubcarrierOffset, offset_pointa, mib_pdu);
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fill_ssb_vrb_map(cc, prb_offset, ssbSubcarrierOffset, ssb_start_symbol, CC_id, beam.idx);
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if (IS_SA_MODE(get_softmodem_params())) {
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get_type0_PDCCH_CSS_config_parameters(&gNB->type0_PDCCH_CSS_config[i_ssb],
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frameP,
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mib,
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slots_per_frame,
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ssbSubcarrierOffset,
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ssb_start_symbol,
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scs,
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frequency_range,
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band,
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bw,
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i_ssb,
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ssb_frame_periodicity,
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prb_offset);
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gNB->type0_PDCCH_CSS_config[i_ssb].active = true;
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}
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}
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}
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}
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break;
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}
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case 2:
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// medium bitmap (<6GHz) max 8 SSBs
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for (int i_ssb = 0; i_ssb < 8; i_ssb++) {
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if ((mediumBitmap->buf[0] >> (7 - i_ssb)) & 0x01) {
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uint16_t ssb_start_symbol = get_ssb_start_symbol(band, scs, i_ssb);
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if ((ssb_start_symbol / 14) == rel_slot)
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schedule_one_ssb(gNB, dl_req, band, scs, i_ssb, rel_slot, frameP, slotP, CC_id, ssb_frame_periodicity, FR1);
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}
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}
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break;
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case 3:
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// long bitmap FR2 max 64 SSBs
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for (int i_ssb = 0; i_ssb < 64; i_ssb++) {
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if ((longBitmap->buf[i_ssb / 8] >> (7 - (i_ssb % 8))) & 0x01) {
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uint16_t ssb_start_symbol = get_ssb_start_symbol(band, scs, i_ssb);
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if ((ssb_start_symbol / 14) == rel_slot)
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schedule_one_ssb(gNB, dl_req, band, scs, i_ssb, rel_slot, frameP, slotP, CC_id, ssb_frame_periodicity, FR2);
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}
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}
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|
||||||
break;
|
|
||||||
default:
|
|
||||||
AssertFatal(0,"SSB bitmap size value %d undefined (allowed values 1,2,3)\n",
|
|
||||||
scc->ssb_PositionsInBurst->present);
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@@ -556,8 +547,8 @@ void schedule_nr_sib1(module_id_t module_idP,
|
|||||||
AssertFatal(beam.idx >= 0, "Cannot allocate SIB1 corresponding to SSB %d in any available beam\n", i);
|
AssertFatal(beam.idx >= 0, "Cannot allocate SIB1 corresponding to SSB %d in any available beam\n", i);
|
||||||
LOG_D(NR_MAC,"(%d.%d) SIB1 transmission: ssb_index %d\n", frameP, slotP, type0_PDCCH_CSS_config->ssb_index);
|
LOG_D(NR_MAC,"(%d.%d) SIB1 transmission: ssb_index %d\n", frameP, slotP, type0_PDCCH_CSS_config->ssb_index);
|
||||||
NR_sched_pdcch_t sched_pdcch = set_pdcch_structure(NULL,
|
NR_sched_pdcch_t sched_pdcch = set_pdcch_structure(NULL,
|
||||||
gNB_mac->sched_ctrlCommon->search_space,
|
&gNB_mac->sched_ctrlSIB1->search_space[i],
|
||||||
gNB_mac->sched_ctrlCommon->coreset,
|
&gNB_mac->sched_ctrlSIB1->coreset,
|
||||||
scc,
|
scc,
|
||||||
NULL,
|
NULL,
|
||||||
type0_PDCCH_CSS_config);
|
type0_PDCCH_CSS_config);
|
||||||
@@ -566,7 +557,7 @@ void schedule_nr_sib1(module_id_t module_idP,
|
|||||||
for (int c = 0; c < 3; c++) {
|
for (int c = 0; c < 3; c++) {
|
||||||
find_aggregation_candidates(&aggregation_level,
|
find_aggregation_candidates(&aggregation_level,
|
||||||
&nr_of_candidates,
|
&nr_of_candidates,
|
||||||
gNB_mac->sched_ctrlCommon->search_space,
|
&gNB_mac->sched_ctrlSIB1->search_space[i],
|
||||||
4 << c);
|
4 << c);
|
||||||
if (nr_of_candidates > 0)
|
if (nr_of_candidates > 0)
|
||||||
break; // choosing the lower value of aggregation level available
|
break; // choosing the lower value of aggregation level available
|
||||||
@@ -578,7 +569,7 @@ void schedule_nr_sib1(module_id_t module_idP,
|
|||||||
nr_of_candidates,
|
nr_of_candidates,
|
||||||
beam.idx,
|
beam.idx,
|
||||||
&sched_pdcch,
|
&sched_pdcch,
|
||||||
gNB_mac->sched_ctrlCommon->coreset,
|
&gNB_mac->sched_ctrlSIB1->coreset,
|
||||||
0);
|
0);
|
||||||
|
|
||||||
bool res = false;
|
bool res = false;
|
||||||
@@ -607,8 +598,8 @@ void schedule_nr_sib1(module_id_t module_idP,
|
|||||||
nr_fill_nfapi_dl_SIB_pdu(gNB_mac,
|
nr_fill_nfapi_dl_SIB_pdu(gNB_mac,
|
||||||
&gNB_mac->sib1_pdsch[i],
|
&gNB_mac->sib1_pdsch[i],
|
||||||
&sched_pdcch,
|
&sched_pdcch,
|
||||||
gNB_mac->sched_ctrlCommon->search_space,
|
&gNB_mac->sched_ctrlSIB1->search_space[i],
|
||||||
gNB_mac->sched_ctrlCommon->coreset,
|
&gNB_mac->sched_ctrlSIB1->coreset,
|
||||||
aggregation_level,
|
aggregation_level,
|
||||||
cce_index,
|
cce_index,
|
||||||
dl_req,
|
dl_req,
|
||||||
|
|||||||
@@ -397,7 +397,7 @@ NR_ControlResourceSet_t *get_coreset(gNB_MAC_INST *nrmac,
|
|||||||
NR_ControlResourceSetId_t coreset_id)
|
NR_ControlResourceSetId_t coreset_id)
|
||||||
{
|
{
|
||||||
if (coreset_id == 0) {
|
if (coreset_id == 0) {
|
||||||
return nrmac->sched_ctrlCommon->coreset; // this is coreset 0
|
return &nrmac->sched_ctrlSIB1->coreset; // this is coreset 0
|
||||||
}
|
}
|
||||||
if (bwp_dedicated) {
|
if (bwp_dedicated) {
|
||||||
const int n = bwp_dedicated->pdcch_Config->choice.setup->controlResourceSetToAddModList->list.count;
|
const int n = bwp_dedicated->pdcch_Config->choice.setup->controlResourceSetToAddModList->list.count;
|
||||||
|
|||||||
@@ -39,7 +39,8 @@
|
|||||||
void set_cset_offset(uint16_t);
|
void set_cset_offset(uint16_t);
|
||||||
void get_K1_K2(int N1, int N2, int *K1, int *K2, int layers);
|
void get_K1_K2(int N1, int N2, int *K1, int *K2, int layers);
|
||||||
int get_NTN_Koffset(const NR_ServingCellConfigCommon_t *scc);
|
int get_NTN_Koffset(const NR_ServingCellConfigCommon_t *scc);
|
||||||
|
bool is_ssb_configured(const NR_ServingCellConfigCommon_t *scc, int ssb_index);
|
||||||
|
int get_max_ssbs(const NR_ServingCellConfigCommon_t *scc);
|
||||||
int get_first_ul_slot(const frame_structure_t *fs, bool mixed);
|
int get_first_ul_slot(const frame_structure_t *fs, bool mixed);
|
||||||
int get_ul_slots_per_period(const frame_structure_t *fs);
|
int get_ul_slots_per_period(const frame_structure_t *fs);
|
||||||
int get_ul_slots_per_frame(const frame_structure_t *fs);
|
int get_ul_slots_per_frame(const frame_structure_t *fs);
|
||||||
|
|||||||
@@ -883,6 +883,11 @@ typedef struct dlul_mac_stats {
|
|||||||
mac_stats_t ul;
|
mac_stats_t ul;
|
||||||
} dlul_mac_stats_t;
|
} dlul_mac_stats_t;
|
||||||
|
|
||||||
|
typedef struct {
|
||||||
|
NR_SearchSpace_t search_space[MAX_NUM_OF_SSB];
|
||||||
|
NR_ControlResourceSet_t coreset;
|
||||||
|
} NR_sched_ctrl_sib1_t;
|
||||||
|
|
||||||
/// helper type to encapsulate a frame/slot combination in a single type.
|
/// helper type to encapsulate a frame/slot combination in a single type.
|
||||||
/// Currently only used in the UL preprocessor. Note: if you use this type
|
/// Currently only used in the UL preprocessor. Note: if you use this type
|
||||||
/// further, please refactor it into a common type first.
|
/// further, please refactor it into a common type first.
|
||||||
@@ -979,11 +984,11 @@ typedef struct gNB_MAC_INST_s {
|
|||||||
nr_mac_config_t radio_config;
|
nr_mac_config_t radio_config;
|
||||||
nr_rlc_configuration_t rlc_config;
|
nr_rlc_configuration_t rlc_config;
|
||||||
|
|
||||||
NR_UE_sched_ctrl_t *sched_ctrlCommon;
|
NR_sched_ctrl_sib1_t *sched_ctrlSIB1;
|
||||||
NR_sched_pdcch_t *sched_pdcch_otherSI;
|
NR_sched_pdcch_t *sched_pdcch_otherSI;
|
||||||
uint16_t cset0_bwp_start;
|
uint16_t cset0_bwp_start;
|
||||||
uint16_t cset0_bwp_size;
|
uint16_t cset0_bwp_size;
|
||||||
NR_Type0_PDCCH_CSS_config_t type0_PDCCH_CSS_config[64];
|
NR_Type0_PDCCH_CSS_config_t type0_PDCCH_CSS_config[MAX_NUM_OF_SSB];
|
||||||
|
|
||||||
bool first_MIB;
|
bool first_MIB;
|
||||||
NR_bler_options_t dl_bler;
|
NR_bler_options_t dl_bler;
|
||||||
|
|||||||
Reference in New Issue
Block a user