diff --git a/ci-scripts/Jenkinsfile-trig-nsa b/ci-scripts/Jenkinsfile-trig-nsa index 4a56270e90..7b4238d678 100644 --- a/ci-scripts/Jenkinsfile-trig-nsa +++ b/ci-scripts/Jenkinsfile-trig-nsa @@ -88,7 +88,15 @@ pipeline { // booleanParam(name: 'eNB_mergeRequest', value: Boolean.valueOf(ALLOW_MERGE)) //] //calling OAIUE N310 - build job: "RAN-SA-OAIUE-N310-CN5G", wait : true, propagate : false, parameters: [ + //build job: "RAN-SA-OAIUE-N310-CN5G", wait : true, propagate : false, parameters: [ + // string(name: 'eNB_MR', value: String.valueOf(MR)), + // string(name: 'eNB_Branch', value: String.valueOf(SRC_BRANCH)), + // string(name: 'eNB_CommitID', value: String.valueOf(COMMIT_ID)), + // string(name: 'eNB_TargetBranch', value: String.valueOf(TARGET_BRANCH)), + // booleanParam(name: 'eNB_mergeRequest', value: Boolean.valueOf(ALLOW_MERGE)) + //] + //calling OAIUE N310-X300 + build job: "RAN-SA-OAIUE-N310-X300-CN5G", wait : true, propagate : false, parameters: [ string(name: 'eNB_MR', value: String.valueOf(MR)), string(name: 'eNB_Branch', value: String.valueOf(SRC_BRANCH)), string(name: 'eNB_CommitID', value: String.valueOf(COMMIT_ID)), @@ -96,7 +104,6 @@ pipeline { booleanParam(name: 'eNB_mergeRequest', value: Boolean.valueOf(ALLOW_MERGE)) ] - } } } diff --git a/ci-scripts/checkCodingFormattingRules.sh b/ci-scripts/checkCodingFormattingRules.sh index 45cf08aa9a..a805f765df 100755 --- a/ci-scripts/checkCodingFormattingRules.sh +++ b/ci-scripts/checkCodingFormattingRules.sh @@ -77,7 +77,7 @@ then IS_NFAPI=`echo $FILE | egrep -c "nfapi/open-nFAPI|nfapi/oai_integration/vendor_ext" || true` IS_OAI_LICENCE_PRESENT=`egrep -c "OAI Public License" $FILE || true` IS_BSD_LICENCE_PRESENT=`egrep -c "the terms of the BSD Licence|License-Identifier: BSD-2-Clause" $FILE || true` - IS_EXCEPTION=`echo $FILE | egrep -c "common/utils/collection/tree.h|common/utils/collection/queue.h|common/utils/itti_analyzer/common/queue.h|openair3/UTILS/tree.h|openair3/UTILS/queue.h|openair3/GTPV1-U/nw-gtpv1u|openair2/UTIL/OPT/ws_|openair2/UTIL/OPT/packet-rohc.h|openair3/NAS/COMMON/milenage.h" || true` + IS_EXCEPTION=`echo $FILE | egrep -c "common/utils/collection/tree.h|common/utils/collection/queue.h|common/utils/itti_analyzer/common/queue.h|openair3/UTILS/tree.h|openair3/UTILS/queue.h|openair3/GTPV1-U/nw-gtpv1u|openair2/UTIL/OPT/ws_|openair2/UTIL/OPT/packet-rohc.h|openair3/NAS/COMMON/milenage.h|openair1/PHY/CODING/crc|openair1/PHY/CODING/types.h" || true` if [ $IS_OAI_LICENCE_PRESENT -eq 0 ] && [ $IS_BSD_LICENCE_PRESENT -eq 0 ] then if [ $IS_NFAPI -eq 0 ] && [ $IS_EXCEPTION -eq 0 ] @@ -198,7 +198,7 @@ do IS_NFAPI=`echo $FULLFILE | egrep -c "nfapi/open-nFAPI|nfapi/oai_integration/vendor_ext" || true` IS_OAI_LICENCE_PRESENT=`egrep -c "OAI Public License" $FULLFILE || true` IS_BSD_LICENCE_PRESENT=`egrep -c "the terms of the BSD Licence|License-Identifier: BSD-2-Clause" $FULLFILE || true` - IS_EXCEPTION=`echo $FULLFILE | egrep -c "common/utils/collection/tree.h|common/utils/collection/queue.h|common/utils/itti_analyzer/common/queue.h|openair3/UTILS/tree.h|openair3/UTILS/queue.h|openair3/GTPV1-U/nw-gtpv1u|openair2/UTIL/OPT/ws_|openair2/UTIL/OPT/packet-rohc.h|openair3/NAS/COMMON/milenage.h" || true` + IS_EXCEPTION=`echo $FULLFILE | egrep -c "common/utils/collection/tree.h|common/utils/collection/queue.h|common/utils/itti_analyzer/common/queue.h|openair3/UTILS/tree.h|openair3/UTILS/queue.h|openair3/GTPV1-U/nw-gtpv1u|openair2/UTIL/OPT/ws_|openair2/UTIL/OPT/packet-rohc.h|openair3/NAS/COMMON/milenage.h|openair1/PHY/CODING/crc|openair1/PHY/CODING/types.h" || true` if [ $IS_OAI_LICENCE_PRESENT -eq 0 ] && [ $IS_BSD_LICENCE_PRESENT -eq 0 ] then if [ $IS_NFAPI -eq 0 ] && [ $IS_EXCEPTION -eq 0 ] diff --git a/ci-scripts/conf_files/benetel-5g.conf b/ci-scripts/conf_files/benetel-5g.conf index 47898aad15..79b2f7f877 100644 --- a/ci-scripts/conf_files/benetel-5g.conf +++ b/ci-scripts/conf_files/benetel-5g.conf @@ -54,15 +54,6 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 0; initialDLBWPsearchSpaceZero = 0; - #pdsch-ConfigCommon - #pdschTimeDomainAllocationList (up to 16 entries) - initialDLBWPk0_0 = 0; #for DL slot - initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB - initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 - - initialDLBWPk0_1 = 0; #for mixed slot - initialDLBWPmappingType_1 = 0; - initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5 #uplinkConfigCommon #frequencyInfoUL @@ -119,19 +110,6 @@ gNBs = # restrictedSetConfig # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, - # pusch-ConfigCommon (up to 16 elements) - initialULBWPk2_0 = 2; # used for UL slot - initialULBWPmappingType_0 = 1 - initialULBWPstartSymbolAndLength_0 = 55; # this is SS=0 L=12 - - initialULBWPk2_1 = 2; # used for mixed slot - initialULBWPmappingType_1 = 1; - initialULBWPstartSymbolAndLength_1 = 69; # this is SS=10 L=2 - - initialULBWPk2_2 = 7; # used for Msg.3 during RA - initialULBWPmappingType_2 = 1; - initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4 - msg3_DeltaPreamble = 1; #p0_NominalWithGrant =-90; diff --git a/ci-scripts/conf_files/enb.band38.lte_2x2.100PRB.usrpn310.conf b/ci-scripts/conf_files/enb.band38.lte_2x2.100PRB.usrpn310.conf index d2e91fb872..758bb44879 100644 --- a/ci-scripts/conf_files/enb.band38.lte_2x2.100PRB.usrpn310.conf +++ b/ci-scripts/conf_files/enb.band38.lte_2x2.100PRB.usrpn310.conf @@ -237,7 +237,7 @@ RUs = ( max_pdschReferenceSignalPower = -27; max_rxgain = 75; eNB_instances = [0]; - sdr_addrs = "mgmt_addr=192.168.18.241,addr=192.168.20.2,second_addr=192.168.10.2"; + sdr_addrs = "mgmt_addr=192.168.18.241,addr=192.168.10.2"; } ); diff --git a/ci-scripts/conf_files/enb.band38.nsa_2x2.100PRB.usrpn310.conf b/ci-scripts/conf_files/enb.band38.nsa_2x2.100PRB.usrpn310.conf index 6c8d5ba6f0..d1d32e2b58 100644 --- a/ci-scripts/conf_files/enb.band38.nsa_2x2.100PRB.usrpn310.conf +++ b/ci-scripts/conf_files/enb.band38.nsa_2x2.100PRB.usrpn310.conf @@ -237,7 +237,7 @@ RUs = ( max_pdschReferenceSignalPower = -27; max_rxgain = 75; eNB_instances = [0]; - sdr_addrs = "mgmt_addr=192.168.18.241,addr=192.168.20.2,second_addr=192.168.10.2"; + sdr_addrs = "mgmt_addr=192.168.18.241,addr=192.168.10.2"; } ); diff --git a/ci-scripts/conf_files/gNB_SA_n78_106PRB.2x2_usrpn310.conf b/ci-scripts/conf_files/gNB_SA_n78_106PRB.2x2_usrpn310.conf index 9bf3136690..77693d5f72 100644 --- a/ci-scripts/conf_files/gNB_SA_n78_106PRB.2x2_usrpn310.conf +++ b/ci-scripts/conf_files/gNB_SA_n78_106PRB.2x2_usrpn310.conf @@ -89,19 +89,6 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 11; initialDLBWPsearchSpaceZero = 0; - #pdsch-ConfigCommon - #pdschTimeDomainAllocationList (up to 16 entries) - initialDLBWPk0_0 = 0; - #initialULBWPmappingType - #0=typeA,1=typeB - initialDLBWPmappingType_0 = 0; - #this is SS=1,L=13 - initialDLBWPstartSymbolAndLength_0 = 40; - - initialDLBWPk0_1 = 0; - initialDLBWPmappingType_1 = 0; - #this is SS=1,L=5 - initialDLBWPstartSymbolAndLength_1 = 57; #uplinkConfigCommon #frequencyInfoUL @@ -156,22 +143,6 @@ gNBs = # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, - # pusch-ConfigCommon (up to 16 elements) - initialULBWPk2_0 = 2; - initialULBWPmappingType_0 = 1 - # this is SS=2 L=13 - initialULBWPstartSymbolAndLength_0 = 41; - - initialULBWPk2_1 = 2; - initialULBWPmappingType_1 = 1; - # this is SS=0 L=4 - initialULBWPstartSymbolAndLength_1 = 52; - - initialULBWPk2_2 = 7; - initialULBWPmappingType_2 = 1; - # this is SS=10 L=4 - initialULBWPstartSymbolAndLength_2 = 52; - msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/ci-scripts/conf_files/gNB_SA_n78_133PRB.2x2_usrpn310.conf b/ci-scripts/conf_files/gNB_SA_n78_133PRB.2x2_usrpn310.conf index dfbbdf659d..c9b369eaff 100644 --- a/ci-scripts/conf_files/gNB_SA_n78_133PRB.2x2_usrpn310.conf +++ b/ci-scripts/conf_files/gNB_SA_n78_133PRB.2x2_usrpn310.conf @@ -86,19 +86,6 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 10; initialDLBWPsearchSpaceZero = 0; - #pdsch-ConfigCommon - #pdschTimeDomainAllocationList (up to 16 entries) - initialDLBWPk0_0 = 0; - #initialULBWPmappingType - #0=typeA,1=typeB - initialDLBWPmappingType_0 = 0; - #this is SS=1,L=13 - initialDLBWPstartSymbolAndLength_0 = 40; - - initialDLBWPk0_1 = 0; - initialDLBWPmappingType_1 = 0; - #this is SS=1,L=5 - initialDLBWPstartSymbolAndLength_1 = 57; #uplinkConfigCommon #frequencyInfoUL @@ -153,22 +140,6 @@ gNBs = # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, - # pusch-ConfigCommon (up to 16 elements) - initialULBWPk2_0 = 6; - initialULBWPmappingType_0 = 1 - # this is SS=2 L=13 - initialULBWPstartSymbolAndLength_0 = 41; - - initialULBWPk2_1 = 6; - initialULBWPmappingType_1 = 1; - # this is SS=0 L=4 - initialULBWPstartSymbolAndLength_1 = 52; - - initialULBWPk2_2 = 7; - initialULBWPmappingType_2 = 1; - # this is SS=10 L=4 - initialULBWPstartSymbolAndLength_2 = 52; - msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/ci-scripts/conf_files/gnb.band261.tm1.32PRB.usrpn300.conf b/ci-scripts/conf_files/gnb.band261.tm1.32PRB.usrpn300.conf index e93177e7cc..4338c00b36 100644 --- a/ci-scripts/conf_files/gnb.band261.tm1.32PRB.usrpn300.conf +++ b/ci-scripts/conf_files/gnb.band261.tm1.32PRB.usrpn300.conf @@ -24,7 +24,7 @@ gNBs = ssb_SubcarrierOffset = 0; pdsch_AntennaPorts = 1; pusch_AntennaPorts = 1; - min_rxtxtime_pdsch = 6; + min_rxtxtime = 6; servingCellConfigCommon = ( { @@ -55,15 +55,6 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 12; initialDLBWPsearchSpaceZero = 0; - #pdsch-ConfigCommon - #pdschTimeDomainAllocationList (up to 16 entries) - initialDLBWPk0_0 = 0; #for DL slot - initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB - initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 - - initialDLBWPk0_3 = 0; #for mixed slot - initialDLBWPmappingType_3 = 0; - initialDLBWPstartSymbolAndLength_3 = 57; #this is SS=1,L=5 #uplinkConfigCommon #frequencyInfoUL @@ -118,21 +109,6 @@ gNBs = # restrictedSetConfig # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, - # pusch-ConfigCommon (up to 16 elements) - initialULBWPk2_0 = 6; - initialULBWPmappingType_0 = 1 - # this is SS=0 L=11 - initialULBWPstartSymbolAndLength_0 = 41; - - initialULBWPk2_1 = 6; - initialULBWPmappingType_1 = 1; - # this is SS=0 L=12 - initialULBWPstartSymbolAndLength_1 = 69; - - initialULBWPk2_2 = 14; - initialULBWPmappingType_2 = 1; - # this is SS=10 L=4 - initialULBWPstartSymbolAndLength_2 = 52; msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/ci-scripts/conf_files/gnb.band66.tm1.106PRB.usrpn300.conf b/ci-scripts/conf_files/gnb.band66.tm1.106PRB.usrpn300.conf index 850cf9a60c..1c2133bebe 100644 --- a/ci-scripts/conf_files/gnb.band66.tm1.106PRB.usrpn300.conf +++ b/ci-scripts/conf_files/gnb.band66.tm1.106PRB.usrpn300.conf @@ -24,6 +24,7 @@ gNBs = ssb_SubcarrierOffset = 0; pdsch_AntennaPorts = 1; pusch_AntennaPorts = 1; + min_rxtxtime = 6; servingCellConfigCommon = ( { @@ -54,15 +55,6 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 12; initialDLBWPsearchSpaceZero = 0; - #pdsch-ConfigCommon - #pdschTimeDomainAllocationList (up to 16 entries) - initialDLBWPk0_0 = 0; #for DL slot - initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB - initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 - - initialDLBWPk0_3 = 0; #for mixed slot - initialDLBWPmappingType_3 = 0; - initialDLBWPstartSymbolAndLength_3 = 57; #this is SS=1,L=5 #uplinkConfigCommon #frequencyInfoUL @@ -118,18 +110,6 @@ gNBs = # restrictedSetConfig # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, - # pusch-ConfigCommon (up to 16 elements) - initialULBWPk2_0 = 6; # used for UL slot - initialULBWPmappingType_0 = 1 - initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 - - initialULBWPk2_1 = 6; # used for mixed slot - initialULBWPmappingType_1 = 1; - initialULBWPstartSymbolAndLength_1 = 69; # this is SS=10 L=2 - - initialULBWPk2_2 = 7; # used for Msg.3 during RA - initialULBWPmappingType_2 = 1; - initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4 msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/ci-scripts/conf_files/gnb.band78.nsa_2x2.106PRB.usrpn310.conf b/ci-scripts/conf_files/gnb.band78.nsa_2x2.106PRB.usrpn310.conf index c8dc1477b0..b0a757c9d0 100644 --- a/ci-scripts/conf_files/gnb.band78.nsa_2x2.106PRB.usrpn310.conf +++ b/ci-scripts/conf_files/gnb.band78.nsa_2x2.106PRB.usrpn310.conf @@ -55,15 +55,6 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 0; initialDLBWPsearchSpaceZero = 0; - #pdsch-ConfigCommon - #pdschTimeDomainAllocationList (up to 16 entries) - initialDLBWPk0_0 = 0; #for DL slot - initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB - initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 - - initialDLBWPk0_1 = 0; #for mixed slot - initialDLBWPmappingType_1 = 0; - initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5 #uplinkConfigCommon #frequencyInfoUL @@ -118,18 +109,6 @@ gNBs = # restrictedSetConfig # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, - # pusch-ConfigCommon (up to 16 elements) - initialULBWPk2_0 = 2; # used for UL slot - initialULBWPmappingType_0 = 1 - initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 - - initialULBWPk2_1 = 2; # used for mixed slot - initialULBWPmappingType_1 = 1; - initialULBWPstartSymbolAndLength_1 = 24; # this is SS=10 L=2 - - initialULBWPk2_2 = 7; # used for Msg.3 during RA - initialULBWPmappingType_2 = 1; - initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4 msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/ci-scripts/conf_files/gnb.band78.sa.fr1.106PRB.2x2.usrpn310.conf b/ci-scripts/conf_files/gnb.band78.sa.fr1.106PRB.2x2.usrpn310.conf index e8be5a6ef0..16456f939c 100644 --- a/ci-scripts/conf_files/gnb.band78.sa.fr1.106PRB.2x2.usrpn310.conf +++ b/ci-scripts/conf_files/gnb.band78.sa.fr1.106PRB.2x2.usrpn310.conf @@ -90,19 +90,6 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 11; initialDLBWPsearchSpaceZero = 0; - #pdsch-ConfigCommon - #pdschTimeDomainAllocationList (up to 16 entries) - initialDLBWPk0_0 = 0; - #initialULBWPmappingType - #0=typeA,1=typeB - initialDLBWPmappingType_0 = 0; - #this is SS=1,L=13 - initialDLBWPstartSymbolAndLength_0 = 40; - - initialDLBWPk0_1 = 0; - initialDLBWPmappingType_1 = 0; - #this is SS=1,L=5 - initialDLBWPstartSymbolAndLength_1 = 57; #uplinkConfigCommon #frequencyInfoUL @@ -157,22 +144,6 @@ gNBs = # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, - # pusch-ConfigCommon (up to 16 elements) - initialULBWPk2_0 = 6; - initialULBWPmappingType_0 = 1 - # this is SS=2 L=13 - initialULBWPstartSymbolAndLength_0 = 41; - - initialULBWPk2_1 = 6; - initialULBWPmappingType_1 = 1; - # this is SS=0 L=4 - initialULBWPstartSymbolAndLength_1 = 52; - - initialULBWPk2_2 = 7; - initialULBWPmappingType_2 = 1; - # this is SS=10 L=4 - initialULBWPstartSymbolAndLength_2 = 52; - msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/ci-scripts/conf_files/gnb.band78.sa.fr1.106PRB.usrpn310.conf b/ci-scripts/conf_files/gnb.band78.sa.fr1.106PRB.usrpn310.conf index f00a343089..ff05aa6e65 100644 --- a/ci-scripts/conf_files/gnb.band78.sa.fr1.106PRB.usrpn310.conf +++ b/ci-scripts/conf_files/gnb.band78.sa.fr1.106PRB.usrpn310.conf @@ -1,343 +1,316 @@ -Active_gNBs = ( "gNB-OAI"); -# Asn1_verbosity, choice in: none, info, annoying -Asn1_verbosity = "none"; - -gNBs = -( - { - ////////// Identification parameters: - gNB_CU_ID = 0xe00; - -# cell_type = "CELL_MACRO_GNB"; - - gNB_name = "gNB-OAI"; - min_rxtxtime_pdsch = 6; - - // Tracking area code, 0x0000 and 0xfffe are reserved values - tracking_area_code = 1; - - plmn_list = ({ - mcc = 208; - mnc = 97; - mnc_length = 2; - snssaiList = ( - { - sst = 1; - sd = 0x010203; // 0 false, else true - }, - { - sst = 1; - sd = 0x112233; // 0 false, else true - } - ); - }); - - nr_cellid = 12345678L - -# tr_s_preference = "local_mac" - - ////////// Physical parameters: - - ssb_SubcarrierOffset = 0; - pdsch_AntennaPorts = 1; - pusch_AntennaPorts = 1; - #pusch_TargetSNRx10 = 200; - #pucch_TargetSNRx10 = 200; - ul_prbblacklist = "51,52,53,54" - - pdcch_ConfigSIB1 = ( - { - controlResourceSetZero = 11; - searchSpaceZero = 0; - } - ); - - servingCellConfigCommon = ( - { - #spCellConfigCommon - - physCellId = 0; - -# downlinkConfigCommon - #frequencyInfoDL - # this is 3301.68 MHz + 22*12*30e-3 MHz = 3309.6 - #absoluteFrequencySSB = 620640; - # this is 3300.60 MHz + 53*12*30e-3 MHz = 3319.68 - absoluteFrequencySSB = 621312; - # this is 3503.28 MHz + 22*12*30e-3 MHz = 3511.2 - #absoluteFrequencySSB = 634080; - # this is 3600.48 MHz - #absoluteFrequencySSB = 640032; - #dl_frequencyBand = 78; - # this is 3301.68 MHz - #dl_absoluteFrequencyPointA = 620112; - # this is 3300.60 MHz - dl_absoluteFrequencyPointA = 620040; - # this is 3502.56 MHz - #dl_absoluteFrequencyPointA = 633552; - # this is 3600.48 MHz - #dl_absoluteFrequencyPointA = 640032; - #scs-SpecificCarrierList - dl_offstToCarrier = 0; -# subcarrierSpacing -# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 - dl_subcarrierSpacing = 1; - dl_carrierBandwidth = 106; - #initialDownlinkBWP - #genericParameters - # this is RBstart=0,L=106 (275*(L-1))+RBstart - initialDLBWPlocationAndBandwidth = 28875; -# subcarrierSpacing -# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 - initialDLBWPsubcarrierSpacing = 1; - #pdcch-ConfigCommon - initialDLBWPcontrolResourceSetZero = 11; - initialDLBWPsearchSpaceZero = 0; - #pdsch-ConfigCommon - #pdschTimeDomainAllocationList (up to 16 entries) - initialDLBWPk0_0 = 0; - #initialULBWPmappingType - #0=typeA,1=typeB - initialDLBWPmappingType_0 = 0; - #this is SS=1,L=13 - initialDLBWPstartSymbolAndLength_0 = 40; - - initialDLBWPk0_1 = 0; - initialDLBWPmappingType_1 = 0; - #this is SS=1,L=5 - initialDLBWPstartSymbolAndLength_1 = 57; - - #uplinkConfigCommon - #frequencyInfoUL - ul_frequencyBand = 78; - #scs-SpecificCarrierList - ul_offstToCarrier = 0; -# subcarrierSpacing -# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 - ul_subcarrierSpacing = 1; - ul_carrierBandwidth = 106; - pMax = 20; - #initialUplinkBWP - #genericParameters - initialULBWPlocationAndBandwidth = 28875; -# subcarrierSpacing -# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 - initialULBWPsubcarrierSpacing = 1; - #rach-ConfigCommon - #rach-ConfigGeneric - prach_ConfigurationIndex = 98; -#prach_msg1_FDM -#0 = one, 1=two, 2=four, 3=eight - prach_msg1_FDM = 0; - prach_msg1_FrequencyStart = 0; - zeroCorrelationZoneConfig = 12; - preambleReceivedTargetPower = -104; -#preamblTransMax (0...10) = (3,4,5,6,7,8,10,20,50,100,200) - preambleTransMax = 6; -#powerRampingStep -# 0=dB0,1=dB2,2=dB4,3=dB6 - powerRampingStep = 1; -#ra_ReponseWindow -#1,2,4,8,10,20,40,80 - ra_ResponseWindow = 4; -#ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR -#1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen - ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 3; -#oneHalf (0..15) 4,8,12,16,...60,64 - ssb_perRACH_OccasionAndCB_PreamblesPerSSB = 15; -#ra_ContentionResolutionTimer -#(0..7) 8,16,24,32,40,48,56,64 - ra_ContentionResolutionTimer = 7; - rsrp_ThresholdSSB = 19; -#prach-RootSequenceIndex_PR -#1 = 839, 2 = 139 - prach_RootSequenceIndex_PR = 2; - prach_RootSequenceIndex = 1; - # SCS for msg1, can only be 15 for 30 kHz < 6 GHz, takes precendence over the one derived from prach-ConfigIndex - # - msg1_SubcarrierSpacing = 1, -# restrictedSetConfig -# 0=unrestricted, 1=restricted type A, 2=restricted type B - restrictedSetConfig = 0, - - # pusch-ConfigCommon (up to 16 elements) - initialULBWPk2_0 = 6; - initialULBWPmappingType_0 = 1 - # this is SS=2 L=13 - initialULBWPstartSymbolAndLength_0 = 41; - - initialULBWPk2_1 = 6; - initialULBWPmappingType_1 = 1; - # this is SS=0 L=4 - initialULBWPstartSymbolAndLength_1 = 52; - - initialULBWPk2_2 = 7; - initialULBWPmappingType_2 = 1; - # this is SS=10 L=4 - initialULBWPstartSymbolAndLength_2 = 52; - - msg3_DeltaPreamble = 1; - p0_NominalWithGrant =-90; - -# pucch-ConfigCommon setup : -# pucchGroupHopping -# 0 = neither, 1= group hopping, 2=sequence hopping - pucchGroupHopping = 0; - hoppingId = 40; - p0_nominal = -90; -# ssb_PositionsInBurs_BitmapPR -# 1=short, 2=medium, 3=long - ssb_PositionsInBurst_PR = 2; - ssb_PositionsInBurst_Bitmap = 1; - -# ssb_periodicityServingCell -# 0 = ms5, 1=ms10, 2=ms20, 3=ms40, 4=ms80, 5=ms160, 6=spare2, 7=spare1 - ssb_periodicityServingCell = 2; - -# dmrs_TypeA_position -# 0 = pos2, 1 = pos3 - dmrs_TypeA_Position = 0; - -# subcarrierSpacing -# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 - subcarrierSpacing = 1; - - - #tdd-UL-DL-ConfigurationCommon -# subcarrierSpacing -# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 - referenceSubcarrierSpacing = 1; - # pattern1 - # dl_UL_TransmissionPeriodicity - # 0=ms0p5, 1=ms0p625, 2=ms1, 3=ms1p25, 4=ms2, 5=ms2p5, 6=ms5, 7=ms10 - dl_UL_TransmissionPeriodicity = 6; - nrofDownlinkSlots = 7; - nrofDownlinkSymbols = 6; - nrofUplinkSlots = 2; - nrofUplinkSymbols = 4; - - ssPBCH_BlockPower = -25; - } - - ); - - - # ------- SCTP definitions - SCTP : - { - # Number of streams to use in input/output - SCTP_INSTREAMS = 2; - SCTP_OUTSTREAMS = 2; - }; - - ////////// AMF parameters: - amf_ip_address = ( { ipv4 = "CI_MME_IP_ADDR"; - ipv6 = "192:168:30::17"; - active = "yes"; - preference = "ipv4"; - } - ); - - NETWORK_INTERFACES : - { - - GNB_INTERFACE_NAME_FOR_NG_AMF = "em1"; - GNB_IPV4_ADDRESS_FOR_NG_AMF = "CI_GNB_IP_ADDR"; - GNB_INTERFACE_NAME_FOR_NGU = "em1"; - GNB_IPV4_ADDRESS_FOR_NGU = "CI_GNB_IP_ADDR"; - GNB_PORT_FOR_S1U = 2152; # Spec 2152 - }; - - } -); - -MACRLCs = ( - { - num_cc = 1; - tr_s_preference = "local_L1"; - tr_n_preference = "local_RRC"; - pusch_TargetSNRx10 = 200; - pucch_TargetSNRx10 = 200; - ulsch_max_frame_inactivity = 1; - } -); - -L1s = ( - { - num_cc = 1; - tr_n_preference = "local_mac"; - pusch_proc_threads = 2; - prach_dtx_threshold = 120; -# pucch0_dtx_threshold = 150; - } -); - -RUs = ( - { - local_rf = "yes" - nb_tx = 1 - nb_rx = 1 - att_tx = 0 - att_rx = 0; - bands = [78]; - max_pdschReferenceSignalPower = -27; - max_rxgain = 75; - eNB_instances = [0]; - ##beamforming 1x2 matrix: 1 layer x 2 antennas - bf_weights = [0x00007fff, 0x0000]; - ##beamforming 1x4 matrix: 1 layer x 4 antennas - #bf_weights = [0x00007fff, 0x0000,0x0000, 0x0000]; - ## beamforming 2x2 matrix: - # bf_weights = [0x00007fff, 0x00000000, 0x00000000, 0x00007fff]; - ## beamforming 4x4 matrix: - #bf_weights = [0x00007fff, 0x0000, 0x0000, 0x0000, 0x00000000, 0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00007fff]; - sf_extension = 0 - sdr_addrs = "mgmt_addr=192.168.18.240,addr=192.168.10.2,second_addr=192.168.20.2,clock_source=internal,time_source=internal" - } -); - -THREAD_STRUCT = ( - { - #three config for level of parallelism "PARALLEL_SINGLE_THREAD", "PARALLEL_RU_L1_SPLIT", or "PARALLEL_RU_L1_TRX_SPLIT" - parallel_config = "PARALLEL_SINGLE_THREAD"; - #two option for worker "WORKER_DISABLE" or "WORKER_ENABLE" - worker_config = "WORKER_ENABLE"; - } -); - -security = { - # preferred ciphering algorithms - # the first one of the list that an UE supports in chosen - # valid values: nea0, nea1, nea2, nea3 - ciphering_algorithms = ( "nea0" ); - - # preferred integrity algorithms - # the first one of the list that an UE supports in chosen - # valid values: nia0, nia1, nia2, nia3 - integrity_algorithms = ( "nia2", "nia0" ); - - # setting 'drb_ciphering' to "no" disables ciphering for DRBs, no matter - # what 'ciphering_algorithms' configures; same thing for 'drb_integrity' - drb_ciphering = "yes"; - drb_integrity = "no"; -}; - - log_config : - { - global_log_level ="info"; - global_log_verbosity ="medium"; - hw_log_level ="info"; - hw_log_verbosity ="medium"; - phy_log_level ="info"; - phy_log_verbosity ="medium"; - mac_log_level ="info"; - mac_log_verbosity ="high"; - rlc_log_level ="info"; - rlc_log_verbosity ="medium"; - pdcp_log_level ="info"; - pdcp_log_verbosity ="medium"; - rrc_log_level ="info"; - rrc_log_verbosity ="medium"; - f1ap_log_level ="debug"; - f1ap_log_verbosity ="medium"; - }; +Active_gNBs = ( "gNB-OAI"); +# Asn1_verbosity, choice in: none, info, annoying +Asn1_verbosity = "none"; + +gNBs = +( + { + ////////// Identification parameters: + gNB_CU_ID = 0xe00; + +# cell_type = "CELL_MACRO_GNB"; + + gNB_name = "gNB-OAI"; + min_rxtxtime_pdsch = 6; + + // Tracking area code, 0x0000 and 0xfffe are reserved values + tracking_area_code = 1; + + plmn_list = ({ + mcc = 208; + mnc = 97; + mnc_length = 2; + snssaiList = ( + { + sst = 1; + sd = 0x010203; // 0 false, else true + }, + { + sst = 1; + sd = 0x112233; // 0 false, else true + } + ); + }); + + nr_cellid = 12345678L + +# tr_s_preference = "local_mac" + + ////////// Physical parameters: + + ssb_SubcarrierOffset = 0; + pdsch_AntennaPorts = 1; + pusch_AntennaPorts = 1; + #pusch_TargetSNRx10 = 200; + #pucch_TargetSNRx10 = 200; + ul_prbblacklist = "51,52,53,54" + + pdcch_ConfigSIB1 = ( + { + controlResourceSetZero = 11; + searchSpaceZero = 0; + } + ); + + servingCellConfigCommon = ( + { + #spCellConfigCommon + + physCellId = 0; + +# downlinkConfigCommon + #frequencyInfoDL + # this is 3301.68 MHz + 22*12*30e-3 MHz = 3309.6 + #absoluteFrequencySSB = 620640; + # this is 3300.60 MHz + 53*12*30e-3 MHz = 3319.68 + absoluteFrequencySSB = 621312; + # this is 3503.28 MHz + 22*12*30e-3 MHz = 3511.2 + #absoluteFrequencySSB = 634080; + # this is 3600.48 MHz + #absoluteFrequencySSB = 640032; + #dl_frequencyBand = 78; + # this is 3301.68 MHz + #dl_absoluteFrequencyPointA = 620112; + # this is 3300.60 MHz + dl_absoluteFrequencyPointA = 620040; + # this is 3502.56 MHz + #dl_absoluteFrequencyPointA = 633552; + # this is 3600.48 MHz + #dl_absoluteFrequencyPointA = 640032; + #scs-SpecificCarrierList + dl_offstToCarrier = 0; +# subcarrierSpacing +# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 + dl_subcarrierSpacing = 1; + dl_carrierBandwidth = 106; + #initialDownlinkBWP + #genericParameters + # this is RBstart=0,L=106 (275*(L-1))+RBstart + initialDLBWPlocationAndBandwidth = 28875; +# subcarrierSpacing +# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 + initialDLBWPsubcarrierSpacing = 1; + #pdcch-ConfigCommon + initialDLBWPcontrolResourceSetZero = 11; + initialDLBWPsearchSpaceZero = 0; + + + + #uplinkConfigCommon + #frequencyInfoUL + ul_frequencyBand = 78; + #scs-SpecificCarrierList + ul_offstToCarrier = 0; +# subcarrierSpacing +# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 + ul_subcarrierSpacing = 1; + ul_carrierBandwidth = 106; + pMax = 20; + #initialUplinkBWP + #genericParameters + initialULBWPlocationAndBandwidth = 28875; +# subcarrierSpacing +# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 + initialULBWPsubcarrierSpacing = 1; + #rach-ConfigCommon + #rach-ConfigGeneric + prach_ConfigurationIndex = 98; +#prach_msg1_FDM +#0 = one, 1=two, 2=four, 3=eight + prach_msg1_FDM = 0; + prach_msg1_FrequencyStart = 0; + zeroCorrelationZoneConfig = 12; + preambleReceivedTargetPower = -104; +#preamblTransMax (0...10) = (3,4,5,6,7,8,10,20,50,100,200) + preambleTransMax = 6; +#powerRampingStep +# 0=dB0,1=dB2,2=dB4,3=dB6 + powerRampingStep = 1; +#ra_ReponseWindow +#1,2,4,8,10,20,40,80 + ra_ResponseWindow = 4; +#ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR +#1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen + ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 3; +#oneHalf (0..15) 4,8,12,16,...60,64 + ssb_perRACH_OccasionAndCB_PreamblesPerSSB = 15; +#ra_ContentionResolutionTimer +#(0..7) 8,16,24,32,40,48,56,64 + ra_ContentionResolutionTimer = 7; + rsrp_ThresholdSSB = 19; +#prach-RootSequenceIndex_PR +#1 = 839, 2 = 139 + prach_RootSequenceIndex_PR = 2; + prach_RootSequenceIndex = 1; + # SCS for msg1, can only be 15 for 30 kHz < 6 GHz, takes precendence over the one derived from prach-ConfigIndex + # + msg1_SubcarrierSpacing = 1, +# restrictedSetConfig +# 0=unrestricted, 1=restricted type A, 2=restricted type B + restrictedSetConfig = 0, + + msg3_DeltaPreamble = 1; + p0_NominalWithGrant =-90; + +# pucch-ConfigCommon setup : +# pucchGroupHopping +# 0 = neither, 1= group hopping, 2=sequence hopping + pucchGroupHopping = 0; + hoppingId = 40; + p0_nominal = -90; +# ssb_PositionsInBurs_BitmapPR +# 1=short, 2=medium, 3=long + ssb_PositionsInBurst_PR = 2; + ssb_PositionsInBurst_Bitmap = 1; + +# ssb_periodicityServingCell +# 0 = ms5, 1=ms10, 2=ms20, 3=ms40, 4=ms80, 5=ms160, 6=spare2, 7=spare1 + ssb_periodicityServingCell = 2; + +# dmrs_TypeA_position +# 0 = pos2, 1 = pos3 + dmrs_TypeA_Position = 0; + +# subcarrierSpacing +# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 + subcarrierSpacing = 1; + + + #tdd-UL-DL-ConfigurationCommon +# subcarrierSpacing +# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 + referenceSubcarrierSpacing = 1; + # pattern1 + # dl_UL_TransmissionPeriodicity + # 0=ms0p5, 1=ms0p625, 2=ms1, 3=ms1p25, 4=ms2, 5=ms2p5, 6=ms5, 7=ms10 + dl_UL_TransmissionPeriodicity = 6; + nrofDownlinkSlots = 7; + nrofDownlinkSymbols = 6; + nrofUplinkSlots = 2; + nrofUplinkSymbols = 4; + + ssPBCH_BlockPower = -25; + } + + ); + + + # ------- SCTP definitions + SCTP : + { + # Number of streams to use in input/output + SCTP_INSTREAMS = 2; + SCTP_OUTSTREAMS = 2; + }; + + ////////// AMF parameters: + amf_ip_address = ( { ipv4 = "CI_MME_IP_ADDR"; + ipv6 = "192:168:30::17"; + active = "yes"; + preference = "ipv4"; + } + ); + + NETWORK_INTERFACES : + { + + GNB_INTERFACE_NAME_FOR_NG_AMF = "em1"; + GNB_IPV4_ADDRESS_FOR_NG_AMF = "CI_GNB_IP_ADDR"; + GNB_INTERFACE_NAME_FOR_NGU = "em1"; + GNB_IPV4_ADDRESS_FOR_NGU = "CI_GNB_IP_ADDR"; + GNB_PORT_FOR_S1U = 2152; # Spec 2152 + }; + + } +); + +MACRLCs = ( + { + num_cc = 1; + tr_s_preference = "local_L1"; + tr_n_preference = "local_RRC"; + pusch_TargetSNRx10 = 200; + pucch_TargetSNRx10 = 200; + ulsch_max_frame_inactivity = 1; + } +); + +L1s = ( + { + num_cc = 1; + tr_n_preference = "local_mac"; + pusch_proc_threads = 4; + prach_dtx_threshold = 120; +# pucch0_dtx_threshold = 150; + } +); + +RUs = ( + { + local_rf = "yes" + nb_tx = 1 + nb_rx = 1 + att_tx = 0 + att_rx = 0; + bands = [78]; + max_pdschReferenceSignalPower = -27; + max_rxgain = 75; + eNB_instances = [0]; + ##beamforming 1x2 matrix: 1 layer x 2 antennas + bf_weights = [0x00007fff, 0x0000]; + ##beamforming 1x4 matrix: 1 layer x 4 antennas + #bf_weights = [0x00007fff, 0x0000,0x0000, 0x0000]; + ## beamforming 2x2 matrix: + # bf_weights = [0x00007fff, 0x00000000, 0x00000000, 0x00007fff]; + ## beamforming 4x4 matrix: + #bf_weights = [0x00007fff, 0x0000, 0x0000, 0x0000, 0x00000000, 0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00007fff]; + sf_extension = 0 + sdr_addrs = "mgmt_addr=192.168.18.240,addr=192.168.10.2,second_addr=192.168.20.2,clock_source=internal,time_source=internal" + } +); + +THREAD_STRUCT = ( + { + #three config for level of parallelism "PARALLEL_SINGLE_THREAD", "PARALLEL_RU_L1_SPLIT", or "PARALLEL_RU_L1_TRX_SPLIT" + parallel_config = "PARALLEL_SINGLE_THREAD"; + #two option for worker "WORKER_DISABLE" or "WORKER_ENABLE" + worker_config = "WORKER_ENABLE"; + } +); + +security = { + # preferred ciphering algorithms + # the first one of the list that an UE supports in chosen + # valid values: nea0, nea1, nea2, nea3 + ciphering_algorithms = ( "nea0" ); + + # preferred integrity algorithms + # the first one of the list that an UE supports in chosen + # valid values: nia0, nia1, nia2, nia3 + integrity_algorithms = ( "nia2", "nia0" ); + + # setting 'drb_ciphering' to "no" disables ciphering for DRBs, no matter + # what 'ciphering_algorithms' configures; same thing for 'drb_integrity' + drb_ciphering = "yes"; + drb_integrity = "no"; +}; + + log_config : + { + global_log_level ="info"; + global_log_verbosity ="medium"; + hw_log_level ="info"; + hw_log_verbosity ="medium"; + phy_log_level ="info"; + phy_log_verbosity ="medium"; + mac_log_level ="info"; + mac_log_verbosity ="high"; + rlc_log_level ="info"; + rlc_log_verbosity ="medium"; + pdcp_log_level ="info"; + pdcp_log_verbosity ="medium"; + rrc_log_level ="info"; + rrc_log_verbosity ="medium"; + f1ap_log_level ="debug"; + f1ap_log_verbosity ="medium"; + }; diff --git a/ci-scripts/conf_files/gnb.band78.tm1.106PRB.usrpn300.conf b/ci-scripts/conf_files/gnb.band78.tm1.106PRB.usrpn300.conf index 4200300c50..6ade355053 100644 --- a/ci-scripts/conf_files/gnb.band78.tm1.106PRB.usrpn300.conf +++ b/ci-scripts/conf_files/gnb.band78.tm1.106PRB.usrpn300.conf @@ -24,7 +24,7 @@ gNBs = ssb_SubcarrierOffset = 0; pdsch_AntennaPorts = 1; pusch_AntennaPorts = 1; - min_rxtxtime_pdsch = 6; + min_rxtxtime = 6; servingCellConfigCommon = ( { @@ -55,15 +55,6 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 12; initialDLBWPsearchSpaceZero = 0; - #pdsch-ConfigCommon - #pdschTimeDomainAllocationList (up to 16 entries) - initialDLBWPk0_0 = 0; #for DL slot - initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB - initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 - - initialDLBWPk0_1 = 0; #for mixed slot - initialDLBWPmappingType_1 = 0; - initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5 #uplinkConfigCommon #frequencyInfoUL @@ -118,19 +109,6 @@ gNBs = # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, - # pusch-ConfigCommon (up to 16 elements) - initialULBWPk2_0 = 6; # used for UL slot - initialULBWPmappingType_0 = 1 - initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 - - initialULBWPk2_1 = 6; # used for mixed slot - initialULBWPmappingType_1 = 1; - initialULBWPstartSymbolAndLength_1 = 38; # this is SS=10 L=3 - - initialULBWPk2_2 = 7; # used for Msg.3 during RA - initialULBWPmappingType_2 = 1; - initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4 - msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/ci-scripts/conf_files/gnb.band78.tm1.fr1.106PRB.usrpb210.conf b/ci-scripts/conf_files/gnb.band78.tm1.fr1.106PRB.usrpb210.conf index 015d9ee0d0..b7a04b1f36 100644 --- a/ci-scripts/conf_files/gnb.band78.tm1.fr1.106PRB.usrpb210.conf +++ b/ci-scripts/conf_files/gnb.band78.tm1.fr1.106PRB.usrpb210.conf @@ -52,15 +52,6 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 0; initialDLBWPsearchSpaceZero = 0; - #pdsch-ConfigCommon - #pdschTimeDomainAllocationList (up to 16 entries) - initialDLBWPk0_0 = 0; #for DL slot - initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB - initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 - - initialDLBWPk0_1 = 0; #for mixed slot - initialDLBWPmappingType_1 = 0; - initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5 #uplinkConfigCommon #frequencyInfoUL @@ -115,18 +106,6 @@ gNBs = # restrictedSetConfig # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, - # pusch-ConfigCommon (up to 16 elements) - initialULBWPk2_0 = 6; # used for UL slot - initialULBWPmappingType_0 = 1 - initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 - - initialULBWPk2_1 = 6; # used for mixed slot - initialULBWPmappingType_1 = 1; - initialULBWPstartSymbolAndLength_1 = 52; # this is SS=10 L=4 - - initialULBWPk2_2 = 7; # used for Msg.3 during RA - initialULBWPmappingType_2 = 1; - initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4 msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/ci-scripts/conf_files/gnb.band78.tm1.fr1.106PRB.usrpn310.conf b/ci-scripts/conf_files/gnb.band78.tm1.fr1.106PRB.usrpn310.conf index e6bbbf2d41..299a19cc4e 100644 --- a/ci-scripts/conf_files/gnb.band78.tm1.fr1.106PRB.usrpn310.conf +++ b/ci-scripts/conf_files/gnb.band78.tm1.fr1.106PRB.usrpn310.conf @@ -53,19 +53,6 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 0; initialDLBWPsearchSpaceZero = 0; - #pdsch-ConfigCommon - #pdschTimeDomainAllocationList (up to 16 entries) - initialDLBWPk0_0 = 0; - #initialULBWPmappingType - #0=typeA,1=typeB - initialDLBWPmappingType_0 = 0;#for DL slot - #this is SS=1,L=13 - initialDLBWPstartSymbolAndLength_0 = 40; - - initialDLBWPk0_1 = 0;#for mixed slot - initialDLBWPmappingType_1 = 0; - #this is SS=1,L=5 - initialDLBWPstartSymbolAndLength_1 = 57; #uplinkConfigCommon #frequencyInfoUL @@ -120,21 +107,6 @@ gNBs = # restrictedSetConfig # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, - # pusch-ConfigCommon (up to 16 elements) - initialULBWPk2_0 = 2; - initialULBWPmappingType_0 = 1 - # this is SS=0 L=11 - initialULBWPstartSymbolAndLength_0 = 41; - - initialULBWPk2_1 = 2; - initialULBWPmappingType_1 = 1; - # this is SS=0 L=12 - initialULBWPstartSymbolAndLength_1 = 69; - - initialULBWPk2_2 = 7; - initialULBWPmappingType_2 = 1; - # this is SS=10 L=4 - initialULBWPstartSymbolAndLength_2 = 52; msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/ci-scripts/xml_files/fr1_nsa_2x2_quectel.xml b/ci-scripts/xml_files/fr1_nsa_2x2_quectel.xml index 86af12b53e..2516af9429 100644 --- a/ci-scripts/xml_files/fr1_nsa_2x2_quectel.xml +++ b/ci-scripts/xml_files/fr1_nsa_2x2_quectel.xml @@ -24,7 +24,7 @@ TEST-NSA-FR1-TM2-Tab1 NSA 2x2 Ping DL UL with QUECTEL tasks - 5 + 1 030000 040000 diff --git a/ci-scripts/xml_files/fr1_nsa_2x2_quectel_attach_detach.xml b/ci-scripts/xml_files/fr1_nsa_2x2_quectel_attach_detach.xml index 2d17ff38e2..52cf1ec6e8 100644 --- a/ci-scripts/xml_files/fr1_nsa_2x2_quectel_attach_detach.xml +++ b/ci-scripts/xml_files/fr1_nsa_2x2_quectel_attach_detach.xml @@ -24,7 +24,7 @@ TEST-NSA-FR1-TM2-Tab2 NSA 2x2 Attach-Detach with QUECTEL tasks - 5 + 1 031000 041000 diff --git a/ci-scripts/xml_files/fr1_sa_oaiue_n310.xml b/ci-scripts/xml_files/fr1_sa_oaiue_n310.xml index 28eee1e224..cd79e49f2c 100644 --- a/ci-scripts/xml_files/fr1_sa_oaiue_n310.xml +++ b/ci-scripts/xml_files/fr1_sa_oaiue_n310.xml @@ -22,7 +22,7 @@ --> TEST-SA-FR1-Tab1 - SA Ping DL UL with OAI NR UE + SA Ping DL UL with OAI NR UE (N310) tasks 1 @@ -40,9 +40,9 @@ Initialize_OAI_UE - Initialize OAI UE + Initialize OAI UE (N310) nr - --sa -O ../../../ci-scripts/conf_files/ue.sa.conf --usrp-args "mgmt_addr=192.168.18.241,addr=192.168.20.2,second_addr=192.168.10.2" --numerology 1 -r 106 --band 78 -C 3319680000 --nokrnmod 1 --ue-txgain 0 --ue-rxgain 70 --ue-fo-compensation + --sa -O ../../../ci-scripts/conf_files/ue.sa.conf --usrp-args "mgmt_addr=192.168.18.241,second_addr=192.168.10.2" --numerology 1 -r 106 --band 78 -C 3319680000 --nokrnmod 1 --ue-txgain 0 --ue-rxgain 70 --ue-fo-compensation diff --git a/ci-scripts/xml_files/fr1_sa_oaiue_x300.xml b/ci-scripts/xml_files/fr1_sa_oaiue_x300.xml new file mode 100644 index 0000000000..d527737b3c --- /dev/null +++ b/ci-scripts/xml_files/fr1_sa_oaiue_x300.xml @@ -0,0 +1,123 @@ + + + TEST-SA-FR1-Tab2 + SA Ping DL UL with OAI NR UE (X300) + tasks + 1 + + 040000 + 000002 + 010000 + 000002 + 050000 + 050001 + 000001 + 010002 + 080000 + + + + + Initialize_OAI_UE + Initialize OAI UE (X300) + nr + --sa -O ../../../ci-scripts/conf_files/ue.sa.conf --usrp-args "addr=192.168.60.2" --numerology 1 -r 106 --band 78 -C 3319680000 --nokrnmod 1 --ue-txgain 0 --ue-rxgain 70 --ue-fo-compensation + + + + Terminate_OAI_UE + Terminate OAI UE + + + + + Initialize_eNB + Initialize gNB + -O ci-scripts/conf_files/gnb.band78.sa.fr1.106PRB.usrpn310.conf --sa --usrp-tx-thread-config 1 + 0 + 0 + nr + yes + yes + 192.168.18.240 + + + + IdleSleep + Sleep + 5 + + + + IdleSleep + Sleep + 20 + + + + + Ping + Ping from CN to UE: 20pings in 20sec + -c 20 + 5 + + + + Ping + Ping from CN to UE: 100pings in 20sec + -c 100 -i 0.2 + 5 + + + + Iperf + iperf (DL/60Mbps/UDP)(60 sec)(single-ue profile) + -u -b 60M -t 60 + DL + nrmodule2_quectel + 5 + single-ue + + + + Iperf + iperf (UL/3Mbps/UDP)(60 sec)(single-ue profile) + -u -b 3M -t 60 + UL + nrmodule2_quectel + 5 + single-ue + + + + + Terminate_eNB + Terminate gNB + 0 + 0 + nr + + + + diff --git a/ci-scripts/xml_files/fr1_sa_quectel_60MHz.xml b/ci-scripts/xml_files/fr1_sa_quectel_60MHz.xml new file mode 100644 index 0000000000..2088678707 --- /dev/null +++ b/ci-scripts/xml_files/fr1_sa_quectel_60MHz.xml @@ -0,0 +1,129 @@ + + + TEST-SA-FR1-Tab3 + SA Ping DL UL with QUECTEL + tasks + 1 + + 040000 + 000002 + 010000 + 000001 + 050000 + 050001 + 070000 + 070001 + 000001 + 010002 + 080000 + + + + + Initialize_UE + Initialize Quectel + nrmodule2_quectel + yes + + + + + Terminate_UE + Terminate Quectel + nrmodule2_quectel + + + + + Initialize_eNB + Initialize gNB + -O ci-scripts/conf_files/gnb.band78.sa.fr1.162PRB.2x2.usrpn310.conf --sa -q --usrp-tx-thread-config 1 + 0 + 0 + nr + yes + yes + 192.168.18.240 + + + + IdleSleep + Sleep + 5 + + + + IdleSleep + Sleep + 20 + + + + + Ping + Ping: 20pings in 20sec + nrmodule2_quectel + -c 20 + 5 + + + + Ping + Ping: 100pings in 20sec + nrmodule2_quectel + -c 100 -i 0,2 + 5 + + + + Iperf + iperf (DL/140Mbps/UDP)(60 sec)(single-ue profile) + -u -b 140M -t 60 + DL + nrmodule2_quectel + 5 + single-ue + + + + Iperf + iperf (UL/3Mbps/UDP)(60 sec)(single-ue profile) + -u -b 3M -t 60 + UL + nrmodule2_quectel + 5 + single-ue + + + + + Terminate_eNB + Terminate gNB + 0 + 0 + nr + + + + diff --git a/ci-scripts/xml_files/fr1_sa_quectel_stages_60MHz.xml b/ci-scripts/xml_files/fr1_sa_quectel_stages_60MHz.xml new file mode 100644 index 0000000000..4b2400a4ac --- /dev/null +++ b/ci-scripts/xml_files/fr1_sa_quectel_stages_60MHz.xml @@ -0,0 +1,166 @@ + + + TEST-SA-FR1-Tab4 + SA Staged DL with QUECTEL + tasks + 1 + + 040000 + 000002 + 010000 + 000001 + 050000 + 000001 + 070000 + 000001 + 070001 + 000001 + 070002 + 000001 + 070003 + 000001 + 070004 + 000001 + 070005 + 000001 + 010002 + 080000 + + + + + Initialize_UE + Initialize Quectel + nrmodule2_quectel + yes + + + + + Terminate_UE + Terminate Quectel + nrmodule2_quectel + + + + + Initialize_eNB + Initialize gNB + -O ci-scripts/conf_files/gnb.band78.sa.fr1.162PRB.2x2.usrpn310.conf --sa -q --usrp-tx-thread-config 1 + 0 + 0 + nr + yes + yes + 192.168.18.240 + + + + IdleSleep + Sleep + 5 + + + + IdleSleep + Sleep + 20 + + + + + Ping + Ping: 20pings in 20sec + nrmodule2_quectel + -c 20 + 5 + + + + + Iperf + iperf (DL/10Mbps/UDP)(30 sec)(single-ue profile) + -u -b 10M -t 30 + DL + nrmodule2_quectel + 5 + single-ue + + + Iperf + iperf (DL/20Mbps/UDP)(30 sec)(single-ue profile) + -u -b 20M -t 30 + DL + nrmodule2_quectel + 5 + single-ue + + + Iperf + iperf (DL/40Mbps/UDP)(30 sec)(single-ue profile) + -u -b 40M -t 30 + DL + nrmodule2_quectel + 5 + single-ue + + + Iperf + iperf (DL/60Mbps/UDP)(30 sec)(single-ue profile) + -u -b 60M -t 30 + DL + nrmodule2_quectel + 5 + single-ue + + + Iperf + iperf (DL/90Mbps/UDP)(30 sec)(single-ue profile) + -u -b 90M -t 30 + DL + nrmodule2_quectel + 5 + single-ue + + + Iperf + iperf (DL/140Mbps/UDP)(30 sec)(single-ue profile) + -u -b 140M -t 30 + DL + nrmodule2_quectel + 5 + single-ue + + + + + Terminate_eNB + Terminate gNB + 0 + 0 + nr + + + + diff --git a/cmake_targets/CMakeLists.txt b/cmake_targets/CMakeLists.txt index 329ed7bb3d..f513ac0563 100644 --- a/cmake_targets/CMakeLists.txt +++ b/cmake_targets/CMakeLists.txt @@ -1,4 +1,4 @@ -#/* +#/* # * Licensed to the OpenAirInterface (OAI) Software Alliance under one or more # * contributor license agreements. See the NOTICE file distributed with # * this work for additional information regarding copyright ownership. @@ -308,7 +308,7 @@ else (CMAKE_SYSTEM_PROCESSOR STREQUAL "armv7l") set(COMPILATION_AVX2 "False") endif() if (CPUINFO MATCHES "sse4_1") - set(C_FLAGS_PROCESSOR "${C_FLAGS_PROCESSOR} -msse4.1") + set(C_FLAGS_PROCESSOR "${C_FLAGS_PROCESSOR} -msse4.1 -mpclmul") endif() if (CPUINFO MATCHES "ssse3") set(C_FLAGS_PROCESSOR "${C_FLAGS_PROCESSOR} -mssse3") @@ -889,7 +889,7 @@ set(HWLIB_BENETEL_4G_SOURCE ) add_library(benetel_4g MODULE ${HWLIB_BENETEL_4G_SOURCE} ) -set_target_properties(benetel_4g PROPERTIES COMPILE_FLAGS "-fvisibility=hidden -march=native -I$ENV{RTE_SDK}/$ENV{RTE_TARGET}/include") +set_target_properties(benetel_4g PROPERTIES COMPILE_FLAGS "-fvisibility=hidden -I$ENV{RTE_SDK}/$ENV{RTE_TARGET}/include") SET(DPDK_LIBS "-Wl,-rpath,$ENV{RTE_SDK}/$ENV{RTE_TARGET}/lib -Wl,--whole-archive -L$ENV{RTE_SDK}/$ENV{RTE_TARGET}/lib -ldpdk -Wl,--no-whole-archive") TARGET_LINK_LIBRARIES(benetel_4g ${DPDK_LIBS}) @@ -907,7 +907,7 @@ set(HWLIB_BENETEL_5G_SOURCE ) add_library(benetel_5g MODULE ${HWLIB_BENETEL_5G_SOURCE} ) -set_target_properties(benetel_5g PROPERTIES COMPILE_FLAGS "-fvisibility=hidden -march=native -I$ENV{RTE_SDK}/$ENV{RTE_TARGET}/include") +set_target_properties(benetel_5g PROPERTIES COMPILE_FLAGS "-fvisibility=hidden -I$ENV{RTE_SDK}/$ENV{RTE_TARGET}/include") SET(DPDK_LIBS "-Wl,-rpath,$ENV{RTE_SDK}/$ENV{RTE_TARGET}/lib -Wl,--whole-archive -L$ENV{RTE_SDK}/$ENV{RTE_TARGET}/lib -ldpdk -Wl,--no-whole-archive") TARGET_LINK_LIBRARIES(benetel_5g ${DPDK_LIBS}) @@ -993,7 +993,6 @@ add_boolean_option(TRACE_RLC_AM_HOLE False "TRACE for RLC AM, TO BE CHANGE add_boolean_option(TRACE_RLC_AM_PDU False "TRACE for RLC AM, TO BE CHANGED IN A MORE GENERAL FLAG") add_boolean_option(TRACE_RLC_AM_RESEGMENT False "TRACE for RLC AM, TO BE CHANGED IN A MORE GENERAL FLAG") add_boolean_option(TRACE_RLC_AM_RX False "TRACE for RLC AM, TO BE CHANGED IN A MORE GENERAL FLAG") -add_boolean_option(TRACE_RLC_AM_RX_DECODE False "TRACE for RLC AM, TO BE CHANGED IN A MORE GENERAL FLAG") add_boolean_option(TRACE_RLC_AM_TX False "TRACE for RLC AM, TO BE CHANGED IN A MORE GENERAL FLAG") add_boolean_option(TRACE_RLC_AM_TX_STATUS False "TRACE for RLC AM, TO BE CHANGED IN A MORE GENERAL FLAG") add_boolean_option(TRACE_RLC_AM_STATUS_CREATION False "TRACE for RLC AM, TO BE CHANGED IN A MORE GENERAL FLAG") @@ -1572,7 +1571,6 @@ set(PHY_SRC_COMMON ${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/prach_common.c ${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/pucch_common.c ${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/dlsch_scrambling.c - ${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/lte_gold_generic.c ${OPENAIR1_DIR}/PHY/LTE_UE_TRANSPORT/srs_modulation.c ${OPENAIR1_DIR}/PHY/MODULATION/ofdm_mod.c ${OPENAIR1_DIR}/PHY/LTE_ESTIMATION/lte_sync_time.c diff --git a/common/utils/nr/nr_common.c b/common/utils/nr/nr_common.c index a704a66c76..0de24bcf6d 100644 --- a/common/utils/nr/nr_common.c +++ b/common/utils/nr/nr_common.c @@ -257,6 +257,48 @@ void get_coreset_rballoc(uint8_t *FreqDomainResource,int *n_rb,int *rb_offset) { *n_rb = 6*count; } +int get_nb_periods_per_frame(uint8_t tdd_period) { + + int nb_periods_per_frame; + switch(tdd_period) { + case 0: + nb_periods_per_frame = 20; // 10ms/0p5ms + break; + + case 1: + nb_periods_per_frame = 16; // 10ms/0p625ms + break; + + case 2: + nb_periods_per_frame = 10; // 10ms/1ms + break; + + case 3: + nb_periods_per_frame = 8; // 10ms/1p25ms + break; + + case 4: + nb_periods_per_frame = 5; // 10ms/2ms + break; + + case 5: + nb_periods_per_frame = 4; // 10ms/2p5ms + break; + + case 6: + nb_periods_per_frame = 2; // 10ms/5ms + break; + + case 7: + nb_periods_per_frame = 1; // 10ms/10ms + break; + + default: + AssertFatal(1==0,"Undefined tdd period %d\n", tdd_period); + } + return nb_periods_per_frame; +} + int get_dmrs_port(int nl, uint16_t dmrs_ports) { @@ -276,14 +318,6 @@ int get_dmrs_port(int nl, uint16_t dmrs_ports) { return p; } -int get_num_dmrs(uint16_t dmrs_mask ) { - - int num_dmrs=0; - - for (int i=0;i<16;i++) num_dmrs+=((dmrs_mask>>i)&1); - return(num_dmrs); -} - lte_frame_type_t get_frame_type(uint16_t current_band, uint8_t scs_index) { lte_frame_type_t current_type; @@ -472,6 +506,10 @@ int get_subband_size(int NPRB,int size) { } +int get_SLIV(uint8_t S, uint8_t L) { + return ( (uint16_t)(((L-1)<=7)? (14*(L-1)+S) : (14*(15-L)+(13-S))) ); +} + void SLIV2SL(int SLIV,int *S,int *L) { int SLIVdiv14 = SLIV/14; diff --git a/common/utils/nr/nr_common.h b/common/utils/nr/nr_common.h index d9f2b0c03a..44a6e05577 100644 --- a/common/utils/nr/nr_common.h +++ b/common/utils/nr/nr_common.h @@ -50,9 +50,17 @@ typedef struct nr_bandentry_s { extern const size_t nr_bandtable_size; extern nr_bandentry_t nr_bandtable[]; +static inline int get_num_dmrs(uint16_t dmrs_mask ) { + int num_dmrs=0; + + for (int i=0;i<16;i++) num_dmrs+=((dmrs_mask>>i)&1); + return(num_dmrs); +} + + +int get_SLIV(uint8_t S, uint8_t L); void get_coreset_rballoc(uint8_t *FreqDomainResource,int *n_rb,int *rb_offset); -int get_num_dmrs(uint16_t dmrs_mask); uint16_t config_bandwidth(int mu, int nb_rb, int nr_band); int get_nr_table_idx(int nr_bandP, uint8_t scs_index); int32_t get_delta_duplex(int nr_bandP, uint8_t scs_index); @@ -71,6 +79,7 @@ uint32_t nr_get_code_rate(uint8_t Imcs, uint8_t table_idx); int get_subband_size(int NPRB,int size); void SLIV2SL(int SLIV,int *S,int *L); int get_dmrs_port(int nl, uint16_t dmrs_ports); +int get_nb_periods_per_frame(uint8_t tdd_period); #define CEILIDIV(a,b) ((a+b-1)/b) #define ROUNDIDIV(a,b) (((a<<1)+b)/(b<<1)) diff --git a/common/utils/threadPool/Makefile b/common/utils/threadPool/Makefile index 6b28eb2ba8..729f9dd0e2 100644 --- a/common/utils/threadPool/Makefile +++ b/common/utils/threadPool/Makefile @@ -1,13 +1,3 @@ -all: -measurement_display thread-pool-test - -measurement_display: -measurement_display.c thread-pool.h -gcc measurement_display.c -I $ {OPENAIR_DIR}/ -I $ {OPENAIR_DIR}/common/utils/ -I. $ {OPENAIR_DIR}/common/utils/backtrace.c -lpthread -D TEST_THREAD_POOL -I../LOG -I../../utils/T -o -measurement_display - -thread-pool-test: -thread-pool.c thread-pool.h -gcc -g thread-pool.c -I $ {OPENAIR_DIR}/ -I $ {OPENAIR_DIR}/common/utils/ -I. $ {OPENAIR_DIR}/common/utils/backtrace.c -I $ {OPENAIR_DIR}/openair2/COMMON $ {OPENAIR_DIR}/common/utils/LOG/log.c $ {OPENAIR_DIR}/common/config/config_userapi.c -$ {OPENAIR_DIR}/common/config/config_load_configmodule.c $ {OPENAIR_DIR}/common/config/config_cmdline.c -lpthread -ldl -D TEST_THREAD_POOL -I../LOG -I../../utils/T -o thread-pool-test +thread-pool-test: thread-pool.c thread-pool.h + gcc -g -O3 thread-pool.c -I ${OPENAIR_DIR}/nfapi/open-nFAPI/nfapi/public_inc -I ${OPENAIR_DIR}/ -I ${OPENAIR_DIR}/common/utils/ -I. ${OPENAIR_DIR}/common/utils/backtrace.c -I ${OPENAIR_DIR}/openair2/COMMON ${OPENAIR_DIR}/common/utils/system.c ${OPENAIR_DIR}/common/utils/LOG/log.c ${OPENAIR_DIR}/common/config/config_userapi.c ${OPENAIR_DIR}/common/config/config_load_configmodule.c ${OPENAIR_DIR}/common/config/config_cmdline.c -lpthread -ldl -D TEST_THREAD_POOL -DMAX_NUM_CCs=1 -I../LOG -I../../utils/T -o thread-pool-test diff --git a/common/utils/threadPool/thread-pool.c b/common/utils/threadPool/thread-pool.c index 77729ae7a7..fff09528a8 100644 --- a/common/utils/threadPool/thread-pool.c +++ b/common/utils/threadPool/thread-pool.c @@ -155,21 +155,24 @@ void initNamedTpool(char *params,tpool_t *pool, bool performanceMeas, char *name } #ifdef TEST_THREAD_POOL +volatile int oai_exit=0; void exit_function(const char *file, const char *function, const int line, const char *s) { } struct testData { int id; + int sleepTime; char txt[30]; }; void processing(void *arg) { struct testData *in=(struct testData *)arg; - printf("doing: %d, %s, in thr %ld\n",in->id, in->txt,pthread_self() ); + //printf("doing: %d, %s, in thr %ld\n",in->id, in->txt,pthread_self() ); sprintf(in->txt,"Done by %ld, job %d", pthread_self(), in->id); - usleep(rand()%100); - printf("done: %d, %s, in thr %ld\n",in->id, in->txt,pthread_self() ); + in->sleepTime=rand()%1000; + usleep(in->sleepTime); + //printf("done: %d, %s, in thr %ld\n",in->id, in->txt,pthread_self() ); } int main() { @@ -208,11 +211,43 @@ int main() { } while(tmp); tpool_t pool; - char params[]="1,2,3,u"; + char params[]="1,2,3,4,5"; initTpool(params,&pool, true); notifiedFIFO_t worker_back; initNotifiedFIFO(&worker_back); + sleep(1); + int cumulProcessTime=0, cumulTime=0; + struct timespec st,end; + clock_gettime(CLOCK_MONOTONIC, &st); + int nb_jobs=4; + for (int i=0; i <1000 ; i++) { + int parall=nb_jobs; + for (int j=0; j id=i; + pushTpool(&pool, work); + } + int sleepmax=0; + while (parall) { + tmp=pullTpool(&worker_back,&pool); + if (tmp) { + parall--; + struct testData *dd=NotifiedFifoData(tmp); + if (dd->sleepTime > sleepmax) + sleepmax=dd->sleepTime; + delNotifiedFIFO_elt(tmp); + } + } + cumulProcessTime+=sleepmax; + } + clock_gettime(CLOCK_MONOTONIC, &end); + long long dur=(end.tv_sec-st.tv_sec)*1000*1000+(end.tv_nsec-st.tv_nsec)/1000; + printf("In µs, Total time per group of %d job:%lld, work time per job %d, overhead per job %lld\n", + nb_jobs, dur/1000, cumulProcessTime/1000, (dur-cumulProcessTime)/(1000*nb_jobs)); + + /* for (int i=0; i <1000 ; i++) { notifiedFIFO_elt_t *work=newNotifiedFIFO_elt(sizeof(struct testData), i, &worker_back, processing); struct testData *x=(struct testData *)NotifiedFifoData(work); @@ -232,7 +267,7 @@ int main() { abortTpool(&pool,510); } while(tmp); - + */ return 0; } #endif diff --git a/common/utils/threadPool/thread-pool.h b/common/utils/threadPool/thread-pool.h index a32b7c3859..1839b42f39 100644 --- a/common/utils/threadPool/thread-pool.h +++ b/common/utils/threadPool/thread-pool.h @@ -31,6 +31,7 @@ #include #include #include +//#include #ifdef DEBUG #define THREADINIT PTHREAD_ERRORCHECK_MUTEX_INITIALIZER_NP @@ -50,7 +51,7 @@ AssertFatal(ret==0,"ret=%d\n",ret);} #define condbroadcast(signal) {int ret=pthread_cond_broadcast(&signal); \ AssertFatal(ret==0,"ret=%d\n",ret);} -#define condsignal(signal) {int ret=pthread_cond_broadcast(&signal); \ +#define condsignal(signal) {int ret=pthread_cond_signal(&signal); \ AssertFatal(ret==0,"ret=%d\n",ret);} #define tpool_nbthreads(tpool) (tpool.nbThreads) typedef struct notifiedFIFO_elt_s { @@ -130,7 +131,7 @@ static inline void pushNotifiedFIFO_nothreadSafe(notifiedFIFO_t *nf, notifiedFIF static inline void pushNotifiedFIFO(notifiedFIFO_t *nf, notifiedFIFO_elt_t *msg) { mutexlock(nf->lockF); pushNotifiedFIFO_nothreadSafe(nf,msg); - condbroadcast(nf->notifF); + condsignal(nf->notifF); mutexunlock(nf->lockF); } diff --git a/doc/testing_gnb_w_cots_ue_resources/gnb.conf b/doc/testing_gnb_w_cots_ue_resources/gnb.conf index 97935f92ee..aae22a92ba 100755 --- a/doc/testing_gnb_w_cots_ue_resources/gnb.conf +++ b/doc/testing_gnb_w_cots_ue_resources/gnb.conf @@ -53,29 +53,7 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 0; initialDLBWPsearchSpaceZero = 0; - #pdsch-ConfigCommon - #pdschTimeDomainAllocationList (up to 16 entries) - initialDLBWPk0_0 = 0; - #initialULBWPmappingType - #0=typeA,1=typeB - initialDLBWPmappingType_0 = 0; - #this is SS=1,L=13 - initialDLBWPstartSymbolAndLength_0 = 40; - initialDLBWPk0_1 = 0; - initialDLBWPmappingType_1 = 0; - #this is SS=2,L=12 - initialDLBWPstartSymbolAndLength_1 = 53; - - initialDLBWPk0_2 = 0; - initialDLBWPmappingType_2 = 0; - #this is SS=1,L=12 - initialDLBWPstartSymbolAndLength_2 = 54; - - initialDLBWPk0_3 = 0; - initialDLBWPmappingType_3 = 0; - #this is SS=1,L=4 //5 (4 is for 43, 5 is for 57) - initialDLBWPstartSymbolAndLength_3 = 57; //43; //57; #uplinkConfigCommon #frequencyInfoUL ul_frequencyBand = 78; @@ -129,21 +107,6 @@ gNBs = # restrictedSetConfig # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, - # pusch-ConfigCommon (up to 16 elements) - initialULBWPk2_0 = 2; - initialULBWPmappingType_0 = 1 - # this is SS=0 L=11 - initialULBWPstartSymbolAndLength_0 = 55; - - initialULBWPk2_1 = 2; - initialULBWPmappingType_1 = 1; - # this is SS=0 L=12 - initialULBWPstartSymbolAndLength_1 = 69; - - initialULBWPk2_2 = 7; - initialULBWPmappingType_2 = 1; - # this is SS=10 L=4 - initialULBWPstartSymbolAndLength_2 = 52; msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/executables/nr-gnb.c b/executables/nr-gnb.c index e9fc06ce4a..dc8960846f 100644 --- a/executables/nr-gnb.c +++ b/executables/nr-gnb.c @@ -401,15 +401,15 @@ void init_gNB_Tpool(int inst) { LOG_I(PHY,"Number of threads requested in config file: %d, Number of threads available on this machine: %d\n",gNB->pusch_proc_threads,numCPU); int threadCnt = min(numCPU, gNB->pusch_proc_threads); if (threadCnt < 2) LOG_E(PHY,"Number of threads for gNB should be more than 1. Allocated only %d\n",threadCnt); - char ul_pool[80]; - sprintf(ul_pool,"-1"); + char pool[80]; + sprintf(pool,"-1"); int s_offset = 0; for (int icpu=1; icputhreadPool, false); + if (getenv("noThreads")) strcpy(pool, "n"); + initTpool(pool, gNB->threadPool, false); // ULSCH decoder result FIFO gNB->respDecode = (notifiedFIFO_t*) malloc(sizeof(notifiedFIFO_t)); initNotifiedFIFO(gNB->respDecode); diff --git a/executables/nr-ue.c b/executables/nr-ue.c index 60ff40abeb..362ad80e9d 100644 --- a/executables/nr-ue.c +++ b/executables/nr-ue.c @@ -784,7 +784,7 @@ void init_NR_UE_threads(int nb_inst) { /* HACK: this function is needed to compile the UE * fix it somehow */ -int8_t find_dlsch(uint16_t rnti, +int find_dlsch(uint16_t rnti, PHY_VARS_eNB *eNB, find_type_t type) { diff --git a/openair1/PHY/CODING/crc.h b/openair1/PHY/CODING/crc.h new file mode 100644 index 0000000000..d6474eae9b --- /dev/null +++ b/openair1/PHY/CODING/crc.h @@ -0,0 +1,543 @@ +/******************************************************************************* + Copyright (c) 2009-2018, Intel Corporation + + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions are met: + + * Redistributions of source code must retain the above copyright notice, + this list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. + * Neither the name of Intel Corporation nor the names of its contributors + may be used to endorse or promote products derived from this software + without specific prior written permission. + + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE + FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +*******************************************************************************/ + +/** + * Header file for module with CRC computation methods + * + * PCLMULQDQ implementation is based on work by: + * Erdinc Ozturk + * Vinodh Gopal + * James Guilford + * + * "Fast CRC Computation for Generic Polynomials Using PCLMULQDQ Instruction" + * URL: http://download.intel.com/design/intarch/papers/323102.pdf + */ + +#ifndef __CRC_H__ +#define __CRC_H__ + +#include + +#include "crcext.h" +#include "types.h" +#include +#include + +/** + * PCLMULQDQ CRC computation context structure + */ +struct crc_pclmulqdq_ctx { + /** + * K1 = reminder X^128 / P(X) : 0-63 + * K2 = reminder X^192 / P(X) : 64-127 + */ + uint64_t k1; + uint64_t k2; + + /** + * K3 = reminder X^64 / P(X) : 0-63 + * q = quotient X^64 / P(X) : 64-127 + */ + uint64_t k3; + uint64_t q; + + /** + * p = polynomial / P(X) : 0-63 + * res = reserved : 64-127 + */ + uint64_t p; + uint64_t res; +}; + +/** + * Functions and prototypes + */ + +/** + * @brief Initializes look-up-table (LUT) for given 8 bit polynomial + * + * @param poly CRC polynomial + * @param lut pointer to look-up-table to be initialized + */ +void crc8_init_lut(const uint8_t poly, uint8_t *lut); + +/** + * @brief Calculates 8 bit CRC using LUT method. + * + * @param crc CRC initial value + * @param data pointer to data block to calculate CRC for + * @param data_len size of data block + * @param lut 256x8bits look-up-table pointer + * + * @return New CRC value + */ +__forceinline +uint8_t crc8_calc_lut(const uint8_t *data, + uint32_t data_len, + uint8_t crc, + const uint8_t *lut) +{ + if (unlikely(data == NULL || lut == NULL)) + return crc; + + while (data_len--) + crc = lut[*data++ ^ crc]; + + return crc; +} + +/** + * @brief Initializes look-up-table (LUT) for given 16 bit polynomial + * + * @param poly CRC polynomial + * @param lut pointer to 256x16bits look-up-table to be initialized + */ +void crc16_init_lut(const uint16_t poly, uint16_t *lut); + +/** + * @brief Calculates 16 bit CRC using LUT method. + * + * @param crc CRC initial value + * @param data pointer to data block to calculate CRC for + * @param data_len size of data block + * @param lut 256x16bits look-up-table pointer + * + * @return New CRC value + */ +__forceinline +uint16_t crc16_calc_lut(const uint8_t *data, + uint32_t data_len, + uint16_t crc, + const uint16_t *lut) +{ + if (unlikely(data == NULL || lut == NULL)) + return crc; + + while (data_len--) + crc = lut[(crc >> 8) ^ *data++] ^ (crc << 8); + + return crc; +} + +/** + * @brief Initializes look-up-table (LUT) for given 32 bit polynomial + * + * @param poly CRC polynomial + * @param lut pointer to 256x32bits look-up-table to be initialized + */ +void crc32_init_lut(const uint32_t poly, uint32_t *lut); + +/** + * @brief Calculates 32 bit CRC using LUT method. + * + * @param crc CRC initial value + * @param data pointer to data block to calculate CRC for + * @param data_len size of data block + * @param lut 256x32bits look-up-table pointer + * + * @return New CRC value + */ +__forceinline +uint32_t crc32_calc_lut(const uint8_t *data, + uint32_t data_len, + uint32_t crc, + const uint32_t *lut) +{ + if (unlikely(data == NULL || lut == NULL)) + return crc; + + while (data_len--) + crc = lut[(crc >> 24) ^ *data++] ^ (crc << 8); + + return crc; +} + +/** + * @brief Initializes look up tables for slice-By-2 method. + * + * @param poly CRC polynomial + * @param slice1 slice-by-2 look-up-table 1 + * @param slice2 slice-by-2 look-up-table 2 + * + * @return New CRC value + */ +void crc16_init_slice2(const uint16_t poly, + uint16_t *slice1, + uint16_t *slice2); + +/** + * @brief Calculates 16 bit CRC using Slice-By-2 method. + * + * @param crc CRC initial value + * @param data pointer to data block to calculate CRC for + * @param data_len size of data block + * @param slice1 256x16bits slice look-up-table 1 + * @param slice2 256x16bits slice look-up-table 2 + * + * @return New CRC value + */ +__forceinline +uint16_t crc16_calc_slice2(const uint8_t *data, + uint32_t data_len, + uint16_t crc, + const uint16_t *slice1, + const uint16_t *slice2) +{ + uint_fast32_t i; + + if (unlikely(data == NULL)) + return crc; + + if (unlikely(slice1 == NULL || slice2 == NULL)) + return crc; + + crc = bswap2(crc); + for (i = (data_len & (~1)), data += (data_len & (~1)); i != 0; + i -= sizeof(uint16_t)) { + crc ^= (*((const uint16_t *)(data - i))); + crc = slice2[(uint8_t)crc] ^ slice1[(uint8_t)(crc >> 8)]; + } + crc = bswap2(crc); + if (data_len & 1) + crc = (crc << 8) ^ bswap2(slice1[(crc >> 8) ^ *data]); + + return crc; +} + +/** + * @brief Initializes look up tables for slice-By-4 method. + * + * @param poly CRC polynomial + * @param slice1 256x32bits slice look-up-table 1 + * @param slice2 256x32bits slice look-up-table 2 + * @param slice3 256x32bits slice look-up-table 3 + * @param slice4 256x32bits slice look-up-table 4 + * + * @return New CRC value + */ +void crc32_init_slice4(const uint32_t poly, + uint32_t *slice1, uint32_t *slice2, + uint32_t *slice3, uint32_t *slice4); + +/** + * @brief Calculates 32 bit CRC using Slice-By-4 method. + * + * @param data pointer to data block to calculate CRC for + * @param data_len size of data block + * @param crc CRC initial value + * @param slice1 256x32bits slice look-up-table 1 + * @param slice2 256x32bits slice look-up-table 2 + * @param slice3 256x32bits slice look-up-table 3 + * @param slice4 256x32bits slice look-up-table 4 + * + * @return New CRC value + */ +__forceinline +uint32_t crc32_calc_slice4(const uint8_t *data, + uint32_t data_len, uint32_t crc, + const uint32_t *slice1, const uint32_t *slice2, + const uint32_t *slice3, const uint32_t *slice4) +{ + uint_fast32_t i; + + if (unlikely(data == NULL)) + return crc; + + if (unlikely(slice1 == NULL || slice2 == NULL || + slice3 == NULL || slice4 == NULL)) + return crc; + + crc = bswap4(crc); + for (i = data_len & (~3), data += (data_len & (~3)); i != 0; + i -= sizeof(uint32_t)) { + crc ^= (*((const uint32_t *)(data - i))); + crc = slice4[(uint8_t)(crc)] ^ + slice3[(uint8_t)(crc >> 8)] ^ + slice2[(uint8_t)(crc >> 16)] ^ + slice1[(uint8_t)(crc >> 24)]; + } + crc = bswap4(crc); + for (i = data_len & 3, data += (data_len & 3); i != 0; i--) + crc = (crc << 8) ^ + bswap4(slice1[(crc >> 24) ^ *(data - i)]); + + return crc; +} + +/** + * @brief Performs one folding round + * + * Logically function operates as follows: + * DATA = READ_NEXT_16BYTES(); + * F1 = LSB8(FOLD) + * F2 = MSB8(FOLD) + * T1 = CLMUL( F1, K1 ) + * T2 = CLMUL( F2, K2 ) + * FOLD = XOR( T1, T2, DATA ) + * + * @param data_block 16 byte data block + * @param k1_k2 k1 and k2 constanst enclosed in XMM register + * @param fold running 16 byte folded data + * + * @return New 16 byte folded data + */ +__forceinline +__m128i crc32_folding_round(const __m128i data_block, + const __m128i k1_k2, + const __m128i fold) +{ + __m128i tmp = _mm_clmulepi64_si128(fold, k1_k2, 0x11); + + return _mm_xor_si128(_mm_clmulepi64_si128(fold, k1_k2, 0x00), + _mm_xor_si128(data_block, tmp)); +} + +/** + * @brief Performs Barret's reduction from 128 bits to 64 bits + * + * @param data128 128 bits data to be reduced + * @param k3_q k3 and Q constants enclosed in XMM register + * + * @return data reduced to 64 bits + */ +__forceinline +__m128i crc32_reduce_128_to_64(__m128i data128, const __m128i k3_q) +{ + __m128i tmp; + + tmp = _mm_xor_si128(_mm_clmulepi64_si128(data128, k3_q, 0x01 /* k3 */), + data128); + + data128 = _mm_xor_si128(_mm_clmulepi64_si128(tmp, k3_q, 0x01 /* k3 */), + data128); + + return _mm_srli_si128(_mm_slli_si128(data128, 8), 8); +} + +/** + * @brief Performs Barret's reduction from 64 bits to 32 bits + * + * @param data64 64 bits data to be reduced + * @param k3_q k3 and Q constants enclosed in XMM register + * @param p_res P constant enclosed in XMM register + * + * @return data reduced to 32 bits + */ +__forceinline +uint32_t +crc32_reduce_64_to_32(__m128i fold, const __m128i k3_q, const __m128i p_res) +{ + __m128i temp; + + temp = _mm_clmulepi64_si128(_mm_srli_si128(fold, 4), + k3_q, 0x10 /* Q */); + temp = _mm_srli_si128(_mm_xor_si128(temp, fold), 4); + temp = _mm_clmulepi64_si128(temp, p_res, 0 /* P */); + return _mm_extract_epi32(_mm_xor_si128(temp, fold), 0); +} + +/** + * @brief Calculates 32 bit CRC for given \a data block by applying folding and + * reduction methods. + * + * Algorithm operates on 32 bit CRCs so polynomials and initial values may + * need to be promoted to 32 bits where required. + * + * @param crc initial CRC value (32 bit value) + * @param data pointer to data block + * @param data_len length of \a data block in bytes + * @param params pointer to PCLMULQDQ CRC calculation context + * + * @return CRC for given \a data block (32 bits wide). + */ +__forceinline +uint32_t +crc32_calc_pclmulqdq(const uint8_t *data, + uint32_t data_len, uint32_t crc, + const struct crc_pclmulqdq_ctx *params) +{ + __m128i temp, fold, k, swap; + uint32_t n; + + if (unlikely(data == NULL || data_len == 0 || params == NULL)) + return crc; + +#ifdef __KERNEL__ + /** + * Preserve FPU context + */ + kernel_fpu_begin(); +#endif + + /** + * Add 4 bytes to data block size + * This is to secure the following: + * CRC32 = M(X)^32 mod P(X) + * M(X) - message to compute CRC on + * P(X) - CRC polynomial + */ + data_len += 4; + + /** + * Load first 16 data bytes in \a fold and + * set \a swap BE<->LE 16 byte conversion variable + */ + fold = _mm_loadu_si128((__m128i *)data); + swap = crc_xmm_be_le_swap128; + + /** + * ------------------------------------------------- + * Folding all data into single 16 byte data block + * Assumes: \a fold holds first 16 bytes of data + */ + + if (unlikely(data_len <= 16)) { + /** + * Data block fits into 16 byte block + * - adjust data block + * - 4 least significant bytes need to be zero + */ + fold = _mm_shuffle_epi8(fold, swap); + fold = _mm_slli_si128(xmm_shift_right(fold, 20 - data_len), 4); + + /** + * Apply CRC init value + */ + temp = _mm_insert_epi32(_mm_setzero_si128(), bswap4(crc), 0); + temp = xmm_shift_left(temp, data_len - 4); + fold = _mm_xor_si128(fold, temp); + } else { + /** + * There are 2x16 data blocks or more + */ + __m128i next_data; + + /** + * n = number of bytes required to align \a data_len + * to multiple of 16 + */ + n = ((~data_len) + 1) & 15; + + /** + * Apply CRC initial value and + * get \a fold to BE format + */ + fold = _mm_xor_si128(fold, + _mm_insert_epi32(_mm_setzero_si128(), + crc, 0)); + fold = _mm_shuffle_epi8(fold, swap); + + /** + * Load next 16 bytes of data and + * adjust \a fold & \a next_data as follows: + * + * CONCAT(fold,next_data) >> (n*8) + */ + next_data = _mm_loadu_si128((__m128i *)&data[16]); + next_data = _mm_shuffle_epi8(next_data, swap); + next_data = _mm_or_si128(xmm_shift_right(next_data, n), + xmm_shift_left(fold, 16 - n)); + fold = xmm_shift_right(fold, n); + + if (unlikely(data_len <= 32)) + /** + * In such unlikely case clear 4 least significant bytes + */ + next_data = + _mm_slli_si128(_mm_srli_si128(next_data, 4), 4); + + /** + * Do the initial folding round on 2 first 16 byte chunks + */ + k = _mm_load_si128((__m128i *)(¶ms->k1)); + fold = crc32_folding_round(next_data, k, fold); + + if (likely(data_len > 32)) { + /** + * \a data_block needs to be at least 48 bytes long + * in order to get here + */ + __m128i new_data; + + /** + * Main folding loop + * - n is adjusted to point to next 16 data block + * to read + * (16+16) = 2x16; represents 2 first data blocks + * processed above + * (- n) is the number of zero bytes padded to + * the message in order to align it to 16 bytes + * - the last 16 bytes is processed separately + */ + for (n = 16 + 16 - n; n < (data_len - 16); n += 16) { + new_data = _mm_loadu_si128((__m128i *)&data[n]); + new_data = _mm_shuffle_epi8(new_data, swap); + fold = crc32_folding_round(new_data, k, fold); + } + + /** + * The last folding round works always on 12 bytes + * (12 bytes of data and 4 zero bytes) + * Read from offset -4 is to avoid one + * shift right operation. + */ + new_data = _mm_loadu_si128((__m128i *)&data[n - 4]); + new_data = _mm_shuffle_epi8(new_data, swap); + new_data = _mm_slli_si128(new_data, 4); + fold = crc32_folding_round(new_data, k, fold); + } /* if (data_len > 32) */ + } + + /** + * ------------------------------------------------- + * Reduction 128 -> 32 + * Assumes: \a fold holds 128bit folded data + */ + + /** + * REDUCTION 128 -> 64 + */ + k = _mm_load_si128((__m128i *)(¶ms->k3)); + fold = crc32_reduce_128_to_64(fold, k); + + /** + * REDUCTION 64 -> 32 + */ + n = crc32_reduce_64_to_32(fold, k, + _mm_load_si128((__m128i *)(¶ms->p))); + +#ifdef __KERNEL__ + /** + * - restore FPU context + */ + kernel_fpu_end(); +#endif + + return n; +} + +#endif /* __CRC_H__ */ diff --git a/openair1/PHY/CODING/crc_byte.c b/openair1/PHY/CODING/crc_byte.c index 287cbcd1f4..d1c3917c2c 100644 --- a/openair1/PHY/CODING/crc_byte.c +++ b/openair1/PHY/CODING/crc_byte.c @@ -30,10 +30,17 @@ Modified in June, 2001, to include the length non multiple of 8 */ +#ifndef __SSE4_1__ +#define USE_INTEL_CRC 0 +#else +#define USE_INTEL_CRC __SSE4_1__ +#endif #include "coding_defs.h" #include "assertions.h" - +#if USE_INTEL_CRC +#include "crc.h" +#endif /*ref 36-212 v8.6.0 , pp 8-9 */ /* the highest degree is set by default */ @@ -94,6 +101,28 @@ static unsigned short crc11Table[256]; static unsigned char crc8Table[256]; static unsigned char crc6Table[256]; +#if USE_INTEL_CRC +static DECLARE_ALIGNED(struct crc_pclmulqdq_ctx lte_crc24a_pclmulqdq, 16) = { + 0x64e4d700, /**< k1 */ + 0x2c8c9d00, /**< k2 */ + 0xd9fe8c00, /**< k3 */ + 0xf845fe24, /**< q */ + 0x864cfb00, /**< p */ + 0ULL /**< res */ +}; +__m128i crc_xmm_be_le_swap128; + +DECLARE_ALIGNED(const uint8_t crc_xmm_shift_tab[48], 16) = { + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, + 0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff +}; + +#endif + void crcTableInit (void) { unsigned char c = 0; @@ -108,23 +137,29 @@ void crcTableInit (void) crc8Table[c] = (unsigned char) (crcbit (&c, 1, poly8) >> 24); crc6Table[c] = (unsigned char) (crcbit (&c, 1, poly6) >> 24); } while (++c); +#if USE_INTEL_CRC + crc_xmm_be_le_swap128 = _mm_setr_epi32(0x0c0d0e0f, 0x08090a0b, + 0x04050607, 0x00010203); + +#endif } /********************************************************* -Byte by byte implementations, +Byte by byte LUT implementations, assuming initial byte is 0 padded (in MSB) if necessary - +can use SIMD optimized Intel CRC for LTE/NR 24a/24b variants *********************************************************/ + unsigned int crc24a (unsigned char * inptr, int bitlen) { + int octetlen = bitlen / 8; /* Change in octets */ - int octetlen, resbit; - unsigned int crc = 0; - octetlen = bitlen / 8; /* Change in octets */ - resbit = (bitlen % 8); - + if ( bitlen % 8 || !USE_INTEL_CRC ) { + unsigned int crc = 0; + int resbit= (bitlen % 8); + while (octetlen-- > 0) { // printf("crc24a: in %x => crc %x\n",crc,*inptr); crc = (crc << 8) ^ crc24aTable[(*inptr++) ^ (crc >> 24)]; @@ -132,17 +167,35 @@ unsigned int crc24a (unsigned char * inptr, if (resbit > 0) crc = (crc << resbit) ^ crc24aTable[((*inptr) >> (8 - resbit)) ^ (crc >> (32 - resbit))]; - return crc; + } + #if USE_INTEL_CRC + else { + return crc32_calc_pclmulqdq(inptr, octetlen, 0, + <e_crc24a_pclmulqdq); + } + #endif + } +#if USE_INTEL_CRC +static DECLARE_ALIGNED(struct crc_pclmulqdq_ctx lte_crc24b_pclmulqdq, 16) = { + 0x80140500, /**< k1 */ + 0x42000100, /**< k2 */ + 0x90042100, /**< k3 */ + 0xffff83ff, /**< q */ + 0x80006300, /**< p */ + 0ULL /**< res */ +}; +#endif unsigned int crc24b (unsigned char * inptr, - int bitlen) + int bitlen) { - int octetlen, resbit; + int octetlen = bitlen / 8; /* Change in octets */ + + if ( bitlen % 8 || !USE_INTEL_CRC ) { unsigned int crc = 0; - octetlen = bitlen / 8; /* Change in octets */ - resbit = (bitlen % 8); + int resbit = (bitlen % 8); while (octetlen-- > 0) { // printf("crc24b: in %x => crc %x (%x)\n",crc,*inptr,crc24bTable[(*inptr) ^ (crc >> 24)]); @@ -153,6 +206,13 @@ unsigned int crc24b (unsigned char * inptr, crc = (crc << resbit) ^ crc24bTable[((*inptr) >> (8 - resbit)) ^ (crc >> (32 - resbit))]; return crc; + } +#if USE_INTEL_CRC + else { + return crc32_calc_pclmulqdq(inptr, octetlen, 0, + <e_crc24b_pclmulqdq); + } +#endif } unsigned int crc24c (unsigned char * inptr, diff --git a/openair1/PHY/CODING/crcext.h b/openair1/PHY/CODING/crcext.h new file mode 100644 index 0000000000..f441f25e50 --- /dev/null +++ b/openair1/PHY/CODING/crcext.h @@ -0,0 +1,89 @@ +/******************************************************************************* + Copyright (c) 2009-2018, Intel Corporation + + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions are met: + + * Redistributions of source code must retain the above copyright notice, + this list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. + * Neither the name of Intel Corporation nor the names of its contributors + may be used to endorse or promote products derived from this software + without specific prior written permission. + + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE + FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +*******************************************************************************/ + +/** + * Header file with CRC external definitions + * + */ + +#ifndef __CRCEXT_H__ +#define __CRCEXT_H__ + +#include +#include "types.h" +/** + * Flag indicating availability of PCLMULQDQ instruction + * Only valid after running CRCInit() function. + */ +extern int pclmulqdq_available; + +/** + * Flag indicating availability of PCLMULQDQ instruction + * Only valid after running CRCInit() function. + */ +extern __m128i crc_xmm_be_le_swap128; +extern const uint8_t crc_xmm_shift_tab[48]; + +/** + * @brief Shifts right 128 bit register by specified number of bytes + * + * @param reg 128 bit value + * @param num number of bytes to shift right \a reg by (0-16) + * + * @return \a reg >> (\a num * 8) + */ +__forceinline +__m128i xmm_shift_right(__m128i reg, const unsigned int num) +{ + const __m128i *p = (const __m128i *)(crc_xmm_shift_tab + 16 + num); + + return _mm_shuffle_epi8(reg, _mm_loadu_si128(p)); +} + +/** + * @brief Shifts left 128 bit register by specified number of bytes + * + * @param reg 128 bit value + * @param num number of bytes to shift left \a reg by (0-16) + * + * @return \a reg << (\a num * 8) + */ +__forceinline +__m128i xmm_shift_left(__m128i reg, const unsigned int num) +{ + const __m128i *p = (const __m128i *)(crc_xmm_shift_tab + 16 - num); + + return _mm_shuffle_epi8(reg, _mm_loadu_si128(p)); +} + +/** + * @brief Initializes CRC module. + * @note It is mandatory to run it before using any of CRC API's. + */ +extern void CRCInit(void); + +#endif /* __CRCEXT_H__ */ diff --git a/openair1/PHY/CODING/nrLDPC_defs.h b/openair1/PHY/CODING/nrLDPC_defs.h index 321ecaab7d..0d7ff9ef9f 100644 --- a/openair1/PHY/CODING/nrLDPC_defs.h +++ b/openair1/PHY/CODING/nrLDPC_defs.h @@ -22,6 +22,7 @@ // encoder interface #ifndef __NRLDPC_DEFS__H__ #define __NRLDPC_DEFS__H__ +#include #include "openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_types.h" /** \brief LDPC encoder @@ -36,17 +37,31 @@ \param 9-12 time_stats_t *tinput,*tprep, *tparity,*toutput */ typedef struct { - int n_segments; // optim8seg - unsigned int macro_num; // optim8segmulti - unsigned char gen_code; //orig - time_stats_t *tinput; - time_stats_t *tprep; - time_stats_t *tparity; - time_stats_t *toutput; -}encoder_implemparams_t; + unsigned int n_segments; // optim8seg + unsigned int macro_num; // optim8segmulti + unsigned char gen_code; //orig + time_stats_t *tinput; + time_stats_t *tprep; + time_stats_t *tparity; + time_stats_t *toutput; + int Kr; + uint32_t Kb; + uint32_t *Zc; + void *harq; + /// Encoder BG + uint8_t BG; + /// Interleaver outputs + unsigned char *output; + /// Number of bits in "small" code segments + uint32_t K; + /// Number of "Filler" bits + uint32_t F; + /// LDPC-code outputs + uint8_t *d[MAX_NUM_NR_DLSCH_SEGMENTS]; +} encoder_implemparams_t; #define INIT0_LDPCIMPLEMPARAMS {0,0,0,NULL,NULL,NULL,NULL} -typedef void(*nrLDPC_initcallfunc_t)(t_nrLDPC_dec_params* p_decParams, int8_t* p_llr, int8_t* p_out); -typedef int(*nrLDPC_encoderfunc_t)(unsigned char **,unsigned char **,int,int,short, short, encoder_implemparams_t*); +typedef void(*nrLDPC_initcallfunc_t)(t_nrLDPC_dec_params *p_decParams, int8_t *p_llr, int8_t *p_out); +typedef int(*nrLDPC_encoderfunc_t)(unsigned char **,unsigned char **,int,int,short, short, encoder_implemparams_t *); //============================================================================================================================ // decoder interface /** @@ -56,5 +71,5 @@ typedef int(*nrLDPC_encoderfunc_t)(unsigned char **,unsigned char **,int,int,sho \param p_llrOut Output vector \param p_profiler LDPC profiler statistics */ -typedef int32_t(*nrLDPC_decoderfunc_t)(t_nrLDPC_dec_params* , int8_t*, int8_t* , t_nrLDPC_procBuf* , t_nrLDPC_time_stats* ); +typedef int32_t(*nrLDPC_decoderfunc_t)(t_nrLDPC_dec_params *, int8_t *, int8_t *, t_nrLDPC_procBuf *, t_nrLDPC_time_stats * ); #endif diff --git a/openair1/PHY/CODING/nrLDPC_encoder/ldpc_encode_parity_check.c b/openair1/PHY/CODING/nrLDPC_encoder/ldpc_encode_parity_check.c index 738fd49b7d..69d2ac4972 100644 --- a/openair1/PHY/CODING/nrLDPC_encoder/ldpc_encode_parity_check.c +++ b/openair1/PHY/CODING/nrLDPC_encoder/ldpc_encode_parity_check.c @@ -38,8 +38,6 @@ #include "common/utils/LOG/log.h" -//#define DEBUG_LDPC - #include "ldpc384_byte.c" #include "ldpc352_byte.c" #include "ldpc320_byte.c" @@ -73,9 +71,18 @@ -static inline void encode_parity_check_part_optim(uint8_t *c,uint8_t *d, short BG,short Zc,short Kb) +static void encode_parity_check_part_optim(uint8_t *cc,uint8_t *d, short BG,short Zc,short Kb, int simd_size, int ncols) { - + unsigned char c[2*22*Zc*simd_size] __attribute__((aligned(32))); //double size matrix of c + + for (int i1=0; i1 < ncols; i1++) { + memcpy(&c[2*i1*Zc], &cc[i1*Zc], Zc*sizeof(unsigned char)); + memcpy(&c[(2*i1+1)*Zc], &cc[i1*Zc], Zc*sizeof(unsigned char)); + } + for (int i1=1;i1tinput != NULL) start_meas(impp->tinput); - for (i=0; i>(i&7)))>>(7-(i&7)); //printf("c(%d,%d)=%d\n",j,i,temp); } @@ -108,24 +103,10 @@ int nrLDPC_encod(unsigned char **test_input,unsigned char **channel_input,int Zc if ((BG==1 && Zc>176) || (BG==2 && Zc>64)) { // extend matrix if(impp->tprep != NULL) start_meas(impp->tprep); - for (i1=0; i1 < ncols; i1++) - { - memcpy(&c_extension[2*i1*Zc], &c[i1*Zc], Zc*sizeof(unsigned char)); - memcpy(&c_extension[(2*i1+1)*Zc], &c[i1*Zc], Zc*sizeof(unsigned char)); - } - for (i1=1;i1tprep != NULL) stop_meas(impp->tprep); //parity check part if(impp->tparity != NULL) start_meas(impp->tparity); - encode_parity_check_part_optim(c_extension, d, BG, Zc, Kb); + encode_parity_check_part_optim(c, d, BG, Zc, Kb,simd_size, ncols); if(impp->tparity != NULL) stop_meas(impp->tparity); } else { diff --git a/openair1/PHY/CODING/nrLDPC_encoder/ldpc_encoder_optim8seg.c b/openair1/PHY/CODING/nrLDPC_encoder/ldpc_encoder_optim8seg.c index a974e86e27..6fa9c5ff53 100644 --- a/openair1/PHY/CODING/nrLDPC_encoder/ldpc_encoder_optim8seg.c +++ b/openair1/PHY/CODING/nrLDPC_encoder/ldpc_encoder_optim8seg.c @@ -38,7 +38,6 @@ #include "common/utils/LOG/log.h" #include "PHY/TOOLS/time_meas.h" #include "openair1/PHY/CODING/nrLDPC_defs.h" -//#define DEBUG_LDPC #include "ldpc_encode_parity_check.c" #include "ldpc_generate_coefficient.c" @@ -102,7 +101,6 @@ int nrLDPC_encod(unsigned char **test_input,unsigned char **channel_input,int Zc unsigned char c[22*Zc] __attribute__((aligned(32))); //padded input, unpacked, max size unsigned char d[46*Zc] __attribute__((aligned(32))); //coded parity part output, unpacked, max size - unsigned char c_extension[2*22*Zc*simd_size] __attribute__((aligned(32))); //double size matrix of c // calculate number of punctured bits no_punctured_columns=(int)((nrows-2)*Zc+block_length-block_length*rate)/Zc; @@ -151,24 +149,10 @@ int nrLDPC_encod(unsigned char **test_input,unsigned char **channel_input,int Zc if ((BG==1 && Zc>176) || (BG==2 && Zc>64)) { // extend matrix if(impp->tprep != NULL) start_meas(impp->tprep); - for (i1=0; i1 < ncols; i1++) - { - memcpy(&c_extension[2*i1*Zc], &c[i1*Zc], Zc*sizeof(unsigned char)); - memcpy(&c_extension[(2*i1+1)*Zc], &c[i1*Zc], Zc*sizeof(unsigned char)); - } - for (i1=1;i1tprep != NULL) stop_meas(impp->tprep); //parity check part if(impp->tparity != NULL) start_meas(impp->tparity); - encode_parity_check_part_optim(c_extension, d, BG, Zc, Kb); + encode_parity_check_part_optim(c, d, BG, Zc, Kb, simd_size, ncols); if(impp->tparity != NULL) stop_meas(impp->tparity); } else { diff --git a/openair1/PHY/CODING/nrLDPC_encoder/ldpc_encoder_optim8segmulti.c b/openair1/PHY/CODING/nrLDPC_encoder/ldpc_encoder_optim8segmulti.c index b21f875b32..15d4481eb6 100644 --- a/openair1/PHY/CODING/nrLDPC_encoder/ldpc_encoder_optim8segmulti.c +++ b/openair1/PHY/CODING/nrLDPC_encoder/ldpc_encoder_optim8segmulti.c @@ -39,17 +39,17 @@ #include "PHY/TOOLS/time_meas.h" #include "openair1/PHY/CODING/nrLDPC_defs.h" -//#define DEBUG_LDPC - #include "ldpc_encode_parity_check.c" #include "ldpc_generate_coefficient.c" -int nrLDPC_encod(unsigned char **test_input,unsigned char **channel_input,int Zc,int Kb,short block_length, short BG, encoder_implemparams_t *impp) +int nrLDPC_encod(unsigned char **input,unsigned char **output,int Zc,int Kb,short block_length, short BG, encoder_implemparams_t *impp) { + //set_log(PHY, 4); + - short nrows=0,ncols=0; - int i,i1,j,rate=3; + int nrows=0,ncols=0; + int rate=3; int no_punctured_columns,removed_bit; //Table of possible lifting sizes char temp; @@ -95,8 +95,8 @@ int nrLDPC_encod(unsigned char **test_input,unsigned char **channel_input,int Zc } #ifdef DEBUG_LDPC - LOG_D(PHY,"ldpc_encoder_optim_8seg: BG %d, Zc %d, Kb %d, block_length %d, segments %d\n",BG,Zc,Kb,block_length,n_segments); - LOG_D(PHY,"ldpc_encoder_optim_8seg: PDU (seg 0) %x %x %x %x\n",test_input[0][0],test_input[0][1],test_input[0][2],test_input[0][3]); + LOG_D(PHY,"ldpc_encoder_optim_8seg: BG %d, Zc %d, Kb %d, block_length %d, segments %d\n",BG,Zc,Kb,block_length,impp->n_segments); + LOG_D(PHY,"ldpc_encoder_optim_8seg: PDU (seg 0) %x %x %x %x\n",input[0][0],input[0][1],input[0][2],input[0][3]); #endif AssertFatal(Zc>0,"no valid Zc found for block length %d\n",block_length); @@ -104,10 +104,8 @@ int nrLDPC_encod(unsigned char **test_input,unsigned char **channel_input,int Zc if ((Zc&31) > 0) simd_size = 16; else simd_size = 32; - unsigned char c[22*Zc] __attribute__((aligned(32))); //padded input, unpacked, max size - unsigned char d[46*Zc] __attribute__((aligned(32))); //coded parity part output, unpacked, max size - - unsigned char c_extension[2*22*Zc*simd_size] __attribute__((aligned(32))); //double size matrix of c + unsigned char cc[22*Zc] __attribute__((aligned(32))); //padded input, unpacked, max size + unsigned char dd[46*Zc] __attribute__((aligned(32))); //coded parity part output, unpacked, max size // calculate number of punctured bits no_punctured_columns=(int)((nrows-2)*Zc+block_length-block_length*rate)/Zc; @@ -115,8 +113,8 @@ int nrLDPC_encod(unsigned char **test_input,unsigned char **channel_input,int Zc //printf("%d\n",no_punctured_columns); //printf("%d\n",removed_bit); // unpack input - memset(c,0,sizeof(unsigned char) * ncols * Zc); - memset(d,0,sizeof(unsigned char) * nrows * Zc); + memset(cc,0,sizeof(unsigned char) * ncols * Zc); + memset(dd,0,sizeof(unsigned char) * nrows * Zc); if(impp->tinput != NULL) start_meas(impp->tinput); #if 0 @@ -124,29 +122,29 @@ int nrLDPC_encod(unsigned char **test_input,unsigned char **channel_input,int Zc //for (j=0; j>(i&7); + temp = (input[j][i/8]&(1<<(i&7)))>>(i&7); //printf("c(%d,%d)=%d\n",j,i,temp); c[i] |= (temp << (j-macro_segment)); } } #else #ifdef __AVX2__ - for (i=0; i>5; i++) { - c256 = _mm256_and_si256(_mm256_cmpeq_epi8(_mm256_andnot_si256(_mm256_shuffle_epi8(_mm256_set1_epi32(((uint32_t*)test_input[macro_segment])[i]), shufmask),andmask),zero256),masks[0]); + for (int i=0; i>5; i++) { + c256 = _mm256_and_si256(_mm256_cmpeq_epi8(_mm256_andnot_si256(_mm256_shuffle_epi8(_mm256_set1_epi32(((uint32_t*)input[macro_segment])[i]), shufmask),andmask),zero256),masks[0]); //for (j=1; j>5)<<5;i>5)<<5;i>(i&7)))>>(7-(i&7)); + temp = (input[j][i/8]&(128>>(i&7)))>>(7-(i&7)); //printf("c(%d,%d)=%d\n",j,i,temp); - c[i] |= (temp << (j-macro_segment)); + cc[i] |= (temp << (j-macro_segment)); } } #else @@ -159,28 +157,14 @@ int nrLDPC_encod(unsigned char **test_input,unsigned char **channel_input,int Zc if ((BG==1 && Zc>176) || (BG==2 && Zc>64)) { // extend matrix if(impp->tprep != NULL) start_meas(impp->tprep); - for (i1=0; i1 < ncols; i1++) - { - memcpy(&c_extension[2*i1*Zc], &c[i1*Zc], Zc*sizeof(unsigned char)); - memcpy(&c_extension[(2*i1+1)*Zc], &c[i1*Zc], Zc*sizeof(unsigned char)); - } - for (i1=1;i1tprep != NULL) stop_meas(impp->tprep); //parity check part if(impp->tparity != NULL) start_meas(impp->tparity); - encode_parity_check_part_optim(c_extension, d, BG, Zc, Kb); + encode_parity_check_part_optim(cc, dd, BG, Zc, Kb, simd_size, ncols); if(impp->tparity != NULL) stop_meas(impp->tparity); } else { - if (encode_parity_check_part_orig(c, d, BG, Zc, Kb, block_length)!=0) { + if (encode_parity_check_part_orig(cc, dd, BG, Zc, Kb, block_length)!=0) { printf("Problem with encoder\n"); return(-1); } @@ -188,8 +172,8 @@ int nrLDPC_encod(unsigned char **test_input,unsigned char **channel_input,int Zc if(impp->toutput != NULL) start_meas(impp->toutput); // information part and puncture columns /* - memcpy(&channel_input[0], &c[2*Zc], (block_length-2*Zc)*sizeof(unsigned char)); - memcpy(&channel_input[block_length-2*Zc], &d[0], ((nrows-no_punctured_columns) * Zc-removed_bit)*sizeof(unsigned char)); + memcpy(&output[0], &c[2*Zc], (block_length-2*Zc)*sizeof(unsigned char)); + memcpy(&output[block_length-2*Zc], &d[0], ((nrows-no_punctured_columns) * Zc-removed_bit)*sizeof(unsigned char)); */ #ifdef __AVX2__ if ((((2*Zc)&31) == 0) && (((block_length-(2*Zc))&31) == 0)) { @@ -197,34 +181,34 @@ int nrLDPC_encod(unsigned char **test_input,unsigned char **channel_input,int Zc //AssertFatal(((block_length-(2*Zc))&31) == 0,"block_length-(2*Zc) needs to be a multiple of 32 for now\n"); uint32_t l1 = (block_length-(2*Zc))>>5; uint32_t l2 = ((nrows-no_punctured_columns) * Zc-removed_bit)>>5; - __m256i *c256p = (__m256i *)&c[2*Zc]; - __m256i *d256p = (__m256i *)&d[0]; + __m256i *c256p = (__m256i *)&cc[2*Zc]; + __m256i *d256p = (__m256i *)&dd[0]; // if (((block_length-(2*Zc))&31)>0) l1++; - for (i=0;i0) l2++; - for (i1=0;i1>(j-macro_segment))&1; - for (i=0;i<((nrows-no_punctured_columns) * Zc-removed_bit);i++) + for (int j=macro_segment; j < macro_segment_end; j++) + output[j][i] = (cc[2*Zc+i]>>(j-macro_segment))&1; + for (int i=0;i<((nrows-no_punctured_columns) * Zc-removed_bit);i++) //for (j=0; j>(j-macro_segment))&1; + for (int j=macro_segment; j < macro_segment_end; j++) + output[j][block_length-2*Zc+i] = (dd[i]>>(j-macro_segment))&1; } #else diff --git a/openair1/PHY/CODING/types.h b/openair1/PHY/CODING/types.h new file mode 100644 index 0000000000..2bc7739e36 --- /dev/null +++ b/openair1/PHY/CODING/types.h @@ -0,0 +1,98 @@ +/******************************************************************************* + Copyright (c) 2009-2018, Intel Corporation + + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions are met: + + * Redistributions of source code must retain the above copyright notice, + this list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. + * Neither the name of Intel Corporation nor the names of its contributors + may be used to endorse or promote products derived from this software + without specific prior written permission. + + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE + FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +*******************************************************************************/ + +/* Common data types, macros and functions used across the CRC library */ + +#ifndef CRC_TYPES_H_ +#define CRC_TYPES_H_ + +#ifdef __KERNEL__ +#include +#include +typedef uint32_t uint_fast32_t; +typedef uint16_t uint_fast16_t; +typedef uint8_t uint_fast8_t; +#else +#include +#include +#endif + +/* Declare variable at address aligned to a boundary */ +#define DECLARE_ALIGNED(_declaration, _boundary) \ + _declaration __attribute__((aligned(_boundary))) + +/* Macro to make function to be always inlined */ +#ifndef DEBUG +#define __forceinline \ + static inline __attribute__((always_inline)) +#else +#define __forceinline \ + static +#endif + +/* Likely & unliekly hints for the compiler */ +#define likely(x) __builtin_expect(!!(x), 1) +#define unlikely(x) __builtin_expect(!!(x), 0) + +/* Macro to get dimension of an array */ +#ifndef DIM +#define DIM(x) (sizeof(x)/sizeof(x[0])) +#endif + +/** + * Common functions + */ + +/** + * @brief Swaps bytes in 16 bit word + * + * @param val 16 bit data value + * + * @return byte swapped value + */ +__forceinline uint16_t bswap2(const uint16_t val) +{ + return (uint16_t) ((val >> 8) | (val << 8)); +} + +/** + * @brief Swaps bytes in 32 bit word + * ABCD -> DCBA + * + * @param val 32 bit data value + * + * @return byte swapped value + */ +__forceinline uint32_t bswap4(const uint32_t val) +{ + return ((val >> 24) | /**< A*/ + ((val & 0xff0000) >> 8) | /**< B*/ + ((val & 0xff00) << 8) | /**< C*/ + (val << 24)); /**< D*/ +} + +#endif /* CRC_TYPES_H_ */ diff --git a/openair1/PHY/INIT/nr_init_ue.c b/openair1/PHY/INIT/nr_init_ue.c index b60e77e814..f664a03ba0 100644 --- a/openair1/PHY/INIT/nr_init_ue.c +++ b/openair1/PHY/INIT/nr_init_ue.c @@ -458,7 +458,7 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue, ue->decode_SIB = 1; init_nr_prach_tables(839); - + init_symbol_rotation(fp); return 0; } diff --git a/openair1/PHY/INIT/nr_parms.c b/openair1/PHY/INIT/nr_parms.c index 42d4a30e3b..347155ed3b 100644 --- a/openair1/PHY/INIT/nr_parms.c +++ b/openair1/PHY/INIT/nr_parms.c @@ -209,7 +209,6 @@ uint32_t get_samples_per_slot(int slot, NR_DL_FRAME_PARMS* fp) return samp_count; } - uint32_t get_slot_from_timestamp(openair0_timestamp timestamp_rx, NR_DL_FRAME_PARMS* fp) { uint32_t slot_idx = 0; diff --git a/openair1/PHY/LTE_REFSIG/lte_refsig.h b/openair1/PHY/LTE_REFSIG/lte_refsig.h index 84a2676082..9d3bae503b 100644 --- a/openair1/PHY/LTE_REFSIG/lte_refsig.h +++ b/openair1/PHY/LTE_REFSIG/lte_refsig.h @@ -36,8 +36,7 @@ \param reset resets the generator \return 32 bits of the gold sequence */ -uint32_t lte_gold_generic(uint32_t *x1, uint32_t *x2, uint8_t reset); - +#include /*!\brief This function generates the LTE Gold sequence (36-211, Sec 7.2), specifically for DL reference signals. @param frame_parms LTE DL Frame parameters diff --git a/openair1/PHY/LTE_TRANSPORT/lte_gold_generic.c b/openair1/PHY/LTE_TRANSPORT/lte_gold_generic.c deleted file mode 100644 index a23f8db4f2..0000000000 --- a/openair1/PHY/LTE_TRANSPORT/lte_gold_generic.c +++ /dev/null @@ -1,75 +0,0 @@ -/* - * Licensed to the OpenAirInterface (OAI) Software Alliance under one or more - * contributor license agreements. See the NOTICE file distributed with - * this work for additional information regarding copyright ownership. - * The OpenAirInterface Software Alliance licenses this file to You under - * the OAI Public License, Version 1.1 (the "License"); you may not use this file - * except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.openairinterface.org/?page_id=698 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - *------------------------------------------------------------------------------- - * For more information about the OpenAirInterface (OAI) Software Alliance: - * contact@openairinterface.org - */ - -#include "PHY/types.h" - -/** - \brief Gold Sequence Generation defined in 3x.211 - \param x1 x1 shift register - \param x2 x2 shift register / cinit if reset is set - \param reset Reset flag / reinitialize the generator - \return c 32 bits of gold output -*/ -extern inline uint32_t lte_gold_generic(uint32_t *x1, uint32_t *x2, uint8_t reset) -{ - int32_t n; - - // 3GPP 3x.211 - // Nc = 1600 - // c(n) = [x1(n+Nc) + x2(n+Nc)]mod2 - // x1(n+31) = [x1(n+3) + x1(n)]mod2 - // x2(n+31) = [x2(n+3) + x2(n+2) + x2(n+1) + x2(n)]mod2 - if (reset) - { - // Init value for x1: x1(0) = 1, x1(n) = 0, n=1,2,...,30 - // x1(31) = [x1(3) + x1(0)]mod2 = 1 - *x1 = 1 + (1U<<31); - // Init value for x2: cinit = sum_{i=0}^30 x2*2^i - // x2(31) = [x2(3) + x2(2) + x2(1) + x2(0)]mod2 - // = (*x2>>3) ^ (*x2>>2) + (*x2>>1) + *x2 - *x2 = *x2 ^ ((*x2 ^ (*x2>>1) ^ (*x2>>2) ^ (*x2>>3))<<31); - - // x1 and x2 contain bits n = 0,1,...,31 - - // Nc = 1600 bits are skipped at the beginning - // i.e., 1600 / 32 = 50 32bit words - - for (n = 1; n < 50; n++) - { - // Compute x1(0),...,x1(27) - *x1 = (*x1>>1) ^ (*x1>>4); - // Compute x1(28),..,x1(31) and xor - *x1 = *x1 ^ (*x1<<31) ^ (*x1<<28); - // Compute x2(0),...,x2(27) - *x2 = (*x2>>1) ^ (*x2>>2) ^ (*x2>>3) ^ (*x2>>4); - // Compute x2(28),..,x2(31) and xor - *x2 = *x2 ^ (*x2<<31) ^ (*x2<<30) ^ (*x2<<29) ^ (*x2<<28); - } - } - - *x1 = (*x1>>1) ^ (*x1>>4); - *x1 = *x1 ^ (*x1<<31) ^ (*x1<<28); - *x2 = (*x2>>1) ^ (*x2>>2) ^ (*x2>>3) ^ (*x2>>4); - *x2 = *x2 ^ (*x2<<31) ^ (*x2<<30) ^ (*x2<<29) ^ (*x2<<28); - - // c(n) = [x1(n+Nc) + x2(n+Nc)]mod2 - return(*x1^*x2); -} diff --git a/openair1/PHY/LTE_TRANSPORT/lte_mcs.c b/openair1/PHY/LTE_TRANSPORT/lte_mcs.c index 6144b978bf..38914506ee 100644 --- a/openair1/PHY/LTE_TRANSPORT/lte_mcs.c +++ b/openair1/PHY/LTE_TRANSPORT/lte_mcs.c @@ -147,10 +147,10 @@ uint32_t get_TBS_UL(uint8_t mcs, uint16_t nb_rb) { } } -int adjust_G2(LTE_DL_FRAME_PARMS *frame_parms, uint32_t *rb_alloc, uint8_t mod_order, uint8_t subframe, uint8_t symbol) { +int adjust_G2(int Ncp, int frame_type, int N_RB_DL, uint32_t *rb_alloc, uint8_t mod_order, uint8_t subframe, uint8_t symbol) { int rb,re_pbch_sss=0; int rb_alloc_ind,nsymb; - nsymb = (frame_parms->Ncp==NORMAL) ? 14 : 12; + nsymb = (Ncp==NORMAL) ? 14 : 12; // printf("adjust_G2 : symbol %d, subframe %d\n",symbol,subframe); if ((subframe!=0) && (subframe!=5) && (subframe!=6)) // if not PBCH/SSS or SSS @@ -158,12 +158,12 @@ int adjust_G2(LTE_DL_FRAME_PARMS *frame_parms, uint32_t *rb_alloc, uint8_t mod_o //first half of slot and TDD (no adjustments in first slot except for subframe 6 - PSS) if ((symbol<(nsymb>>1))&& - (frame_parms->frame_type == TDD)&& + (frame_type == TDD)&& (subframe!=6)) return(0); // after PBCH - if (frame_parms->frame_type==TDD) { //TDD + if (frame_type==TDD) { //TDD if ((symbol>((nsymb>>1)+3)) && (symbol!=(nsymb-1))) ///SSS return(0); @@ -185,9 +185,9 @@ int adjust_G2(LTE_DL_FRAME_PARMS *frame_parms, uint32_t *rb_alloc, uint8_t mod_o return(0); } - if ((frame_parms->N_RB_DL&1) == 1) { // ODD N_RB_DL - for (rb=((frame_parms->N_RB_DL>>1)-3); - rb<=((frame_parms->N_RB_DL>>1)+3); + if ((N_RB_DL&1) == 1) { // ODD N_RB_DL + for (rb=((N_RB_DL>>1)-3); + rb<=((N_RB_DL>>1)+3); rb++) { if (rb < 32) rb_alloc_ind = (rb_alloc[0]>>rb) & 1; @@ -201,16 +201,16 @@ int adjust_G2(LTE_DL_FRAME_PARMS *frame_parms, uint32_t *rb_alloc, uint8_t mod_o rb_alloc_ind = 0; if (rb_alloc_ind==1) { - if ((rb==(frame_parms->N_RB_DL>>1)-3) || - (rb==((frame_parms->N_RB_DL>>1)+3))) { + if ((rb==(N_RB_DL>>1)-3) || + (rb==((N_RB_DL>>1)+3))) { re_pbch_sss += 6; } else re_pbch_sss += 12; } } } else { - for (rb=((frame_parms->N_RB_DL>>1)-3); - rb<((frame_parms->N_RB_DL>>1)+3); + for (rb=((N_RB_DL>>1)-3); + rb<((N_RB_DL>>1)+3); rb++) { if (rb < 32) rb_alloc_ind = (rb_alloc[0]>>rb) & 1; diff --git a/openair1/PHY/LTE_TRANSPORT/pcfich.c b/openair1/PHY/LTE_TRANSPORT/pcfich.c index 3646732ce3..0ba63019a1 100644 --- a/openair1/PHY/LTE_TRANSPORT/pcfich.c +++ b/openair1/PHY/LTE_TRANSPORT/pcfich.c @@ -44,7 +44,7 @@ void pcfich_scrambling(LTE_DL_FRAME_PARMS *frame_parms, { uint32_t i; uint8_t reset; - uint32_t x1, x2, s=0; + uint32_t x1=0, x2, s=0; reset = 1; // x1 is set in lte_gold_generic diff --git a/openair1/PHY/LTE_TRANSPORT/pucch.c b/openair1/PHY/LTE_TRANSPORT/pucch.c index 3270066448..998edf235f 100644 --- a/openair1/PHY/LTE_TRANSPORT/pucch.c +++ b/openair1/PHY/LTE_TRANSPORT/pucch.c @@ -895,7 +895,7 @@ uint32_t rx_pucch(PHY_VARS_eNB *eNB, int frame, uint8_t subframe, uint8_t pucch1_thres, - uint8_t br_flag + int br_flag ) //----------------------------------------------------------------------------- { diff --git a/openair1/PHY/LTE_TRANSPORT/transport_common_proto.h b/openair1/PHY/LTE_TRANSPORT/transport_common_proto.h index 622f37b3bc..af8e63c3ed 100644 --- a/openair1/PHY/LTE_TRANSPORT/transport_common_proto.h +++ b/openair1/PHY/LTE_TRANSPORT/transport_common_proto.h @@ -101,7 +101,7 @@ int get_G(LTE_DL_FRAME_PARMS *frame_parms,uint16_t nb_rb,uint32_t *rb_alloc,uint int get_G_khz_1dot25(LTE_DL_FRAME_PARMS *frame_parms,uint16_t nb_rb,uint32_t *rb_alloc,uint8_t mod_order,uint8_t Nl,uint8_t num_pdcch_symbols,int frame,uint8_t subframe, uint8_t beamforming_mode); int adjust_G(LTE_DL_FRAME_PARMS *frame_parms,uint32_t *rb_alloc,uint8_t mod_order,uint8_t subframe); -int adjust_G2(LTE_DL_FRAME_PARMS *frame_parms,uint32_t *rb_alloc,uint8_t mod_order,uint8_t subframe,uint8_t symbol); +int adjust_G2(int Ncp, int frame_type, int N_RB_DL, uint32_t *rb_alloc,uint8_t mod_order,uint8_t subframe,uint8_t symbol); #ifndef modOrder diff --git a/openair1/PHY/LTE_TRANSPORT/transport_proto.h b/openair1/PHY/LTE_TRANSPORT/transport_proto.h index 19af50056c..1fbd1266d7 100644 --- a/openair1/PHY/LTE_TRANSPORT/transport_proto.h +++ b/openair1/PHY/LTE_TRANSPORT/transport_proto.h @@ -700,7 +700,51 @@ int find_ulsch(uint16_t rnti, PHY_VARS_eNB *eNB,find_type_t type); int find_uci(uint16_t rnti, int frame, int subframe, PHY_VARS_eNB *eNB,find_type_t type); -uint32_t lte_gold_generic(uint32_t *x1, uint32_t *x2, uint8_t reset); +static inline uint32_t lte_gold_generic(uint32_t *x1, uint32_t *x2, uint8_t reset) +{ + int32_t n; + + // 3GPP 3x.211 + // Nc = 1600 + // c(n) = [x1(n+Nc) + x2(n+Nc)]mod2 + // x1(n+31) = [x1(n+3) + x1(n)]mod2 + // x2(n+31) = [x2(n+3) + x2(n+2) + x2(n+1) + x2(n)]mod2 + if (reset) + { + // Init value for x1: x1(0) = 1, x1(n) = 0, n=1,2,...,30 + // x1(31) = [x1(3) + x1(0)]mod2 = 1 + *x1 = 1 + (1U<<31); + // Init value for x2: cinit = sum_{i=0}^30 x2*2^i + // x2(31) = [x2(3) + x2(2) + x2(1) + x2(0)]mod2 + // = (*x2>>3) ^ (*x2>>2) + (*x2>>1) + *x2 + *x2 = *x2 ^ ((*x2 ^ (*x2>>1) ^ (*x2>>2) ^ (*x2>>3))<<31); + + // x1 and x2 contain bits n = 0,1,...,31 + + // Nc = 1600 bits are skipped at the beginning + // i.e., 1600 / 32 = 50 32bit words + + for (n = 1; n < 50; n++) + { + // Compute x1(0),...,x1(27) + *x1 = (*x1>>1) ^ (*x1>>4); + // Compute x1(28),..,x1(31) and xor + *x1 = *x1 ^ (*x1<<31) ^ (*x1<<28); + // Compute x2(0),...,x2(27) + *x2 = (*x2>>1) ^ (*x2>>2) ^ (*x2>>3) ^ (*x2>>4); + // Compute x2(28),..,x2(31) and xor + *x2 = *x2 ^ (*x2<<31) ^ (*x2<<30) ^ (*x2<<29) ^ (*x2<<28); + } + } + + *x1 = (*x1>>1) ^ (*x1>>4); + *x1 = *x1 ^ (*x1<<31) ^ (*x1<<28); + *x2 = (*x2>>1) ^ (*x2>>2) ^ (*x2>>3) ^ (*x2>>4); + *x2 = *x2 ^ (*x2<<31) ^ (*x2<<30) ^ (*x2<<29) ^ (*x2<<28); + + // c(n) = [x1(n+Nc) + x2(n+Nc)]mod2 + return(*x1^*x2); +} /**@}*/ diff --git a/openair1/PHY/LTE_UE_TRANSPORT/dci_tools_ue.c b/openair1/PHY/LTE_UE_TRANSPORT/dci_tools_ue.c index 4f65edd6d5..efde277203 100644 --- a/openair1/PHY/LTE_UE_TRANSPORT/dci_tools_ue.c +++ b/openair1/PHY/LTE_UE_TRANSPORT/dci_tools_ue.c @@ -1293,7 +1293,7 @@ void compute_llr_offset(LTE_DL_FRAME_PARMS *frame_parms, } granted_re = nb_rb_alloc * (12-crs_re); - pbch_pss_sss_re = adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,dlsch0_harq->Qm,subframe,symbol); + pbch_pss_sss_re = adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,dlsch0_harq->Qm,subframe,symbol); pbch_pss_sss_re = (double)pbch_pss_sss_re * ((double)(12-crs_re)/12); data_re = granted_re - pbch_pss_sss_re; llr_offset = data_re * dlsch0_harq->Qm * 2; diff --git a/openair1/PHY/LTE_UE_TRANSPORT/dlsch_demodulation.c b/openair1/PHY/LTE_UE_TRANSPORT/dlsch_demodulation.c index 91de5386ae..6afd028099 100644 --- a/openair1/PHY/LTE_UE_TRANSPORT/dlsch_demodulation.c +++ b/openair1/PHY/LTE_UE_TRANSPORT/dlsch_demodulation.c @@ -837,7 +837,7 @@ int rx_pdsch(PHY_VARS_UE *ue, symbol, first_symbol_flag, nb_rb, - adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,2,subframe,symbol), + adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,2,subframe,symbol), beamforming_mode); } else if (codeword_TB0 == -1) { dlsch_qpsk_llr(frame_parms, @@ -846,7 +846,7 @@ int rx_pdsch(PHY_VARS_UE *ue, symbol, first_symbol_flag, nb_rb, - adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,2,subframe,symbol), + adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,2,subframe,symbol), beamforming_mode); } else if (rx_type >= rx_IC_single_stream) { if (dlsch1_harq->Qm == 2) { @@ -856,7 +856,7 @@ int rx_pdsch(PHY_VARS_UE *ue, pdsch_vars[eNB_id]->dl_ch_rho2_ext, pdsch_vars[eNB_id]->llr[0], symbol,first_symbol_flag,nb_rb, - adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,2,subframe,symbol), + adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,2,subframe,symbol), pdsch_vars[eNB_id]->llr128); if (rx_type==rx_IC_dual_stream) { @@ -866,7 +866,7 @@ int rx_pdsch(PHY_VARS_UE *ue, pdsch_vars[eNB_id]->dl_ch_rho_ext[harq_pid][round], pdsch_vars[eNB_id]->llr[1], symbol,first_symbol_flag,nb_rb, - adjust_G2(frame_parms,dlsch1_harq->rb_alloc_even,2,subframe,symbol), + adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch1_harq->rb_alloc_even,2,subframe,symbol), pdsch_vars[eNB_id]->llr128_2ndstream); } } else if (dlsch1_harq->Qm == 4) { @@ -877,7 +877,7 @@ int rx_pdsch(PHY_VARS_UE *ue, pdsch_vars[eNB_id]->dl_ch_rho2_ext, pdsch_vars[eNB_id]->llr[0], symbol,first_symbol_flag,nb_rb, - adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,2,subframe,symbol), + adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,2,subframe,symbol), pdsch_vars[eNB_id]->llr128); if (rx_type==rx_IC_dual_stream) { @@ -888,7 +888,7 @@ int rx_pdsch(PHY_VARS_UE *ue, pdsch_vars[eNB_id]->dl_ch_rho_ext[harq_pid][round], pdsch_vars[eNB_id]->llr[1], symbol,first_symbol_flag,nb_rb, - adjust_G2(frame_parms,dlsch1_harq->rb_alloc_even,4,subframe,symbol), + adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch1_harq->rb_alloc_even,4,subframe,symbol), pdsch_vars[eNB_id]->llr128_2ndstream); } } else { @@ -899,7 +899,7 @@ int rx_pdsch(PHY_VARS_UE *ue, pdsch_vars[eNB_id]->dl_ch_rho2_ext, pdsch_vars[eNB_id]->llr[0], symbol,first_symbol_flag,nb_rb, - adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,2,subframe,symbol), + adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,2,subframe,symbol), pdsch_vars[eNB_id]->llr128); if (rx_type==rx_IC_dual_stream) { @@ -910,7 +910,7 @@ int rx_pdsch(PHY_VARS_UE *ue, pdsch_vars[eNB_id]->dl_ch_rho_ext[harq_pid][round], pdsch_vars[eNB_id]->llr[1], symbol,first_symbol_flag,nb_rb, - adjust_G2(frame_parms,dlsch1_harq->rb_alloc_even,6,subframe,symbol), + adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch1_harq->rb_alloc_even,6,subframe,symbol), pdsch_vars[eNB_id]->llr128_2ndstream); } } @@ -925,7 +925,7 @@ int rx_pdsch(PHY_VARS_UE *ue, pdsch_vars[eNB_id]->llr[0], pdsch_vars[eNB_id]->dl_ch_mag0, symbol,first_symbol_flag,nb_rb, - adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,4,subframe,symbol), + adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,4,subframe,symbol), pdsch_vars[eNB_id]->llr128, beamforming_mode); } else if (codeword_TB0 == -1) { @@ -934,7 +934,7 @@ int rx_pdsch(PHY_VARS_UE *ue, pdsch_vars[eNB_id]->llr[1], pdsch_vars[eNB_id]->dl_ch_mag0, symbol,first_symbol_flag,nb_rb, - adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,4,subframe,symbol), + adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,4,subframe,symbol), pdsch_vars[eNB_id]->llr128_2ndstream, beamforming_mode); } else if (rx_type >= rx_IC_single_stream) { @@ -946,7 +946,7 @@ int rx_pdsch(PHY_VARS_UE *ue, pdsch_vars[eNB_id]->dl_ch_rho2_ext, pdsch_vars[eNB_id]->llr[0], symbol,first_symbol_flag,nb_rb, - adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,4,subframe,symbol), + adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,4,subframe,symbol), pdsch_vars[eNB_id]->llr128); if (rx_type==rx_IC_dual_stream) { @@ -957,7 +957,7 @@ int rx_pdsch(PHY_VARS_UE *ue, pdsch_vars[eNB_id]->dl_ch_rho_ext[harq_pid][round], pdsch_vars[eNB_id]->llr[1], symbol,first_symbol_flag,nb_rb, - adjust_G2(frame_parms,dlsch1_harq->rb_alloc_even,2,subframe,symbol), + adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch1_harq->rb_alloc_even,2,subframe,symbol), pdsch_vars[eNB_id]->llr128_2ndstream); } } else if (dlsch1_harq->Qm == 4) { @@ -969,7 +969,7 @@ int rx_pdsch(PHY_VARS_UE *ue, pdsch_vars[eNB_id]->dl_ch_rho2_ext, pdsch_vars[eNB_id]->llr[0], symbol,first_symbol_flag,nb_rb, - adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,4,subframe,symbol), + adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,4,subframe,symbol), pdsch_vars[eNB_id]->llr128); if (rx_type==rx_IC_dual_stream) { @@ -981,7 +981,7 @@ int rx_pdsch(PHY_VARS_UE *ue, pdsch_vars[eNB_id]->dl_ch_rho_ext[harq_pid][round], pdsch_vars[eNB_id]->llr[1], symbol,first_symbol_flag,nb_rb, - adjust_G2(frame_parms,dlsch1_harq->rb_alloc_even,4,subframe,symbol), + adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch1_harq->rb_alloc_even,4,subframe,symbol), pdsch_vars[eNB_id]->llr128_2ndstream); } } else { @@ -993,7 +993,7 @@ int rx_pdsch(PHY_VARS_UE *ue, pdsch_vars[eNB_id]->dl_ch_rho2_ext, pdsch_vars[eNB_id]->llr[0], symbol,first_symbol_flag,nb_rb, - adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,4,subframe,symbol), + adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,4,subframe,symbol), pdsch_vars[eNB_id]->llr128); if (rx_type==rx_IC_dual_stream) { @@ -1005,7 +1005,7 @@ int rx_pdsch(PHY_VARS_UE *ue, pdsch_vars[eNB_id]->dl_ch_rho_ext[harq_pid][round], pdsch_vars[eNB_id]->llr[1], symbol,first_symbol_flag,nb_rb, - adjust_G2(frame_parms,dlsch1_harq->rb_alloc_even,6,subframe,symbol), + adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch1_harq->rb_alloc_even,6,subframe,symbol), pdsch_vars[eNB_id]->llr128_2ndstream); } } @@ -1021,7 +1021,7 @@ int rx_pdsch(PHY_VARS_UE *ue, pdsch_vars[eNB_id]->dl_ch_mag0, pdsch_vars[eNB_id]->dl_ch_magb0, symbol,first_symbol_flag,nb_rb, - adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,6,subframe,symbol), + adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,6,subframe,symbol), pdsch_vars[eNB_id]->llr_offset[symbol], beamforming_mode); } else if (codeword_TB0 == -1) { @@ -1031,7 +1031,7 @@ int rx_pdsch(PHY_VARS_UE *ue, pdsch_vars[eNB_id]->dl_ch_mag0, pdsch_vars[eNB_id]->dl_ch_magb0, symbol,first_symbol_flag,nb_rb, - adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,6,subframe,symbol), + adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,6,subframe,symbol), pdsch_vars[eNB_id]->llr_offset[symbol], beamforming_mode); } else if (rx_type >= rx_IC_single_stream) { @@ -1043,7 +1043,7 @@ int rx_pdsch(PHY_VARS_UE *ue, pdsch_vars[eNB_id]->dl_ch_rho2_ext, pdsch_vars[eNB_id]->llr[0], symbol,first_symbol_flag,nb_rb, - adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,6,subframe,symbol), + adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,6,subframe,symbol), pdsch_vars[eNB_id]->llr128); if (rx_type==rx_IC_dual_stream) { @@ -1054,7 +1054,7 @@ int rx_pdsch(PHY_VARS_UE *ue, pdsch_vars[eNB_id]->dl_ch_rho_ext[harq_pid][round], pdsch_vars[eNB_id]->llr[1], symbol,first_symbol_flag,nb_rb, - adjust_G2(frame_parms,dlsch1_harq->rb_alloc_even,2,subframe,symbol), + adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch1_harq->rb_alloc_even,2,subframe,symbol), pdsch_vars[eNB_id]->llr128_2ndstream); } } else if (dlsch1_harq->Qm == 4) { @@ -1066,7 +1066,7 @@ int rx_pdsch(PHY_VARS_UE *ue, pdsch_vars[eNB_id]->dl_ch_rho2_ext, pdsch_vars[eNB_id]->llr[0], symbol,first_symbol_flag,nb_rb, - adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,6,subframe,symbol), + adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,6,subframe,symbol), pdsch_vars[eNB_id]->llr128); if (rx_type==rx_IC_dual_stream) { @@ -1078,7 +1078,7 @@ int rx_pdsch(PHY_VARS_UE *ue, pdsch_vars[eNB_id]->dl_ch_rho_ext[harq_pid][round], pdsch_vars[eNB_id]->llr[1], symbol,first_symbol_flag,nb_rb, - adjust_G2(frame_parms,dlsch1_harq->rb_alloc_even,4,subframe,symbol), + adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch1_harq->rb_alloc_even,4,subframe,symbol), pdsch_vars[eNB_id]->llr128_2ndstream); } } else { @@ -1090,7 +1090,7 @@ int rx_pdsch(PHY_VARS_UE *ue, pdsch_vars[eNB_id]->dl_ch_rho2_ext, (int16_t *)pllr_symbol_cw0, symbol,first_symbol_flag,nb_rb, - adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,6,subframe,symbol), + adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,6,subframe,symbol), pdsch_vars[eNB_id]->llr_offset[symbol]); if (rx_type==rx_IC_dual_stream) { @@ -1102,7 +1102,7 @@ int rx_pdsch(PHY_VARS_UE *ue, pdsch_vars[eNB_id]->dl_ch_rho_ext[harq_pid][round], (int16_t *)pllr_symbol_cw1, symbol,first_symbol_flag,nb_rb, - adjust_G2(frame_parms,dlsch1_harq->rb_alloc_even,6,subframe,symbol), + adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch1_harq->rb_alloc_even,6,subframe,symbol), pdsch_vars[eNB_id]->llr_offset[symbol]); } } @@ -1124,7 +1124,7 @@ int rx_pdsch(PHY_VARS_UE *ue, pdsch_vars[eNB_id]->rxdataF_comp0, (int16_t *)pllr_symbol_cw0, symbol,first_symbol_flag,nb_rb, - adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,2,subframe,symbol), + adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,2,subframe,symbol), beamforming_mode); } @@ -1137,7 +1137,7 @@ int rx_pdsch(PHY_VARS_UE *ue, pdsch_vars[eNB_id]->llr[0], pdsch_vars[eNB_id]->dl_ch_mag0, symbol,first_symbol_flag,nb_rb, - adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,4,subframe,symbol), + adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,4,subframe,symbol), pdsch_vars[eNB_id]->llr128, beamforming_mode); } @@ -1152,7 +1152,7 @@ int rx_pdsch(PHY_VARS_UE *ue, pdsch_vars[eNB_id]->dl_ch_mag0, pdsch_vars[eNB_id]->dl_ch_magb0, symbol,first_symbol_flag,nb_rb, - adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,6,subframe,symbol), + adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,6,subframe,symbol), pdsch_vars[eNB_id]->llr_offset[symbol], beamforming_mode); } diff --git a/openair1/PHY/LTE_UE_TRANSPORT/dlsch_llr_computation.c b/openair1/PHY/LTE_UE_TRANSPORT/dlsch_llr_computation.c index 4c74377ef6..43f3b5451f 100644 --- a/openair1/PHY/LTE_UE_TRANSPORT/dlsch_llr_computation.c +++ b/openair1/PHY/LTE_UE_TRANSPORT/dlsch_llr_computation.c @@ -746,7 +746,7 @@ int32_t dlsch_qpsk_llr_SIC(LTE_DL_FRAME_PARMS *frame_parms, amp_tmp=amp_tmp<<1; // to compensate for >> 1 shift in modulation - pbch_pss_sss_adjust=adjust_G2(frame_parms,&rb_alloc,2,subframe,symbol); + pbch_pss_sss_adjust=adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL ,&rb_alloc,2,subframe,symbol); if ((symbol_mod==0) || (symbol_mod==(4-frame_parms->Ncp))) { if (frame_parms->nb_antenna_ports_eNB!=1) @@ -981,7 +981,7 @@ void dlsch_16qam_llr_SIC (LTE_DL_FRAME_PARMS *frame_parms, symbol_mod = (symbol>=(7-frame_parms->Ncp)) ? symbol-(7-frame_parms->Ncp) : symbol; - pbch_pss_sss_adjust=adjust_G2(frame_parms,&rb_alloc,4,subframe,symbol); + pbch_pss_sss_adjust=adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,&rb_alloc,4,subframe,symbol); if ((symbol_mod==0) || (symbol_mod==(4-frame_parms->Ncp))) { amp_tmp=0x1fff;//dlsch0->sqrt_rho_b; already taken into account @@ -1281,7 +1281,7 @@ void dlsch_64qam_llr_SIC(LTE_DL_FRAME_PARMS *frame_parms, symbol_mod = (symbol>=(7-frame_parms->Ncp)) ? symbol-(7-frame_parms->Ncp) : symbol; - pbch_pss_sss_adjust=adjust_G2(frame_parms,&rb_alloc,6,subframe,symbol); + pbch_pss_sss_adjust=adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,&rb_alloc,6,subframe,symbol); if ((symbol_mod==0) || (symbol_mod==(4-frame_parms->Ncp))) { amp_tmp = 0x1fff;//dlsch0->sqrt_rho_b; already taken into account diff --git a/openair1/PHY/LTE_UE_TRANSPORT/pucch_ue.c b/openair1/PHY/LTE_UE_TRANSPORT/pucch_ue.c index 1f9fb86f80..9427ec3a5b 100644 --- a/openair1/PHY/LTE_UE_TRANSPORT/pucch_ue.c +++ b/openair1/PHY/LTE_UE_TRANSPORT/pucch_ue.c @@ -336,8 +336,8 @@ void generate_pucch1x(int32_t **txdataF, -inline void pucch2x_scrambling(LTE_DL_FRAME_PARMS *fp,int subframe,uint16_t rnti,uint32_t B,uint8_t *btilde) __attribute__((always_inline)); -inline void pucch2x_scrambling(LTE_DL_FRAME_PARMS *fp,int subframe,uint16_t rnti,uint32_t B,uint8_t *btilde) { +static inline void pucch2x_scrambling(LTE_DL_FRAME_PARMS *fp,int subframe,uint16_t rnti,uint32_t B,uint8_t *btilde) __attribute__((always_inline)); +static inline void pucch2x_scrambling(LTE_DL_FRAME_PARMS *fp,int subframe,uint16_t rnti,uint32_t B,uint8_t *btilde) { uint32_t x1, x2, s=0; int i; diff --git a/openair1/PHY/LTE_UE_TRANSPORT/transport_proto_ue.h b/openair1/PHY/LTE_UE_TRANSPORT/transport_proto_ue.h index 7ab795cae9..c5d096ceb7 100644 --- a/openair1/PHY/LTE_UE_TRANSPORT/transport_proto_ue.h +++ b/openair1/PHY/LTE_UE_TRANSPORT/transport_proto_ue.h @@ -1303,7 +1303,7 @@ uint32_t conv_nprb(uint8_t ra_header,uint32_t rb_alloc,int N_RB_DL); int get_G(LTE_DL_FRAME_PARMS *frame_parms,uint16_t nb_rb,uint32_t *rb_alloc,uint8_t mod_order,uint8_t Nl,uint8_t num_pdcch_symbols,int frame,uint8_t subframe, uint8_t beamforming_mode); int adjust_G(LTE_DL_FRAME_PARMS *frame_parms,uint32_t *rb_alloc,uint8_t mod_order,uint8_t subframe); -int adjust_G2(LTE_DL_FRAME_PARMS *frame_parms,uint32_t *rb_alloc,uint8_t mod_order,uint8_t subframe,uint8_t symbol); + #ifndef modOrder diff --git a/openair1/PHY/NR_TRANSPORT/nr_dlsch.c b/openair1/PHY/NR_TRANSPORT/nr_dlsch.c index fa1b6c955b..9bbc61d4b6 100644 --- a/openair1/PHY/NR_TRANSPORT/nr_dlsch.c +++ b/openair1/PHY/NR_TRANSPORT/nr_dlsch.c @@ -180,13 +180,15 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx, /// CRC, coding, interleaving and rate matching AssertFatal(harq->pdu!=NULL,"harq->pdu is null\n"); + unsigned char output[rel15->rbSize * NR_SYMBOLS_PER_SLOT * NR_NB_SC_PER_RB * 8 * NR_MAX_NB_LAYERS] __attribute__((aligned(32))); + bzero(output,rel15->rbSize * NR_SYMBOLS_PER_SLOT * NR_NB_SC_PER_RB * 8 * NR_MAX_NB_LAYERS); start_meas(dlsch_encoding_stats); - if (nr_dlsch_encoding(gNB, - harq->pdu, frame, slot, dlsch, frame_parms,tinput,tprep,tparity,toutput, - dlsch_rate_matching_stats, - dlsch_interleaving_stats, - dlsch_segmentation_stats) == -1) - return; + nr_dlsch_encoding(gNB, + harq->pdu, frame, slot, dlsch, frame_parms, output, + tinput,tprep,tparity,toutput, + dlsch_rate_matching_stats, + dlsch_interleaving_stats, + dlsch_segmentation_stats); stop_meas(dlsch_encoding_stats); #ifdef DEBUG_DLSCH printf("PDSCH encoding:\nPayload:\n"); @@ -198,7 +200,7 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx, printf("\nEncoded payload:\n"); for (int i=0; i>3; i++) { for (int j=0; j<8; j++) - printf("%d", harq->f[(i<<3)+j]); + printf("%d", output[(i<<3)+j]); printf("\t"); } printf("\n"); @@ -211,7 +213,7 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx, for (int q=0; qNrOfCodewords; q++) memset((void*)scrambled_output[q], 0, (encoded_length>>5)*sizeof(uint32_t)); for (int q=0; qNrOfCodewords; q++) - nr_pdsch_codeword_scrambling_optim(harq->f, + nr_pdsch_codeword_scrambling_optim(output, encoded_length, q, rel15->dataScramblingId, @@ -248,7 +250,7 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx, } #endif - + start_meas(&gNB->dlsch_layer_mapping_stats); /// Layer mapping nr_layer_mapping(mod_symbs, rel15->nrOfLayers, @@ -266,6 +268,7 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx, } #endif + stop_meas(&gNB->dlsch_layer_mapping_stats); /// Resource mapping // Non interleaved VRB to PRB mapping @@ -279,7 +282,7 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx, printf("PDSCH resource mapping started (start SC %d\tstart symbol %d\tN_PRB %d\tnb_re %d,nb_layers %d)\n", start_sc, rel15->StartSymbolIndex, rel15->rbSize, nb_re,rel15->nrOfLayers); #endif - + start_meas(&gNB->dlsch_resource_mapping_stats); for (int ap=0; apnrOfLayers; ap++) { // DMRS params for this ap @@ -321,20 +324,13 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx, dmrs_idx = (rel15->rbStart+rel15->BWPStart)*4; } } - } - - // Update l_prime in the case of double DMRS config - if ((dmrs_symbol_map & (1 << l))){ //DMRS time occasion if (l==(l_overline+1)) //take into account the double DMRS symbols l_prime = 1; else if (l>(l_overline+1)) {//new DMRS pair l_overline = l; l_prime = 0; } - } - - /// DMRS QPSK modulation - if (rel15->dlDmrsSymbPos & (1 << l)) { + /// DMRS QPSK modulation nr_modulation(pdsch_dmrs[l][0], n_dmrs*2, DMRS_MOD_ORDER, mod_dmrs); // currently only codeword 0 is modulated. Qm = 2 as DMRS is QPSK modulated #ifdef DEBUG_DLSCH @@ -355,73 +351,143 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx, ptrs_symbol = is_ptrs_symbol(l,dlPtrsSymPos); if(ptrs_symbol) { /* PTRS QPSK Modulation for each OFDM symbol in a slot */ + printf("Doing ptrs modulation for symbol %d, n_ptrs %d\n",l,n_ptrs); nr_modulation(pdsch_dmrs[l][0], (n_ptrs<<1), DMRS_MOD_ORDER, mod_ptrs); } } uint16_t k = start_sc; - // Loop Over SCs: - for (int i=0; irbSize*NR_NB_SC_PER_RB; i++) { - /* check if cuurent RE is PTRS RE*/ - is_ptrs_re=0; - /* check for PTRS symbol and set flag for PTRS RE */ - if(ptrs_symbol){ - is_ptrs_re = is_ptrs_subcarrier(k, - rel15->rnti, - ap, - rel15->dmrsConfigType, - rel15->PTRSFreqDensity, - rel15->rbSize, - rel15->PTRSReOffset, - start_sc, - frame_parms->ofdm_symbol_size); - } + if (ptrs_symbol || dmrs_symbol_map & (1 << l)) { - /* Map DMRS Symbol */ - if ( ( dmrs_symbol_map & (1 << l) ) && (k == ((start_sc+get_dmrs_freq_idx(n, k_prime, delta, dmrs_Type))%(frame_parms->ofdm_symbol_size)))) { - txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)] = (Wt[l_prime]*Wf[k_prime]*amp*mod_dmrs[dmrs_idx<<1]) >> 15; - txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)] = (Wt[l_prime]*Wf[k_prime]*amp*mod_dmrs[(dmrs_idx<<1) + 1]) >> 15; + // Loop Over SCs: + for (int i=0; irbSize*NR_NB_SC_PER_RB; i++) { + /* check if cuurent RE is PTRS RE*/ + is_ptrs_re = 0; + if (ptrs_symbol) + is_ptrs_re = is_ptrs_subcarrier(k, + rel15->rnti, + ap, + rel15->dmrsConfigType, + rel15->PTRSFreqDensity, + rel15->rbSize, + rel15->PTRSReOffset, + start_sc, + frame_parms->ofdm_symbol_size); + /* Map DMRS Symbol */ + if ( (dmrs_symbol_map & (1 << l)) && + (k == ((start_sc+get_dmrs_freq_idx(n, k_prime, delta, dmrs_Type))%(frame_parms->ofdm_symbol_size)))) { + txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)] = (Wt[l_prime]*Wf[k_prime]*amp*mod_dmrs[dmrs_idx<<1]) >> 15; + txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)] = (Wt[l_prime]*Wf[k_prime]*amp*mod_dmrs[(dmrs_idx<<1) + 1]) >> 15; #ifdef DEBUG_DLSCH_MAPPING - printf("dmrs_idx %d\t l %d \t k %d \t k_prime %d \t n %d \t txdataF: %d %d\n", - dmrs_idx, l, k, k_prime, n, txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)], - txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)]); + printf("dmrs_idx %d\t l %d \t k %d \t k_prime %d \t n %d \t txdataF: %d %d\n", + dmrs_idx, l, k, k_prime, n, txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)], + txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)]); #endif - dmrs_idx++; - k_prime++; - k_prime&=1; - n+=(k_prime)?0:1; - } - /* Map PTRS Symbol */ - else if(is_ptrs_re){ - txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)] = (beta_ptrs*amp*mod_ptrs[ptrs_idx<<1]) >> 15; - txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)] = (beta_ptrs*amp*mod_ptrs[(ptrs_idx<<1) + 1])>> 15; + dmrs_idx++; + k_prime++; + k_prime&=1; + n+=(k_prime)?0:1; + } + else if(is_ptrs_re){ + txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)] = (beta_ptrs*amp*mod_ptrs[ptrs_idx<<1]) >> 15; + txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)] = (beta_ptrs*amp*mod_ptrs[(ptrs_idx<<1) + 1])>> 15; #ifdef DEBUG_DLSCH_MAPPING - printf("ptrs_idx %d\t l %d \t k %d \t k_prime %d \t n %d \t txdataF: %d %d\n", - ptrs_idx, l, k, k_prime, n, ((int16_t*)txdataF[ap])[((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)], - ((int16_t*)txdataF[ap])[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)]); + printf("ptrs_idx %d\t l %d \t k %d \t k_prime %d \t n %d \t txdataF: %d %d, mod_ptrs: %d %d\n", + ptrs_idx, l, k, k_prime, n, ((int16_t*)txdataF[ap])[((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)], + ((int16_t*)txdataF[ap])[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)],mod_ptrs[ptrs_idx<<1],mod_ptrs[(ptrs_idx<<1)+1]); #endif - ptrs_idx++; - } + ptrs_idx++; + } /* Map DATA Symbol */ - else if( (!(dmrs_symbol_map & (1 << l))) || allowed_xlsch_re_in_dmrs_symbol(k,start_sc,frame_parms->ofdm_symbol_size,rel15->numDmrsCdmGrpsNoData,dmrs_Type)) { - txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)] = (amp * tx_layers[ap][m<<1]) >> 15; - txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)] = (amp * tx_layers[ap][(m<<1) + 1]) >> 15; + else if( ptrs_symbol || allowed_xlsch_re_in_dmrs_symbol(k,start_sc,frame_parms->ofdm_symbol_size,rel15->numDmrsCdmGrpsNoData,dmrs_Type)) { + txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)] = (amp * tx_layers[ap][m<<1]) >> 15; + txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)] = (amp * tx_layers[ap][(m<<1) + 1]) >> 15; #ifdef DEBUG_DLSCH_MAPPING - printf("m %d\t l %d \t k %d \t txdataF: %d %d\n", - m, l, k, txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)], - txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)]); + printf("m %d\t l %d \t k %d \t txdataF: %d %d\n", + m, l, k, txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)], + txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)]); #endif - m++; + m++; + } + /* mute RE */ + else { + txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)] = 0; + txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)] = 0; + } + if (++k >= frame_parms->ofdm_symbol_size) + k -= frame_parms->ofdm_symbol_size; + } //RE loop + } + else { // no PTRS or DMRS in this symbol + // Loop Over SCs: + int upper_limit=rel15->rbSize*NR_NB_SC_PER_RB; + int remaining_re = 0; + if (start_sc + upper_limit > frame_parms->ofdm_symbol_size) { + remaining_re = upper_limit + start_sc - frame_parms->ofdm_symbol_size; + upper_limit = frame_parms->ofdm_symbol_size - start_sc; + } + // fix the alignment issues later, use 64-bit SIMD below instead of 128. + if (0/*(frame_parms->N_RB_DL&1)==0*/) { + __m128i *txF=(__m128i*)&txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size+start_sc+txdataF_offset)<<1)]; + + __m128i *txl = (__m128i*)&tx_layers[ap][m<<1]; + __m128i amp128=_mm_set1_epi16(amp); + for (int i=0; i<(upper_limit>>2); i++) { + txF[i] = _mm_mulhrs_epi16(amp128,txl[i]); + } //RE loop, first part + m+=upper_limit; + if (remaining_re > 0) { + txF = (__m128i*)&txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size+txdataF_offset)<<1)]; + txl = (__m128i*)&tx_layers[ap][m<<1]; + for (int i=0; i<(remaining_re>>2); i++) { + txF[i] = _mm_mulhrs_epi16(amp128,txl[i]); + } + } } - /* mute RE */ else { - txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)] = 0; - txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)] = 0; - } - if (++k >= frame_parms->ofdm_symbol_size) - k -= frame_parms->ofdm_symbol_size; - } //RE loop + __m64 *txF=(__m64*)&txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size+start_sc+txdataF_offset)<<1)]; + + __m64 *txl = (__m64*)&tx_layers[ap][m<<1]; + __m64 amp64=_mm_set1_pi16(amp); + for (int i=0; i<(upper_limit>>1); i++) { + + txF[i] = _mm_mulhrs_pi16(amp64,txl[i]); +#ifdef DEBUG_DLSCH_MAPPING + if ((i&1) > 0) + printf("m %d\t l %d \t k %d \t txdataF: %d %d\n", + m, l, start_sc+(i>>1), txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + start_sc+(i>>1))<<1) + (2*txdataF_offset)], + txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + start_sc+(i>>1))<<1) + 1 + (2*txdataF_offset)]); +#endif + /* handle this, mute RE */ + /*else { + txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)] = 0; + txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)] = 0; + }*/ + } //RE loop, first part + m+=upper_limit; + if (remaining_re > 0) { + txF = (__m64*)&txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size+txdataF_offset)<<1)]; + txl = (__m64*)&tx_layers[ap][m<<1]; + for (int i=0; i<(remaining_re>>1); i++) { + txF[i] = _mm_mulhrs_pi16(amp64,txl[i]); +#ifdef DEBUG_DLSCH_MAPPING + if ((i&1) > 0) + printf("m %d\t l %d \t k %d \t txdataF: %d %d\n", + m, l, i>>1, txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + (i>>1))<<1) + (2*txdataF_offset)], + txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + (i>>1))<<1) + 1 + (2*txdataF_offset)]); +#endif + /* handle this, mute RE */ + /*else { + txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)] = 0; + txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)] = 0; + }*/ + } //RE loop, second part + } // + m+=remaining_re; + } // N_RB_DL even + } // no DMRS/PTRS in symbol } // symbol loop }// layer loop + stop_meas(&gNB->dlsch_resource_mapping_stats); ///Layer Precoding and Antenna port mapping // tx_layers 1-8 are mapped on antenna ports 1000-1007 @@ -430,7 +496,9 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx, // pmi = prgs_list[rbidx/prg_size].pm_idx, rbidx =0,...,rbSize-1 // The Precoding matrix: // The Codebook Type I and Type II are not supported yet. - // We adopt the precoding matrices of PUSCH for 4 layers. + // We`adopt the precoding matrices of PUSCH for 4 layers. + start_meas(&gNB->dlsch_precoding_stats); + for (int ap=0; apnb_antennas_tx; ap++) { for (int l=rel15->StartSymbolIndex; lStartSymbolIndex+rel15->NrOfSymbols; l++) { @@ -505,6 +573,7 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx, } // symbol loop }// port loop + stop_meas(&gNB->dlsch_precoding_stats); dlsch->slot_tx[slot]=0; // TODO: handle precoding diff --git a/openair1/PHY/NR_TRANSPORT/nr_dlsch.h b/openair1/PHY/NR_TRANSPORT/nr_dlsch.h index 181c2ab273..77db12672f 100644 --- a/openair1/PHY/NR_TRANSPORT/nr_dlsch.h +++ b/openair1/PHY/NR_TRANSPORT/nr_dlsch.h @@ -43,8 +43,6 @@ void nr_check_time_alloc(uint8_t S, uint8_t L,nfapi_nr_dl_tti_pdsch_pdu_rel15_t uint16_t get_RIV(uint16_t rb_start, uint16_t L, uint16_t N_RB); -uint16_t get_SLIV(uint8_t S, uint8_t L); - uint8_t nr_get_S(uint8_t row_idx, uint8_t CP, uint8_t time_alloc_type, uint8_t dmrs_typeA_position); void nr_get_rbg_parms(NR_BWP_PARMS* bwp, uint8_t config_type); @@ -85,6 +83,7 @@ int nr_dlsch_encoding(PHY_VARS_gNB *gNB, uint8_t slot, NR_gNB_DLSCH_t *dlsch, NR_DL_FRAME_PARMS* frame_parms, + unsigned char * output, time_stats_t *tinput, time_stats_t *tprep, time_stats_t *tparity, diff --git a/openair1/PHY/NR_TRANSPORT/nr_dlsch_coding.c b/openair1/PHY/NR_TRANSPORT/nr_dlsch_coding.c index 0bcd1e3e51..5620018b73 100644 --- a/openair1/PHY/NR_TRANSPORT/nr_dlsch_coding.c +++ b/openair1/PHY/NR_TRANSPORT/nr_dlsch_coding.c @@ -50,70 +50,47 @@ //#define DEBUG_DLSCH_FREE 1 -void free_gNB_dlsch(NR_gNB_DLSCH_t **dlschptr, uint16_t N_RB) -{ +void free_gNB_dlsch(NR_gNB_DLSCH_t **dlschptr, uint16_t N_RB) { int r; - NR_gNB_DLSCH_t *dlsch = *dlschptr; - uint16_t a_segments = MAX_NUM_NR_DLSCH_SEGMENTS; //number of segments to be allocated - if (dlsch) { + if (dlsch) { if (N_RB != 273) { a_segments = a_segments*N_RB; a_segments = a_segments/273 +1; } - + #ifdef DEBUG_DLSCH_FREE LOG_D(PHY,"Freeing dlsch %p\n",dlsch); #endif NR_DL_gNB_HARQ_t *harq = &dlsch->harq_process; + if (harq->b) { free16(harq->b, a_segments * 1056); harq->b = NULL; #ifdef DEBUG_DLSCH_FREE LOG_D(PHY, "Freeing harq->b (%p)\n", harq->b); #endif - - if (harq->e) { - free16(harq->e, 14 * N_RB * 12 * 8); - harq->e = NULL; + } + #ifdef DEBUG_DLSCH_FREE - printf("Freeing dlsch process %d e (%p)\n", i, harq->e); + LOG_D(PHY, "Freeing dlsch process %d c (%p)\n", i, harq->c); #endif - } - - if (harq->f) { - free16(harq->f, 14 * N_RB * 12 * 8); - harq->f = NULL; + + for (r = 0; r < a_segments; r++) { #ifdef DEBUG_DLSCH_FREE - printf("Freeing dlsch process %d f (%p)\n", i, harq->f); + LOG_D(PHY, "Freeing dlsch process %d c[%d] (%p)\n", i, r, harq->c[r]); #endif - } - -#ifdef DEBUG_DLSCH_FREE - LOG_D(PHY, "Freeing dlsch process %d c (%p)\n", i, harq->c); -#endif - - for (r = 0; r < a_segments; r++) { -#ifdef DEBUG_DLSCH_FREE - LOG_D(PHY, "Freeing dlsch process %d c[%d] (%p)\n", i, r, harq->c[r]); -#endif - - if (harq->c[r]) { - free16(harq->c[r], 1056); - harq->c[r] = NULL; - } - if (harq->d[r]) { - free16(harq->d[r], 3 * 8448); - harq->d[r] = NULL; - } + + if (harq->c[r]) { + free16(harq->c[r], 1056); + harq->c[r] = NULL; } } + free16(dlsch, sizeof(NR_gNB_DLSCH_t)); + *dlschptr = NULL; } - - free16(dlsch, sizeof(NR_gNB_DLSCH_t)); - *dlschptr = NULL; } NR_gNB_DLSCH_t *new_gNB_dlsch(NR_DL_FRAME_PARMS *frame_parms, @@ -121,8 +98,7 @@ NR_gNB_DLSCH_t *new_gNB_dlsch(NR_DL_FRAME_PARMS *frame_parms, unsigned char Mdlharq, uint32_t Nsoft, uint8_t abstraction_flag, - uint16_t N_RB) -{ + uint16_t N_RB) { unsigned char i,r,aa,layer; int re; uint16_t a_segments = MAX_NUM_NR_DLSCH_SEGMENTS; //number of segments to be allocated @@ -133,10 +109,8 @@ NR_gNB_DLSCH_t *new_gNB_dlsch(NR_DL_FRAME_PARMS *frame_parms, } uint16_t dlsch_bytes = a_segments*1056; // allocated bytes per segment - NR_gNB_DLSCH_t *dlsch = malloc16(sizeof(NR_gNB_DLSCH_t)); AssertFatal(dlsch, "cannot allocate dlsch\n"); - bzero(dlsch,sizeof(NR_gNB_DLSCH_t)); dlsch->Kmimo = Kmimo; dlsch->Mdlharq = Mdlharq; @@ -144,11 +118,12 @@ NR_gNB_DLSCH_t *new_gNB_dlsch(NR_DL_FRAME_PARMS *frame_parms, dlsch->Nsoft = Nsoft; for (layer=0; layerue_spec_bf_weights[layer] = (int32_t**)malloc16(64*sizeof(int32_t*)); + dlsch->ue_spec_bf_weights[layer] = (int32_t **)malloc16(64*sizeof(int32_t *)); for (aa=0; aa<64; aa++) { dlsch->ue_spec_bf_weights[layer][aa] = (int32_t *)malloc16(OFDM_SYMBOL_SIZE_COMPLEX_SAMPLES*sizeof(int32_t)); - for (re=0;reue_spec_bf_weights[layer][aa][re] = 0x00007fff; } } @@ -160,7 +135,8 @@ NR_gNB_DLSCH_t *new_gNB_dlsch(NR_DL_FRAME_PARMS *frame_parms, for (int q=0; qmod_symbs[q] = (int32_t *)malloc16(NR_MAX_PDSCH_ENCODED_LENGTH*sizeof(int32_t)); - dlsch->calib_dl_ch_estimates = (int32_t**)malloc16(64*sizeof(int32_t*)); + dlsch->calib_dl_ch_estimates = (int32_t **)malloc16(64*sizeof(int32_t *)); + for (aa=0; aa<64; aa++) { dlsch->calib_dl_ch_estimates[aa] = (int32_t *)malloc16(OFDM_SYMBOL_SIZE_COMPLEX_SAMPLES*sizeof(int32_t)); } @@ -172,7 +148,6 @@ NR_gNB_DLSCH_t *new_gNB_dlsch(NR_DL_FRAME_PARMS *frame_parms, NR_DL_gNB_HARQ_t *harq = &dlsch->harq_process; bzero(harq, sizeof(NR_DL_gNB_HARQ_t)); - harq->b = malloc16(dlsch_bytes); AssertFatal(harq->b, "cannot allocate memory for harq->b\n"); harq->pdu = malloc16(dlsch_bytes); @@ -188,71 +163,33 @@ NR_gNB_DLSCH_t *new_gNB_dlsch(NR_DL_FRAME_PARMS *frame_parms, // In section 5.3.2 in 38.212, the for loop is up to N + 2*Zc (maximum size of N is 66*Zc, therefore 68*Zc) harq->c[r] = malloc16(8448); AssertFatal(harq->c[r], "cannot allocate harq->c[%d]\n", r); - harq->d[r] = malloc16(68 * 384); - AssertFatal(harq->d[r], "cannot allocate harq->d[%d]\n", r); // max size for coded output bzero(harq->c[r], 8448); - bzero(harq->d[r], (3 * 8448)); } - harq->e = malloc16(N_RB * NR_SYMBOLS_PER_SLOT * NR_NB_SC_PER_RB * 8 * NR_MAX_NB_LAYERS); - AssertFatal(harq->e, "cannot allocate harq->e\n"); - bzero(harq->e, N_RB * NR_SYMBOLS_PER_SLOT * NR_NB_SC_PER_RB * 8 * NR_MAX_NB_LAYERS); - harq->f = malloc16(N_RB * NR_SYMBOLS_PER_SLOT * NR_NB_SC_PER_RB * 8 * NR_MAX_NB_LAYERS); - AssertFatal(harq->f, "cannot allocate harq->f\n"); - bzero(harq->f, N_RB * NR_SYMBOLS_PER_SLOT * NR_NB_SC_PER_RB * 8 * NR_MAX_NB_LAYERS); - return(dlsch); } -void clean_gNB_dlsch(NR_gNB_DLSCH_t *dlsch) -{ - - unsigned char Mdlharq; - unsigned char i,j,r; - +void clean_gNB_dlsch(NR_gNB_DLSCH_t *dlsch) { AssertFatal(dlsch!=NULL,"dlsch is null\n"); - Mdlharq = dlsch->Mdlharq; + unsigned char Mdlharq = dlsch->Mdlharq; dlsch->rnti = 0; dlsch->active = 0; - NR_DL_gNB_HARQ_t *harq=&dlsch->harq_process; - - for (i=0; i<10; i++) { + for (int i=0; i<10; i++) { dlsch->harq_ids[0][i] = Mdlharq; dlsch->harq_ids[1][i] = Mdlharq; } - for (i=0; id[r]) - harq->d[r][j] = NR_NULL; - } } -int nr_dlsch_encoding(PHY_VARS_gNB *gNB, - unsigned char *a, - int frame, - uint8_t slot, - NR_gNB_DLSCH_t *dlsch, - NR_DL_FRAME_PARMS* frame_parms, - time_stats_t *tinput,time_stats_t *tprep,time_stats_t *tparity,time_stats_t *toutput, - time_stats_t *dlsch_rate_matching_stats,time_stats_t *dlsch_interleaving_stats, - time_stats_t *dlsch_segmentation_stats) -{ - - unsigned int G; - unsigned int crc=1; - NR_DL_gNB_HARQ_t *harq = &dlsch->harq_process; +void ldpc8blocks( void *p) { + encoder_implemparams_t *impp=(encoder_implemparams_t *) p; + NR_DL_gNB_HARQ_t *harq = (NR_DL_gNB_HARQ_t *)impp->harq; + uint16_t Kr= impp->K; nfapi_nr_dl_tti_pdsch_pdu_rel15_t *rel15 = &harq->pdsch_pdu.pdsch_pdu_rel15; + uint8_t mod_order = rel15->qamModOrder[0]; uint16_t nb_rb = rel15->rbSize; uint8_t nb_symb_sch = rel15->NrOfSymbols; - uint32_t A, Kb, F=0; - uint32_t *Zc = &dlsch->harq_process.Z; - uint8_t mod_order = rel15->qamModOrder[0]; - uint16_t Kr=0,r; - uint32_t r_offset=0; - uint32_t E; - uint8_t Ilbrm = 1; - uint32_t Tbslbrm = 950984; //max tbs + uint16_t length_dmrs = get_num_dmrs(rel15->dlDmrsSymbPos); + uint32_t A = rel15->TBSize[0]<<3; uint8_t nb_re_dmrs; if (rel15->dmrsConfigType==NFAPI_NR_DMRS_TYPE1) @@ -260,24 +197,115 @@ int nr_dlsch_encoding(PHY_VARS_gNB *gNB, else nb_re_dmrs = 4*rel15->numDmrsCdmGrpsNoData; - uint16_t length_dmrs = get_num_dmrs(rel15->dlDmrsSymbPos); - uint16_t R=rel15->targetCodeRate[0]; + unsigned int G = nr_get_G(nb_rb, nb_symb_sch, nb_re_dmrs, length_dmrs,mod_order,rel15->nrOfLayers); + LOG_D(PHY,"dlsch coding A %d Kr %d G %d (nb_rb %d, nb_symb_sch %d, nb_re_dmrs %d, length_dmrs %d, mod_order %d)\n", + A,impp->K,G, nb_rb,nb_symb_sch,nb_re_dmrs,length_dmrs,(int)mod_order); + // nrLDPC_encoder output is in "d" + // let's make this interface happy! + uint8_t tmp[8][68 * 384]__attribute__((aligned(32))); + for (int rr=impp->macro_num*8, i=0; rr < impp->n_segments && rr < (impp->macro_num+1)*8; rr++,i++ ) + impp->d[rr]=tmp[i]; + nrLDPC_encoder(harq->c,impp->d,*impp->Zc, impp->Kb,Kr,impp->BG,impp); + // Compute where to place in output buffer that is concatenation of all segments + uint32_t r_offset=0; + for (int i=0; i < impp->macro_num*8; i++ ) + r_offset+=nr_get_E(G, impp->n_segments, mod_order, rel15->nrOfLayers, i); + for (int rr=impp->macro_num*8; rr < impp->n_segments && rr < (impp->macro_num+1)*8; rr++ ) { + if (impp->F>0) { + // writing into positions d[r][k-2Zc] as in clause 5.3.2 step 2) in 38.212 + memset(&impp->d[rr][Kr-impp->F-2*(*impp->Zc)], impp->F, NR_NULL); + } + +#ifdef DEBUG_DLSCH_CODING + LOG_D(PHY,"rvidx in encoding = %d\n", rel15->rvIndex[0]); +#endif + uint32_t E = nr_get_E(G, impp->n_segments, mod_order, rel15->nrOfLayers, rr); + //#ifdef DEBUG_DLSCH_CODING + LOG_D(NR_PHY,"Rate Matching, Code segment %d/%d (coded bits (G) %u, E %d, Filler bits %d, Filler offset %d mod_order %d, nb_rb %d)...\n", + rr, + impp->n_segments, + G, + E, + impp->F, + Kr-impp->F-2*(*impp->Zc), + mod_order,nb_rb); + // for tbslbrm calculation according to 5.4.2.1 of 38.212 + uint8_t Nl = 4; + + if (rel15->nrOfLayers < Nl) + Nl = rel15->nrOfLayers; + + uint32_t Tbslbrm = nr_compute_tbslbrm(rel15->mcsTable[0],nb_rb,Nl); + uint8_t Ilbrm = 1; + + uint8_t e[E]; + bzero (e, E); + nr_rate_matching_ldpc(Ilbrm, + Tbslbrm, + impp->BG, + *impp->Zc, + impp->d[rr], + e, + impp->n_segments, + impp->F, + Kr-impp->F-2*(*impp->Zc), + rel15->rvIndex[0], + E); +#ifdef DEBUG_DLSCH_CODING + + for (int i =0; i<16; i++) + printf("output ratematching e[%d]= %d r_offset %u\n", i,harq->e[i+r_offset], r_offset); + +#endif + nr_interleaving_ldpc(E, + mod_order, + e, + impp->output+r_offset); +#ifdef DEBUG_DLSCH_CODING + + for (int i =0; i<16; i++) + printf("output interleaving f[%d]= %d r_offset %u\n", i,impp->output[i+r_offset], r_offset); + + if (r==impp->n_segments-1) + write_output("enc_output.m","enc",impp->output,G,1,4); + +#endif + r_offset += E; + } +} + +int nr_dlsch_encoding(PHY_VARS_gNB *gNB, + unsigned char *a, + int frame, + uint8_t slot, + NR_gNB_DLSCH_t *dlsch, + NR_DL_FRAME_PARMS *frame_parms, + unsigned char * output, + time_stats_t *tinput,time_stats_t *tprep,time_stats_t *tparity,time_stats_t *toutput, + time_stats_t *dlsch_rate_matching_stats,time_stats_t *dlsch_interleaving_stats, + time_stats_t *dlsch_segmentation_stats) { + encoder_implemparams_t impp; + impp.output=output; + unsigned int crc=1; + NR_DL_gNB_HARQ_t *harq = &dlsch->harq_process; + nfapi_nr_dl_tti_pdsch_pdu_rel15_t *rel15 = &harq->pdsch_pdu.pdsch_pdu_rel15; + impp.Zc = &dlsch->harq_process.Z; float Coderate = 0.0; - uint8_t Nl = 4; - VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_gNB_DLSCH_ENCODING, VCD_FUNCTION_IN); + uint32_t A = rel15->TBSize[0]<<3; - A = rel15->TBSize[0]<<3; if ( dlsch->rnti != SI_RNTI ) - trace_NRpdu(DIRECTION_DOWNLINK, a, rel15->TBSize[0], 0, WS_C_RNTI, dlsch->rnti, frame, slot,0, 0); + trace_NRpdu(DIRECTION_DOWNLINK, a, rel15->TBSize[0], 0, WS_C_RNTI, dlsch->rnti, frame, slot,0, 0); NR_gNB_SCH_STATS_t *stats=NULL; int first_free=-1; - for (int i=0;idlsch_stats[i].rnti == 0 && first_free == -1) { first_free = i; stats=&gNB->dlsch_stats[i]; } + if (gNB->dlsch_stats[i].rnti == dlsch->rnti) { stats=&gNB->dlsch_stats[i]; break; @@ -290,181 +318,94 @@ int nr_dlsch_encoding(PHY_VARS_gNB *gNB, stats->current_RI = rel15->nrOfLayers; stats->current_Qm = rel15->qamModOrder[0]; } - G = nr_get_G(nb_rb, nb_symb_sch, nb_re_dmrs, length_dmrs,mod_order,rel15->nrOfLayers); - - LOG_D(PHY,"dlsch coding A %d G %d (nb_rb %d, nb_symb_sch %d, nb_re_dmrs %d, length_dmrs %d, mod_order %d)\n", - A,G, nb_rb,nb_symb_sch,nb_re_dmrs,length_dmrs,(int)mod_order); if (A > 3824) { // Add 24-bit crc (polynomial A) to payload crc = crc24a(a,A)>>8; - a[A>>3] = ((uint8_t*)&crc)[2]; - a[1+(A>>3)] = ((uint8_t*)&crc)[1]; - a[2+(A>>3)] = ((uint8_t*)&crc)[0]; + a[A>>3] = ((uint8_t *)&crc)[2]; + a[1+(A>>3)] = ((uint8_t *)&crc)[1]; + a[2+(A>>3)] = ((uint8_t *)&crc)[0]; //printf("CRC %x (A %d)\n",crc,A); //printf("a0 %d a1 %d a2 %d\n", a[A>>3], a[1+(A>>3)], a[2+(A>>3)]); - harq->B = A+24; // harq->b = a; - AssertFatal((A / 8) + 4 <= MAX_NR_DLSCH_PAYLOAD_BYTES, "A %d is too big (A/8+4 = %d > %d)\n", A, (A / 8) + 4, MAX_NR_DLSCH_PAYLOAD_BYTES); - memcpy(harq->b, a, (A / 8) + 4); // why is this +4 if the CRC is only 3 bytes? - } - else { + } else { // Add 16-bit crc (polynomial A) to payload crc = crc16(a,A)>>16; - a[A>>3] = ((uint8_t*)&crc)[1]; - a[1+(A>>3)] = ((uint8_t*)&crc)[0]; + a[A>>3] = ((uint8_t *)&crc)[1]; + a[1+(A>>3)] = ((uint8_t *)&crc)[0]; //printf("CRC %x (A %d)\n",crc,A); //printf("a0 %d a1 %d \n", a[A>>3], a[1+(A>>3)]); - harq->B = A+16; // harq->b = a; - AssertFatal((A / 8) + 3 <= MAX_NR_DLSCH_PAYLOAD_BYTES, "A %d is too big (A/8+3 = %d > %d)\n", A, (A / 8) + 3, MAX_NR_DLSCH_PAYLOAD_BYTES); - memcpy(harq->b, a, (A / 8) + 3); // using 3 bytes to mimic the case of 24 bit crc } - if (R<1000) - Coderate = (float) R /(float) 1024; + + if (rel15->targetCodeRate[0]<1000) + Coderate = (float)rel15->targetCodeRate[0] /(float) 1024; else // to scale for mcs 20 and 26 in table 5.1.3.1-2 which are decimal and input 2* in nr_tbs_tools - Coderate = (float) R /(float) 2048; + Coderate = (float)rel15->targetCodeRate[0] /(float) 2048; if ((A <=292) || ((A<=3824) && (Coderate <= 0.6667)) || Coderate <= 0.25) - harq->BG = 2; + impp.BG = 2; else - harq->BG = 1; + impp.BG = 1; start_meas(dlsch_segmentation_stats); - Kb = nr_segmentation(harq->b, harq->c, harq->B, &harq->C, &harq->K, Zc, &harq->F, harq->BG); + impp.Kb = nr_segmentation(harq->b, harq->c, harq->B, &impp.n_segments, &impp.K, impp.Zc, &impp.F, impp.BG); stop_meas(dlsch_segmentation_stats); - F = harq->F; - Kr = harq->K; -#ifdef DEBUG_DLSCH_CODING - uint16_t Kr_bytes; - Kr_bytes = Kr>>3; -#endif - - //printf("segment Z %d k %d Kr %d BG %d C %d\n", *Zc,harq->K,Kr,BG,harq->C); - - for (r=0; rC; r++) { + for (int r=0; rd[r][0]; //channel_input[r] = &harq->d[r][0]; #ifdef DEBUG_DLSCH_CODING - LOG_D(PHY,"Encoder: B %d F %d \n",harq->B, harq->F); - LOG_D(PHY,"start ldpc encoder segment %d/%d\n",r,harq->C); + LOG_D(PHY,"Encoder: B %d F %d \n",harq->B, impp->F); + LOG_D(PHY,"start ldpc encoder segment %d/%d\n",r,impp.n_segments); LOG_D(PHY,"input %d %d %d %d %d \n", harq->c[r][0], harq->c[r][1], harq->c[r][2],harq->c[r][3], harq->c[r][4]); - for (int cnt =0 ; cnt < 22*(*Zc)/8; cnt ++){ + + for (int cnt =0 ; cnt < 22*(*Zc)/8; cnt ++) { LOG_D(PHY,"%d ", harq->c[r][cnt]); } - LOG_D(PHY,"\n"); + LOG_D(PHY,"\n"); #endif //ldpc_encoder_orig((unsigned char*)harq->c[r],harq->d[r],*Zc,Kb,Kr,BG,0); //ldpc_encoder_optim((unsigned char*)harq->c[r],(unsigned char*)&harq->d[r][0],*Zc,Kb,Kr,BG,NULL,NULL,NULL,NULL); } - encoder_implemparams_t impp; - impp.n_segments=harq->C; + impp.tprep = tprep; impp.tinput = tinput; impp.tparity = tparity; impp.toutput = toutput; - for(int j=0;j<(harq->C/8+1);j++) { - impp.macro_num=j; - nrLDPC_encoder(harq->c,harq->d,*Zc,Kb,Kr,harq->BG,&impp); + impp.harq=harq; + notifiedFIFO_t nf; + initNotifiedFIFO(&nf); + int nbJobs=0; + for(int j=0; j<(impp.n_segments/8+((impp.n_segments&7)==0 ? 0 : 1)); j++) { + notifiedFIFO_elt_t *req=newNotifiedFIFO_elt(sizeof(impp), j, &nf, ldpc8blocks); + encoder_implemparams_t* perJobImpp=(encoder_implemparams_t*)NotifiedFifoData(req); + *perJobImpp=impp; + perJobImpp->macro_num=j; + pushTpool(gNB->threadPool,req); + nbJobs++; } - -#ifdef DEBUG_DLSCH_CODING - write_output("enc_input0.m","enc_in0",&harq->c[0][0],Kr_bytes,1,4); - write_output("enc_output0.m","enc0",&harq->d[0][0],(3*8*Kr_bytes)+12,1,4); -#endif - - F = harq->F; - - Kr = harq->K; - for (r=0; rC; r++) { - - if (F>0) { - for (int k=(Kr-F-2*(*Zc)); kd[r][k] = NR_NULL; - //if (k<(Kr-F+8)) - //printf("r %d filler bits [%d] = %d \n", r,k, harq->d[r][k]); - } - } - -#ifdef DEBUG_DLSCH_CODING - LOG_D(PHY,"rvidx in encoding = %d\n", rel15->rvIndex[0]); -#endif - - E = nr_get_E(G, harq->C, mod_order, rel15->nrOfLayers, r); - - //#ifdef DEBUG_DLSCH_CODING - LOG_D(NR_PHY,"Rate Matching, Code segment %d/%d (coded bits (G) %u, E %d, Filler bits %d, Filler offset %d mod_order %d, nb_rb %d)...\n", - r, - harq->C, - G, - E, - F, - Kr-F-2*(*Zc), - mod_order,nb_rb); - - // for tbslbrm calculation according to 5.4.2.1 of 38.212 - if (rel15->nrOfLayers < Nl) - Nl = rel15->nrOfLayers; - - Tbslbrm = nr_compute_tbslbrm(rel15->mcsTable[0],nb_rb,Nl); - - start_meas(dlsch_rate_matching_stats); - if (nr_rate_matching_ldpc(Ilbrm, - Tbslbrm, - harq->BG, - *Zc, - harq->d[r], - harq->e+r_offset, - harq->C, - F, - Kr-F-2*(*Zc), - rel15->rvIndex[0], - E) == -1) - return -1; - - stop_meas(dlsch_rate_matching_stats); -#ifdef DEBUG_DLSCH_CODING - for (int i =0; i<16; i++) - printf("output ratematching e[%d]= %d r_offset %u\n", i,harq->e[i+r_offset], r_offset); -#endif - - start_meas(dlsch_interleaving_stats); - nr_interleaving_ldpc(E, - mod_order, - harq->e+r_offset, - harq->f+r_offset); - stop_meas(dlsch_interleaving_stats); - -#ifdef DEBUG_DLSCH_CODING - for (int i =0; i<16; i++) - printf("output interleaving f[%d]= %d r_offset %u\n", i,harq->f[i+r_offset], r_offset); - - if (r==harq->C-1) - write_output("enc_output.m","enc",harq->f,G,1,4); -#endif - - r_offset += E; + while(nbJobs) { + notifiedFIFO_elt_t *req=pullTpool(&nf, gNB->threadPool); + delNotifiedFIFO_elt(req); + nbJobs--; } - VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_gNB_DLSCH_ENCODING, VCD_FUNCTION_OUT); - return 0; } diff --git a/openair1/PHY/NR_TRANSPORT/nr_dlsch_tools.c b/openair1/PHY/NR_TRANSPORT/nr_dlsch_tools.c index 3ba13d2f44..26b45eb9f7 100644 --- a/openair1/PHY/NR_TRANSPORT/nr_dlsch_tools.c +++ b/openair1/PHY/NR_TRANSPORT/nr_dlsch_tools.c @@ -96,11 +96,6 @@ void nr_get_time_domain_allocation_type(nfapi_nr_config_request_t config, } } - -uint16_t get_SLIV(uint8_t S, uint8_t L) { - return ( (uint16_t)(((L-1)<=7)? (14*(L-1)+S) : (14*(15-L)+(13-S))) ); -} - static inline uint8_t get_K0(uint8_t row_idx, uint8_t time_alloc_type) { return ( (time_alloc_type == NFAPI_NR_PDSCH_TIME_DOMAIN_ALLOC_TYPE_DEFAULT_A)|| (time_alloc_type == NFAPI_NR_PDSCH_TIME_DOMAIN_ALLOC_TYPE_DEFAULT_C)? 0 : diff --git a/openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_demodulation.c b/openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_demodulation.c index 37a2849d21..0894ae9166 100644 --- a/openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_demodulation.c +++ b/openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_demodulation.c @@ -383,7 +383,7 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue, printf("[AbsSFN %u.%d] Slot%d Symbol %d type %d: Pilot/Data extraction %5.2f \n", frame,nr_slot_rx,slot,symbol,type,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0)); #else - LOG_I(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d type %d: Pilot/Data extraction %5.2f \n", + LOG_D(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d type %d: Pilot/Data extraction %5.2f \n", frame,nr_slot_rx,slot,symbol,type,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0)); #endif @@ -405,7 +405,7 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue, #if DISABLE_LOG_X printf("[AbsSFN %u.%d] Slot%d Symbol %d: Channel Scale %5.2f \n",frame,nr_slot_rx,slot,symbol,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0)); #else - LOG_I(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d: Channel Scale %5.2f \n",frame,nr_slot_rx,slot,symbol,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0)); + LOG_D(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d: Channel Scale %5.2f \n",frame,nr_slot_rx,slot,symbol,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0)); #endif start_meas(&ue->generic_stat_bis[proc->thread_id][slot]); if (first_symbol_flag==1) { @@ -466,7 +466,7 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue, #if DISABLE_LOG_X printf("[AbsSFN %u.%d] Slot%d Symbol %d first_symbol_flag %d: Channel Level %5.2f \n",frame,nr_slot_rx,slot,symbol,first_symbol_flag,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0)); #else - LOG_I(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d first_symbol_flag %d: Channel Level %5.2f \n",frame,nr_slot_rx,slot,symbol,first_symbol_flag,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0)); + LOG_D(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d first_symbol_flag %d: Channel Level %5.2f \n",frame,nr_slot_rx,slot,symbol,first_symbol_flag,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0)); #endif start_meas(&ue->generic_stat_bis[proc->thread_id][slot]); @@ -518,7 +518,7 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue, #if DISABLE_LOG_X printf("[AbsSFN %u.%d] Slot%d Symbol %d log2_maxh %d channel_level %d: Channel Comp %5.2f \n", frame, nr_slot_rx, slot, symbol, pdsch_vars[gNB_id]->log2_maxh, proc->channel_level, ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0)); #else - LOG_I(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d log2_maxh %d channel_level %d: Channel Comp %5.2f \n", frame, nr_slot_rx, slot, symbol, pdsch_vars[gNB_id]->log2_maxh, proc->channel_level, ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0)); + LOG_D(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d log2_maxh %d channel_level %d: Channel Comp %5.2f \n", frame, nr_slot_rx, slot, symbol, pdsch_vars[gNB_id]->log2_maxh, proc->channel_level, ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0)); #endif start_meas(&ue->generic_stat_bis[proc->thread_id][slot]); @@ -577,7 +577,7 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue, #if DISABLE_LOG_X printf("[AbsSFN %u.%d] Slot%d Symbol %d: Channel Combine %5.2f \n",frame,nr_slot_rx,slot,symbol,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0)); #else - LOG_I(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d: Channel Combine %5.2f \n",frame,nr_slot_rx,slot,symbol,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0)); + LOG_D(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d: Channel Combine %5.2f \n",frame,nr_slot_rx,slot,symbol,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0)); #endif start_meas(&ue->generic_stat_bis[proc->thread_id][slot]); /* Store the valid DL RE's */ @@ -660,7 +660,7 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue, #if DISABLE_LOG_X printf("[AbsSFN %u.%d] Slot%d Symbol %d: LLR Computation %5.2f \n",frame,nr_slot_rx,slot,symbol,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0)); #else - LOG_I(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d: LLR Computation %5.2f \n",frame,nr_slot_rx,slot,symbol,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0)); + LOG_D(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d: LLR Computation %5.2f \n",frame,nr_slot_rx,slot,symbol,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0)); #endif // Please keep it: useful for debugging diff --git a/openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_llr_computation.c b/openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_llr_computation.c index a064a91d87..7c75884fa6 100644 --- a/openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_llr_computation.c +++ b/openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_llr_computation.c @@ -947,7 +947,7 @@ void nr_dlsch_64qam_llr_SIC(NR_DL_FRAME_PARMS *frame_parms, symbol_mod = (symbol>=(7-frame_parms->Ncp)) ? symbol-(7-frame_parms->Ncp) : symbol; - pbch_pss_sss_adjust=adjust_G2(frame_parms,&rb_alloc,6,subframe,symbol); + pbch_pss_sss_adjust=adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,&rb_alloc,6,subframe,symbol); if ((symbol_mod==0) || (symbol_mod==(4-frame_parms->Ncp))) { amp_tmp = 0x1fff;//dlsch0->sqrt_rho_b; already taken into account diff --git a/openair1/PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h b/openair1/PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h index 0ab17c11e6..3cb002f9e1 100644 --- a/openair1/PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h +++ b/openair1/PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h @@ -1286,8 +1286,8 @@ uint8_t get_transmission_mode(module_id_t Mod_id, uint8_t CC_id, rnti_t rnti); */ uint32_t conv_nprb(uint8_t ra_header,uint32_t rb_alloc,int N_RB_DL); -int adjust_G(NR_DL_FRAME_PARMS *frame_parms,uint32_t *rb_alloc,uint8_t mod_order,uint8_t subframe); -int adjust_G2(NR_DL_FRAME_PARMS *frame_parms,uint32_t *rb_alloc,uint8_t mod_order,uint8_t subframe,uint8_t symbol); +//int adjust_G(NR_DL_FRAME_PARMS *frame_parms,uint32_t *rb_alloc,uint8_t mod_order,uint8_t subframe); +//int adjust_G2(NR_DL_FRAME_PARMS *frame_parms,uint32_t *rb_alloc,uint8_t mod_order,uint8_t subframe,uint8_t symbol); #ifndef modOrder @@ -1313,16 +1313,6 @@ uint8_t I_TBS2I_MCS(uint8_t I_TBS); uint8_t SE2I_TBS(float SE, uint8_t N_PRB, uint8_t symbPerRB); -/** \brief This function generates the sounding reference symbol (SRS) for the uplink according to 36.211 v8.6.0. If IFFT_FPGA is defined, the SRS is quantized to a QPSK sequence. - @param frame_parms LTE DL Frame Parameters - @param soundingrs_ul_config_dedicated Dynamic configuration from RRC during Connection Establishment - @param txdataF pointer to the frequency domain TX signal - @returns 0 on success*/ -int generate_srs(NR_DL_FRAME_PARMS *frame_parms, - SOUNDINGRS_UL_CONFIG_DEDICATED *soundingrs_ul_config_dedicated, - int *txdataF, - int16_t amp, - uint32_t subframe); /*! @@ -1352,12 +1342,6 @@ int32_t generate_drs_pusch(PHY_VARS_NR_UE *phy_vars_ue, uint32_t nb_rb, uint8_t ant); -/*! - \brief This function initializes the Group Hopping, Sequence Hopping and nPRS sequences for PUCCH/PUSCH according to 36.211 v8.6.0. It should be called after configuration of UE (reception of SIB2/3) and initial configuration of eNB (or after reconfiguration of cell-specific parameters). - @param frame_parms Pointer to a NR_DL_FRAME_PARMS structure (eNB or UE)*/ -void init_ul_hopping(NR_DL_FRAME_PARMS *frame_parms); - - /*! \brief This function implements the initialization of paging parameters for UE (See Section 7, 36.304).It must be called after setting IMSImod1024 during UE startup and after receiving SIB2 @param ue Pointer to UE context @@ -1422,8 +1406,6 @@ double sinr_eff_cqi_calc(PHY_VARS_NR_UE *phy_vars_ue, uint8_t sinr2cqi(double sinr,uint8_t trans_mode); -int dump_dci(NR_DL_FRAME_PARMS *frame_parms, DCI_ALLOC_t *dci); - int dump_ue_stats(PHY_VARS_NR_UE *phy_vars_ue, UE_nr_rxtx_proc_t *proc, char* buffer, int length, runmode_t mode, int input_level_dBm); void init_transport_channels(uint8_t); @@ -1513,18 +1495,11 @@ int get_nCCE_offset_l1(int *CCE_table, const unsigned short rnti, const unsigned char subframe); -uint16_t get_nCCE(uint8_t num_pdcch_symbols,NR_DL_FRAME_PARMS *frame_parms,uint8_t mi); -uint16_t get_nquad(uint8_t num_pdcch_symbols,NR_DL_FRAME_PARMS *frame_parms,uint8_t mi); - -uint8_t get_mi(NR_DL_FRAME_PARMS *frame,uint8_t subframe); +//uint8_t get_mi(NR_DL_FRAME_PARMS *frame,uint8_t subframe); uint16_t get_nCCE_mac(uint8_t Mod_id,uint8_t CC_id,int num_pdcch_symbols,int subframe); -uint8_t get_num_pdcch_symbols(uint8_t num_dci,DCI_ALLOC_t *dci_alloc,NR_DL_FRAME_PARMS *frame_parms,uint8_t subframe); - -void pdcch_interleaving(NR_DL_FRAME_PARMS *frame_parms,int32_t **z, int32_t **wbar,uint8_t n_symbols_pdcch,uint8_t mi); - void nr_pdcch_unscrambling(int16_t *z, uint16_t scrambling_RNTI, uint32_t length, @@ -1539,7 +1514,6 @@ void dlsch_unscrambling(NR_DL_FRAME_PARMS *frame_parms, uint8_t q, uint8_t Ns); -void init_ncs_cell(NR_DL_FRAME_PARMS *frame_parms,uint8_t ncs_cell[20][7]); void generate_pucch1x(int32_t **txdataF, NR_DL_FRAME_PARMS *frame_parms, @@ -1587,7 +1561,7 @@ void init_ulsch_power_LUT(void); @param subframe subframe index to check @returns 0 on success */ -int is_prach_subframe(NR_DL_FRAME_PARMS *frame_parms,frame_t frame, uint8_t subframe); +//int is_prach_subframe(NR_DL_FRAME_PARMS *frame_parms,frame_t frame, uint8_t subframe); /*! \brief Generate PRACH waveform @@ -1653,8 +1627,6 @@ void init_scrambling_lut(void); @param frame_parms Pointer to frame parameters @returns 1 if subframe is for MBSFN */ -int is_pmch_subframe(frame_t frame, int subframe, NR_DL_FRAME_PARMS *frame_parms); - uint8_t is_not_pilot(uint8_t pilots, uint8_t re, uint8_t nushift, uint8_t use2ndpilots); uint8_t is_not_UEspecRS(int8_t lprime, uint8_t re, uint8_t nushift, uint8_t Ncp, uint8_t beamforming_mode); @@ -1691,8 +1663,7 @@ uint8_t get_prach_prb_offset(NR_DL_FRAME_PARMS *frame_parms, uint8_t n_ra_prboffset, uint8_t tdd_mapindex, uint16_t Nf); - -uint32_t lte_gold_generic(uint32_t *x1, uint32_t *x2, uint8_t reset); +#include uint8_t nr_dci_decoding_procedure(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, diff --git a/openair1/PHY/NR_UE_TRANSPORT/nr_ulsch_ue.c b/openair1/PHY/NR_UE_TRANSPORT/nr_ulsch_ue.c index 99dc2b658e..914523bc70 100644 --- a/openair1/PHY/NR_UE_TRANSPORT/nr_ulsch_ue.c +++ b/openair1/PHY/NR_UE_TRANSPORT/nr_ulsch_ue.c @@ -105,7 +105,8 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE, uint32_t scrambled_output[NR_MAX_NB_CODEWORDS][NR_MAX_PDSCH_ENCODED_LENGTH>>5]; int16_t **tx_layers; int32_t **txdataF; - int8_t Wf[2], Wt[2], l_prime[2], delta; + int8_t Wf[2], Wt[2]; + int l_prime[2], delta; uint8_t nb_dmrs_re_per_rb; int ap, i; int sample_offsetF, N_RE_prime; @@ -411,7 +412,7 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE, if (is_dmrs == 1) { // if transform precoding is enabled if (pusch_pdu->transform_precoding == 0) { - + ((int16_t*)txdataF[ap])[(sample_offsetF)<<1] = (Wt[l_prime[0]]*Wf[k_prime]*AMP*dmrs_seq[2*dmrs_idx]) >> 15; ((int16_t*)txdataF[ap])[((sample_offsetF)<<1) + 1] = (Wt[l_prime[0]]*Wf[k_prime]*AMP*dmrs_seq[(2*dmrs_idx) + 1]) >> 15; diff --git a/openair1/PHY/NR_UE_TRANSPORT/pucch_nr.c b/openair1/PHY/NR_UE_TRANSPORT/pucch_nr.c index cb929f1642..ddec605253 100644 --- a/openair1/PHY/NR_UE_TRANSPORT/pucch_nr.c +++ b/openair1/PHY/NR_UE_TRANSPORT/pucch_nr.c @@ -805,8 +805,8 @@ void nr_generate_pucch1_old(PHY_VARS_NR_UE *ue, } #endif //0 -inline void nr_pucch2_3_4_scrambling(uint16_t M_bit,uint16_t rnti,uint16_t n_id,uint64_t *B64,uint8_t *btilde) __attribute__((always_inline)); -inline void nr_pucch2_3_4_scrambling(uint16_t M_bit,uint16_t rnti,uint16_t n_id,uint64_t *B64,uint8_t *btilde) { +static inline void nr_pucch2_3_4_scrambling(uint16_t M_bit,uint16_t rnti,uint16_t n_id,uint64_t *B64,uint8_t *btilde) __attribute__((always_inline)); +static inline void nr_pucch2_3_4_scrambling(uint16_t M_bit,uint16_t rnti,uint16_t n_id,uint64_t *B64,uint8_t *btilde) { uint32_t x1, x2, s=0; int i; uint8_t c; diff --git a/openair1/PHY/defs_gNB.h b/openair1/PHY/defs_gNB.h index 11b5112a6c..fb4f9a0092 100644 --- a/openair1/PHY/defs_gNB.h +++ b/openair1/PHY/defs_gNB.h @@ -96,20 +96,6 @@ typedef struct { uint32_t subframe; /// MIMO mode for this DLSCH MIMO_mode_t mimo_mode; - /// Concatenated sequences - uint8_t *e; - /// LDPC-code outputs - uint8_t *d[MAX_NUM_NR_DLSCH_SEGMENTS]; - /// Interleaver outputs - uint8_t *f; - /// Number of code segments - uint32_t C; - /// Number of bits in "small" code segments - uint32_t K; - /// Number of "Filler" bits - uint32_t F; - /// Encoder BG - uint8_t BG; /// LDPC lifting size uint32_t Z; } NR_DL_gNB_HARQ_t; @@ -868,6 +854,9 @@ typedef struct PHY_VARS_gNB_s { time_stats_t dlsch_encoding_stats; time_stats_t dlsch_modulation_stats; time_stats_t dlsch_scrambling_stats; + time_stats_t dlsch_resource_mapping_stats; + time_stats_t dlsch_layer_mapping_stats; + time_stats_t dlsch_precoding_stats; time_stats_t tinput; time_stats_t tprep; time_stats_t tparity; diff --git a/openair1/SCHED_NR/phy_procedures_nr_gNB.c b/openair1/SCHED_NR/phy_procedures_nr_gNB.c index 1685e206ae..792667d510 100644 --- a/openair1/SCHED_NR/phy_procedures_nr_gNB.c +++ b/openair1/SCHED_NR/phy_procedures_nr_gNB.c @@ -263,7 +263,7 @@ void nr_postDecode(PHY_VARS_gNB *gNB, notifiedFIFO_elt_t *req) { nr_fill_indication(gNB,ulsch_harq->frame, ulsch_harq->slot, rdata->ulsch_id, rdata->harq_pid, 0,0); //dumpsig=1; } else { - LOG_I(PHY,"[gNB %d] ULSCH: Setting NAK for SFN/SF %d/%d (pid %d, ndi %d, status %d, round %d, RV %d, prb_start %d, prb_size %d, TBS %d) r %d\n", + LOG_D(PHY,"[gNB %d] ULSCH: Setting NAK for SFN/SF %d/%d (pid %d, ndi %d, status %d, round %d, RV %d, prb_start %d, prb_size %d, TBS %d) r %d\n", gNB->Mod_id, ulsch_harq->frame, ulsch_harq->slot, rdata->harq_pid, pusch_pdu->pusch_data.new_data_indicator, ulsch_harq->status, ulsch_harq->round, @@ -358,10 +358,11 @@ void nr_ulsch_procedures(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx, int ULSCH number_dmrs_symbols, // number of dmrs symbols irrespective of single or double symbol dmrs pusch_pdu->qam_mod_order, pusch_pdu->nrOfLayers); - LOG_D(PHY,"rb_size %d, number_symbols %d, nb_re_dmrs %d, number_dmrs_symbols %d, qam_mod_order %d, nrOfLayer %d\n", + LOG_D(PHY,"rb_size %d, number_symbols %d, nb_re_dmrs %d, dmrs symbol positions %d, number_dmrs_symbols %d, qam_mod_order %d, nrOfLayer %d\n", pusch_pdu->rb_size, number_symbols, nb_re_dmrs, + pusch_pdu->ul_dmrs_symb_pos, number_dmrs_symbols, // number of dmrs symbols irrespective of single or double symbol dmrs pusch_pdu->qam_mod_order, pusch_pdu->nrOfLayers); diff --git a/openair1/SCHED_NR_UE/phy_procedures_nr_ue.c b/openair1/SCHED_NR_UE/phy_procedures_nr_ue.c index bfa16ef715..850b41d2fb 100644 --- a/openair1/SCHED_NR_UE/phy_procedures_nr_ue.c +++ b/openair1/SCHED_NR_UE/phy_procedures_nr_ue.c @@ -1024,10 +1024,9 @@ bool nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue, stop_meas(&ue->dlsch_decoding_stats[proc->thread_id]); - - LOG_I(PHY, " --> Unscrambling for CW0 %5.3f\n", + LOG_D(PHY, " --> Unscrambling for CW0 %5.3f\n", (ue->dlsch_unscrambling_stats.p_time)/(cpuf*1000.0)); - LOG_I(PHY, "AbsSubframe %d.%d --> LDPC Decoding for CW0 %5.3f\n", + LOG_D(PHY, "AbsSubframe %d.%d --> LDPC Decoding for CW0 %5.3f\n", frame_rx%1024, nr_slot_rx,(ue->dlsch_decoding_stats[proc->thread_id].p_time)/(cpuf*1000.0)); if(is_cw1_active) { @@ -1087,7 +1086,6 @@ bool nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue, (ue->dlsch_unscrambling_stats.p_time)/(cpuf*1000.0)); LOG_D(PHY, "AbsSubframe %d.%d --> ldpc Decoding for CW1 %5.3f\n", frame_rx%1024, nr_slot_rx,(ue->dlsch_decoding_stats[proc->thread_id].p_time)/(cpuf*1000.0)); - LOG_D(PHY,"AbsSubframe %d.%d --> ldpc Decoding for CW1 %5.3f\n", frame_rx%1024, nr_slot_rx,(ue->dlsch_decoding_stats[proc->thread_id].p_time)/(cpuf*1000.0)); @@ -1396,7 +1394,6 @@ void *UE_thread_slot1_dl_processing(void *arg) { stop_meas(&ue->ue_front_end_per_slot_stat[proc->thread_id][1]); - LOG_D(PHY, "[AbsSFN %d.%d] Slot1: FFT + Channel Estimate + Pdsch Proc Slot0 %5.2f \n",frame_rx,nr_slot_rx,ue->ue_front_end_per_slot_stat[proc->thread_id][1].p_time/(cpuf*1000.0)); @@ -1487,7 +1484,6 @@ void *UE_thread_slot1_dl_processing(void *arg) { //printf("Set available LLR slot1 to 1 AbsSubframe %d.%d \n",frame_rx,nr_slot_rx); stop_meas(&ue->pdsch_procedures_per_slot_stat[proc->thread_id][1]); - LOG_D(PHY, "[AbsSFN %d.%d] Slot1: LLR Computation %5.2f \n",frame_rx,nr_slot_rx,ue->pdsch_procedures_per_slot_stat[proc->thread_id][1].p_time/(cpuf*1000.0)); if (pthread_mutex_lock(&proc->mutex_slot1_dl_processing) != 0) { @@ -1857,7 +1853,6 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue, dlsch_parallel); stop_meas(&ue->dlsch_procedures_stat[proc->thread_id]); - LOG_D(PHY, "[SFN %d] Slot1: Pdsch Proc %5.2f\n",nr_slot_rx,ue->pdsch_procedures_stat[proc->thread_id].p_time/(cpuf*1000.0)); LOG_D(PHY, "[SFN %d] Slot0 Slot1: Dlsch Proc %5.2f\n",nr_slot_rx,ue->dlsch_procedures_stat[proc->thread_id].p_time/(cpuf*1000.0)); @@ -1935,7 +1930,6 @@ if (nr_slot_rx==9) { } stop_meas(&ue->generic_stat); - LOG_D(PHY,"after tubo until end of Rx %5.2f \n",ue->generic_stat.p_time/(cpuf*1000.0)); #ifdef EMOS phy_procedures_emos_UE_RX(ue,slot,gNB_id); @@ -1945,7 +1939,6 @@ phy_procedures_emos_UE_RX(ue,slot,gNB_id); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_RX, VCD_FUNCTION_OUT); stop_meas(&ue->phy_proc_rx[proc->thread_id]); - LOG_D(PHY, "------FULL RX PROC [SFN %d]: %5.2f ------\n",nr_slot_rx,ue->phy_proc_rx[proc->thread_id].p_time/(cpuf*1000.0)); //#endif //pdsch diff --git a/openair1/SIMULATION/NR_PHY/dlschsim.c b/openair1/SIMULATION/NR_PHY/dlschsim.c index 1d9584b30b..ff07422c6b 100644 --- a/openair1/SIMULATION/NR_PHY/dlschsim.c +++ b/openair1/SIMULATION/NR_PHY/dlschsim.c @@ -118,7 +118,8 @@ int main(int argc, char **argv) uint8_t mcs_table = 0; double DS_TDL = .03; cpuf = get_cpu_freq_GHz(); - + char gNBthreads[128]="n"; + if (load_configmodule(argc, argv, CONFIG_ENABLECMDLINEONLY) == 0) { exit_fun("[NR_DLSCHSIM] Error, configuration module init failed\n"); } @@ -126,7 +127,7 @@ int main(int argc, char **argv) //logInit(); randominit(0); - while ((c = getopt(argc, argv, "df:hpVg:i:j:n:l:m:r:s:S:y:z:M:N:F:R:P:L:")) != -1) { + while ((c = getopt(argc, argv, "df:hpVg:i:j:n:l:m:r:s:S:y:z:M:N:F:R:P:L:X:")) != -1) { switch (c) { /*case 'f': write_output_file = 1; @@ -292,6 +293,11 @@ int main(int argc, char **argv) nb_rb = atoi(optarg); break; + case 'X': + strncpy(gNBthreads, optarg, sizeof(gNBthreads)); + gNBthreads[sizeof(gNBthreads)-1]=0; + break; + /*case 'x': transmission_mode = atoi(optarg); break;*/ @@ -352,6 +358,8 @@ int main(int argc, char **argv) RC.gNB = (PHY_VARS_gNB **) malloc(sizeof(PHY_VARS_gNB *)); RC.gNB[0] = malloc(sizeof(PHY_VARS_gNB)); gNB = RC.gNB[0]; + gNB->threadPool = (tpool_t*)malloc(sizeof(tpool_t)); + initTpool(gNBthreads, gNB->threadPool, true); //gNB_config = &gNB->gNB_config; frame_parms = &gNB->frame_parms; //to be initialized I suppose (maybe not necessary for PBCH) frame_parms->nb_antennas_tx = n_tx; @@ -468,7 +476,6 @@ int main(int argc, char **argv) double *modulated_input = malloc16(sizeof(double) * 16 * 68 * 384); // [hna] 16 segments, 68*Zc short *channel_output_fixed = malloc16(sizeof(short) * 16 * 68 * 384); short *channel_output_uncoded = malloc16(sizeof(unsigned short) * 16 * 68 * 384); - double errors_bit_uncoded = 0; //unsigned char *estimated_output; unsigned char *estimated_output_bit; unsigned char *test_input_bit; @@ -506,8 +513,10 @@ int main(int argc, char **argv) //printf("crc32: [0]->0x%08x\n",crc24c(test_input, 32)); // generate signal + unsigned char output[rel15->rbSize * NR_SYMBOLS_PER_SLOT * NR_NB_SC_PER_RB * 8 * NR_MAX_NB_LAYERS] __attribute__((aligned(32))); + bzero(output,rel15->rbSize * NR_SYMBOLS_PER_SLOT * NR_NB_SC_PER_RB * 8 * NR_MAX_NB_LAYERS); if (input_fd == NULL) { - nr_dlsch_encoding(gNB, test_input, frame, slot, dlsch, frame_parms,NULL,NULL,NULL,NULL,NULL,NULL,NULL); + nr_dlsch_encoding(gNB, test_input, frame, slot, dlsch, frame_parms,output,NULL,NULL,NULL,NULL,NULL,NULL,NULL); } for (SNR = snr0; SNR < snr1; SNR += snr_step) { @@ -515,7 +524,6 @@ int main(int argc, char **argv) n_false_positive = 0; for (trial = 0; trial < n_trials; trial++) { - errors_bit_uncoded = 0; for (i = 0; i < available_bits; i++) { #ifdef DEBUG_CODER if ((i&0xf)==0) @@ -524,11 +532,12 @@ int main(int argc, char **argv) //if (i<16) // printf("encoder output f[%d] = %d\n",i,dlsch->harq_processes[0]->f[i]); - if (dlsch->harq_process.f[i] == 0) + + if (output[i] == 0) modulated_input[i] = 1.0; ///sqrt(2); //QPSK else modulated_input[i] = -1.0; ///sqrt(2); - + //if (i<16) printf("modulated_input[%d] = %d\n",i,modulated_input[i]); //SNR =10; SNR_lin = pow(10, SNR / 10.0); @@ -546,18 +555,14 @@ int main(int argc, char **argv) i,modulated_input[i], i,channel_output_fixed[i]); */ + //Uncoded BER if (channel_output_fixed[i] < 0) channel_output_uncoded[i] = 1; //QPSK demod else channel_output_uncoded[i] = 0; - - if (channel_output_uncoded[i] != dlsch->harq_process.f[i]) - errors_bit_uncoded = errors_bit_uncoded + 1; } - //if (errors_bit_uncoded>10) - //printf("errors bits uncoded %f\n", errors_bit_uncoded); #ifdef DEBUG_CODER printf("\n"); exit(-1); diff --git a/openair1/SIMULATION/NR_PHY/dlsim.c b/openair1/SIMULATION/NR_PHY/dlsim.c index 50e21ac02b..fa868a6896 100644 --- a/openair1/SIMULATION/NR_PHY/dlsim.c +++ b/openair1/SIMULATION/NR_PHY/dlsim.c @@ -277,7 +277,7 @@ void nr_dlsim_preprocessor(module_id_t module_id, UE_info->CellGroup[0], sched_ctrl->active_bwp, NULL, - /* tda = */ 2, + /* tda = */ 0, dci_format, ps); @@ -369,6 +369,7 @@ int main(int argc, char **argv) uint8_t n_tx=1,n_rx=1; uint8_t round; uint8_t num_rounds = 4; + char gNBthreads[128]="n"; channel_desc_t *gNB2UE; //uint32_t nsymb,tx_lev,tx_lev1 = 0,tx_lev2 = 0; @@ -430,9 +431,7 @@ int main(int argc, char **argv) FILE *scg_fd=NULL; - - while ((c = getopt (argc, argv, "f:hA:pf:g:in:s:S:t:x:y:z:M:N:F:GR:dPIL:Ea:b:D:e:m:w:T:U:q")) != -1) { - + while ((c = getopt (argc, argv, "f:hA:pf:g:in:s:S:t:x:y:z:M:N:F:GR:dPIL:Ea:b:d:e:m:w:T:U:qX:")) != -1) { switch (c) { case 'f': scg_fd = fopen(optarg,"r"); @@ -635,7 +634,12 @@ int main(int argc, char **argv) dmrs_arg[i] = atoi(argv[optind++]); } break; - + + case 'X': + strncpy(gNBthreads, optarg, sizeof(gNBthreads)); + gNBthreads[sizeof(gNBthreads)-1]=0; + break; + default: case 'h': printf("%s -h(elp) -p(extended_prefix) -N cell_id -f output_filename -F input_filename -g channel_model -n n_frames -t Delayspread -s snr0 -S snr1 -x transmission_mode -y TXant -z RXant -i Intefrence0 -j Interference1 -A interpolation_file -C(alibration offset dB) -N CellId\n", @@ -671,7 +675,8 @@ int main(int argc, char **argv) printf("-U Change DMRS Config, arguments list DMRS TYPE{0=A,1=B} DMRS AddPos{0:2} DMRS ConfType{1:2}, e.g. -U 3 0 2 1 \n"); printf("-P Print DLSCH performances\n"); printf("-w Write txdata to binary file (one frame)\n"); - printf("-D number of dlsch threads, 0: no dlsch parallelization\n"); + printf("-d number of dlsch threads, 0: no dlsch parallelization\n"); + printf("-X gNB thread pool configuration, n => no threads"); exit (-1); break; } @@ -762,7 +767,7 @@ int main(int argc, char **argv) NR_CellGroupConfig_t *secondaryCellGroup=calloc(1,sizeof(*secondaryCellGroup)); prepare_scc(rrc.carrier.servingcellconfigcommon); uint64_t ssb_bitmap = 1; - fill_scc(rrc.carrier.servingcellconfigcommon,&ssb_bitmap,N_RB_DL,N_RB_DL,mu,mu); + fill_scc_sim(rrc.carrier.servingcellconfigcommon,&ssb_bitmap,N_RB_DL,N_RB_DL,mu,mu); ssb_bitmap = 1;// Enable only first SSB with index ssb_indx=0 fix_scc(scc,ssb_bitmap); @@ -827,6 +832,14 @@ int main(int argc, char **argv) fs = 61.44e6; bw = 40e6; } + else if (mu == 1 && N_RB_DL == 133) { + fs = 61.44e6; + bw = 50e6; + } + else if (mu == 1 && N_RB_DL == 162) { + fs = 61.44e6; + bw = 60e6; + } else if (mu == 3 && N_RB_DL == 66) { fs = 122.88e6; bw = 100e6; @@ -966,8 +979,7 @@ int main(int argc, char **argv) snrRun = 0; gNB->threadPool = (tpool_t*)malloc(sizeof(tpool_t)); - char tp_param[] = "n"; - initTpool(tp_param, gNB->threadPool, true); + initTpool(gNBthreads, gNB->threadPool, true); gNB->resp_L1_tx = (notifiedFIFO_t*) malloc(sizeof(notifiedFIFO_t)); initNotifiedFIFO(gNB->resp_L1_tx); // we create 2 threads for L1 tx processing @@ -1217,8 +1229,8 @@ int main(int argc, char **argv) UE->dlsch[UE_proc.thread_id][0][0]->max_ldpc_iterations+1) n_errors++; - NR_UE_PDSCH **pdsch_vars = UE->pdsch_vars[UE_proc.thread_id]; - int16_t *UE_llr = pdsch_vars[0]->llr[0]; + //NR_UE_PDSCH **pdsch_vars = UE->pdsch_vars[UE_proc.thread_id]; + //int16_t *UE_llr = pdsch_vars[0]->llr[0]; TBS = UE_harq_process->TBS;//rel15->TBSize[0]; uint16_t length_dmrs = get_num_dmrs(rel15->dlDmrsSymbPos); @@ -1233,6 +1245,7 @@ int main(int argc, char **argv) printf("[DLSIM][PTRS] Available bits are: %5u, removed PTRS bits are: %5u \n",available_bits, (ptrsSymbPerSlot * ptrsRePerSymb *rel15->nrOfLayers* 2) ); } + /* for (i = 0; i < available_bits; i++) { if(((gNB_dlsch->harq_process.f[i] == 0) && (UE_llr[i] <= 0)) || @@ -1246,6 +1259,7 @@ int main(int argc, char **argv) } } + */ for (i = 0; i < TBS; i++) { estimated_output_bit[i] = (UE_harq_process->b[i/8] & (1 << (i & 7))) >> (i & 7); @@ -1289,11 +1303,9 @@ int main(int argc, char **argv) printf("\n"); if (print_perf==1) { - printf("\ngNB TX function statistics (per %d us slot, NPRB %d, mcs %d, TBS %d, Kr %d (Zc %d))\n", + printf("\ngNB TX function statistics (per %d us slot, NPRB %d, mcs %d, TBS %d)\n", 1000>>*scc->ssbSubcarrierSpacing, g_rbSize, g_mcsIndex, - msgDataTx->dlsch[0][0]->harq_process.pdsch_pdu.pdsch_pdu_rel15.TBSize[0]<<3, - msgDataTx->dlsch[0][0]->harq_process.K, - msgDataTx->dlsch[0][0]->harq_process.K/((msgDataTx->dlsch[0][0]->harq_process.pdsch_pdu.pdsch_pdu_rel15.TBSize[0]<<3)>3824?22:10)); + msgDataTx->dlsch[0][0]->harq_process.pdsch_pdu.pdsch_pdu_rel15.TBSize[0]<<3); printDistribution(gNB->phy_proc_tx_0,table_tx,"PHY proc tx"); printStatIndent2(&gNB->dlsch_encoding_stats,"DLSCH encoding time"); printStatIndent3(&gNB->dlsch_segmentation_stats,"DLSCH segmentation time"); @@ -1305,6 +1317,9 @@ int main(int argc, char **argv) printStatIndent3(&gNB->dlsch_interleaving_stats, "DLSCH Interleaving time"); printStatIndent2(&gNB->dlsch_modulation_stats,"DLSCH modulation time"); printStatIndent2(&gNB->dlsch_scrambling_stats, "DLSCH scrambling time"); + printStatIndent2(&gNB->dlsch_layer_mapping_stats, "DLSCH Layer Mapping time"); + printStatIndent2(&gNB->dlsch_resource_mapping_stats, "DLSCH Resource Mapping time"); + printStatIndent2(&gNB->dlsch_precoding_stats,"DLSCH Layer Precoding time"); printf("\nUE RX function statistics (per %d us slot)\n",1000>>*scc->ssbSubcarrierSpacing); diff --git a/openair1/SIMULATION/NR_PHY/nr_unitary_defs.h b/openair1/SIMULATION/NR_PHY/nr_unitary_defs.h index 8d4acd1af1..805913d055 100644 --- a/openair1/SIMULATION/NR_PHY/nr_unitary_defs.h +++ b/openair1/SIMULATION/NR_PHY/nr_unitary_defs.h @@ -59,167 +59,7 @@ int oai_nfapi_rach_ind(nfapi_rach_indication_t *rach_ind) {return(0);} //NR_IF_Module_t *NR_IF_Module_init(int Mod_id){return(NULL);} int oai_nfapi_ul_config_req(nfapi_ul_config_request_t *ul_config_req) { return(0); } - -void fill_scc(NR_ServingCellConfigCommon_t *scc,uint64_t *ssb_bitmap,int N_RB_DL,int N_RB_UL,int mu_dl,int mu_ul) { - - *scc->physCellId=0; \ - // *scc->n_TimingAdvanceOffset=NR_ServingCellConfigCommon__n_TimingAdvanceOffset_n0; - *scc->ssb_periodicityServingCell=NR_ServingCellConfigCommon__ssb_periodicityServingCell_ms20; - scc->dmrs_TypeA_Position=NR_ServingCellConfigCommon__dmrs_TypeA_Position_pos2; - *scc->ssbSubcarrierSpacing=NR_SubcarrierSpacing_kHz30; - *scc->downlinkConfigCommon->frequencyInfoDL->absoluteFrequencySSB=641032; - *scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0]=78; - scc->downlinkConfigCommon->frequencyInfoDL->absoluteFrequencyPointA=640000; - scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->offsetToCarrier=0; - scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing=NR_SubcarrierSpacing_kHz30; - - scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->carrierBandwidth=N_RB_DL; - scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth=13036; - scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.subcarrierSpacing=mu_dl;//NR_SubcarrierSpacing_kHz30; - *scc->downlinkConfigCommon->initialDownlinkBWP->pdcch_ConfigCommon->choice.setup->controlResourceSetZero=12; - *scc->downlinkConfigCommon->initialDownlinkBWP->pdcch_ConfigCommon->choice.setup->searchSpaceZero=0; - *scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[0]->k0=0; - scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[0]->mappingType=NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA; - scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[0]->startSymbolAndLength=40; - *scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[1]->k0=0; - scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[1]->mappingType=NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA; - scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[1]->startSymbolAndLength=53; - *scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[2]->k0=0; - scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[2]->mappingType=NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA; - scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[2]->startSymbolAndLength=54; - *scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[3]->k0=-1; - scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[3]->mappingType=NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA; - scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[3]->startSymbolAndLength=54; - *scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[4]->k0=-1; - scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[4]->mappingType=NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA; - scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[4]->startSymbolAndLength=54; - *scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[5]->k0=-1; - scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[5]->mappingType=NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA; - scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[5]->startSymbolAndLength=54; - *scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[6]->k0=-1; - scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[6]->mappingType=NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA; - scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[6]->startSymbolAndLength=54; - *scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[7]->k0=-1; - scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[7]->mappingType=NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA; - scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[7]->startSymbolAndLength=54; - *scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[8]->k0=-1; - scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[8]->mappingType=NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA; - scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[8]->startSymbolAndLength=54; - *scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[9]->k0=-1; - scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[9]->mappingType=NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA; - scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[9]->startSymbolAndLength=54; - *scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[10]->k0=-1; - scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[10]->mappingType=NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA; - scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[10]->startSymbolAndLength=54; - *scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[11]->k0=-1; - scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[11]->mappingType=NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA; - scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[11]->startSymbolAndLength=54; - *scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[12]->k0=-1; - scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[12]->mappingType=NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA; - scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[12]->startSymbolAndLength=54; - *scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[13]->k0=-1; - scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[13]->mappingType=NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA; - scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[13]->startSymbolAndLength=54; - *scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[14]->k0=-1; - scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[14]->mappingType=NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA; - scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[14]->startSymbolAndLength=54; - *scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[15]->k0=-1; - scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[15]->mappingType=NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA; - scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[15]->startSymbolAndLength=54; - *scc->uplinkConfigCommon->frequencyInfoUL->frequencyBandList->list.array[0]=78; - *scc->uplinkConfigCommon->frequencyInfoUL->absoluteFrequencyPointA=-1; - scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->offsetToCarrier=0; - scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing=NR_SubcarrierSpacing_kHz30; - scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->carrierBandwidth=N_RB_UL; - *scc->uplinkConfigCommon->frequencyInfoUL->p_Max=20; - scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.locationAndBandwidth=13036; - scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.subcarrierSpacing=mu_ul;//NR_SubcarrierSpacing_kHz30; - scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.prach_ConfigurationIndex=98; - scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.msg1_FDM=NR_RACH_ConfigGeneric__msg1_FDM_one; - scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.msg1_FrequencyStart=0; - scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.zeroCorrelationZoneConfig=13; - scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.preambleReceivedTargetPower=-118; - scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.preambleTransMax=NR_RACH_ConfigGeneric__preambleTransMax_n10; - scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.powerRampingStep=NR_RACH_ConfigGeneric__powerRampingStep_dB2; - scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.ra_ResponseWindow=NR_RACH_ConfigGeneric__ra_ResponseWindow_sl20; - scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->ssb_perRACH_OccasionAndCB_PreamblesPerSSB->present=NR_RACH_ConfigCommon__ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR_one; - scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->ssb_perRACH_OccasionAndCB_PreamblesPerSSB->choice.one=NR_RACH_ConfigCommon__ssb_perRACH_OccasionAndCB_PreamblesPerSSB__one_n64; - scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->ra_ContentionResolutionTimer=NR_RACH_ConfigCommon__ra_ContentionResolutionTimer_sf64; - *scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rsrp_ThresholdSSB=19; - scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->prach_RootSequenceIndex.present=NR_RACH_ConfigCommon__prach_RootSequenceIndex_PR_l139; - scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->prach_RootSequenceIndex.choice.l139=0; - scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->restrictedSetConfig=NR_RACH_ConfigCommon__restrictedSetConfig_unrestrictedSet; - *scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[0]->k2=6; - scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[0]->mappingType=NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB; - scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[0]->startSymbolAndLength=55; - *scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[1]->k2=6; - scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[1]->mappingType=NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB; - scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[1]->startSymbolAndLength=69; - *scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[2]->k2=6; - scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[2]->mappingType=NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB; - scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[2]->startSymbolAndLength=55; - *scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[3]->k2=33; - scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[3]->mappingType=NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB; - scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[3]->startSymbolAndLength=55; - *scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[4]->k2=33; - scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[4]->mappingType=NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB; - scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[4]->startSymbolAndLength=55; - *scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[5]->k2=33; - scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[5]->mappingType=NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB; - scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[5]->startSymbolAndLength=55; - *scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[6]->k2=33; - scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[6]->mappingType=NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB; - scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[6]->startSymbolAndLength=55; - *scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[7]->k2=33; - scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[7]->mappingType=NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB; - scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[7]->startSymbolAndLength=55; - *scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[8]->k2=33; - scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[8]->mappingType=NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB; - scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[8]->startSymbolAndLength=55; - *scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[9]->k2=33; - scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[9]->mappingType=NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB; - scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[9]->startSymbolAndLength=55; - *scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[10]->k2=33; - scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[10]->mappingType=NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB; - scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[10]->startSymbolAndLength=55; - *scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[11]->k2=33; - scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[11]->mappingType=NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB; - scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[11]->startSymbolAndLength=55; - *scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[12]->k2=33; - scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[12]->mappingType=NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB; - scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[12]->startSymbolAndLength=55; - *scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[13]->k2=33; - scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[13]->mappingType=NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB; - scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[13]->startSymbolAndLength=55; - *scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[14]->k2=33; - scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[14]->mappingType=NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB; - scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[14]->startSymbolAndLength=55; - *scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[15]->k2=33; - scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[15]->mappingType=NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB; - scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[15]->startSymbolAndLength=55; - *scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->msg3_DeltaPreamble=1; - *scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->p0_NominalWithGrant=-90; - scc->uplinkConfigCommon->initialUplinkBWP->pucch_ConfigCommon->choice.setup->pucch_GroupHopping=NR_PUCCH_ConfigCommon__pucch_GroupHopping_neither; - *scc->uplinkConfigCommon->initialUplinkBWP->pucch_ConfigCommon->choice.setup->hoppingId=40; - *scc->uplinkConfigCommon->initialUplinkBWP->pucch_ConfigCommon->choice.setup->p0_nominal=-90; - scc->ssb_PositionsInBurst->present=NR_ServingCellConfigCommon__ssb_PositionsInBurst_PR_mediumBitmap; - *ssb_bitmap=0xff; - scc->tdd_UL_DL_ConfigurationCommon->referenceSubcarrierSpacing=NR_SubcarrierSpacing_kHz30; - scc->tdd_UL_DL_ConfigurationCommon->pattern1.dl_UL_TransmissionPeriodicity=NR_TDD_UL_DL_Pattern__dl_UL_TransmissionPeriodicity_ms5; - scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSlots=7; - scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSymbols=6; - scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSlots=2; - scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols=4; - scc->tdd_UL_DL_ConfigurationCommon->pattern2->dl_UL_TransmissionPeriodicity=321; - - scc->tdd_UL_DL_ConfigurationCommon->pattern2->nrofDownlinkSlots=-1; - scc->tdd_UL_DL_ConfigurationCommon->pattern2->nrofDownlinkSymbols=-1; - scc->tdd_UL_DL_ConfigurationCommon->pattern2->nrofUplinkSlots=-1; - scc->tdd_UL_DL_ConfigurationCommon->pattern2->nrofUplinkSymbols=-1; - scc->ss_PBCH_BlockPower=20; - *scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->msg1_SubcarrierSpacing=-1; -} - +void fill_scc_sim(NR_ServingCellConfigCommon_t *scc,uint64_t *ssb_bitmap,int N_RB_DL,int N_RB_UL,int mu_dl,int mu_ul); void fix_scc(NR_ServingCellConfigCommon_t *scc,uint64_t ssbmap); void prepare_scc(NR_ServingCellConfigCommon_t *scc); void prepare_scd(NR_ServingCellConfig_t *scd); diff --git a/openair1/SIMULATION/NR_PHY/ulsim.c b/openair1/SIMULATION/NR_PHY/ulsim.c index a7075eb218..97c753d455 100644 --- a/openair1/SIMULATION/NR_PHY/ulsim.c +++ b/openair1/SIMULATION/NR_PHY/ulsim.c @@ -707,7 +707,7 @@ int main(int argc, char **argv) NR_CellGroupConfig_t *secondaryCellGroup=calloc(1,sizeof(*secondaryCellGroup)); prepare_scc(rrc.carrier.servingcellconfigcommon); uint64_t ssb_bitmap; - fill_scc(rrc.carrier.servingcellconfigcommon,&ssb_bitmap,N_RB_DL,N_RB_DL,mu,mu); + fill_scc_sim(rrc.carrier.servingcellconfigcommon,&ssb_bitmap,N_RB_DL,N_RB_DL,mu,mu); fix_scc(scc,ssb_bitmap); @@ -732,17 +732,13 @@ int main(int argc, char **argv) nfapi_nr_config_request_scf_t *cfg = &gNB->gNB_config; cfg->carrier_config.num_tx_ant.value = n_tx; cfg->carrier_config.num_rx_ant.value = n_rx; - nr_phy_config_request_sim(gNB,N_RB_DL,N_RB_DL,mu,0,0x01); +// nr_phy_config_request_sim(gNB,N_RB_DL,N_RB_DL,mu,0,0x01); phy_init_nr_gNB(gNB,0,1); N_RB_DL = gNB->frame_parms.N_RB_DL; NR_BWP_Uplink_t *ubwp=secondaryCellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig->uplinkBWP_ToAddModList->list.array[0]; - //crcTableInit(); - - //nr_phy_config_request_sim(gNB, N_RB_DL, N_RB_UL, mu, Nid_cell, SSB_positions); - //configure UE UE = malloc(sizeof(PHY_VARS_NR_UE)); diff --git a/openair2/COMMON/rrc_messages_types.h b/openair2/COMMON/rrc_messages_types.h index f61648d8b4..e1886b57ff 100644 --- a/openair2/COMMON/rrc_messages_types.h +++ b/openair2/COMMON/rrc_messages_types.h @@ -412,7 +412,7 @@ typedef struct NRRrcConfigurationReq_s { int sib1_tda; int pdsch_AntennaPorts; int pusch_AntennaPorts; - int minRXTXTIMEpdsch; + int minRXTXTIME; int do_CSIRS; int pusch_TargetSNRx10; int pucch_TargetSNRx10; diff --git a/openair2/GNB_APP/RRC_nr_paramsvalues.h b/openair2/GNB_APP/RRC_nr_paramsvalues.h index 70295b1c31..8a7ce64d91 100644 --- a/openair2/GNB_APP/RRC_nr_paramsvalues.h +++ b/openair2/GNB_APP/RRC_nr_paramsvalues.h @@ -58,56 +58,6 @@ #define GNB_CONFIG_STRING_INITIALDLBWPCONTROLRESOURCESETZERO "initialDLBWPcontrolResourceSetZero" #define GNB_CONFIG_STRING_INITIALDLBWPSEARCHSPACEZERO "initialDLBWPsearchSpaceZero" - -#define GNB_CONFIG_STRING_INITIALDLBWPK0_0 "initialDLBWPk0_0" -#define GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_0 "initialDLBWPmappingType_0" -#define GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_0 "initialDLBWPstartSymbolAndLength_0" -#define GNB_CONFIG_STRING_INITIALDLBWPK0_1 "initialDLBWPk0_1" -#define GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_1 "initialDLBWPmappingType_1" -#define GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_1 "initialDLBWPstartSymbolAndLength_1" -#define GNB_CONFIG_STRING_INITIALDLBWPK0_2 "initialDLBWPk0_2" -#define GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_2 "initialDLBWPmappingType_2" -#define GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_2 "initialDLBWPstartSymbolAndLength_2" -#define GNB_CONFIG_STRING_INITIALDLBWPK0_3 "initialDLBWPk0_3" -#define GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_3 "initialDLBWPmappingType_3" -#define GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_3 "initialDLBWPstartSymbolAndLength_3" -#define GNB_CONFIG_STRING_INITIALDLBWPK0_4 "initialDLBWPk0_4" -#define GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_4 "initialDLBWPmappingType_4" -#define GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_4 "initialDLBWPstartSymbolAndLength_4" -#define GNB_CONFIG_STRING_INITIALDLBWPK0_5 "initialDLBWPk0_5" -#define GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_5 "initialDLBWPmappingType_5" -#define GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_5 "initialDLBWPstartSymbolAndLength_5" -#define GNB_CONFIG_STRING_INITIALDLBWPK0_6 "initialDLBWPk0_6" -#define GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_6 "initialDLBWPmappingType_6" -#define GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_6 "initialDLBWPstartSymbolAndLength_6" -#define GNB_CONFIG_STRING_INITIALDLBWPK0_7 "initialDLBWPk0_7" -#define GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_7 "initialDLBWPmappingType_7" -#define GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_7 "initialDLBWPstartSymbolAndLength_7" -#define GNB_CONFIG_STRING_INITIALDLBWPK0_8 "initialDLBWPk0_8" -#define GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_8 "initialDLBWPmappingType_8" -#define GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_8 "initialDLBWPstartSymbolAndLength_8" -#define GNB_CONFIG_STRING_INITIALDLBWPK0_9 "initialDLBWPk0_9" -#define GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_9 "initialDLBWPmappingType_9" -#define GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_9 "initialDLBWPstartSymbolAndLength_9" -#define GNB_CONFIG_STRING_INITIALDLBWPK0_10 "initialDLBWPk0_10" -#define GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_10 "initialDLBWPmappingType_10" -#define GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_10 "initialDLBWPstartSymbolAndLength_10" -#define GNB_CONFIG_STRING_INITIALDLBWPK0_11 "initialDLBWPk0_11" -#define GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_11 "initialDLBWPmappingType_11" -#define GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_11 "initialDLBWPstartSymbolAndLength_11" -#define GNB_CONFIG_STRING_INITIALDLBWPK0_12 "initialDLBWPk0_12" -#define GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_12 "initialDLBWPmappingType_12" -#define GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_12 "initialDLBWPstartSymbolAndLength_12" -#define GNB_CONFIG_STRING_INITIALDLBWPK0_13 "initialDLBWPk0_13" -#define GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_13 "initialDLBWPmappingType_13" -#define GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_13 "initialDLBWPstartSymbolAndLength_13" -#define GNB_CONFIG_STRING_INITIALDLBWPK0_14 "initialDLBWPk0_14" -#define GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_14 "initialDLBWPmappingType_14" -#define GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_14 "initialDLBWPstartSymbolAndLength_14" -#define GNB_CONFIG_STRING_INITIALDLBWPK0_15 "initialDLBWPk0_15" -#define GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_15 "initialDLBWPmappingType_15" -#define GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_15 "initialDLBWPstartSymbolAndLength_15" - #define GNB_CONFIG_STRING_ULFREQUENCYBAND "ul_frequencyBand" #define GNB_CONFIG_STRING_ULABSOLUEFREQUENCYPOINTA "ul_absoluteFrequencyPointA" #define GNB_CONFIG_STRING_ULOFFSETTOCARRIER "ul_offstToCarrier" @@ -142,54 +92,6 @@ #define GNB_CONFIG_STRING_HOPPINGID "hoppingId" #define GNB_CONFIG_STRING_P0NOMINAL "p0_nominal" #define GNB_CONFIG_STRING_PUCCHRES "pucch_ResourceCommon" -#define GNB_CONFIG_STRING_INITIALULBWPK2_0 "initialULBWPk2_0" -#define GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_0 "initialULBWPmappingType_0" -#define GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_0 "initialULBWPstartSymbolAndLength_0" -#define GNB_CONFIG_STRING_INITIALULBWPK2_1 "initialULBWPk2_1" -#define GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_1 "initialULBWPmappingType_1" -#define GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_1 "initialULBWPstartSymbolAndLength_1" -#define GNB_CONFIG_STRING_INITIALULBWPK2_2 "initialULBWPk2_2" -#define GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_2 "initialULBWPmappingType_2" -#define GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_2 "initialULBWPstartSymbolAndLength_2" -#define GNB_CONFIG_STRING_INITIALULBWPK2_3 "initialULBWPk2_3" -#define GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_3 "initialULBWPmappingType_3" -#define GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_3 "initialULBWPstartSymbolAndLength_3" -#define GNB_CONFIG_STRING_INITIALULBWPK2_4 "initialULBWPk2_4" -#define GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_4 "initialULBWPmappingType_4" -#define GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_4 "initialULBWPstartSymbolAndLength_4" -#define GNB_CONFIG_STRING_INITIALULBWPK2_5 "initialULBWPk2_5" -#define GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_5 "initialULBWPmappingType_5" -#define GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_5 "initialULBWPstartSymbolAndLength_5" -#define GNB_CONFIG_STRING_INITIALULBWPK2_6 "initialULBWPk2_6" -#define GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_6 "initialULBWPmappingType_6" -#define GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_6 "initialULBWPstartSymbolAndLength_6" -#define GNB_CONFIG_STRING_INITIALULBWPK2_7 "initialULBWPk2_7" -#define GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_7 "initialULBWPmappingType_7" -#define GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_7 "initialULBWPstartSymbolAndLength_7" -#define GNB_CONFIG_STRING_INITIALULBWPK2_8 "initialULBWPk2_8" -#define GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_8 "initialULBWPmappingType_8" -#define GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_8 "initialULBWPstartSymbolAndLength_8" -#define GNB_CONFIG_STRING_INITIALULBWPK2_9 "initialULBWPk2_9" -#define GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_9 "initialULBWPmappingType_9" -#define GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_9 "initialULBWPstartSymbolAndLength_9" -#define GNB_CONFIG_STRING_INITIALULBWPK2_10 "initialULBWPk2_10" -#define GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_10 "initialULBWPmappingType_10" -#define GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_10 "initialULBWPstartSymbolAndLength_10" -#define GNB_CONFIG_STRING_INITIALULBWPK2_11 "initialULBWPk2_11" -#define GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_11 "initialULBWPmappingType_11" -#define GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_11 "initialULBWPstartSymbolAndLength_11" -#define GNB_CONFIG_STRING_INITIALULBWPK2_12 "initialULBWPk2_12" -#define GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_12 "initialULBWPmappingType_12" -#define GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_12 "initialULBWPstartSymbolAndLength_12" -#define GNB_CONFIG_STRING_INITIALULBWPK2_13 "initialULBWPk2_13" -#define GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_13 "initialULBWPmappingType_13" -#define GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_13 "initialULBWPstartSymbolAndLength_13" -#define GNB_CONFIG_STRING_INITIALULBWPK2_14 "initialULBWPk2_14" -#define GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_14 "initialULBWPmappingType_14" -#define GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_14 "initialULBWPstartSymbolAndLength_14" -#define GNB_CONFIG_STRING_INITIALULBWPK2_15 "initialULBWPk2_15" -#define GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_15 "initialULBWPmappingType_15" -#define GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_15 "initialULBWPstartSymbolAndLength_15" #define GNB_CONFIG_STRING_SSBPOSITIONSINBURSTPR "ssb_PositionsInBurst_PR" @@ -273,54 +175,6 @@ {GNB_CONFIG_STRING_INITIALDLBWPSUBCARRIERSPACING,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.subcarrierSpacing,defint64val:NR_SubcarrierSpacing_kHz30,TYPE_INT64,0/*12*/},\ {GNB_CONFIG_STRING_INITIALDLBWPCONTROLRESOURCESETZERO,NULL,0,i64ptr:scc->downlinkConfigCommon->initialDownlinkBWP->pdcch_ConfigCommon->choice.setup->controlResourceSetZero,defint64val:12,TYPE_INT64,0/*13*/},\ {GNB_CONFIG_STRING_INITIALDLBWPSEARCHSPACEZERO,NULL,0,i64ptr:scc->downlinkConfigCommon->initialDownlinkBWP->pdcch_ConfigCommon->choice.setup->searchSpaceZero,defint64val:0,TYPE_INT64,0/*14*/},\ -{GNB_CONFIG_STRING_INITIALDLBWPK0_0,NULL,0,i64ptr:scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[0]->k0,defint64val:-1,TYPE_INT64,0/*15*/},\ -{GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_0,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[0]->mappingType,defint64val:-1,TYPE_INT64,0/*16*/},\ -{GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_0,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[0]->startSymbolAndLength,defint64val:-1,TYPE_INT64,0/*17*/},\ -{GNB_CONFIG_STRING_INITIALDLBWPK0_1,NULL,0,i64ptr:scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[1]->k0,defint64val:-1,TYPE_INT64,0/*18*/},\ -{GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_1,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[1]->mappingType,defint64val:NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA,TYPE_INT64,0/*19*/},\ -{GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_1,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[1]->startSymbolAndLength,defint64val:53,TYPE_INT64,0/*20*/}, \ -{GNB_CONFIG_STRING_INITIALDLBWPK0_2,NULL,0,i64ptr:scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[2]->k0,defint64val:-1,TYPE_INT64,0/*21*/},\ -{GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_2,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[2]->mappingType,defint64val:NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA,TYPE_INT64,0/*22*/},\ -{GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_2,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[2]->startSymbolAndLength,defint64val:54,TYPE_INT64,0/*23*/},\ -{GNB_CONFIG_STRING_INITIALDLBWPK0_3,NULL,0,i64ptr:scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[3]->k0,defint64val:-1,TYPE_INT64,0/*24*/},\ -{GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_3,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[3]->mappingType,defint64val:NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA,TYPE_INT64,0/*25*/},\ -{GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_3,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[3]->startSymbolAndLength,defint64val:54,TYPE_INT64,0/*26*/},\ -{GNB_CONFIG_STRING_INITIALDLBWPK0_4,NULL,0,i64ptr:scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[4]->k0,defint64val:-1,TYPE_INT64,0/*27*/},\ -{GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_4,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[4]->mappingType,defint64val:NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA,TYPE_INT64,0/*28*/}, \ -{GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_4,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[4]->startSymbolAndLength,defint64val:54,TYPE_INT64,0/*29*/},\ -{GNB_CONFIG_STRING_INITIALDLBWPK0_5,NULL,0,i64ptr:scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[5]->k0,defint64val:-1,TYPE_INT64,0/*30*/}, \ -{GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_5,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[5]->mappingType,defint64val:NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA,TYPE_INT64,0/*31*/},\ -{GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_5,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[5]->startSymbolAndLength,defint64val:54,TYPE_INT64,0/*32*/},\ -{GNB_CONFIG_STRING_INITIALDLBWPK0_6,NULL,0,i64ptr:scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[6]->k0,defint64val:-1,TYPE_INT64,0/*33*/},\ -{GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_6,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[6]->mappingType,defint64val:NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA,TYPE_INT64,0/*34*/}, \ -{GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_6,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[6]->startSymbolAndLength,defint64val:54,TYPE_INT64,0/*35*/},\ -{GNB_CONFIG_STRING_INITIALDLBWPK0_7,NULL,0,i64ptr:scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[7]->k0,defint64val:-1,TYPE_INT64,0/*36*/},\ -{GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_7,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[7]->mappingType,defint64val:NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA,TYPE_INT64,0/*37*/},\ -{GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_7,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[7]->startSymbolAndLength,defint64val:54,TYPE_INT64,0/*38*/},\ -{GNB_CONFIG_STRING_INITIALDLBWPK0_8,NULL,0,i64ptr:scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[8]->k0,defint64val:-1,TYPE_INT64,0/*39*/},\ -{GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_8,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[8]->mappingType,defint64val:NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA,TYPE_INT64,0/*40*/}, \ -{GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_8,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[8]->startSymbolAndLength,defint64val:54,TYPE_INT64,0/*41*/},\ -{GNB_CONFIG_STRING_INITIALDLBWPK0_9,NULL,0,i64ptr:scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[9]->k0,defint64val:-1,TYPE_INT64,0/*42*/}, \ -{GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_9,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[9]->mappingType,defint64val:NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA,TYPE_INT64,0/*43*/},\ -{GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_9,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[9]->startSymbolAndLength,defint64val:54,TYPE_INT64,0/*44*/},\ -{GNB_CONFIG_STRING_INITIALDLBWPK0_10,NULL,0,i64ptr:scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[10]->k0,defint64val:-1,TYPE_INT64,0/*45*/},\ -{GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_10,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[10]->mappingType,defint64val:NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA,TYPE_INT64,0/*46*/},\ -{GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_10,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[10]->startSymbolAndLength,defint64val:54,TYPE_INT64,0/*47*/},\ -{GNB_CONFIG_STRING_INITIALDLBWPK0_11,NULL,0,i64ptr:scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[11]->k0,defint64val:-1,TYPE_INT64,0/*48*/},\ -{GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_11,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[11]->mappingType,defint64val:NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA,TYPE_INT64,0/*49*/},\ -{GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_11,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[11]->startSymbolAndLength,defint64val:54,TYPE_INT64,0/*50*/}, \ -{GNB_CONFIG_STRING_INITIALDLBWPK0_12,NULL,0,i64ptr:scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[12]->k0,defint64val:-1,TYPE_INT64,0/*51*/},\ -{GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_12,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[12]->mappingType,defint64val:NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA,TYPE_INT64,0/*52*/},\ -{GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_12,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[12]->startSymbolAndLength,defint64val:54,TYPE_INT64,0/*53*/},\ -{GNB_CONFIG_STRING_INITIALDLBWPK0_13,NULL,0,i64ptr:scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[13]->k0,defint64val:-1,TYPE_INT64,0/*54*/},\ -{GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_13,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[13]->mappingType,defint64val:NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA,TYPE_INT64,0/*55*/},\ -{GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_13,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[13]->startSymbolAndLength,defint64val:54,TYPE_INT64,0/*56*/},\ -{GNB_CONFIG_STRING_INITIALDLBWPK0_14,NULL,0,i64ptr:scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[14]->k0,defint64val:-1,TYPE_INT64,0/*57*/},\ -{GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_14,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[14]->mappingType,defint64val:NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA,TYPE_INT64,0/*58*/},\ -{GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_14,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[14]->startSymbolAndLength,defint64val:54,TYPE_INT64,0/*59*/},\ -{GNB_CONFIG_STRING_INITIALDLBWPK0_15,NULL,0,i64ptr:scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[15]->k0,defint64val:-1,TYPE_INT64,0/*60*/}, \ -{GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_15,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[15]->mappingType,defint64val:NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA,TYPE_INT64,0/*61*/},\ -{GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_15,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[15]->startSymbolAndLength,defint64val:54,TYPE_INT64,0/*62*/},\ {GNB_CONFIG_STRING_ULFREQUENCYBAND,NULL,0,i64ptr:scc->uplinkConfigCommon->frequencyInfoUL->frequencyBandList->list.array[0],defint64val:-1,TYPE_INT64,0/*63*/},\ {GNB_CONFIG_STRING_ULABSOLUEFREQUENCYPOINTA,NULL,0,i64ptr:scc->uplinkConfigCommon->frequencyInfoUL->absoluteFrequencyPointA,defint64val:-1,TYPE_INT64,0/*64*/},\ {GNB_CONFIG_STRING_ULOFFSETTOCARRIER,NULL,0,i64ptr:&scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->offsetToCarrier,defint64val:0,TYPE_INT64,0/*65*/},\ @@ -345,54 +199,6 @@ {GNB_CONFIG_STRING_PRACHROOTSEQUENCEINDEX,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->prach_RootSequenceIndex.choice.l139,defint64val:0,TYPE_INT64,0/*84*/},\ {GNB_CONFIG_STRING_RESTRICTEDSETCONFIG,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->restrictedSetConfig,defintval:NR_RACH_ConfigCommon__restrictedSetConfig_unrestrictedSet,TYPE_INT64,0/*85*/}, \ {GNB_CONFIG_STRING_MSG3TRANSFPREC,NULL,0,i64ptr:scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->msg3_transformPrecoder,defintval:1,TYPE_INT64,0/*86*/}, \ -{GNB_CONFIG_STRING_INITIALULBWPK2_0,NULL,0,i64ptr:scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[0]->k2,defint64val:-1,TYPE_INT64,0/*87*/},\ -{GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_0,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[0]->mappingType,defint64val:NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeB,TYPE_INT64,/*88*/},\ -{GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_0,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[0]->startSymbolAndLength,defint64val:55,TYPE_INT64,0/*89*/},\ -{GNB_CONFIG_STRING_INITIALULBWPK2_1,NULL,0,i64ptr:scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[1]->k2,defint64val:-1,TYPE_INT64,0/*90*/}, \ -{GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_1,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[1]->mappingType,defint64val:NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB,TYPE_INT64,0},\ -{GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_1,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[1]->startSymbolAndLength,defint64val:53,TYPE_INT64,0},\ -{GNB_CONFIG_STRING_INITIALULBWPK2_2,NULL,0,i64ptr:scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[2]->k2,defint64val:-1,TYPE_INT64,0},\ -{GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_2,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[2]->mappingType,defint64val:NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeB,TYPE_INT64,0},\ -{GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_2,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[2]->startSymbolAndLength,defint64val:55,TYPE_INT64,0},\ -{GNB_CONFIG_STRING_INITIALULBWPK2_3,NULL,0,i64ptr:scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[3]->k2,defint64val:-1,TYPE_INT64,0},\ -{GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_3,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[3]->mappingType,defint64val:NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB,TYPE_INT64,0},\ -{GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_3,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[3]->startSymbolAndLength,defint64val:53,TYPE_INT64,0},\ -{GNB_CONFIG_STRING_INITIALULBWPK2_4,NULL,0,i64ptr:scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[4]->k2,defint64val:-1,TYPE_INT64,0},\ -{GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_4,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[4]->mappingType,defint64val:NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeB,TYPE_INT64,0 /*100*/}, \ -{GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_4,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[4]->startSymbolAndLength,defint64val:55,TYPE_INT64,0},\ -{GNB_CONFIG_STRING_INITIALULBWPK2_5,NULL,0,i64ptr:scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[5]->k2,defint64val:-1,TYPE_INT64,0},\ -{GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_5,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[5]->mappingType,defint64val:NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB,TYPE_INT64,0},\ -{GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_5,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[5]->startSymbolAndLength,defint64val:53,TYPE_INT64,0},\ -{GNB_CONFIG_STRING_INITIALULBWPK2_6,NULL,0,i64ptr:scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[6]->k2,defint64val:-1,TYPE_INT64,0},\ -{GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_6,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[6]->mappingType,defint64val:NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeB,TYPE_INT64,0},\ -{GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_6,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[6]->startSymbolAndLength,defint64val:55,TYPE_INT64,0},\ -{GNB_CONFIG_STRING_INITIALULBWPK2_7,NULL,0,i64ptr:scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[7]->k2,defint64val:-1,TYPE_INT64,0},\ -{GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_7,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[7]->mappingType,defint64val:NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB,TYPE_INT64,0},\ -{GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_7,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[7]->startSymbolAndLength,defint64val:53,TYPE_INT64,0/*110*/}, \ -{GNB_CONFIG_STRING_INITIALULBWPK2_8,NULL,0,i64ptr:scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[8]->k2,defint64val:-1,TYPE_INT64,0},\ -{GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_8,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[8]->mappingType,defint64val:NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeB,TYPE_INT64,0},\ -{GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_8,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[8]->startSymbolAndLength,defint64val:55,TYPE_INT64,0},\ -{GNB_CONFIG_STRING_INITIALULBWPK2_9,NULL,0,i64ptr:scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[9]->k2,defint64val:-1,TYPE_INT64,0},\ -{GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_9,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[9]->mappingType,defint64val:NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB,TYPE_INT64,0},\ -{GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_9,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[9]->startSymbolAndLength,defint64val:53,TYPE_INT64,0},\ -{GNB_CONFIG_STRING_INITIALULBWPK2_10,NULL,0,i64ptr:scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[10]->k2,defint64val:-1,TYPE_INT64,0},\ -{GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_10,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[10]->mappingType,defint64val:NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeB,TYPE_INT64,0},\ -{GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_10,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[10]->startSymbolAndLength,defint64val:55,TYPE_INT64,0},\ -{GNB_CONFIG_STRING_INITIALULBWPK2_11,NULL,0,i64ptr:scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[11]->k2,defint64val:-1,TYPE_INT64,0/*120*/}, \ -{GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_11,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[11]->mappingType,defint64val:NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB,TYPE_INT64,0},\ -{GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_11,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[11]->startSymbolAndLength,defint64val:53,TYPE_INT64,0},\ -{GNB_CONFIG_STRING_INITIALULBWPK2_12,NULL,0,i64ptr:scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[12]->k2,defint64val:-1,TYPE_INT64,0},\ -{GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_12,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[12]->mappingType,defint64val:NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeB,TYPE_INT64,0},\ -{GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_12,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[12]->startSymbolAndLength,defint64val:55,TYPE_INT64,0},\ -{GNB_CONFIG_STRING_INITIALULBWPK2_13,NULL,0,i64ptr:scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[13]->k2,defint64val:-1,TYPE_INT64,0},\ -{GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_13,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[13]->mappingType,defint64val:NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB,TYPE_INT64,0},\ -{GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_13,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[13]->startSymbolAndLength,defint64val:53,TYPE_INT64,0},\ -{GNB_CONFIG_STRING_INITIALULBWPK2_14,NULL,0,i64ptr:scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[14]->k2,defint64val:-1,TYPE_INT64,0},\ -{GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_14,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[14]->mappingType,defint64val:NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeB,TYPE_INT64,0 /*130*/}, \ -{GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_14,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[14]->startSymbolAndLength,defint64val:55,TYPE_INT64,0},\ -{GNB_CONFIG_STRING_INITIALULBWPK2_15,NULL,0,i64ptr:scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[15]->k2,defint64val:-1,TYPE_INT64,0},\ -{GNB_CONFIG_STRING_INITIALULBWPMAPPINGTYPE_15,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[15]->mappingType,defint64val:NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB,TYPE_INT64,0},\ -{GNB_CONFIG_STRING_INITIALULBWPSTARTSYMBOLANDLENGTH_15,NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[15]->startSymbolAndLength,defint64val:53,TYPE_INT64,0},\ {GNB_CONFIG_STRING_MSG3DELTAPREABMLE, NULL,0,i64ptr:scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->msg3_DeltaPreamble,defint64val:1,TYPE_INT64,0},\ {GNB_CONFIG_STRING_P0NOMINALWITHGRANT, NULL,0,i64ptr:scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->p0_NominalWithGrant,defint64val:1,TYPE_INT64,0},\ {GNB_CONFIG_STRING_PUCCHGROUPHOPPING, NULL,0,i64ptr:&scc->uplinkConfigCommon->initialUplinkBWP->pucch_ConfigCommon->choice.setup->pucch_GroupHopping,defint64val:NR_PUCCH_ConfigCommon__pucch_GroupHopping_neither,TYPE_INT64,0},\ diff --git a/openair2/GNB_APP/gnb_config.c b/openair2/GNB_APP/gnb_config.c index 9851d14b91..d069bfe2f4 100644 --- a/openair2/GNB_APP/gnb_config.c +++ b/openair2/GNB_APP/gnb_config.c @@ -94,8 +94,6 @@ void prepare_scc(NR_ServingCellConfigCommon_t *scc) { NR_FreqBandIndicatorNR_t *dl_frequencyBandList,*ul_frequencyBandList; struct NR_SCS_SpecificCarrier *dl_scs_SpecificCarrierList,*ul_scs_SpecificCarrierList; - struct NR_PDSCH_TimeDomainResourceAllocation *bwp_dl_timedomainresourceallocation; - struct NR_PUSCH_TimeDomainResourceAllocation *pusch_configcommontimedomainresourceallocation; // struct NR_RateMatchPattern *ratematchpattern; // NR_RateMatchPatternId_t *ratematchpatternid; // NR_TCI_StateId_t *TCI_StateId; @@ -143,14 +141,6 @@ void prepare_scc(NR_ServingCellConfigCommon_t *scc) { scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->present = NR_SetupRelease_PDSCH_ConfigCommon_PR_setup; scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup = CALLOC(1,sizeof(struct NR_PDSCH_ConfigCommon)); scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList = CALLOC(1,sizeof(struct NR_PDSCH_TimeDomainResourceAllocationList)); - // - for (int i=0;ik0 = CALLOC(1,sizeof(long)); - *bwp_dl_timedomainresourceallocation->k0=0; - ASN_SEQUENCE_ADD(&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list, - bwp_dl_timedomainresourceallocation); - } ul_frequencyBandList = CALLOC(1,sizeof(NR_FreqBandIndicatorNR_t)); scc->uplinkConfigCommon->frequencyInfoUL->frequencyBandList = CALLOC(1,sizeof(struct NR_MultiFrequencyBandListNR)); @@ -199,12 +189,6 @@ void prepare_scc(NR_ServingCellConfigCommon_t *scc) { ul_scs_SpecificCarrierList = CALLOC(1,sizeof(struct NR_SCS_SpecificCarrier)); ASN_SEQUENCE_ADD(&scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list,ul_scs_SpecificCarrierList); - for (int i=0;ik2 = CALLOC(1,sizeof(long)); - *pusch_configcommontimedomainresourceallocation->k2=0; - ASN_SEQUENCE_ADD(&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list,pusch_configcommontimedomainresourceallocation); - } //ratematchpattern = CALLOC(1,sizeof(struct NR_RateMatchPattern)); //ratematchpattern->patternType.choice.bitmaps = CALLOC(1,sizeof(struct NR_RateMatchPattern__patternType__bitmaps)); //ratematchpattern->patternType.choice.bitmaps->resourceBlocks.buf = MALLOC(35); @@ -223,6 +207,92 @@ void prepare_scc(NR_ServingCellConfigCommon_t *scc) { } +void fill_scc_sim(NR_ServingCellConfigCommon_t *scc,uint64_t *ssb_bitmap,int N_RB_DL,int N_RB_UL,int mu_dl,int mu_ul) { + + *scc->physCellId=0; \ + // *scc->n_TimingAdvanceOffset=NR_ServingCellConfigCommon__n_TimingAdvanceOffset_n0; + *scc->ssb_periodicityServingCell=NR_ServingCellConfigCommon__ssb_periodicityServingCell_ms20; + scc->dmrs_TypeA_Position=NR_ServingCellConfigCommon__dmrs_TypeA_Position_pos2; + *scc->ssbSubcarrierSpacing=NR_SubcarrierSpacing_kHz30; + *scc->downlinkConfigCommon->frequencyInfoDL->absoluteFrequencySSB=641032; + *scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0]=78; + scc->downlinkConfigCommon->frequencyInfoDL->absoluteFrequencyPointA=640000; + scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->offsetToCarrier=0; + scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing=NR_SubcarrierSpacing_kHz30; + + scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->carrierBandwidth=N_RB_DL; + scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth=13036; + scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.subcarrierSpacing=mu_dl;//NR_SubcarrierSpacing_kHz30; + *scc->downlinkConfigCommon->initialDownlinkBWP->pdcch_ConfigCommon->choice.setup->controlResourceSetZero=12; + *scc->downlinkConfigCommon->initialDownlinkBWP->pdcch_ConfigCommon->choice.setup->searchSpaceZero=0; + struct NR_PDSCH_TimeDomainResourceAllocation *timedomainresourceallocation0 = CALLOC(1,sizeof(NR_PDSCH_TimeDomainResourceAllocation_t)); + timedomainresourceallocation0->mappingType=NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA; + timedomainresourceallocation0->startSymbolAndLength=54; + ASN_SEQUENCE_ADD(&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list, + timedomainresourceallocation0); + struct NR_PDSCH_TimeDomainResourceAllocation *timedomainresourceallocation1 = CALLOC(1,sizeof(NR_PDSCH_TimeDomainResourceAllocation_t)); + timedomainresourceallocation1->mappingType=NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA; + timedomainresourceallocation1->startSymbolAndLength=57; + ASN_SEQUENCE_ADD(&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list, + timedomainresourceallocation1); + *scc->uplinkConfigCommon->frequencyInfoUL->frequencyBandList->list.array[0]=78; + *scc->uplinkConfigCommon->frequencyInfoUL->absoluteFrequencyPointA=-1; + scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->offsetToCarrier=0; + scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing=NR_SubcarrierSpacing_kHz30; + scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->carrierBandwidth=N_RB_UL; + *scc->uplinkConfigCommon->frequencyInfoUL->p_Max=20; + scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.locationAndBandwidth=13036; + scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.subcarrierSpacing=mu_ul;//NR_SubcarrierSpacing_kHz30; + scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.prach_ConfigurationIndex=98; + scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.msg1_FDM=NR_RACH_ConfigGeneric__msg1_FDM_one; + scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.msg1_FrequencyStart=0; + scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.zeroCorrelationZoneConfig=13; + scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.preambleReceivedTargetPower=-118; + scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.preambleTransMax=NR_RACH_ConfigGeneric__preambleTransMax_n10; + scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.powerRampingStep=NR_RACH_ConfigGeneric__powerRampingStep_dB2; + scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.ra_ResponseWindow=NR_RACH_ConfigGeneric__ra_ResponseWindow_sl20; + scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->ssb_perRACH_OccasionAndCB_PreamblesPerSSB->present=NR_RACH_ConfigCommon__ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR_one; + scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->ssb_perRACH_OccasionAndCB_PreamblesPerSSB->choice.one=NR_RACH_ConfigCommon__ssb_perRACH_OccasionAndCB_PreamblesPerSSB__one_n64; + scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->ra_ContentionResolutionTimer=NR_RACH_ConfigCommon__ra_ContentionResolutionTimer_sf64; + *scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rsrp_ThresholdSSB=19; + scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->prach_RootSequenceIndex.present=NR_RACH_ConfigCommon__prach_RootSequenceIndex_PR_l139; + scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->prach_RootSequenceIndex.choice.l139=0; + scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->restrictedSetConfig=NR_RACH_ConfigCommon__restrictedSetConfig_unrestrictedSet; + struct NR_PUSCH_TimeDomainResourceAllocation *pusch_timedomainresourceallocation0 = CALLOC(1,sizeof(struct NR_PUSCH_TimeDomainResourceAllocation)); + pusch_timedomainresourceallocation0->k2 = CALLOC(1,sizeof(long)); + *pusch_timedomainresourceallocation0->k2=6; + pusch_timedomainresourceallocation0->mappingType=NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB; + pusch_timedomainresourceallocation0->startSymbolAndLength=55; + ASN_SEQUENCE_ADD(&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list,pusch_timedomainresourceallocation0); + struct NR_PUSCH_TimeDomainResourceAllocation *pusch_timedomainresourceallocation1 = CALLOC(1,sizeof(struct NR_PUSCH_TimeDomainResourceAllocation)); + pusch_timedomainresourceallocation1->k2 = CALLOC(1,sizeof(long)); + *pusch_timedomainresourceallocation1->k2=6; + pusch_timedomainresourceallocation1->mappingType=NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB; + pusch_timedomainresourceallocation1->startSymbolAndLength=38; + ASN_SEQUENCE_ADD(&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list,pusch_timedomainresourceallocation1); + *scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->msg3_DeltaPreamble=1; + *scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->p0_NominalWithGrant=-90; + scc->uplinkConfigCommon->initialUplinkBWP->pucch_ConfigCommon->choice.setup->pucch_GroupHopping=NR_PUCCH_ConfigCommon__pucch_GroupHopping_neither; + *scc->uplinkConfigCommon->initialUplinkBWP->pucch_ConfigCommon->choice.setup->hoppingId=40; + *scc->uplinkConfigCommon->initialUplinkBWP->pucch_ConfigCommon->choice.setup->p0_nominal=-90; + scc->ssb_PositionsInBurst->present=NR_ServingCellConfigCommon__ssb_PositionsInBurst_PR_mediumBitmap; + *ssb_bitmap=0xff; + scc->tdd_UL_DL_ConfigurationCommon->referenceSubcarrierSpacing=NR_SubcarrierSpacing_kHz30; + scc->tdd_UL_DL_ConfigurationCommon->pattern1.dl_UL_TransmissionPeriodicity=NR_TDD_UL_DL_Pattern__dl_UL_TransmissionPeriodicity_ms5; + scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSlots=7; + scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSymbols=6; + scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSlots=2; + scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols=4; + scc->tdd_UL_DL_ConfigurationCommon->pattern2->dl_UL_TransmissionPeriodicity=321; + + scc->tdd_UL_DL_ConfigurationCommon->pattern2->nrofDownlinkSlots=-1; + scc->tdd_UL_DL_ConfigurationCommon->pattern2->nrofDownlinkSymbols=-1; + scc->tdd_UL_DL_ConfigurationCommon->pattern2->nrofUplinkSlots=-1; + scc->tdd_UL_DL_ConfigurationCommon->pattern2->nrofUplinkSymbols=-1; + scc->ss_PBCH_BlockPower=20; + *scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->msg1_SubcarrierSpacing=-1; +} + void fix_scc(NR_ServingCellConfigCommon_t *scc,uint64_t ssbmap) { @@ -273,24 +343,9 @@ void fix_scc(NR_ServingCellConfigCommon_t *scc,uint64_t ssbmap) { if (*scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->msg3_transformPrecoder!=0) scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->msg3_transformPrecoder = NULL; - // fix DL and UL Allocation lists - - for (int i=scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.count-1;i>=0;i--) { - printf("Checking element %d : %ld\n",i,*scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[i]->k0); - if (*scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[i]->k0>32) { - printf("removing pdsch_TimeDomainAllocationList element %d\n",i); - free(scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[i]->k0); - asn_sequence_del(&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list,i,1); - printf("List size now %d\n",scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.count); - } - } + // prepare DL Allocation lists + nr_rrc_config_dl_tda(scc); - for (int i=scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.count-1;i>=0;i--) { - if (*scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[i]->k2>32) { - free(scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[i]->k2); - asn_sequence_del(&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list,i,1); - } - } if (scc->tdd_UL_DL_ConfigurationCommon->pattern2->dl_UL_TransmissionPeriodicity > 320 ) { free(scc->tdd_UL_DL_ConfigurationCommon->pattern2); scc->tdd_UL_DL_ConfigurationCommon->pattern2=NULL; @@ -1107,11 +1162,9 @@ void RCconfig_NRRRC(MessageDef *msg_p, uint32_t i, gNB_RRC_INST *rrc) { NRRRC_CONFIGURATION_REQ (msg_p).pdsch_AntennaPorts = *GNBParamList.paramarray[i][GNB_PDSCH_ANTENNAPORTS_IDX].iptr; printf("pusch_AntennaPorts %d\n",*GNBParamList.paramarray[i][GNB_PUSCH_ANTENNAPORTS_IDX].iptr); NRRRC_CONFIGURATION_REQ (msg_p).pusch_AntennaPorts = *GNBParamList.paramarray[i][GNB_PUSCH_ANTENNAPORTS_IDX].iptr; - printf("minTXRXTIMEpdsch %d\n",*GNBParamList.paramarray[i][GNB_MINRXTXTIMEPDSCH_IDX].iptr); - NRRRC_CONFIGURATION_REQ (msg_p).minRXTXTIMEpdsch = *GNBParamList.paramarray[i][GNB_MINRXTXTIMEPDSCH_IDX].iptr; + printf("minTXRXTIME %d\n",*GNBParamList.paramarray[i][GNB_MINRXTXTIME_IDX].iptr); + NRRRC_CONFIGURATION_REQ (msg_p).minRXTXTIME = *GNBParamList.paramarray[i][GNB_MINRXTXTIME_IDX].iptr; NRRRC_CONFIGURATION_REQ (msg_p).sib1_tda = *GNBParamList.paramarray[i][GNB_SIB1_TDA_IDX].iptr; - printf("minTXRXTIMEpdsch %d\n",*GNBParamList.paramarray[i][GNB_MINRXTXTIMEPDSCH_IDX].iptr); - NRRRC_CONFIGURATION_REQ (msg_p).minRXTXTIMEpdsch = *GNBParamList.paramarray[i][GNB_MINRXTXTIMEPDSCH_IDX].iptr; printf("Do CSI-RS %d\n",*GNBParamList.paramarray[i][GNB_DO_CSIRS_IDX].iptr); NRRRC_CONFIGURATION_REQ (msg_p).do_CSIRS = *GNBParamList.paramarray[i][GNB_DO_CSIRS_IDX].iptr; NRRRC_CONFIGURATION_REQ (msg_p).scc = scc; diff --git a/openair2/GNB_APP/gnb_paramdef.h b/openair2/GNB_APP/gnb_paramdef.h index 0c3d971569..730b6b85b6 100644 --- a/openair2/GNB_APP/gnb_paramdef.h +++ b/openair2/GNB_APP/gnb_paramdef.h @@ -119,7 +119,7 @@ typedef enum { #define GNB_CONFIG_STRING_SIB1TDA "sib1_tda" #define GNB_CONFIG_STRING_DOCSIRS "do_CSIRS" #define GNB_CONFIG_STRING_NRCELLID "nr_cellid" -#define GNB_CONFIG_STRING_MINRXTXTIMEPDSCH "min_rxtxtime_pdsch" +#define GNB_CONFIG_STRING_MINRXTXTIME "min_rxtxtime" #define GNB_CONFIG_STRING_ULPRBBLACKLIST "ul_prbblacklist" @@ -148,7 +148,7 @@ typedef enum { {GNB_CONFIG_STRING_SIB1TDA, NULL, 0, iptr:NULL, defintval:0, TYPE_INT, 0}, \ {GNB_CONFIG_STRING_DOCSIRS, NULL, 0, iptr:NULL, defintval:0, TYPE_INT, 0}, \ {GNB_CONFIG_STRING_NRCELLID, NULL, 0, u64ptr:NULL, defint64val:1, TYPE_UINT64, 0}, \ -{GNB_CONFIG_STRING_MINRXTXTIMEPDSCH, NULL, 0, iptr:NULL, defintval:2, TYPE_INT, 0}, \ +{GNB_CONFIG_STRING_MINRXTXTIME, NULL, 0, iptr:NULL, defintval:2, TYPE_INT, 0}, \ {GNB_CONFIG_STRING_ULPRBBLACKLIST, NULL, 0, strptr:NULL, defstrval:"", TYPE_STRING, 0} \ } @@ -172,7 +172,7 @@ typedef enum { #define GNB_SIB1_TDA_IDX 17 #define GNB_DO_CSIRS_IDX 18 #define GNB_NRCELLID_IDX 19 -#define GNB_MINRXTXTIMEPDSCH_IDX 20 +#define GNB_MINRXTXTIME_IDX 20 #define GNB_ULPRBBLACKLIST_IDX 21 #define TRACKING_AREA_CODE_OKRANGE {0x0001,0xFFFD} diff --git a/openair2/LAYER2/NR_MAC_UE/config_ue.c b/openair2/LAYER2/NR_MAC_UE/config_ue.c index f67a3e1fa5..764c92ecb7 100644 --- a/openair2/LAYER2/NR_MAC_UE/config_ue.c +++ b/openair2/LAYER2/NR_MAC_UE/config_ue.c @@ -44,46 +44,9 @@ int set_tdd_config_nr_ue(fapi_nr_config_request_t *cfg, int nrofUplinkSlots, int nrofUplinkSymbols) { int slot_number = 0; - int nb_periods_per_frame; + int nb_periods_per_frame = get_nb_periods_per_frame(cfg->tdd_table.tdd_period); int nb_slots_to_set = TDD_CONFIG_NB_FRAMES*(1<tdd_table.tdd_period) { - case 0: - nb_periods_per_frame = 20; // 10ms/0p5ms - break; - - case 1: - nb_periods_per_frame = 16; // 10ms/0p625ms - break; - - case 2: - nb_periods_per_frame = 10; // 10ms/1ms - break; - - case 3: - nb_periods_per_frame = 8; // 10ms/1p25ms - break; - - case 4: - nb_periods_per_frame = 5; // 10ms/2ms - break; - - case 5: - nb_periods_per_frame = 4; // 10ms/2p5ms - break; - - case 6: - nb_periods_per_frame = 2; // 10ms/5ms - break; - - case 7: - nb_periods_per_frame = 1; // 10ms/10ms - break; - - default: - AssertFatal(1==0,"Undefined tdd period %d\n", cfg->tdd_table.tdd_period); - } - int nb_slots_per_period = ((1<tdd_table.tdd_period_in_slots = nb_slots_per_period; diff --git a/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c b/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c index a5f6e4a7d1..2f4ceb48ec 100644 --- a/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c +++ b/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c @@ -944,6 +944,10 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr return -1; } + if(rnti != ra->ra_rnti && rnti != SI_RNTI) + AssertFatal(1+dci->pdsch_to_harq_feedback_timing_indicator.val>=DURATION_RX_TO_TX,"PDSCH to HARQ feedback time (%d) cannot be less than DURATION_RX_TO_TX (%d).\n", + 1+dci->pdsch_to_harq_feedback_timing_indicator.val,DURATION_RX_TO_TX); + // set the harq status at MAC for feedback set_harq_status(mac,dci->pucch_resource_indicator, dci->harq_pid, @@ -1232,7 +1236,7 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr uint8_t feedback_ti = ubwpd->pucch_Config->choice.setup->dl_DataToUL_ACK->list.array[dci->pdsch_to_harq_feedback_timing_indicator.val][0]; - AssertFatal(feedback_ti>=DURATION_RX_TO_TX,"PDSCH to HARQ feedback time (%d) cannot be less than DURATION_RX_TO_TX (%d)\n", + AssertFatal(feedback_ti>=DURATION_RX_TO_TX,"PDSCH to HARQ feedback time (%d) cannot be less than DURATION_RX_TO_TX (%d). Min feedback time set in config file (min_rxtxtime).\n", feedback_ti,DURATION_RX_TO_TX); // set the harq status at MAC for feedback @@ -3160,10 +3164,10 @@ uint8_t nr_extract_dci_info(NR_UE_MAC_INST_t *mac, pos+=fsize; dci_pdu_rel15->frequency_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&((1<time_domain_assignment.nbits; - dci_pdu_rel15->time_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&0x3; + dci_pdu_rel15->time_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&((1<time_domain_assignment.nbits)-1); // Not supported yet - skip for now // Frequency hopping flag – 1 bit diff --git a/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c b/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c index c142af13ba..3d45877979 100644 --- a/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c +++ b/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c @@ -129,7 +129,7 @@ long get_k2(NR_UE_MAC_INST_t *mac, uint8_t time_domain_ind) { } AssertFatal(k2 >= DURATION_RX_TO_TX, - "Slot offset K2 (%ld) cannot be less than DURATION_RX_TO_TX (%d)\n", + "Slot offset K2 (%ld) cannot be less than DURATION_RX_TO_TX (%d). K2 set according to min_rxtxtime in config file.\n", k2,DURATION_RX_TO_TX); LOG_D(NR_MAC, "get_k2(): k2 is %ld\n", k2); diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c index 25aeea70a6..2705b85b8c 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c @@ -870,9 +870,6 @@ void nr_get_Msg3alloc(module_id_t module_id, int mu = ubwp ? ubwp->bwp_Common->genericParameters.subcarrierSpacing : scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.subcarrierSpacing; - int StartSymbolIndex = 0; - int NrOfSymbols = 0; - int startSymbolAndLength = 0; int temp_slot = 0; ra->Msg3_tda_id = 16; // initialization to a value above limit @@ -881,20 +878,29 @@ void nr_get_Msg3alloc(module_id_t module_id, scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList; uint8_t k2 = 0; - for (int i=0; ilist.count; i++) { - startSymbolAndLength = pusch_TimeDomainAllocationList->list.array[i]->startSymbolAndLength; - SLIV2SL(startSymbolAndLength, &StartSymbolIndex, &NrOfSymbols); - // we want to transmit in the uplink symbols of mixed slot - if (NrOfSymbols == scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols) { + lte_frame_type_t frame_type = get_frame_type(*scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0], *scc->ssbSubcarrierSpacing); + if (frame_type == TDD) { + int nb_periods_per_frame = get_nb_periods_per_frame(scc->tdd_UL_DL_ConfigurationCommon->pattern1.dl_UL_TransmissionPeriodicity); + int nb_slots_per_period = ((1<list.count; i++) { k2 = *pusch_TimeDomainAllocationList->list.array[i]->k2; - temp_slot = current_slot + k2 + DELTA[mu]; // msg3 slot according to 8.3 in 38.213 - ra->Msg3_slot = temp_slot%nr_slots_per_frame[mu]; - if (is_xlsch_in_slot(RC.nrmac[module_id]->ulsch_slot_bitmap[ra->Msg3_slot / 64], ra->Msg3_slot)) { - ra->Msg3_tda_id = i; - break; + // we want to transmit in the uplink symbols of mixed slot + if ((k2 + DELTA[mu])%nb_slots_per_period == 0) { + temp_slot = current_slot + k2 + DELTA[mu]; // msg3 slot according to 8.3 in 38.213 + ra->Msg3_slot = temp_slot%nr_slots_per_frame[mu]; + if (is_xlsch_in_slot(RC.nrmac[module_id]->ulsch_slot_bitmap[ra->Msg3_slot / 64], ra->Msg3_slot)) { + ra->Msg3_tda_id = i; + break; + } } } } + else { + ra->Msg3_tda_id = 0; + k2 = *pusch_TimeDomainAllocationList->list.array[0]->k2; + temp_slot = current_slot + k2 + DELTA[mu]; // msg3 slot according to 8.3 in 38.213 + ra->Msg3_slot = temp_slot%nr_slots_per_frame[mu]; + } AssertFatal(ra->Msg3_tda_id<16,"Unable to find Msg3 time domain allocation in list\n"); @@ -915,7 +921,7 @@ void nr_get_Msg3alloc(module_id_t module_id, tdd_beam_association[num_tdd_period] = ra->beam_id; } - LOG_D(NR_MAC, "[RAPROC] Msg3 slot %d: current slot %u Msg3 frame %u k2 %u Msg3_tda_id %u start symbol index %u\n", ra->Msg3_slot, current_slot, ra->Msg3_frame, k2,ra->Msg3_tda_id, StartSymbolIndex); + LOG_D(NR_MAC, "[RAPROC] Msg3 slot %d: current slot %u Msg3 frame %u k2 %u Msg3_tda_id %u\n", ra->Msg3_slot, current_slot, ra->Msg3_frame, k2,ra->Msg3_tda_id); uint16_t *vrb_map_UL = &RC.nrmac[module_id]->common_channels[CC_id].vrb_map_UL[ra->Msg3_slot * MAX_BWP_SIZE]; @@ -972,7 +978,7 @@ void fill_msg3_pusch_pdu(nfapi_nr_pusch_pdu_t *pusch_pdu, pusch_pdu->bwp_size = bwp_size; pusch_pdu->subcarrier_spacing = scs; pusch_pdu->cyclic_prefix = 0; - pusch_pdu->mcs_index = 0; + pusch_pdu->mcs_index = 1; pusch_pdu->mcs_table = 0; pusch_pdu->target_code_rate = nr_get_code_rate_ul(pusch_pdu->mcs_index,pusch_pdu->mcs_table); pusch_pdu->qam_mod_order = nr_get_Qm_ul(pusch_pdu->mcs_index,pusch_pdu->mcs_table); @@ -1009,11 +1015,14 @@ void fill_msg3_pusch_pdu(nfapi_nr_pusch_pdu_t *pusch_pdu, pusch_pdu->pusch_data.harq_process_id = 0; pusch_pdu->pusch_data.new_data_indicator = 1; pusch_pdu->pusch_data.num_cb = 0; + int num_dmrs_symb = 0; + for(int i = start_symbol_index; i < start_symbol_index+nr_of_symbols; i++) + num_dmrs_symb += (pusch_pdu->ul_dmrs_symb_pos >> i) & 1; pusch_pdu->pusch_data.tb_size = nr_compute_tbs(pusch_pdu->qam_mod_order, pusch_pdu->target_code_rate, pusch_pdu->rb_size, pusch_pdu->nr_of_symbols, - 12, // nb dmrs set for no data in dmrs symbol + num_dmrs_symb*12, // nb dmrs set for no data in dmrs symbol 0, //nb_rb_oh 0, // to verify tb scaling pusch_pdu->nrOfLayers)>>3; @@ -1074,7 +1083,7 @@ void nr_add_msg3(module_id_t module_idP, int CC_id, frame_t frameP, sub_frame_t fh = ubwp->bwp_Dedicated->pusch_Config->choice.setup->frequencyHopping ? 1 : 0; } - LOG_D(NR_MAC, "Frame %d, Subframe %d Adding Msg3 UL Config Request for (%d,%d) : (%d,%d,%d) for rnti: %d\n", + LOG_D(NR_MAC, "Frame %d, Slot %d Adding Msg3 UL Config Request for (%d,%d) : (%d,%d,%d) for rnti: %d\n", frameP, slotP, ra->Msg3_frame, @@ -1105,7 +1114,12 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra if ((ra->Msg2_frame == frameP) && (ra->Msg2_slot == slotP)) { - uint8_t time_domain_assignment = 1; + //TODO time domain assignment for msg2 needs to be improved + uint8_t time_domain_assignment; + if(cc->frame_type == TDD) + time_domain_assignment = 1; + else + time_domain_assignment = 0; uint8_t mcsIndex = 0; int rbStart = 0; int rbSize = 8; @@ -1245,6 +1259,8 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type) dmrsConfigType = 1; + NR_PDSCH_Config_t *pdsch_config = bwp && bwp->bwp_Dedicated && bwp->bwp_Dedicated->pdsch_Config ? bwp->bwp_Dedicated->pdsch_Config->choice.setup : NULL; + pdsch_pdu_rel15->pduBitmap = 0; pdsch_pdu_rel15->rnti = ra->RA_rnti; pdsch_pdu_rel15->pduIndex = pduindex; @@ -1273,7 +1289,7 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra pdsch_pdu_rel15->VRBtoPRBMapping = 0; pdsch_pdu_rel15->StartSymbolIndex = startSymbolIndex; pdsch_pdu_rel15->NrOfSymbols = nrOfSymbols; - pdsch_pdu_rel15->dlDmrsSymbPos = fill_dmrs_mask(NULL, + pdsch_pdu_rel15->dlDmrsSymbPos = fill_dmrs_mask(pdsch_config, nr_mac->common_channels->ServingCellConfigCommon->dmrs_TypeA_Position, nrOfSymbols, startSymbolIndex, diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c index 33cb2b1b1d..7b7b5c771b 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c @@ -351,7 +351,7 @@ void nr_set_pdsch_semi_static(const NR_ServingCellConfigCommon_t *scc, void nr_set_pusch_semi_static(const NR_ServingCellConfigCommon_t *scc, const NR_BWP_Uplink_t *ubwp, - const NR_BWP_UplinkDedicated_t *ubwpd, + const NR_BWP_UplinkDedicated_t *ubwpd, long dci_format, int tda, uint8_t num_dmrs_cdm_grps_no_data, diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c index 313dd6236e..c68b16b553 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c @@ -104,7 +104,6 @@ void calculate_preferred_ul_tda(module_id_t module_id, const NR_BWP_Uplink_t *ub /* check that TDA index 1 fits into UL slot and does not overlap with PUCCH */ const struct NR_PUSCH_TimeDomainResourceAllocationList *tdaList = ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList; - AssertFatal(tdaList->list.count >= 3, "need to have at least three TDAs for UL slots\n"); const NR_PUSCH_TimeDomainResourceAllocation_t *tdaP_UL = tdaList->list.array[0]; const int k2 = get_K2(scc, (NR_BWP_Uplink_t*)ubwp,0, mu); int start, len; @@ -117,27 +116,28 @@ void calculate_preferred_ul_tda(module_id_t module_id, const NR_BWP_Uplink_t *ub // get largest time domain allocation (TDA) for UL slot and UL in mixed slot int tdaMi = -1; - const NR_PUSCH_TimeDomainResourceAllocation_t *tdaP_Mi = tdaList->list.array[1]; - AssertFatal(k2 == get_K2(scc, (NR_BWP_Uplink_t*)ubwp, 1, mu), - "scheduler cannot handle different k2 for UL slot (%d) and UL Mixed slot (%ld)\n", - k2, - get_K2(scc, (NR_BWP_Uplink_t*)ubwp, 1, mu)); - SLIV2SL(tdaP_Mi->startSymbolAndLength, &start, &len); - const uint16_t symb_tda_mi = ((1 << len) - 1) << start; - // check whether PUCCH and TDA overlap: then, we cannot use it. Also, check - // whether TDA is entirely within mixed slot, UL. Note that here we assume - // that the PUCCH is scheduled in every slot, and on all RBs (which is - // mostly not true, this is a simplification) - if ((symb_pucch & symb_tda_mi) == 0 && (symb_ulMixed & symb_tda_mi) == symb_tda_mi) { - tdaMi = 1; - } else { - LOG_E(NR_MAC, - "TDA index 1 UL overlaps with PUCCH or is not entirely in mixed slot (symb_pucch %x symb_ulMixed %x symb_tda_mi %x), won't schedule UL mixed slot\n", - symb_pucch, - symb_ulMixed, - symb_tda_mi); + if(tdaList->list.count > 1) { + const NR_PUSCH_TimeDomainResourceAllocation_t *tdaP_Mi = tdaList->list.array[1]; + AssertFatal(k2 == get_K2(scc, (NR_BWP_Uplink_t*)ubwp, 1, mu), + "scheduler cannot handle different k2 for UL slot (%d) and UL Mixed slot (%ld)\n", + k2, + get_K2(scc, (NR_BWP_Uplink_t*)ubwp, 1, mu)); + SLIV2SL(tdaP_Mi->startSymbolAndLength, &start, &len); + const uint16_t symb_tda_mi = ((1 << len) - 1) << start; + // check whether PUCCH and TDA overlap: then, we cannot use it. Also, check + // whether TDA is entirely within mixed slot, UL. Note that here we assume + // that the PUCCH is scheduled in every slot, and on all RBs (which is + // mostly not true, this is a simplification) + if ((symb_pucch & symb_tda_mi) == 0 && (symb_ulMixed & symb_tda_mi) == symb_tda_mi) { + tdaMi = 1; + } else { + LOG_E(NR_MAC, + "TDA index 1 UL overlaps with PUCCH or is not entirely in mixed slot (symb_pucch %x symb_ulMixed %x symb_tda_mi %x), won't schedule UL mixed slot\n", + symb_pucch, + symb_ulMixed, + symb_tda_mi); + } } - const uint8_t slots_per_frame[5] = {10, 20, 40, 80, 160}; const int n = slots_per_frame[*scc->ssbSubcarrierSpacing]; nrmac->preferred_ul_tda[bwp_id] = malloc(n * sizeof(*nrmac->preferred_ul_tda[bwp_id])); diff --git a/openair2/LAYER2/NR_MAC_gNB/main.c b/openair2/LAYER2/NR_MAC_gNB/main.c index 547c5da00c..5e5de9a8e1 100644 --- a/openair2/LAYER2/NR_MAC_gNB/main.c +++ b/openair2/LAYER2/NR_MAC_gNB/main.c @@ -64,7 +64,7 @@ void *nrmac_stats_thread(void *arg) { fseek(fd,0,SEEK_SET); } fclose(fd); - return (void *)0; + return NULL; } void clear_mac_stats(gNB_MAC_INST *gNB) { diff --git a/openair2/RRC/NR/MESSAGES/asn1_msg.c b/openair2/RRC/NR/MESSAGES/asn1_msg.c index ff6923429e..bdd1cf5261 100755 --- a/openair2/RRC/NR/MESSAGES/asn1_msg.c +++ b/openair2/RRC/NR/MESSAGES/asn1_msg.c @@ -1185,9 +1185,9 @@ void fill_initial_SpCellConfig(rnti_t rnti, long *delay[8]; for (int i=0;i<8;i++) { delay[i] = calloc(1,sizeof(*delay[i])); - AssertFatal(carrier->minRXTXTIMEpdsch >=2 && carrier->minRXTXTIMEpdsch <7, - "check minRXTXTIMEpdsch %d\n",carrier->minRXTXTIMEpdsch); - *delay[i] = (i+carrier->minRXTXTIMEpdsch); + AssertFatal(carrier->minRXTXTIME >=2 && carrier->minRXTXTIME <7, + "check minRXTXTIME %d\n",carrier->minRXTXTIME); + *delay[i] = (i+carrier->minRXTXTIME); ASN_SEQUENCE_ADD(&pucch_Config->dl_DataToUL_ACK->list,delay[i]); } diff --git a/openair2/RRC/NR/nr_rrc_config.c b/openair2/RRC/NR/nr_rrc_config.c index dedd4cf839..6b7f9a21b9 100644 --- a/openair2/RRC/NR/nr_rrc_config.c +++ b/openair2/RRC/NR/nr_rrc_config.c @@ -29,96 +29,79 @@ */ #include "nr_rrc_config.h" +#include "common/utils/nr/nr_common.h" -void rrc_config_rlc_bearer(uint8_t Mod_id, - int CC_id, - rlc_bearer_config_t *rlc_config - ){ - rlc_config->LogicalChannelIdentity[CC_id] = 0; - rlc_config->servedRadioBearer_present[CC_id] = 0; - rlc_config->srb_Identity[CC_id] = 0; - rlc_config->drb_Identity[CC_id] = 0; - rlc_config->reestablishRLC[CC_id] = 0; - rlc_config->rlc_Config_present[CC_id] = 0; - rlc_config->ul_AM_sn_FieldLength[CC_id] = 0; - rlc_config->t_PollRetransmit[CC_id] = 0; - rlc_config->pollPDU[CC_id] = 0; - rlc_config->pollByte[CC_id] = 0; - rlc_config->maxRetxThreshold[CC_id] = 0; - rlc_config->dl_AM_sn_FieldLength[CC_id] = 0; - rlc_config->dl_AM_t_Reassembly[CC_id] = 0; - rlc_config->t_StatusProhibit[CC_id] = 0; - rlc_config->ul_UM_sn_FieldLength[CC_id] = 0; - rlc_config->dl_UM_sn_FieldLength[CC_id] = 0; - rlc_config->dl_UM_t_Reassembly[CC_id] = 0; - rlc_config->priority[CC_id] = 0; - rlc_config->prioritisedBitRate[CC_id] = 0; - rlc_config->bucketSizeDuration[CC_id] = 0; - rlc_config->allowedServingCells[CC_id] = 0; - rlc_config->subcarrierspacing[CC_id] = 0; - rlc_config->maxPUSCH_Duration[CC_id] = 0; - rlc_config->configuredGrantType1Allowed[CC_id] = 0; - rlc_config->logicalChannelGroup[CC_id] = 0; - rlc_config->schedulingRequestID[CC_id] = 0; - rlc_config->logicalChannelSR_Mask[CC_id] = 0; - rlc_config->logicalChannelSR_DelayTimerApplied[CC_id] = 0; +void nr_rrc_config_dl_tda(NR_ServingCellConfigCommon_t *scc){ + + lte_frame_type_t frame_type = get_frame_type(*scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0], *scc->ssbSubcarrierSpacing); + + // setting default TDA for DL with + struct NR_PDSCH_TimeDomainResourceAllocation *timedomainresourceallocation = CALLOC(1,sizeof(NR_PDSCH_TimeDomainResourceAllocation_t)); + timedomainresourceallocation->mappingType = NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA; + timedomainresourceallocation->startSymbolAndLength = get_SLIV(1,13); // basic slot configuration starting in symbol 1 til the end of the slot + ASN_SEQUENCE_ADD(&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list, + timedomainresourceallocation); + + if(frame_type==TDD) { + // TDD + if(scc->tdd_UL_DL_ConfigurationCommon) { + int dl_symb = scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSymbols; + if(dl_symb > 1) { + timedomainresourceallocation = CALLOC(1,sizeof(NR_PDSCH_TimeDomainResourceAllocation_t)); + timedomainresourceallocation->mappingType = NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA; + timedomainresourceallocation->startSymbolAndLength = get_SLIV(1,dl_symb-1); // mixed slot configuration starting in symbol 1 til the end of the dl allocation + ASN_SEQUENCE_ADD(&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list, + timedomainresourceallocation); + } + } + } } -void rrc_config_mac_cellgroup(uint8_t Mod_id, - int CC_id, - mac_cellgroup_t *mac_cellgroup_config - ){ - mac_cellgroup_config->DRX_Config_PR[CC_id] = 0; - mac_cellgroup_config->drx_onDurationTimer_PR[CC_id] = 0; - mac_cellgroup_config->subMilliSeconds[CC_id] = 0; - mac_cellgroup_config->milliSeconds[CC_id] = 0; - mac_cellgroup_config->drx_InactivityTimer[CC_id] = 0; - mac_cellgroup_config->drx_HARQ_RTT_TimerDL[CC_id] = 0; - mac_cellgroup_config->drx_HARQ_RTT_TimerUL[CC_id] = 0; - mac_cellgroup_config->drx_RetransmissionTimerDL[CC_id] = 0; - mac_cellgroup_config->drx_RetransmissionTimerUL[CC_id] = 0; - mac_cellgroup_config->drx_LongCycleStartOffset_PR[CC_id] = 0; - mac_cellgroup_config->drx_LongCycleStartOffset[CC_id] = 0; - mac_cellgroup_config->drx_ShortCycle[CC_id] = 0; - mac_cellgroup_config->drx_ShortCycleTimer[CC_id] = 0; - mac_cellgroup_config->drx_SlotOffset[CC_id] = 0; - mac_cellgroup_config->schedulingRequestId[CC_id] = 0; - mac_cellgroup_config->sr_ProhibitTimer[CC_id] = 0; - mac_cellgroup_config->sr_TransMax[CC_id] = 0; - mac_cellgroup_config->periodicBSR_Timer[CC_id] = 0; - mac_cellgroup_config->retxBSR_Timer[CC_id] = 0; - mac_cellgroup_config->logicalChannelSR_DelayTimer[CC_id] = 0; - mac_cellgroup_config->tag_Id[CC_id] = 0; - mac_cellgroup_config->timeAlignmentTimer[CC_id] = 0; - mac_cellgroup_config->PHR_Config_PR[CC_id] = 0; - mac_cellgroup_config->phr_PeriodicTimer[CC_id] = 0; - mac_cellgroup_config->phr_ProhibitTimer[CC_id] = 0; - mac_cellgroup_config->phr_Tx_PowerFactorChange[CC_id] = 0; - mac_cellgroup_config->multiplePHR[CC_id] = 0; - mac_cellgroup_config->phr_Type2SpCell[CC_id] = 0; - mac_cellgroup_config->phr_Type2OtherCell[CC_id] = 0; - mac_cellgroup_config->phr_ModeOtherCG[CC_id] = 0; - mac_cellgroup_config->skipUplinkTxDynamic[CC_id] = 0; + +void nr_rrc_config_ul_tda(NR_ServingCellConfigCommon_t *scc, int min_fb_delay){ + + //TODO change to accomodate for SRS + + int temp_min_delay = 6; // k2 = 2 or 3 won'r work as well as higher values + int k2 = (min_fb_delayuplinkConfigCommon->initialUplinkBWP->genericParameters.subcarrierSpacing; + lte_frame_type_t frame_type = get_frame_type(*scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0], *scc->ssbSubcarrierSpacing); + + struct NR_PUSCH_TimeDomainResourceAllocation *pusch_timedomainresourceallocation = CALLOC(1,sizeof(struct NR_PUSCH_TimeDomainResourceAllocation)); + pusch_timedomainresourceallocation->k2 = CALLOC(1,sizeof(long)); + *pusch_timedomainresourceallocation->k2 = k2; + pusch_timedomainresourceallocation->mappingType = NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB; + pusch_timedomainresourceallocation->startSymbolAndLength = get_SLIV(0,13); // basic slot configuration starting in symbol 0 til the last but one symbol + ASN_SEQUENCE_ADD(&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list,pusch_timedomainresourceallocation); + + if(frame_type==TDD) { + // TDD + if(scc->tdd_UL_DL_ConfigurationCommon) { + int ul_symb = scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols; + pusch_timedomainresourceallocation = CALLOC(1,sizeof(struct NR_PUSCH_TimeDomainResourceAllocation)); + pusch_timedomainresourceallocation->k2 = CALLOC(1,sizeof(long)); + *pusch_timedomainresourceallocation->k2 = k2; + pusch_timedomainresourceallocation->mappingType = NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB; + pusch_timedomainresourceallocation->startSymbolAndLength = get_SLIV(14-ul_symb,ul_symb-1); // starting in fist ul symbol til the last but one + ASN_SEQUENCE_ADD(&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list,pusch_timedomainresourceallocation); + + // for msg3 in the mixed slot + int nb_periods_per_frame = get_nb_periods_per_frame(scc->tdd_UL_DL_ConfigurationCommon->pattern1.dl_UL_TransmissionPeriodicity); + int nb_slots_per_period = ((1<k2 = CALLOC(1,sizeof(long)); + *pusch_timedomainresourceallocation_msg3->k2 = nb_slots_per_period - DELTA[mu]; + if(*pusch_timedomainresourceallocation_msg3->k2 < min_fb_delay) + *pusch_timedomainresourceallocation_msg3->k2 += nb_slots_per_period; + AssertFatal(*pusch_timedomainresourceallocation_msg3->k2<33,"Computed k2 for msg3 %ld is larger than the range allowed by RRC (0..32)\n", + *pusch_timedomainresourceallocation_msg3->k2); + pusch_timedomainresourceallocation_msg3->mappingType = NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB; + pusch_timedomainresourceallocation_msg3->startSymbolAndLength = get_SLIV(14-ul_symb,ul_symb-1); // starting in fist ul symbol til the last but one + ASN_SEQUENCE_ADD(&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list,pusch_timedomainresourceallocation_msg3); + } + } + } -void rrc_config_physicalcellgroup(uint8_t Mod_id, - int CC_id, - physicalcellgroup_t *physicalcellgroup_config - ){ - physicalcellgroup_config->harq_ACK_SpatialBundlingPUCCH[CC_id] = 0; - physicalcellgroup_config->harq_ACK_SpatialBundlingPUSCH[CC_id] = 0; - physicalcellgroup_config->p_NR[CC_id] = 0; - physicalcellgroup_config->pdsch_HARQ_ACK_Codebook[CC_id] = 0; - physicalcellgroup_config->tpc_SRS_RNTI[CC_id] = 0; - physicalcellgroup_config->tpc_PUCCH_RNTI[CC_id] = 0; - physicalcellgroup_config->tpc_PUSCH_RNTI[CC_id] = 0; - physicalcellgroup_config->sp_CSI_RNTI[CC_id] = 0; - physicalcellgroup_config->RNTI_Value[CC_id] = 0; -} - -void rrc_config_rachdedicated(uint8_t Mod_id, - int CC_id, - physicalcellgroup_t *physicalcellgroup_config - ){ - -} diff --git a/openair2/RRC/NR/nr_rrc_config.h b/openair2/RRC/NR/nr_rrc_config.h index e19d94b341..192fee754e 100644 --- a/openair2/RRC/NR/nr_rrc_config.h +++ b/openair2/RRC/NR/nr_rrc_config.h @@ -111,29 +111,8 @@ typedef struct physicalcellgroup_s{ long RNTI_Value[MAX_NUM_CCs]; }physicalcellgroup_t; -typedef struct rach_dedicated_s{ - - -}rach_dedicated_t; +void nr_rrc_config_dl_tda(NR_ServingCellConfigCommon_t *scc); +void nr_rrc_config_ul_tda(NR_ServingCellConfigCommon_t *scc, int min_fb_delay); -void rrc_config_servingcellconfigcommon(uint8_t Mod_id, - int CC_id, - gNB_RrcConfigurationReq *common_configuration - ); - -void rrc_config_rlc_bearer(uint8_t Mod_id, - int CC_id, - rlc_bearer_config_t *rlc_config - ); - -void rrc_config_mac_cellgroup(uint8_t Mod_id, - int CC_id, - mac_cellgroup_t *mac_cellgroup_config - ); - -void rrc_config_physicalcellgroup(uint8_t Mod_id, - int CC_id, - physicalcellgroup_t *physicalcellgroup_config - ); #endif diff --git a/openair2/RRC/NR/nr_rrc_defs.h b/openair2/RRC/NR/nr_rrc_defs.h index ad31e8cac7..d71393bc2d 100644 --- a/openair2/RRC/NR/nr_rrc_defs.h +++ b/openair2/RRC/NR/nr_rrc_defs.h @@ -447,7 +447,7 @@ typedef struct { int sib1_tda; int pdsch_AntennaPorts; int pusch_AntennaPorts; - int minRXTXTIMEpdsch; + int minRXTXTIME; int do_CSIRS; NR_BCCH_DL_SCH_Message_t *siblock1; NR_ServingCellConfigCommon_t *servingcellconfigcommon; diff --git a/openair2/RRC/NR/rrc_gNB.c b/openair2/RRC/NR/rrc_gNB.c index 34e570070d..7f7353f9af 100755 --- a/openair2/RRC/NR/rrc_gNB.c +++ b/openair2/RRC/NR/rrc_gNB.c @@ -136,80 +136,6 @@ void openair_nr_rrc_on(const protocol_ctxt_t *const ctxt_pP) { ///---------------------------------------------------------------------------------------------------------------/// ///---------------------------------------------------------------------------------------------------------------/// -void rrc_gNB_process_SgNBAdditionRequest( - const protocol_ctxt_t *const ctxt_pP, - rrc_gNB_ue_context_t *ue_context_pP -) { - rrc_gNB_generate_SgNBAdditionRequestAcknowledge(ctxt_pP,ue_context_pP); -} - -void rrc_gNB_generate_SgNBAdditionRequestAcknowledge( - const protocol_ctxt_t *const ctxt_pP, - rrc_gNB_ue_context_t *const ue_context_pP) { - //uint8_t size; - //uint8_t buffer[100]; - //int CC_id = ue_context_pP->ue_context.primaryCC_id; - //OCTET_STRING_t *secondaryCellGroup; - NR_CellGroupConfig_t *cellGroupconfig; - struct NR_CellGroupConfig__rlc_BearerToAddModList *rlc_BearerToAddModList; - struct NR_MAC_CellGroupConfig *mac_CellGroupConfig; - struct NR_PhysicalCellGroupConfig *physicalCellGroupConfig; - struct NR_SpCellConfig *spCellConfig; - //struct NR_CellGroupConfig__sCellToAddModList *sCellToAddModList; - cellGroupconfig = CALLOC(1,sizeof(NR_CellGroupConfig_t)); - cellGroupconfig->rlc_BearerToAddModList = CALLOC(1,sizeof(struct NR_CellGroupConfig__rlc_BearerToAddModList)); - cellGroupconfig->mac_CellGroupConfig = CALLOC(1,sizeof(struct NR_MAC_CellGroupConfig)); - cellGroupconfig->physicalCellGroupConfig = CALLOC(1,sizeof(struct NR_PhysicalCellGroupConfig)); - cellGroupconfig->spCellConfig = CALLOC(1,sizeof(struct NR_SpCellConfig)); - //cellGroupconfig->sCellToAddModList = CALLOC(1,sizeof(struct NR_CellGroupConfig__sCellToAddModList)); - rlc_BearerToAddModList = cellGroupconfig->rlc_BearerToAddModList; - mac_CellGroupConfig = cellGroupconfig->mac_CellGroupConfig; - physicalCellGroupConfig = cellGroupconfig->physicalCellGroupConfig; - spCellConfig = cellGroupconfig->spCellConfig; - //sCellToAddModList = cellGroupconfig->sCellToAddModList; - rlc_bearer_config_t *rlc_config; - rlc_config = CALLOC(1,sizeof(rlc_bearer_config_t)); - //Fill rlc_bearer config value - rrc_config_rlc_bearer(ctxt_pP->module_id, - ue_context_pP->ue_context.primaryCC_id, - rlc_config - ); - //Fill rlc_bearer config to structure - do_RLC_BEARER(ctxt_pP->module_id, - ue_context_pP->ue_context.primaryCC_id, - rlc_BearerToAddModList, - rlc_config); - mac_cellgroup_t *mac_cellgroup_config; - mac_cellgroup_config = CALLOC(1,sizeof(mac_cellgroup_t)); - //Fill mac_cellgroup_config config value - rrc_config_mac_cellgroup(ctxt_pP->module_id, - ue_context_pP->ue_context.primaryCC_id, - mac_cellgroup_config - ); - //Fill mac_cellgroup config to structure - do_MAC_CELLGROUP(ctxt_pP->module_id, - ue_context_pP->ue_context.primaryCC_id, - mac_CellGroupConfig, - mac_cellgroup_config); - physicalcellgroup_t *physicalcellgroup_config; - physicalcellgroup_config = CALLOC(1,sizeof(physicalcellgroup_t)); - //Fill physicalcellgroup_config config value - rrc_config_physicalcellgroup(ctxt_pP->module_id, - ue_context_pP->ue_context.primaryCC_id, - physicalcellgroup_config - ); - //Fill physicalcellgroup config to structure - do_PHYSICALCELLGROUP(ctxt_pP->module_id, - ue_context_pP->ue_context.primaryCC_id, - physicalCellGroupConfig, - physicalcellgroup_config); - do_SpCellConfig(RC.nrrrc[ctxt_pP->module_id], - spCellConfig); -} - -///---------------------------------------------------------------------------------------------------------------/// -///---------------------------------------------------------------------------------------------------------------/// - static void init_NR_SI(gNB_RRC_INST *rrc, gNB_RrcConfigurationReq *configuration) { LOG_D(RRC,"%s()\n\n\n\n",__FUNCTION__); if (NODE_IS_DU(rrc->node_type) || NODE_IS_MONOLITHIC(rrc->node_type)) { @@ -330,9 +256,10 @@ char openair_rrc_gNB_configuration(const module_id_t gnb_mod_idP, gNB_RrcConfigu rrc->carrier.ssb_SubcarrierOffset = configuration->ssb_SubcarrierOffset; rrc->carrier.pdsch_AntennaPorts = configuration->pdsch_AntennaPorts; rrc->carrier.pusch_AntennaPorts = configuration->pusch_AntennaPorts; - rrc->carrier.minRXTXTIMEpdsch = configuration->minRXTXTIMEpdsch; + rrc->carrier.minRXTXTIME = configuration->minRXTXTIME; rrc->carrier.sib1_tda = configuration->sib1_tda; rrc->carrier.do_CSIRS = configuration->do_CSIRS; + nr_rrc_config_ul_tda(configuration->scc,configuration->minRXTXTIME); /// System Information INIT pthread_mutex_init(&rrc->cell_info_mutex,NULL); rrc->cell_info_configured = 0; diff --git a/openair2/RRC/NR/rrc_gNB_nsa.c b/openair2/RRC/NR/rrc_gNB_nsa.c index 2104d5cdd7..3311779235 100644 --- a/openair2/RRC/NR/rrc_gNB_nsa.c +++ b/openair2/RRC/NR/rrc_gNB_nsa.c @@ -241,7 +241,7 @@ void rrc_add_nsa_user(gNB_RRC_INST *rrc,struct rrc_gNB_ue_context_s *ue_context_ reconfig_ies, ue_context_p->ue_context.secondaryCellGroup, carrier->pdsch_AntennaPorts, - carrier->minRXTXTIMEpdsch, + carrier->minRXTXTIME, carrier->do_CSIRS, carrier->initial_csi_index[ue_context_p->local_uid + 1], ue_context_p->local_uid); @@ -251,7 +251,7 @@ void rrc_add_nsa_user(gNB_RRC_INST *rrc,struct rrc_gNB_ue_context_s *ue_context_ reconfig_ies, ue_context_p->ue_context.secondaryCellGroup, carrier->pdsch_AntennaPorts, - carrier->minRXTXTIMEpdsch, + carrier->minRXTXTIME, carrier->do_CSIRS, carrier->initial_csi_index[ue_context_p->local_uid + 1], ue_context_p->local_uid); diff --git a/openair2/RRC/NR/rrc_gNB_reconfig.c b/openair2/RRC/NR/rrc_gNB_reconfig.c index 4b8fd77dc5..30604cd015 100644 --- a/openair2/RRC/NR/rrc_gNB_reconfig.c +++ b/openair2/RRC/NR/rrc_gNB_reconfig.c @@ -55,7 +55,7 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco int scg_id, int servCellIndex, int dl_antenna_ports, - int minRXTXTIMEpdsch, + int minRXTXTIME, int do_csirs, int initial_csi_index, int uid) { @@ -483,10 +483,10 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco NR_PDSCH_TimeDomainResourceAllocation_t *pdschi; for (int i=0;idownlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.count;i++) { pdschi= calloc(1,sizeof(*pdschi)); - AssertFatal(servingcellconfigcommon->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[i]->k0!=NULL,"element %d is null\n",i); - - pdschi->k0 = calloc(1,sizeof(*pdschi->k0)); - *pdschi->k0 = *servingcellconfigcommon->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[i]->k0; + if(servingcellconfigcommon->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[i]->k0){ + pdschi->k0 = calloc(1,sizeof(*pdschi->k0)); + *pdschi->k0 = *servingcellconfigcommon->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[i]->k0; + } pdschi->mappingType = servingcellconfigcommon->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[i]->mappingType; pdschi->startSymbolAndLength = servingcellconfigcommon->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[i]->startSymbolAndLength; ASN_SEQUENCE_ADD(&bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list,pdschi); @@ -946,7 +946,7 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco long *delay[8]; for (int i=0;i<8;i++) { delay[i] = calloc(1,sizeof(*delay[i])); - *delay[i] = i+minRXTXTIMEpdsch; + *delay[i] = i+minRXTXTIME; ASN_SEQUENCE_ADD(&pucch_Config->dl_DataToUL_ACK->list,delay[i]); } pucch_Config->spatialRelationInfoToAddModList = calloc(1,sizeof(*pucch_Config->spatialRelationInfoToAddModList)); @@ -1349,7 +1349,7 @@ void fill_default_reconfig(NR_ServingCellConfigCommon_t *servingcellconfigcommon NR_RRCReconfiguration_IEs_t *reconfig, NR_CellGroupConfig_t *secondaryCellGroup, int dl_antenna_ports, - int minRXTXTIMEpdsch, + int minRXTXTIME, int do_csirs, int initial_csi_index, int uid) { @@ -1365,7 +1365,7 @@ void fill_default_reconfig(NR_ServingCellConfigCommon_t *servingcellconfigcommon 1, 1, dl_antenna_ports, - minRXTXTIMEpdsch, + minRXTXTIME, do_csirs, initial_csi_index, uid); diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/benetel-5g.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/benetel-5g.conf index b260eaa58d..c6a4a90a14 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/benetel-5g.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/benetel-5g.conf @@ -55,15 +55,6 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 0; initialDLBWPsearchSpaceZero = 0; - #pdsch-ConfigCommon - #pdschTimeDomainAllocationList (up to 16 entries) - initialDLBWPk0_0 = 0; #for DL slot - initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB - initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 - - initialDLBWPk0_1 = 0; #for mixed slot - initialDLBWPmappingType_1 = 0; - initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5 #uplinkConfigCommon #frequencyInfoUL @@ -120,19 +111,6 @@ gNBs = # restrictedSetConfig # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, - # pusch-ConfigCommon (up to 16 elements) - initialULBWPk2_0 = 2; # used for UL slot - initialULBWPmappingType_0 = 1 - initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 - - initialULBWPk2_1 = 2; # used for mixed slot - initialULBWPmappingType_1 = 1; - initialULBWPstartSymbolAndLength_1 = 69; # this is SS=10 L=2 - - initialULBWPk2_2 = 7; # used for Msg.3 during RA - initialULBWPmappingType_2 = 1; - initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4 - msg3_DeltaPreamble = 1; #p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band257.tm1.32PRB.usrpn300.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band257.tm1.32PRB.usrpn300.conf index 0306fe5d0b..fd9399f89e 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band257.tm1.32PRB.usrpn300.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band257.tm1.32PRB.usrpn300.conf @@ -54,15 +54,6 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 12; initialDLBWPsearchSpaceZero = 0; - #pdsch-ConfigCommon - #pdschTimeDomainAllocationList (up to 16 entries) - initialDLBWPk0_0 = 0; #for DL slot - initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB - initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 - - initialDLBWPk0_3 = 0; #for mixed slot - initialDLBWPmappingType_3 = 0; - initialDLBWPstartSymbolAndLength_3 = 57; #this is SS=1,L=5 #uplinkConfigCommon #frequencyInfoUL @@ -117,20 +108,6 @@ gNBs = # restrictedSetConfig # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, - # pusch-ConfigCommon (up to 16 elements) - initialULBWPk2_0 = 6; - initialULBWPmappingType_0 = 1 - initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 - - initialULBWPk2_1 = 6; - initialULBWPmappingType_1 = 1; - # this is SS=0 L=12 - initialULBWPstartSymbolAndLength_1 = 69; - - initialULBWPk2_2 = 4; - initialULBWPmappingType_2 = 1; - # this is SS=10 L=4 - initialULBWPstartSymbolAndLength_2 = 52; msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band257.tm1.32PRB.usrpx300.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band257.tm1.32PRB.usrpx300.conf index c14ad17b42..59e71a6225 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band257.tm1.32PRB.usrpx300.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band257.tm1.32PRB.usrpx300.conf @@ -54,15 +54,6 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 12; initialDLBWPsearchSpaceZero = 0; - #pdsch-ConfigCommon - #pdschTimeDomainAllocationList (up to 16 entries) - initialDLBWPk0_0 = 0; #for DL slot - initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB - initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 - - initialDLBWPk0_1 = 0; #for mixed slot - initialDLBWPmappingType_1 = 0; - initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5 #uplinkConfigCommon #frequencyInfoUL @@ -117,18 +108,6 @@ gNBs = # restrictedSetConfig # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, - # pusch-ConfigCommon (up to 16 elements) - initialULBWPk2_0 = 6; # used for UL slot - initialULBWPmappingType_0 = 1 - initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 - - initialULBWPk2_1 = 6; # used for mixed slot - initialULBWPmappingType_1 = 1; - initialULBWPstartSymbolAndLength_1 = 69; # this is SS=10 L=2 - - initialULBWPk2_2 = 4; # used for Msg.3 during RA - initialULBWPmappingType_2 = 1; - initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4 msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band257.tm1.66PRB.usrpn300.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band257.tm1.66PRB.usrpn300.conf index ff0fdd96bb..3fc81c0d6c 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band257.tm1.66PRB.usrpn300.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band257.tm1.66PRB.usrpn300.conf @@ -54,15 +54,6 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 12; initialDLBWPsearchSpaceZero = 0; - #pdsch-ConfigCommon - #pdschTimeDomainAllocationList (up to 16 entries) - initialDLBWPk0_0 = 0; #for DL slot - initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB - initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 - - initialDLBWPk0_1 = 0; #for mixed slot (but is not used here) - initialDLBWPmappingType_1 = 0; - initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5 #uplinkConfigCommon #frequencyInfoUL @@ -117,19 +108,6 @@ gNBs = # restrictedSetConfig # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, - # pusch-ConfigCommon (up to 16 elements) - initialULBWPk2_0 = 2; # used for UL slot - initialULBWPmappingType_0 = 1 - initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 - - initialULBWPk2_1 = 2; # used for mixed slot (not used here) - initialULBWPmappingType_1 = 1; - initialULBWPstartSymbolAndLength_1 = 69; # this is SS=10 L=2 - - initialULBWPk2_2 = 7; # used for Msg.3 during RA - initialULBWPmappingType_2 = 1; - initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4 - msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band261.tm1.32PRB.usrpn300.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band261.tm1.32PRB.usrpn300.conf index 937790d4ac..a40a93c789 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band261.tm1.32PRB.usrpn300.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band261.tm1.32PRB.usrpn300.conf @@ -54,15 +54,6 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 12; initialDLBWPsearchSpaceZero = 0; - #pdsch-ConfigCommon - #pdschTimeDomainAllocationList (up to 16 entries) - initialDLBWPk0_0 = 0; #for DL slot - initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB - initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 - - initialDLBWPk0_1 = 0; #for mixed slot - initialDLBWPmappingType_1 = 0; - initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5 #uplinkConfigCommon #frequencyInfoUL @@ -117,18 +108,6 @@ gNBs = # restrictedSetConfig # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, - # pusch-ConfigCommon (up to 16 elements) - initialULBWPk2_0 = 6; # used for UL slot - initialULBWPmappingType_0 = 1 - initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 - - initialULBWPk2_1 = 6; # used for mixed slot - initialULBWPmappingType_1 = 1; - initialULBWPstartSymbolAndLength_1 = 69; # this is SS=10 L=2 - - initialULBWPk2_2 = 4; # used for Msg.3 during RA - initialULBWPmappingType_2 = 1; - initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4 msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band66.tm1.106PRB.usrpn300.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band66.tm1.106PRB.usrpn300.conf index c9a95d59e8..3860aba935 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band66.tm1.106PRB.usrpn300.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band66.tm1.106PRB.usrpn300.conf @@ -54,15 +54,6 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 12; initialDLBWPsearchSpaceZero = 0; - #pdsch-ConfigCommon - #pdschTimeDomainAllocationList (up to 16 entries) - initialDLBWPk0_0 = 0; #for DL slot - initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB - initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 - - initialDLBWPk0_1 = 0; #for mixed slot - initialDLBWPmappingType_1 = 0; - initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5 #uplinkConfigCommon #frequencyInfoUL @@ -118,18 +109,6 @@ gNBs = # restrictedSetConfig # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, - # pusch-ConfigCommon (up to 16 elements) - initialULBWPk2_0 = 6; # used for UL slot - initialULBWPmappingType_0 = 1 - initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 - - initialULBWPk2_1 = 6; # used for mixed slot - initialULBWPmappingType_1 = 1; - initialULBWPstartSymbolAndLength_1 = 69; # this is SS=10 L=2 - - initialULBWPk2_2 = 7; # used for Msg.3 during RA - initialULBWPmappingType_2 = 1; - initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4 msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band66.tm1.106PRB.usrpx300.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band66.tm1.106PRB.usrpx300.conf index 524407c4de..7c527e07c8 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band66.tm1.106PRB.usrpx300.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band66.tm1.106PRB.usrpx300.conf @@ -54,15 +54,6 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 12; initialDLBWPsearchSpaceZero = 0; - #pdsch-ConfigCommon - #pdschTimeDomainAllocationList (up to 16 entries) - initialDLBWPk0_0 = 0; #for DL slot - initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB - initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 - - initialDLBWPk0_1 = 0; #for mixed slot - initialDLBWPmappingType_1 = 0; - initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5 #uplinkConfigCommon #frequencyInfoUL @@ -118,18 +109,6 @@ gNBs = # restrictedSetConfig # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, - # pusch-ConfigCommon (up to 16 elements) - initialULBWPk2_0 = 6; # used for UL slot - initialULBWPmappingType_0 = 1 - initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 - - initialULBWPk2_1 = 6; # used for mixed slot - initialULBWPmappingType_1 = 1; - initialULBWPstartSymbolAndLength_1 = 69; # this is SS=10 L=2 - - initialULBWPk2_2 = 7; # used for Msg.3 during RA - initialULBWPmappingType_2 = 1; - initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4 msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.106PRB.30kHz,usrpb2x0.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.106PRB.30kHz,usrpb2x0.conf index d191b67988..a171f2aae0 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.106PRB.30kHz,usrpb2x0.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.106PRB.30kHz,usrpb2x0.conf @@ -54,15 +54,6 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 0; initialDLBWPsearchSpaceZero = 0; - #pdsch-ConfigCommon - #pdschTimeDomainAllocationList (up to 16 entries) - initialDLBWPk0_0 = 0; #for DL slot - initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB - initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 - - initialDLBWPk0_1 = 0; #for mixed slot - initialDLBWPmappingType_1 = 0; - initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5 #uplinkConfigCommon #frequencyInfoUL @@ -117,18 +108,6 @@ gNBs = # restrictedSetConfig # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, - # pusch-ConfigCommon (up to 16 elements) - initialULBWPk2_0 = 2; # used for UL slot - initialULBWPmappingType_0 = 1 - initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 - - initialULBWPk2_1 = 2; # used for mixed slot - initialULBWPmappingType_1 = 1; - initialULBWPstartSymbolAndLength_1 = 69; # this is SS=10 L=2 - - initialULBWPk2_2 = 7; # used for Msg.3 during RA - initialULBWPmappingType_2 = 1; - initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4 msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.106PRB.slave.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.106PRB.slave.conf index 2dfa329346..4f8c785baa 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.106PRB.slave.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.106PRB.slave.conf @@ -54,15 +54,6 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 12; initialDLBWPsearchSpaceZero = 0; - #pdsch-ConfigCommon - #pdschTimeDomainAllocationList (up to 16 entries) - initialDLBWPk0_0 = 0; #for DL slot - initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB - initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 - - initialDLBWPk0_1 = 0; #for mixed slot - initialDLBWPmappingType_1 = 0; - initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5 #uplinkConfigCommon #frequencyInfoUL @@ -117,18 +108,6 @@ gNBs = # restrictedSetConfig # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, - # pusch-ConfigCommon (up to 16 elements) - initialULBWPk2_0 = 2; # used for UL slot - initialULBWPmappingType_0 = 1 - initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 - - initialULBWPk2_1 = 2; # used for mixed slot - initialULBWPmappingType_1 = 1; - initialULBWPstartSymbolAndLength_1 = 69; # this is SS=10 L=2 - - initialULBWPk2_2 = 7; # used for Msg.3 during RA - initialULBWPmappingType_2 = 1; - initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4 msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.slave.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.slave.conf index 7f0829e40a..012f46401e 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.slave.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.slave.conf @@ -54,15 +54,6 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 12; initialDLBWPsearchSpaceZero = 0; - #pdsch-ConfigCommon - #pdschTimeDomainAllocationList (up to 16 entries) - initialDLBWPk0_0 = 0; #for DL slot - initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB - initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 - - initialDLBWPk0_1 = 0; #for mixed slot (but not used here) - initialDLBWPmappingType_1 = 0; - initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5 #uplinkConfigCommon #frequencyInfoUL @@ -117,18 +108,6 @@ gNBs = # restrictedSetConfig # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, - # pusch-ConfigCommon (up to 16 elements) - initialULBWPk2_0 = 2; # used for UL slot - initialULBWPmappingType_0 = 1 - initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 - - initialULBWPk2_1 = 2; # used for mixed slot - initialULBWPmappingType_1 = 1; - initialULBWPstartSymbolAndLength_1 = 63; # this is SS=7 L=5 - - initialULBWPk2_2 = 7; # used for Msg.3 during RA - initialULBWPmappingType_2 = 1; - initialULBWPstartSymbolAndLength_2 = 91; # this is SS=7 L=7 msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.PTRS.usrpx300.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.PTRS.usrpx300.conf index 6248afab2f..b6b9252560 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.PTRS.usrpx300.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.PTRS.usrpx300.conf @@ -54,15 +54,6 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 12; initialDLBWPsearchSpaceZero = 0; - #pdsch-ConfigCommon - #pdschTimeDomainAllocationList (up to 16 entries) - initialDLBWPk0_0 = 0; #for DL slot - initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB - initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 - - initialDLBWPk0_3 = 0; #for mixed slot - initialDLBWPmappingType_3 = 0; - initialDLBWPstartSymbolAndLength_3 = 57; #this is SS=1,L=5 #uplinkConfigCommon #frequencyInfoUL @@ -117,20 +108,6 @@ gNBs = # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, - # pusch-ConfigCommon (up to 16 elements) - initialULBWPk2_0 = 6; - initialULBWPmappingType_0 = 1 - initialULBWPstartSymbolAndLength_0 = 41; - - initialULBWPk2_1 = 6; - initialULBWPmappingType_1 = 1; - # this is SS=0 L=12 - initialULBWPstartSymbolAndLength_1 = 69; - initialULBWPk2_2 = 7; - initialULBWPmappingType_2 = 1; - # this is SS=10 L=4 - initialULBWPstartSymbolAndLength_2 = 52; - msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpb210.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpb210.conf index 6f28cd36c1..0817d7373e 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpb210.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpb210.conf @@ -54,15 +54,6 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 12; initialDLBWPsearchSpaceZero = 0; - #pdsch-ConfigCommon - #pdschTimeDomainAllocationList (up to 16 entries) - initialDLBWPk0_0 = 0; #for DL slot - initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB - initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 - - initialDLBWPk0_1 = 0; #for mixed slot - initialDLBWPmappingType_1 = 0; - initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5 #uplinkConfigCommon #frequencyInfoUL @@ -117,18 +108,6 @@ gNBs = # restrictedSetConfig # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, - # pusch-ConfigCommon (up to 16 elements) - initialULBWPk2_0 = 2; # used for UL slot - initialULBWPmappingType_0 = 1 - initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 - - initialULBWPk2_1 = 2; # used for mixed slot - initialULBWPmappingType_1 = 1; - initialULBWPstartSymbolAndLength_1 = 69; # this is SS=10 L=2 - - initialULBWPk2_2 = 7; # used for Msg.3 during RA - initialULBWPmappingType_2 = 1; - initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4 msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpn300.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpn300.conf index 30194647b8..fd4c23cfdb 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpn300.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpn300.conf @@ -54,15 +54,6 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 0; #12; initialDLBWPsearchSpaceZero = 0; - #pdsch-ConfigCommon - #pdschTimeDomainAllocationList (up to 16 entries) - initialDLBWPk0_0 = 0; # used for (full) DL slot - initialDLBWPmappingType_0 = 0; # 0=typeA,1=typeB - initialDLBWPstartSymbolAndLength_0 = 40; # this is SS=1,L=13 - - initialDLBWPk0_1 = 0; # used for DL part mixed slot - initialDLBWPmappingType_1 = 0; - initialDLBWPstartSymbolAndLength_1 = 57; # this is SS=1,L=5 #uplinkConfigCommon #frequencyInfoUL @@ -117,19 +108,6 @@ gNBs = # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, - # pusch-ConfigCommon (up to 16 elements) - initialULBWPk2_0 = 6; # used for (full) UL slot - initialULBWPmappingType_0 = 1 - initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 - - initialULBWPk2_1 = 6; # used for UL part mixed slot - initialULBWPmappingType_1 = 1; - initialULBWPstartSymbolAndLength_1 = 69; # this is SS=10 L=2 - - initialULBWPk2_2 = 7; # used for Msg.3 during RA - initialULBWPmappingType_2 = 1; - initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4 - msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpx300.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpx300.conf index fcbd3c0f02..965408332c 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpx300.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpx300.conf @@ -54,16 +54,6 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 0; initialDLBWPsearchSpaceZero = 0; - #pdsch-ConfigCommon - #pdschTimeDomainAllocationList (up to 16 entries) - initialDLBWPk0_0 = 0; #for DL slot - initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB - initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 - - initialDLBWPk0_1 = 0; #for mixed slot - initialDLBWPmappingType_1 = 0; - initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5 - #uplinkConfigCommon #frequencyInfoUL @@ -118,19 +108,6 @@ gNBs = # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, - # pusch-ConfigCommon (up to 16 elements) - initialULBWPk2_0 = 6; # used for UL slot - initialULBWPmappingType_0 = 1 - initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 - - initialULBWPk2_1 = 6; # used for mixed slot - initialULBWPmappingType_1 = 1; - initialULBWPstartSymbolAndLength_1 = 69; # this is SS=10 L=2 - - initialULBWPk2_2 = 7; # used for Msg.3 during RA - initialULBWPmappingType_2 = 1; - initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4 - msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.217PRB.usrpn300.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.217PRB.usrpn300.conf index 63123b8201..e36748a3a9 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.217PRB.usrpn300.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.217PRB.usrpn300.conf @@ -54,15 +54,6 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 0; initialDLBWPsearchSpaceZero = 0; - #pdsch-ConfigCommon - #pdschTimeDomainAllocationList (up to 16 entries) - initialDLBWPk0_0 = 0; #for DL slot - initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB - initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 - - initialDLBWPk0_1 = 0; #for mixed slot - initialDLBWPmappingType_1 = 0; - initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5 #uplinkConfigCommon #frequencyInfoUL @@ -117,18 +108,6 @@ gNBs = # restrictedSetConfig # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, - # pusch-ConfigCommon (up to 16 elements) - initialULBWPk2_0 = 6; # used for UL slot - initialULBWPmappingType_0 = 1 - initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 - - initialULBWPk2_1 = 6; # used for mixed slot - initialULBWPmappingType_1 = 1; - initialULBWPstartSymbolAndLength_1 = 69; # this is SS=10 L=2 - - initialULBWPk2_2 = 7; # used for Msg.3 during RA - initialULBWPmappingType_2 = 1; - initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4 msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.217PRB.usrpx300.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.217PRB.usrpx300.conf index 217ff76376..7b2d369919 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.217PRB.usrpx300.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.217PRB.usrpx300.conf @@ -54,15 +54,6 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 0; initialDLBWPsearchSpaceZero = 0; - #pdsch-ConfigCommon - #pdschTimeDomainAllocationList (up to 16 entries) - initialDLBWPk0_0 = 0; #for DL slot - initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB - initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 - - initialDLBWPk0_1 = 0; #for mixed slot - initialDLBWPmappingType_1 = 0; - initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5 #uplinkConfigCommon #frequencyInfoUL @@ -117,18 +108,6 @@ gNBs = # restrictedSetConfig # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, - # pusch-ConfigCommon (up to 16 elements) - initialULBWPk2_0 = 2; # used for UL slot - initialULBWPmappingType_0 = 1 - initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 - - initialULBWPk2_1 = 2; # used for mixed slot - initialULBWPmappingType_1 = 1; - initialULBWPstartSymbolAndLength_1 = 69; # this is SS=10 L=2 - - initialULBWPk2_2 = 7; # used for Msg.3 during RA - initialULBWPmappingType_2 = 1; - initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4 msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.24PRB.usrpb210.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.24PRB.usrpb210.conf index a1acfc313b..dbf4f58348 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.24PRB.usrpb210.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.24PRB.usrpb210.conf @@ -54,16 +54,6 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 0; initialDLBWPsearchSpaceZero = 0; - #pdsch-ConfigCommon - #pdschTimeDomainAllocationList (up to 16 entries) - initialDLBWPk0_0 = 0; #for DL slot - initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB - initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 - - initialDLBWPk0_3 = 0; #for mixed slot - initialDLBWPmappingType_3 = 0; - initialDLBWPstartSymbolAndLength_3 = 57; #this is SS=1,L=5 - #uplinkConfigCommon #frequencyInfoUL @@ -118,19 +108,6 @@ gNBs = # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, - # pusch-ConfigCommon (up to 16 elements) - initialULBWPk2_0 = 6; - initialULBWPmappingType_0 = 1 - initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 - - initialULBWPk2_1 = 6; - initialULBWPmappingType_1 = 1; - initialULBWPstartSymbolAndLength_1 = 69; - - initialULBWPk2_2 = 7; - initialULBWPmappingType_2 = 1; - initialULBWPstartSymbolAndLength_2 = 52; - msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.24PRB.usrpn300.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.24PRB.usrpn300.conf index 540dddad21..6d23726a78 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.24PRB.usrpn300.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.24PRB.usrpn300.conf @@ -54,16 +54,6 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 0; initialDLBWPsearchSpaceZero = 0; - #pdsch-ConfigCommon - #pdschTimeDomainAllocationList (up to 16 entries) - initialDLBWPk0_0 = 0; #for DL slot - initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB - initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 - - initialDLBWPk0_3 = 0; #for mixed slot - initialDLBWPmappingType_3 = 0; - initialDLBWPstartSymbolAndLength_3 = 57; #this is SS=1,L=5 - #uplinkConfigCommon #frequencyInfoUL @@ -118,19 +108,6 @@ gNBs = # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, - # pusch-ConfigCommon (up to 16 elements) - initialULBWPk2_0 = 6; - initialULBWPmappingType_0 = 1 - initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 - - initialULBWPk2_1 = 6; - initialULBWPmappingType_1 = 1; - initialULBWPstartSymbolAndLength_1 = 69; - - initialULBWPk2_2 = 7; - initialULBWPmappingType_2 = 1; - initialULBWPstartSymbolAndLength_2 = 52; - msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.24PRB.usrpx300.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.24PRB.usrpx300.conf index edc5eaa0d4..c3fa56f15e 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.24PRB.usrpx300.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.24PRB.usrpx300.conf @@ -54,16 +54,6 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 0; initialDLBWPsearchSpaceZero = 0; - #pdsch-ConfigCommon - #pdschTimeDomainAllocationList (up to 16 entries) - initialDLBWPk0_0 = 0; #for DL slot - initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB - initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 - - initialDLBWPk0_3 = 0; #for mixed slot - initialDLBWPmappingType_3 = 0; - initialDLBWPstartSymbolAndLength_3 = 57; #this is SS=1,L=5 - #uplinkConfigCommon #frequencyInfoUL @@ -118,19 +108,6 @@ gNBs = # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, - # pusch-ConfigCommon (up to 16 elements) - initialULBWPk2_0 = 6; - initialULBWPmappingType_0 = 1 - initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 - - initialULBWPk2_1 = 6; - initialULBWPmappingType_1 = 1; - initialULBWPstartSymbolAndLength_1 = 69; - - initialULBWPk2_2 = 7; - initialULBWPmappingType_2 = 1; - initialULBWPstartSymbolAndLength_2 = 52; - msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.273PRB.usrpn300.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.273PRB.usrpn300.conf index 362a280ccb..15aa368fdf 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.273PRB.usrpn300.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.273PRB.usrpn300.conf @@ -54,15 +54,6 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 0; initialDLBWPsearchSpaceZero = 0; - #pdsch-ConfigCommon - #pdschTimeDomainAllocationList (up to 16 entries) - initialDLBWPk0_0 = 0; #for DL slot - initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB - initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 - - initialDLBWPk0_1 = 0; #for mixed slot - initialDLBWPmappingType_1 = 0; - initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5 #uplinkConfigCommon #frequencyInfoUL @@ -117,18 +108,6 @@ gNBs = # restrictedSetConfig # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, - # pusch-ConfigCommon (up to 16 elements) - initialULBWPk2_0 = 6; # used for UL slot - initialULBWPmappingType_0 = 1 - initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 - - initialULBWPk2_1 = 6; # used for mixed slot - initialULBWPmappingType_1 = 1; - initialULBWPstartSymbolAndLength_1 = 69; # this is SS=10 L=2 - - initialULBWPk2_2 = 7; # used for Msg.3 during RA - initialULBWPmappingType_2 = 1; - initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4 msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/rcc.band78.tm1.106PRB.nfapi.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/rcc.band78.tm1.106PRB.nfapi.conf index e541607559..1583e07ca1 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/rcc.band78.tm1.106PRB.nfapi.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/rcc.band78.tm1.106PRB.nfapi.conf @@ -54,29 +54,6 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 12; initialDLBWPsearchSpaceZero = 0; - #pdsch-ConfigCommon - #pdschTimeDomainAllocationList (up to 16 entries) - initialDLBWPk0_0 = 0; - #initialULBWPmappingType - #0=typeA,1=typeB - initialDLBWPmappingType_0 = 0; - #this is SS=1,L=13 - initialDLBWPstartSymbolAndLength_0 = 40; - - initialDLBWPk0_1 = 0; - initialDLBWPmappingType_1 = 0; - #this is SS=2,L=12 - initialDLBWPstartSymbolAndLength_1 = 53; - - initialDLBWPk0_2 = 0; - initialDLBWPmappingType_2 = 0; - #this is SS=1,L=12 - initialDLBWPstartSymbolAndLength_2 = 54; - - initialDLBWPk0_3 = 0; - initialDLBWPmappingType_3 = 0; - #this is SS=1,L=5 - initialDLBWPstartSymbolAndLength_3 = 57; #uplinkConfigCommon #frequencyInfoUL @@ -131,22 +108,6 @@ gNBs = # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, - # pusch-ConfigCommon (up to 16 elements) - initialULBWPk2_0 = 6; - initialULBWPmappingType_0 = 1 - # this is SS=0 L=11 - initialULBWPstartSymbolAndLength_0 = 55; - - initialULBWPk2_1 = 6; - initialULBWPmappingType_1 = 1; - # this is SS=0 L=12 - initialULBWPstartSymbolAndLength_1 = 69; - - initialULBWPk2_2 = 7; - initialULBWPmappingType_2 = 1; - # this is SS=10 L=4 - initialULBWPstartSymbolAndLength_2 = 52; - msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/testing_gnb.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/testing_gnb.conf index b1c78bc978..8dfcfb2b88 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/testing_gnb.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/testing_gnb.conf @@ -54,15 +54,6 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 0; initialDLBWPsearchSpaceZero = 0; - #pdsch-ConfigCommon - #pdschTimeDomainAllocationList (up to 16 entries) - initialDLBWPk0_0 = 0; #for DL slot - initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB - initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 - - initialDLBWPk0_1 = 0; #for mixed slot - initialDLBWPmappingType_1 = 0; - initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5 #uplinkConfigCommon #frequencyInfoUL @@ -117,18 +108,6 @@ gNBs = # restrictedSetConfig # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, - # pusch-ConfigCommon (up to 16 elements) - initialULBWPk2_0 = 2; # used for UL slot - initialULBWPmappingType_0 = 1 - initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 - - initialULBWPk2_1 = 2; # used for mixed slot - initialULBWPmappingType_1 = 1; - initialULBWPstartSymbolAndLength_1 = 24; # this is SS=10 L=2 - - initialULBWPk2_2 = 7; # used for Msg.3 during RA - initialULBWPmappingType_2 = 1; - initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4 msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/testing_gnb_24PRB.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/testing_gnb_24PRB.conf index 96f2909031..d01b0947c0 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/testing_gnb_24PRB.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/testing_gnb_24PRB.conf @@ -55,28 +55,7 @@ gNBs = initialDLBWPcontrolResourceSetZero = 0; initialDLBWPsearchSpaceZero = 0; #pdsch-ConfigCommon - #pdschTimeDomainAllocationList (up to 16 entries) - initialDLBWPk0_0 = 0; - #initialULBWPmappingType - #0=typeA,1=typeB - initialDLBWPmappingType_0 = 0; - #this is SS=1,L=13 - initialDLBWPstartSymbolAndLength_0 = 40; - initialDLBWPk0_1 = 0; - initialDLBWPmappingType_1 = 0; - #this is SS=2,L=12 - initialDLBWPstartSymbolAndLength_1 = 53; - - initialDLBWPk0_2 = 0; - initialDLBWPmappingType_2 = 0; - #this is SS=1,L=12 - initialDLBWPstartSymbolAndLength_2 = 54; - - initialDLBWPk0_3 = 0; - initialDLBWPmappingType_3 = 0; - #this is SS=1,L=4 //5 (4 is for 43, 5 is for 57) - initialDLBWPstartSymbolAndLength_3 = 57; //43; //57; #uplinkConfigCommon #frequencyInfoUL ul_frequencyBand = 78; @@ -130,21 +109,6 @@ gNBs = # restrictedSetConfig # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, - # pusch-ConfigCommon (up to 16 elements) - initialULBWPk2_0 = 2; - initialULBWPmappingType_0 = 1 - # this is SS=0 L=13 - initialULBWPstartSymbolAndLength_0 = 41; - - initialULBWPk2_1 = 2; - initialULBWPmappingType_1 = 1; - # this is SS=0 L=11 - initialULBWPstartSymbolAndLength_1 = 69; - - initialULBWPk2_2 = 7; - initialULBWPmappingType_2 = 1; - # this is SS=10 L=4 - initialULBWPstartSymbolAndLength_2 = 52; msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/testing_gnb_n310.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/testing_gnb_n310.conf index f51f59ae30..198ad8471c 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/testing_gnb_n310.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/testing_gnb_n310.conf @@ -54,15 +54,6 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 0; initialDLBWPsearchSpaceZero = 0; - #pdsch-ConfigCommon - #pdschTimeDomainAllocationList (up to 16 entries) - initialDLBWPk0_0 = 0; #for DL slot - initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB - initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 - - initialDLBWPk0_1 = 0; #for mixed slot - initialDLBWPmappingType_1 = 0; - initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5 #uplinkConfigCommon #frequencyInfoUL @@ -117,18 +108,6 @@ gNBs = # restrictedSetConfig # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, - # pusch-ConfigCommon (up to 16 elements) - initialULBWPk2_0 = 2; # used for UL slot - initialULBWPmappingType_0 = 1 - initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 - - initialULBWPk2_1 = 2; # used for mixed slot - initialULBWPmappingType_1 = 1; - initialULBWPstartSymbolAndLength_1 = 24; # this is SS=10 L=2 - - initialULBWPk2_2 = 7; # used for Msg.3 during RA - initialULBWPmappingType_2 = 1; - initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4 msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/testing_gnb_nsa_n310.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/testing_gnb_nsa_n310.conf index 59e507ed3e..2f4839fd3b 100644 --- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/testing_gnb_nsa_n310.conf +++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/testing_gnb_nsa_n310.conf @@ -56,15 +56,6 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 0; initialDLBWPsearchSpaceZero = 0; - #pdsch-ConfigCommon - #pdschTimeDomainAllocationList (up to 16 entries) - initialDLBWPk0_0 = 0; #for DL slot - initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB - initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 - - initialDLBWPk0_1 = 0; #for mixed slot - initialDLBWPmappingType_1 = 0; - initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5 #uplinkConfigCommon #frequencyInfoUL @@ -119,18 +110,6 @@ gNBs = # restrictedSetConfig # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, - # pusch-ConfigCommon (up to 16 elements) - initialULBWPk2_0 = 2; # used for UL slot - initialULBWPmappingType_0 = 1 - initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 - - initialULBWPk2_1 = 2; # used for mixed slot - initialULBWPmappingType_1 = 1; - initialULBWPstartSymbolAndLength_1 = 24; # this is SS=10 L=2 - - initialULBWPk2_2 = 7; # used for Msg.3 during RA - initialULBWPmappingType_2 = 1; - initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4 msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/du_gnb.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/du_gnb.conf index 05e441d396..7f9e4d2d44 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/du_gnb.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/du_gnb.conf @@ -81,29 +81,6 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 12; initialDLBWPsearchSpaceZero = 0; - #pdsch-ConfigCommon - #pdschTimeDomainAllocationList (up to 16 entries) - initialDLBWPk0_0 = 0; - #initialULBWPmappingType - #0=typeA,1=typeB - initialDLBWPmappingType_0 = 0; - #this is SS=1,L=13 - initialDLBWPstartSymbolAndLength_0 = 53; - - initialDLBWPk0_1 = 0; - initialDLBWPmappingType_1 = 0; - #this is SS=2,L=12 - initialDLBWPstartSymbolAndLength_1 = 81; - - initialDLBWPk0_2 = 0; - initialDLBWPmappingType_2 = 0; - #this is SS=1,L=12 - initialDLBWPstartSymbolAndLength_2 = 54; - - initialDLBWPk0_3 = 0; - initialDLBWPmappingType_3 = 0; - #this is SS=1,L=5 - initialDLBWPstartSymbolAndLength_3 = 57; #uplinkConfigCommon #frequencyInfoUL @@ -158,22 +135,6 @@ gNBs = # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, - # pusch-ConfigCommon (up to 16 elements) - initialULBWPk2_0 = 6; - initialULBWPmappingType_0 = 1 - # this is SS=2 L=12 - initialULBWPstartSymbolAndLength_0 = 53; - - initialULBWPk2_1 = 6; - initialULBWPmappingType_1 = 1; - # this is SS=0 L=12 - initialULBWPstartSymbolAndLength_1 = 69; - - initialULBWPk2_2 = 7; - initialULBWPmappingType_2 = 1; - # this is SS=10 L=4 - initialULBWPstartSymbolAndLength_2 = 52; - msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.band78.tm1.106PRB.usrpn300.gtp-itti.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.band78.tm1.106PRB.usrpn300.gtp-itti.conf index 3bd884b602..ab4713f8b5 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.band78.tm1.106PRB.usrpn300.gtp-itti.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.band78.tm1.106PRB.usrpn300.gtp-itti.conf @@ -69,29 +69,6 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 12; initialDLBWPsearchSpaceZero = 0; - #pdsch-ConfigCommon - #pdschTimeDomainAllocationList (up to 16 entries) - initialDLBWPk0_0 = 0; - #initialULBWPmappingType - #0=typeA,1=typeB - initialDLBWPmappingType_0 = 0; - #this is SS=1,L=13 - initialDLBWPstartSymbolAndLength_0 = 40; - - initialDLBWPk0_1 = 0; - initialDLBWPmappingType_1 = 0; - #this is SS=2,L=12 - initialDLBWPstartSymbolAndLength_1 = 53; - - initialDLBWPk0_2 = 0; - initialDLBWPmappingType_2 = 0; - #this is SS=1,L=12 - initialDLBWPstartSymbolAndLength_2 = 54; - - initialDLBWPk0_3 = 0; - initialDLBWPmappingType_3 = 0; - #this is SS=1,L=5 - initialDLBWPstartSymbolAndLength_3 = 57; #uplinkConfigCommon #frequencyInfoUL @@ -146,21 +123,6 @@ gNBs = # restrictedSetConfig # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, - # pusch-ConfigCommon (up to 16 elements) - initialULBWPk2_0 = 6; - initialULBWPmappingType_0 = 1 - # this is SS=0 L=11 - initialULBWPstartSymbolAndLength_0 = 55; - - initialULBWPk2_1 = 6; - initialULBWPmappingType_1 = 1; - # this is SS=0 L=12 - initialULBWPstartSymbolAndLength_1 = 69; - - initialULBWPk2_2 = 7; - initialULBWPmappingType_2 = 1; - # this is SS=10 L=4 - initialULBWPstartSymbolAndLength_2 = 52; msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band41.fr1.106PRB.usrpb210.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band41.fr1.106PRB.usrpb210.conf index de6bafc9f7..9238ea1809 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band41.fr1.106PRB.usrpb210.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band41.fr1.106PRB.usrpb210.conf @@ -73,15 +73,6 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 12; initialDLBWPsearchSpaceZero = 0; - #pdsch-ConfigCommon - #pdschTimeDomainAllocationList (up to 16 entries) - initialDLBWPk0_0 = 0; #for DL slot - initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB - initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 - - initialDLBWPk0_1 = 0; #for mixed slot - initialDLBWPmappingType_1 = 0; - initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5 #uplinkConfigCommon #frequencyInfoUL @@ -136,19 +127,6 @@ gNBs = # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, - # pusch-ConfigCommon (up to 16 elements) - initialULBWPk2_0 = 6; # used for UL slot - initialULBWPmappingType_0 = 1 - initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 - - initialULBWPk2_1 = 6; # used for mixed slot - initialULBWPmappingType_1 = 1; - initialULBWPstartSymbolAndLength_1 = 52; # this is SS=10 L=4 - - initialULBWPk2_2 = 7; # used for Msg.3 during RA - initialULBWPmappingType_2 = 1; - initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4 - msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.2x2.usrpn300.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.2x2.usrpn300.conf index abc64b6e46..9717462176 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.2x2.usrpn300.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.2x2.usrpn300.conf @@ -73,15 +73,6 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 11; initialDLBWPsearchSpaceZero = 0; - #pdsch-ConfigCommon - #pdschTimeDomainAllocationList (up to 16 entries) - initialDLBWPk0_0 = 0; #for DL slot - initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB - initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 - - initialDLBWPk0_1 = 0; #for mixed slot - initialDLBWPmappingType_1 = 0; - initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5 #uplinkConfigCommon #frequencyInfoUL @@ -136,19 +127,6 @@ gNBs = # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, - # pusch-ConfigCommon (up to 16 elements) - initialULBWPk2_0 = 2; # used for UL slot - initialULBWPmappingType_0 = 1 - initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 - - initialULBWPk2_1 = 2; # used for mixed slot - initialULBWPmappingType_1 = 1; - initialULBWPstartSymbolAndLength_1 = 52; # this is SS=10 L=4 - - initialULBWPk2_2 = 7; # used for Msg.3 during RA - initialULBWPmappingType_2 = 1; - initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4 - msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.conf index 83b39b85ec..d9b62064c1 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.conf @@ -73,15 +73,6 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 12; initialDLBWPsearchSpaceZero = 0; - #pdsch-ConfigCommon - #pdschTimeDomainAllocationList (up to 16 entries) - initialDLBWPk0_0 = 0; #for DL slot - initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB - initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 - - initialDLBWPk0_1 = 0; #for mixed slot - initialDLBWPmappingType_1 = 0; - initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5 #uplinkConfigCommon #frequencyInfoUL @@ -136,19 +127,6 @@ gNBs = # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, - # pusch-ConfigCommon (up to 16 elements) - initialULBWPk2_0 = 6; # used for UL slot - initialULBWPmappingType_0 = 1 - initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13 - - initialULBWPk2_1 = 6; # used for mixed slot - initialULBWPmappingType_1 = 1; - initialULBWPstartSymbolAndLength_1 = 52; # this is SS=10 L=4 - - initialULBWPk2_2 = 7; # used for Msg.3 during RA - initialULBWPmappingType_2 = 1; - initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4 - msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90; diff --git a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.sabox.conf b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.sabox.conf index a0d25053b6..e9577ee265 100644 --- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.sabox.conf +++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.sabox.conf @@ -70,29 +70,6 @@ gNBs = #pdcch-ConfigCommon initialDLBWPcontrolResourceSetZero = 12; initialDLBWPsearchSpaceZero = 0; - #pdsch-ConfigCommon - #pdschTimeDomainAllocationList (up to 16 entries) - initialDLBWPk0_0 = 0; - #initialULBWPmappingType - #0=typeA,1=typeB - initialDLBWPmappingType_0 = 0; - #this is SS=1,L=13 - initialDLBWPstartSymbolAndLength_0 = 40; - - initialDLBWPk0_1 = 0; - initialDLBWPmappingType_1 = 0; - #this is SS=2,L=12 - initialDLBWPstartSymbolAndLength_1 = 53; - - initialDLBWPk0_2 = 0; - initialDLBWPmappingType_2 = 0; - #this is SS=1,L=12 - initialDLBWPstartSymbolAndLength_2 = 54; - - initialDLBWPk0_3 = 0; - initialDLBWPmappingType_3 = 0; - #this is SS=1,L=5 - initialDLBWPstartSymbolAndLength_3 = 57; #uplinkConfigCommon #frequencyInfoUL @@ -147,22 +124,6 @@ gNBs = # 0=unrestricted, 1=restricted type A, 2=restricted type B restrictedSetConfig = 0, - # pusch-ConfigCommon (up to 16 elements) - initialULBWPk2_0 = 6; - initialULBWPmappingType_0 = 1 - # this is SS=0 L=11 - initialULBWPstartSymbolAndLength_0 = 55; - - initialULBWPk2_1 = 6; - initialULBWPmappingType_1 = 1; - # this is SS=0 L=12 - initialULBWPstartSymbolAndLength_1 = 69; - - initialULBWPk2_2 = 7; - initialULBWPmappingType_2 = 1; - # this is SS=10 L=4 - initialULBWPstartSymbolAndLength_2 = 52; - msg3_DeltaPreamble = 1; p0_NominalWithGrant =-90;