Fix dci size for formats 1_0 and 0_0 and improve procedures when using Coreset0
This commit is contained in:
@@ -2538,7 +2538,8 @@ uint16_t nr_dci_size(const NR_BWP_DownlinkCommon_t *initialDownlinkBWP,
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nr_dci_format_t format,
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nr_dci_format_t format,
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nr_rnti_type_t rnti_type,
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nr_rnti_type_t rnti_type,
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uint16_t N_RB,
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uint16_t N_RB,
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int bwp_id) {
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int bwp_id,
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uint16_t cset0_bwp_size) {
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uint16_t size = 0;
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uint16_t size = 0;
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uint16_t numRBG = 0;
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uint16_t numRBG = 0;
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@@ -2588,7 +2589,9 @@ uint16_t nr_dci_size(const NR_BWP_DownlinkCommon_t *initialDownlinkBWP,
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/// fixed: Format identifier 1, Hop flag 1, MCS 5, NDI 1, RV 2, HARQ PID 4, PUSCH TPC 2 Time Domain assgnmt 4 --20
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/// fixed: Format identifier 1, Hop flag 1, MCS 5, NDI 1, RV 2, HARQ PID 4, PUSCH TPC 2 Time Domain assgnmt 4 --20
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size += 20;
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size += 20;
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size += (uint8_t)ceil( log2( (N_RB*(N_RB+1))>>1 ) ); // Freq domain assignment -- hopping scenario to be updated
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size += (uint8_t)ceil( log2( (N_RB*(N_RB+1))>>1 ) ); // Freq domain assignment -- hopping scenario to be updated
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size += nr_dci_size(initialDownlinkBWP,initialUplinkBWP,cg,dci_pdu,NR_DL_DCI_FORMAT_1_0, rnti_type, N_RB, bwp_id) - size; // Padding to match 1_0 size
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int dci_10_size = nr_dci_size(initialDownlinkBWP,initialUplinkBWP,cg,dci_pdu,NR_DL_DCI_FORMAT_1_0, rnti_type, N_RB, bwp_id, cset0_bwp_size);
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AssertFatal(dci_10_size >= size, "NR_UL_DCI_FORMAT_0_0 size is bigger than NR_DL_DCI_FORMAT_1_0! 3GPP TS 38.212 Section 7.3.1.0: DCI size alignment is not fully implemented");
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size += dci_10_size - size; // Padding to match 1_0 size
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// UL/SUL indicator assumed to be 0
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// UL/SUL indicator assumed to be 0
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break;
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break;
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@@ -2805,6 +2808,14 @@ uint16_t nr_dci_size(const NR_BWP_DownlinkCommon_t *initialDownlinkBWP,
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case NR_DL_DCI_FORMAT_1_0:
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case NR_DL_DCI_FORMAT_1_0:
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/// fixed: Format identifier 1, VRB2PRB 1, MCS 5, NDI 1, RV 2, HARQ PID 4, DAI 2, PUCCH TPC 2, PUCCH RInd 3, PDSCH to HARQ TInd 3 Time Domain assgnmt 4 -- 28
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/// fixed: Format identifier 1, VRB2PRB 1, MCS 5, NDI 1, RV 2, HARQ PID 4, DAI 2, PUCCH TPC 2, PUCCH RInd 3, PDSCH to HARQ TInd 3 Time Domain assgnmt 4 -- 28
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// 3GPP TS 38.212 Section 7.3.1.0: DCI size alignment
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// Size of DCI format 1_0 is given by the size of CORESET 0 if CORESET 0 is configured for the cell and the size
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// of initial DL bandwidth part if CORESET 0 is not configured for the cell
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if(cset0_bwp_size>0) {
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N_RB = cset0_bwp_size;
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}
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size = 28;
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size = 28;
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size += (uint8_t)ceil( log2( (N_RB*(N_RB+1))>>1 ) ); // Freq domain assignment
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size += (uint8_t)ceil( log2( (N_RB*(N_RB+1))>>1 ) ); // Freq domain assignment
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@@ -54,7 +54,8 @@ uint16_t nr_dci_size(const NR_BWP_DownlinkCommon_t *initialDLBWP,
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nr_dci_format_t format,
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nr_dci_format_t format,
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nr_rnti_type_t rnti_type,
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nr_rnti_type_t rnti_type,
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uint16_t N_RB,
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uint16_t N_RB,
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int bwp_id);
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int bwp_id,
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uint16_t cset0_bwp_size);
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void find_aggregation_candidates(uint8_t *aggregation_level,
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void find_aggregation_candidates(uint8_t *aggregation_level,
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uint8_t *nr_of_candidates,
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uint8_t *nr_of_candidates,
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@@ -169,7 +169,7 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t
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rel15->SubcarrierSpacing = bwp_Common->genericParameters.subcarrierSpacing;
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rel15->SubcarrierSpacing = bwp_Common->genericParameters.subcarrierSpacing;
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}
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}
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for (int i = 0; i < rel15->num_dci_options; i++) {
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for (int i = 0; i < rel15->num_dci_options; i++) {
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rel15->dci_length_options[i] = nr_dci_size(initialDownlinkBWP,initialUplinkBWP, mac->cg, &mac->def_dci_pdu_rel15[rel15->dci_format_options[i]], rel15->dci_format_options[i], NR_RNTI_C, rel15->BWPSize, bwp_id);
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rel15->dci_length_options[i] = nr_dci_size(initialDownlinkBWP,initialUplinkBWP, mac->cg, &mac->def_dci_pdu_rel15[rel15->dci_format_options[i]], rel15->dci_format_options[i], NR_RNTI_C, rel15->BWPSize, bwp_id, mac->type0_PDCCH_CSS_config.num_rbs);
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}
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}
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break;
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break;
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case NR_RNTI_RA:
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case NR_RNTI_RA:
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@@ -185,7 +185,7 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t
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rel15->BWPStart = NRRIV2PRBOFFSET(bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
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rel15->BWPStart = NRRIV2PRBOFFSET(bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
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}
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}
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rel15->SubcarrierSpacing = initialDownlinkBWP->genericParameters.subcarrierSpacing;
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rel15->SubcarrierSpacing = initialDownlinkBWP->genericParameters.subcarrierSpacing;
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rel15->dci_length_options[0] = nr_dci_size(initialDownlinkBWP,initialUplinkBWP, mac->cg, &mac->def_dci_pdu_rel15[rel15->dci_format_options[0]], rel15->dci_format_options[0], NR_RNTI_RA, rel15->BWPSize, bwp_id);
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rel15->dci_length_options[0] = nr_dci_size(initialDownlinkBWP,initialUplinkBWP, mac->cg, &mac->def_dci_pdu_rel15[rel15->dci_format_options[0]], rel15->dci_format_options[0], NR_RNTI_RA, rel15->BWPSize, bwp_id, mac->type0_PDCCH_CSS_config.num_rbs);
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break;
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break;
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case NR_RNTI_P:
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case NR_RNTI_P:
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break;
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break;
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@@ -200,7 +200,7 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t
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rel15->BWPStart = mac->type0_PDCCH_CSS_config.cset_start_rb;
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rel15->BWPStart = mac->type0_PDCCH_CSS_config.cset_start_rb;
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rel15->SubcarrierSpacing = initialDownlinkBWP->genericParameters.subcarrierSpacing;
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rel15->SubcarrierSpacing = initialDownlinkBWP->genericParameters.subcarrierSpacing;
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for (int i = 0; i < rel15->num_dci_options; i++) {
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for (int i = 0; i < rel15->num_dci_options; i++) {
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rel15->dci_length_options[i] = nr_dci_size(initialDownlinkBWP,initialUplinkBWP, mac->cg, &mac->def_dci_pdu_rel15[rel15->dci_format_options[i]], rel15->dci_format_options[i], NR_RNTI_TC, rel15->BWPSize, bwp_id);
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rel15->dci_length_options[i] = nr_dci_size(initialDownlinkBWP,initialUplinkBWP, mac->cg, &mac->def_dci_pdu_rel15[rel15->dci_format_options[i]], rel15->dci_format_options[i], NR_RNTI_TC, rel15->BWPSize, bwp_id, mac->type0_PDCCH_CSS_config.num_rbs);
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}
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}
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break;
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break;
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case NR_RNTI_SP_CSI:
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case NR_RNTI_SP_CSI:
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@@ -223,7 +223,7 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t
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rel15->SubcarrierSpacing = mac->mib->subCarrierSpacingCommon + 2;
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rel15->SubcarrierSpacing = mac->mib->subCarrierSpacingCommon + 2;
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for (int i = 0; i < rel15->num_dci_options; i++) {
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for (int i = 0; i < rel15->num_dci_options; i++) {
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rel15->dci_length_options[i] = nr_dci_size(initialDownlinkBWP,initialUplinkBWP, mac->cg, &mac->def_dci_pdu_rel15[rel15->dci_format_options[i]], rel15->dci_format_options[i], NR_RNTI_SI, rel15->BWPSize, 0);
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rel15->dci_length_options[i] = nr_dci_size(initialDownlinkBWP,initialUplinkBWP, mac->cg, &mac->def_dci_pdu_rel15[rel15->dci_format_options[i]], rel15->dci_format_options[i], NR_RNTI_SI, rel15->BWPSize, 0, mac->type0_PDCCH_CSS_config.num_rbs);
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}
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}
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break;
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break;
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case NR_RNTI_SFI:
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case NR_RNTI_SFI:
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@@ -846,7 +846,8 @@ void nr_generate_Msg3_retransmission(module_id_t module_idP, int CC_id, frame_t
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NR_UL_DCI_FORMAT_0_0,
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NR_UL_DCI_FORMAT_0_0,
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NR_RNTI_TC,
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NR_RNTI_TC,
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pusch_pdu->bwp_size,
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pusch_pdu->bwp_size,
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ra->bwp_id);
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ra->bwp_id,
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nr_mac->cset0_bwp_size);
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// Mark the corresponding RBs as used
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// Mark the corresponding RBs as used
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for (int rb = 0; rb < ra->msg3_nb_rb; rb++) {
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for (int rb = 0; rb < ra->msg3_nb_rb; rb++) {
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@@ -1359,7 +1360,8 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
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NR_DL_DCI_FORMAT_1_0,
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NR_DL_DCI_FORMAT_1_0,
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NR_RNTI_RA,
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NR_RNTI_RA,
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BWPSize,
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BWPSize,
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bwpid);
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bwpid,
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nr_mac->cset0_bwp_size);
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// DL TX request
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// DL TX request
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nfapi_nr_pdu_t *tx_req = &nr_mac->TX_req[CC_id].pdu_list[nr_mac->TX_req[CC_id].Number_of_PDUs];
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nfapi_nr_pdu_t *tx_req = &nr_mac->TX_req[CC_id].pdu_list[nr_mac->TX_req[CC_id].Number_of_PDUs];
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@@ -1732,7 +1734,8 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
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NR_DL_DCI_FORMAT_1_0,
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NR_DL_DCI_FORMAT_1_0,
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NR_RNTI_TC,
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NR_RNTI_TC,
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pdsch_pdu_rel15->BWPSize,
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pdsch_pdu_rel15->BWPSize,
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bwpid);
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bwpid,
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nr_mac->cset0_bwp_size);
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// Add padding header and zero rest out if there is space left
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// Add padding header and zero rest out if there is space left
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if (ra->mac_pdu_length < harq->tb_size) {
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if (ra->mac_pdu_length < harq->tb_size) {
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@@ -535,7 +535,8 @@ void nr_fill_nfapi_dl_sib1_pdu(int Mod_idP,
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dci_format,
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dci_format,
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rnti_type,
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rnti_type,
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pdsch_pdu_rel15->BWPSize,
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pdsch_pdu_rel15->BWPSize,
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0);
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0,
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gNB_mac->cset0_bwp_size);
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LOG_D(MAC,"BWPSize: %i\n", pdcch_pdu_rel15->BWPSize);
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LOG_D(MAC,"BWPSize: %i\n", pdcch_pdu_rel15->BWPSize);
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LOG_D(MAC,"BWPStart: %i\n", pdcch_pdu_rel15->BWPStart);
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LOG_D(MAC,"BWPStart: %i\n", pdcch_pdu_rel15->BWPStart);
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@@ -565,7 +565,8 @@ bool allocate_dl_retransmission(module_id_t module_id,
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genericParameters = &sib1->servingCellConfigCommon->downlinkConfigCommon.initialDownlinkBWP.genericParameters;
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genericParameters = &sib1->servingCellConfigCommon->downlinkConfigCommon.initialDownlinkBWP.genericParameters;
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}
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}
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const uint16_t bwpSize = NRRIV2BW(genericParameters->locationAndBandwidth, MAX_BWP_SIZE);
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const int coresetid = (sched_ctrl->active_bwp||bwpd) ? sched_ctrl->coreset->controlResourceSetId : RC.nrmac[module_id]->sched_ctrlCommon->coreset->controlResourceSetId;
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const uint16_t bwpSize = coresetid == 0 ? RC.nrmac[module_id]->cset0_bwp_size : NRRIV2BW(genericParameters->locationAndBandwidth, MAX_BWP_SIZE);
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int rbStart = 0; // start wrt BWPstart
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int rbStart = 0; // start wrt BWPstart
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NR_pdsch_semi_static_t *ps = &sched_ctrl->pdsch_semi_static;
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NR_pdsch_semi_static_t *ps = &sched_ctrl->pdsch_semi_static;
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@@ -775,7 +776,8 @@ void pf_dl(module_id_t module_id,
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genericParameters = &sib1->servingCellConfigCommon->downlinkConfigCommon.initialDownlinkBWP.genericParameters;
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genericParameters = &sib1->servingCellConfigCommon->downlinkConfigCommon.initialDownlinkBWP.genericParameters;
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}
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}
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const uint16_t bwpSize = NRRIV2BW(genericParameters->locationAndBandwidth,MAX_BWP_SIZE);
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const int coresetid = (sched_ctrl->active_bwp||bwpd) ? sched_ctrl->coreset->controlResourceSetId : RC.nrmac[module_id]->sched_ctrlCommon->coreset->controlResourceSetId;
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const uint16_t bwpSize = coresetid == 0 ? RC.nrmac[module_id]->cset0_bwp_size : NRRIV2BW(genericParameters->locationAndBandwidth, MAX_BWP_SIZE);
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int rbStart = 0; // start wrt BWPstart
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int rbStart = 0; // start wrt BWPstart
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if (sched_ctrl->available_dl_harq.head < 0) {
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if (sched_ctrl->available_dl_harq.head < 0) {
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@@ -884,8 +886,16 @@ void nr_fr1_dlsch_preprocessor(module_id_t module_id, frame_t frame, sub_frame_t
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genericParameters = &sib1->servingCellConfigCommon->downlinkConfigCommon.initialDownlinkBWP.genericParameters;
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genericParameters = &sib1->servingCellConfigCommon->downlinkConfigCommon.initialDownlinkBWP.genericParameters;
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}
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}
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const uint16_t bwpSize = NRRIV2BW(genericParameters->locationAndBandwidth,MAX_BWP_SIZE);
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NR_BWP_DownlinkDedicated_t *bwpd =
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const uint16_t BWPStart = NRRIV2PRBOFFSET(genericParameters->locationAndBandwidth,MAX_BWP_SIZE);
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UE_info->CellGroup[UE_id] &&
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UE_info->CellGroup[UE_id]->spCellConfig &&
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UE_info->CellGroup[UE_id]->spCellConfig->spCellConfigDedicated ?
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UE_info->CellGroup[UE_id]->spCellConfig->spCellConfigDedicated->initialDownlinkBWP : NULL;
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const int coresetid = (sched_ctrl->active_bwp||bwpd) ? sched_ctrl->coreset->controlResourceSetId : RC.nrmac[module_id]->sched_ctrlCommon->coreset->controlResourceSetId;
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const uint16_t bwpSize = coresetid == 0 ? RC.nrmac[module_id]->cset0_bwp_size : NRRIV2BW(genericParameters->locationAndBandwidth,MAX_BWP_SIZE);
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const uint16_t BWPStart = coresetid == 0 ? RC.nrmac[module_id]->cset0_bwp_start : NRRIV2PRBOFFSET(genericParameters->locationAndBandwidth,MAX_BWP_SIZE);
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uint16_t *vrb_map = RC.nrmac[module_id]->common_channels[CC_id].vrb_map;
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uint16_t *vrb_map = RC.nrmac[module_id]->common_channels[CC_id].vrb_map;
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uint8_t rballoc_mask[bwpSize];
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uint8_t rballoc_mask[bwpSize];
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@@ -1060,6 +1070,8 @@ void nr_schedule_ue_spec(module_id_t module_id,
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genericParameters = &sib1->servingCellConfigCommon->downlinkConfigCommon.initialDownlinkBWP.genericParameters;
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genericParameters = &sib1->servingCellConfigCommon->downlinkConfigCommon.initialDownlinkBWP.genericParameters;
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}
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}
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NR_SearchSpace_t *ss = (bwp||bwpd) ? sched_ctrl->search_space : gNB_mac->sched_ctrlCommon->search_space;
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const int bwpid = bwp ? bwp->bwp_Id : 0;
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const int bwpid = bwp ? bwp->bwp_Id : 0;
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const int coresetid = (bwp||bwpd) ? sched_ctrl->coreset->controlResourceSetId : gNB_mac->sched_ctrlCommon->coreset->controlResourceSetId;
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const int coresetid = (bwp||bwpd) ? sched_ctrl->coreset->controlResourceSetId : gNB_mac->sched_ctrlCommon->coreset->controlResourceSetId;
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nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu = gNB_mac->pdcch_pdu_idx[CC_id][bwpid][coresetid];
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nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu = gNB_mac->pdcch_pdu_idx[CC_id][bwpid][coresetid];
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@@ -1072,7 +1084,6 @@ void nr_schedule_ue_spec(module_id_t module_id,
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dl_req->nPDUs += 1;
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dl_req->nPDUs += 1;
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pdcch_pdu = &dl_tti_pdcch_pdu->pdcch_pdu.pdcch_pdu_rel15;
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pdcch_pdu = &dl_tti_pdcch_pdu->pdcch_pdu.pdcch_pdu_rel15;
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LOG_D(NR_MAC,"Trying to configure DL pdcch for UE %d, bwp %d, cs %d\n",UE_id,bwpid,coresetid);
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LOG_D(NR_MAC,"Trying to configure DL pdcch for UE %d, bwp %d, cs %d\n",UE_id,bwpid,coresetid);
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NR_SearchSpace_t *ss = (bwp||bwpd) ? sched_ctrl->search_space:gNB_mac->sched_ctrlCommon->search_space;
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NR_ControlResourceSet_t *coreset = (bwp||bwpd)? sched_ctrl->coreset:gNB_mac->sched_ctrlCommon->coreset;
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NR_ControlResourceSet_t *coreset = (bwp||bwpd)? sched_ctrl->coreset:gNB_mac->sched_ctrlCommon->coreset;
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nr_configure_pdcch(gNB_mac, pdcch_pdu, ss, coreset, scc, genericParameters, NULL);
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nr_configure_pdcch(gNB_mac, pdcch_pdu, ss, coreset, scc, genericParameters, NULL);
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gNB_mac->pdcch_pdu_idx[CC_id][bwpid][coresetid] = pdcch_pdu;
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gNB_mac->pdcch_pdu_idx[CC_id][bwpid][coresetid] = pdcch_pdu;
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@@ -1093,8 +1104,14 @@ void nr_schedule_ue_spec(module_id_t module_id,
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const int pduindex = gNB_mac->pdu_index[CC_id]++;
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const int pduindex = gNB_mac->pdu_index[CC_id]++;
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pdsch_pdu->pduIndex = pduindex;
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pdsch_pdu->pduIndex = pduindex;
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pdsch_pdu->BWPSize = NRRIV2BW(genericParameters->locationAndBandwidth, MAX_BWP_SIZE);
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if (coresetid == 0) {
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pdsch_pdu->BWPStart = NRRIV2PRBOFFSET(genericParameters->locationAndBandwidth,MAX_BWP_SIZE);
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pdsch_pdu->BWPSize = gNB_mac->cset0_bwp_size;
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pdsch_pdu->BWPStart = gNB_mac->cset0_bwp_start;
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} else {
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||||||
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pdsch_pdu->BWPSize = NRRIV2BW(genericParameters->locationAndBandwidth, MAX_BWP_SIZE);
|
||||||
|
pdsch_pdu->BWPStart = NRRIV2PRBOFFSET(genericParameters->locationAndBandwidth,MAX_BWP_SIZE);
|
||||||
|
}
|
||||||
|
|
||||||
pdsch_pdu->SubcarrierSpacing = genericParameters->subcarrierSpacing;
|
pdsch_pdu->SubcarrierSpacing = genericParameters->subcarrierSpacing;
|
||||||
|
|
||||||
pdsch_pdu->CyclicPrefix = genericParameters->cyclicPrefix ? *genericParameters->cyclicPrefix : 0;
|
pdsch_pdu->CyclicPrefix = genericParameters->cyclicPrefix ? *genericParameters->cyclicPrefix : 0;
|
||||||
@@ -1223,8 +1240,7 @@ void nr_schedule_ue_spec(module_id_t module_id,
|
|||||||
dci_payload.tpc,
|
dci_payload.tpc,
|
||||||
pucch->timing_indicator);
|
pucch->timing_indicator);
|
||||||
|
|
||||||
int dci_format = sched_ctrl->search_space && sched_ctrl->search_space->searchSpaceType &&
|
int dci_format = ss && ss->searchSpaceType && ss->searchSpaceType->present == NR_SearchSpace__searchSpaceType_PR_ue_Specific ?
|
||||||
sched_ctrl->search_space->searchSpaceType->present == NR_SearchSpace__searchSpaceType_PR_ue_Specific ?
|
|
||||||
NR_DL_DCI_FORMAT_1_1 : NR_DL_DCI_FORMAT_1_0;
|
NR_DL_DCI_FORMAT_1_1 : NR_DL_DCI_FORMAT_1_0;
|
||||||
|
|
||||||
const int rnti_type = NR_RNTI_C;
|
const int rnti_type = NR_RNTI_C;
|
||||||
@@ -1236,7 +1252,8 @@ void nr_schedule_ue_spec(module_id_t module_id,
|
|||||||
dci_format,
|
dci_format,
|
||||||
rnti_type,
|
rnti_type,
|
||||||
pdsch_pdu->BWPSize,
|
pdsch_pdu->BWPSize,
|
||||||
bwp? bwp->bwp_Id : 0);
|
bwp? bwp->bwp_Id : 0,
|
||||||
|
gNB_mac->cset0_bwp_size);
|
||||||
|
|
||||||
LOG_D(NR_MAC,
|
LOG_D(NR_MAC,
|
||||||
"coreset params: FreqDomainResource %llx, start_symbol %d n_symb %d\n",
|
"coreset params: FreqDomainResource %llx, start_symbol %d n_symb %d\n",
|
||||||
|
|||||||
@@ -1218,12 +1218,13 @@ void fill_dci_pdu_rel15(const NR_ServingCellConfigCommon_t *scc,
|
|||||||
int dci_format,
|
int dci_format,
|
||||||
int rnti_type,
|
int rnti_type,
|
||||||
int N_RB,
|
int N_RB,
|
||||||
int bwp_id) {
|
int bwp_id,
|
||||||
|
uint16_t cset0_bwp_size) {
|
||||||
uint8_t fsize = 0, pos = 0;
|
uint8_t fsize = 0, pos = 0;
|
||||||
|
|
||||||
uint64_t *dci_pdu = (uint64_t *)pdcch_dci_pdu->Payload;
|
uint64_t *dci_pdu = (uint64_t *)pdcch_dci_pdu->Payload;
|
||||||
*dci_pdu=0;
|
*dci_pdu=0;
|
||||||
int dci_size = nr_dci_size(scc->downlinkConfigCommon->initialDownlinkBWP,scc->uplinkConfigCommon->initialUplinkBWP, CellGroup, dci_pdu_rel15, dci_format, rnti_type, N_RB, bwp_id);
|
int dci_size = nr_dci_size(scc->downlinkConfigCommon->initialDownlinkBWP,scc->uplinkConfigCommon->initialUplinkBWP, CellGroup, dci_pdu_rel15, dci_format, rnti_type, N_RB, bwp_id, cset0_bwp_size);
|
||||||
pdcch_dci_pdu->PayloadSizeBits = dci_size;
|
pdcch_dci_pdu->PayloadSizeBits = dci_size;
|
||||||
AssertFatal(dci_size <= 64, "DCI sizes above 64 bits not yet supported");
|
AssertFatal(dci_size <= 64, "DCI sizes above 64 bits not yet supported");
|
||||||
if (dci_format == NR_DL_DCI_FORMAT_1_1 || dci_format == NR_UL_DCI_FORMAT_0_1)
|
if (dci_format == NR_DL_DCI_FORMAT_1_1 || dci_format == NR_UL_DCI_FORMAT_0_1)
|
||||||
@@ -1567,7 +1568,7 @@ void fill_dci_pdu_rel15(const NR_ServingCellConfigCommon_t *scc,
|
|||||||
pos+=4;
|
pos+=4;
|
||||||
*dci_pdu |= ((uint64_t)dci_pdu_rel15->harq_pid & 0xf) << (dci_size - pos);
|
*dci_pdu |= ((uint64_t)dci_pdu_rel15->harq_pid & 0xf) << (dci_size - pos);
|
||||||
// Padding bits
|
// Padding bits
|
||||||
for (int a = pos; a < 32; a++)
|
for (int a = pos; a < dci_size; a++)
|
||||||
*dci_pdu |= ((uint64_t)dci_pdu_rel15->padding & 1) << (dci_size - pos++);
|
*dci_pdu |= ((uint64_t)dci_pdu_rel15->padding & 1) << (dci_size - pos++);
|
||||||
// UL/SUL indicator – 1 bit
|
// UL/SUL indicator – 1 bit
|
||||||
/* commented for now (RK): need to get this from BWP descriptor
|
/* commented for now (RK): need to get this from BWP descriptor
|
||||||
|
|||||||
@@ -1824,7 +1824,8 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot)
|
|||||||
ps->dci_format,
|
ps->dci_format,
|
||||||
rnti_types[0],
|
rnti_types[0],
|
||||||
pusch_pdu->bwp_size,
|
pusch_pdu->bwp_size,
|
||||||
bwpid);
|
bwpid,
|
||||||
|
nr_mac->cset0_bwp_size);
|
||||||
|
|
||||||
memset(sched_pusch, 0, sizeof(*sched_pusch));
|
memset(sched_pusch, 0, sizeof(*sched_pusch));
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -266,7 +266,8 @@ void fill_dci_pdu_rel15(const NR_ServingCellConfigCommon_t *scc,
|
|||||||
int dci_formats,
|
int dci_formats,
|
||||||
int rnti_types,
|
int rnti_types,
|
||||||
int N_RB,
|
int N_RB,
|
||||||
int bwp_id);
|
int bwp_id,
|
||||||
|
uint16_t cset0_bwp_size);
|
||||||
|
|
||||||
void prepare_dci(const NR_CellGroupConfig_t *CellGroup,
|
void prepare_dci(const NR_CellGroupConfig_t *CellGroup,
|
||||||
dci_pdu_rel15_t *dci_pdu_rel15,
|
dci_pdu_rel15_t *dci_pdu_rel15,
|
||||||
|
|||||||
Reference in New Issue
Block a user