Use gold cache PUSCH decoding
Harmonize nr_gold_pusch() and nr_gold_pdsch(), as the gold sequence calculation for PUSCH and PDSCH is the same.
This commit is contained in:
committed by
Robert Schmidt
parent
745ea1c1dd
commit
e445ba2d1a
@@ -150,32 +150,6 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB)
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nr_generate_modulation_table();
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nr_init_pbch_interleaver(gNB->nr_pbch_interleaver);
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//PUSCH DMRS init
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gNB->nr_gold_pusch_dmrs = (uint32_t ****)malloc16(NR_NB_NSCID*sizeof(uint32_t ***));
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uint32_t ****pusch_dmrs = gNB->nr_gold_pusch_dmrs;
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int pusch_dmrs_init_length = ((fp->N_RB_UL*12)>>5)+1;
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for(int nscid=0; nscid<NR_NB_NSCID; nscid++) {
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pusch_dmrs[nscid] = (uint32_t ***)malloc16(fp->slots_per_frame*sizeof(uint32_t **));
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AssertFatal(pusch_dmrs[nscid]!=NULL, "NR init: pusch_dmrs for nscid %d - malloc failed\n", nscid);
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for (int slot=0; slot<fp->slots_per_frame; slot++) {
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pusch_dmrs[nscid][slot] = (uint32_t **)malloc16(fp->symbols_per_slot*sizeof(uint32_t *));
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AssertFatal(pusch_dmrs[nscid][slot]!=NULL, "NR init: pusch_dmrs for slot %d - malloc failed\n", slot);
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for (int symb=0; symb<fp->symbols_per_slot; symb++) {
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pusch_dmrs[nscid][slot][symb] = (uint32_t *)malloc16(pusch_dmrs_init_length*sizeof(uint32_t));
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AssertFatal(pusch_dmrs[nscid][slot][symb]!=NULL, "NR init: pusch_dmrs for slot %d symbol %d - malloc failed\n", slot, symb);
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}
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}
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}
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for (int nscid=0; nscid<NR_NB_NSCID; nscid++) {
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gNB->pusch_gold_init[nscid] = cfg->cell_config.phy_cell_id.value;
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nr_gold_pusch(gNB, nscid, gNB->pusch_gold_init[nscid]);
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}
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// CSI RS init
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// ceil((NB_RB*8(max allocation per RB)*2(QPSK))/32)
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int csi_dmrs_init_length = ((fp->N_RB_DL<<4)>>5)+1;
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@@ -292,17 +266,6 @@ void phy_free_nr_gNB(PHY_VARS_gNB *gNB)
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free_and_zero(meas->n0_subband_power);
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free_and_zero(meas->n0_subband_power_dB);
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uint32_t ****pusch_dmrs = gNB->nr_gold_pusch_dmrs;
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for(int nscid = 0; nscid < 2; nscid++) {
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for (int slot = 0; slot < fp->slots_per_frame; slot++) {
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for (int symb = 0; symb < fp->symbols_per_slot; symb++)
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free_and_zero(pusch_dmrs[nscid][slot][symb]);
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free_and_zero(pusch_dmrs[nscid][slot]);
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}
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free_and_zero(pusch_dmrs[nscid]);
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}
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free_and_zero(pusch_dmrs);
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uint32_t ***nr_gold_csi_rs = gNB->nr_csi_info->nr_gold_csi_rs;
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for (int slot = 0; slot < fp->slots_per_frame; slot++) {
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for (int symb = 0; symb < fp->symbols_per_slot; symb++)
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@@ -200,7 +200,7 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue, int nb_connected_gNB)
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NR_UE_CSI_RS **const csirs_vars = ue->csirs_vars;
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NR_UE_SRS **const srs_vars = ue->srs_vars;
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int i, slot, symb, gNB_id;
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int i, gNB_id;
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LOG_I(PHY, "Initializing UE vars for gNB TXant %u, UE RXant %u\n", fp->nb_antennas_tx, fp->nb_antennas_rx);
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@@ -245,26 +245,6 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue, int nb_connected_gNB)
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/////////////////////////PUSCH DMRS init/////////////////////////
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///////////
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// ceil(((NB_RB*6(k)*2(QPSK)/32) // 3 RE *2(QPSK)
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int pusch_dmrs_init_length = ((fp->N_RB_UL*12)>>5)+1;
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ue->nr_gold_pusch_dmrs = malloc16(fp->slots_per_frame * sizeof(uint32_t ***));
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uint32_t ****pusch_dmrs = ue->nr_gold_pusch_dmrs;
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for (slot=0; slot<fp->slots_per_frame; slot++) {
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pusch_dmrs[slot] = malloc16(fp->symbols_per_slot * sizeof(uint32_t **));
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AssertFatal(pusch_dmrs[slot]!=NULL, "init_nr_ue_signal: pusch_dmrs for slot %d - malloc failed\n", slot);
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for (symb=0; symb<fp->symbols_per_slot; symb++) {
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pusch_dmrs[slot][symb] = malloc16(NR_NB_NSCID * sizeof(uint32_t *));
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AssertFatal(pusch_dmrs[slot][symb]!=NULL, "init_nr_ue_signal: pusch_dmrs for slot %d symbol %d - malloc failed\n", slot, symb);
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for (int q=0; q<NR_NB_NSCID; q++) {
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pusch_dmrs[slot][symb][q] = malloc16(pusch_dmrs_init_length * sizeof(uint32_t));
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AssertFatal(pusch_dmrs[slot][symb][q]!=NULL, "init_nr_ue_signal: pusch_dmrs for slot %d symbol %d nscid %d - malloc failed\n", slot, symb, q);
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}
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}
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}
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///////////
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////////////////////////////////////////////////////////////////////////////////////////////
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@@ -363,16 +343,6 @@ void term_nr_ue_signal(PHY_VARS_NR_UE *ue, int nb_connected_gNB)
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const NR_DL_FRAME_PARMS* fp = &ue->frame_parms;
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phy_term_nr_top();
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for (int slot = 0; slot < fp->slots_per_frame; slot++) {
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for (int symb = 0; symb < fp->symbols_per_slot; symb++) {
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for (int q=0; q<NR_NB_NSCID; q++)
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free_and_zero(ue->nr_gold_pusch_dmrs[slot][symb][q]);
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free_and_zero(ue->nr_gold_pusch_dmrs[slot][symb]);
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}
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free_and_zero(ue->nr_gold_pusch_dmrs[slot]);
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}
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free_and_zero(ue->nr_gold_pusch_dmrs);
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NR_UE_COMMON* common_vars = &ue->common_vars;
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for (int i = 0; i < fp->nb_antennas_tx; i++) {
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@@ -103,16 +103,18 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
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//------------------generate DMRS------------------//
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if(pusch_pdu->ul_dmrs_scrambling_id != gNB->pusch_gold_init[pusch_pdu->scid]) {
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gNB->pusch_gold_init[pusch_pdu->scid] = pusch_pdu->ul_dmrs_scrambling_id;
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nr_gold_pusch(gNB, pusch_pdu->scid, pusch_pdu->ul_dmrs_scrambling_id);
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}
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if (pusch_pdu->transform_precoding == transformPrecoder_disabled) {
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// Note: pilot returned by the following function is already the complex conjugate of the transmitted DMRS
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NR_DL_FRAME_PARMS *fp = &gNB->frame_parms;
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const uint32_t *gold = nr_gold_pusch(fp->N_RB_UL,
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fp->symbols_per_slot,
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gNB->gNB_config.cell_config.phy_cell_id.value,
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pusch_pdu->scid,
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Ns,
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symbol);
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nr_pusch_dmrs_rx(gNB,
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Ns,
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gNB->nr_gold_pusch_dmrs[pusch_pdu->scid][Ns][symbol],
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gold,
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pilot,
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(1000 + p),
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0,
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@@ -552,6 +554,12 @@ void nr_pusch_ptrs_processing(PHY_VARS_gNB *gNB,
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/*------------------------------------------------------------------------------------------------------- */
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/* 1) Estimate common phase error per PTRS symbol */
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/*------------------------------------------------------------------------------------------------------- */
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const uint32_t *gold = nr_gold_pusch(frame_parms->N_RB_UL,
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frame_parms->symbols_per_slot,
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gNB->gNB_config.cell_config.phy_cell_id.value,
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rel15_ul->scid,
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nr_tti_rx,
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symbol);
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nr_ptrs_cpe_estimation(*K_ptrs,
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*ptrsReOffset,
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*nb_rb,
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@@ -560,7 +568,7 @@ void nr_pusch_ptrs_processing(PHY_VARS_gNB *gNB,
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symbol,
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frame_parms->ofdm_symbol_size,
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(int16_t *)&pusch_vars->rxdataF_comp[aarx][(symbol * nb_re_pusch)],
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gNB->nr_gold_pusch_dmrs[rel15_ul->scid][nr_tti_rx][symbol],
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gold,
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(int16_t *)&phase_per_symbol[symbol],
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ptrs_re_symbol);
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}
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@@ -21,26 +21,6 @@
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#include "nr_refsig.h"
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void nr_gold_pusch(PHY_VARS_gNB* gNB, int nscid, uint32_t nid)
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{
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NR_DL_FRAME_PARMS *fp = &gNB->frame_parms;
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int pusch_dmrs_init_length = ((fp->N_RB_UL * 12) >> 5) + 1;
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for (int ns = 0; ns < fp->slots_per_frame; ns++) {
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for (int l = 0; l < fp->symbols_per_slot; l++) {
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int reset = 1;
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uint32_t x1 = 0;
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uint64_t temp_x2 = ((1UL << 17) * (fp->symbols_per_slot * ns + l + 1) * ((nid << 1) + 1) + ((nid << 1) + nscid));
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uint32_t x2 = temp_x2 % (1U << 31);
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LOG_D(PHY,"DMRS slot %d, symb %d, nscid %d, nid %d, x2 %x\n", ns, l, nscid, nid, x2);
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for (int n = 0; n < pusch_dmrs_init_length; n++) {
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gNB->nr_gold_pusch_dmrs[nscid][ns][l][n] = lte_gold_generic(&x1, &x2, reset);
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reset = 0;
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}
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}
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}
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}
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void nr_init_prs(PHY_VARS_gNB* gNB)
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{
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unsigned int x1 = 0, x2 = 0;
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@@ -22,26 +22,6 @@
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#include "refsig_defs_ue.h"
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#include "openair1/PHY/LTE_TRANSPORT/transport_proto.h" // for lte_gold_generic()
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void nr_init_pusch_dmrs(PHY_VARS_NR_UE* ue, uint16_t N_n_scid, uint8_t n_scid)
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{
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NR_DL_FRAME_PARMS *fp = &ue->frame_parms;
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uint32_t ****pusch_dmrs = ue->nr_gold_pusch_dmrs;
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int pusch_dmrs_init_length = ((fp->N_RB_UL * 12) >> 5) + 1;
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for (int slot = 0; slot < fp->slots_per_frame; slot++) {
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for (int symb = 0; symb < fp->symbols_per_slot; symb++) {
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int reset = 1;
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uint32_t x1 = 0;
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uint64_t t_x2 = ((1UL << 17) * (fp->symbols_per_slot*slot + symb + 1) * ((N_n_scid << 1) + 1) + ((N_n_scid << 1) + n_scid));
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uint32_t x2 = t_x2 % (1U << 31);
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LOG_D(PHY,"DMRS slot %d, symb %d, N_n_scid %d, n_scid %d, x2 %x\n", slot, symb, N_n_scid, n_scid, x2);
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for (int n = 0; n < pusch_dmrs_init_length; n++) {
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pusch_dmrs[slot][symb][n_scid][n] = lte_gold_generic(&x1, &x2, reset);
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reset = 0;
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}
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}
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}
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}
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void init_nr_gold_prs(PHY_VARS_NR_UE* ue)
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{
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unsigned int x1 = 0, x2 = 0;
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@@ -41,8 +41,6 @@ void nr_init_prs(PHY_VARS_gNB* gNB);
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*/
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void nr_init_csi_rs(const NR_DL_FRAME_PARMS *fp, uint32_t ***csi_rs, uint32_t Nid);
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void nr_gold_pusch(PHY_VARS_gNB* gNB, int nscid, uint32_t nid);
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int nr_pusch_dmrs_delta(uint8_t dmrs_config_type, unsigned short p);
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int nr_pusch_dmrs_rx(PHY_VARS_gNB *gNB,
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@@ -28,5 +28,6 @@ uint32_t *gold_cache(uint32_t key, int length);
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uint32_t *nr_gold_pbch(int Lmax, int Nid, int n_hf, int ssb);
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uint32_t *nr_gold_pdcch(int N_RB_DL, int symbols_per_slot, unsigned short n_idDMRS, int ns, int l);
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uint32_t *nr_gold_pdsch(int N_RB_DL, int symbols_per_slot, int nid, int nscid, int slot, int symbol);
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uint32_t *nr_gold_pusch(int N_RB_UL, int symbols_per_slot, int Nid, int nscid, int slot, int symbol);
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#endif
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@@ -192,3 +192,8 @@ uint32_t *nr_gold_pdsch(int N_RB_DL, int symbols_per_slot, int nid, int nscid, i
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LOG_D(PHY, "UE DMRS slot %d, symb %d, nscid %d, x2 %x\n", slot, symbol, nscid, x2);
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return gold_cache(x2, pdsch_dmrs_init_length);
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}
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uint32_t *nr_gold_pusch(int N_RB_UL, int symbols_per_slot, int Nid, int nscid, int slot, int symbol)
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{
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return nr_gold_pdsch(N_RB_UL, symbols_per_slot, Nid, nscid, slot, symbol);
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}
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@@ -51,10 +51,6 @@ int nr_pdsch_dmrs_rx(const PHY_VARS_NR_UE *ue,
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unsigned short nb_pdsch_rb,
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uint8_t config_type);
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void nr_init_pusch_dmrs(PHY_VARS_NR_UE* ue,
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uint16_t N_n_scid,
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uint8_t n_scid);
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void nr_init_csi_rs(const NR_DL_FRAME_PARMS *fp, uint32_t ***csi_rs, uint32_t Nid);
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void init_nr_gold_prs(PHY_VARS_NR_UE* ue);
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void sl_generate_pss(SL_NR_UE_INIT_PARAMS_t *sl_init_params, uint8_t n_sl_id2, uint16_t scaling);
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@@ -408,13 +408,6 @@ nr_initial_sync_t nr_initial_sync(UE_nr_rxtx_proc_t *proc,
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ue->init_sync_frame = n_frames - 1 - res.syncRes.frame_id;
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nr_init_csi_rs(fp, ue->nr_csi_info->nr_gold_csi_rs, fp->Nid_cell);
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// initialize the pusch dmrs
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for (int i = 0; i < NR_NB_NSCID; i++) {
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ue->scramblingID_ulsch[i] = fp->Nid_cell;
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nr_init_pusch_dmrs(ue, ue->scramblingID_ulsch[i], i);
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}
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// we also need to take into account the shift by samples_per_frame in case the if is true
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if (res.ssbOffset < sync_pos_frame) {
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res.syncRes.rx_offset = fp->samples_per_frame - sync_pos_frame + res.ssbOffset;
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@@ -240,12 +240,6 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
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/////////////////////////DMRS Modulation/////////////////////////
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///////////
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if(pusch_pdu->ul_dmrs_scrambling_id != UE->scramblingID_ulsch[pusch_pdu->scid]) {
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UE->scramblingID_ulsch[pusch_pdu->scid] = pusch_pdu->ul_dmrs_scrambling_id;
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nr_init_pusch_dmrs(UE, pusch_pdu->scid, pusch_pdu->ul_dmrs_scrambling_id);
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}
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uint32_t ***pusch_dmrs = UE->nr_gold_pusch_dmrs[slot];
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uint16_t n_dmrs = (pusch_pdu->bwp_start + start_rb + nb_rb)*((dmrs_type == pusch_dmrs_type1) ? 6:4);
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c16_t mod_dmrs[n_dmrs] __attribute((aligned(16)));
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@@ -382,7 +376,13 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
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// TODO: performance improvement, we can skip the modulation of DMRS symbols outside the bandwidth part
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// Perform this on gold sequence, not required when SC FDMA operation is done,
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LOG_D(PHY,"DMRS in symbol %d\n",l);
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nr_modulation(pusch_dmrs[l][pusch_pdu->scid],
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const uint32_t *gold = nr_gold_pusch(frame_parms->N_RB_UL,
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frame_parms->symbols_per_slot,
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pusch_pdu->ul_dmrs_scrambling_id,
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pusch_pdu->scid,
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slot,
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l);
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nr_modulation(gold,
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n_dmrs * 2,
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DMRS_MOD_ORDER,
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(int16_t *)mod_dmrs); // currently only codeword 0 is modulated. Qm = 2 as DMRS is QPSK modulated
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@@ -395,7 +395,13 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
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if(is_ptrs_symbol(l, ulsch_ue->ptrs_symbols)) {
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is_ptrs_sym = 1;
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nr_modulation(pusch_dmrs[l][pusch_pdu->scid], nb_rb, DMRS_MOD_ORDER, (int16_t *)mod_ptrs);
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const uint32_t *gold = nr_gold_pusch(frame_parms->N_RB_UL,
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frame_parms->symbols_per_slot,
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pusch_pdu->ul_dmrs_scrambling_id,
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pusch_pdu->scid,
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slot,
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l);
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nr_modulation(gold, nb_rb, DMRS_MOD_ORDER, (int16_t *)mod_ptrs);
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}
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}
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@@ -609,9 +609,6 @@ typedef struct PHY_VARS_gNB_s {
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/// PBCH interleaver
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uint8_t nr_pbch_interleaver[NR_POLAR_PBCH_PAYLOAD_BITS];
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/// PUSCH DMRS
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uint32_t ****nr_gold_pusch_dmrs;
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/// PRS sequence
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uint32_t ****nr_gold_prs;
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@@ -632,8 +629,6 @@ typedef struct PHY_VARS_gNB_s {
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/// counter to average prach energh over first 100 prach opportunities
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int prach_energy_counter;
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int pusch_gold_init[2];
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int ap_N1;
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int ap_N2;
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int ap_XP;
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@@ -408,11 +408,6 @@ typedef struct PHY_VARS_NR_UE_s {
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#endif
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// Scrambling IDs used in PUSCH DMRS
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uint16_t scramblingID_ulsch[2];
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/// PUSCH DMRS sequence
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uint32_t ****nr_gold_pusch_dmrs;
|
||||
|
||||
// PRS sequence per gNB, per resource
|
||||
uint32_t *****nr_gold_prs;
|
||||
|
||||
|
||||
@@ -703,11 +703,6 @@ int main(int argc, char *argv[])
|
||||
|
||||
init_nr_ue_transport(UE);
|
||||
|
||||
for(int n_scid = 0; n_scid<2; n_scid++) {
|
||||
UE->scramblingID_ulsch[n_scid] = frame_parms->Nid_cell;
|
||||
nr_init_pusch_dmrs(UE, frame_parms->Nid_cell, n_scid);
|
||||
}
|
||||
|
||||
//Configure UE
|
||||
nr_l2_init_ue(1);
|
||||
NR_UE_MAC_INST_t* UE_mac = get_mac_inst(0);
|
||||
|
||||
Reference in New Issue
Block a user