diff --git a/openair1/PHY/INIT/lte_init.c b/openair1/PHY/INIT/lte_init.c index 7bb653c30d..1108bdc1ff 100755 --- a/openair1/PHY/INIT/lte_init.c +++ b/openair1/PHY/INIT/lte_init.c @@ -34,286 +34,273 @@ extern uint16_t prach_root_sequence_map0_3[838]; extern uint16_t prach_root_sequence_map4[138]; -uint8_t dmrs1_tab[8] = {0,2,3,4,6,8,9,10}; +uint8_t dmrs1_tab[8] = { 0, 2, 3, 4, 6, 8, 9, 10 }; -int N_RB_DL_array[6] = {6,15,25,50,75,100}; +int N_RB_DL_array[6] = { 6, 15, 25, 50, 75, 100 }; -int l1_north_init_eNB() { +int +l1_north_init_eNB () +{ - int i,j; - AssertFatal(RC.nb_L1_inst>0,"nb_L1_inst=%d\n",RC.nb_L1_inst); - AssertFatal(RC.nb_L1_CC!=NULL,"nb_L1_CC is null\n"); - AssertFatal(RC.eNB!=NULL,"RC.eNB is null\n"); - for (i=0;i0,"RC.nb_L1_CC[%d]=%d\n",i,RC.nb_L1_CC[i]); - for (j=0;jif_inst = IF_Module_init(i))<0) return(-1); + int i, j; + AssertFatal (RC.nb_L1_inst > 0, "nb_L1_inst=%d\n", RC.nb_L1_inst); + AssertFatal (RC.nb_L1_CC != NULL, "nb_L1_CC is null\n"); + AssertFatal (RC.eNB != NULL, "RC.eNB is null\n"); + for (i = 0; i < RC.nb_L1_inst; i++) { + AssertFatal (RC.eNB[i] != NULL, "RC.eNB[%d] is null\n", i); + AssertFatal (RC.nb_L1_CC[i] > 0, "RC.nb_L1_CC[%d]=%d\n", i, RC.nb_L1_CC[i]); + for (j = 0; j < RC.nb_L1_CC[i]; j++) { + AssertFatal (RC.eNB[i][j] != NULL, "RC.eNB[%d][%d] is null\n", i, j); + if ((RC.eNB[i][j]->if_inst = IF_Module_init (i)) < 0) + return (-1); RC.eNB[i][j]->if_inst->PHY_config_req = phy_config_request; RC.eNB[i][j]->if_inst->schedule_response = schedule_response; } } - return(0); + return (0); } -void phy_config_request(PHY_Config_t *phy_config) { +void +phy_config_request (PHY_Config_t * phy_config) +{ - uint8_t Mod_id = phy_config->Mod_id; - int CC_id = phy_config->CC_id; + uint8_t Mod_id = phy_config->Mod_id; + int CC_id = phy_config->CC_id; nfapi_config_request_t *cfg = phy_config->cfg; LTE_DL_FRAME_PARMS *fp; - PHICH_RESOURCE_t phich_resource_table[4]={oneSixth,half,one,two}; - int eutra_band = cfg->nfapi_config.rf_bands.rf_band[0]; - int dl_Bandwidth = cfg->rf_config.dl_channel_bandwidth.value; - int Nid_cell = cfg->sch_config.physical_cell_id.value; - int Ncp = cfg->subframe_config.dl_cyclic_prefix_type.value; - int p_eNB = cfg->rf_config.tx_antenna_ports.value; - uint32_t dl_CarrierFreq = cfg->nfapi_config.earfcn.value; + PHICH_RESOURCE_t phich_resource_table[4] = { oneSixth, half, one, two }; + int eutra_band = cfg->nfapi_config.rf_bands.rf_band[0]; + int dl_Bandwidth = cfg->rf_config.dl_channel_bandwidth.value; + int Nid_cell = cfg->sch_config.physical_cell_id.value; + int Ncp = cfg->subframe_config.dl_cyclic_prefix_type.value; + int p_eNB = cfg->rf_config.tx_antenna_ports.value; + uint32_t dl_CarrierFreq = cfg->nfapi_config.earfcn.value; - LOG_I(PHY,"Configuring MIB for instance %d, CCid %d : (band %d,N_RB_DL %d,Nid_cell %d,p %d,Ncp %d,DL freq %u,phich_config.resource %d, phich_config.duration %d)\n", - Mod_id, CC_id, eutra_band, N_RB_DL_array[dl_Bandwidth], Nid_cell, p_eNB,Ncp,dl_CarrierFreq, - cfg->phich_config.phich_resource.value, - cfg->phich_config.phich_duration.value); + LOG_I (PHY, "Configuring MIB for instance %d, CCid %d : (band %d,N_RB_DL %d,Nid_cell %d,p %d,Ncp %d,DL freq %u,phich_config.resource %d, phich_config.duration %d)\n", + Mod_id, CC_id, eutra_band, N_RB_DL_array[dl_Bandwidth], Nid_cell, p_eNB, Ncp, dl_CarrierFreq, cfg->phich_config.phich_resource.value, cfg->phich_config.phich_duration.value); - AssertFatal(RC.eNB != NULL, "PHY instance pointer doesn't exist\n"); - AssertFatal(RC.eNB[Mod_id] != NULL, "PHY instance %d doesn't exist\n",Mod_id); - AssertFatal(RC.eNB[Mod_id][CC_id] != NULL, "PHY instance %d, CCid %d doesn't exist\n",Mod_id,CC_id); + AssertFatal (RC.eNB != NULL, "PHY instance pointer doesn't exist\n"); + AssertFatal (RC.eNB[Mod_id] != NULL, "PHY instance %d doesn't exist\n", Mod_id); + AssertFatal (RC.eNB[Mod_id][CC_id] != NULL, "PHY instance %d, CCid %d doesn't exist\n", Mod_id, CC_id); - RC.eNB[Mod_id][CC_id]->mac_enabled = 1; + RC.eNB[Mod_id][CC_id]->mac_enabled = 1; fp = &RC.eNB[Mod_id][CC_id]->frame_parms; - fp->N_RB_DL = N_RB_DL_array[dl_Bandwidth]; - fp->N_RB_UL = N_RB_DL_array[dl_Bandwidth]; - fp->Nid_cell = Nid_cell; - fp->nushift = fp->Nid_cell%6; - fp->eutra_band = eutra_band; - fp->Ncp = Ncp; - fp->Ncp_UL = Ncp; - fp->nb_antenna_ports_eNB = p_eNB; + fp->N_RB_DL = N_RB_DL_array[dl_Bandwidth]; + fp->N_RB_UL = N_RB_DL_array[dl_Bandwidth]; + fp->Nid_cell = Nid_cell; + fp->nushift = fp->Nid_cell % 6; + fp->eutra_band = eutra_band; + fp->Ncp = Ncp; + fp->Ncp_UL = Ncp; + fp->nb_antenna_ports_eNB = p_eNB; - fp->threequarter_fs = 0; + fp->threequarter_fs = 0; - AssertFatal(cfg->phich_config.phich_resource.value<4, "Illegal phich_Resource\n"); + AssertFatal (cfg->phich_config.phich_resource.value < 4, "Illegal phich_Resource\n"); fp->phich_config_common.phich_resource = phich_resource_table[cfg->phich_config.phich_resource.value]; fp->phich_config_common.phich_duration = cfg->phich_config.phich_duration.value; // Note: "from_earfcn" has to be in a common library with MACRLC - fp->dl_CarrierFreq = from_earfcn(eutra_band,dl_CarrierFreq); - fp->ul_CarrierFreq = fp->dl_CarrierFreq - (get_uldl_offset(eutra_band)*100000); + fp->dl_CarrierFreq = from_earfcn (eutra_band, dl_CarrierFreq); + fp->ul_CarrierFreq = fp->dl_CarrierFreq - (get_uldl_offset (eutra_band) * 100000); - fp->tdd_config = 0; - fp->tdd_config_S = 0; + fp->tdd_config = 0; + fp->tdd_config_S = 0; - if (fp->dl_CarrierFreq==fp->ul_CarrierFreq) + if (fp->dl_CarrierFreq == fp->ul_CarrierFreq) fp->frame_type = TDD; else fp->frame_type = FDD; - init_frame_parms(fp,1); - init_lte_top(fp); + init_frame_parms (fp, 1); + init_lte_top (fp); if (cfg->subframe_config.duplex_mode.value == 0) { - fp->tdd_config = cfg->tdd_frame_structure_config.subframe_assignment.value; - fp->tdd_config_S = cfg->tdd_frame_structure_config.special_subframe_patterns.value; - fp->frame_type = TDD; - } - else { - fp->frame_type = FDD; + fp->tdd_config = cfg->tdd_frame_structure_config.subframe_assignment.value; + fp->tdd_config_S = cfg->tdd_frame_structure_config.special_subframe_patterns.value; + fp->frame_type = TDD; + } else { + fp->frame_type = FDD; } - fp->prach_config_common.rootSequenceIndex = cfg->prach_config.root_sequence_index.value; - LOG_I(PHY,"prach_config_common.rootSequenceIndex = %d\n",cfg->prach_config.root_sequence_index.value); + fp->prach_config_common.rootSequenceIndex = cfg->prach_config.root_sequence_index.value; + LOG_I (PHY, "prach_config_common.rootSequenceIndex = %d\n", cfg->prach_config.root_sequence_index.value); - fp->prach_config_common.prach_Config_enabled=1; + fp->prach_config_common.prach_Config_enabled = 1; - fp->prach_config_common.prach_ConfigInfo.prach_ConfigIndex =cfg->prach_config.configuration_index.value; - LOG_I(PHY,"prach_config_common.prach_ConfigInfo.prach_ConfigIndex = %d\n",cfg->prach_config.configuration_index.value); + fp->prach_config_common.prach_ConfigInfo.prach_ConfigIndex = cfg->prach_config.configuration_index.value; + LOG_I (PHY, "prach_config_common.prach_ConfigInfo.prach_ConfigIndex = %d\n", cfg->prach_config.configuration_index.value); - fp->prach_config_common.prach_ConfigInfo.highSpeedFlag =cfg->prach_config.high_speed_flag.value; - LOG_I(PHY,"prach_config_common.prach_ConfigInfo.highSpeedFlag = %d\n",cfg->prach_config.high_speed_flag.value); - fp->prach_config_common.prach_ConfigInfo.zeroCorrelationZoneConfig =cfg->prach_config.zero_correlation_zone_configuration.value; - LOG_I(PHY,"prach_config_common.prach_ConfigInfo.zeroCorrelationZoneConfig = %d\n",cfg->prach_config.zero_correlation_zone_configuration.value); - fp->prach_config_common.prach_ConfigInfo.prach_FreqOffset =cfg->prach_config.frequency_offset.value; - LOG_I(PHY,"prach_config_common.prach_ConfigInfo.prach_FreqOffset = %d\n",cfg->prach_config.frequency_offset.value); + fp->prach_config_common.prach_ConfigInfo.highSpeedFlag = cfg->prach_config.high_speed_flag.value; + LOG_I (PHY, "prach_config_common.prach_ConfigInfo.highSpeedFlag = %d\n", cfg->prach_config.high_speed_flag.value); + fp->prach_config_common.prach_ConfigInfo.zeroCorrelationZoneConfig = cfg->prach_config.zero_correlation_zone_configuration.value; + LOG_I (PHY, "prach_config_common.prach_ConfigInfo.zeroCorrelationZoneConfig = %d\n", cfg->prach_config.zero_correlation_zone_configuration.value); + fp->prach_config_common.prach_ConfigInfo.prach_FreqOffset = cfg->prach_config.frequency_offset.value; + LOG_I (PHY, "prach_config_common.prach_ConfigInfo.prach_FreqOffset = %d\n", cfg->prach_config.frequency_offset.value); - init_prach_tables(839); - compute_prach_seq(fp->prach_config_common.rootSequenceIndex, - fp->prach_config_common.prach_ConfigInfo.prach_ConfigIndex, - fp->prach_config_common.prach_ConfigInfo.zeroCorrelationZoneConfig, - fp->prach_config_common.prach_ConfigInfo.highSpeedFlag, - fp->frame_type, - RC.eNB[Mod_id][CC_id]->X_u); + init_prach_tables (839); + compute_prach_seq (fp->prach_config_common.rootSequenceIndex, + fp->prach_config_common.prach_ConfigInfo.prach_ConfigIndex, + fp->prach_config_common.prach_ConfigInfo.zeroCorrelationZoneConfig, fp->prach_config_common.prach_ConfigInfo.highSpeedFlag, fp->frame_type, RC.eNB[Mod_id][CC_id]->X_u); #ifdef Rel14 if (cfg->emtc_config.prach_ce_level_0_enable.value == 1) { - fp->prach_emtc_config_common.prach_Config_enabled=1; + fp->prach_emtc_config_common.prach_Config_enabled = 1; - fp->prach_emtc_config_common.rootSequenceIndex = cfg->emtc_config.prach_catm_root_sequence_index.value; + fp->prach_emtc_config_common.rootSequenceIndex = cfg->emtc_config.prach_catm_root_sequence_index.value; - fp->prach_emtc_config_common.prach_ConfigInfo.highSpeedFlag = cfg->emtc_config.prach_catm_high_speed_flag.value; - fp->prach_emtc_config_common.prach_ConfigInfo.zeroCorrelationZoneConfig = cfg->emtc_config.prach_catm_zero_correlation_zone_configuration.value; + fp->prach_emtc_config_common.prach_ConfigInfo.highSpeedFlag = cfg->emtc_config.prach_catm_high_speed_flag.value; + fp->prach_emtc_config_common.prach_ConfigInfo.zeroCorrelationZoneConfig = cfg->emtc_config.prach_catm_zero_correlation_zone_configuration.value; // CE Level 3 parameters - fp->prach_emtc_config_common.prach_ConfigInfo.prach_CElevel_enable[3] = cfg->emtc_config.prach_ce_level_3_enable.value; - fp->prach_emtc_config_common.prach_ConfigInfo.prach_starting_subframe_periodicity[3] = cfg->emtc_config.prach_ce_level_3_starting_subframe_periodicity.value; + fp->prach_emtc_config_common.prach_ConfigInfo.prach_CElevel_enable[3] = cfg->emtc_config.prach_ce_level_3_enable.value; + fp->prach_emtc_config_common.prach_ConfigInfo.prach_starting_subframe_periodicity[3] = cfg->emtc_config.prach_ce_level_3_starting_subframe_periodicity.value; fp->prach_emtc_config_common.prach_ConfigInfo.prach_numRepetitionPerPreambleAttempt[3] = cfg->emtc_config.prach_ce_level_3_number_of_repetitions_per_attempt.value; - AssertFatal(fp->prach_emtc_config_common.prach_ConfigInfo.prach_starting_subframe_periodicity[3]>=fp->prach_emtc_config_common.prach_ConfigInfo.prach_numRepetitionPerPreambleAttempt[3], - "prach_starting_subframe_periodicity[3] < prach_numPetitionPerPreambleAttempt[3]\n"); + AssertFatal (fp->prach_emtc_config_common.prach_ConfigInfo.prach_starting_subframe_periodicity[3] >= fp->prach_emtc_config_common.prach_ConfigInfo.prach_numRepetitionPerPreambleAttempt[3], + "prach_starting_subframe_periodicity[3] < prach_numPetitionPerPreambleAttempt[3]\n"); - fp->prach_emtc_config_common.prach_ConfigInfo.prach_ConfigIndex[3] = cfg->emtc_config.prach_ce_level_3_configuration_index.value; - fp->prach_emtc_config_common.prach_ConfigInfo.prach_FreqOffset[3] = cfg->emtc_config.prach_ce_level_3_frequency_offset.value; - fp->prach_emtc_config_common.prach_ConfigInfo.prach_hopping_enable[3] = cfg->emtc_config.prach_ce_level_3_hopping_enable.value; - fp->prach_emtc_config_common.prach_ConfigInfo.prach_hopping_offset[3] = cfg->emtc_config.prach_ce_level_3_hopping_offset.value; + fp->prach_emtc_config_common.prach_ConfigInfo.prach_ConfigIndex[3] = cfg->emtc_config.prach_ce_level_3_configuration_index.value; + fp->prach_emtc_config_common.prach_ConfigInfo.prach_FreqOffset[3] = cfg->emtc_config.prach_ce_level_3_frequency_offset.value; + fp->prach_emtc_config_common.prach_ConfigInfo.prach_hopping_enable[3] = cfg->emtc_config.prach_ce_level_3_hopping_enable.value; + fp->prach_emtc_config_common.prach_ConfigInfo.prach_hopping_offset[3] = cfg->emtc_config.prach_ce_level_3_hopping_offset.value; if (fp->prach_emtc_config_common.prach_ConfigInfo.prach_CElevel_enable[3] == 1) - compute_prach_seq(fp->prach_emtc_config_common.rootSequenceIndex, - fp->prach_emtc_config_common.prach_ConfigInfo.prach_ConfigIndex[3], - fp->prach_emtc_config_common.prach_ConfigInfo.zeroCorrelationZoneConfig, - fp->prach_emtc_config_common.prach_ConfigInfo.highSpeedFlag, - fp->frame_type, - RC.eNB[Mod_id][CC_id]->X_u_br[3]); + compute_prach_seq (fp->prach_emtc_config_common.rootSequenceIndex, + fp->prach_emtc_config_common.prach_ConfigInfo.prach_ConfigIndex[3], + fp->prach_emtc_config_common.prach_ConfigInfo.zeroCorrelationZoneConfig, + fp->prach_emtc_config_common.prach_ConfigInfo.highSpeedFlag, fp->frame_type, RC.eNB[Mod_id][CC_id]->X_u_br[3]); // CE Level 2 parameters - fp->prach_emtc_config_common.prach_ConfigInfo.prach_CElevel_enable[2] = cfg->emtc_config.prach_ce_level_2_enable.value; - fp->prach_emtc_config_common.prach_ConfigInfo.prach_starting_subframe_periodicity[2] = cfg->emtc_config.prach_ce_level_2_starting_subframe_periodicity.value; + fp->prach_emtc_config_common.prach_ConfigInfo.prach_CElevel_enable[2] = cfg->emtc_config.prach_ce_level_2_enable.value; + fp->prach_emtc_config_common.prach_ConfigInfo.prach_starting_subframe_periodicity[2] = cfg->emtc_config.prach_ce_level_2_starting_subframe_periodicity.value; fp->prach_emtc_config_common.prach_ConfigInfo.prach_numRepetitionPerPreambleAttempt[2] = cfg->emtc_config.prach_ce_level_2_number_of_repetitions_per_attempt.value; - AssertFatal(fp->prach_emtc_config_common.prach_ConfigInfo.prach_starting_subframe_periodicity[2]>=fp->prach_emtc_config_common.prach_ConfigInfo.prach_numRepetitionPerPreambleAttempt[2], - "prach_starting_subframe_periodicity[2] < prach_numPetitionPerPreambleAttempt[2]\n"); - fp->prach_emtc_config_common.prach_ConfigInfo.prach_ConfigIndex[2] = cfg->emtc_config.prach_ce_level_2_configuration_index.value; - fp->prach_emtc_config_common.prach_ConfigInfo.prach_FreqOffset[2] = cfg->emtc_config.prach_ce_level_2_frequency_offset.value; - fp->prach_emtc_config_common.prach_ConfigInfo.prach_hopping_enable[2] = cfg->emtc_config.prach_ce_level_2_hopping_enable.value; - fp->prach_emtc_config_common.prach_ConfigInfo.prach_hopping_offset[2] = cfg->emtc_config.prach_ce_level_2_hopping_offset.value; + AssertFatal (fp->prach_emtc_config_common.prach_ConfigInfo.prach_starting_subframe_periodicity[2] >= fp->prach_emtc_config_common.prach_ConfigInfo.prach_numRepetitionPerPreambleAttempt[2], + "prach_starting_subframe_periodicity[2] < prach_numPetitionPerPreambleAttempt[2]\n"); + fp->prach_emtc_config_common.prach_ConfigInfo.prach_ConfigIndex[2] = cfg->emtc_config.prach_ce_level_2_configuration_index.value; + fp->prach_emtc_config_common.prach_ConfigInfo.prach_FreqOffset[2] = cfg->emtc_config.prach_ce_level_2_frequency_offset.value; + fp->prach_emtc_config_common.prach_ConfigInfo.prach_hopping_enable[2] = cfg->emtc_config.prach_ce_level_2_hopping_enable.value; + fp->prach_emtc_config_common.prach_ConfigInfo.prach_hopping_offset[2] = cfg->emtc_config.prach_ce_level_2_hopping_offset.value; if (fp->prach_emtc_config_common.prach_ConfigInfo.prach_CElevel_enable[2] == 1) - compute_prach_seq(fp->prach_emtc_config_common.rootSequenceIndex, - fp->prach_emtc_config_common.prach_ConfigInfo.prach_ConfigIndex[3], - fp->prach_emtc_config_common.prach_ConfigInfo.zeroCorrelationZoneConfig, - fp->prach_emtc_config_common.prach_ConfigInfo.highSpeedFlag, - fp->frame_type, - RC.eNB[Mod_id][CC_id]->X_u_br[2]); + compute_prach_seq (fp->prach_emtc_config_common.rootSequenceIndex, + fp->prach_emtc_config_common.prach_ConfigInfo.prach_ConfigIndex[3], + fp->prach_emtc_config_common.prach_ConfigInfo.zeroCorrelationZoneConfig, + fp->prach_emtc_config_common.prach_ConfigInfo.highSpeedFlag, fp->frame_type, RC.eNB[Mod_id][CC_id]->X_u_br[2]); // CE Level 1 parameters - fp->prach_emtc_config_common.prach_ConfigInfo.prach_CElevel_enable[1] = cfg->emtc_config.prach_ce_level_1_enable.value; - fp->prach_emtc_config_common.prach_ConfigInfo.prach_starting_subframe_periodicity[1] = cfg->emtc_config.prach_ce_level_1_starting_subframe_periodicity.value; + fp->prach_emtc_config_common.prach_ConfigInfo.prach_CElevel_enable[1] = cfg->emtc_config.prach_ce_level_1_enable.value; + fp->prach_emtc_config_common.prach_ConfigInfo.prach_starting_subframe_periodicity[1] = cfg->emtc_config.prach_ce_level_1_starting_subframe_periodicity.value; fp->prach_emtc_config_common.prach_ConfigInfo.prach_numRepetitionPerPreambleAttempt[1] = cfg->emtc_config.prach_ce_level_1_number_of_repetitions_per_attempt.value; - AssertFatal(fp->prach_emtc_config_common.prach_ConfigInfo.prach_starting_subframe_periodicity[1]>=fp->prach_emtc_config_common.prach_ConfigInfo.prach_numRepetitionPerPreambleAttempt[1], - "prach_starting_subframe_periodicity[1] < prach_numPetitionPerPreambleAttempt[1]\n"); + AssertFatal (fp->prach_emtc_config_common.prach_ConfigInfo.prach_starting_subframe_periodicity[1] >= fp->prach_emtc_config_common.prach_ConfigInfo.prach_numRepetitionPerPreambleAttempt[1], + "prach_starting_subframe_periodicity[1] < prach_numPetitionPerPreambleAttempt[1]\n"); - fp->prach_emtc_config_common.prach_ConfigInfo.prach_ConfigIndex[1] = cfg->emtc_config.prach_ce_level_1_configuration_index.value; - fp->prach_emtc_config_common.prach_ConfigInfo.prach_FreqOffset[1] = cfg->emtc_config.prach_ce_level_1_frequency_offset.value; - fp->prach_emtc_config_common.prach_ConfigInfo.prach_hopping_enable[1] = cfg->emtc_config.prach_ce_level_1_hopping_enable.value; - fp->prach_emtc_config_common.prach_ConfigInfo.prach_hopping_offset[1] = cfg->emtc_config.prach_ce_level_1_hopping_offset.value; + fp->prach_emtc_config_common.prach_ConfigInfo.prach_ConfigIndex[1] = cfg->emtc_config.prach_ce_level_1_configuration_index.value; + fp->prach_emtc_config_common.prach_ConfigInfo.prach_FreqOffset[1] = cfg->emtc_config.prach_ce_level_1_frequency_offset.value; + fp->prach_emtc_config_common.prach_ConfigInfo.prach_hopping_enable[1] = cfg->emtc_config.prach_ce_level_1_hopping_enable.value; + fp->prach_emtc_config_common.prach_ConfigInfo.prach_hopping_offset[1] = cfg->emtc_config.prach_ce_level_1_hopping_offset.value; if (fp->prach_emtc_config_common.prach_ConfigInfo.prach_CElevel_enable[1] == 1) - compute_prach_seq(fp->prach_emtc_config_common.rootSequenceIndex, - fp->prach_emtc_config_common.prach_ConfigInfo.prach_ConfigIndex[3], - fp->prach_emtc_config_common.prach_ConfigInfo.zeroCorrelationZoneConfig, - fp->prach_emtc_config_common.prach_ConfigInfo.highSpeedFlag, - fp->frame_type, - RC.eNB[Mod_id][CC_id]->X_u_br[1]); - - // CE Level 0 parameters - fp->prach_emtc_config_common.prach_ConfigInfo.prach_CElevel_enable[0] = cfg->emtc_config.prach_ce_level_0_enable.value; - fp->prach_emtc_config_common.prach_ConfigInfo.prach_starting_subframe_periodicity[0] = cfg->emtc_config.prach_ce_level_0_starting_subframe_periodicity.value; - fp->prach_emtc_config_common.prach_ConfigInfo.prach_numRepetitionPerPreambleAttempt[0] = cfg->emtc_config.prach_ce_level_0_number_of_repetitions_per_attempt.value; - AssertFatal(fp->prach_emtc_config_common.prach_ConfigInfo.prach_starting_subframe_periodicity[0]>=fp->prach_emtc_config_common.prach_ConfigInfo.prach_numRepetitionPerPreambleAttempt[0], - "prach_starting_subframe_periodicity[0] %d < prach_numPetitionPerPreambleAttempt[0] %d\n", - fp->prach_emtc_config_common.prach_ConfigInfo.prach_starting_subframe_periodicity[0], - fp->prach_emtc_config_common.prach_ConfigInfo.prach_numRepetitionPerPreambleAttempt[0]); - AssertFatal(fp->prach_emtc_config_common.prach_ConfigInfo.prach_numRepetitionPerPreambleAttempt[0] > 0, - "prach_emtc_config_common.prach_ConfigInfo.prach_numRepetitionPerPreambleAttempt[0]==0\n"); - fp->prach_emtc_config_common.prach_ConfigInfo.prach_ConfigIndex[0] = cfg->emtc_config.prach_ce_level_0_configuration_index.value; - fp->prach_emtc_config_common.prach_ConfigInfo.prach_FreqOffset[0] = cfg->emtc_config.prach_ce_level_0_frequency_offset.value; - fp->prach_emtc_config_common.prach_ConfigInfo.prach_hopping_enable[0] = cfg->emtc_config.prach_ce_level_0_hopping_enable.value; - fp->prach_emtc_config_common.prach_ConfigInfo.prach_hopping_offset[0] = cfg->emtc_config.prach_ce_level_0_hopping_offset.value; - if (fp->prach_emtc_config_common.prach_ConfigInfo.prach_CElevel_enable[0] == 1) - compute_prach_seq(fp->prach_emtc_config_common.rootSequenceIndex, - fp->prach_emtc_config_common.prach_ConfigInfo.prach_ConfigIndex[3], - fp->prach_emtc_config_common.prach_ConfigInfo.zeroCorrelationZoneConfig, - fp->prach_emtc_config_common.prach_ConfigInfo.highSpeedFlag, - fp->frame_type, - RC.eNB[Mod_id][CC_id]->X_u_br[0]); - } + compute_prach_seq (fp->prach_emtc_config_common.rootSequenceIndex, + fp->prach_emtc_config_common.prach_ConfigInfo.prach_ConfigIndex[3], + fp->prach_emtc_config_common.prach_ConfigInfo.zeroCorrelationZoneConfig, + fp->prach_emtc_config_common.prach_ConfigInfo.highSpeedFlag, fp->frame_type, RC.eNB[Mod_id][CC_id]->X_u_br[1]); + // CE Level 0 parameters + fp->prach_emtc_config_common.prach_ConfigInfo.prach_CElevel_enable[0] = cfg->emtc_config.prach_ce_level_0_enable.value; + fp->prach_emtc_config_common.prach_ConfigInfo.prach_starting_subframe_periodicity[0] = cfg->emtc_config.prach_ce_level_0_starting_subframe_periodicity.value; + fp->prach_emtc_config_common.prach_ConfigInfo.prach_numRepetitionPerPreambleAttempt[0] = cfg->emtc_config.prach_ce_level_0_number_of_repetitions_per_attempt.value; + AssertFatal (fp->prach_emtc_config_common.prach_ConfigInfo.prach_starting_subframe_periodicity[0] >= fp->prach_emtc_config_common.prach_ConfigInfo.prach_numRepetitionPerPreambleAttempt[0], + "prach_starting_subframe_periodicity[0] %d < prach_numPetitionPerPreambleAttempt[0] %d\n", + fp->prach_emtc_config_common.prach_ConfigInfo.prach_starting_subframe_periodicity[0], fp->prach_emtc_config_common.prach_ConfigInfo.prach_numRepetitionPerPreambleAttempt[0]); + AssertFatal (fp->prach_emtc_config_common.prach_ConfigInfo.prach_numRepetitionPerPreambleAttempt[0] > 0, "prach_emtc_config_common.prach_ConfigInfo.prach_numRepetitionPerPreambleAttempt[0]==0\n"); + fp->prach_emtc_config_common.prach_ConfigInfo.prach_ConfigIndex[0] = cfg->emtc_config.prach_ce_level_0_configuration_index.value; + fp->prach_emtc_config_common.prach_ConfigInfo.prach_FreqOffset[0] = cfg->emtc_config.prach_ce_level_0_frequency_offset.value; + fp->prach_emtc_config_common.prach_ConfigInfo.prach_hopping_enable[0] = cfg->emtc_config.prach_ce_level_0_hopping_enable.value; + fp->prach_emtc_config_common.prach_ConfigInfo.prach_hopping_offset[0] = cfg->emtc_config.prach_ce_level_0_hopping_offset.value; + if (fp->prach_emtc_config_common.prach_ConfigInfo.prach_CElevel_enable[0] == 1) { + compute_prach_seq (fp->prach_emtc_config_common.rootSequenceIndex, + fp->prach_emtc_config_common.prach_ConfigInfo.prach_ConfigIndex[3], + fp->prach_emtc_config_common.prach_ConfigInfo.zeroCorrelationZoneConfig, + fp->prach_emtc_config_common.prach_ConfigInfo.highSpeedFlag, fp->frame_type, RC.eNB[Mod_id][CC_id]->X_u_br[0]); + init_mpdcch5tab_normal_regular_subframe_evenNRBDL (RC.eNB[Mod_id][CC_id],3); + } + } #endif - fp->pucch_config_common.deltaPUCCH_Shift = 1+cfg->pucch_config.delta_pucch_shift.value; - fp->pucch_config_common.nRB_CQI = cfg->pucch_config.n_cqi_rb.value; - fp->pucch_config_common.nCS_AN = cfg->pucch_config.n_an_cs.value; - fp->pucch_config_common.n1PUCCH_AN = cfg->pucch_config.n1_pucch_an.value; + fp->pucch_config_common.deltaPUCCH_Shift = 1 + cfg->pucch_config.delta_pucch_shift.value; + fp->pucch_config_common.nRB_CQI = cfg->pucch_config.n_cqi_rb.value; + fp->pucch_config_common.nCS_AN = cfg->pucch_config.n_an_cs.value; + fp->pucch_config_common.n1PUCCH_AN = cfg->pucch_config.n1_pucch_an.value; - fp->pdsch_config_common.referenceSignalPower = cfg->rf_config.reference_signal_power.value; - fp->pdsch_config_common.p_b = cfg->subframe_config.pb.value; + fp->pdsch_config_common.referenceSignalPower = cfg->rf_config.reference_signal_power.value; + fp->pdsch_config_common.p_b = cfg->subframe_config.pb.value; - fp->pusch_config_common.n_SB = cfg->pusch_config.number_of_subbands.value; - LOG_I(PHY,"pusch_config_common.n_SB = %d\n",fp->pusch_config_common.n_SB ); + fp->pusch_config_common.n_SB = cfg->pusch_config.number_of_subbands.value; + LOG_I (PHY, "pusch_config_common.n_SB = %d\n", fp->pusch_config_common.n_SB); - fp->pusch_config_common.hoppingMode = cfg->pusch_config.hopping_mode.value; - LOG_I(PHY,"pusch_config_common.hoppingMode = %d\n",fp->pusch_config_common.hoppingMode); + fp->pusch_config_common.hoppingMode = cfg->pusch_config.hopping_mode.value; + LOG_I (PHY, "pusch_config_common.hoppingMode = %d\n", fp->pusch_config_common.hoppingMode); - fp->pusch_config_common.pusch_HoppingOffset = cfg->pusch_config.hopping_offset.value; - LOG_I(PHY,"pusch_config_common.pusch_HoppingOffset = %d\n",fp->pusch_config_common.pusch_HoppingOffset); + fp->pusch_config_common.pusch_HoppingOffset = cfg->pusch_config.hopping_offset.value; + LOG_I (PHY, "pusch_config_common.pusch_HoppingOffset = %d\n", fp->pusch_config_common.pusch_HoppingOffset); - fp->pusch_config_common.enable64QAM = 0;//radioResourceConfigCommon->pusch_ConfigCommon.pusch_ConfigBasic.enable64QAM; - LOG_I(PHY,"pusch_config_common.enable64QAM = %d\n",fp->pusch_config_common.enable64QAM ); - fp->pusch_config_common.ul_ReferenceSignalsPUSCH.groupHoppingEnabled = 0; - fp->pusch_config_common.ul_ReferenceSignalsPUSCH.sequenceHoppingEnabled = 0; - if (cfg->uplink_reference_signal_config.uplink_rs_hopping.value == 1) + fp->pusch_config_common.enable64QAM = 0; //radioResourceConfigCommon->pusch_ConfigCommon.pusch_ConfigBasic.enable64QAM; + LOG_I (PHY, "pusch_config_common.enable64QAM = %d\n", fp->pusch_config_common.enable64QAM); + fp->pusch_config_common.ul_ReferenceSignalsPUSCH.groupHoppingEnabled = 0; + fp->pusch_config_common.ul_ReferenceSignalsPUSCH.sequenceHoppingEnabled = 0; + if (cfg->uplink_reference_signal_config.uplink_rs_hopping.value == 1) fp->pusch_config_common.ul_ReferenceSignalsPUSCH.groupHoppingEnabled = 1; - if (cfg->uplink_reference_signal_config.uplink_rs_hopping.value == 2) + if (cfg->uplink_reference_signal_config.uplink_rs_hopping.value == 2) fp->pusch_config_common.ul_ReferenceSignalsPUSCH.sequenceHoppingEnabled = 1; - LOG_I(PHY,"pusch_config_common.ul_ReferenceSignalsPUSCH.groupHoppingEnabled = %d\n",fp->pusch_config_common.ul_ReferenceSignalsPUSCH.groupHoppingEnabled); - fp->pusch_config_common.ul_ReferenceSignalsPUSCH.groupAssignmentPUSCH = cfg->uplink_reference_signal_config.group_assignment.value; - LOG_I(PHY,"pusch_config_common.ul_ReferenceSignalsPUSCH.groupAssignmentPUSCH = %d\n",fp->pusch_config_common.ul_ReferenceSignalsPUSCH.groupAssignmentPUSCH); + LOG_I (PHY, "pusch_config_common.ul_ReferenceSignalsPUSCH.groupHoppingEnabled = %d\n", fp->pusch_config_common.ul_ReferenceSignalsPUSCH.groupHoppingEnabled); + fp->pusch_config_common.ul_ReferenceSignalsPUSCH.groupAssignmentPUSCH = cfg->uplink_reference_signal_config.group_assignment.value; + LOG_I (PHY, "pusch_config_common.ul_ReferenceSignalsPUSCH.groupAssignmentPUSCH = %d\n", fp->pusch_config_common.ul_ReferenceSignalsPUSCH.groupAssignmentPUSCH); - LOG_I(PHY,"pusch_config_common.ul_ReferenceSignalsPUSCH.sequenceHoppingEnabled = %d\n",fp->pusch_config_common.ul_ReferenceSignalsPUSCH.sequenceHoppingEnabled); + LOG_I (PHY, "pusch_config_common.ul_ReferenceSignalsPUSCH.sequenceHoppingEnabled = %d\n", fp->pusch_config_common.ul_ReferenceSignalsPUSCH.sequenceHoppingEnabled); - fp->pusch_config_common.ul_ReferenceSignalsPUSCH.cyclicShift = dmrs1_tab[cfg->uplink_reference_signal_config.cyclic_shift_1_for_drms.value]; - LOG_I(PHY,"pusch_config_common.ul_ReferenceSignalsPUSCH.cyclicShift = %d\n",fp->pusch_config_common.ul_ReferenceSignalsPUSCH.cyclicShift); + fp->pusch_config_common.ul_ReferenceSignalsPUSCH.cyclicShift = dmrs1_tab[cfg->uplink_reference_signal_config.cyclic_shift_1_for_drms.value]; + LOG_I (PHY, "pusch_config_common.ul_ReferenceSignalsPUSCH.cyclicShift = %d\n", fp->pusch_config_common.ul_ReferenceSignalsPUSCH.cyclicShift); - init_ul_hopping(fp); + init_ul_hopping (fp); - fp->soundingrs_ul_config_common.enabled_flag = 0;// 1; Don't know how to turn this off in NFAPI - fp->soundingrs_ul_config_common.srs_BandwidthConfig = cfg->srs_config.bandwidth_configuration.value; - fp->soundingrs_ul_config_common.srs_SubframeConfig = cfg->srs_config.srs_subframe_configuration.value; + fp->soundingrs_ul_config_common.enabled_flag = 0; // 1; Don't know how to turn this off in NFAPI + fp->soundingrs_ul_config_common.srs_BandwidthConfig = cfg->srs_config.bandwidth_configuration.value; + fp->soundingrs_ul_config_common.srs_SubframeConfig = cfg->srs_config.srs_subframe_configuration.value; fp->soundingrs_ul_config_common.ackNackSRS_SimultaneousTransmission = cfg->srs_config.srs_acknack_srs_simultaneous_transmission.value; - fp->soundingrs_ul_config_common.srs_MaxUpPts = cfg->srs_config.max_up_pts.value; + fp->soundingrs_ul_config_common.srs_MaxUpPts = cfg->srs_config.max_up_pts.value; fp->num_MBSFN_config = 0; - init_ncs_cell(fp,RC.eNB[Mod_id][CC_id]->ncs_cell); + init_ncs_cell (fp, RC.eNB[Mod_id][CC_id]->ncs_cell); - init_ul_hopping(fp); - RC.eNB[Mod_id][CC_id]->configured = 1; - LOG_I(PHY,"eNB %d/%d configured\n",Mod_id,CC_id); + init_ul_hopping (fp); + RC.eNB[Mod_id][CC_id]->configured = 1; + LOG_I (PHY, "eNB %d/%d configured\n", Mod_id, CC_id); } -void phy_config_sib1_ue(uint8_t Mod_id,int CC_id, - uint8_t eNB_id, - TDD_Config_t *tdd_Config, - uint8_t SIwindowsize, - uint16_t SIperiod) +void +phy_config_sib1_ue (uint8_t Mod_id, int CC_id, uint8_t eNB_id, TDD_Config_t * tdd_Config, uint8_t SIwindowsize, uint16_t SIperiod) { LTE_DL_FRAME_PARMS *fp = &PHY_vars_UE_g[Mod_id][CC_id]->frame_parms; if (tdd_Config) { - fp->tdd_config = tdd_Config->subframeAssignment; - fp->tdd_config_S = tdd_Config->specialSubframePatterns; + fp->tdd_config = tdd_Config->subframeAssignment; + fp->tdd_config_S = tdd_Config->specialSubframePatterns; } - fp->SIwindowsize = SIwindowsize; - fp->SIPeriod = SIperiod; + fp->SIwindowsize = SIwindowsize; + fp->SIPeriod = SIperiod; } /* @@ -459,192 +446,186 @@ void phy_config_sib1_ue(uint8_t Mod_id,int CC_id, } */ -void phy_config_sib2_ue(uint8_t Mod_id,int CC_id, - uint8_t eNB_id, - RadioResourceConfigCommonSIB_t *radioResourceConfigCommon, - ARFCN_ValueEUTRA_t *ul_CarrierFreq, - long *ul_Bandwidth, - AdditionalSpectrumEmission_t *additionalSpectrumEmission, - struct MBSFN_SubframeConfigList *mbsfn_SubframeConfigList) +void +phy_config_sib2_ue (uint8_t Mod_id, int CC_id, + uint8_t eNB_id, + RadioResourceConfigCommonSIB_t * radioResourceConfigCommon, + ARFCN_ValueEUTRA_t * ul_CarrierFreq, long *ul_Bandwidth, AdditionalSpectrumEmission_t * additionalSpectrumEmission, struct MBSFN_SubframeConfigList *mbsfn_SubframeConfigList) { - PHY_VARS_UE *ue = PHY_vars_UE_g[Mod_id][CC_id]; + PHY_VARS_UE *ue = PHY_vars_UE_g[Mod_id][CC_id]; LTE_DL_FRAME_PARMS *fp = &ue->frame_parms; - int i; + int i; - VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_UE_CONFIG_SIB2, VCD_FUNCTION_IN); + VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME (VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_UE_CONFIG_SIB2, VCD_FUNCTION_IN); - LOG_I(PHY,"[UE%d] Applying radioResourceConfigCommon from eNB%d\n",Mod_id,eNB_id); + LOG_I (PHY, "[UE%d] Applying radioResourceConfigCommon from eNB%d\n", Mod_id, eNB_id); - fp->prach_config_common.rootSequenceIndex =radioResourceConfigCommon->prach_Config.rootSequenceIndex; + fp->prach_config_common.rootSequenceIndex = radioResourceConfigCommon->prach_Config.rootSequenceIndex; - fp->prach_config_common.prach_Config_enabled=1; - fp->prach_config_common.prach_ConfigInfo.prach_ConfigIndex =radioResourceConfigCommon->prach_Config.prach_ConfigInfo.prach_ConfigIndex; - fp->prach_config_common.prach_ConfigInfo.highSpeedFlag =radioResourceConfigCommon->prach_Config.prach_ConfigInfo.highSpeedFlag; - fp->prach_config_common.prach_ConfigInfo.zeroCorrelationZoneConfig =radioResourceConfigCommon->prach_Config.prach_ConfigInfo.zeroCorrelationZoneConfig; - fp->prach_config_common.prach_ConfigInfo.prach_FreqOffset =radioResourceConfigCommon->prach_Config.prach_ConfigInfo.prach_FreqOffset; + fp->prach_config_common.prach_Config_enabled = 1; + fp->prach_config_common.prach_ConfigInfo.prach_ConfigIndex = radioResourceConfigCommon->prach_Config.prach_ConfigInfo.prach_ConfigIndex; + fp->prach_config_common.prach_ConfigInfo.highSpeedFlag = radioResourceConfigCommon->prach_Config.prach_ConfigInfo.highSpeedFlag; + fp->prach_config_common.prach_ConfigInfo.zeroCorrelationZoneConfig = radioResourceConfigCommon->prach_Config.prach_ConfigInfo.zeroCorrelationZoneConfig; + fp->prach_config_common.prach_ConfigInfo.prach_FreqOffset = radioResourceConfigCommon->prach_Config.prach_ConfigInfo.prach_FreqOffset; - compute_prach_seq(fp->prach_config_common.rootSequenceIndex, - fp->prach_config_common.prach_ConfigInfo.prach_ConfigIndex, - fp->prach_config_common.prach_ConfigInfo.zeroCorrelationZoneConfig, - fp->prach_config_common.prach_ConfigInfo.highSpeedFlag, - fp->frame_type,ue->X_u); + compute_prach_seq (fp->prach_config_common.rootSequenceIndex, + fp->prach_config_common.prach_ConfigInfo.prach_ConfigIndex, + fp->prach_config_common.prach_ConfigInfo.zeroCorrelationZoneConfig, fp->prach_config_common.prach_ConfigInfo.highSpeedFlag, fp->frame_type, ue->X_u); - fp->pucch_config_common.deltaPUCCH_Shift = 1+radioResourceConfigCommon->pucch_ConfigCommon.deltaPUCCH_Shift; - fp->pucch_config_common.nRB_CQI = radioResourceConfigCommon->pucch_ConfigCommon.nRB_CQI; - fp->pucch_config_common.nCS_AN = radioResourceConfigCommon->pucch_ConfigCommon.nCS_AN; - fp->pucch_config_common.n1PUCCH_AN = radioResourceConfigCommon->pucch_ConfigCommon.n1PUCCH_AN; + fp->pucch_config_common.deltaPUCCH_Shift = 1 + radioResourceConfigCommon->pucch_ConfigCommon.deltaPUCCH_Shift; + fp->pucch_config_common.nRB_CQI = radioResourceConfigCommon->pucch_ConfigCommon.nRB_CQI; + fp->pucch_config_common.nCS_AN = radioResourceConfigCommon->pucch_ConfigCommon.nCS_AN; + fp->pucch_config_common.n1PUCCH_AN = radioResourceConfigCommon->pucch_ConfigCommon.n1PUCCH_AN; fp->pdsch_config_common.referenceSignalPower = radioResourceConfigCommon->pdsch_ConfigCommon.referenceSignalPower; - fp->pdsch_config_common.p_b = radioResourceConfigCommon->pdsch_ConfigCommon.p_b; + fp->pdsch_config_common.p_b = radioResourceConfigCommon->pdsch_ConfigCommon.p_b; - fp->pusch_config_common.n_SB = radioResourceConfigCommon->pusch_ConfigCommon.pusch_ConfigBasic.n_SB; - fp->pusch_config_common.hoppingMode = radioResourceConfigCommon->pusch_ConfigCommon.pusch_ConfigBasic.hoppingMode; - fp->pusch_config_common.pusch_HoppingOffset = radioResourceConfigCommon->pusch_ConfigCommon.pusch_ConfigBasic.pusch_HoppingOffset; - fp->pusch_config_common.enable64QAM = radioResourceConfigCommon->pusch_ConfigCommon.pusch_ConfigBasic.enable64QAM; - fp->pusch_config_common.ul_ReferenceSignalsPUSCH.groupHoppingEnabled = radioResourceConfigCommon->pusch_ConfigCommon.ul_ReferenceSignalsPUSCH.groupHoppingEnabled; - fp->pusch_config_common.ul_ReferenceSignalsPUSCH.groupAssignmentPUSCH = radioResourceConfigCommon->pusch_ConfigCommon.ul_ReferenceSignalsPUSCH.groupAssignmentPUSCH; + fp->pusch_config_common.n_SB = radioResourceConfigCommon->pusch_ConfigCommon.pusch_ConfigBasic.n_SB; + fp->pusch_config_common.hoppingMode = radioResourceConfigCommon->pusch_ConfigCommon.pusch_ConfigBasic.hoppingMode; + fp->pusch_config_common.pusch_HoppingOffset = radioResourceConfigCommon->pusch_ConfigCommon.pusch_ConfigBasic.pusch_HoppingOffset; + fp->pusch_config_common.enable64QAM = radioResourceConfigCommon->pusch_ConfigCommon.pusch_ConfigBasic.enable64QAM; + fp->pusch_config_common.ul_ReferenceSignalsPUSCH.groupHoppingEnabled = radioResourceConfigCommon->pusch_ConfigCommon.ul_ReferenceSignalsPUSCH.groupHoppingEnabled; + fp->pusch_config_common.ul_ReferenceSignalsPUSCH.groupAssignmentPUSCH = radioResourceConfigCommon->pusch_ConfigCommon.ul_ReferenceSignalsPUSCH.groupAssignmentPUSCH; fp->pusch_config_common.ul_ReferenceSignalsPUSCH.sequenceHoppingEnabled = radioResourceConfigCommon->pusch_ConfigCommon.ul_ReferenceSignalsPUSCH.sequenceHoppingEnabled; - fp->pusch_config_common.ul_ReferenceSignalsPUSCH.cyclicShift = dmrs1_tab[radioResourceConfigCommon->pusch_ConfigCommon.ul_ReferenceSignalsPUSCH.cyclicShift]; + fp->pusch_config_common.ul_ReferenceSignalsPUSCH.cyclicShift = dmrs1_tab[radioResourceConfigCommon->pusch_ConfigCommon.ul_ReferenceSignalsPUSCH.cyclicShift]; - init_ul_hopping(fp); - fp->soundingrs_ul_config_common.enabled_flag = 0; + init_ul_hopping (fp); + fp->soundingrs_ul_config_common.enabled_flag = 0; - if (radioResourceConfigCommon->soundingRS_UL_ConfigCommon.present==SoundingRS_UL_ConfigCommon_PR_setup) { - fp->soundingrs_ul_config_common.enabled_flag = 1; - fp->soundingrs_ul_config_common.srs_BandwidthConfig = radioResourceConfigCommon->soundingRS_UL_ConfigCommon.choice.setup.srs_BandwidthConfig; - fp->soundingrs_ul_config_common.srs_SubframeConfig = radioResourceConfigCommon->soundingRS_UL_ConfigCommon.choice.setup.srs_SubframeConfig; + if (radioResourceConfigCommon->soundingRS_UL_ConfigCommon.present == SoundingRS_UL_ConfigCommon_PR_setup) { + fp->soundingrs_ul_config_common.enabled_flag = 1; + fp->soundingrs_ul_config_common.srs_BandwidthConfig = radioResourceConfigCommon->soundingRS_UL_ConfigCommon.choice.setup.srs_BandwidthConfig; + fp->soundingrs_ul_config_common.srs_SubframeConfig = radioResourceConfigCommon->soundingRS_UL_ConfigCommon.choice.setup.srs_SubframeConfig; fp->soundingrs_ul_config_common.ackNackSRS_SimultaneousTransmission = radioResourceConfigCommon->soundingRS_UL_ConfigCommon.choice.setup.ackNackSRS_SimultaneousTransmission; if (radioResourceConfigCommon->soundingRS_UL_ConfigCommon.choice.setup.srs_MaxUpPts) - fp->soundingrs_ul_config_common.srs_MaxUpPts = 1; + fp->soundingrs_ul_config_common.srs_MaxUpPts = 1; else - fp->soundingrs_ul_config_common.srs_MaxUpPts = 0; + fp->soundingrs_ul_config_common.srs_MaxUpPts = 0; } - fp->ul_power_control_config_common.p0_NominalPUSCH = radioResourceConfigCommon->uplinkPowerControlCommon.p0_NominalPUSCH; - fp->ul_power_control_config_common.alpha = radioResourceConfigCommon->uplinkPowerControlCommon.alpha; - fp->ul_power_control_config_common.p0_NominalPUCCH = radioResourceConfigCommon->uplinkPowerControlCommon.p0_NominalPUCCH; + fp->ul_power_control_config_common.p0_NominalPUSCH = radioResourceConfigCommon->uplinkPowerControlCommon.p0_NominalPUSCH; + fp->ul_power_control_config_common.alpha = radioResourceConfigCommon->uplinkPowerControlCommon.alpha; + fp->ul_power_control_config_common.p0_NominalPUCCH = radioResourceConfigCommon->uplinkPowerControlCommon.p0_NominalPUCCH; fp->ul_power_control_config_common.deltaPreambleMsg3 = radioResourceConfigCommon->uplinkPowerControlCommon.deltaPreambleMsg3; - fp->ul_power_control_config_common.deltaF_PUCCH_Format1 = radioResourceConfigCommon->uplinkPowerControlCommon.deltaFList_PUCCH.deltaF_PUCCH_Format1; - fp->ul_power_control_config_common.deltaF_PUCCH_Format1b = radioResourceConfigCommon->uplinkPowerControlCommon.deltaFList_PUCCH.deltaF_PUCCH_Format1b; - fp->ul_power_control_config_common.deltaF_PUCCH_Format2 = radioResourceConfigCommon->uplinkPowerControlCommon.deltaFList_PUCCH.deltaF_PUCCH_Format2; - fp->ul_power_control_config_common.deltaF_PUCCH_Format2a = radioResourceConfigCommon->uplinkPowerControlCommon.deltaFList_PUCCH.deltaF_PUCCH_Format2a; - fp->ul_power_control_config_common.deltaF_PUCCH_Format2b = radioResourceConfigCommon->uplinkPowerControlCommon.deltaFList_PUCCH.deltaF_PUCCH_Format2b; + fp->ul_power_control_config_common.deltaF_PUCCH_Format1 = radioResourceConfigCommon->uplinkPowerControlCommon.deltaFList_PUCCH.deltaF_PUCCH_Format1; + fp->ul_power_control_config_common.deltaF_PUCCH_Format1b = radioResourceConfigCommon->uplinkPowerControlCommon.deltaFList_PUCCH.deltaF_PUCCH_Format1b; + fp->ul_power_control_config_common.deltaF_PUCCH_Format2 = radioResourceConfigCommon->uplinkPowerControlCommon.deltaFList_PUCCH.deltaF_PUCCH_Format2; + fp->ul_power_control_config_common.deltaF_PUCCH_Format2a = radioResourceConfigCommon->uplinkPowerControlCommon.deltaFList_PUCCH.deltaF_PUCCH_Format2a; + fp->ul_power_control_config_common.deltaF_PUCCH_Format2b = radioResourceConfigCommon->uplinkPowerControlCommon.deltaFList_PUCCH.deltaF_PUCCH_Format2b; fp->maxHARQ_Msg3Tx = radioResourceConfigCommon->rach_ConfigCommon.maxHARQ_Msg3Tx; // Now configure some of the Physical Channels // PUCCH - init_ncs_cell(fp,ue->ncs_cell); + init_ncs_cell (fp, ue->ncs_cell); - init_ul_hopping(fp); + init_ul_hopping (fp); // PCH - init_ue_paging_info(ue,radioResourceConfigCommon->pcch_Config.defaultPagingCycle,radioResourceConfigCommon->pcch_Config.nB); + init_ue_paging_info (ue, radioResourceConfigCommon->pcch_Config.defaultPagingCycle, radioResourceConfigCommon->pcch_Config.nB); // MBSFN if (mbsfn_SubframeConfigList != NULL) { fp->num_MBSFN_config = mbsfn_SubframeConfigList->list.count; - for (i=0; ilist.count; i++) { + for (i = 0; i < mbsfn_SubframeConfigList->list.count; i++) { fp->MBSFN_config[i].radioframeAllocationPeriod = mbsfn_SubframeConfigList->list.array[i]->radioframeAllocationPeriod; fp->MBSFN_config[i].radioframeAllocationOffset = mbsfn_SubframeConfigList->list.array[i]->radioframeAllocationOffset; if (mbsfn_SubframeConfigList->list.array[i]->subframeAllocation.present == MBSFN_SubframeConfig__subframeAllocation_PR_oneFrame) { fp->MBSFN_config[i].fourFrames_flag = 0; - fp->MBSFN_config[i].mbsfn_SubframeConfig = mbsfn_SubframeConfigList->list.array[i]->subframeAllocation.choice.oneFrame.buf[0]; // 6-bit subframe configuration - LOG_I(PHY, "[CONFIG] MBSFN_SubframeConfig[%d] pattern is %d\n", i, - fp->MBSFN_config[i].mbsfn_SubframeConfig); - } else if (mbsfn_SubframeConfigList->list.array[i]->subframeAllocation.present == MBSFN_SubframeConfig__subframeAllocation_PR_fourFrames) { // 24-bit subframe configuration + fp->MBSFN_config[i].mbsfn_SubframeConfig = mbsfn_SubframeConfigList->list.array[i]->subframeAllocation.choice.oneFrame.buf[0]; // 6-bit subframe configuration + LOG_I (PHY, "[CONFIG] MBSFN_SubframeConfig[%d] pattern is %d\n", i, fp->MBSFN_config[i].mbsfn_SubframeConfig); + } else if (mbsfn_SubframeConfigList->list.array[i]->subframeAllocation.present == MBSFN_SubframeConfig__subframeAllocation_PR_fourFrames) { // 24-bit subframe configuration fp->MBSFN_config[i].fourFrames_flag = 1; fp->MBSFN_config[i].mbsfn_SubframeConfig = - mbsfn_SubframeConfigList->list.array[i]->subframeAllocation.choice.oneFrame.buf[0]| - (mbsfn_SubframeConfigList->list.array[i]->subframeAllocation.choice.oneFrame.buf[1]<<8)| - (mbsfn_SubframeConfigList->list.array[i]->subframeAllocation.choice.oneFrame.buf[2]<<16); + mbsfn_SubframeConfigList->list.array[i]->subframeAllocation.choice.oneFrame.buf[0] | + (mbsfn_SubframeConfigList->list.array[i]->subframeAllocation.choice.oneFrame.buf[1] << 8) | (mbsfn_SubframeConfigList->list.array[i]->subframeAllocation.choice.oneFrame.buf[2] << 16); - LOG_I(PHY, "[CONFIG] MBSFN_SubframeConfig[%d] pattern is %d\n", i, - fp->MBSFN_config[i].mbsfn_SubframeConfig); + LOG_I (PHY, "[CONFIG] MBSFN_SubframeConfig[%d] pattern is %d\n", i, fp->MBSFN_config[i].mbsfn_SubframeConfig); } } } - VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_UE_CONFIG_SIB2, VCD_FUNCTION_OUT); + VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME (VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_UE_CONFIG_SIB2, VCD_FUNCTION_OUT); } -void phy_config_sib13_ue(uint8_t Mod_id,int CC_id,uint8_t eNB_id,int mbsfn_Area_idx, - long mbsfn_AreaId_r9) +void +phy_config_sib13_ue (uint8_t Mod_id, int CC_id, uint8_t eNB_id, int mbsfn_Area_idx, long mbsfn_AreaId_r9) { LTE_DL_FRAME_PARMS *fp = &PHY_vars_UE_g[Mod_id][CC_id]->frame_parms; - LOG_I(PHY,"[UE%d] Applying MBSFN_Area_id %ld for index %d\n",Mod_id,mbsfn_AreaId_r9,mbsfn_Area_idx); + LOG_I (PHY, "[UE%d] Applying MBSFN_Area_id %ld for index %d\n", Mod_id, mbsfn_AreaId_r9, mbsfn_Area_idx); if (mbsfn_Area_idx == 0) { - fp->Nid_cell_mbsfn = (uint16_t)mbsfn_AreaId_r9; - LOG_N(PHY,"Fix me: only called when mbsfn_Area_idx == 0)\n"); + fp->Nid_cell_mbsfn = (uint16_t) mbsfn_AreaId_r9; + LOG_N (PHY, "Fix me: only called when mbsfn_Area_idx == 0)\n"); } - lte_gold_mbsfn(fp,PHY_vars_UE_g[Mod_id][CC_id]->lte_gold_mbsfn_table,fp->Nid_cell_mbsfn); + lte_gold_mbsfn (fp, PHY_vars_UE_g[Mod_id][CC_id]->lte_gold_mbsfn_table, fp->Nid_cell_mbsfn); } -void phy_config_sib13_eNB(uint8_t Mod_id,int CC_id,int mbsfn_Area_idx, - long mbsfn_AreaId_r9) +void +phy_config_sib13_eNB (uint8_t Mod_id, int CC_id, int mbsfn_Area_idx, long mbsfn_AreaId_r9) { LTE_DL_FRAME_PARMS *fp = &RC.eNB[Mod_id][CC_id]->frame_parms; - LOG_I(PHY,"[eNB%d] Applying MBSFN_Area_id %ld for index %d\n",Mod_id,mbsfn_AreaId_r9,mbsfn_Area_idx); + LOG_I (PHY, "[eNB%d] Applying MBSFN_Area_id %ld for index %d\n", Mod_id, mbsfn_AreaId_r9, mbsfn_Area_idx); if (mbsfn_Area_idx == 0) { - fp->Nid_cell_mbsfn = (uint16_t)mbsfn_AreaId_r9; - LOG_N(PHY,"Fix me: only called when mbsfn_Area_idx == 0)\n"); + fp->Nid_cell_mbsfn = (uint16_t) mbsfn_AreaId_r9; + LOG_N (PHY, "Fix me: only called when mbsfn_Area_idx == 0)\n"); } - lte_gold_mbsfn(fp,RC.eNB[Mod_id][CC_id]->lte_gold_mbsfn_table,fp->Nid_cell_mbsfn); + lte_gold_mbsfn (fp, RC.eNB[Mod_id][CC_id]->lte_gold_mbsfn_table, fp->Nid_cell_mbsfn); } -void phy_config_dedicated_eNB_step2(PHY_VARS_eNB *eNB) +void +phy_config_dedicated_eNB_step2 (PHY_VARS_eNB * eNB) { - uint8_t UE_id; + uint8_t UE_id; struct PhysicalConfigDedicated *physicalConfigDedicated; - LTE_DL_FRAME_PARMS *fp=&eNB->frame_parms; + LTE_DL_FRAME_PARMS *fp = &eNB->frame_parms; - for (UE_id=0; UE_idphysicalConfigDedicated[UE_id]; if (physicalConfigDedicated != NULL) { - LOG_I(PHY,"[eNB %d] Sent physicalConfigDedicated=%p for UE %d\n",eNB->Mod_id,physicalConfigDedicated,UE_id); - LOG_D(PHY,"------------------------------------------------------------------------\n"); + LOG_I (PHY, "[eNB %d] Sent physicalConfigDedicated=%p for UE %d\n", eNB->Mod_id, physicalConfigDedicated, UE_id); + LOG_D (PHY, "------------------------------------------------------------------------\n"); if (physicalConfigDedicated->pdsch_ConfigDedicated) { - eNB->pdsch_config_dedicated[UE_id].p_a=physicalConfigDedicated->pdsch_ConfigDedicated->p_a; - LOG_D(PHY,"pdsch_config_dedicated.p_a %d\n",eNB->pdsch_config_dedicated[UE_id].p_a); - LOG_D(PHY,"\n"); + eNB->pdsch_config_dedicated[UE_id].p_a = physicalConfigDedicated->pdsch_ConfigDedicated->p_a; + LOG_D (PHY, "pdsch_config_dedicated.p_a %d\n", eNB->pdsch_config_dedicated[UE_id].p_a); + LOG_D (PHY, "\n"); } if (physicalConfigDedicated->pucch_ConfigDedicated) { - if (physicalConfigDedicated->pucch_ConfigDedicated->ackNackRepetition.present==PUCCH_ConfigDedicated__ackNackRepetition_PR_release) - eNB->pucch_config_dedicated[UE_id].ackNackRepetition=0; + if (physicalConfigDedicated->pucch_ConfigDedicated->ackNackRepetition.present == PUCCH_ConfigDedicated__ackNackRepetition_PR_release) + eNB->pucch_config_dedicated[UE_id].ackNackRepetition = 0; else { - eNB->pucch_config_dedicated[UE_id].ackNackRepetition=1; + eNB->pucch_config_dedicated[UE_id].ackNackRepetition = 1; } if (fp->frame_type == FDD) { @@ -656,10 +637,10 @@ void phy_config_dedicated_eNB_step2(PHY_VARS_eNB *eNB) eNB->pucch_config_dedicated[UE_id].tdd_AckNackFeedbackMode = bundling; } - if ( eNB->pucch_config_dedicated[UE_id].tdd_AckNackFeedbackMode == multiplexing) - LOG_D(PHY,"pucch_config_dedicated.tdd_AckNackFeedbackMode = multiplexing\n"); + if (eNB->pucch_config_dedicated[UE_id].tdd_AckNackFeedbackMode == multiplexing) + LOG_D (PHY, "pucch_config_dedicated.tdd_AckNackFeedbackMode = multiplexing\n"); else - LOG_D(PHY,"pucch_config_dedicated.tdd_AckNackFeedbackMode = bundling\n"); + LOG_D (PHY, "pucch_config_dedicated.tdd_AckNackFeedbackMode = bundling\n"); } @@ -668,10 +649,10 @@ void phy_config_dedicated_eNB_step2(PHY_VARS_eNB *eNB) eNB->pusch_config_dedicated[UE_id].betaOffset_RI_Index = physicalConfigDedicated->pusch_ConfigDedicated->betaOffset_RI_Index; eNB->pusch_config_dedicated[UE_id].betaOffset_CQI_Index = physicalConfigDedicated->pusch_ConfigDedicated->betaOffset_CQI_Index; - LOG_D(PHY,"pusch_config_dedicated.betaOffset_ACK_Index %d\n",eNB->pusch_config_dedicated[UE_id].betaOffset_ACK_Index); - LOG_D(PHY,"pusch_config_dedicated.betaOffset_RI_Index %d\n",eNB->pusch_config_dedicated[UE_id].betaOffset_RI_Index); - LOG_D(PHY,"pusch_config_dedicated.betaOffset_CQI_Index %d\n",eNB->pusch_config_dedicated[UE_id].betaOffset_CQI_Index); - LOG_D(PHY,"\n"); + LOG_D (PHY, "pusch_config_dedicated.betaOffset_ACK_Index %d\n", eNB->pusch_config_dedicated[UE_id].betaOffset_ACK_Index); + LOG_D (PHY, "pusch_config_dedicated.betaOffset_RI_Index %d\n", eNB->pusch_config_dedicated[UE_id].betaOffset_RI_Index); + LOG_D (PHY, "pusch_config_dedicated.betaOffset_CQI_Index %d\n", eNB->pusch_config_dedicated[UE_id].betaOffset_CQI_Index); + LOG_D (PHY, "\n"); } @@ -679,59 +660,59 @@ void phy_config_dedicated_eNB_step2(PHY_VARS_eNB *eNB) if (physicalConfigDedicated->uplinkPowerControlDedicated) { eNB->ul_power_control_dedicated[UE_id].p0_UE_PUSCH = physicalConfigDedicated->uplinkPowerControlDedicated->p0_UE_PUSCH; - eNB->ul_power_control_dedicated[UE_id].deltaMCS_Enabled= physicalConfigDedicated->uplinkPowerControlDedicated->deltaMCS_Enabled; - eNB->ul_power_control_dedicated[UE_id].accumulationEnabled= physicalConfigDedicated->uplinkPowerControlDedicated->accumulationEnabled; - eNB->ul_power_control_dedicated[UE_id].p0_UE_PUCCH= physicalConfigDedicated->uplinkPowerControlDedicated->p0_UE_PUCCH; - eNB->ul_power_control_dedicated[UE_id].pSRS_Offset= physicalConfigDedicated->uplinkPowerControlDedicated->pSRS_Offset; - eNB->ul_power_control_dedicated[UE_id].filterCoefficient= *physicalConfigDedicated->uplinkPowerControlDedicated->filterCoefficient; - LOG_D(PHY,"ul_power_control_dedicated.p0_UE_PUSCH %d\n",eNB->ul_power_control_dedicated[UE_id].p0_UE_PUSCH); - LOG_D(PHY,"ul_power_control_dedicated.deltaMCS_Enabled %d\n",eNB->ul_power_control_dedicated[UE_id].deltaMCS_Enabled); - LOG_D(PHY,"ul_power_control_dedicated.accumulationEnabled %d\n",eNB->ul_power_control_dedicated[UE_id].accumulationEnabled); - LOG_D(PHY,"ul_power_control_dedicated.p0_UE_PUCCH %d\n",eNB->ul_power_control_dedicated[UE_id].p0_UE_PUCCH); - LOG_D(PHY,"ul_power_control_dedicated.pSRS_Offset %d\n",eNB->ul_power_control_dedicated[UE_id].pSRS_Offset); - LOG_D(PHY,"ul_power_control_dedicated.filterCoefficient %d\n",eNB->ul_power_control_dedicated[UE_id].filterCoefficient); - LOG_D(PHY,"\n"); + eNB->ul_power_control_dedicated[UE_id].deltaMCS_Enabled = physicalConfigDedicated->uplinkPowerControlDedicated->deltaMCS_Enabled; + eNB->ul_power_control_dedicated[UE_id].accumulationEnabled = physicalConfigDedicated->uplinkPowerControlDedicated->accumulationEnabled; + eNB->ul_power_control_dedicated[UE_id].p0_UE_PUCCH = physicalConfigDedicated->uplinkPowerControlDedicated->p0_UE_PUCCH; + eNB->ul_power_control_dedicated[UE_id].pSRS_Offset = physicalConfigDedicated->uplinkPowerControlDedicated->pSRS_Offset; + eNB->ul_power_control_dedicated[UE_id].filterCoefficient = *physicalConfigDedicated->uplinkPowerControlDedicated->filterCoefficient; + LOG_D (PHY, "ul_power_control_dedicated.p0_UE_PUSCH %d\n", eNB->ul_power_control_dedicated[UE_id].p0_UE_PUSCH); + LOG_D (PHY, "ul_power_control_dedicated.deltaMCS_Enabled %d\n", eNB->ul_power_control_dedicated[UE_id].deltaMCS_Enabled); + LOG_D (PHY, "ul_power_control_dedicated.accumulationEnabled %d\n", eNB->ul_power_control_dedicated[UE_id].accumulationEnabled); + LOG_D (PHY, "ul_power_control_dedicated.p0_UE_PUCCH %d\n", eNB->ul_power_control_dedicated[UE_id].p0_UE_PUCCH); + LOG_D (PHY, "ul_power_control_dedicated.pSRS_Offset %d\n", eNB->ul_power_control_dedicated[UE_id].pSRS_Offset); + LOG_D (PHY, "ul_power_control_dedicated.filterCoefficient %d\n", eNB->ul_power_control_dedicated[UE_id].filterCoefficient); + LOG_D (PHY, "\n"); } if (physicalConfigDedicated->antennaInfo) { - eNB->transmission_mode[UE_id] = 1+(physicalConfigDedicated->antennaInfo->choice.explicitValue.transmissionMode); - LOG_D(PHY,"Transmission Mode (phy_config_dedicated_eNB_step2) %d\n",eNB->transmission_mode[UE_id]); - LOG_D(PHY,"\n"); + eNB->transmission_mode[UE_id] = 1 + (physicalConfigDedicated->antennaInfo->choice.explicitValue.transmissionMode); + LOG_D (PHY, "Transmission Mode (phy_config_dedicated_eNB_step2) %d\n", eNB->transmission_mode[UE_id]); + LOG_D (PHY, "\n"); } if (physicalConfigDedicated->schedulingRequestConfig) { if (physicalConfigDedicated->schedulingRequestConfig->present == SchedulingRequestConfig_PR_setup) { eNB->scheduling_request_config[UE_id].sr_PUCCH_ResourceIndex = physicalConfigDedicated->schedulingRequestConfig->choice.setup.sr_PUCCH_ResourceIndex; - eNB->scheduling_request_config[UE_id].sr_ConfigIndex=physicalConfigDedicated->schedulingRequestConfig->choice.setup.sr_ConfigIndex; - eNB->scheduling_request_config[UE_id].dsr_TransMax=physicalConfigDedicated->schedulingRequestConfig->choice.setup.dsr_TransMax; + eNB->scheduling_request_config[UE_id].sr_ConfigIndex = physicalConfigDedicated->schedulingRequestConfig->choice.setup.sr_ConfigIndex; + eNB->scheduling_request_config[UE_id].dsr_TransMax = physicalConfigDedicated->schedulingRequestConfig->choice.setup.dsr_TransMax; - LOG_D(PHY,"scheduling_request_config.sr_PUCCH_ResourceIndex %d\n",eNB->scheduling_request_config[UE_id].sr_PUCCH_ResourceIndex); - LOG_D(PHY,"scheduling_request_config.sr_ConfigIndex %d\n",eNB->scheduling_request_config[UE_id].sr_ConfigIndex); - LOG_D(PHY,"scheduling_request_config.dsr_TransMax %d\n",eNB->scheduling_request_config[UE_id].dsr_TransMax); + LOG_D (PHY, "scheduling_request_config.sr_PUCCH_ResourceIndex %d\n", eNB->scheduling_request_config[UE_id].sr_PUCCH_ResourceIndex); + LOG_D (PHY, "scheduling_request_config.sr_ConfigIndex %d\n", eNB->scheduling_request_config[UE_id].sr_ConfigIndex); + LOG_D (PHY, "scheduling_request_config.dsr_TransMax %d\n", eNB->scheduling_request_config[UE_id].dsr_TransMax); } - LOG_D(PHY,"------------------------------------------------------------\n"); + LOG_D (PHY, "------------------------------------------------------------\n"); } if (physicalConfigDedicated->soundingRS_UL_ConfigDedicated) { if (physicalConfigDedicated->soundingRS_UL_ConfigDedicated->present == SoundingRS_UL_ConfigDedicated_PR_setup) { - - eNB->soundingrs_ul_config_dedicated[UE_id].srsConfigDedicatedSetup = 1; - eNB->soundingrs_ul_config_dedicated[UE_id].duration = physicalConfigDedicated->soundingRS_UL_ConfigDedicated->choice.setup.duration; - eNB->soundingrs_ul_config_dedicated[UE_id].cyclicShift = physicalConfigDedicated->soundingRS_UL_ConfigDedicated->choice.setup.cyclicShift; - eNB->soundingrs_ul_config_dedicated[UE_id].freqDomainPosition = physicalConfigDedicated->soundingRS_UL_ConfigDedicated->choice.setup.freqDomainPosition; - eNB->soundingrs_ul_config_dedicated[UE_id].srs_Bandwidth = physicalConfigDedicated->soundingRS_UL_ConfigDedicated->choice.setup.srs_Bandwidth; - eNB->soundingrs_ul_config_dedicated[UE_id].srs_ConfigIndex = physicalConfigDedicated->soundingRS_UL_ConfigDedicated->choice.setup.srs_ConfigIndex; + + eNB->soundingrs_ul_config_dedicated[UE_id].srsConfigDedicatedSetup = 1; + eNB->soundingrs_ul_config_dedicated[UE_id].duration = physicalConfigDedicated->soundingRS_UL_ConfigDedicated->choice.setup.duration; + eNB->soundingrs_ul_config_dedicated[UE_id].cyclicShift = physicalConfigDedicated->soundingRS_UL_ConfigDedicated->choice.setup.cyclicShift; + eNB->soundingrs_ul_config_dedicated[UE_id].freqDomainPosition = physicalConfigDedicated->soundingRS_UL_ConfigDedicated->choice.setup.freqDomainPosition; + eNB->soundingrs_ul_config_dedicated[UE_id].srs_Bandwidth = physicalConfigDedicated->soundingRS_UL_ConfigDedicated->choice.setup.srs_Bandwidth; + eNB->soundingrs_ul_config_dedicated[UE_id].srs_ConfigIndex = physicalConfigDedicated->soundingRS_UL_ConfigDedicated->choice.setup.srs_ConfigIndex; eNB->soundingrs_ul_config_dedicated[UE_id].srs_HoppingBandwidth = physicalConfigDedicated->soundingRS_UL_ConfigDedicated->choice.setup.srs_HoppingBandwidth; - eNB->soundingrs_ul_config_dedicated[UE_id].transmissionComb = physicalConfigDedicated->soundingRS_UL_ConfigDedicated->choice.setup.transmissionComb; + eNB->soundingrs_ul_config_dedicated[UE_id].transmissionComb = physicalConfigDedicated->soundingRS_UL_ConfigDedicated->choice.setup.transmissionComb; - LOG_D(PHY,"soundingrs_ul_config_dedicated.srs_ConfigIndex %d\n",eNB->soundingrs_ul_config_dedicated[UE_id].srs_ConfigIndex); + LOG_D (PHY, "soundingrs_ul_config_dedicated.srs_ConfigIndex %d\n", eNB->soundingrs_ul_config_dedicated[UE_id].srs_ConfigIndex); } - LOG_D(PHY,"------------------------------------------------------------\n"); + LOG_D (PHY, "------------------------------------------------------------\n"); } @@ -743,15 +724,14 @@ void phy_config_dedicated_eNB_step2(PHY_VARS_eNB *eNB) /* * Configures UE MAC and PHY with radioResourceCommon received in mobilityControlInfo IE during Handover */ -void phy_config_afterHO_ue(uint8_t Mod_id,uint8_t CC_id,uint8_t eNB_id, MobilityControlInfo_t *mobilityControlInfo, uint8_t ho_failed) +void +phy_config_afterHO_ue (uint8_t Mod_id, uint8_t CC_id, uint8_t eNB_id, MobilityControlInfo_t * mobilityControlInfo, uint8_t ho_failed) { - if(mobilityControlInfo!=NULL) { + if (mobilityControlInfo != NULL) { RadioResourceConfigCommon_t *radioResourceConfigCommon = &mobilityControlInfo->radioResourceConfigCommon; - LOG_I(PHY,"radioResourceConfigCommon %p\n", radioResourceConfigCommon); - memcpy((void *)&PHY_vars_UE_g[Mod_id][CC_id]->frame_parms_before_ho, - (void *)&PHY_vars_UE_g[Mod_id][CC_id]->frame_parms, - sizeof(LTE_DL_FRAME_PARMS)); + LOG_I (PHY, "radioResourceConfigCommon %p\n", radioResourceConfigCommon); + memcpy ((void *) &PHY_vars_UE_g[Mod_id][CC_id]->frame_parms_before_ho, (void *) &PHY_vars_UE_g[Mod_id][CC_id]->frame_parms, sizeof (LTE_DL_FRAME_PARMS)); PHY_vars_UE_g[Mod_id][CC_id]->ho_triggered = 1; //PHY_vars_UE_g[UE_id]->UE_mode[0] = PRACH; @@ -760,15 +740,14 @@ void phy_config_afterHO_ue(uint8_t Mod_id,uint8_t CC_id,uint8_t eNB_id, Mobility // uint8_t prach_fmt; // int u; - LOG_I(PHY,"[UE%d] Handover triggered: Applying radioResourceConfigCommon from eNB %d\n", - Mod_id,eNB_id); + LOG_I (PHY, "[UE%d] Handover triggered: Applying radioResourceConfigCommon from eNB %d\n", Mod_id, eNB_id); - fp->prach_config_common.rootSequenceIndex =radioResourceConfigCommon->prach_Config.rootSequenceIndex; - fp->prach_config_common.prach_Config_enabled=1; - fp->prach_config_common.prach_ConfigInfo.prach_ConfigIndex =radioResourceConfigCommon->prach_Config.prach_ConfigInfo->prach_ConfigIndex; - fp->prach_config_common.prach_ConfigInfo.highSpeedFlag =radioResourceConfigCommon->prach_Config.prach_ConfigInfo->highSpeedFlag; - fp->prach_config_common.prach_ConfigInfo.zeroCorrelationZoneConfig =radioResourceConfigCommon->prach_Config.prach_ConfigInfo->zeroCorrelationZoneConfig; - fp->prach_config_common.prach_ConfigInfo.prach_FreqOffset =radioResourceConfigCommon->prach_Config.prach_ConfigInfo->prach_FreqOffset; + fp->prach_config_common.rootSequenceIndex = radioResourceConfigCommon->prach_Config.rootSequenceIndex; + fp->prach_config_common.prach_Config_enabled = 1; + fp->prach_config_common.prach_ConfigInfo.prach_ConfigIndex = radioResourceConfigCommon->prach_Config.prach_ConfigInfo->prach_ConfigIndex; + fp->prach_config_common.prach_ConfigInfo.highSpeedFlag = radioResourceConfigCommon->prach_Config.prach_ConfigInfo->highSpeedFlag; + fp->prach_config_common.prach_ConfigInfo.zeroCorrelationZoneConfig = radioResourceConfigCommon->prach_Config.prach_ConfigInfo->zeroCorrelationZoneConfig; + fp->prach_config_common.prach_ConfigInfo.prach_FreqOffset = radioResourceConfigCommon->prach_Config.prach_ConfigInfo->prach_FreqOffset; // prach_fmt = get_prach_fmt(radioResourceConfigCommon->prach_Config.prach_ConfigInfo->prach_ConfigIndex,fp->frame_type); // N_ZC = (prach_fmt <4)?839:139; @@ -776,111 +755,108 @@ void phy_config_afterHO_ue(uint8_t Mod_id,uint8_t CC_id,uint8_t eNB_id, Mobility // prach_root_sequence_map4[fp->prach_config_common.rootSequenceIndex]; //compute_prach_seq(u,N_ZC, PHY_vars_UE_g[Mod_id]->X_u); - compute_prach_seq(PHY_vars_UE_g[Mod_id][CC_id]->frame_parms.prach_config_common.rootSequenceIndex, - PHY_vars_UE_g[Mod_id][CC_id]->frame_parms.prach_config_common.prach_ConfigInfo.prach_ConfigIndex, - PHY_vars_UE_g[Mod_id][CC_id]->frame_parms.prach_config_common.prach_ConfigInfo.zeroCorrelationZoneConfig, - PHY_vars_UE_g[Mod_id][CC_id]->frame_parms.prach_config_common.prach_ConfigInfo.highSpeedFlag, - fp->frame_type, - PHY_vars_UE_g[Mod_id][CC_id]->X_u); + compute_prach_seq (PHY_vars_UE_g[Mod_id][CC_id]->frame_parms.prach_config_common.rootSequenceIndex, + PHY_vars_UE_g[Mod_id][CC_id]->frame_parms.prach_config_common.prach_ConfigInfo.prach_ConfigIndex, + PHY_vars_UE_g[Mod_id][CC_id]->frame_parms.prach_config_common.prach_ConfigInfo.zeroCorrelationZoneConfig, + PHY_vars_UE_g[Mod_id][CC_id]->frame_parms.prach_config_common.prach_ConfigInfo.highSpeedFlag, fp->frame_type, PHY_vars_UE_g[Mod_id][CC_id]->X_u); - fp->pucch_config_common.deltaPUCCH_Shift = 1+radioResourceConfigCommon->pucch_ConfigCommon->deltaPUCCH_Shift; - fp->pucch_config_common.nRB_CQI = radioResourceConfigCommon->pucch_ConfigCommon->nRB_CQI; - fp->pucch_config_common.nCS_AN = radioResourceConfigCommon->pucch_ConfigCommon->nCS_AN; - fp->pucch_config_common.n1PUCCH_AN = radioResourceConfigCommon->pucch_ConfigCommon->n1PUCCH_AN; + fp->pucch_config_common.deltaPUCCH_Shift = 1 + radioResourceConfigCommon->pucch_ConfigCommon->deltaPUCCH_Shift; + fp->pucch_config_common.nRB_CQI = radioResourceConfigCommon->pucch_ConfigCommon->nRB_CQI; + fp->pucch_config_common.nCS_AN = radioResourceConfigCommon->pucch_ConfigCommon->nCS_AN; + fp->pucch_config_common.n1PUCCH_AN = radioResourceConfigCommon->pucch_ConfigCommon->n1PUCCH_AN; fp->pdsch_config_common.referenceSignalPower = radioResourceConfigCommon->pdsch_ConfigCommon->referenceSignalPower; - fp->pdsch_config_common.p_b = radioResourceConfigCommon->pdsch_ConfigCommon->p_b; + fp->pdsch_config_common.p_b = radioResourceConfigCommon->pdsch_ConfigCommon->p_b; - fp->pusch_config_common.n_SB = radioResourceConfigCommon->pusch_ConfigCommon.pusch_ConfigBasic.n_SB; - fp->pusch_config_common.hoppingMode = radioResourceConfigCommon->pusch_ConfigCommon.pusch_ConfigBasic.hoppingMode; - fp->pusch_config_common.pusch_HoppingOffset = radioResourceConfigCommon->pusch_ConfigCommon.pusch_ConfigBasic.pusch_HoppingOffset; - fp->pusch_config_common.enable64QAM = radioResourceConfigCommon->pusch_ConfigCommon.pusch_ConfigBasic.enable64QAM; - fp->pusch_config_common.ul_ReferenceSignalsPUSCH.groupHoppingEnabled = radioResourceConfigCommon->pusch_ConfigCommon.ul_ReferenceSignalsPUSCH.groupHoppingEnabled; - fp->pusch_config_common.ul_ReferenceSignalsPUSCH.groupAssignmentPUSCH = radioResourceConfigCommon->pusch_ConfigCommon.ul_ReferenceSignalsPUSCH.groupAssignmentPUSCH; + fp->pusch_config_common.n_SB = radioResourceConfigCommon->pusch_ConfigCommon.pusch_ConfigBasic.n_SB; + fp->pusch_config_common.hoppingMode = radioResourceConfigCommon->pusch_ConfigCommon.pusch_ConfigBasic.hoppingMode; + fp->pusch_config_common.pusch_HoppingOffset = radioResourceConfigCommon->pusch_ConfigCommon.pusch_ConfigBasic.pusch_HoppingOffset; + fp->pusch_config_common.enable64QAM = radioResourceConfigCommon->pusch_ConfigCommon.pusch_ConfigBasic.enable64QAM; + fp->pusch_config_common.ul_ReferenceSignalsPUSCH.groupHoppingEnabled = radioResourceConfigCommon->pusch_ConfigCommon.ul_ReferenceSignalsPUSCH.groupHoppingEnabled; + fp->pusch_config_common.ul_ReferenceSignalsPUSCH.groupAssignmentPUSCH = radioResourceConfigCommon->pusch_ConfigCommon.ul_ReferenceSignalsPUSCH.groupAssignmentPUSCH; fp->pusch_config_common.ul_ReferenceSignalsPUSCH.sequenceHoppingEnabled = radioResourceConfigCommon->pusch_ConfigCommon.ul_ReferenceSignalsPUSCH.sequenceHoppingEnabled; - fp->pusch_config_common.ul_ReferenceSignalsPUSCH.cyclicShift = radioResourceConfigCommon->pusch_ConfigCommon.ul_ReferenceSignalsPUSCH.cyclicShift; + fp->pusch_config_common.ul_ReferenceSignalsPUSCH.cyclicShift = radioResourceConfigCommon->pusch_ConfigCommon.ul_ReferenceSignalsPUSCH.cyclicShift; - init_ul_hopping(fp); - fp->soundingrs_ul_config_common.enabled_flag = 0; + init_ul_hopping (fp); + fp->soundingrs_ul_config_common.enabled_flag = 0; - if (radioResourceConfigCommon->soundingRS_UL_ConfigCommon->present==SoundingRS_UL_ConfigCommon_PR_setup) { - fp->soundingrs_ul_config_common.enabled_flag = 1; - fp->soundingrs_ul_config_common.srs_BandwidthConfig = radioResourceConfigCommon->soundingRS_UL_ConfigCommon->choice.setup.srs_BandwidthConfig; - fp->soundingrs_ul_config_common.srs_SubframeConfig = radioResourceConfigCommon->soundingRS_UL_ConfigCommon->choice.setup.srs_SubframeConfig; + if (radioResourceConfigCommon->soundingRS_UL_ConfigCommon->present == SoundingRS_UL_ConfigCommon_PR_setup) { + fp->soundingrs_ul_config_common.enabled_flag = 1; + fp->soundingrs_ul_config_common.srs_BandwidthConfig = radioResourceConfigCommon->soundingRS_UL_ConfigCommon->choice.setup.srs_BandwidthConfig; + fp->soundingrs_ul_config_common.srs_SubframeConfig = radioResourceConfigCommon->soundingRS_UL_ConfigCommon->choice.setup.srs_SubframeConfig; fp->soundingrs_ul_config_common.ackNackSRS_SimultaneousTransmission = radioResourceConfigCommon->soundingRS_UL_ConfigCommon->choice.setup.ackNackSRS_SimultaneousTransmission; if (radioResourceConfigCommon->soundingRS_UL_ConfigCommon->choice.setup.srs_MaxUpPts) - fp->soundingrs_ul_config_common.srs_MaxUpPts = 1; + fp->soundingrs_ul_config_common.srs_MaxUpPts = 1; else - fp->soundingrs_ul_config_common.srs_MaxUpPts = 0; + fp->soundingrs_ul_config_common.srs_MaxUpPts = 0; } - fp->ul_power_control_config_common.p0_NominalPUSCH = radioResourceConfigCommon->uplinkPowerControlCommon->p0_NominalPUSCH; - fp->ul_power_control_config_common.alpha = radioResourceConfigCommon->uplinkPowerControlCommon->alpha; - fp->ul_power_control_config_common.p0_NominalPUCCH = radioResourceConfigCommon->uplinkPowerControlCommon->p0_NominalPUCCH; + fp->ul_power_control_config_common.p0_NominalPUSCH = radioResourceConfigCommon->uplinkPowerControlCommon->p0_NominalPUSCH; + fp->ul_power_control_config_common.alpha = radioResourceConfigCommon->uplinkPowerControlCommon->alpha; + fp->ul_power_control_config_common.p0_NominalPUCCH = radioResourceConfigCommon->uplinkPowerControlCommon->p0_NominalPUCCH; fp->ul_power_control_config_common.deltaPreambleMsg3 = radioResourceConfigCommon->uplinkPowerControlCommon->deltaPreambleMsg3; - fp->ul_power_control_config_common.deltaF_PUCCH_Format1 = radioResourceConfigCommon->uplinkPowerControlCommon->deltaFList_PUCCH.deltaF_PUCCH_Format1; - fp->ul_power_control_config_common.deltaF_PUCCH_Format1b = radioResourceConfigCommon->uplinkPowerControlCommon->deltaFList_PUCCH.deltaF_PUCCH_Format1b; - fp->ul_power_control_config_common.deltaF_PUCCH_Format2 = radioResourceConfigCommon->uplinkPowerControlCommon->deltaFList_PUCCH.deltaF_PUCCH_Format2; - fp->ul_power_control_config_common.deltaF_PUCCH_Format2a = radioResourceConfigCommon->uplinkPowerControlCommon->deltaFList_PUCCH.deltaF_PUCCH_Format2a; - fp->ul_power_control_config_common.deltaF_PUCCH_Format2b = radioResourceConfigCommon->uplinkPowerControlCommon->deltaFList_PUCCH.deltaF_PUCCH_Format2b; + fp->ul_power_control_config_common.deltaF_PUCCH_Format1 = radioResourceConfigCommon->uplinkPowerControlCommon->deltaFList_PUCCH.deltaF_PUCCH_Format1; + fp->ul_power_control_config_common.deltaF_PUCCH_Format1b = radioResourceConfigCommon->uplinkPowerControlCommon->deltaFList_PUCCH.deltaF_PUCCH_Format1b; + fp->ul_power_control_config_common.deltaF_PUCCH_Format2 = radioResourceConfigCommon->uplinkPowerControlCommon->deltaFList_PUCCH.deltaF_PUCCH_Format2; + fp->ul_power_control_config_common.deltaF_PUCCH_Format2a = radioResourceConfigCommon->uplinkPowerControlCommon->deltaFList_PUCCH.deltaF_PUCCH_Format2a; + fp->ul_power_control_config_common.deltaF_PUCCH_Format2b = radioResourceConfigCommon->uplinkPowerControlCommon->deltaFList_PUCCH.deltaF_PUCCH_Format2b; fp->maxHARQ_Msg3Tx = radioResourceConfigCommon->rach_ConfigCommon->maxHARQ_Msg3Tx; // Now configure some of the Physical Channels if (radioResourceConfigCommon->antennaInfoCommon) - fp->nb_antennas_tx = (1<antennaInfoCommon->antennaPortsCount); + fp->nb_antennas_tx = (1 << radioResourceConfigCommon->antennaInfoCommon->antennaPortsCount); else - fp->nb_antennas_tx = 1; + fp->nb_antennas_tx = 1; //PHICH if (radioResourceConfigCommon->antennaInfoCommon) { fp->phich_config_common.phich_resource = radioResourceConfigCommon->phich_Config->phich_Resource; fp->phich_config_common.phich_duration = radioResourceConfigCommon->phich_Config->phich_Duration; } - //Target CellId fp->Nid_cell = mobilityControlInfo->targetPhysCellId; - fp->nushift = fp->Nid_cell%6; + fp->nushift = fp->Nid_cell % 6; // PUCCH - init_ncs_cell(fp,PHY_vars_UE_g[Mod_id][CC_id]->ncs_cell); + init_ncs_cell (fp, PHY_vars_UE_g[Mod_id][CC_id]->ncs_cell); - init_ul_hopping(fp); + init_ul_hopping (fp); // RNTI - PHY_vars_UE_g[Mod_id][CC_id]->pdcch_vars[0][eNB_id]->crnti = mobilityControlInfo->newUE_Identity.buf[0]|(mobilityControlInfo->newUE_Identity.buf[1]<<8); - PHY_vars_UE_g[Mod_id][CC_id]->pdcch_vars[1][eNB_id]->crnti = mobilityControlInfo->newUE_Identity.buf[0]|(mobilityControlInfo->newUE_Identity.buf[1]<<8); + PHY_vars_UE_g[Mod_id][CC_id]->pdcch_vars[0][eNB_id]->crnti = mobilityControlInfo->newUE_Identity.buf[0] | (mobilityControlInfo->newUE_Identity.buf[1] << 8); + PHY_vars_UE_g[Mod_id][CC_id]->pdcch_vars[1][eNB_id]->crnti = mobilityControlInfo->newUE_Identity.buf[0] | (mobilityControlInfo->newUE_Identity.buf[1] << 8); - LOG_I(PHY,"SET C-RNTI %x %x\n",PHY_vars_UE_g[Mod_id][CC_id]->pdcch_vars[0][eNB_id]->crnti, - PHY_vars_UE_g[Mod_id][CC_id]->pdcch_vars[1][eNB_id]->crnti); + LOG_I (PHY, "SET C-RNTI %x %x\n", PHY_vars_UE_g[Mod_id][CC_id]->pdcch_vars[0][eNB_id]->crnti, PHY_vars_UE_g[Mod_id][CC_id]->pdcch_vars[1][eNB_id]->crnti); } - if(ho_failed) { - LOG_D(PHY,"[UE%d] Handover failed, triggering RACH procedure\n",Mod_id); - memcpy((void *)&PHY_vars_UE_g[Mod_id][CC_id]->frame_parms,(void *)&PHY_vars_UE_g[Mod_id][CC_id]->frame_parms_before_ho, sizeof(LTE_DL_FRAME_PARMS)); + if (ho_failed) { + LOG_D (PHY, "[UE%d] Handover failed, triggering RACH procedure\n", Mod_id); + memcpy ((void *) &PHY_vars_UE_g[Mod_id][CC_id]->frame_parms, (void *) &PHY_vars_UE_g[Mod_id][CC_id]->frame_parms_before_ho, sizeof (LTE_DL_FRAME_PARMS)); PHY_vars_UE_g[Mod_id][CC_id]->UE_mode[eNB_id] = PRACH; } } -void phy_config_meas_ue(uint8_t Mod_id,uint8_t CC_id,uint8_t eNB_index,uint8_t n_adj_cells,unsigned int *adj_cell_id) +void +phy_config_meas_ue (uint8_t Mod_id, uint8_t CC_id, uint8_t eNB_index, uint8_t n_adj_cells, unsigned int *adj_cell_id) { PHY_MEASUREMENTS *phy_meas = &PHY_vars_UE_g[Mod_id][CC_id]->measurements; - int i; + int i; - LOG_I(PHY,"Configuring inter-cell measurements for %d cells, ids: \n",n_adj_cells); + LOG_I (PHY, "Configuring inter-cell measurements for %d cells, ids: \n", n_adj_cells); - for (i=0; iframe_parms,PHY_vars_UE_g[Mod_id][CC_id]->lte_gold_table[i+1],adj_cell_id[i]); + for (i = 0; i < n_adj_cells; i++) { + LOG_I (PHY, "%d\n", adj_cell_id[i]); + lte_gold (&PHY_vars_UE_g[Mod_id][CC_id]->frame_parms, PHY_vars_UE_g[Mod_id][CC_id]->lte_gold_table[i + 1], adj_cell_id[i]); } phy_meas->n_adj_cells = n_adj_cells; - memcpy((void*)phy_meas->adj_cell_id,(void *)adj_cell_id,n_adj_cells*sizeof(unsigned int)); + memcpy ((void *) phy_meas->adj_cell_id, (void *) adj_cell_id, n_adj_cells * sizeof (unsigned int)); } @@ -949,13 +925,12 @@ void phy_config_meas_ue(uint8_t Mod_id,uint8_t CC_id,uint8_t eNB_index,uint8_t n */ #if defined(Rel10) || defined(Rel14) -void phy_config_dedicated_scell_ue(uint8_t Mod_id, - uint8_t eNB_index, - SCellToAddMod_r10_t *sCellToAddMod_r10, - int CC_id) +void +phy_config_dedicated_scell_ue (uint8_t Mod_id, uint8_t eNB_index, SCellToAddMod_r10_t * sCellToAddMod_r10, int CC_id) { } + /* void phy_config_dedicated_scell_eNB(uint8_t Mod_id, uint16_t rnti, @@ -1008,51 +983,51 @@ void phy_config_dedicated_scell_ue(uint8_t Mod_id, #endif -void phy_config_harq_ue(uint8_t Mod_id,int CC_id,uint8_t eNB_id, - uint16_t max_harq_tx ) +void +phy_config_harq_ue (uint8_t Mod_id, int CC_id, uint8_t eNB_id, uint16_t max_harq_tx) { - PHY_VARS_UE *phy_vars_ue = PHY_vars_UE_g[Mod_id][CC_id]; + PHY_VARS_UE *phy_vars_ue = PHY_vars_UE_g[Mod_id][CC_id]; phy_vars_ue->ulsch[eNB_id]->Mlimit = max_harq_tx; } extern uint16_t beta_cqi[16]; -void phy_config_dedicated_ue(uint8_t Mod_id,int CC_id,uint8_t eNB_id, - struct PhysicalConfigDedicated *physicalConfigDedicated ) +void +phy_config_dedicated_ue (uint8_t Mod_id, int CC_id, uint8_t eNB_id, struct PhysicalConfigDedicated *physicalConfigDedicated) { - static uint8_t first_dedicated_configuration = 0; - PHY_VARS_UE *phy_vars_ue = PHY_vars_UE_g[Mod_id][CC_id]; + static uint8_t first_dedicated_configuration = 0; + PHY_VARS_UE *phy_vars_ue = PHY_vars_UE_g[Mod_id][CC_id]; - phy_vars_ue->total_TBS[eNB_id]=0; - phy_vars_ue->total_TBS_last[eNB_id]=0; - phy_vars_ue->bitrate[eNB_id]=0; - phy_vars_ue->total_received_bits[eNB_id]=0; - phy_vars_ue->dlsch_errors[eNB_id]=0; - phy_vars_ue->dlsch_errors_last[eNB_id]=0; - phy_vars_ue->dlsch_received[eNB_id]=0; - phy_vars_ue->dlsch_received_last[eNB_id]=0; - phy_vars_ue->dlsch_fer[eNB_id]=0; + phy_vars_ue->total_TBS[eNB_id] = 0; + phy_vars_ue->total_TBS_last[eNB_id] = 0; + phy_vars_ue->bitrate[eNB_id] = 0; + phy_vars_ue->total_received_bits[eNB_id] = 0; + phy_vars_ue->dlsch_errors[eNB_id] = 0; + phy_vars_ue->dlsch_errors_last[eNB_id] = 0; + phy_vars_ue->dlsch_received[eNB_id] = 0; + phy_vars_ue->dlsch_received_last[eNB_id] = 0; + phy_vars_ue->dlsch_fer[eNB_id] = 0; phy_vars_ue->cqi_report_config[eNB_id].CQI_ReportPeriodic.ri_ConfigIndex = -1; phy_vars_ue->cqi_report_config[eNB_id].CQI_ReportPeriodic.cqi_PMI_ConfigIndex = -1; if (physicalConfigDedicated) { - LOG_D(PHY,"[UE %d] Received physicalConfigDedicated from eNB %d\n",Mod_id, eNB_id); - LOG_D(PHY,"------------------------------------------------------------------------\n"); + LOG_D (PHY, "[UE %d] Received physicalConfigDedicated from eNB %d\n", Mod_id, eNB_id); + LOG_D (PHY, "------------------------------------------------------------------------\n"); if (physicalConfigDedicated->pdsch_ConfigDedicated) { - phy_vars_ue->pdsch_config_dedicated[eNB_id].p_a=physicalConfigDedicated->pdsch_ConfigDedicated->p_a; - LOG_D(PHY,"pdsch_config_dedicated.p_a %d\n",phy_vars_ue->pdsch_config_dedicated[eNB_id].p_a); - LOG_D(PHY,"\n"); + phy_vars_ue->pdsch_config_dedicated[eNB_id].p_a = physicalConfigDedicated->pdsch_ConfigDedicated->p_a; + LOG_D (PHY, "pdsch_config_dedicated.p_a %d\n", phy_vars_ue->pdsch_config_dedicated[eNB_id].p_a); + LOG_D (PHY, "\n"); } if (physicalConfigDedicated->pucch_ConfigDedicated) { - if (physicalConfigDedicated->pucch_ConfigDedicated->ackNackRepetition.present==PUCCH_ConfigDedicated__ackNackRepetition_PR_release) - phy_vars_ue->pucch_config_dedicated[eNB_id].ackNackRepetition=0; + if (physicalConfigDedicated->pucch_ConfigDedicated->ackNackRepetition.present == PUCCH_ConfigDedicated__ackNackRepetition_PR_release) + phy_vars_ue->pucch_config_dedicated[eNB_id].ackNackRepetition = 0; else { - phy_vars_ue->pucch_config_dedicated[eNB_id].ackNackRepetition=1; + phy_vars_ue->pucch_config_dedicated[eNB_id].ackNackRepetition = 1; } if (physicalConfigDedicated->pucch_ConfigDedicated->tdd_AckNackFeedbackMode) @@ -1060,10 +1035,10 @@ void phy_config_dedicated_ue(uint8_t Mod_id,int CC_id,uint8_t eNB_id, else phy_vars_ue->pucch_config_dedicated[eNB_id].tdd_AckNackFeedbackMode = bundling; - if ( phy_vars_ue->pucch_config_dedicated[eNB_id].tdd_AckNackFeedbackMode == multiplexing) - LOG_D(PHY,"pucch_config_dedicated.tdd_AckNackFeedbackMode = multiplexing\n"); + if (phy_vars_ue->pucch_config_dedicated[eNB_id].tdd_AckNackFeedbackMode == multiplexing) + LOG_D (PHY, "pucch_config_dedicated.tdd_AckNackFeedbackMode = multiplexing\n"); else - LOG_D(PHY,"pucch_config_dedicated.tdd_AckNackFeedbackMode = bundling\n"); + LOG_D (PHY, "pucch_config_dedicated.tdd_AckNackFeedbackMode = bundling\n"); } if (physicalConfigDedicated->pusch_ConfigDedicated) { @@ -1072,10 +1047,11 @@ void phy_config_dedicated_ue(uint8_t Mod_id,int CC_id,uint8_t eNB_id, phy_vars_ue->pusch_config_dedicated[eNB_id].betaOffset_CQI_Index = physicalConfigDedicated->pusch_ConfigDedicated->betaOffset_CQI_Index; - LOG_D(PHY,"pusch_config_dedicated.betaOffset_ACK_Index %d\n",phy_vars_ue->pusch_config_dedicated[eNB_id].betaOffset_ACK_Index); - LOG_D(PHY,"pusch_config_dedicated.betaOffset_RI_Index %d\n",phy_vars_ue->pusch_config_dedicated[eNB_id].betaOffset_RI_Index); - LOG_D(PHY,"pusch_config_dedicated.betaOffset_CQI_Index %d => %d)\n",phy_vars_ue->pusch_config_dedicated[eNB_id].betaOffset_CQI_Index,beta_cqi[phy_vars_ue->pusch_config_dedicated[eNB_id].betaOffset_CQI_Index]); - LOG_D(PHY,"\n"); + LOG_D (PHY, "pusch_config_dedicated.betaOffset_ACK_Index %d\n", phy_vars_ue->pusch_config_dedicated[eNB_id].betaOffset_ACK_Index); + LOG_D (PHY, "pusch_config_dedicated.betaOffset_RI_Index %d\n", phy_vars_ue->pusch_config_dedicated[eNB_id].betaOffset_RI_Index); + LOG_D (PHY, "pusch_config_dedicated.betaOffset_CQI_Index %d => %d)\n", phy_vars_ue->pusch_config_dedicated[eNB_id].betaOffset_CQI_Index, + beta_cqi[phy_vars_ue->pusch_config_dedicated[eNB_id].betaOffset_CQI_Index]); + LOG_D (PHY, "\n"); } @@ -1083,24 +1059,24 @@ void phy_config_dedicated_ue(uint8_t Mod_id,int CC_id,uint8_t eNB_id, if (physicalConfigDedicated->uplinkPowerControlDedicated) { phy_vars_ue->ul_power_control_dedicated[eNB_id].p0_UE_PUSCH = physicalConfigDedicated->uplinkPowerControlDedicated->p0_UE_PUSCH; - phy_vars_ue->ul_power_control_dedicated[eNB_id].deltaMCS_Enabled= physicalConfigDedicated->uplinkPowerControlDedicated->deltaMCS_Enabled; - phy_vars_ue->ul_power_control_dedicated[eNB_id].accumulationEnabled= physicalConfigDedicated->uplinkPowerControlDedicated->accumulationEnabled; - phy_vars_ue->ul_power_control_dedicated[eNB_id].p0_UE_PUCCH= physicalConfigDedicated->uplinkPowerControlDedicated->p0_UE_PUCCH; - phy_vars_ue->ul_power_control_dedicated[eNB_id].pSRS_Offset= physicalConfigDedicated->uplinkPowerControlDedicated->pSRS_Offset; - phy_vars_ue->ul_power_control_dedicated[eNB_id].filterCoefficient= *physicalConfigDedicated->uplinkPowerControlDedicated->filterCoefficient; - LOG_D(PHY,"ul_power_control_dedicated.p0_UE_PUSCH %d\n",phy_vars_ue->ul_power_control_dedicated[eNB_id].p0_UE_PUSCH); - LOG_D(PHY,"ul_power_control_dedicated.deltaMCS_Enabled %d\n",phy_vars_ue->ul_power_control_dedicated[eNB_id].deltaMCS_Enabled); - LOG_D(PHY,"ul_power_control_dedicated.accumulationEnabled %d\n",phy_vars_ue->ul_power_control_dedicated[eNB_id].accumulationEnabled); - LOG_D(PHY,"ul_power_control_dedicated.p0_UE_PUCCH %d\n",phy_vars_ue->ul_power_control_dedicated[eNB_id].p0_UE_PUCCH); - LOG_D(PHY,"ul_power_control_dedicated.pSRS_Offset %d\n",phy_vars_ue->ul_power_control_dedicated[eNB_id].pSRS_Offset); - LOG_D(PHY,"ul_power_control_dedicated.filterCoefficient %d\n",phy_vars_ue->ul_power_control_dedicated[eNB_id].filterCoefficient); - LOG_D(PHY,"\n"); + phy_vars_ue->ul_power_control_dedicated[eNB_id].deltaMCS_Enabled = physicalConfigDedicated->uplinkPowerControlDedicated->deltaMCS_Enabled; + phy_vars_ue->ul_power_control_dedicated[eNB_id].accumulationEnabled = physicalConfigDedicated->uplinkPowerControlDedicated->accumulationEnabled; + phy_vars_ue->ul_power_control_dedicated[eNB_id].p0_UE_PUCCH = physicalConfigDedicated->uplinkPowerControlDedicated->p0_UE_PUCCH; + phy_vars_ue->ul_power_control_dedicated[eNB_id].pSRS_Offset = physicalConfigDedicated->uplinkPowerControlDedicated->pSRS_Offset; + phy_vars_ue->ul_power_control_dedicated[eNB_id].filterCoefficient = *physicalConfigDedicated->uplinkPowerControlDedicated->filterCoefficient; + LOG_D (PHY, "ul_power_control_dedicated.p0_UE_PUSCH %d\n", phy_vars_ue->ul_power_control_dedicated[eNB_id].p0_UE_PUSCH); + LOG_D (PHY, "ul_power_control_dedicated.deltaMCS_Enabled %d\n", phy_vars_ue->ul_power_control_dedicated[eNB_id].deltaMCS_Enabled); + LOG_D (PHY, "ul_power_control_dedicated.accumulationEnabled %d\n", phy_vars_ue->ul_power_control_dedicated[eNB_id].accumulationEnabled); + LOG_D (PHY, "ul_power_control_dedicated.p0_UE_PUCCH %d\n", phy_vars_ue->ul_power_control_dedicated[eNB_id].p0_UE_PUCCH); + LOG_D (PHY, "ul_power_control_dedicated.pSRS_Offset %d\n", phy_vars_ue->ul_power_control_dedicated[eNB_id].pSRS_Offset); + LOG_D (PHY, "ul_power_control_dedicated.filterCoefficient %d\n", phy_vars_ue->ul_power_control_dedicated[eNB_id].filterCoefficient); + LOG_D (PHY, "\n"); } if (physicalConfigDedicated->antennaInfo) { - phy_vars_ue->transmission_mode[eNB_id] = 1+(physicalConfigDedicated->antennaInfo->choice.explicitValue.transmissionMode); - LOG_I(PHY,"Transmission Mode %d\n",phy_vars_ue->transmission_mode[eNB_id]); - switch(physicalConfigDedicated->antennaInfo->choice.explicitValue.transmissionMode) { + phy_vars_ue->transmission_mode[eNB_id] = 1 + (physicalConfigDedicated->antennaInfo->choice.explicitValue.transmissionMode); + LOG_I (PHY, "Transmission Mode %d\n", phy_vars_ue->transmission_mode[eNB_id]); + switch (physicalConfigDedicated->antennaInfo->choice.explicitValue.transmissionMode) { case AntennaInfoDedicated__transmissionMode_tm1: phy_vars_ue->transmission_mode[eNB_id] = 1; break; @@ -1120,29 +1096,29 @@ void phy_config_dedicated_ue(uint8_t Mod_id,int CC_id,uint8_t eNB_id, phy_vars_ue->transmission_mode[eNB_id] = 6; break; case AntennaInfoDedicated__transmissionMode_tm7: - lte_gold_ue_spec_port5(phy_vars_ue->lte_gold_uespec_port5_table, phy_vars_ue->frame_parms.Nid_cell, phy_vars_ue->pdcch_vars[0][eNB_id]->crnti); + lte_gold_ue_spec_port5 (phy_vars_ue->lte_gold_uespec_port5_table, phy_vars_ue->frame_parms.Nid_cell, phy_vars_ue->pdcch_vars[0][eNB_id]->crnti); phy_vars_ue->transmission_mode[eNB_id] = 7; break; default: - LOG_E(PHY,"Unknown transmission mode!\n"); + LOG_E (PHY, "Unknown transmission mode!\n"); break; } } else { - LOG_D(PHY,"[UE %d] Received NULL physicalConfigDedicated->antennaInfo from eNB %d\n",Mod_id, eNB_id); + LOG_D (PHY, "[UE %d] Received NULL physicalConfigDedicated->antennaInfo from eNB %d\n", Mod_id, eNB_id); } if (physicalConfigDedicated->schedulingRequestConfig) { if (physicalConfigDedicated->schedulingRequestConfig->present == SchedulingRequestConfig_PR_setup) { phy_vars_ue->scheduling_request_config[eNB_id].sr_PUCCH_ResourceIndex = physicalConfigDedicated->schedulingRequestConfig->choice.setup.sr_PUCCH_ResourceIndex; - phy_vars_ue->scheduling_request_config[eNB_id].sr_ConfigIndex=physicalConfigDedicated->schedulingRequestConfig->choice.setup.sr_ConfigIndex; - phy_vars_ue->scheduling_request_config[eNB_id].dsr_TransMax=physicalConfigDedicated->schedulingRequestConfig->choice.setup.dsr_TransMax; + phy_vars_ue->scheduling_request_config[eNB_id].sr_ConfigIndex = physicalConfigDedicated->schedulingRequestConfig->choice.setup.sr_ConfigIndex; + phy_vars_ue->scheduling_request_config[eNB_id].dsr_TransMax = physicalConfigDedicated->schedulingRequestConfig->choice.setup.dsr_TransMax; - LOG_D(PHY,"scheduling_request_config.sr_PUCCH_ResourceIndex %d\n",phy_vars_ue->scheduling_request_config[eNB_id].sr_PUCCH_ResourceIndex); - LOG_D(PHY,"scheduling_request_config.sr_ConfigIndex %d\n",phy_vars_ue->scheduling_request_config[eNB_id].sr_ConfigIndex); - LOG_D(PHY,"scheduling_request_config.dsr_TransMax %d\n",phy_vars_ue->scheduling_request_config[eNB_id].dsr_TransMax); + LOG_D (PHY, "scheduling_request_config.sr_PUCCH_ResourceIndex %d\n", phy_vars_ue->scheduling_request_config[eNB_id].sr_PUCCH_ResourceIndex); + LOG_D (PHY, "scheduling_request_config.sr_ConfigIndex %d\n", phy_vars_ue->scheduling_request_config[eNB_id].sr_ConfigIndex); + LOG_D (PHY, "scheduling_request_config.dsr_TransMax %d\n", phy_vars_ue->scheduling_request_config[eNB_id].dsr_TransMax); } - LOG_D(PHY,"------------------------------------------------------------\n"); + LOG_D (PHY, "------------------------------------------------------------\n"); } @@ -1151,19 +1127,19 @@ void phy_config_dedicated_ue(uint8_t Mod_id,int CC_id,uint8_t eNB_id, phy_vars_ue->soundingrs_ul_config_dedicated[eNB_id].srsConfigDedicatedSetup = 0; if (physicalConfigDedicated->soundingRS_UL_ConfigDedicated->present == SoundingRS_UL_ConfigDedicated_PR_setup) { phy_vars_ue->soundingrs_ul_config_dedicated[eNB_id].srsConfigDedicatedSetup = 1; - phy_vars_ue->soundingrs_ul_config_dedicated[eNB_id].duration = physicalConfigDedicated->soundingRS_UL_ConfigDedicated->choice.setup.duration; - phy_vars_ue->soundingrs_ul_config_dedicated[eNB_id].cyclicShift = physicalConfigDedicated->soundingRS_UL_ConfigDedicated->choice.setup.cyclicShift; - phy_vars_ue->soundingrs_ul_config_dedicated[eNB_id].freqDomainPosition = physicalConfigDedicated->soundingRS_UL_ConfigDedicated->choice.setup.freqDomainPosition; - phy_vars_ue->soundingrs_ul_config_dedicated[eNB_id].srs_Bandwidth = physicalConfigDedicated->soundingRS_UL_ConfigDedicated->choice.setup.srs_Bandwidth; - phy_vars_ue->soundingrs_ul_config_dedicated[eNB_id].srs_ConfigIndex = physicalConfigDedicated->soundingRS_UL_ConfigDedicated->choice.setup.srs_ConfigIndex; + phy_vars_ue->soundingrs_ul_config_dedicated[eNB_id].duration = physicalConfigDedicated->soundingRS_UL_ConfigDedicated->choice.setup.duration; + phy_vars_ue->soundingrs_ul_config_dedicated[eNB_id].cyclicShift = physicalConfigDedicated->soundingRS_UL_ConfigDedicated->choice.setup.cyclicShift; + phy_vars_ue->soundingrs_ul_config_dedicated[eNB_id].freqDomainPosition = physicalConfigDedicated->soundingRS_UL_ConfigDedicated->choice.setup.freqDomainPosition; + phy_vars_ue->soundingrs_ul_config_dedicated[eNB_id].srs_Bandwidth = physicalConfigDedicated->soundingRS_UL_ConfigDedicated->choice.setup.srs_Bandwidth; + phy_vars_ue->soundingrs_ul_config_dedicated[eNB_id].srs_ConfigIndex = physicalConfigDedicated->soundingRS_UL_ConfigDedicated->choice.setup.srs_ConfigIndex; phy_vars_ue->soundingrs_ul_config_dedicated[eNB_id].srs_HoppingBandwidth = physicalConfigDedicated->soundingRS_UL_ConfigDedicated->choice.setup.srs_HoppingBandwidth; - phy_vars_ue->soundingrs_ul_config_dedicated[eNB_id].transmissionComb = physicalConfigDedicated->soundingRS_UL_ConfigDedicated->choice.setup.transmissionComb; + phy_vars_ue->soundingrs_ul_config_dedicated[eNB_id].transmissionComb = physicalConfigDedicated->soundingRS_UL_ConfigDedicated->choice.setup.transmissionComb; - LOG_D(PHY,"soundingrs_ul_config_dedicated.srs_ConfigIndex %d\n",phy_vars_ue->soundingrs_ul_config_dedicated[eNB_id].srs_ConfigIndex); + LOG_D (PHY, "soundingrs_ul_config_dedicated.srs_ConfigIndex %d\n", phy_vars_ue->soundingrs_ul_config_dedicated[eNB_id].srs_ConfigIndex); } - LOG_D(PHY,"------------------------------------------------------------\n"); + LOG_D (PHY, "------------------------------------------------------------\n"); } @@ -1173,112 +1149,107 @@ void phy_config_dedicated_ue(uint8_t Mod_id,int CC_id,uint8_t eNB_id, // configure PUSCH CQI reporting phy_vars_ue->cqi_report_config[eNB_id].cqi_ReportModeAperiodic = *physicalConfigDedicated->cqi_ReportConfig->cqi_ReportModeAperiodic; if ((phy_vars_ue->cqi_report_config[eNB_id].cqi_ReportModeAperiodic != rm12) && - (phy_vars_ue->cqi_report_config[eNB_id].cqi_ReportModeAperiodic != rm30) && - (phy_vars_ue->cqi_report_config[eNB_id].cqi_ReportModeAperiodic != rm31)) - LOG_E(PHY,"Unsupported Aperiodic CQI Feedback Mode : %d\n",phy_vars_ue->cqi_report_config[eNB_id].cqi_ReportModeAperiodic); + (phy_vars_ue->cqi_report_config[eNB_id].cqi_ReportModeAperiodic != rm30) && (phy_vars_ue->cqi_report_config[eNB_id].cqi_ReportModeAperiodic != rm31)) + LOG_E (PHY, "Unsupported Aperiodic CQI Feedback Mode : %d\n", phy_vars_ue->cqi_report_config[eNB_id].cqi_ReportModeAperiodic); } if (physicalConfigDedicated->cqi_ReportConfig->cqi_ReportPeriodic) { if (physicalConfigDedicated->cqi_ReportConfig->cqi_ReportPeriodic->present == CQI_ReportPeriodic_PR_setup) { - // configure PUCCH CQI reporting + // configure PUCCH CQI reporting phy_vars_ue->cqi_report_config[eNB_id].CQI_ReportPeriodic.cqi_PUCCH_ResourceIndex = physicalConfigDedicated->cqi_ReportConfig->cqi_ReportPeriodic->choice.setup.cqi_PUCCH_ResourceIndex; - phy_vars_ue->cqi_report_config[eNB_id].CQI_ReportPeriodic.cqi_PMI_ConfigIndex = physicalConfigDedicated->cqi_ReportConfig->cqi_ReportPeriodic->choice.setup.cqi_pmi_ConfigIndex; + phy_vars_ue->cqi_report_config[eNB_id].CQI_ReportPeriodic.cqi_PMI_ConfigIndex = physicalConfigDedicated->cqi_ReportConfig->cqi_ReportPeriodic->choice.setup.cqi_pmi_ConfigIndex; if (physicalConfigDedicated->cqi_ReportConfig->cqi_ReportPeriodic->choice.setup.ri_ConfigIndex) phy_vars_ue->cqi_report_config[eNB_id].CQI_ReportPeriodic.ri_ConfigIndex = *physicalConfigDedicated->cqi_ReportConfig->cqi_ReportPeriodic->choice.setup.ri_ConfigIndex; - } - else if (physicalConfigDedicated->cqi_ReportConfig->cqi_ReportPeriodic->present == CQI_ReportPeriodic_PR_release) { + } else if (physicalConfigDedicated->cqi_ReportConfig->cqi_ReportPeriodic->present == CQI_ReportPeriodic_PR_release) { // handle release phy_vars_ue->cqi_report_config[eNB_id].CQI_ReportPeriodic.ri_ConfigIndex = -1; phy_vars_ue->cqi_report_config[eNB_id].CQI_ReportPeriodic.cqi_PMI_ConfigIndex = -1; } } } - #ifdef CBA if (physicalConfigDedicated->pusch_CBAConfigDedicated_vlola) { - phy_vars_ue->pusch_ca_config_dedicated[eNB_id].betaOffset_CA_Index = (uint16_t) *physicalConfigDedicated->pusch_CBAConfigDedicated_vlola->betaOffset_CBA_Index; - phy_vars_ue->pusch_ca_config_dedicated[eNB_id].cShift = (uint16_t) *physicalConfigDedicated->pusch_CBAConfigDedicated_vlola->cShift_CBA; - LOG_D(PHY,"[UE %d ] physicalConfigDedicated pusch CBA config dedicated: beta offset %d cshift %d \n",Mod_id, - phy_vars_ue->pusch_ca_config_dedicated[eNB_id].betaOffset_CA_Index, - phy_vars_ue->pusch_ca_config_dedicated[eNB_id].cShift); + phy_vars_ue->pusch_ca_config_dedicated[eNB_id].betaOffset_CA_Index = (uint16_t) * physicalConfigDedicated->pusch_CBAConfigDedicated_vlola->betaOffset_CBA_Index; + phy_vars_ue->pusch_ca_config_dedicated[eNB_id].cShift = (uint16_t) * physicalConfigDedicated->pusch_CBAConfigDedicated_vlola->cShift_CBA; + LOG_D (PHY, "[UE %d ] physicalConfigDedicated pusch CBA config dedicated: beta offset %d cshift %d \n", Mod_id, + phy_vars_ue->pusch_ca_config_dedicated[eNB_id].betaOffset_CA_Index, phy_vars_ue->pusch_ca_config_dedicated[eNB_id].cShift); } - #endif } else { - LOG_D(PHY,"[PHY][UE %d] Received NULL radioResourceConfigDedicated from eNB %d\n",Mod_id,eNB_id); + LOG_D (PHY, "[PHY][UE %d] Received NULL radioResourceConfigDedicated from eNB %d\n", Mod_id, eNB_id); return; } // fill cqi parameters for periodic CQI reporting - get_cqipmiri_params(phy_vars_ue,eNB_id); + get_cqipmiri_params (phy_vars_ue, eNB_id); // disable MIB SIB decoding once we are on connected mode - first_dedicated_configuration ++; - if(first_dedicated_configuration > 1) - { - LOG_I(PHY,"Disable SIB MIB decoding \n"); - phy_vars_ue->decode_SIB = 0; - phy_vars_ue->decode_MIB = 0; + first_dedicated_configuration++; + if (first_dedicated_configuration > 1) { + LOG_I (PHY, "Disable SIB MIB decoding \n"); + phy_vars_ue->decode_SIB = 0; + phy_vars_ue->decode_MIB = 0; } //phy_vars_ue->pdcch_vars[1][eNB_id]->crnti = phy_vars_ue->pdcch_vars[0][eNB_id]->crnti; - if(phy_vars_ue->pdcch_vars[0][eNB_id]->crnti == 0x1234) + if (phy_vars_ue->pdcch_vars[0][eNB_id]->crnti == 0x1234) phy_vars_ue->pdcch_vars[0][eNB_id]->crnti = phy_vars_ue->pdcch_vars[1][eNB_id]->crnti; else phy_vars_ue->pdcch_vars[1][eNB_id]->crnti = phy_vars_ue->pdcch_vars[0][eNB_id]->crnti; - LOG_I(PHY,"C-RNTI %x %x \n", phy_vars_ue->pdcch_vars[0][eNB_id]->crnti, - phy_vars_ue->pdcch_vars[1][eNB_id]->crnti); + LOG_I (PHY, "C-RNTI %x %x \n", phy_vars_ue->pdcch_vars[0][eNB_id]->crnti, phy_vars_ue->pdcch_vars[1][eNB_id]->crnti); } -void phy_config_cba_rnti (module_id_t Mod_id,int CC_id,eNB_flag_t eNB_flag, uint8_t index, rnti_t cba_rnti, uint8_t cba_group_id, uint8_t num_active_cba_groups) +void +phy_config_cba_rnti (module_id_t Mod_id, int CC_id, eNB_flag_t eNB_flag, uint8_t index, rnti_t cba_rnti, uint8_t cba_group_id, uint8_t num_active_cba_groups) { // uint8_t i; - if (eNB_flag == 0 ) { + if (eNB_flag == 0) { //LOG_D(PHY,"[UE %d] configure cba group %d with rnti %x, num active cba grp %d\n", index, index, cba_rnti, num_active_cba_groups); - PHY_vars_UE_g[Mod_id][CC_id]->ulsch[index]->num_active_cba_groups=num_active_cba_groups; - PHY_vars_UE_g[Mod_id][CC_id]->ulsch[index]->cba_rnti[cba_group_id]=cba_rnti; + PHY_vars_UE_g[Mod_id][CC_id]->ulsch[index]->num_active_cba_groups = num_active_cba_groups; + PHY_vars_UE_g[Mod_id][CC_id]->ulsch[index]->cba_rnti[cba_group_id] = cba_rnti; } else { //for (i=index; i < NUMBER_OF_UE_MAX; i+=num_active_cba_groups){ // LOG_D(PHY,"[eNB %d] configure cba group %d with rnti %x for UE %d, num active cba grp %d\n",Mod_id, i%num_active_cba_groups, cba_rnti, i, num_active_cba_groups); - RC.eNB[Mod_id][CC_id]->ulsch[index]->num_active_cba_groups=num_active_cba_groups; + RC.eNB[Mod_id][CC_id]->ulsch[index]->num_active_cba_groups = num_active_cba_groups; RC.eNB[Mod_id][CC_id]->ulsch[index]->cba_rnti[cba_group_id] = cba_rnti; //} } } -void init_lte_top(LTE_DL_FRAME_PARMS *frame_parms) +void +init_lte_top (LTE_DL_FRAME_PARMS * frame_parms) { - crcTableInit(); + crcTableInit (); - ccodedot11_init(); - ccodedot11_init_inv(); + ccodedot11_init (); + ccodedot11_init_inv (); - ccodelte_init(); - ccodelte_init_inv(); + ccodelte_init (); + ccodelte_init_inv (); - treillis_table_init(); + treillis_table_init (); - phy_generate_viterbi_tables(); - phy_generate_viterbi_tables_lte(); - init_td8(); - init_td16(); + phy_generate_viterbi_tables (); + phy_generate_viterbi_tables_lte (); + init_td8 (); + init_td16 (); #ifdef __AVX2__ - init_td16avx2(); + init_td16avx2 (); #endif - lte_sync_time_init(frame_parms); + lte_sync_time_init (frame_parms); - generate_ul_ref_sigs(); - generate_ul_ref_sigs_rx(); + generate_ul_ref_sigs (); + generate_ul_ref_sigs_rx (); - generate_64qam_table(); - generate_16qam_table(); - generate_RIV_tables(); + generate_64qam_table (); + generate_16qam_table (); + generate_RIV_tables (); - init_unscrambling_lut(); - init_scrambling_lut(); + init_unscrambling_lut (); + init_scrambling_lut (); //set_taus_seed(1328); @@ -1289,92 +1260,92 @@ void init_lte_top(LTE_DL_FRAME_PARMS *frame_parms) * \param[in] frame_parms LTE_DL_FRAME_PARMS structure. * \note This function is optimistic in that it expects malloc() to succeed. */ -void phy_init_lte_ue__PDSCH( LTE_UE_PDSCH* const pdsch, const LTE_DL_FRAME_PARMS* const fp ) +void +phy_init_lte_ue__PDSCH (LTE_UE_PDSCH * const pdsch, const LTE_DL_FRAME_PARMS * const fp) { - AssertFatal( pdsch, "pdsch==0" ); + AssertFatal (pdsch, "pdsch==0"); - pdsch->pmi_ext = (uint8_t*)malloc16_clear( fp->N_RB_DL ); - pdsch->llr[0] = (int16_t*)malloc16_clear( (8*((3*8*6144)+12))*sizeof(int16_t) ); - pdsch->llr128 = (int16_t**)malloc16_clear( sizeof(int16_t*) ); + pdsch->pmi_ext = (uint8_t *) malloc16_clear (fp->N_RB_DL); + pdsch->llr[0] = (int16_t *) malloc16_clear ((8 * ((3 * 8 * 6144) + 12)) * sizeof (int16_t)); + pdsch->llr128 = (int16_t **) malloc16_clear (sizeof (int16_t *)); // FIXME! no further allocation for (int16_t*)pdsch->llr128 !!! expect SIGSEGV // FK, 11-3-2015: this is only as a temporary pointer, no memory is stored there - pdsch->rxdataF_ext = (int32_t**)malloc16_clear( 8*sizeof(int32_t*) ); - pdsch->rxdataF_uespec_pilots = (int32_t**)malloc16_clear( 8*sizeof(int32_t*) ); - pdsch->rxdataF_comp0 = (int32_t**)malloc16_clear( 8*sizeof(int32_t*) ); - pdsch->rho = (int32_t**)malloc16_clear( fp->nb_antennas_rx*sizeof(int32_t*) ); - pdsch->dl_ch_estimates_ext = (int32_t**)malloc16_clear( 8*sizeof(int32_t*) ); - pdsch->dl_bf_ch_estimates = (int32_t**)malloc16_clear( 8*sizeof(int32_t*) ); - pdsch->dl_bf_ch_estimates_ext = (int32_t**)malloc16_clear( 8*sizeof(int32_t*) ); + pdsch->rxdataF_ext = (int32_t **) malloc16_clear (8 * sizeof (int32_t *)); + pdsch->rxdataF_uespec_pilots = (int32_t **) malloc16_clear (8 * sizeof (int32_t *)); + pdsch->rxdataF_comp0 = (int32_t **) malloc16_clear (8 * sizeof (int32_t *)); + pdsch->rho = (int32_t **) malloc16_clear (fp->nb_antennas_rx * sizeof (int32_t *)); + pdsch->dl_ch_estimates_ext = (int32_t **) malloc16_clear (8 * sizeof (int32_t *)); + pdsch->dl_bf_ch_estimates = (int32_t **) malloc16_clear (8 * sizeof (int32_t *)); + pdsch->dl_bf_ch_estimates_ext = (int32_t **) malloc16_clear (8 * sizeof (int32_t *)); //pdsch->dl_ch_rho_ext = (int32_t**)malloc16_clear( 8*sizeof(int32_t*) ); //pdsch->dl_ch_rho2_ext = (int32_t**)malloc16_clear( 8*sizeof(int32_t*) ); - pdsch->dl_ch_mag0 = (int32_t**)malloc16_clear( 8*sizeof(int32_t*) ); - pdsch->dl_ch_magb0 = (int32_t**)malloc16_clear( 8*sizeof(int32_t*) ); + pdsch->dl_ch_mag0 = (int32_t **) malloc16_clear (8 * sizeof (int32_t *)); + pdsch->dl_ch_magb0 = (int32_t **) malloc16_clear (8 * sizeof (int32_t *)); // the allocated memory size is fixed: - AssertFatal( fp->nb_antennas_rx <= 2, "nb_antennas_rx > 2" ); + AssertFatal (fp->nb_antennas_rx <= 2, "nb_antennas_rx > 2"); - for (int i=0; inb_antennas_rx; i++) { - pdsch->rho[i] = (int32_t*)malloc16_clear( sizeof(int32_t)*(fp->N_RB_DL*12*7*2) ); + for (int i = 0; i < fp->nb_antennas_rx; i++) { + pdsch->rho[i] = (int32_t *) malloc16_clear (sizeof (int32_t) * (fp->N_RB_DL * 12 * 7 * 2)); - for (int j=0; j<4; j++) { //fp->nb_antennas_tx; j++) - const int idx = (j<<1)+i; - const size_t num = 7*2*fp->N_RB_DL*12; - pdsch->rxdataF_ext[idx] = (int32_t*)malloc16_clear( sizeof(int32_t) * num ); - pdsch->rxdataF_uespec_pilots[idx] = (int32_t*)malloc16_clear( sizeof(int32_t) * fp->N_RB_DL*12); - pdsch->rxdataF_comp0[idx] = (int32_t*)malloc16_clear( sizeof(int32_t) * num ); - pdsch->dl_ch_estimates_ext[idx] = (int32_t*)malloc16_clear( sizeof(int32_t) * num ); - pdsch->dl_bf_ch_estimates[idx] = (int32_t*)malloc16_clear( sizeof(int32_t) * fp->ofdm_symbol_size*7*2); - pdsch->dl_bf_ch_estimates_ext[idx] = (int32_t*)malloc16_clear( sizeof(int32_t) * num ); + for (int j = 0; j < 4; j++) { //fp->nb_antennas_tx; j++) + const int idx = (j << 1) + i; + const size_t num = 7 * 2 * fp->N_RB_DL * 12; + pdsch->rxdataF_ext[idx] = (int32_t *) malloc16_clear (sizeof (int32_t) * num); + pdsch->rxdataF_uespec_pilots[idx] = (int32_t *) malloc16_clear (sizeof (int32_t) * fp->N_RB_DL * 12); + pdsch->rxdataF_comp0[idx] = (int32_t *) malloc16_clear (sizeof (int32_t) * num); + pdsch->dl_ch_estimates_ext[idx] = (int32_t *) malloc16_clear (sizeof (int32_t) * num); + pdsch->dl_bf_ch_estimates[idx] = (int32_t *) malloc16_clear (sizeof (int32_t) * fp->ofdm_symbol_size * 7 * 2); + pdsch->dl_bf_ch_estimates_ext[idx] = (int32_t *) malloc16_clear (sizeof (int32_t) * num); //pdsch->dl_ch_rho_ext[idx] = (int32_t*)malloc16_clear( sizeof(int32_t) * num ); //pdsch->dl_ch_rho2_ext[idx] = (int32_t*)malloc16_clear( sizeof(int32_t) * num ); - pdsch->dl_ch_mag0[idx] = (int32_t*)malloc16_clear( sizeof(int32_t) * num ); - pdsch->dl_ch_magb0[idx] = (int32_t*)malloc16_clear( sizeof(int32_t) * num ); + pdsch->dl_ch_mag0[idx] = (int32_t *) malloc16_clear (sizeof (int32_t) * num); + pdsch->dl_ch_magb0[idx] = (int32_t *) malloc16_clear (sizeof (int32_t) * num); } } } -int init_lte_ue_signal(PHY_VARS_UE *ue, - int nb_connected_eNB, - uint8_t abstraction_flag) +int +init_lte_ue_signal (PHY_VARS_UE * ue, int nb_connected_eNB, uint8_t abstraction_flag) { // create shortcuts - LTE_DL_FRAME_PARMS* const fp = &ue->frame_parms; - LTE_UE_COMMON* const common_vars = &ue->common_vars; - LTE_UE_PDSCH** const pdsch_vars_SI = ue->pdsch_vars_SI; - LTE_UE_PDSCH** const pdsch_vars_ra = ue->pdsch_vars_ra; - LTE_UE_PDSCH** const pdsch_vars_p = ue->pdsch_vars_p; - LTE_UE_PDSCH** const pdsch_vars_mch = ue->pdsch_vars_MCH; - LTE_UE_PDSCH* (*pdsch_vars_th)[][NUMBER_OF_CONNECTED_eNB_MAX+1] = &ue->pdsch_vars; - LTE_UE_PDCCH* (*pdcch_vars_th)[][NUMBER_OF_CONNECTED_eNB_MAX] = &ue->pdcch_vars; - LTE_UE_PBCH** const pbch_vars = ue->pbch_vars; - LTE_UE_PRACH** const prach_vars = ue->prach_vars; + LTE_DL_FRAME_PARMS *const fp = &ue->frame_parms; + LTE_UE_COMMON *const common_vars = &ue->common_vars; + LTE_UE_PDSCH **const pdsch_vars_SI = ue->pdsch_vars_SI; + LTE_UE_PDSCH **const pdsch_vars_ra = ue->pdsch_vars_ra; + LTE_UE_PDSCH **const pdsch_vars_p = ue->pdsch_vars_p; + LTE_UE_PDSCH **const pdsch_vars_mch = ue->pdsch_vars_MCH; + LTE_UE_PDSCH *(*pdsch_vars_th)[][NUMBER_OF_CONNECTED_eNB_MAX + 1] = &ue->pdsch_vars; + LTE_UE_PDCCH *(*pdcch_vars_th)[][NUMBER_OF_CONNECTED_eNB_MAX] = &ue->pdcch_vars; + LTE_UE_PBCH **const pbch_vars = ue->pbch_vars; + LTE_UE_PRACH **const prach_vars = ue->prach_vars; - int i,j,k,l; - int eNB_id; - int th_id; + int i, j, k, l; + int eNB_id; + int th_id; - LOG_D(PHY,"Initializing UE vars (abstraction %"PRIu8") for eNB TXant %"PRIu8", UE RXant %"PRIu8"\n",abstraction_flag,fp->nb_antennas_tx,fp->nb_antennas_rx); - LOG_D(PHY,"[MSC_NEW][FRAME 00000][PHY_UE][MOD %02u][]\n", ue->Mod_id+NB_eNB_INST); + LOG_D (PHY, "Initializing UE vars (abstraction %" PRIu8 ") for eNB TXant %" PRIu8 ", UE RXant %" PRIu8 "\n", abstraction_flag, fp->nb_antennas_tx, fp->nb_antennas_rx); + LOG_D (PHY, "[MSC_NEW][FRAME 00000][PHY_UE][MOD %02u][]\n", ue->Mod_id + NB_eNB_INST); - init_frame_parms(&ue->frame_parms,1); - init_lte_top(&ue->frame_parms); - init_ul_hopping(&ue->frame_parms); + init_frame_parms (&ue->frame_parms, 1); + init_lte_top (&ue->frame_parms); + init_ul_hopping (&ue->frame_parms); // many memory allocation sizes are hard coded - AssertFatal( fp->nb_antennas_rx <= 2, "hard coded allocation for ue_common_vars->dl_ch_estimates[eNB_id]" ); - AssertFatal( ue->n_connected_eNB <= NUMBER_OF_CONNECTED_eNB_MAX, "n_connected_eNB is too large" ); + AssertFatal (fp->nb_antennas_rx <= 2, "hard coded allocation for ue_common_vars->dl_ch_estimates[eNB_id]"); + AssertFatal (ue->n_connected_eNB <= NUMBER_OF_CONNECTED_eNB_MAX, "n_connected_eNB is too large"); // init phy_vars_ue - for (i=0; i<4; i++) { + for (i = 0; i < 4; i++) { ue->rx_gain_max[i] = 135; ue->rx_gain_med[i] = 128; ue->rx_gain_byp[i] = 120; @@ -1382,555 +1353,552 @@ int init_lte_ue_signal(PHY_VARS_UE *ue, ue->n_connected_eNB = nb_connected_eNB; - for(eNB_id = 0; eNB_id < ue->n_connected_eNB; eNB_id++) { + for (eNB_id = 0; eNB_id < ue->n_connected_eNB; eNB_id++) { ue->total_TBS[eNB_id] = 0; ue->total_TBS_last[eNB_id] = 0; ue->bitrate[eNB_id] = 0; ue->total_received_bits[eNB_id] = 0; } - for (i=0;i<10;i++) - ue->tx_power_dBm[i]=-127; + for (i = 0; i < 10; i++) + ue->tx_power_dBm[i] = -127; // init TX buffers - - common_vars->txdata = (int32_t**)malloc16( fp->nb_antennas_tx*sizeof(int32_t*) ); - common_vars->txdataF = (int32_t **)malloc16( fp->nb_antennas_tx*sizeof(int32_t*) ); - - for (i=0; inb_antennas_tx; i++) { - - common_vars->txdata[i] = (int32_t*)malloc16_clear( fp->samples_per_tti*10*sizeof(int32_t) ); - common_vars->txdataF[i] = (int32_t *)malloc16_clear( fp->ofdm_symbol_size*fp->symbols_per_tti*10*sizeof(int32_t) ); + + common_vars->txdata = (int32_t **) malloc16 (fp->nb_antennas_tx * sizeof (int32_t *)); + common_vars->txdataF = (int32_t **) malloc16 (fp->nb_antennas_tx * sizeof (int32_t *)); + + for (i = 0; i < fp->nb_antennas_tx; i++) { + + common_vars->txdata[i] = (int32_t *) malloc16_clear (fp->samples_per_tti * 10 * sizeof (int32_t)); + common_vars->txdataF[i] = (int32_t *) malloc16_clear (fp->ofdm_symbol_size * fp->symbols_per_tti * 10 * sizeof (int32_t)); } - + // init RX buffers - - common_vars->rxdata = (int32_t**)malloc16( fp->nb_antennas_rx*sizeof(int32_t*) ); - common_vars->common_vars_rx_data_per_thread[0].rxdataF = (int32_t**)malloc16( fp->nb_antennas_rx*sizeof(int32_t*) ); - common_vars->common_vars_rx_data_per_thread[1].rxdataF = (int32_t**)malloc16( fp->nb_antennas_rx*sizeof(int32_t*) ); - - for (i=0; inb_antennas_rx; i++) { - common_vars->rxdata[i] = (int32_t*) malloc16_clear( (fp->samples_per_tti*10+2048)*sizeof(int32_t) ); - common_vars->common_vars_rx_data_per_thread[0].rxdataF[i] = (int32_t*)malloc16_clear( sizeof(int32_t)*(fp->ofdm_symbol_size*14) ); - common_vars->common_vars_rx_data_per_thread[1].rxdataF[i] = (int32_t*)malloc16_clear( sizeof(int32_t)*(fp->ofdm_symbol_size*14) ); + + common_vars->rxdata = (int32_t **) malloc16 (fp->nb_antennas_rx * sizeof (int32_t *)); + common_vars->common_vars_rx_data_per_thread[0].rxdataF = (int32_t **) malloc16 (fp->nb_antennas_rx * sizeof (int32_t *)); + common_vars->common_vars_rx_data_per_thread[1].rxdataF = (int32_t **) malloc16 (fp->nb_antennas_rx * sizeof (int32_t *)); + + for (i = 0; i < fp->nb_antennas_rx; i++) { + common_vars->rxdata[i] = (int32_t *) malloc16_clear ((fp->samples_per_tti * 10 + 2048) * sizeof (int32_t)); + common_vars->common_vars_rx_data_per_thread[0].rxdataF[i] = (int32_t *) malloc16_clear (sizeof (int32_t) * (fp->ofdm_symbol_size * 14)); + common_vars->common_vars_rx_data_per_thread[1].rxdataF[i] = (int32_t *) malloc16_clear (sizeof (int32_t) * (fp->ofdm_symbol_size * 14)); } // Channel estimates - for (eNB_id=0; eNB_id<7; eNB_id++) { - for (th_id=0; th_idcommon_vars_rx_data_per_thread[th_id].dl_ch_estimates[eNB_id] = (int32_t**)malloc16_clear(8*sizeof(int32_t*)); - common_vars->common_vars_rx_data_per_thread[th_id].dl_ch_estimates_time[eNB_id] = (int32_t**)malloc16_clear(8*sizeof(int32_t*)); + for (eNB_id = 0; eNB_id < 7; eNB_id++) { + for (th_id = 0; th_id < RX_NB_TH_MAX; th_id++) { + common_vars->common_vars_rx_data_per_thread[th_id].dl_ch_estimates[eNB_id] = (int32_t **) malloc16_clear (8 * sizeof (int32_t *)); + common_vars->common_vars_rx_data_per_thread[th_id].dl_ch_estimates_time[eNB_id] = (int32_t **) malloc16_clear (8 * sizeof (int32_t *)); } - for (i=0; inb_antennas_rx; i++) - for (j=0; j<4; j++) { - int idx = (j<<1) + i; - for (th_id=0; th_idcommon_vars_rx_data_per_thread[th_id].dl_ch_estimates[eNB_id][idx] = (int32_t*)malloc16_clear( sizeof(int32_t)*fp->symbols_per_tti*(fp->ofdm_symbol_size+LTE_CE_FILTER_LENGTH) ); - common_vars->common_vars_rx_data_per_thread[th_id].dl_ch_estimates_time[eNB_id][idx] = (int32_t*)malloc16_clear( sizeof(int32_t)*fp->ofdm_symbol_size*2 ); + for (i = 0; i < fp->nb_antennas_rx; i++) + for (j = 0; j < 4; j++) { + int idx = (j << 1) + i; + for (th_id = 0; th_id < RX_NB_TH_MAX; th_id++) { + common_vars->common_vars_rx_data_per_thread[th_id].dl_ch_estimates[eNB_id][idx] = + (int32_t *) malloc16_clear (sizeof (int32_t) * fp->symbols_per_tti * (fp->ofdm_symbol_size + LTE_CE_FILTER_LENGTH)); + common_vars->common_vars_rx_data_per_thread[th_id].dl_ch_estimates_time[eNB_id][idx] = (int32_t *) malloc16_clear (sizeof (int32_t) * fp->ofdm_symbol_size * 2); } } } // DLSCH - for (eNB_id=0; eNB_idn_connected_eNB; eNB_id++) { - for (th_id=0; th_idn_connected_eNB; eNB_id++) { + for (th_id = 0; th_id < RX_NB_TH_MAX; th_id++) { + (*pdsch_vars_th)[th_id][eNB_id] = (LTE_UE_PDSCH *) malloc16_clear (sizeof (LTE_UE_PDSCH)); } - for (th_id=0; th_idllr_shifts = (uint8_t*)malloc16_clear(7*2*fp->N_RB_DL*12); - (*pdsch_vars_th)[th_id][eNB_id]->llr_shifts_p = (*pdsch_vars_th)[0][eNB_id]->llr_shifts; - (*pdsch_vars_th)[th_id][eNB_id]->llr[1] = (int16_t*)malloc16_clear( (8*((3*8*6144)+12))*sizeof(int16_t) ); - (*pdsch_vars_th)[th_id][eNB_id]->llr128_2ndstream = (int16_t**)malloc16_clear( sizeof(int16_t*) ); - (*pdsch_vars_th)[th_id][eNB_id]->rho = (int32_t**)malloc16_clear( fp->nb_antennas_rx*sizeof(int32_t*) ); + for (th_id = 0; th_id < RX_NB_TH_MAX; th_id++) { + (*pdsch_vars_th)[th_id][eNB_id]->llr_shifts = (uint8_t *) malloc16_clear (7 * 2 * fp->N_RB_DL * 12); + (*pdsch_vars_th)[th_id][eNB_id]->llr_shifts_p = (*pdsch_vars_th)[0][eNB_id]->llr_shifts; + (*pdsch_vars_th)[th_id][eNB_id]->llr[1] = (int16_t *) malloc16_clear ((8 * ((3 * 8 * 6144) + 12)) * sizeof (int16_t)); + (*pdsch_vars_th)[th_id][eNB_id]->llr128_2ndstream = (int16_t **) malloc16_clear (sizeof (int16_t *)); + (*pdsch_vars_th)[th_id][eNB_id]->rho = (int32_t **) malloc16_clear (fp->nb_antennas_rx * sizeof (int32_t *)); } - - for (int i=0; inb_antennas_rx; i++){ - for (th_id=0; th_idrho[i] = (int32_t*)malloc16_clear( 7*2*sizeof(int32_t)*(fp->N_RB_DL*12) ); + + for (int i = 0; i < fp->nb_antennas_rx; i++) { + for (th_id = 0; th_id < RX_NB_TH_MAX; th_id++) { + (*pdsch_vars_th)[th_id][eNB_id]->rho[i] = (int32_t *) malloc16_clear (7 * 2 * sizeof (int32_t) * (fp->N_RB_DL * 12)); } - + } - for (th_id=0; th_iddl_ch_rho2_ext = (int32_t**)malloc16_clear( 8*sizeof(int32_t*) ); + for (th_id = 0; th_id < RX_NB_TH_MAX; th_id++) { + (*pdsch_vars_th)[th_id][eNB_id]->dl_ch_rho2_ext = (int32_t **) malloc16_clear (8 * sizeof (int32_t *)); } - - for (i=0; inb_antennas_rx; i++) - for (j=0; j<4; j++) { - const int idx = (j<<1)+i; - const size_t num = 7*2*fp->N_RB_DL*12+4; - for (th_id=0; th_iddl_ch_rho2_ext[idx] = (int32_t*)malloc16_clear( sizeof(int32_t) * num ); - } - + + for (i = 0; i < fp->nb_antennas_rx; i++) + for (j = 0; j < 4; j++) { + const int idx = (j << 1) + i; + const size_t num = 7 * 2 * fp->N_RB_DL * 12 + 4; + for (th_id = 0; th_id < RX_NB_TH_MAX; th_id++) { + (*pdsch_vars_th)[th_id][eNB_id]->dl_ch_rho2_ext[idx] = (int32_t *) malloc16_clear (sizeof (int32_t) * num); + } + } - + //const size_t num = 7*2*fp->N_RB_DL*12+4; - for (k=0;k<8;k++) { //harq_pid - for (l=0;l<8;l++) { //round - for (th_id=0; th_idrxdataF_comp1[k][l] = (int32_t**)malloc16_clear( 8*sizeof(int32_t*) ); - (*pdsch_vars_th)[th_id][eNB_id]->dl_ch_rho_ext[k][l] = (int32_t**)malloc16_clear( 8*sizeof(int32_t*) ); - (*pdsch_vars_th)[th_id][eNB_id]->dl_ch_mag1[k][l] = (int32_t**)malloc16_clear( 8*sizeof(int32_t*) ); - (*pdsch_vars_th)[th_id][eNB_id]->dl_ch_magb1[k][l] = (int32_t**)malloc16_clear( 8*sizeof(int32_t*) ); - } - - - for (int i=0; inb_antennas_rx; i++) - for (int j=0; j<4; j++) { //frame_parms->nb_antennas_tx; j++) - const int idx = (j<<1)+i; - for (th_id=0; th_iddl_ch_rho_ext[k][l][idx] = (int32_t*)malloc16_clear( 7*2*sizeof(int32_t)*(fp->N_RB_DL*12) ); - (*pdsch_vars_th)[th_id][eNB_id]->rxdataF_comp1[k][l][idx] = (int32_t*)malloc16_clear( 7*2*sizeof(int32_t)*(fp->N_RB_DL*12) ); - (*pdsch_vars_th)[th_id][eNB_id]->dl_ch_mag1[k][l][idx] = (int32_t*)malloc16_clear( 7*2*sizeof(int32_t)*(fp->N_RB_DL*12) ); - (*pdsch_vars_th)[th_id][eNB_id]->dl_ch_magb1[k][l][idx] = (int32_t*)malloc16_clear( 7*2*sizeof(int32_t)*(fp->N_RB_DL*12) ); - } - - } + for (k = 0; k < 8; k++) { //harq_pid + for (l = 0; l < 8; l++) { //round + for (th_id = 0; th_id < RX_NB_TH_MAX; th_id++) { + (*pdsch_vars_th)[th_id][eNB_id]->rxdataF_comp1[k][l] = (int32_t **) malloc16_clear (8 * sizeof (int32_t *)); + (*pdsch_vars_th)[th_id][eNB_id]->dl_ch_rho_ext[k][l] = (int32_t **) malloc16_clear (8 * sizeof (int32_t *)); + (*pdsch_vars_th)[th_id][eNB_id]->dl_ch_mag1[k][l] = (int32_t **) malloc16_clear (8 * sizeof (int32_t *)); + (*pdsch_vars_th)[th_id][eNB_id]->dl_ch_magb1[k][l] = (int32_t **) malloc16_clear (8 * sizeof (int32_t *)); + } + + + for (int i = 0; i < fp->nb_antennas_rx; i++) + for (int j = 0; j < 4; j++) { //frame_parms->nb_antennas_tx; j++) + const int idx = (j << 1) + i; + for (th_id = 0; th_id < RX_NB_TH_MAX; th_id++) { + (*pdsch_vars_th)[th_id][eNB_id]->dl_ch_rho_ext[k][l][idx] = (int32_t *) malloc16_clear (7 * 2 * sizeof (int32_t) * (fp->N_RB_DL * 12)); + (*pdsch_vars_th)[th_id][eNB_id]->rxdataF_comp1[k][l][idx] = (int32_t *) malloc16_clear (7 * 2 * sizeof (int32_t) * (fp->N_RB_DL * 12)); + (*pdsch_vars_th)[th_id][eNB_id]->dl_ch_mag1[k][l][idx] = (int32_t *) malloc16_clear (7 * 2 * sizeof (int32_t) * (fp->N_RB_DL * 12)); + (*pdsch_vars_th)[th_id][eNB_id]->dl_ch_magb1[k][l][idx] = (int32_t *) malloc16_clear (7 * 2 * sizeof (int32_t) * (fp->N_RB_DL * 12)); + } + + } } } - phy_init_lte_ue__PDSCH( pdsch_vars_SI[eNB_id], fp ); - phy_init_lte_ue__PDSCH( pdsch_vars_ra[eNB_id], fp ); - phy_init_lte_ue__PDSCH( pdsch_vars_p[eNB_id], fp ); - phy_init_lte_ue__PDSCH( pdsch_vars_mch[eNB_id], fp ); - + phy_init_lte_ue__PDSCH (pdsch_vars_SI[eNB_id], fp); + phy_init_lte_ue__PDSCH (pdsch_vars_ra[eNB_id], fp); + phy_init_lte_ue__PDSCH (pdsch_vars_p[eNB_id], fp); + phy_init_lte_ue__PDSCH (pdsch_vars_mch[eNB_id], fp); + // 100 PRBs * 12 REs/PRB * 4 PDCCH SYMBOLS * 2 LLRs/RE - for (th_id=0; th_idllr = (uint16_t*)malloc16_clear( 2*4*100*12*sizeof(uint16_t) ); - (*pdcch_vars_th)[th_id][eNB_id]->llr16 = (uint16_t*)malloc16_clear( 2*4*100*12*sizeof(uint16_t) ); - (*pdcch_vars_th)[th_id][eNB_id]->wbar = (uint16_t*)malloc16_clear( 2*4*100*12*sizeof(uint16_t) ); - (*pdcch_vars_th)[th_id][eNB_id]->e_rx = (int8_t*)malloc16_clear( 4*2*100*12 ); - - (*pdcch_vars_th)[th_id][eNB_id]->rxdataF_comp = (int32_t**)malloc16_clear( 8*sizeof(int32_t*) ); - (*pdcch_vars_th)[th_id][eNB_id]->dl_ch_rho_ext = (int32_t**)malloc16_clear( 8*sizeof(int32_t*) ); - (*pdcch_vars_th)[th_id][eNB_id]->rho = (int32_t**)malloc16( fp->nb_antennas_rx*sizeof(int32_t*) ); - (*pdcch_vars_th)[th_id][eNB_id]->rxdataF_ext = (int32_t**)malloc16_clear( 8*sizeof(int32_t*) ); - (*pdcch_vars_th)[th_id][eNB_id]->dl_ch_estimates_ext = (int32_t**)malloc16_clear( 8*sizeof(int32_t*) ); + for (th_id = 0; th_id < RX_NB_TH_MAX; th_id++) { + (*pdcch_vars_th)[th_id][eNB_id]->llr = (uint16_t *) malloc16_clear (2 * 4 * 100 * 12 * sizeof (uint16_t)); + (*pdcch_vars_th)[th_id][eNB_id]->llr16 = (uint16_t *) malloc16_clear (2 * 4 * 100 * 12 * sizeof (uint16_t)); + (*pdcch_vars_th)[th_id][eNB_id]->wbar = (uint16_t *) malloc16_clear (2 * 4 * 100 * 12 * sizeof (uint16_t)); + (*pdcch_vars_th)[th_id][eNB_id]->e_rx = (int8_t *) malloc16_clear (4 * 2 * 100 * 12); + + (*pdcch_vars_th)[th_id][eNB_id]->rxdataF_comp = (int32_t **) malloc16_clear (8 * sizeof (int32_t *)); + (*pdcch_vars_th)[th_id][eNB_id]->dl_ch_rho_ext = (int32_t **) malloc16_clear (8 * sizeof (int32_t *)); + (*pdcch_vars_th)[th_id][eNB_id]->rho = (int32_t **) malloc16 (fp->nb_antennas_rx * sizeof (int32_t *)); + (*pdcch_vars_th)[th_id][eNB_id]->rxdataF_ext = (int32_t **) malloc16_clear (8 * sizeof (int32_t *)); + (*pdcch_vars_th)[th_id][eNB_id]->dl_ch_estimates_ext = (int32_t **) malloc16_clear (8 * sizeof (int32_t *)); } - - for (i=0; inb_antennas_rx; i++) { + + for (i = 0; i < fp->nb_antennas_rx; i++) { //ue_pdcch_vars[eNB_id]->rho[i] = (int32_t*)malloc16_clear( sizeof(int32_t)*(fp->N_RB_DL*12*7*2) ); - for (th_id=0; th_idrho[i] = (int32_t*)malloc16_clear( sizeof(int32_t)*(100*12*4) ); + for (th_id = 0; th_id < RX_NB_TH_MAX; th_id++) { + (*pdcch_vars_th)[th_id][eNB_id]->rho[i] = (int32_t *) malloc16_clear (sizeof (int32_t) * (100 * 12 * 4)); } - - for (j=0; j<4; j++) { //fp->nb_antennas_tx; j++) - int idx = (j<<1)+i; - // size_t num = 7*2*fp->N_RB_DL*12; - size_t num = 4*100*12; // 4 symbols, 100 PRBs, 12 REs per PRB - for (th_id=0; th_idrxdataF_comp[idx] = (int32_t*)malloc16_clear( sizeof(int32_t) * num ); - (*pdcch_vars_th)[th_id][eNB_id]->dl_ch_rho_ext[idx] = (int32_t*)malloc16_clear( sizeof(int32_t) * num ); - (*pdcch_vars_th)[th_id][eNB_id]->rxdataF_ext[idx] = (int32_t*)malloc16_clear( sizeof(int32_t) * num ); - (*pdcch_vars_th)[th_id][eNB_id]->dl_ch_estimates_ext[idx] = (int32_t*)malloc16_clear( sizeof(int32_t) * num ); - } + + for (j = 0; j < 4; j++) { //fp->nb_antennas_tx; j++) + int idx = (j << 1) + i; + // size_t num = 7*2*fp->N_RB_DL*12; + size_t num = 4 * 100 * 12; // 4 symbols, 100 PRBs, 12 REs per PRB + for (th_id = 0; th_id < RX_NB_TH_MAX; th_id++) { + (*pdcch_vars_th)[th_id][eNB_id]->rxdataF_comp[idx] = (int32_t *) malloc16_clear (sizeof (int32_t) * num); + (*pdcch_vars_th)[th_id][eNB_id]->dl_ch_rho_ext[idx] = (int32_t *) malloc16_clear (sizeof (int32_t) * num); + (*pdcch_vars_th)[th_id][eNB_id]->rxdataF_ext[idx] = (int32_t *) malloc16_clear (sizeof (int32_t) * num); + (*pdcch_vars_th)[th_id][eNB_id]->dl_ch_estimates_ext[idx] = (int32_t *) malloc16_clear (sizeof (int32_t) * num); + } } } - phy_init_lte_ue__PDSCH( pdsch_vars_SI[eNB_id], fp ); - phy_init_lte_ue__PDSCH( pdsch_vars_ra[eNB_id], fp ); - phy_init_lte_ue__PDSCH( pdsch_vars_p[eNB_id], fp ); - phy_init_lte_ue__PDSCH( pdsch_vars_mch[eNB_id], fp ); - + phy_init_lte_ue__PDSCH (pdsch_vars_SI[eNB_id], fp); + phy_init_lte_ue__PDSCH (pdsch_vars_ra[eNB_id], fp); + phy_init_lte_ue__PDSCH (pdsch_vars_p[eNB_id], fp); + phy_init_lte_ue__PDSCH (pdsch_vars_mch[eNB_id], fp); + // 100 PRBs * 12 REs/PRB * 4 PDCCH SYMBOLS * 2 LLRs/RE - for (th_id=0; th_idllr = (uint16_t*)malloc16_clear( 2*4*100*12*sizeof(uint16_t) ); - (*pdcch_vars_th)[th_id][eNB_id]->llr16 = (uint16_t*)malloc16_clear( 2*4*100*12*sizeof(uint16_t) ); - (*pdcch_vars_th)[th_id][eNB_id]->wbar = (uint16_t*)malloc16_clear( 2*4*100*12*sizeof(uint16_t) ); - (*pdcch_vars_th)[th_id][eNB_id]->e_rx = (int8_t*)malloc16_clear( 4*2*100*12 ); - - (*pdcch_vars_th)[th_id][eNB_id]->rxdataF_comp = (int32_t**)malloc16_clear( 8*sizeof(int32_t*) ); - (*pdcch_vars_th)[th_id][eNB_id]->dl_ch_rho_ext = (int32_t**)malloc16_clear( 8*sizeof(int32_t*) ); - (*pdcch_vars_th)[th_id][eNB_id]->rho = (int32_t**)malloc16( fp->nb_antennas_rx*sizeof(int32_t*) ); - (*pdcch_vars_th)[th_id][eNB_id]->rxdataF_ext = (int32_t**)malloc16_clear( 8*sizeof(int32_t*) ); - (*pdcch_vars_th)[th_id][eNB_id]->dl_ch_estimates_ext = (int32_t**)malloc16_clear( 8*sizeof(int32_t*) ); + for (th_id = 0; th_id < RX_NB_TH_MAX; th_id++) { + (*pdcch_vars_th)[th_id][eNB_id]->llr = (uint16_t *) malloc16_clear (2 * 4 * 100 * 12 * sizeof (uint16_t)); + (*pdcch_vars_th)[th_id][eNB_id]->llr16 = (uint16_t *) malloc16_clear (2 * 4 * 100 * 12 * sizeof (uint16_t)); + (*pdcch_vars_th)[th_id][eNB_id]->wbar = (uint16_t *) malloc16_clear (2 * 4 * 100 * 12 * sizeof (uint16_t)); + (*pdcch_vars_th)[th_id][eNB_id]->e_rx = (int8_t *) malloc16_clear (4 * 2 * 100 * 12); + + (*pdcch_vars_th)[th_id][eNB_id]->rxdataF_comp = (int32_t **) malloc16_clear (8 * sizeof (int32_t *)); + (*pdcch_vars_th)[th_id][eNB_id]->dl_ch_rho_ext = (int32_t **) malloc16_clear (8 * sizeof (int32_t *)); + (*pdcch_vars_th)[th_id][eNB_id]->rho = (int32_t **) malloc16 (fp->nb_antennas_rx * sizeof (int32_t *)); + (*pdcch_vars_th)[th_id][eNB_id]->rxdataF_ext = (int32_t **) malloc16_clear (8 * sizeof (int32_t *)); + (*pdcch_vars_th)[th_id][eNB_id]->dl_ch_estimates_ext = (int32_t **) malloc16_clear (8 * sizeof (int32_t *)); } - - for (i=0; inb_antennas_rx; i++) { + + for (i = 0; i < fp->nb_antennas_rx; i++) { //ue_pdcch_vars[eNB_id]->rho[i] = (int32_t*)malloc16_clear( sizeof(int32_t)*(fp->N_RB_DL*12*7*2) ); - for (th_id=0; th_idrho[i] = (int32_t*)malloc16_clear( sizeof(int32_t)*(100*12*4) ); + for (th_id = 0; th_id < RX_NB_TH_MAX; th_id++) { + (*pdcch_vars_th)[th_id][eNB_id]->rho[i] = (int32_t *) malloc16_clear (sizeof (int32_t) * (100 * 12 * 4)); } - - for (j=0; j<4; j++) { //fp->nb_antennas_tx; j++) - int idx = (j<<1)+i; - // size_t num = 7*2*fp->N_RB_DL*12; - size_t num = 4*100*12; // 4 symbols, 100 PRBs, 12 REs per PRB - for (th_id=0; th_idrxdataF_comp[idx] = (int32_t*)malloc16_clear( sizeof(int32_t) * num ); - (*pdcch_vars_th)[th_id][eNB_id]->dl_ch_rho_ext[idx] = (int32_t*)malloc16_clear( sizeof(int32_t) * num ); - (*pdcch_vars_th)[th_id][eNB_id]->rxdataF_ext[idx] = (int32_t*)malloc16_clear( sizeof(int32_t) * num ); - (*pdcch_vars_th)[th_id][eNB_id]->dl_ch_estimates_ext[idx] = (int32_t*)malloc16_clear( sizeof(int32_t) * num ); - } + + for (j = 0; j < 4; j++) { //fp->nb_antennas_tx; j++) + int idx = (j << 1) + i; + // size_t num = 7*2*fp->N_RB_DL*12; + size_t num = 4 * 100 * 12; // 4 symbols, 100 PRBs, 12 REs per PRB + for (th_id = 0; th_id < RX_NB_TH_MAX; th_id++) { + (*pdcch_vars_th)[th_id][eNB_id]->rxdataF_comp[idx] = (int32_t *) malloc16_clear (sizeof (int32_t) * num); + (*pdcch_vars_th)[th_id][eNB_id]->dl_ch_rho_ext[idx] = (int32_t *) malloc16_clear (sizeof (int32_t) * num); + (*pdcch_vars_th)[th_id][eNB_id]->rxdataF_ext[idx] = (int32_t *) malloc16_clear (sizeof (int32_t) * num); + (*pdcch_vars_th)[th_id][eNB_id]->dl_ch_estimates_ext[idx] = (int32_t *) malloc16_clear (sizeof (int32_t) * num); + } } } - + // PBCH - pbch_vars[eNB_id]->rxdataF_ext = (int32_t**)malloc16( fp->nb_antennas_rx*sizeof(int32_t*) ); - pbch_vars[eNB_id]->rxdataF_comp = (int32_t**)malloc16_clear( 8*sizeof(int32_t*) ); - pbch_vars[eNB_id]->dl_ch_estimates_ext = (int32_t**)malloc16_clear( 8*sizeof(int32_t*) ); - pbch_vars[eNB_id]->llr = (int8_t*)malloc16_clear( 1920 ); - prach_vars[eNB_id]->prachF = (int16_t*)malloc16_clear( sizeof(int)*(7*2*sizeof(int)*(fp->ofdm_symbol_size*12)) ); - prach_vars[eNB_id]->prach = (int16_t*)malloc16_clear( sizeof(int)*(7*2*sizeof(int)*(fp->ofdm_symbol_size*12)) ); - - for (i=0; inb_antennas_rx; i++) { - pbch_vars[eNB_id]->rxdataF_ext[i] = (int32_t*)malloc16_clear( sizeof(int32_t)*6*12*4 ); - - for (j=0; j<4; j++) {//fp->nb_antennas_tx;j++) { - int idx = (j<<1)+i; - pbch_vars[eNB_id]->rxdataF_comp[idx] = (int32_t*)malloc16_clear( sizeof(int32_t)*6*12*4 ); - pbch_vars[eNB_id]->dl_ch_estimates_ext[idx] = (int32_t*)malloc16_clear( sizeof(int32_t)*6*12*4 ); + pbch_vars[eNB_id]->rxdataF_ext = (int32_t **) malloc16 (fp->nb_antennas_rx * sizeof (int32_t *)); + pbch_vars[eNB_id]->rxdataF_comp = (int32_t **) malloc16_clear (8 * sizeof (int32_t *)); + pbch_vars[eNB_id]->dl_ch_estimates_ext = (int32_t **) malloc16_clear (8 * sizeof (int32_t *)); + pbch_vars[eNB_id]->llr = (int8_t *) malloc16_clear (1920); + prach_vars[eNB_id]->prachF = (int16_t *) malloc16_clear (sizeof (int) * (7 * 2 * sizeof (int) * (fp->ofdm_symbol_size * 12))); + prach_vars[eNB_id]->prach = (int16_t *) malloc16_clear (sizeof (int) * (7 * 2 * sizeof (int) * (fp->ofdm_symbol_size * 12))); + + for (i = 0; i < fp->nb_antennas_rx; i++) { + pbch_vars[eNB_id]->rxdataF_ext[i] = (int32_t *) malloc16_clear (sizeof (int32_t) * 6 * 12 * 4); + + for (j = 0; j < 4; j++) { //fp->nb_antennas_tx;j++) { + int idx = (j << 1) + i; + pbch_vars[eNB_id]->rxdataF_comp[idx] = (int32_t *) malloc16_clear (sizeof (int32_t) * 6 * 12 * 4); + pbch_vars[eNB_id]->dl_ch_estimates_ext[idx] = (int32_t *) malloc16_clear (sizeof (int32_t) * 6 * 12 * 4); } } - - - pbch_vars[eNB_id]->decoded_output = (uint8_t*)malloc16_clear( 64 ); + + + pbch_vars[eNB_id]->decoded_output = (uint8_t *) malloc16_clear (64); } // initialization for the last instance of pdsch_vars (used for MU-MIMO) - for (th_id=0; th_idllr[1] = (int16_t*)malloc16_clear( (8*((3*8*6144)+12))*sizeof(int16_t) ); + for (th_id = 0; th_id < RX_NB_TH_MAX; th_id++) { + phy_init_lte_ue__PDSCH ((*pdsch_vars_th)[th_id][eNB_id], fp); + (*pdsch_vars_th)[th_id][eNB_id]->llr[1] = (int16_t *) malloc16_clear ((8 * ((3 * 8 * 6144) + 12)) * sizeof (int16_t)); } - ue->sinr_CQI_dB = (double*) malloc16_clear( fp->N_RB_DL*12*sizeof(double) ); + ue->sinr_CQI_dB = (double *) malloc16_clear (fp->N_RB_DL * 12 * sizeof (double)); ue->init_averaging = 1; // default value until overwritten by RRCConnectionReconfiguration - if (fp->nb_antenna_ports_eNB==2) + if (fp->nb_antenna_ports_eNB == 2) ue->pdsch_config_dedicated->p_a = dBm3; else ue->pdsch_config_dedicated->p_a = dB0; // set channel estimation to do linear interpolation in time ue->high_speed_flag = 1; - ue->ch_est_alpha = 24576; + ue->ch_est_alpha = 24576; // enable MIB/SIB decoding by default ue->decode_MIB = 1; ue->decode_SIB = 1; - init_prach_tables(839); + init_prach_tables (839); return 0; } -void init_lte_ue_transport(PHY_VARS_UE *ue,int abstraction_flag) { +void +init_lte_ue_transport (PHY_VARS_UE * ue, int abstraction_flag) +{ - int i,j,k; + int i, j, k; - for (i=0; idlsch[k][i][j] = new_ue_dlsch(1,NUMBER_OF_HARQ_PID_MAX,NSOFT,MAX_TURBO_ITERATIONS,ue->frame_parms.N_RB_DL, abstraction_flag))!=NULL,"Can't get ue dlsch structures\n"); + for (i = 0; i < NUMBER_OF_CONNECTED_eNB_MAX; i++) { + for (j = 0; j < 2; j++) { + for (k = 0; k < 2; k++) { + AssertFatal ((ue->dlsch[k][i][j] = + new_ue_dlsch (1, NUMBER_OF_HARQ_PID_MAX, NSOFT, MAX_TURBO_ITERATIONS, ue->frame_parms.N_RB_DL, abstraction_flag)) != NULL, "Can't get ue dlsch structures\n"); - LOG_D(PHY,"dlsch[%d][%d][%d] => %p\n",k,i,j,ue->dlsch[i][j]); + LOG_D (PHY, "dlsch[%d][%d][%d] => %p\n", k, i, j, ue->dlsch[i][j]); } } - AssertFatal((ue->ulsch[i] = new_ue_ulsch(ue->frame_parms.N_RB_UL, abstraction_flag))!=NULL,"Can't get ue ulsch structures\n"); + AssertFatal ((ue->ulsch[i] = new_ue_ulsch (ue->frame_parms.N_RB_UL, abstraction_flag)) != NULL, "Can't get ue ulsch structures\n"); - ue->dlsch_SI[i] = new_ue_dlsch(1,1,NSOFT,MAX_TURBO_ITERATIONS,ue->frame_parms.N_RB_DL, abstraction_flag); - ue->dlsch_ra[i] = new_ue_dlsch(1,1,NSOFT,MAX_TURBO_ITERATIONS,ue->frame_parms.N_RB_DL, abstraction_flag); + ue->dlsch_SI[i] = new_ue_dlsch (1, 1, NSOFT, MAX_TURBO_ITERATIONS, ue->frame_parms.N_RB_DL, abstraction_flag); + ue->dlsch_ra[i] = new_ue_dlsch (1, 1, NSOFT, MAX_TURBO_ITERATIONS, ue->frame_parms.N_RB_DL, abstraction_flag); - ue->transmission_mode[i] = ue->frame_parms.nb_antenna_ports_eNB==1 ? 1 : 2; + ue->transmission_mode[i] = ue->frame_parms.nb_antenna_ports_eNB == 1 ? 1 : 2; } ue->frame_parms.pucch_config_common.deltaPUCCH_Shift = 1; - ue->dlsch_MCH[0] = new_ue_dlsch(1,NUMBER_OF_HARQ_PID_MAX,NSOFT,MAX_TURBO_ITERATIONS_MBSFN,ue->frame_parms.N_RB_DL,0); + ue->dlsch_MCH[0] = new_ue_dlsch (1, NUMBER_OF_HARQ_PID_MAX, NSOFT, MAX_TURBO_ITERATIONS_MBSFN, ue->frame_parms.N_RB_DL, 0); } -int phy_init_RU(RU_t *ru) { +int +phy_init_RU (RU_t * ru) +{ LTE_DL_FRAME_PARMS *fp = &ru->frame_parms; - int i,j; - int p; - int re; + int i, j; + int p; + int re; - LOG_I(PHY,"Initializing RU signal buffers (if_south %s) nb_tx %d\n",ru_if_types[ru->if_south],ru->nb_tx); + LOG_I (PHY, "Initializing RU signal buffers (if_south %s) nb_tx %d\n", ru_if_types[ru->if_south], ru->nb_tx); - if (ru->if_south <= REMOTE_IF5) { // this means REMOTE_IF5 or LOCAL_RF, so allocate memory for time-domain signals + if (ru->if_south <= REMOTE_IF5) { // this means REMOTE_IF5 or LOCAL_RF, so allocate memory for time-domain signals // Time-domain signals - ru->common.txdata = (int32_t**)malloc16(ru->nb_tx*sizeof(int32_t*)); - ru->common.rxdata = (int32_t**)malloc16(ru->nb_rx*sizeof(int32_t*) ); + ru->common.txdata = (int32_t **) malloc16 (ru->nb_tx * sizeof (int32_t *)); + ru->common.rxdata = (int32_t **) malloc16 (ru->nb_rx * sizeof (int32_t *)); - for (i=0; inb_tx; i++) { + for (i = 0; i < ru->nb_tx; i++) { // Allocate 10 subframes of I/Q TX signal data (time) if not - ru->common.txdata[i] = (int32_t*)malloc16_clear( fp->samples_per_tti*10*sizeof(int32_t) ); + ru->common.txdata[i] = (int32_t *) malloc16_clear (fp->samples_per_tti * 10 * sizeof (int32_t)); - LOG_I(PHY,"[INIT] common.txdata[%d] = %p (%lu bytes)\n",i,ru->common.txdata[i], - fp->samples_per_tti*10*sizeof(int32_t)); + LOG_I (PHY, "[INIT] common.txdata[%d] = %p (%lu bytes)\n", i, ru->common.txdata[i], fp->samples_per_tti * 10 * sizeof (int32_t)); } - for (i=0;inb_rx;i++) { - ru->common.rxdata[i] = (int32_t*)malloc16_clear( fp->samples_per_tti*10*sizeof(int32_t) ); + for (i = 0; i < ru->nb_rx; i++) { + ru->common.rxdata[i] = (int32_t *) malloc16_clear (fp->samples_per_tti * 10 * sizeof (int32_t)); } - } // IF5 or local RF + } // IF5 or local RF else { - LOG_I(PHY,"No rxdata/txdata for RU\n"); - ru->common.txdata = (int32_t**)NULL; - ru->common.rxdata = (int32_t**)NULL; + LOG_I (PHY, "No rxdata/txdata for RU\n"); + ru->common.txdata = (int32_t **) NULL; + ru->common.rxdata = (int32_t **) NULL; } - if (ru->function != NGFI_RRU_IF5) { // we need to do RX/TX RU processing - LOG_I(PHY,"nb_tx %d\n",ru->nb_tx); - ru->common.rxdata_7_5kHz = (int32_t**)malloc16(ru->nb_rx*sizeof(int32_t*) ); - for (i=0;inb_rx;i++) { - ru->common.rxdata_7_5kHz[i] = (int32_t*)malloc16_clear( 2*fp->samples_per_tti*2*sizeof(int32_t) ); - LOG_I(PHY,"rxdata_7_5kHz[%d] %p for RU %d\n",i,ru->common.rxdata_7_5kHz[i],ru->idx); + if (ru->function != NGFI_RRU_IF5) { // we need to do RX/TX RU processing + LOG_I (PHY, "nb_tx %d\n", ru->nb_tx); + ru->common.rxdata_7_5kHz = (int32_t **) malloc16 (ru->nb_rx * sizeof (int32_t *)); + for (i = 0; i < ru->nb_rx; i++) { + ru->common.rxdata_7_5kHz[i] = (int32_t *) malloc16_clear (2 * fp->samples_per_tti * 2 * sizeof (int32_t)); + LOG_I (PHY, "rxdata_7_5kHz[%d] %p for RU %d\n", i, ru->common.rxdata_7_5kHz[i], ru->idx); } - + // allocate IFFT input buffers (TX) - ru->common.txdataF_BF = (int32_t **)malloc16(ru->nb_tx*sizeof(int32_t*)); - LOG_I(PHY,"[INIT] common.txdata_BF= %p (%lu bytes)\n",ru->common.txdataF_BF, - ru->nb_tx*sizeof(int32_t*)); - for (i=0; inb_tx; i++) { - ru->common.txdataF_BF[i] = (int32_t*)malloc16_clear(fp->symbols_per_tti*fp->ofdm_symbol_size*sizeof(int32_t) ); - LOG_I(PHY,"txdataF_BF[%d] %p for RU %d\n",i,ru->common.txdataF_BF[i],ru->idx); + ru->common.txdataF_BF = (int32_t **) malloc16 (ru->nb_tx * sizeof (int32_t *)); + LOG_I (PHY, "[INIT] common.txdata_BF= %p (%lu bytes)\n", ru->common.txdataF_BF, ru->nb_tx * sizeof (int32_t *)); + for (i = 0; i < ru->nb_tx; i++) { + ru->common.txdataF_BF[i] = (int32_t *) malloc16_clear (fp->symbols_per_tti * fp->ofdm_symbol_size * sizeof (int32_t)); + LOG_I (PHY, "txdataF_BF[%d] %p for RU %d\n", i, ru->common.txdataF_BF[i], ru->idx); } // allocate FFT output buffers (RX) - ru->common.rxdataF = (int32_t**)malloc16(ru->nb_rx*sizeof(int32_t*) ); - for (i=0; inb_rx; i++) { + ru->common.rxdataF = (int32_t **) malloc16 (ru->nb_rx * sizeof (int32_t *)); + for (i = 0; i < ru->nb_rx; i++) { // allocate 2 subframes of I/Q signal data (frequency) - ru->common.rxdataF[i] = (int32_t*)malloc16_clear(sizeof(int32_t)*(2*fp->ofdm_symbol_size*fp->symbols_per_tti) ); - LOG_I(PHY,"rxdataF[%d] %p for RU %d\n",i,ru->common.rxdataF[i],ru->idx); + ru->common.rxdataF[i] = (int32_t *) malloc16_clear (sizeof (int32_t) * (2 * fp->ofdm_symbol_size * fp->symbols_per_tti)); + LOG_I (PHY, "rxdataF[%d] %p for RU %d\n", i, ru->common.rxdataF[i], ru->idx); } /* number of elements of an array X is computed as sizeof(X) / sizeof(X[0]) */ - AssertFatal(ru->nb_rx <= sizeof(ru->prach_rxsigF) / sizeof(ru->prach_rxsigF[0]), - "nb_antennas_rx too large"); - ru->prach_rxsigF = (int16_t**)malloc(ru->nb_rx * sizeof(int16_t*)); - for (j=0;j<4;j++) ru->prach_rxsigF_br[j] = (int16_t**)malloc(ru->nb_rx * sizeof(int16_t*)); + AssertFatal (ru->nb_rx <= sizeof (ru->prach_rxsigF) / sizeof (ru->prach_rxsigF[0]), "nb_antennas_rx too large"); + ru->prach_rxsigF = (int16_t **) malloc (ru->nb_rx * sizeof (int16_t *)); + for (j = 0; j < 4; j++) + ru->prach_rxsigF_br[j] = (int16_t **) malloc (ru->nb_rx * sizeof (int16_t *)); - for (i=0; inb_rx; i++) { - ru->prach_rxsigF[i] = (int16_t*)malloc16_clear( fp->ofdm_symbol_size*12*2*sizeof(int16_t) ); - LOG_D(PHY,"[INIT] prach_vars->rxsigF[%d] = %p\n",i,ru->prach_rxsigF[i]); + for (i = 0; i < ru->nb_rx; i++) { + ru->prach_rxsigF[i] = (int16_t *) malloc16_clear (fp->ofdm_symbol_size * 12 * 2 * sizeof (int16_t)); + LOG_D (PHY, "[INIT] prach_vars->rxsigF[%d] = %p\n", i, ru->prach_rxsigF[i]); #ifdef Rel14 - for (j=0;j<4;j++) { - ru->prach_rxsigF_br[j][i] = (int16_t*)malloc16_clear( fp->ofdm_symbol_size*12*2*sizeof(int16_t) ); - LOG_D(PHY,"[INIT] prach_vars_br->rxsigF[%d] = %p\n",i,ru->prach_rxsigF_br[j][i]); + for (j = 0; j < 4; j++) { + ru->prach_rxsigF_br[j][i] = (int16_t *) malloc16_clear (fp->ofdm_symbol_size * 12 * 2 * sizeof (int16_t)); + LOG_D (PHY, "[INIT] prach_vars_br->rxsigF[%d] = %p\n", i, ru->prach_rxsigF_br[j][i]); } #endif } - - AssertFatal(RC.nb_L1_inst <= NUMBER_OF_eNB_MAX,"eNB instances %d > %d\n", - RC.nb_L1_inst,NUMBER_OF_eNB_MAX); - for (i=0; ieNB_list[i]->frame_parms.nb_antenna_ports_eNB || p==5) { - ru->beam_weights[i][p] = (int32_t **)malloc16_clear(ru->nb_tx*sizeof(int32_t*)); - for (j=0; jnb_tx; j++) { - ru->beam_weights[i][p][j] = (int32_t *)malloc16_clear(fp->ofdm_symbol_size*sizeof(int32_t)); - // antenna ports 0-3 are mapped on antennas 0-3 - // antenna port 4 is mapped on antenna 0 - // antenna ports 5-14 are mapped on all antennas - if (((p<4) && (p==j)) || ((p==4) && (j==0))) { - for (re=0; reofdm_symbol_size; re++) - ru->beam_weights[i][p][j][re] = 0x00007fff; - } - else if (p>4) { - for (re=0; reofdm_symbol_size; re++) - ru->beam_weights[i][p][j][re] = 0x00007fff/ru->nb_tx; - } - LOG_D(PHY,"[INIT] lte_common_vars->beam_weights[%d][%d] = %p (%lu bytes)\n", - i,j,ru->beam_weights[i][p][j], - fp->ofdm_symbol_size*sizeof(int32_t)); - } - } + AssertFatal (RC.nb_L1_inst <= NUMBER_OF_eNB_MAX, "eNB instances %d > %d\n", RC.nb_L1_inst, NUMBER_OF_eNB_MAX); + + for (i = 0; i < RC.nb_L1_inst; i++) { + for (p = 0; p < 15; p++) { + if (p < ru->eNB_list[i]->frame_parms.nb_antenna_ports_eNB || p == 5) { + ru->beam_weights[i][p] = (int32_t **) malloc16_clear (ru->nb_tx * sizeof (int32_t *)); + for (j = 0; j < ru->nb_tx; j++) { + ru->beam_weights[i][p][j] = (int32_t *) malloc16_clear (fp->ofdm_symbol_size * sizeof (int32_t)); + // antenna ports 0-3 are mapped on antennas 0-3 + // antenna port 4 is mapped on antenna 0 + // antenna ports 5-14 are mapped on all antennas + if (((p < 4) && (p == j)) || ((p == 4) && (j == 0))) { + for (re = 0; re < fp->ofdm_symbol_size; re++) + ru->beam_weights[i][p][j][re] = 0x00007fff; + } else if (p > 4) { + for (re = 0; re < fp->ofdm_symbol_size; re++) + ru->beam_weights[i][p][j][re] = 0x00007fff / ru->nb_tx; + } + LOG_D (PHY, "[INIT] lte_common_vars->beam_weights[%d][%d] = %p (%lu bytes)\n", i, j, ru->beam_weights[i][p][j], fp->ofdm_symbol_size * sizeof (int32_t)); + } + } } } } - ru->common.sync_corr = (uint32_t*)malloc16_clear( LTE_NUMBER_OF_SUBFRAMES_PER_FRAME*sizeof(uint32_t)*fp->samples_per_tti ); + ru->common.sync_corr = (uint32_t *) malloc16_clear (LTE_NUMBER_OF_SUBFRAMES_PER_FRAME * sizeof (uint32_t) * fp->samples_per_tti); - return(0); + return (0); } - -int phy_init_lte_eNB(PHY_VARS_eNB *eNB, - unsigned char is_secondary_eNB, - unsigned char abstraction_flag) + +int +phy_init_lte_eNB (PHY_VARS_eNB * eNB, unsigned char is_secondary_eNB, unsigned char abstraction_flag) { // shortcuts - LTE_DL_FRAME_PARMS* const fp = &eNB->frame_parms; - LTE_eNB_COMMON* const common_vars = &eNB->common_vars; - LTE_eNB_PUSCH** const pusch_vars = eNB->pusch_vars; - LTE_eNB_SRS* const srs_vars = eNB->srs_vars; - LTE_eNB_PRACH* const prach_vars = &eNB->prach_vars; + LTE_DL_FRAME_PARMS *const fp = &eNB->frame_parms; + LTE_eNB_COMMON *const common_vars = &eNB->common_vars; + LTE_eNB_PUSCH **const pusch_vars = eNB->pusch_vars; + LTE_eNB_SRS *const srs_vars = eNB->srs_vars; + LTE_eNB_PRACH *const prach_vars = &eNB->prach_vars; #ifdef Rel14 - LTE_eNB_PRACH* const prach_vars_br = &eNB->prach_vars_br; + LTE_eNB_PRACH *const prach_vars_br = &eNB->prach_vars_br; #endif - int i, UE_id; + int i, UE_id; eNB->total_dlsch_bitrate = 0; eNB->total_transmitted_bits = 0; eNB->total_system_throughput = 0; - eNB->check_for_MUMIMO_transmissions=0; - - while(eNB->configured == 0) usleep(10000); + eNB->check_for_MUMIMO_transmissions = 0; - LOG_I(PHY,"[eNB %"PRIu8"] Initializing DL_FRAME_PARMS : N_RB_DL %"PRIu8", PHICH Resource %d, PHICH Duration %d\n", - eNB->Mod_id, - fp->N_RB_DL,fp->phich_config_common.phich_resource, - fp->phich_config_common.phich_duration); - LOG_D(PHY,"[MSC_NEW][FRAME 00000][PHY_eNB][MOD %02"PRIu8"][]\n", eNB->Mod_id); + while (eNB->configured == 0) + usleep (10000); + + LOG_I (PHY, "[eNB %" PRIu8 "] Initializing DL_FRAME_PARMS : N_RB_DL %" PRIu8 ", PHICH Resource %d, PHICH Duration %d\n", + eNB->Mod_id, fp->N_RB_DL, fp->phich_config_common.phich_resource, fp->phich_config_common.phich_duration); + LOG_D (PHY, "[MSC_NEW][FRAME 00000][PHY_eNB][MOD %02" PRIu8 "][]\n", eNB->Mod_id); - lte_gold(fp,eNB->lte_gold_table,fp->Nid_cell); - generate_pcfich_reg_mapping(fp); - generate_phich_reg_mapping(fp); + lte_gold (fp, eNB->lte_gold_table, fp->Nid_cell); + generate_pcfich_reg_mapping (fp); + generate_phich_reg_mapping (fp); + + for (UE_id = 0; UE_id < NUMBER_OF_UE_MAX; UE_id++) { + eNB->first_run_timing_advance[UE_id] = 1; ///This flag used to be static. With multiple eNBs this does no longer work, hence we put it in the structure. However it has to be initialized with 1, which is performed here. - for (UE_id=0; UE_idfirst_run_timing_advance[UE_id] = - 1; ///This flag used to be static. With multiple eNBs this does no longer work, hence we put it in the structure. However it has to be initialized with 1, which is performed here. - // clear whole structure - bzero( &eNB->UE_stats[UE_id], sizeof(LTE_eNB_UE_stats) ); - + bzero (&eNB->UE_stats[UE_id], sizeof (LTE_eNB_UE_stats)); + eNB->physicalConfigDedicated[UE_id] = NULL; } - - eNB->first_run_I0_measurements = 1; ///This flag used to be static. With multiple eNBs this does no longer work, hence we put it in the structure. However it has to be initialized with 1, which is performed here. - + + eNB->first_run_I0_measurements = 1; ///This flag used to be static. With multiple eNBs this does no longer work, hence we put it in the structure. However it has to be initialized with 1, which is performed here. - - common_vars->rxdata = (int32_t **)NULL; - common_vars->txdataF = (int32_t **)malloc16(NB_ANTENNA_PORTS_ENB*sizeof(int32_t*)); - common_vars->rxdataF = (int32_t **)malloc16(64*sizeof(int32_t*)); - - for (i=0; inb_antenna_ports_eNB || i==5) { - common_vars->txdataF[i] = (int32_t*)malloc16_clear(fp->ofdm_symbol_size*fp->symbols_per_tti*10*sizeof(int32_t) ); - - LOG_D(PHY,"[INIT] common_vars->txdataF[%d] = %p (%lu bytes)\n", - i,common_vars->txdataF[i], - fp->ofdm_symbol_size*fp->symbols_per_tti*10*sizeof(int32_t)); + + + common_vars->rxdata = (int32_t **) NULL; + common_vars->txdataF = (int32_t **) malloc16 (NB_ANTENNA_PORTS_ENB * sizeof (int32_t *)); + common_vars->rxdataF = (int32_t **) malloc16 (64 * sizeof (int32_t *)); + + for (i = 0; i < NB_ANTENNA_PORTS_ENB; i++) { + if (i < fp->nb_antenna_ports_eNB || i == 5) { + common_vars->txdataF[i] = (int32_t *) malloc16_clear (fp->ofdm_symbol_size * fp->symbols_per_tti * 10 * sizeof (int32_t)); + + LOG_D (PHY, "[INIT] common_vars->txdataF[%d] = %p (%lu bytes)\n", i, common_vars->txdataF[i], fp->ofdm_symbol_size * fp->symbols_per_tti * 10 * sizeof (int32_t)); } - } - - + } + + // Channel estimates for SRS - for (UE_id=0; UE_idofdm_symbol_size ); - srs_vars[UE_id].srs_ch_estimates_time[i] = (int32_t*)malloc16_clear( sizeof(int32_t)*fp->ofdm_symbol_size*2 ); + for (UE_id = 0; UE_id < NUMBER_OF_UE_MAX; UE_id++) { + + srs_vars[UE_id].srs_ch_estimates = (int32_t **) malloc16 (64 * sizeof (int32_t *)); + srs_vars[UE_id].srs_ch_estimates_time = (int32_t **) malloc16 (64 * sizeof (int32_t *)); + + for (i = 0; i < 64; i++) { + srs_vars[UE_id].srs_ch_estimates[i] = (int32_t *) malloc16_clear (sizeof (int32_t) * fp->ofdm_symbol_size); + srs_vars[UE_id].srs_ch_estimates_time[i] = (int32_t *) malloc16_clear (sizeof (int32_t) * fp->ofdm_symbol_size * 2); } - } //UE_id + } //UE_id - generate_ul_ref_sigs_rx(); - - init_ulsch_power_LUT(); + generate_ul_ref_sigs_rx (); + + init_ulsch_power_LUT (); // SRS - for (UE_id=0; UE_idofdm_symbol_size*sizeof(int32_t)); + for (UE_id = 0; UE_id < NUMBER_OF_UE_MAX; UE_id++) { + srs_vars[UE_id].srs = (int32_t *) malloc16_clear (2 * fp->ofdm_symbol_size * sizeof (int32_t)); } // PRACH - prach_vars->prachF = (int16_t*)malloc16_clear( 1024*2*sizeof(int16_t) ); + prach_vars->prachF = (int16_t *) malloc16_clear (1024 * 2 * sizeof (int16_t)); // assume maximum of 64 RX antennas for PRACH receiver - prach_vars->prach_ifft[0] = (int32_t**)malloc16_clear(64*sizeof(int32_t*)); - for (i=0;i<64;i++) prach_vars->prach_ifft[0][i] = (int32_t*)malloc16_clear(1024*2*sizeof(int32_t)); + prach_vars->prach_ifft[0] = (int32_t **) malloc16_clear (64 * sizeof (int32_t *)); + for (i = 0; i < 64; i++) + prach_vars->prach_ifft[0][i] = (int32_t *) malloc16_clear (1024 * 2 * sizeof (int32_t)); - prach_vars->rxsigF[0] = (int16_t**)malloc16_clear(64*sizeof(int16_t*)); + prach_vars->rxsigF[0] = (int16_t **) malloc16_clear (64 * sizeof (int16_t *)); // PRACH BR #ifdef Rel14 - prach_vars_br->prachF = (int16_t*)malloc16_clear( 1024*2*sizeof(int32_t) ); + prach_vars_br->prachF = (int16_t *) malloc16_clear (1024 * 2 * sizeof (int32_t)); // assume maximum of 64 RX antennas for PRACH receiver - for (int ce_level=0;ce_level<4;ce_level++) { - prach_vars_br->prach_ifft[ce_level] = (int32_t**)malloc16_clear(64*sizeof(int32_t*)); - for (i=0;i<64;i++) prach_vars_br->prach_ifft[ce_level][i] = (int32_t*)malloc16_clear(1024*2*sizeof(int32_t)); - prach_vars->rxsigF[ce_level] = (int16_t**)malloc16_clear(64*sizeof(int16_t*)); + for (int ce_level = 0; ce_level < 4; ce_level++) { + prach_vars_br->prach_ifft[ce_level] = (int32_t **) malloc16_clear (64 * sizeof (int32_t *)); + for (i = 0; i < 64; i++) + prach_vars_br->prach_ifft[ce_level][i] = (int32_t *) malloc16_clear (1024 * 2 * sizeof (int32_t)); + prach_vars->rxsigF[ce_level] = (int16_t **) malloc16_clear (64 * sizeof (int16_t *)); } #endif - + /* number of elements of an array X is computed as sizeof(X) / sizeof(X[0]) AssertFatal(fp->nb_antennas_rx <= sizeof(prach_vars->rxsigF) / sizeof(prach_vars->rxsigF[0]), "nb_antennas_rx too large"); for (i=0; inb_antennas_rx; i++) { prach_vars->rxsigF[i] = (int16_t*)malloc16_clear( fp->ofdm_symbol_size*12*2*sizeof(int16_t) ); LOG_D(PHY,"[INIT] prach_vars->rxsigF[%d] = %p\n",i,prach_vars->rxsigF[i]); - }*/ - - for (UE_id=0; UE_idrxdataF_ext = (int32_t**)malloc16( 2*sizeof(int32_t*) ); - pusch_vars[UE_id]->rxdataF_ext2 = (int32_t**)malloc16( 2*sizeof(int32_t*) ); - pusch_vars[UE_id]->drs_ch_estimates = (int32_t**)malloc16( 2*sizeof(int32_t*) ); - pusch_vars[UE_id]->drs_ch_estimates_time = (int32_t**)malloc16( 2*sizeof(int32_t*) ); - pusch_vars[UE_id]->rxdataF_comp = (int32_t**)malloc16( 2*sizeof(int32_t*) ); - pusch_vars[UE_id]->ul_ch_mag = (int32_t**)malloc16( 2*sizeof(int32_t*) ); - pusch_vars[UE_id]->ul_ch_magb = (int32_t**)malloc16( 2*sizeof(int32_t*) ); - - AssertFatal(fp->ofdm_symbol_size > 127, "fp->ofdm_symbol_size %d<128\n",fp->ofdm_symbol_size); - AssertFatal(fp->symbols_per_tti > 11, "fp->symbols_per_tti %d < 12\n",fp->symbols_per_tti); - AssertFatal(fp->N_RB_UL > 5, "fp->N_RB_UL %d < 6\n",fp->N_RB_UL); - for (i=0; i<2; i++) { + pusch_vars[UE_id] = (LTE_eNB_PUSCH *) malloc16_clear (NUMBER_OF_UE_MAX * sizeof (LTE_eNB_PUSCH)); + + pusch_vars[UE_id]->rxdataF_ext = (int32_t **) malloc16 (2 * sizeof (int32_t *)); + pusch_vars[UE_id]->rxdataF_ext2 = (int32_t **) malloc16 (2 * sizeof (int32_t *)); + pusch_vars[UE_id]->drs_ch_estimates = (int32_t **) malloc16 (2 * sizeof (int32_t *)); + pusch_vars[UE_id]->drs_ch_estimates_time = (int32_t **) malloc16 (2 * sizeof (int32_t *)); + pusch_vars[UE_id]->rxdataF_comp = (int32_t **) malloc16 (2 * sizeof (int32_t *)); + pusch_vars[UE_id]->ul_ch_mag = (int32_t **) malloc16 (2 * sizeof (int32_t *)); + pusch_vars[UE_id]->ul_ch_magb = (int32_t **) malloc16 (2 * sizeof (int32_t *)); + + AssertFatal (fp->ofdm_symbol_size > 127, "fp->ofdm_symbol_size %d<128\n", fp->ofdm_symbol_size); + AssertFatal (fp->symbols_per_tti > 11, "fp->symbols_per_tti %d < 12\n", fp->symbols_per_tti); + AssertFatal (fp->N_RB_UL > 5, "fp->N_RB_UL %d < 6\n", fp->N_RB_UL); + for (i = 0; i < 2; i++) { // RK 2 times because of output format of FFT! // FIXME We should get rid of this - pusch_vars[UE_id]->rxdataF_ext[i] = (int32_t*)malloc16_clear( 2*sizeof(int32_t)*fp->N_RB_UL*12*fp->symbols_per_tti ); - pusch_vars[UE_id]->rxdataF_ext2[i] = (int32_t*)malloc16_clear( sizeof(int32_t)*fp->N_RB_UL*12*fp->symbols_per_tti ); - pusch_vars[UE_id]->drs_ch_estimates[i] = (int32_t*)malloc16_clear( sizeof(int32_t)*fp->N_RB_UL*12*fp->symbols_per_tti ); - pusch_vars[UE_id]->drs_ch_estimates_time[i] = (int32_t*)malloc16_clear( 2*2*sizeof(int32_t)*fp->ofdm_symbol_size ); - pusch_vars[UE_id]->rxdataF_comp[i] = (int32_t*)malloc16_clear( sizeof(int32_t)*fp->N_RB_UL*12*fp->symbols_per_tti ); - pusch_vars[UE_id]->ul_ch_mag[i] = (int32_t*)malloc16_clear( fp->symbols_per_tti*sizeof(int32_t)*fp->N_RB_UL*12 ); - pusch_vars[UE_id]->ul_ch_magb[i] = (int32_t*)malloc16_clear( fp->symbols_per_tti*sizeof(int32_t)*fp->N_RB_UL*12 ); + pusch_vars[UE_id]->rxdataF_ext[i] = (int32_t *) malloc16_clear (2 * sizeof (int32_t) * fp->N_RB_UL * 12 * fp->symbols_per_tti); + pusch_vars[UE_id]->rxdataF_ext2[i] = (int32_t *) malloc16_clear (sizeof (int32_t) * fp->N_RB_UL * 12 * fp->symbols_per_tti); + pusch_vars[UE_id]->drs_ch_estimates[i] = (int32_t *) malloc16_clear (sizeof (int32_t) * fp->N_RB_UL * 12 * fp->symbols_per_tti); + pusch_vars[UE_id]->drs_ch_estimates_time[i] = (int32_t *) malloc16_clear (2 * 2 * sizeof (int32_t) * fp->ofdm_symbol_size); + pusch_vars[UE_id]->rxdataF_comp[i] = (int32_t *) malloc16_clear (sizeof (int32_t) * fp->N_RB_UL * 12 * fp->symbols_per_tti); + pusch_vars[UE_id]->ul_ch_mag[i] = (int32_t *) malloc16_clear (fp->symbols_per_tti * sizeof (int32_t) * fp->N_RB_UL * 12); + pusch_vars[UE_id]->ul_ch_magb[i] = (int32_t *) malloc16_clear (fp->symbols_per_tti * sizeof (int32_t) * fp->N_RB_UL * 12); } - - pusch_vars[UE_id]->llr = (int16_t*)malloc16_clear( (8*((3*8*6144)+12))*sizeof(int16_t) ); - } //UE_id - - for (UE_id=0; UE_idllr = (int16_t *) malloc16_clear ((8 * ((3 * 8 * 6144) + 12)) * sizeof (int16_t)); + } //UE_id + + + for (UE_id = 0; UE_id < NUMBER_OF_UE_MAX; UE_id++) eNB->UE_stats_ptr[UE_id] = &eNB->UE_stats[UE_id]; - - eNB->pdsch_config_dedicated->p_a = dB0; //defaul value until overwritten by RRCConnectionReconfiguration - + + eNB->pdsch_config_dedicated->p_a = dB0; //defaul value until overwritten by RRCConnectionReconfiguration + return (0); diff --git a/openair1/PHY/LTE_TRANSPORT/dci_tools.c b/openair1/PHY/LTE_TRANSPORT/dci_tools.c index 6b9dde3778..08f090a60c 100755 --- a/openair1/PHY/LTE_TRANSPORT/dci_tools.c +++ b/openair1/PHY/LTE_TRANSPORT/dci_tools.c @@ -46,150 +46,153 @@ //#define DEBUG_DCI -uint32_t localRIV2alloc_LUT6[32]; -uint32_t distRIV2alloc_even_LUT6[32]; -uint32_t distRIV2alloc_odd_LUT6[32]; -uint16_t RIV2nb_rb_LUT6[32]; -uint16_t RIV2first_rb_LUT6[32]; -uint16_t RIV_max6=0; +uint32_t localRIV2alloc_LUT6[32]; +uint32_t distRIV2alloc_even_LUT6[32]; +uint32_t distRIV2alloc_odd_LUT6[32]; +uint16_t RIV2nb_rb_LUT6[32]; +uint16_t RIV2first_rb_LUT6[32]; +uint16_t RIV_max6 = 0; -uint32_t localRIV2alloc_LUT25[512]; -uint32_t distRIV2alloc_even_LUT25[512]; -uint32_t distRIV2alloc_odd_LUT25[512]; -uint16_t RIV2nb_rb_LUT25[512]; -uint16_t RIV2first_rb_LUT25[512]; -uint16_t RIV_max25=0; +uint32_t localRIV2alloc_LUT25[512]; +uint32_t distRIV2alloc_even_LUT25[512]; +uint32_t distRIV2alloc_odd_LUT25[512]; +uint16_t RIV2nb_rb_LUT25[512]; +uint16_t RIV2first_rb_LUT25[512]; +uint16_t RIV_max25 = 0; -uint32_t localRIV2alloc_LUT50_0[1600]; -uint32_t localRIV2alloc_LUT50_1[1600]; -uint32_t distRIV2alloc_gap0_even_LUT50_0[1600]; -uint32_t distRIV2alloc_gap0_odd_LUT50_0[1600]; -uint32_t distRIV2alloc_gap0_even_LUT50_1[1600]; -uint32_t distRIV2alloc_gap0_odd_LUT50_1[1600]; -uint32_t distRIV2alloc_gap1_even_LUT50_0[1600]; -uint32_t distRIV2alloc_gap1_odd_LUT50_0[1600]; -uint32_t distRIV2alloc_gap1_even_LUT50_1[1600]; -uint32_t distRIV2alloc_gap1_odd_LUT50_1[1600]; -uint16_t RIV2nb_rb_LUT50[1600]; -uint16_t RIV2first_rb_LUT50[1600]; -uint16_t RIV_max50=0; +uint32_t localRIV2alloc_LUT50_0[1600]; +uint32_t localRIV2alloc_LUT50_1[1600]; +uint32_t distRIV2alloc_gap0_even_LUT50_0[1600]; +uint32_t distRIV2alloc_gap0_odd_LUT50_0[1600]; +uint32_t distRIV2alloc_gap0_even_LUT50_1[1600]; +uint32_t distRIV2alloc_gap0_odd_LUT50_1[1600]; +uint32_t distRIV2alloc_gap1_even_LUT50_0[1600]; +uint32_t distRIV2alloc_gap1_odd_LUT50_0[1600]; +uint32_t distRIV2alloc_gap1_even_LUT50_1[1600]; +uint32_t distRIV2alloc_gap1_odd_LUT50_1[1600]; +uint16_t RIV2nb_rb_LUT50[1600]; +uint16_t RIV2first_rb_LUT50[1600]; +uint16_t RIV_max50 = 0; -uint32_t localRIV2alloc_LUT100_0[6000]; -uint32_t localRIV2alloc_LUT100_1[6000]; -uint32_t localRIV2alloc_LUT100_2[6000]; -uint32_t localRIV2alloc_LUT100_3[6000]; -uint32_t distRIV2alloc_gap0_even_LUT100_0[6000]; -uint32_t distRIV2alloc_gap0_odd_LUT100_0[6000]; -uint32_t distRIV2alloc_gap0_even_LUT100_1[6000]; -uint32_t distRIV2alloc_gap0_odd_LUT100_1[6000]; -uint32_t distRIV2alloc_gap0_even_LUT100_2[6000]; -uint32_t distRIV2alloc_gap0_odd_LUT100_2[6000]; -uint32_t distRIV2alloc_gap0_even_LUT100_3[6000]; -uint32_t distRIV2alloc_gap0_odd_LUT100_3[6000]; -uint32_t distRIV2alloc_gap1_even_LUT100_0[6000]; -uint32_t distRIV2alloc_gap1_odd_LUT100_0[6000]; -uint32_t distRIV2alloc_gap1_even_LUT100_1[6000]; -uint32_t distRIV2alloc_gap1_odd_LUT100_1[6000]; -uint32_t distRIV2alloc_gap1_even_LUT100_2[6000]; -uint32_t distRIV2alloc_gap1_odd_LUT100_2[6000]; -uint32_t distRIV2alloc_gap1_even_LUT100_3[6000]; -uint32_t distRIV2alloc_gap1_odd_LUT100_3[6000]; -uint16_t RIV2nb_rb_LUT100[6000]; -uint16_t RIV2first_rb_LUT100[6000]; -uint16_t RIV_max100=0; +uint32_t localRIV2alloc_LUT100_0[6000]; +uint32_t localRIV2alloc_LUT100_1[6000]; +uint32_t localRIV2alloc_LUT100_2[6000]; +uint32_t localRIV2alloc_LUT100_3[6000]; +uint32_t distRIV2alloc_gap0_even_LUT100_0[6000]; +uint32_t distRIV2alloc_gap0_odd_LUT100_0[6000]; +uint32_t distRIV2alloc_gap0_even_LUT100_1[6000]; +uint32_t distRIV2alloc_gap0_odd_LUT100_1[6000]; +uint32_t distRIV2alloc_gap0_even_LUT100_2[6000]; +uint32_t distRIV2alloc_gap0_odd_LUT100_2[6000]; +uint32_t distRIV2alloc_gap0_even_LUT100_3[6000]; +uint32_t distRIV2alloc_gap0_odd_LUT100_3[6000]; +uint32_t distRIV2alloc_gap1_even_LUT100_0[6000]; +uint32_t distRIV2alloc_gap1_odd_LUT100_0[6000]; +uint32_t distRIV2alloc_gap1_even_LUT100_1[6000]; +uint32_t distRIV2alloc_gap1_odd_LUT100_1[6000]; +uint32_t distRIV2alloc_gap1_even_LUT100_2[6000]; +uint32_t distRIV2alloc_gap1_odd_LUT100_2[6000]; +uint32_t distRIV2alloc_gap1_even_LUT100_3[6000]; +uint32_t distRIV2alloc_gap1_odd_LUT100_3[6000]; +uint16_t RIV2nb_rb_LUT100[6000]; +uint16_t RIV2first_rb_LUT100[6000]; +uint16_t RIV_max100 = 0; extern uint32_t current_dlsch_cqi; // Table 8.6.3-3 36.213 -uint16_t beta_cqi[16] = {0, //reserved - 0, //reserved - 9, //1.125 - 10, //1.250 - 11, //1.375 - 13, //1.625 - 14, //1.750 - 16, //2.000 - 18, //2.250 - 20, //2.500 - 23, //2.875 - 25, //3.125 - 28, //3.500 - 32, //4.000 - 40, //5.000 - 50 - }; //6.250 +uint16_t beta_cqi[16] = { 0, //reserved + 0, //reserved + 9, //1.125 + 10, //1.250 + 11, //1.375 + 13, //1.625 + 14, //1.750 + 16, //2.000 + 18, //2.250 + 20, //2.500 + 23, //2.875 + 25, //3.125 + 28, //3.500 + 32, //4.000 + 40, //5.000 + 50 +}; //6.250 // Table 8.6.3-2 36.213 -uint16_t beta_ri[16] = {10, //1.250 - 13, //1.625 - 16, //2.000 - 20, //2.500 - 25, //3.125 - 32, //4.000 - 40, //5.000 - 50, //6.250 - 64, //8.000 - 80, //10.000 - 101, //12.625 - 127, //15.875 - 160, //20.000 - 0, //reserved - 0, //reserved - 0 - }; //reserved +uint16_t beta_ri[16] = { 10, //1.250 + 13, //1.625 + 16, //2.000 + 20, //2.500 + 25, //3.125 + 32, //4.000 + 40, //5.000 + 50, //6.250 + 64, //8.000 + 80, //10.000 + 101, //12.625 + 127, //15.875 + 160, //20.000 + 0, //reserved + 0, //reserved + 0 +}; //reserved // Table 8.6.3-2 36.213 -uint16_t beta_ack[16] = {16, //2.000 - 20, //2.500 - 25, //3.125 - 32, //4.000 - 40, //5.000 - 50, //6.250 - 64, //8.000 - 80, //10.000 - 101, //12.625 - 127, //15.875 - 160, //20.000 - 248, //31.000 - 400, //50.000 - 640, //80.000 - 808 - };//126.00 +uint16_t beta_ack[16] = { 16, //2.000 + 20, //2.500 + 25, //3.125 + 32, //4.000 + 40, //5.000 + 50, //6.250 + 64, //8.000 + 80, //10.000 + 101, //12.625 + 127, //15.875 + 160, //20.000 + 248, //31.000 + 400, //50.000 + 640, //80.000 + 808 +}; //126.00 -int8_t delta_PUSCH_abs[4] = {-4,-1,1,4}; -int8_t delta_PUSCH_acc[4] = {-1,0,1,3}; +int8_t delta_PUSCH_abs[4] = { -4, -1, 1, 4 }; +int8_t delta_PUSCH_acc[4] = { -1, 0, 1, 3 }; -int8_t *delta_PUCCH_lut = delta_PUSCH_acc; +int8_t *delta_PUCCH_lut = delta_PUSCH_acc; -void conv_eMTC_rballoc(uint16_t resource_block_coding, - uint32_t N_RB_DL, - uint32_t *rb_alloc) { - - - int narrowband = resource_block_coding>>5; - int RIV = resource_block_coding&31; - int N_NB_DL = N_RB_DL/6; - int i0 = (N_RB_DL>>1) - (3*N_NB_DL); - int first_rb = (6*narrowband)+i0; - int alloc = localRIV2alloc_LUT6[RIV]; - int ind = first_rb>>5; - int ind_mod = first_rb&31; - - if (((N_RB_DL&1) > 0) && (narrowband>=(N_NB_DL>>1))) first_rb++; - rb_alloc[0] = 0; - rb_alloc[1] = 0; - rb_alloc[2] = 0; - rb_alloc[3] = 0; - rb_alloc[ind] = alloc< 26) rb_alloc[ind+1] = alloc>>(6-(ind_mod-26)); -} - -void conv_rballoc(uint8_t ra_header,uint32_t rb_alloc,uint32_t N_RB_DL,uint32_t *rb_alloc2) +void +conv_eMTC_rballoc (uint16_t resource_block_coding, uint32_t N_RB_DL, uint32_t * rb_alloc) { - uint32_t i,shift,subset; + + int narrowband = resource_block_coding >> 5; + int RIV = resource_block_coding & 31; + int N_NB_DL = N_RB_DL / 6; + int i0 = (N_RB_DL >> 1) - (3 * N_NB_DL); + int first_rb = (6 * narrowband) + i0; + int alloc = localRIV2alloc_LUT6[RIV]; + int ind = first_rb >> 5; + int ind_mod = first_rb & 31; + + if (((N_RB_DL & 1) > 0) && (narrowband >= (N_NB_DL >> 1))) + first_rb++; + rb_alloc[0] = 0; + rb_alloc[1] = 0; + rb_alloc[2] = 0; + rb_alloc[3] = 0; + rb_alloc[ind] = alloc << ind_mod; + if (ind_mod > 26) + rb_alloc[ind + 1] = alloc >> (6 - (ind_mod - 26)); +} + +void +conv_rballoc (uint8_t ra_header, uint32_t rb_alloc, uint32_t N_RB_DL, uint32_t * rb_alloc2) +{ + + uint32_t i, shift, subset; rb_alloc2[0] = 0; rb_alloc2[1] = 0; rb_alloc2[2] = 0; @@ -200,71 +203,71 @@ void conv_rballoc(uint8_t ra_header,uint32_t rb_alloc,uint32_t N_RB_DL,uint32_t switch (N_RB_DL) { case 6: - rb_alloc2[0] = rb_alloc&0x3f; + rb_alloc2[0] = rb_alloc & 0x3f; break; case 25: - if (ra_header == 0) {// Type 0 Allocation + if (ra_header == 0) { // Type 0 Allocation - for (i=12; i>0; i--) { - if ((rb_alloc&(1< 0; i--) { + if ((rb_alloc & (1 << i)) != 0) + rb_alloc2[0] |= (3 << ((2 * (12 - i)))); // printf("rb_alloc2 (type 0) %x\n",rb_alloc2); } - if ((rb_alloc&1) != 0) - rb_alloc2[0] |= (1<<24); + if ((rb_alloc & 1) != 0) + rb_alloc2[0] |= (1 << 24); } else { - subset = rb_alloc&1; - shift = (rb_alloc>>1)&1; + subset = rb_alloc & 1; + shift = (rb_alloc >> 1) & 1; - for (i=0; i<11; i++) { - if ((rb_alloc&(1<<(i+2))) != 0) - rb_alloc2[0] |= (1<<(2*i)); + for (i = 0; i < 11; i++) { + if ((rb_alloc & (1 << (i + 2))) != 0) + rb_alloc2[0] |= (1 << (2 * i)); //printf("rb_alloc2 (type 1) %x\n",rb_alloc2); } if ((shift == 0) && (subset == 1)) - rb_alloc2[0]<<=1; + rb_alloc2[0] <<= 1; else if ((shift == 1) && (subset == 0)) - rb_alloc2[0]<<=4; + rb_alloc2[0] <<= 4; else if ((shift == 1) && (subset == 1)) - rb_alloc2[0]<<=3; + rb_alloc2[0] <<= 3; } break; case 50: - AssertFatal(ra_header==0,"resource type 1 not supported for N_RB_DL=50\n"); + AssertFatal (ra_header == 0, "resource type 1 not supported for N_RB_DL=50\n"); - for (i=16; i>0; i--) { - if ((rb_alloc&(1<>5] |= (7<<((3*(16-i))%32)); + for (i = 16; i > 0; i--) { + if ((rb_alloc & (1 << i)) != 0) + rb_alloc2[(3 * (16 - i)) >> 5] |= (7 << ((3 * (16 - i)) % 32)); } // bit mask across - if ((rb_alloc2[0]>>31)==1) + if ((rb_alloc2[0] >> 31) == 1) rb_alloc2[1] |= 1; - - if ((rb_alloc&1) != 0) - rb_alloc2[1] |= (3<<16); + + if ((rb_alloc & 1) != 0) + rb_alloc2[1] |= (3 << 16); break; case 100: - AssertFatal(ra_header==0,"resource type 1 not supported for N_RB_DL=100\n"); - for (i=0; i<25; i++) { - if ((rb_alloc&(1<<(24-i))) != 0) - rb_alloc2[(4*i)>>5] |= (0xf<<((4*i)%32)); - + AssertFatal (ra_header == 0, "resource type 1 not supported for N_RB_DL=100\n"); + for (i = 0; i < 25; i++) { + if ((rb_alloc & (1 << (24 - i))) != 0) + rb_alloc2[(4 * i) >> 5] |= (0xf << ((4 * i) % 32)); + // printf("rb_alloc2[%d] (type 0) %x (%d)\n",(4*i)>>5,rb_alloc2[(4*i)>>5],rb_alloc&(1<0; i--) { - if ((rb_alloc&(1< 0; i--) { + if ((rb_alloc & (1 << i)) != 0) nprb += 2; } - if ((rb_alloc&1) != 0) + if ((rb_alloc & 1) != 0) nprb += 1; } else { - for (i=0; i<11; i++) { - if ((rb_alloc&(1<<(i+2))) != 0) + for (i = 0; i < 11; i++) { + if ((rb_alloc & (1 << (i + 2))) != 0) nprb += 1; } } @@ -307,19 +311,19 @@ uint32_t conv_nprb(uint8_t ra_header,uint32_t rb_alloc,int N_RB_DL) break; case 50: - if (ra_header == 0) {// Type 0 Allocation + if (ra_header == 0) { // Type 0 Allocation - for (i=0; i<16; i++) { - if ((rb_alloc&(1<<(16-i))) != 0) + for (i = 0; i < 16; i++) { + if ((rb_alloc & (1 << (16 - i))) != 0) nprb += 3; } - if ((rb_alloc&1) != 0) + if ((rb_alloc & 1) != 0) nprb += 2; } else { - for (i=0; i<17; i++) { - if ((rb_alloc&(1<<(i+2))) != 0) + for (i = 0; i < 17; i++) { + if ((rb_alloc & (1 << (i + 2))) != 0) nprb += 1; } } @@ -327,15 +331,15 @@ uint32_t conv_nprb(uint8_t ra_header,uint32_t rb_alloc,int N_RB_DL) break; case 100: - if (ra_header == 0) {// Type 0 Allocation + if (ra_header == 0) { // Type 0 Allocation - for (i=0; i<25; i++) { - if ((rb_alloc&(1<<(24-i))) != 0) + for (i = 0; i < 25; i++) { + if ((rb_alloc & (1 << (24 - i))) != 0) nprb += 4; } } else { - for (i=0; i<25; i++) { - if ((rb_alloc&(1<<(i+2))) != 0) + for (i = 0; i < 25; i++) { + if ((rb_alloc & (1 << (i + 2))) != 0) nprb += 1; } } @@ -343,184 +347,186 @@ uint32_t conv_nprb(uint8_t ra_header,uint32_t rb_alloc,int N_RB_DL) break; default: - LOG_E(PHY,"Invalide N_RB_DL %d\n", N_RB_DL); + LOG_E (PHY, "Invalide N_RB_DL %d\n", N_RB_DL); DevParam (N_RB_DL, 0, 0); break; } - return(nprb); + return (nprb); } -uint16_t computeRIV(uint16_t N_RB_DL,uint16_t RBstart,uint16_t Lcrbs) +uint16_t +computeRIV (uint16_t N_RB_DL, uint16_t RBstart, uint16_t Lcrbs) { - uint16_t RIV; + uint16_t RIV; - if (Lcrbs<=(1+(N_RB_DL>>1))) - RIV = (N_RB_DL*(Lcrbs-1)) + RBstart; + if (Lcrbs <= (1 + (N_RB_DL >> 1))) + RIV = (N_RB_DL * (Lcrbs - 1)) + RBstart; else - RIV = (N_RB_DL*(N_RB_DL+1-Lcrbs)) + (N_RB_DL-1-RBstart); + RIV = (N_RB_DL * (N_RB_DL + 1 - Lcrbs)) + (N_RB_DL - 1 - RBstart); - return(RIV); + return (RIV); } // Convert a DCI Format 1C RIV to a Format 1A RIV // This extracts the start and length in PRBs from the 1C rballoc and // recomputes the RIV as if it were the 1A rballoc -uint32_t conv_1C_RIV(int32_t rballoc,uint32_t N_RB_DL) { +uint32_t +conv_1C_RIV (int32_t rballoc, uint32_t N_RB_DL) +{ - int NpDLVRB,N_RB_step,LpCRBsm1,RBpstart; + int NpDLVRB, N_RB_step, LpCRBsm1, RBpstart; switch (N_RB_DL) { - case 6: // N_RB_step = 2, NDLVRB = 6, NpDLVRB = 3 - NpDLVRB = 3; + case 6: // N_RB_step = 2, NDLVRB = 6, NpDLVRB = 3 + NpDLVRB = 3; N_RB_step = 2; break; - case 25: // N_RB_step = 2, NDLVRB = 24, NpDLVRB = 12 - NpDLVRB = 12; + case 25: // N_RB_step = 2, NDLVRB = 24, NpDLVRB = 12 + NpDLVRB = 12; N_RB_step = 2; break; - case 50: // N_RB_step = 4, NDLVRB = 46, NpDLVRB = 11 - NpDLVRB = 11; + case 50: // N_RB_step = 4, NDLVRB = 46, NpDLVRB = 11 + NpDLVRB = 11; N_RB_step = 4; break; - case 100: // N_RB_step = 4, NDLVRB = 96, NpDLVRB = 24 - NpDLVRB = 24; + case 100: // N_RB_step = 4, NDLVRB = 96, NpDLVRB = 24 + NpDLVRB = 24; N_RB_step = 4; break; default: - NpDLVRB = 24; + NpDLVRB = 24; N_RB_step = 4; break; } // This is the 1C part from 7.1.6.3 in 36.213 - LpCRBsm1 = rballoc/NpDLVRB; + LpCRBsm1 = rballoc / NpDLVRB; // printf("LpCRBs = %d\n",LpCRBsm1+1); - if (LpCRBsm1 <= (NpDLVRB/2)) { + if (LpCRBsm1 <= (NpDLVRB / 2)) { RBpstart = rballoc % NpDLVRB; - } - else { - LpCRBsm1 = NpDLVRB-LpCRBsm1; - RBpstart = NpDLVRB-(rballoc%NpDLVRB); + } else { + LpCRBsm1 = NpDLVRB - LpCRBsm1; + RBpstart = NpDLVRB - (rballoc % NpDLVRB); } // printf("RBpstart %d\n",RBpstart); - return(computeRIV(N_RB_DL,N_RB_step*RBpstart,N_RB_step*(LpCRBsm1+1))); + return (computeRIV (N_RB_DL, N_RB_step * RBpstart, N_RB_step * (LpCRBsm1 + 1))); } -uint32_t get_prb(int N_RB_DL,int odd_slot,int vrb,int Ngap) { +uint32_t +get_prb (int N_RB_DL, int odd_slot, int vrb, int Ngap) +{ - int offset; + int offset; switch (N_RB_DL) { case 6: - // N_RB_DL = tildeN_RB_DL = 6 - // Ngap = 4 , P=1, Nrow = 2, Nnull = 2 + // N_RB_DL = tildeN_RB_DL = 6 + // Ngap = 4 , P=1, Nrow = 2, Nnull = 2 switch (vrb) { - case 0: // even: 0->0, 1->2, odd: 0->3, 1->5 + case 0: // even: 0->0, 1->2, odd: 0->3, 1->5 case 1: - return ((3*odd_slot) + 2*(vrb&3))%6; + return ((3 * odd_slot) + 2 * (vrb & 3)) % 6; break; - case 2: // even: 2->3, 3->5, odd: 2->0, 3->2 + case 2: // even: 2->3, 3->5, odd: 2->0, 3->2 case 3: - return ((3*odd_slot) + 2*(vrb&3) + 5)%6; + return ((3 * odd_slot) + 2 * (vrb & 3) + 5) % 6; break; - case 4: // even: 4->1, odd: 4->4 - return ((3*odd_slot) + 1)%6; - case 5: // even: 5->4, odd: 5->1 - return ((3*odd_slot) + 4)%6; + case 4: // even: 4->1, odd: 4->4 + return ((3 * odd_slot) + 1) % 6; + case 5: // even: 5->4, odd: 5->1 + return ((3 * odd_slot) + 4) % 6; break; } break; case 15: - if (vrb<12) { - if ((vrb&3) < 2) // even: 0->0, 1->4, 4->1, 5->5, 8->2, 9->6 odd: 0->7, 1->11 - return(((7*odd_slot) + 4*(vrb&3) + (vrb>>2))%14) + 14*(vrb/14); - else if (vrb < 12) // even: 2->7, 3->11, 6->8, 7->12, 10->9, 11->13 - return (((7*odd_slot) + 4*(vrb&3) + (vrb>>2) +13 )%14) + 14*(vrb/14); + if (vrb < 12) { + if ((vrb & 3) < 2) // even: 0->0, 1->4, 4->1, 5->5, 8->2, 9->6 odd: 0->7, 1->11 + return (((7 * odd_slot) + 4 * (vrb & 3) + (vrb >> 2)) % 14) + 14 * (vrb / 14); + else if (vrb < 12) // even: 2->7, 3->11, 6->8, 7->12, 10->9, 11->13 + return (((7 * odd_slot) + 4 * (vrb & 3) + (vrb >> 2) + 13) % 14) + 14 * (vrb / 14); } - if (vrb==12) - return (3+(7*odd_slot)) % 14; - if (vrb==13) - return (10+(7*odd_slot)) % 14; + if (vrb == 12) + return (3 + (7 * odd_slot)) % 14; + if (vrb == 13) + return (10 + (7 * odd_slot)) % 14; return 14; break; case 25: - return (((12*odd_slot) + 6*(vrb&3) + (vrb>>2))%24) + 24*(vrb/24); + return (((12 * odd_slot) + 6 * (vrb & 3) + (vrb >> 2)) % 24) + 24 * (vrb / 24); break; - case 50: // P=3 - if (Ngap==0) { + case 50: // P=3 + if (Ngap == 0) { // Nrow=12,Nnull=2,NVRBDL=46,Ngap1= 27 - if (vrb>=23) - offset=4; + if (vrb >= 23) + offset = 4; else - offset=0; - if (vrb<44) { - if ((vrb&3)>=2) - return offset+((23*odd_slot) + 12*(vrb&3) + (vrb>>2) + 45)%46; - else - return offset+((23*odd_slot) + 12*(vrb&3) + (vrb>>2))%46; + offset = 0; + if (vrb < 44) { + if ((vrb & 3) >= 2) + return offset + ((23 * odd_slot) + 12 * (vrb & 3) + (vrb >> 2) + 45) % 46; + else + return offset + ((23 * odd_slot) + 12 * (vrb & 3) + (vrb >> 2)) % 46; } - if (vrb==44) // even: 44->11, odd: 45->34 - return offset+((23*odd_slot) + 22-12+1); - if (vrb==45) // even: 45->10, odd: 45->33 - return offset+((23*odd_slot) + 22+12); - if (vrb==46) - return offset+46+((23*odd_slot) + 23-12+1) % 46; - if (vrb==47) - return offset+46+((23*odd_slot) + 23+12) % 46; - if (vrb==48) - return offset+46+((23*odd_slot) + 23-12+1) % 46; - if (vrb==49) - return offset+46+((23*odd_slot) + 23+12) % 46; - } - else { + if (vrb == 44) // even: 44->11, odd: 45->34 + return offset + ((23 * odd_slot) + 22 - 12 + 1); + if (vrb == 45) // even: 45->10, odd: 45->33 + return offset + ((23 * odd_slot) + 22 + 12); + if (vrb == 46) + return offset + 46 + ((23 * odd_slot) + 23 - 12 + 1) % 46; + if (vrb == 47) + return offset + 46 + ((23 * odd_slot) + 23 + 12) % 46; + if (vrb == 48) + return offset + 46 + ((23 * odd_slot) + 23 - 12 + 1) % 46; + if (vrb == 49) + return offset + 46 + ((23 * odd_slot) + 23 + 12) % 46; + } else { // Nrow=6,Nnull=6,NVRBDL=18,Ngap1= 27 - if (vrb>=9) - offset=18; + if (vrb >= 9) + offset = 18; else - offset=0; + offset = 0; - if (vrb<12) { - if ((vrb&3)>=2) - return offset+((9*odd_slot) + 6*(vrb&3) + (vrb>>2) + 17)%18; - else - return offset+((9*odd_slot) + 6*(vrb&3) + (vrb>>2))%18; - } - else { - return offset+((9*odd_slot) + 12*(vrb&1)+(vrb>>1) )%18 + 18*(vrb/18); + if (vrb < 12) { + if ((vrb & 3) >= 2) + return offset + ((9 * odd_slot) + 6 * (vrb & 3) + (vrb >> 2) + 17) % 18; + else + return offset + ((9 * odd_slot) + 6 * (vrb & 3) + (vrb >> 2)) % 18; + } else { + return offset + ((9 * odd_slot) + 12 * (vrb & 1) + (vrb >> 1)) % 18 + 18 * (vrb / 18); } } break; case 75: // Ngap1 = 32, NVRBRL=64, P=4, Nrow= 16, Nnull=0 - if (Ngap ==0) { - return ((32*odd_slot) + 16*(vrb&3) + (vrb>>2))%64 + (vrb/64); + if (Ngap == 0) { + return ((32 * odd_slot) + 16 * (vrb & 3) + (vrb >> 2)) % 64 + (vrb / 64); } else { // Ngap2 = 16, NVRBDL=32, Nrow=8, Nnull=0 - return ((16*odd_slot) + 8*(vrb&3) + (vrb>>2))%32 + (vrb/32); + return ((16 * odd_slot) + 8 * (vrb & 3) + (vrb >> 2)) % 32 + (vrb / 32); } break; case 100: // Ngap1 = 48, NVRBDL=96, Nrow=24, Nnull=0 - if (Ngap ==0) { - return ((48*odd_slot) + 24*(vrb&3) + (vrb>>2))%96 + (vrb/96); + if (Ngap == 0) { + return ((48 * odd_slot) + 24 * (vrb & 3) + (vrb >> 2)) % 96 + (vrb / 96); } else { // Ngap2 = 16, NVRBDL=32, Nrow=8, Nnull=0 - return ((16*odd_slot) + 8*(vrb&3) + (vrb>>2))%32 + (vrb/32); + return ((16 * odd_slot) + 8 * (vrb & 3) + (vrb >> 2)) % 32 + (vrb / 32); } break; default: - LOG_E(PHY,"Unknown N_RB_DL %d\n",N_RB_DL); + LOG_E (PHY, "Unknown N_RB_DL %d\n", N_RB_DL); return 0; } return 0; @@ -528,192 +534,193 @@ uint32_t get_prb(int N_RB_DL,int odd_slot,int vrb,int Ngap) { } -void generate_RIV_tables() +void +generate_RIV_tables () { // 6RBs localized RIV - uint8_t Lcrbs,RBstart; - uint16_t RIV; - uint32_t alloc0,allocdist0_0_even,allocdist0_0_odd,allocdist0_1_even,allocdist0_1_odd; - uint32_t alloc1,allocdist1_0_even,allocdist1_0_odd,allocdist1_1_even,allocdist1_1_odd; - uint32_t alloc2,allocdist2_0_even,allocdist2_0_odd,allocdist2_1_even,allocdist2_1_odd; - uint32_t alloc3,allocdist3_0_even,allocdist3_0_odd,allocdist3_1_even,allocdist3_1_odd; - uint32_t nVRB,nVRB_even_dist,nVRB_odd_dist; + uint8_t Lcrbs, RBstart; + uint16_t RIV; + uint32_t alloc0, allocdist0_0_even, allocdist0_0_odd, allocdist0_1_even, allocdist0_1_odd; + uint32_t alloc1, allocdist1_0_even, allocdist1_0_odd, allocdist1_1_even, allocdist1_1_odd; + uint32_t alloc2, allocdist2_0_even, allocdist2_0_odd, allocdist2_1_even, allocdist2_1_odd; + uint32_t alloc3, allocdist3_0_even, allocdist3_0_odd, allocdist3_1_even, allocdist3_1_odd; + uint32_t nVRB, nVRB_even_dist, nVRB_odd_dist; - for (RBstart=0; RBstart<6; RBstart++) { + for (RBstart = 0; RBstart < 6; RBstart++) { alloc0 = 0; allocdist0_0_even = 0; - allocdist0_0_odd = 0; - for (Lcrbs=1; Lcrbs<=(6-RBstart); Lcrbs++) { + allocdist0_0_odd = 0; + for (Lcrbs = 1; Lcrbs <= (6 - RBstart); Lcrbs++) { //printf("RBstart %d, len %d --> ",RBstart,Lcrbs); - nVRB = Lcrbs-1+RBstart; - alloc0 |= (1<RIV_max6) + if (RIV > RIV_max6) RIV_max6 = RIV; // printf("RIV %d (%d) : first_rb %d NBRB %d\n",RIV,localRIV2alloc_LUT25[RIV],RBstart,Lcrbs); localRIV2alloc_LUT6[RIV] = alloc0; - distRIV2alloc_even_LUT6[RIV] = allocdist0_0_even; - distRIV2alloc_odd_LUT6[RIV] = allocdist0_0_odd; - RIV2nb_rb_LUT6[RIV] = Lcrbs; - RIV2first_rb_LUT6[RIV] = RBstart; + distRIV2alloc_even_LUT6[RIV] = allocdist0_0_even; + distRIV2alloc_odd_LUT6[RIV] = allocdist0_0_odd; + RIV2nb_rb_LUT6[RIV] = Lcrbs; + RIV2first_rb_LUT6[RIV] = RBstart; } } - for (RBstart=0; RBstart<25; RBstart++) { + for (RBstart = 0; RBstart < 25; RBstart++) { alloc0 = 0; allocdist0_0_even = 0; - allocdist0_0_odd = 0; - for (Lcrbs=1; Lcrbs<=(25-RBstart); Lcrbs++) { - nVRB = Lcrbs-1+RBstart; + allocdist0_0_odd = 0; + for (Lcrbs = 1; Lcrbs <= (25 - RBstart); Lcrbs++) { + nVRB = Lcrbs - 1 + RBstart; //printf("RBstart %d, len %d --> ",RBstart,Lcrbs); - alloc0 |= (1<RIV_max25) + if (RIV > RIV_max25) RIV_max25 = RIV;; - localRIV2alloc_LUT25[RIV] = alloc0; - distRIV2alloc_even_LUT25[RIV] = allocdist0_0_even; - distRIV2alloc_odd_LUT25[RIV] = allocdist0_0_odd; - RIV2nb_rb_LUT25[RIV] = Lcrbs; - RIV2first_rb_LUT25[RIV] = RBstart; + localRIV2alloc_LUT25[RIV] = alloc0; + distRIV2alloc_even_LUT25[RIV] = allocdist0_0_even; + distRIV2alloc_odd_LUT25[RIV] = allocdist0_0_odd; + RIV2nb_rb_LUT25[RIV] = Lcrbs; + RIV2first_rb_LUT25[RIV] = RBstart; } } - for (RBstart=0; RBstart<50; RBstart++) { + for (RBstart = 0; RBstart < 50; RBstart++) { alloc0 = 0; alloc1 = 0; - allocdist0_0_even=0; - allocdist1_0_even=0; - allocdist0_0_odd=0; - allocdist1_0_odd=0; - allocdist0_1_even=0; - allocdist1_1_even=0; - allocdist0_1_odd=0; - allocdist1_1_odd=0; + allocdist0_0_even = 0; + allocdist1_0_even = 0; + allocdist0_0_odd = 0; + allocdist1_0_odd = 0; + allocdist0_1_even = 0; + allocdist1_1_even = 0; + allocdist0_1_odd = 0; + allocdist1_1_odd = 0; - for (Lcrbs=1; Lcrbs<=(50-RBstart); Lcrbs++) { + for (Lcrbs = 1; Lcrbs <= (50 - RBstart); Lcrbs++) { - nVRB = Lcrbs-1+RBstart; + nVRB = Lcrbs - 1 + RBstart; - if (nVRB<32) - alloc0 |= (1<RIV_max50) + if (RIV > RIV_max50) RIV_max50 = RIV; // printf("RIV %d : first_rb %d NBRB %d\n",RIV,RBstart,Lcrbs); - localRIV2alloc_LUT50_0[RIV] = alloc0; - localRIV2alloc_LUT50_1[RIV] = alloc1; - distRIV2alloc_gap0_even_LUT50_0[RIV] = allocdist0_0_even; - distRIV2alloc_gap0_even_LUT50_1[RIV] = allocdist1_0_even; - distRIV2alloc_gap0_odd_LUT50_0[RIV] = allocdist0_0_odd; - distRIV2alloc_gap0_odd_LUT50_1[RIV] = allocdist1_0_odd; - distRIV2alloc_gap1_even_LUT50_0[RIV] = allocdist0_1_even; - distRIV2alloc_gap1_even_LUT50_1[RIV] = allocdist1_1_even; - distRIV2alloc_gap1_odd_LUT50_0[RIV] = allocdist0_1_odd; - distRIV2alloc_gap1_odd_LUT50_1[RIV] = allocdist1_1_odd; - RIV2nb_rb_LUT50[RIV] = Lcrbs; - RIV2first_rb_LUT50[RIV] = RBstart; + localRIV2alloc_LUT50_0[RIV] = alloc0; + localRIV2alloc_LUT50_1[RIV] = alloc1; + distRIV2alloc_gap0_even_LUT50_0[RIV] = allocdist0_0_even; + distRIV2alloc_gap0_even_LUT50_1[RIV] = allocdist1_0_even; + distRIV2alloc_gap0_odd_LUT50_0[RIV] = allocdist0_0_odd; + distRIV2alloc_gap0_odd_LUT50_1[RIV] = allocdist1_0_odd; + distRIV2alloc_gap1_even_LUT50_0[RIV] = allocdist0_1_even; + distRIV2alloc_gap1_even_LUT50_1[RIV] = allocdist1_1_even; + distRIV2alloc_gap1_odd_LUT50_0[RIV] = allocdist0_1_odd; + distRIV2alloc_gap1_odd_LUT50_1[RIV] = allocdist1_1_odd; + RIV2nb_rb_LUT50[RIV] = Lcrbs; + RIV2first_rb_LUT50[RIV] = RBstart; } } - for (RBstart=0; RBstart<100; RBstart++) { + for (RBstart = 0; RBstart < 100; RBstart++) { alloc0 = 0; alloc1 = 0; alloc2 = 0; alloc3 = 0; - allocdist0_0_even=0; - allocdist1_0_even=0; - allocdist2_0_even=0; - allocdist3_0_even=0; - allocdist0_0_odd=0; - allocdist1_0_odd=0; - allocdist2_0_odd=0; - allocdist3_0_odd=0; - allocdist0_1_even=0; - allocdist1_1_even=0; - allocdist2_1_even=0; - allocdist3_1_even=0; - allocdist0_1_odd=0; - allocdist1_1_odd=0; - allocdist2_1_odd=0; - allocdist3_1_odd=0; + allocdist0_0_even = 0; + allocdist1_0_even = 0; + allocdist2_0_even = 0; + allocdist3_0_even = 0; + allocdist0_0_odd = 0; + allocdist1_0_odd = 0; + allocdist2_0_odd = 0; + allocdist3_0_odd = 0; + allocdist0_1_even = 0; + allocdist1_1_even = 0; + allocdist2_1_even = 0; + allocdist3_1_even = 0; + allocdist0_1_odd = 0; + allocdist1_1_odd = 0; + allocdist2_1_odd = 0; + allocdist3_1_odd = 0; - for (Lcrbs=1; Lcrbs<=(100-RBstart); Lcrbs++) { + for (Lcrbs = 1; Lcrbs <= (100 - RBstart); Lcrbs++) { - nVRB = Lcrbs-1+RBstart; + nVRB = Lcrbs - 1 + RBstart; - if (nVRB<32) - alloc0 |= (1< nVRB_even_dist %d\n",nVRB,nVRB_even_dist); - if (nVRB_even_dist<32) - allocdist0_0_even |= (1<(%08x.%08x.%08x.%08x)\n", allocdist0_0_even, @@ -723,44 +730,44 @@ void generate_RIV_tables() ); */ // Distributed Gap1, odd slot - nVRB_odd_dist = get_prb(100,1,nVRB,0); - if (nVRB_odd_dist<32) - allocdist0_0_odd |= (1<RIV_max100) + if (RIV > RIV_max100) RIV_max100 = RIV; // printf("RIV %d : first_rb %d NBRB %d\n",RIV,RBstart,Lcrbs); @@ -768,25 +775,25 @@ void generate_RIV_tables() localRIV2alloc_LUT100_1[RIV] = alloc1; localRIV2alloc_LUT100_2[RIV] = alloc2; localRIV2alloc_LUT100_3[RIV] = alloc3; - distRIV2alloc_gap0_even_LUT100_0[RIV] = allocdist0_0_even; - distRIV2alloc_gap0_even_LUT100_1[RIV] = allocdist1_0_even; - distRIV2alloc_gap0_even_LUT100_2[RIV] = allocdist2_0_even; - distRIV2alloc_gap0_even_LUT100_3[RIV] = allocdist3_0_even; - distRIV2alloc_gap0_odd_LUT100_0[RIV] = allocdist0_0_odd; - distRIV2alloc_gap0_odd_LUT100_1[RIV] = allocdist1_0_odd; - distRIV2alloc_gap0_odd_LUT100_2[RIV] = allocdist2_0_odd; - distRIV2alloc_gap0_odd_LUT100_3[RIV] = allocdist3_0_odd; - distRIV2alloc_gap1_even_LUT100_0[RIV] = allocdist0_1_even; - distRIV2alloc_gap1_even_LUT100_1[RIV] = allocdist1_1_even; - distRIV2alloc_gap1_even_LUT100_2[RIV] = allocdist2_1_even; - distRIV2alloc_gap1_even_LUT100_3[RIV] = allocdist3_1_even; - distRIV2alloc_gap1_odd_LUT100_0[RIV] = allocdist0_1_odd; - distRIV2alloc_gap1_odd_LUT100_1[RIV] = allocdist1_1_odd; - distRIV2alloc_gap1_odd_LUT100_2[RIV] = allocdist2_1_odd; - distRIV2alloc_gap1_odd_LUT100_3[RIV] = allocdist3_1_odd; + distRIV2alloc_gap0_even_LUT100_0[RIV] = allocdist0_0_even; + distRIV2alloc_gap0_even_LUT100_1[RIV] = allocdist1_0_even; + distRIV2alloc_gap0_even_LUT100_2[RIV] = allocdist2_0_even; + distRIV2alloc_gap0_even_LUT100_3[RIV] = allocdist3_0_even; + distRIV2alloc_gap0_odd_LUT100_0[RIV] = allocdist0_0_odd; + distRIV2alloc_gap0_odd_LUT100_1[RIV] = allocdist1_0_odd; + distRIV2alloc_gap0_odd_LUT100_2[RIV] = allocdist2_0_odd; + distRIV2alloc_gap0_odd_LUT100_3[RIV] = allocdist3_0_odd; + distRIV2alloc_gap1_even_LUT100_0[RIV] = allocdist0_1_even; + distRIV2alloc_gap1_even_LUT100_1[RIV] = allocdist1_1_even; + distRIV2alloc_gap1_even_LUT100_2[RIV] = allocdist2_1_even; + distRIV2alloc_gap1_even_LUT100_3[RIV] = allocdist3_1_even; + distRIV2alloc_gap1_odd_LUT100_0[RIV] = allocdist0_1_odd; + distRIV2alloc_gap1_odd_LUT100_1[RIV] = allocdist1_1_odd; + distRIV2alloc_gap1_odd_LUT100_2[RIV] = allocdist2_1_odd; + distRIV2alloc_gap1_odd_LUT100_3[RIV] = allocdist3_1_odd; - RIV2nb_rb_LUT100[RIV] = Lcrbs; - RIV2first_rb_LUT100[RIV] = RBstart; + RIV2nb_rb_LUT100[RIV] = Lcrbs; + RIV2first_rb_LUT100[RIV] = RBstart; } } } @@ -801,51 +808,56 @@ void generate_RIV_tables() // n_tilde_PRB(0,1) = (0,2) -int8_t find_dlsch(uint16_t rnti, PHY_VARS_eNB *eNB,find_type_t type) +int8_t +find_dlsch (uint16_t rnti, PHY_VARS_eNB * eNB, find_type_t type) { - uint8_t i; - int8_t first_free_index=-1; + uint8_t i; + int8_t first_free_index = -1; - AssertFatal(eNB!=NULL,"eNB is null\n"); - for (i=0; idlsch[i]!=NULL,"eNB->dlsch[%d] is null\n",i); - AssertFatal(eNB->dlsch[i]!=NULL,"eNB->dlsch[%d][0] is null\n",i); - LOG_D(PHY,"searching for rnti %x : UE index %d=> harq_mask %x, rnti %x, first_free_index %d\n", - rnti,i,eNB->dlsch[i][0]->harq_mask,eNB->dlsch[i][0]->rnti,first_free_index); - if ((eNB->dlsch[i][0]->harq_mask >0) && - (eNB->dlsch[i][0]->rnti==rnti) && - (type!=SEARCH_FREE)) return i; - else if ((eNB->dlsch[i][0]->harq_mask == 0) && (first_free_index==-1)) first_free_index=i; + AssertFatal (eNB != NULL, "eNB is null\n"); + for (i = 0; i < NUMBER_OF_UE_MAX; i++) { + AssertFatal (eNB->dlsch[i] != NULL, "eNB->dlsch[%d] is null\n", i); + AssertFatal (eNB->dlsch[i] != NULL, "eNB->dlsch[%d][0] is null\n", i); + LOG_D (PHY, "searching for rnti %x : UE index %d=> harq_mask %x, rnti %x, first_free_index %d\n", rnti, i, eNB->dlsch[i][0]->harq_mask, eNB->dlsch[i][0]->rnti, first_free_index); + if ((eNB->dlsch[i][0]->harq_mask > 0) && (eNB->dlsch[i][0]->rnti == rnti) && (type != SEARCH_FREE)) + return i; + else if ((eNB->dlsch[i][0]->harq_mask == 0) && (first_free_index == -1)) + first_free_index = i; } - if (type == SEARCH_EXIST) return -1; + if (type == SEARCH_EXIST) + return -1; if (first_free_index != -1) eNB->dlsch[first_free_index][0]->rnti = 0; return first_free_index; } -int8_t find_ulsch(uint16_t rnti, PHY_VARS_eNB *eNB,find_type_t type) +int8_t +find_ulsch (uint16_t rnti, PHY_VARS_eNB * eNB, find_type_t type) { - uint8_t i; - int8_t first_free_index=-1; + uint8_t i; + int8_t first_free_index = -1; - AssertFatal(eNB!=NULL,"eNB is null\n"); - for (i=0; iulsch[i]!=NULL,"eNB->ulsch[%d] is null\n",i); - if ((eNB->ulsch[i]->harq_mask >0) && - (eNB->ulsch[i]->rnti==rnti)) return i; - else if ((eNB->ulsch[i]->harq_mask == 0) && (first_free_index==-1)) first_free_index=i; + AssertFatal (eNB != NULL, "eNB is null\n"); + for (i = 0; i < NUMBER_OF_UE_MAX; i++) { + AssertFatal (eNB->ulsch[i] != NULL, "eNB->ulsch[%d] is null\n", i); + if ((eNB->ulsch[i]->harq_mask > 0) && (eNB->ulsch[i]->rnti == rnti)) + return i; + else if ((eNB->ulsch[i]->harq_mask == 0) && (first_free_index == -1)) + first_free_index = i; } - if (type == SEARCH_EXIST) return -1; + if (type == SEARCH_EXIST) + return -1; if (first_free_index != -1) eNB->ulsch[first_free_index]->rnti = 0; return first_free_index; } -uint32_t get_rballoc(vrb_t vrb_type,uint16_t rb_alloc_dci) +uint32_t +get_rballoc (vrb_t vrb_type, uint16_t rb_alloc_dci) { - return(localRIV2alloc_LUT25[rb_alloc_dci]); + return (localRIV2alloc_LUT25[rb_alloc_dci]); } @@ -862,514 +874,517 @@ uint8_t get_transmission_mode(module_id_t Mod_id, uint8_t CC_id, rnti_t rnti) } */ -void fill_pdcch_order(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,DCI_ALLOC_t *dci_alloc,nfapi_dl_config_dci_dl_pdu *pdu) +void +fill_pdcch_order (PHY_VARS_eNB * eNB, eNB_rxtx_proc_t * proc, DCI_ALLOC_t * dci_alloc, nfapi_dl_config_dci_dl_pdu * pdu) { - LTE_DL_FRAME_PARMS *fp = &eNB->frame_parms; - uint8_t *dci_pdu = &dci_alloc->dci_pdu[0]; - nfapi_dl_config_dci_dl_pdu_rel8_t *rel8 = &pdu->dci_dl_pdu_rel8; + LTE_DL_FRAME_PARMS *fp = &eNB->frame_parms; + uint8_t *dci_pdu = &dci_alloc->dci_pdu[0]; + nfapi_dl_config_dci_dl_pdu_rel8_t *rel8 = &pdu->dci_dl_pdu_rel8; dci_alloc->firstCCE = rel8->cce_idx; - dci_alloc->L = rel8->aggregation_level; - dci_alloc->rnti = rel8->rnti; + dci_alloc->L = rel8->aggregation_level; + dci_alloc->rnti = rel8->rnti; dci_alloc->harq_pid = rel8->harq_process; - dci_alloc->ra_flag = 0; - dci_alloc->format = format1A; + dci_alloc->ra_flag = 0; + dci_alloc->format = format1A; - LOG_D(PHY,"NFAPI: DCI format %d, nCCE %d, L %d, rnti %x,harq_pid %d\n", - rel8->dci_format,rel8->cce_idx,rel8->aggregation_level,rel8->rnti,rel8->harq_process); + LOG_D (PHY, "NFAPI: DCI format %d, nCCE %d, L %d, rnti %x,harq_pid %d\n", rel8->dci_format, rel8->cce_idx, rel8->aggregation_level, rel8->rnti, rel8->harq_process); switch (fp->N_RB_DL) { case 6: if (fp->frame_type == TDD) { - dci_alloc->dci_length = sizeof_DCI1A_1_5MHz_TDD_1_6_t; - ((DCI1A_1_5MHz_TDD_1_6_t *)dci_pdu)->type = 1; - ((DCI1A_1_5MHz_TDD_1_6_t *)dci_pdu)->vrb_type = rel8->virtual_resource_block_assignment_flag; - ((DCI1A_1_5MHz_TDD_1_6_t *)dci_pdu)->mcs = rel8->mcs_1; - ((DCI1A_1_5MHz_TDD_1_6_t *)dci_pdu)->ndi = rel8->new_data_indicator_1; - ((DCI1A_1_5MHz_TDD_1_6_t *)dci_pdu)->rballoc = rel8->resource_block_coding; - ((DCI1A_1_5MHz_TDD_1_6_t *)dci_pdu)->rv = rel8->redundancy_version_1; - ((DCI1A_1_5MHz_TDD_1_6_t *)dci_pdu)->TPC = rel8->tpc; - ((DCI1A_1_5MHz_TDD_1_6_t *)dci_pdu)->harq_pid = rel8->harq_process; - ((DCI1A_1_5MHz_TDD_1_6_t *)dci_pdu)->dai = rel8->downlink_assignment_index; + dci_alloc->dci_length = sizeof_DCI1A_1_5MHz_TDD_1_6_t; + ((DCI1A_1_5MHz_TDD_1_6_t *) dci_pdu)->type = 1; + ((DCI1A_1_5MHz_TDD_1_6_t *) dci_pdu)->vrb_type = rel8->virtual_resource_block_assignment_flag; + ((DCI1A_1_5MHz_TDD_1_6_t *) dci_pdu)->mcs = rel8->mcs_1; + ((DCI1A_1_5MHz_TDD_1_6_t *) dci_pdu)->ndi = rel8->new_data_indicator_1; + ((DCI1A_1_5MHz_TDD_1_6_t *) dci_pdu)->rballoc = rel8->resource_block_coding; + ((DCI1A_1_5MHz_TDD_1_6_t *) dci_pdu)->rv = rel8->redundancy_version_1; + ((DCI1A_1_5MHz_TDD_1_6_t *) dci_pdu)->TPC = rel8->tpc; + ((DCI1A_1_5MHz_TDD_1_6_t *) dci_pdu)->harq_pid = rel8->harq_process; + ((DCI1A_1_5MHz_TDD_1_6_t *) dci_pdu)->dai = rel8->downlink_assignment_index; } else { - dci_alloc->dci_length = sizeof_DCI1A_1_5MHz_FDD_t; - ((DCI1A_1_5MHz_FDD_t *)dci_pdu)->type = 1; - ((DCI1A_1_5MHz_FDD_t *)dci_pdu)->vrb_type = rel8->virtual_resource_block_assignment_flag; - ((DCI1A_1_5MHz_FDD_t *)dci_pdu)->mcs = rel8->mcs_1; - ((DCI1A_1_5MHz_FDD_t *)dci_pdu)->ndi = rel8->new_data_indicator_1; - ((DCI1A_1_5MHz_FDD_t *)dci_pdu)->rballoc = rel8->resource_block_coding; - ((DCI1A_1_5MHz_FDD_t *)dci_pdu)->rv = rel8->redundancy_version_1; - ((DCI1A_1_5MHz_FDD_t *)dci_pdu)->TPC = rel8->tpc; - ((DCI1A_1_5MHz_FDD_t *)dci_pdu)->harq_pid = rel8->harq_process; + dci_alloc->dci_length = sizeof_DCI1A_1_5MHz_FDD_t; + ((DCI1A_1_5MHz_FDD_t *) dci_pdu)->type = 1; + ((DCI1A_1_5MHz_FDD_t *) dci_pdu)->vrb_type = rel8->virtual_resource_block_assignment_flag; + ((DCI1A_1_5MHz_FDD_t *) dci_pdu)->mcs = rel8->mcs_1; + ((DCI1A_1_5MHz_FDD_t *) dci_pdu)->ndi = rel8->new_data_indicator_1; + ((DCI1A_1_5MHz_FDD_t *) dci_pdu)->rballoc = rel8->resource_block_coding; + ((DCI1A_1_5MHz_FDD_t *) dci_pdu)->rv = rel8->redundancy_version_1; + ((DCI1A_1_5MHz_FDD_t *) dci_pdu)->TPC = rel8->tpc; + ((DCI1A_1_5MHz_FDD_t *) dci_pdu)->harq_pid = rel8->harq_process; // printf("FDD 1A: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB); } break; case 25: if (fp->frame_type == TDD) { - dci_alloc->dci_length = sizeof_DCI1A_5MHz_TDD_1_6_t; - ((DCI1A_5MHz_TDD_1_6_t *)dci_pdu)->type = 1; - ((DCI1A_5MHz_TDD_1_6_t *)dci_pdu)->vrb_type = rel8->virtual_resource_block_assignment_flag; - ((DCI1A_5MHz_TDD_1_6_t *)dci_pdu)->mcs = rel8->mcs_1; - ((DCI1A_5MHz_TDD_1_6_t *)dci_pdu)->ndi = rel8->new_data_indicator_1; - ((DCI1A_5MHz_TDD_1_6_t *)dci_pdu)->rballoc = rel8->resource_block_coding; - ((DCI1A_5MHz_TDD_1_6_t *)dci_pdu)->rv = rel8->redundancy_version_1; - ((DCI1A_5MHz_TDD_1_6_t *)dci_pdu)->TPC = rel8->tpc; - ((DCI1A_5MHz_TDD_1_6_t *)dci_pdu)->harq_pid = rel8->harq_process; - ((DCI1A_5MHz_TDD_1_6_t *)dci_pdu)->dai = rel8->downlink_assignment_index; - // printf("TDD 1A: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB); + dci_alloc->dci_length = sizeof_DCI1A_5MHz_TDD_1_6_t; + ((DCI1A_5MHz_TDD_1_6_t *) dci_pdu)->type = 1; + ((DCI1A_5MHz_TDD_1_6_t *) dci_pdu)->vrb_type = rel8->virtual_resource_block_assignment_flag; + ((DCI1A_5MHz_TDD_1_6_t *) dci_pdu)->mcs = rel8->mcs_1; + ((DCI1A_5MHz_TDD_1_6_t *) dci_pdu)->ndi = rel8->new_data_indicator_1; + ((DCI1A_5MHz_TDD_1_6_t *) dci_pdu)->rballoc = rel8->resource_block_coding; + ((DCI1A_5MHz_TDD_1_6_t *) dci_pdu)->rv = rel8->redundancy_version_1; + ((DCI1A_5MHz_TDD_1_6_t *) dci_pdu)->TPC = rel8->tpc; + ((DCI1A_5MHz_TDD_1_6_t *) dci_pdu)->harq_pid = rel8->harq_process; + ((DCI1A_5MHz_TDD_1_6_t *) dci_pdu)->dai = rel8->downlink_assignment_index; + // printf("TDD 1A: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB); } else { - dci_alloc->dci_length = sizeof_DCI1A_5MHz_FDD_t; - ((DCI1A_5MHz_FDD_t *)dci_pdu)->type = 1; - ((DCI1A_5MHz_FDD_t *)dci_pdu)->vrb_type = rel8->virtual_resource_block_assignment_flag; - ((DCI1A_5MHz_FDD_t *)dci_pdu)->mcs = rel8->mcs_1; - ((DCI1A_5MHz_FDD_t *)dci_pdu)->ndi = rel8->new_data_indicator_1; - ((DCI1A_5MHz_FDD_t *)dci_pdu)->rballoc = rel8->resource_block_coding; - ((DCI1A_5MHz_FDD_t *)dci_pdu)->rv = rel8->redundancy_version_1; - ((DCI1A_5MHz_FDD_t *)dci_pdu)->TPC = rel8->tpc; - ((DCI1A_5MHz_FDD_t *)dci_pdu)->harq_pid = rel8->harq_process; + dci_alloc->dci_length = sizeof_DCI1A_5MHz_FDD_t; + ((DCI1A_5MHz_FDD_t *) dci_pdu)->type = 1; + ((DCI1A_5MHz_FDD_t *) dci_pdu)->vrb_type = rel8->virtual_resource_block_assignment_flag; + ((DCI1A_5MHz_FDD_t *) dci_pdu)->mcs = rel8->mcs_1; + ((DCI1A_5MHz_FDD_t *) dci_pdu)->ndi = rel8->new_data_indicator_1; + ((DCI1A_5MHz_FDD_t *) dci_pdu)->rballoc = rel8->resource_block_coding; + ((DCI1A_5MHz_FDD_t *) dci_pdu)->rv = rel8->redundancy_version_1; + ((DCI1A_5MHz_FDD_t *) dci_pdu)->TPC = rel8->tpc; + ((DCI1A_5MHz_FDD_t *) dci_pdu)->harq_pid = rel8->harq_process; // printf("FDD 1A: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB); } break; case 50: if (fp->frame_type == TDD) { - dci_alloc->dci_length = sizeof_DCI1A_10MHz_TDD_1_6_t; - ((DCI1A_10MHz_TDD_1_6_t *)dci_pdu)->type = 1; - ((DCI1A_10MHz_TDD_1_6_t *)dci_pdu)->vrb_type = rel8->virtual_resource_block_assignment_flag; - ((DCI1A_10MHz_TDD_1_6_t *)dci_pdu)->mcs = rel8->mcs_1; - ((DCI1A_10MHz_TDD_1_6_t *)dci_pdu)->ndi = rel8->new_data_indicator_1; - ((DCI1A_10MHz_TDD_1_6_t *)dci_pdu)->rballoc = rel8->resource_block_coding; - ((DCI1A_10MHz_TDD_1_6_t *)dci_pdu)->rv = rel8->redundancy_version_1; - ((DCI1A_10MHz_TDD_1_6_t *)dci_pdu)->TPC = rel8->tpc; - ((DCI1A_10MHz_TDD_1_6_t *)dci_pdu)->harq_pid = rel8->harq_process; - ((DCI1A_10MHz_TDD_1_6_t *)dci_pdu)->dai = rel8->downlink_assignment_index; + dci_alloc->dci_length = sizeof_DCI1A_10MHz_TDD_1_6_t; + ((DCI1A_10MHz_TDD_1_6_t *) dci_pdu)->type = 1; + ((DCI1A_10MHz_TDD_1_6_t *) dci_pdu)->vrb_type = rel8->virtual_resource_block_assignment_flag; + ((DCI1A_10MHz_TDD_1_6_t *) dci_pdu)->mcs = rel8->mcs_1; + ((DCI1A_10MHz_TDD_1_6_t *) dci_pdu)->ndi = rel8->new_data_indicator_1; + ((DCI1A_10MHz_TDD_1_6_t *) dci_pdu)->rballoc = rel8->resource_block_coding; + ((DCI1A_10MHz_TDD_1_6_t *) dci_pdu)->rv = rel8->redundancy_version_1; + ((DCI1A_10MHz_TDD_1_6_t *) dci_pdu)->TPC = rel8->tpc; + ((DCI1A_10MHz_TDD_1_6_t *) dci_pdu)->harq_pid = rel8->harq_process; + ((DCI1A_10MHz_TDD_1_6_t *) dci_pdu)->dai = rel8->downlink_assignment_index; // printf("TDD 1A: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB); } else { - dci_alloc->dci_length = sizeof_DCI1A_10MHz_FDD_t; - ((DCI1A_10MHz_FDD_t *)dci_pdu)->type = 1; - ((DCI1A_10MHz_FDD_t *)dci_pdu)->vrb_type = rel8->virtual_resource_block_assignment_flag; - ((DCI1A_10MHz_FDD_t *)dci_pdu)->mcs = rel8->mcs_1; - ((DCI1A_10MHz_FDD_t *)dci_pdu)->ndi = rel8->new_data_indicator_1; - ((DCI1A_10MHz_FDD_t *)dci_pdu)->rballoc = rel8->resource_block_coding; - ((DCI1A_10MHz_FDD_t *)dci_pdu)->rv = rel8->redundancy_version_1; - ((DCI1A_10MHz_FDD_t *)dci_pdu)->TPC = rel8->tpc; - ((DCI1A_10MHz_FDD_t *)dci_pdu)->harq_pid = rel8->harq_process; + dci_alloc->dci_length = sizeof_DCI1A_10MHz_FDD_t; + ((DCI1A_10MHz_FDD_t *) dci_pdu)->type = 1; + ((DCI1A_10MHz_FDD_t *) dci_pdu)->vrb_type = rel8->virtual_resource_block_assignment_flag; + ((DCI1A_10MHz_FDD_t *) dci_pdu)->mcs = rel8->mcs_1; + ((DCI1A_10MHz_FDD_t *) dci_pdu)->ndi = rel8->new_data_indicator_1; + ((DCI1A_10MHz_FDD_t *) dci_pdu)->rballoc = rel8->resource_block_coding; + ((DCI1A_10MHz_FDD_t *) dci_pdu)->rv = rel8->redundancy_version_1; + ((DCI1A_10MHz_FDD_t *) dci_pdu)->TPC = rel8->tpc; + ((DCI1A_10MHz_FDD_t *) dci_pdu)->harq_pid = rel8->harq_process; // printf("FDD 1A: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB); } break; case 100: if (fp->frame_type == TDD) { - dci_alloc->dci_length = sizeof_DCI1A_20MHz_TDD_1_6_t; - ((DCI1A_20MHz_TDD_1_6_t *)dci_pdu)->type = 1; - ((DCI1A_20MHz_TDD_1_6_t *)dci_pdu)->vrb_type = rel8->virtual_resource_block_assignment_flag; - ((DCI1A_20MHz_TDD_1_6_t *)dci_pdu)->mcs = rel8->mcs_1; - ((DCI1A_20MHz_TDD_1_6_t *)dci_pdu)->ndi = rel8->new_data_indicator_1; - ((DCI1A_20MHz_TDD_1_6_t *)dci_pdu)->rballoc = rel8->resource_block_coding; - ((DCI1A_20MHz_TDD_1_6_t *)dci_pdu)->rv = rel8->redundancy_version_1; - ((DCI1A_20MHz_TDD_1_6_t *)dci_pdu)->TPC = rel8->tpc; - ((DCI1A_20MHz_TDD_1_6_t *)dci_pdu)->harq_pid = rel8->harq_process; - ((DCI1A_20MHz_TDD_1_6_t *)dci_pdu)->dai = rel8->downlink_assignment_index; + dci_alloc->dci_length = sizeof_DCI1A_20MHz_TDD_1_6_t; + ((DCI1A_20MHz_TDD_1_6_t *) dci_pdu)->type = 1; + ((DCI1A_20MHz_TDD_1_6_t *) dci_pdu)->vrb_type = rel8->virtual_resource_block_assignment_flag; + ((DCI1A_20MHz_TDD_1_6_t *) dci_pdu)->mcs = rel8->mcs_1; + ((DCI1A_20MHz_TDD_1_6_t *) dci_pdu)->ndi = rel8->new_data_indicator_1; + ((DCI1A_20MHz_TDD_1_6_t *) dci_pdu)->rballoc = rel8->resource_block_coding; + ((DCI1A_20MHz_TDD_1_6_t *) dci_pdu)->rv = rel8->redundancy_version_1; + ((DCI1A_20MHz_TDD_1_6_t *) dci_pdu)->TPC = rel8->tpc; + ((DCI1A_20MHz_TDD_1_6_t *) dci_pdu)->harq_pid = rel8->harq_process; + ((DCI1A_20MHz_TDD_1_6_t *) dci_pdu)->dai = rel8->downlink_assignment_index; // printf("TDD 1A: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB); } else { - dci_alloc->dci_length = sizeof_DCI1A_20MHz_FDD_t; - ((DCI1A_20MHz_FDD_t *)dci_pdu)->type = 1; - ((DCI1A_20MHz_FDD_t *)dci_pdu)->vrb_type = rel8->virtual_resource_block_assignment_flag; - ((DCI1A_20MHz_FDD_t *)dci_pdu)->mcs = rel8->mcs_1; - ((DCI1A_20MHz_FDD_t *)dci_pdu)->ndi = rel8->new_data_indicator_1; - ((DCI1A_20MHz_FDD_t *)dci_pdu)->rballoc = rel8->resource_block_coding; - ((DCI1A_20MHz_FDD_t *)dci_pdu)->rv = rel8->redundancy_version_1; - ((DCI1A_20MHz_FDD_t *)dci_pdu)->TPC = rel8->tpc; - ((DCI1A_20MHz_FDD_t *)dci_pdu)->harq_pid = rel8->harq_process; + dci_alloc->dci_length = sizeof_DCI1A_20MHz_FDD_t; + ((DCI1A_20MHz_FDD_t *) dci_pdu)->type = 1; + ((DCI1A_20MHz_FDD_t *) dci_pdu)->vrb_type = rel8->virtual_resource_block_assignment_flag; + ((DCI1A_20MHz_FDD_t *) dci_pdu)->mcs = rel8->mcs_1; + ((DCI1A_20MHz_FDD_t *) dci_pdu)->ndi = rel8->new_data_indicator_1; + ((DCI1A_20MHz_FDD_t *) dci_pdu)->rballoc = rel8->resource_block_coding; + ((DCI1A_20MHz_FDD_t *) dci_pdu)->rv = rel8->redundancy_version_1; + ((DCI1A_20MHz_FDD_t *) dci_pdu)->TPC = rel8->tpc; + ((DCI1A_20MHz_FDD_t *) dci_pdu)->harq_pid = rel8->harq_process; // printf("FDD 1A: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB); } break; } - LOG_I(PHY,"%d.%d: DCI 1A: rnti %x, PDCCH order to do PRACH\n", - proc->frame_tx, proc->subframe_tx, rel8->rnti); + LOG_I (PHY, "%d.%d: DCI 1A: rnti %x, PDCCH order to do PRACH\n", proc->frame_tx, proc->subframe_tx, rel8->rnti); } -void fill_dci_and_dlsch(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,DCI_ALLOC_t *dci_alloc,nfapi_dl_config_dci_dl_pdu *pdu) +void +fill_dci_and_dlsch (PHY_VARS_eNB * eNB, eNB_rxtx_proc_t * proc, DCI_ALLOC_t * dci_alloc, nfapi_dl_config_dci_dl_pdu * pdu) { LTE_DL_FRAME_PARMS *fp = &eNB->frame_parms; - uint8_t *dci_pdu = &dci_alloc->dci_pdu[0]; + uint8_t *dci_pdu = &dci_alloc->dci_pdu[0]; nfapi_dl_config_dci_dl_pdu_rel8_t *rel8 = &pdu->dci_dl_pdu_rel8; /* check if this is a DCI 1A PDCCH order for RAPROC */ if (rel8->dci_format == NFAPI_DL_DCI_FORMAT_1A && rel8->rnti_type == 1) { - int full_rb; + int full_rb; switch (fp->N_RB_DL) { - case 6: full_rb = 63; break; - case 25: full_rb = 511; break; - case 50: full_rb = 2047; break; - case 100: full_rb = 8191; break; - default: abort(); + case 6: + full_rb = 63; + break; + case 25: + full_rb = 511; + break; + case 50: + full_rb = 2047; + break; + case 100: + full_rb = 8191; + break; + default: + abort (); } if (rel8->resource_block_coding == full_rb) - return fill_pdcch_order(eNB, proc, dci_alloc, pdu); + return fill_pdcch_order (eNB, proc, dci_alloc, pdu); } - LTE_eNB_DLSCH_t *dlsch0=NULL,*dlsch1=NULL; - LTE_DL_eNB_HARQ_t *dlsch0_harq=NULL,*dlsch1_harq=NULL; - int beamforming_mode = 0; - int UE_id=-1; - int subframe = proc->subframe_tx; - int NPRB; - int TB0_active; - int TB1_active; - uint16_t DL_pmi_single=0; // This should be taken from DLSCH parameters for PUSCH precoding - uint8_t I_mcs = 0; - + LTE_eNB_DLSCH_t *dlsch0 = NULL, *dlsch1 = NULL; + LTE_DL_eNB_HARQ_t *dlsch0_harq = NULL, *dlsch1_harq = NULL; + int beamforming_mode = 0; + int UE_id = -1; + int subframe = proc->subframe_tx; + int frame = proc->frame_tx; + int NPRB; + int TB0_active; + int TB1_active; + uint16_t DL_pmi_single = 0; // This should be taken from DLSCH parameters for PUSCH precoding + uint8_t I_mcs = 0; + dci_alloc->firstCCE = rel8->cce_idx; - dci_alloc->L = rel8->aggregation_level; - dci_alloc->rnti = rel8->rnti; + dci_alloc->L = rel8->aggregation_level; + dci_alloc->rnti = rel8->rnti; dci_alloc->harq_pid = rel8->harq_process; - dci_alloc->ra_flag = 0; + dci_alloc->ra_flag = 0; - LOG_D(PHY,"NFAPI: DCI format %d, nCCE %d, L %d, rnti %x,harq_pid %d\n", - rel8->dci_format,rel8->cce_idx,rel8->aggregation_level,rel8->rnti,rel8->harq_process); - if ((rel8->rnti_type == 2 ) && (rel8->rnti != SI_RNTI) && (rel8->rnti != P_RNTI)) dci_alloc->ra_flag = 1; + LOG_D (PHY, "NFAPI: DCI format %d, nCCE %d, L %d, rnti %x,harq_pid %d\n", rel8->dci_format, rel8->cce_idx, rel8->aggregation_level, rel8->rnti, rel8->harq_process); + if ((rel8->rnti_type == 2) && (rel8->rnti != SI_RNTI) && (rel8->rnti != P_RNTI)) + dci_alloc->ra_flag = 1; - UE_id = find_dlsch(rel8->rnti,eNB,SEARCH_EXIST_OR_FREE); - AssertFatal(UE_id!=-1,"no free or exiting dlsch_context\n"); - AssertFatal(UE_id= %d(NUMBER_OF_UE_MAX)\n",UE_id,NUMBER_OF_UE_MAX); + UE_id = find_dlsch (rel8->rnti, eNB, SEARCH_EXIST_OR_FREE); + AssertFatal (UE_id != -1, "no free or exiting dlsch_context\n"); + AssertFatal (UE_id < NUMBER_OF_UE_MAX, "returned UE_id %d >= %d(NUMBER_OF_UE_MAX)\n", UE_id, NUMBER_OF_UE_MAX); dlsch0 = eNB->dlsch[UE_id][0]; dlsch1 = eNB->dlsch[UE_id][1]; - - beamforming_mode = eNB->transmission_mode[(uint8_t)UE_id]<7?0:eNB->transmission_mode[(uint8_t)UE_id]; - dlsch0_harq = dlsch0->harq_processes[rel8->harq_process]; - dlsch0_harq->codeword = 0; - dlsch1_harq = dlsch1->harq_processes[rel8->harq_process]; - dlsch1_harq->codeword = 1; - dlsch0->subframe_tx[subframe] = 1; - if (dlsch0->rnti != rel8->rnti) { // if rnti of dlsch is not the same as in the config, this is a new entry - dlsch0_harq->round=0; - dlsch0->harq_mask=0; + beamforming_mode = eNB->transmission_mode[(uint8_t) UE_id] < 7 ? 0 : eNB->transmission_mode[(uint8_t) UE_id]; + dlsch0_harq = dlsch0->harq_processes[rel8->harq_process]; + dlsch0_harq->codeword = 0; + dlsch1_harq = dlsch1->harq_processes[rel8->harq_process]; + dlsch1_harq->codeword = 1; + dlsch0->subframe_tx[subframe] = 1; + if (dlsch0->rnti != rel8->rnti) { // if rnti of dlsch is not the same as in the config, this is a new entry + dlsch0_harq->round = 0; + dlsch0->harq_mask = 0; } - if ((dlsch0->harq_mask & (1<harq_process)) > 0 ) { + if ((dlsch0->harq_mask & (1 << rel8->harq_process)) > 0) { if (rel8->new_data_indicator_1 != dlsch0_harq->ndi) - dlsch0_harq->round=0; - } - else { // process is inactive, so activate and set round to 0 - dlsch0_harq->round=0; + dlsch0_harq->round = 0; + } else { // process is inactive, so activate and set round to 0 + dlsch0_harq->round = 0; } dlsch0_harq->ndi = rel8->new_data_indicator_1; - dlsch0->active = 1; + dlsch0->active = 1; if (rel8->rnti_type == 2) - dlsch0_harq->round = 0; -LOG_D(PHY,"NFAPI: harq_pid %d harq_mask %x, round %d ndi (%d,%d) rnti type %d\n",rel8->harq_process,dlsch0->harq_mask,dlsch0_harq->round, - dlsch0_harq->ndi,rel8->new_data_indicator_1, rel8->rnti_type); + dlsch0_harq->round = 0; + LOG_D (PHY, "NFAPI: harq_pid %d harq_mask %x, round %d ndi (%d,%d) rnti type %d\n", rel8->harq_process, dlsch0->harq_mask, dlsch0_harq->round, + dlsch0_harq->ndi, rel8->new_data_indicator_1, rel8->rnti_type); switch (rel8->dci_format) { case NFAPI_DL_DCI_FORMAT_1A: - AssertFatal(rel8->resource_block_coding < 8192, "Frame %d, Subframe %d: rel8->resource_block_coding (%p) %u >= 8192 (rnti %x, rnti_type %d, format %d, harq_id %d\n", - proc->frame_tx,subframe, - &rel8->resource_block_coding,rel8->resource_block_coding,rel8->rnti,rel8->rnti_type,rel8->dci_format,rel8->harq_process); - + AssertFatal (rel8->resource_block_coding < 8192, "Frame %d, Subframe %d: rel8->resource_block_coding (%p) %u >= 8192 (rnti %x, rnti_type %d, format %d, harq_id %d\n", + proc->frame_tx, subframe, &rel8->resource_block_coding, rel8->resource_block_coding, rel8->rnti, rel8->rnti_type, rel8->dci_format, rel8->harq_process); - dci_alloc->format = format1A; + + dci_alloc->format = format1A; switch (fp->N_RB_DL) { case 6: if (fp->frame_type == TDD) { - dci_alloc->dci_length = sizeof_DCI1A_1_5MHz_TDD_1_6_t; - ((DCI1A_1_5MHz_TDD_1_6_t *)dci_pdu)->type = 1; - ((DCI1A_1_5MHz_TDD_1_6_t *)dci_pdu)->vrb_type = rel8->virtual_resource_block_assignment_flag; - ((DCI1A_1_5MHz_TDD_1_6_t *)dci_pdu)->mcs = rel8->mcs_1; - ((DCI1A_1_5MHz_TDD_1_6_t *)dci_pdu)->ndi = rel8->new_data_indicator_1; - ((DCI1A_1_5MHz_TDD_1_6_t *)dci_pdu)->rballoc = rel8->resource_block_coding; - ((DCI1A_1_5MHz_TDD_1_6_t *)dci_pdu)->rv = rel8->redundancy_version_1; - ((DCI1A_1_5MHz_TDD_1_6_t *)dci_pdu)->TPC = rel8->tpc; - ((DCI1A_1_5MHz_TDD_1_6_t *)dci_pdu)->harq_pid = rel8->harq_process; - ((DCI1A_1_5MHz_TDD_1_6_t *)dci_pdu)->dai = rel8->downlink_assignment_index; - + dci_alloc->dci_length = sizeof_DCI1A_1_5MHz_TDD_1_6_t; + ((DCI1A_1_5MHz_TDD_1_6_t *) dci_pdu)->type = 1; + ((DCI1A_1_5MHz_TDD_1_6_t *) dci_pdu)->vrb_type = rel8->virtual_resource_block_assignment_flag; + ((DCI1A_1_5MHz_TDD_1_6_t *) dci_pdu)->mcs = rel8->mcs_1; + ((DCI1A_1_5MHz_TDD_1_6_t *) dci_pdu)->ndi = rel8->new_data_indicator_1; + ((DCI1A_1_5MHz_TDD_1_6_t *) dci_pdu)->rballoc = rel8->resource_block_coding; + ((DCI1A_1_5MHz_TDD_1_6_t *) dci_pdu)->rv = rel8->redundancy_version_1; + ((DCI1A_1_5MHz_TDD_1_6_t *) dci_pdu)->TPC = rel8->tpc; + ((DCI1A_1_5MHz_TDD_1_6_t *) dci_pdu)->harq_pid = rel8->harq_process; + ((DCI1A_1_5MHz_TDD_1_6_t *) dci_pdu)->dai = rel8->downlink_assignment_index; + } else { - dci_alloc->dci_length = sizeof_DCI1A_1_5MHz_FDD_t; - ((DCI1A_1_5MHz_FDD_t *)dci_pdu)->type = 1; - ((DCI1A_1_5MHz_FDD_t *)dci_pdu)->vrb_type = rel8->virtual_resource_block_assignment_flag; - ((DCI1A_1_5MHz_FDD_t *)dci_pdu)->mcs = rel8->mcs_1; - ((DCI1A_1_5MHz_FDD_t *)dci_pdu)->ndi = rel8->new_data_indicator_1; - ((DCI1A_1_5MHz_FDD_t *)dci_pdu)->rballoc = rel8->resource_block_coding; - ((DCI1A_1_5MHz_FDD_t *)dci_pdu)->rv = rel8->redundancy_version_1; - ((DCI1A_1_5MHz_FDD_t *)dci_pdu)->TPC = rel8->tpc; - ((DCI1A_1_5MHz_FDD_t *)dci_pdu)->harq_pid = rel8->harq_process; + dci_alloc->dci_length = sizeof_DCI1A_1_5MHz_FDD_t; + ((DCI1A_1_5MHz_FDD_t *) dci_pdu)->type = 1; + ((DCI1A_1_5MHz_FDD_t *) dci_pdu)->vrb_type = rel8->virtual_resource_block_assignment_flag; + ((DCI1A_1_5MHz_FDD_t *) dci_pdu)->mcs = rel8->mcs_1; + ((DCI1A_1_5MHz_FDD_t *) dci_pdu)->ndi = rel8->new_data_indicator_1; + ((DCI1A_1_5MHz_FDD_t *) dci_pdu)->rballoc = rel8->resource_block_coding; + ((DCI1A_1_5MHz_FDD_t *) dci_pdu)->rv = rel8->redundancy_version_1; + ((DCI1A_1_5MHz_FDD_t *) dci_pdu)->TPC = rel8->tpc; + ((DCI1A_1_5MHz_FDD_t *) dci_pdu)->harq_pid = rel8->harq_process; // printf("FDD 1A: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB); } - AssertFatal(rel8->virtual_resource_block_assignment_flag==LOCALIZED,"Distributed RB allocation not done yet\n"); - dlsch0_harq->rb_alloc[0] = localRIV2alloc_LUT6[rel8->resource_block_coding]; - dlsch0_harq->vrb_type = rel8->virtual_resource_block_assignment_flag; - dlsch0_harq->nb_rb = RIV2nb_rb_LUT6[rel8->resource_block_coding];//NPRB; + AssertFatal (rel8->virtual_resource_block_assignment_flag == LOCALIZED, "Distributed RB allocation not done yet\n"); + dlsch0_harq->rb_alloc[0] = localRIV2alloc_LUT6[rel8->resource_block_coding]; + dlsch0_harq->vrb_type = rel8->virtual_resource_block_assignment_flag; + dlsch0_harq->nb_rb = RIV2nb_rb_LUT6[rel8->resource_block_coding]; //NPRB; break; case 25: if (fp->frame_type == TDD) { - dci_alloc->dci_length = sizeof_DCI1A_5MHz_TDD_1_6_t; - ((DCI1A_5MHz_TDD_1_6_t *)dci_pdu)->type = 1; - ((DCI1A_5MHz_TDD_1_6_t *)dci_pdu)->vrb_type = rel8->virtual_resource_block_assignment_flag; - ((DCI1A_5MHz_TDD_1_6_t *)dci_pdu)->mcs = rel8->mcs_1; - ((DCI1A_5MHz_TDD_1_6_t *)dci_pdu)->ndi = rel8->new_data_indicator_1; - ((DCI1A_5MHz_TDD_1_6_t *)dci_pdu)->rballoc = rel8->resource_block_coding; - ((DCI1A_5MHz_TDD_1_6_t *)dci_pdu)->rv = rel8->redundancy_version_1; - ((DCI1A_5MHz_TDD_1_6_t *)dci_pdu)->TPC = rel8->tpc; - ((DCI1A_5MHz_TDD_1_6_t *)dci_pdu)->harq_pid = rel8->harq_process; - ((DCI1A_5MHz_TDD_1_6_t *)dci_pdu)->dai = rel8->downlink_assignment_index; - // printf("TDD 1A: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB); + dci_alloc->dci_length = sizeof_DCI1A_5MHz_TDD_1_6_t; + ((DCI1A_5MHz_TDD_1_6_t *) dci_pdu)->type = 1; + ((DCI1A_5MHz_TDD_1_6_t *) dci_pdu)->vrb_type = rel8->virtual_resource_block_assignment_flag; + ((DCI1A_5MHz_TDD_1_6_t *) dci_pdu)->mcs = rel8->mcs_1; + ((DCI1A_5MHz_TDD_1_6_t *) dci_pdu)->ndi = rel8->new_data_indicator_1; + ((DCI1A_5MHz_TDD_1_6_t *) dci_pdu)->rballoc = rel8->resource_block_coding; + ((DCI1A_5MHz_TDD_1_6_t *) dci_pdu)->rv = rel8->redundancy_version_1; + ((DCI1A_5MHz_TDD_1_6_t *) dci_pdu)->TPC = rel8->tpc; + ((DCI1A_5MHz_TDD_1_6_t *) dci_pdu)->harq_pid = rel8->harq_process; + ((DCI1A_5MHz_TDD_1_6_t *) dci_pdu)->dai = rel8->downlink_assignment_index; + // printf("TDD 1A: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB); } else { - dci_alloc->dci_length = sizeof_DCI1A_5MHz_FDD_t; - ((DCI1A_5MHz_FDD_t *)dci_pdu)->type = 1; - ((DCI1A_5MHz_FDD_t *)dci_pdu)->vrb_type = rel8->virtual_resource_block_assignment_flag; - ((DCI1A_5MHz_FDD_t *)dci_pdu)->mcs = rel8->mcs_1; - ((DCI1A_5MHz_FDD_t *)dci_pdu)->ndi = rel8->new_data_indicator_1; - ((DCI1A_5MHz_FDD_t *)dci_pdu)->rballoc = rel8->resource_block_coding; - ((DCI1A_5MHz_FDD_t *)dci_pdu)->rv = rel8->redundancy_version_1; - ((DCI1A_5MHz_FDD_t *)dci_pdu)->TPC = rel8->tpc; - ((DCI1A_5MHz_FDD_t *)dci_pdu)->harq_pid = rel8->harq_process; + dci_alloc->dci_length = sizeof_DCI1A_5MHz_FDD_t; + ((DCI1A_5MHz_FDD_t *) dci_pdu)->type = 1; + ((DCI1A_5MHz_FDD_t *) dci_pdu)->vrb_type = rel8->virtual_resource_block_assignment_flag; + ((DCI1A_5MHz_FDD_t *) dci_pdu)->mcs = rel8->mcs_1; + ((DCI1A_5MHz_FDD_t *) dci_pdu)->ndi = rel8->new_data_indicator_1; + ((DCI1A_5MHz_FDD_t *) dci_pdu)->rballoc = rel8->resource_block_coding; + ((DCI1A_5MHz_FDD_t *) dci_pdu)->rv = rel8->redundancy_version_1; + ((DCI1A_5MHz_FDD_t *) dci_pdu)->TPC = rel8->tpc; + ((DCI1A_5MHz_FDD_t *) dci_pdu)->harq_pid = rel8->harq_process; // printf("FDD 1A: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB); } - AssertFatal(rel8->virtual_resource_block_assignment_flag==LOCALIZED,"Distributed RB allocation not done yet\n"); - dlsch0_harq->rb_alloc[0] = localRIV2alloc_LUT25[rel8->resource_block_coding]; - dlsch0_harq->vrb_type = rel8->virtual_resource_block_assignment_flag; - dlsch0_harq->nb_rb = RIV2nb_rb_LUT25[rel8->resource_block_coding];//NPRB; + AssertFatal (rel8->virtual_resource_block_assignment_flag == LOCALIZED, "Distributed RB allocation not done yet\n"); + dlsch0_harq->rb_alloc[0] = localRIV2alloc_LUT25[rel8->resource_block_coding]; + dlsch0_harq->vrb_type = rel8->virtual_resource_block_assignment_flag; + dlsch0_harq->nb_rb = RIV2nb_rb_LUT25[rel8->resource_block_coding]; //NPRB; break; case 50: if (fp->frame_type == TDD) { - dci_alloc->dci_length = sizeof_DCI1A_10MHz_TDD_1_6_t; - ((DCI1A_10MHz_TDD_1_6_t *)dci_pdu)->type = 1; - ((DCI1A_10MHz_TDD_1_6_t *)dci_pdu)->vrb_type = rel8->virtual_resource_block_assignment_flag; - ((DCI1A_10MHz_TDD_1_6_t *)dci_pdu)->mcs = rel8->mcs_1; - ((DCI1A_10MHz_TDD_1_6_t *)dci_pdu)->ndi = rel8->new_data_indicator_1; - ((DCI1A_10MHz_TDD_1_6_t *)dci_pdu)->rballoc = rel8->resource_block_coding; - ((DCI1A_10MHz_TDD_1_6_t *)dci_pdu)->rv = rel8->redundancy_version_1; - ((DCI1A_10MHz_TDD_1_6_t *)dci_pdu)->TPC = rel8->tpc; - ((DCI1A_10MHz_TDD_1_6_t *)dci_pdu)->harq_pid = rel8->harq_process; - ((DCI1A_10MHz_TDD_1_6_t *)dci_pdu)->dai = rel8->downlink_assignment_index; + dci_alloc->dci_length = sizeof_DCI1A_10MHz_TDD_1_6_t; + ((DCI1A_10MHz_TDD_1_6_t *) dci_pdu)->type = 1; + ((DCI1A_10MHz_TDD_1_6_t *) dci_pdu)->vrb_type = rel8->virtual_resource_block_assignment_flag; + ((DCI1A_10MHz_TDD_1_6_t *) dci_pdu)->mcs = rel8->mcs_1; + ((DCI1A_10MHz_TDD_1_6_t *) dci_pdu)->ndi = rel8->new_data_indicator_1; + ((DCI1A_10MHz_TDD_1_6_t *) dci_pdu)->rballoc = rel8->resource_block_coding; + ((DCI1A_10MHz_TDD_1_6_t *) dci_pdu)->rv = rel8->redundancy_version_1; + ((DCI1A_10MHz_TDD_1_6_t *) dci_pdu)->TPC = rel8->tpc; + ((DCI1A_10MHz_TDD_1_6_t *) dci_pdu)->harq_pid = rel8->harq_process; + ((DCI1A_10MHz_TDD_1_6_t *) dci_pdu)->dai = rel8->downlink_assignment_index; // printf("TDD 1A: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB); } else { - dci_alloc->dci_length = sizeof_DCI1A_10MHz_FDD_t; - ((DCI1A_10MHz_FDD_t *)dci_pdu)->type = 1; - ((DCI1A_10MHz_FDD_t *)dci_pdu)->vrb_type = rel8->virtual_resource_block_assignment_flag; - ((DCI1A_10MHz_FDD_t *)dci_pdu)->mcs = rel8->mcs_1; - ((DCI1A_10MHz_FDD_t *)dci_pdu)->ndi = rel8->new_data_indicator_1; - ((DCI1A_10MHz_FDD_t *)dci_pdu)->rballoc = rel8->resource_block_coding; - ((DCI1A_10MHz_FDD_t *)dci_pdu)->rv = rel8->redundancy_version_1; - ((DCI1A_10MHz_FDD_t *)dci_pdu)->TPC = rel8->tpc; - ((DCI1A_10MHz_FDD_t *)dci_pdu)->harq_pid = rel8->harq_process; - // printf("FDD 1A: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB); + dci_alloc->dci_length = sizeof_DCI1A_10MHz_FDD_t; + ((DCI1A_10MHz_FDD_t *) dci_pdu)->type = 1; + ((DCI1A_10MHz_FDD_t *) dci_pdu)->vrb_type = rel8->virtual_resource_block_assignment_flag; + ((DCI1A_10MHz_FDD_t *) dci_pdu)->mcs = rel8->mcs_1; + ((DCI1A_10MHz_FDD_t *) dci_pdu)->ndi = rel8->new_data_indicator_1; + ((DCI1A_10MHz_FDD_t *) dci_pdu)->rballoc = rel8->resource_block_coding; + ((DCI1A_10MHz_FDD_t *) dci_pdu)->rv = rel8->redundancy_version_1; + ((DCI1A_10MHz_FDD_t *) dci_pdu)->TPC = rel8->tpc; + ((DCI1A_10MHz_FDD_t *) dci_pdu)->harq_pid = rel8->harq_process; + // printf("FDD 1A: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB); } - AssertFatal(rel8->virtual_resource_block_assignment_flag==LOCALIZED,"Distributed RB allocation not done yet\n"); - dlsch0_harq->rb_alloc[0] = localRIV2alloc_LUT50_0[rel8->resource_block_coding]; - dlsch0_harq->rb_alloc[1] = localRIV2alloc_LUT50_1[rel8->resource_block_coding]; - dlsch0_harq->vrb_type = rel8->virtual_resource_block_assignment_flag; - dlsch0_harq->nb_rb = RIV2nb_rb_LUT50[rel8->resource_block_coding];//NPRB; + AssertFatal (rel8->virtual_resource_block_assignment_flag == LOCALIZED, "Distributed RB allocation not done yet\n"); + dlsch0_harq->rb_alloc[0] = localRIV2alloc_LUT50_0[rel8->resource_block_coding]; + dlsch0_harq->rb_alloc[1] = localRIV2alloc_LUT50_1[rel8->resource_block_coding]; + dlsch0_harq->vrb_type = rel8->virtual_resource_block_assignment_flag; + dlsch0_harq->nb_rb = RIV2nb_rb_LUT50[rel8->resource_block_coding]; //NPRB; break; case 100: if (fp->frame_type == TDD) { - dci_alloc->dci_length = sizeof_DCI1A_20MHz_TDD_1_6_t; - ((DCI1A_20MHz_TDD_1_6_t *)dci_pdu)->type = 1; - ((DCI1A_20MHz_TDD_1_6_t *)dci_pdu)->vrb_type = rel8->virtual_resource_block_assignment_flag; - ((DCI1A_20MHz_TDD_1_6_t *)dci_pdu)->mcs = rel8->mcs_1; - ((DCI1A_20MHz_TDD_1_6_t *)dci_pdu)->ndi = rel8->new_data_indicator_1; - ((DCI1A_20MHz_TDD_1_6_t *)dci_pdu)->rballoc = rel8->resource_block_coding; - ((DCI1A_20MHz_TDD_1_6_t *)dci_pdu)->rv = rel8->redundancy_version_1; - ((DCI1A_20MHz_TDD_1_6_t *)dci_pdu)->TPC = rel8->tpc; - ((DCI1A_20MHz_TDD_1_6_t *)dci_pdu)->harq_pid = rel8->harq_process; - ((DCI1A_20MHz_TDD_1_6_t *)dci_pdu)->dai = rel8->downlink_assignment_index; + dci_alloc->dci_length = sizeof_DCI1A_20MHz_TDD_1_6_t; + ((DCI1A_20MHz_TDD_1_6_t *) dci_pdu)->type = 1; + ((DCI1A_20MHz_TDD_1_6_t *) dci_pdu)->vrb_type = rel8->virtual_resource_block_assignment_flag; + ((DCI1A_20MHz_TDD_1_6_t *) dci_pdu)->mcs = rel8->mcs_1; + ((DCI1A_20MHz_TDD_1_6_t *) dci_pdu)->ndi = rel8->new_data_indicator_1; + ((DCI1A_20MHz_TDD_1_6_t *) dci_pdu)->rballoc = rel8->resource_block_coding; + ((DCI1A_20MHz_TDD_1_6_t *) dci_pdu)->rv = rel8->redundancy_version_1; + ((DCI1A_20MHz_TDD_1_6_t *) dci_pdu)->TPC = rel8->tpc; + ((DCI1A_20MHz_TDD_1_6_t *) dci_pdu)->harq_pid = rel8->harq_process; + ((DCI1A_20MHz_TDD_1_6_t *) dci_pdu)->dai = rel8->downlink_assignment_index; // printf("TDD 1A: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB); } else { - dci_alloc->dci_length = sizeof_DCI1A_20MHz_FDD_t; - ((DCI1A_20MHz_FDD_t *)dci_pdu)->type = 1; - ((DCI1A_20MHz_FDD_t *)dci_pdu)->vrb_type = rel8->virtual_resource_block_assignment_flag; - ((DCI1A_20MHz_FDD_t *)dci_pdu)->mcs = rel8->mcs_1; - ((DCI1A_20MHz_FDD_t *)dci_pdu)->ndi = rel8->new_data_indicator_1; - ((DCI1A_20MHz_FDD_t *)dci_pdu)->rballoc = rel8->resource_block_coding; - ((DCI1A_20MHz_FDD_t *)dci_pdu)->rv = rel8->redundancy_version_1; - ((DCI1A_20MHz_FDD_t *)dci_pdu)->TPC = rel8->tpc; - ((DCI1A_20MHz_FDD_t *)dci_pdu)->harq_pid = rel8->harq_process; - // printf("FDD 1A: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB); + dci_alloc->dci_length = sizeof_DCI1A_20MHz_FDD_t; + ((DCI1A_20MHz_FDD_t *) dci_pdu)->type = 1; + ((DCI1A_20MHz_FDD_t *) dci_pdu)->vrb_type = rel8->virtual_resource_block_assignment_flag; + ((DCI1A_20MHz_FDD_t *) dci_pdu)->mcs = rel8->mcs_1; + ((DCI1A_20MHz_FDD_t *) dci_pdu)->ndi = rel8->new_data_indicator_1; + ((DCI1A_20MHz_FDD_t *) dci_pdu)->rballoc = rel8->resource_block_coding; + ((DCI1A_20MHz_FDD_t *) dci_pdu)->rv = rel8->redundancy_version_1; + ((DCI1A_20MHz_FDD_t *) dci_pdu)->TPC = rel8->tpc; + ((DCI1A_20MHz_FDD_t *) dci_pdu)->harq_pid = rel8->harq_process; + // printf("FDD 1A: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB); } - AssertFatal(rel8->virtual_resource_block_assignment_flag==LOCALIZED,"Distributed RB allocation not done yet\n"); - dlsch0_harq->rb_alloc[0] = localRIV2alloc_LUT100_0[rel8->resource_block_coding]; - dlsch0_harq->rb_alloc[1] = localRIV2alloc_LUT100_1[rel8->resource_block_coding]; - dlsch0_harq->rb_alloc[2] = localRIV2alloc_LUT100_2[rel8->resource_block_coding]; - dlsch0_harq->rb_alloc[3] = localRIV2alloc_LUT100_3[rel8->resource_block_coding]; - dlsch0_harq->vrb_type = rel8->virtual_resource_block_assignment_flag; - dlsch0_harq->nb_rb = RIV2nb_rb_LUT100[rel8->resource_block_coding];//NPRB; + AssertFatal (rel8->virtual_resource_block_assignment_flag == LOCALIZED, "Distributed RB allocation not done yet\n"); + dlsch0_harq->rb_alloc[0] = localRIV2alloc_LUT100_0[rel8->resource_block_coding]; + dlsch0_harq->rb_alloc[1] = localRIV2alloc_LUT100_1[rel8->resource_block_coding]; + dlsch0_harq->rb_alloc[2] = localRIV2alloc_LUT100_2[rel8->resource_block_coding]; + dlsch0_harq->rb_alloc[3] = localRIV2alloc_LUT100_3[rel8->resource_block_coding]; + dlsch0_harq->vrb_type = rel8->virtual_resource_block_assignment_flag; + dlsch0_harq->nb_rb = RIV2nb_rb_LUT100[rel8->resource_block_coding]; //NPRB; break; } - if (rel8->rnti_type == 2 ) { + if (rel8->rnti_type == 2) { // see 36-212 V8.6.0 p. 45 - NPRB = (rel8->tpc&1)+2; + NPRB = (rel8->tpc & 1) + 2; // 36-213 sec.7.1.7.2 p.26 - I_mcs = rel8->mcs_1; + I_mcs = rel8->mcs_1; + } else { + NPRB = dlsch0_harq->nb_rb; + I_mcs = get_I_TBS (rel8->mcs_1); } - else { - NPRB = dlsch0_harq->nb_rb; - I_mcs = get_I_TBS(rel8->mcs_1); - } - AssertFatal(NPRB>0,"DCI 1A: NPRB = 0 (rnti %x, rnti type %d, tpc %d, round %d, resource_block_coding %d)\n",rel8->rnti,rel8->rnti_type,rel8->tpc,dlsch0_harq->round,rel8->resource_block_coding); - dlsch0_harq->rvidx = rel8->redundancy_version_1; - dlsch0_harq->Nl = 1; - dlsch0_harq->mimo_mode = (fp->nb_antenna_ports_eNB == 1) ? SISO : ALAMOUTI; - dlsch0_harq->dl_power_off = 1; - - + AssertFatal (NPRB > 0, "DCI 1A: NPRB = 0 (rnti %x, rnti type %d, tpc %d, round %d, resource_block_coding %d)\n", rel8->rnti, rel8->rnti_type, rel8->tpc, dlsch0_harq->round, + rel8->resource_block_coding); + dlsch0_harq->rvidx = rel8->redundancy_version_1; + dlsch0_harq->Nl = 1; + dlsch0_harq->mimo_mode = (fp->nb_antenna_ports_eNB == 1) ? SISO : ALAMOUTI; + dlsch0_harq->dl_power_off = 1; - dlsch0_harq->mcs = rel8->mcs_1; - dlsch0_harq->Qm = 2; - dlsch0_harq->TBS = TBStable[I_mcs][NPRB-1]; - LOG_D(PHY,"DCI_1A: I_mcs %d, NPRB %d, TBS %d\n",I_mcs,NPRB,dlsch0_harq->TBS); - dlsch0->harq_ids[subframe] = rel8->harq_process; - dlsch0->active = 1; - dlsch0->rnti = rel8->rnti; - dlsch0->harq_ids[subframe] = rel8->harq_process; + + + dlsch0_harq->mcs = rel8->mcs_1; + dlsch0_harq->Qm = 2; + dlsch0_harq->TBS = TBStable[I_mcs][NPRB - 1]; + LOG_D (PHY, "DCI_1A: I_mcs %d, NPRB %d, TBS %d\n", I_mcs, NPRB, dlsch0_harq->TBS); + dlsch0->harq_ids[subframe] = rel8->harq_process; + dlsch0->active = 1; + dlsch0->rnti = rel8->rnti; + dlsch0->harq_ids[subframe] = rel8->harq_process; if (dlsch0_harq->round == 0) dlsch0_harq->status = ACTIVE; - dlsch0->harq_mask |= (1<harq_process); + dlsch0->harq_mask |= (1 << rel8->harq_process); - if (rel8->rnti_type == 1) LOG_D(PHY,"DCI 1A: round %d, mcs %d, rballoc %x,rv %d, rnti %x\n",dlsch0_harq->round,rel8->mcs_1,rel8->resource_block_coding,rel8->redundancy_version_1,rel8->rnti); + if (rel8->rnti_type == 1) + LOG_D (PHY, "DCI 1A: round %d, mcs %d, rballoc %x,rv %d, rnti %x\n", dlsch0_harq->round, rel8->mcs_1, rel8->resource_block_coding, rel8->redundancy_version_1, rel8->rnti); break; case NFAPI_DL_DCI_FORMAT_1: - dci_alloc->format = format1; - dlsch0->active = 1; + dci_alloc->format = format1; + dlsch0->active = 1; - LOG_D(PHY,"Frame %d, Subframe %d: Programming DLSCH for Format 1 DCI, harq_pid %d\n",proc->frame_tx,subframe,rel8->harq_process); + LOG_D (PHY, "Frame %d, Subframe %d: Programming DLSCH for Format 1 DCI, harq_pid %d\n", proc->frame_tx, subframe, rel8->harq_process); switch (fp->N_RB_DL) { case 6: if (fp->frame_type == TDD) { - dci_alloc->dci_length = sizeof_DCI1_1_5MHz_TDD_t; - ((DCI1_1_5MHz_TDD_t *)dci_pdu)->rah = rel8->resource_allocation_type; - ((DCI1_1_5MHz_TDD_t *)dci_pdu)->mcs = rel8->mcs_1; - ((DCI1_1_5MHz_TDD_t *)dci_pdu)->ndi = rel8->new_data_indicator_1; - ((DCI1_1_5MHz_TDD_t *)dci_pdu)->rballoc = rel8->resource_block_coding; - ((DCI1_1_5MHz_TDD_t *)dci_pdu)->rv = rel8->redundancy_version_1; - ((DCI1_1_5MHz_TDD_t *)dci_pdu)->TPC = rel8->tpc; - ((DCI1_1_5MHz_TDD_t *)dci_pdu)->harq_pid = rel8->harq_process; - ((DCI1_1_5MHz_TDD_t *)dci_pdu)->dai = rel8->downlink_assignment_index; + dci_alloc->dci_length = sizeof_DCI1_1_5MHz_TDD_t; + ((DCI1_1_5MHz_TDD_t *) dci_pdu)->rah = rel8->resource_allocation_type; + ((DCI1_1_5MHz_TDD_t *) dci_pdu)->mcs = rel8->mcs_1; + ((DCI1_1_5MHz_TDD_t *) dci_pdu)->ndi = rel8->new_data_indicator_1; + ((DCI1_1_5MHz_TDD_t *) dci_pdu)->rballoc = rel8->resource_block_coding; + ((DCI1_1_5MHz_TDD_t *) dci_pdu)->rv = rel8->redundancy_version_1; + ((DCI1_1_5MHz_TDD_t *) dci_pdu)->TPC = rel8->tpc; + ((DCI1_1_5MHz_TDD_t *) dci_pdu)->harq_pid = rel8->harq_process; + ((DCI1_1_5MHz_TDD_t *) dci_pdu)->dai = rel8->downlink_assignment_index; // printf("TDD 1: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB); } else { - dci_alloc->dci_length = sizeof_DCI1_1_5MHz_FDD_t; - ((DCI1_1_5MHz_FDD_t *)dci_pdu)->rah = rel8->resource_allocation_type; - ((DCI1_1_5MHz_FDD_t *)dci_pdu)->mcs = rel8->mcs_1; - ((DCI1_1_5MHz_FDD_t *)dci_pdu)->ndi = rel8->new_data_indicator_1; - ((DCI1_1_5MHz_FDD_t *)dci_pdu)->rballoc = rel8->resource_block_coding; - ((DCI1_1_5MHz_FDD_t *)dci_pdu)->rv = rel8->redundancy_version_1; - ((DCI1_1_5MHz_FDD_t *)dci_pdu)->TPC = rel8->tpc; - ((DCI1_1_5MHz_FDD_t *)dci_pdu)->harq_pid = rel8->harq_process; + dci_alloc->dci_length = sizeof_DCI1_1_5MHz_FDD_t; + ((DCI1_1_5MHz_FDD_t *) dci_pdu)->rah = rel8->resource_allocation_type; + ((DCI1_1_5MHz_FDD_t *) dci_pdu)->mcs = rel8->mcs_1; + ((DCI1_1_5MHz_FDD_t *) dci_pdu)->ndi = rel8->new_data_indicator_1; + ((DCI1_1_5MHz_FDD_t *) dci_pdu)->rballoc = rel8->resource_block_coding; + ((DCI1_1_5MHz_FDD_t *) dci_pdu)->rv = rel8->redundancy_version_1; + ((DCI1_1_5MHz_FDD_t *) dci_pdu)->TPC = rel8->tpc; + ((DCI1_1_5MHz_FDD_t *) dci_pdu)->harq_pid = rel8->harq_process; // printf("FDD 1: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB); } break; case 25: if (fp->frame_type == TDD) { - dci_alloc->dci_length = sizeof_DCI1_5MHz_TDD_t; - ((DCI1_5MHz_TDD_t *)dci_pdu)->rah = rel8->resource_allocation_type; - ((DCI1_5MHz_TDD_t *)dci_pdu)->mcs = rel8->mcs_1; - ((DCI1_5MHz_TDD_t *)dci_pdu)->ndi = rel8->new_data_indicator_1; - ((DCI1_5MHz_TDD_t *)dci_pdu)->rballoc = rel8->resource_block_coding; - ((DCI1_5MHz_TDD_t *)dci_pdu)->rv = rel8->redundancy_version_1; - ((DCI1_5MHz_TDD_t *)dci_pdu)->TPC = rel8->tpc; - ((DCI1_5MHz_TDD_t *)dci_pdu)->harq_pid = rel8->harq_process; - ((DCI1_5MHz_TDD_t *)dci_pdu)->dai = rel8->downlink_assignment_index; + dci_alloc->dci_length = sizeof_DCI1_5MHz_TDD_t; + ((DCI1_5MHz_TDD_t *) dci_pdu)->rah = rel8->resource_allocation_type; + ((DCI1_5MHz_TDD_t *) dci_pdu)->mcs = rel8->mcs_1; + ((DCI1_5MHz_TDD_t *) dci_pdu)->ndi = rel8->new_data_indicator_1; + ((DCI1_5MHz_TDD_t *) dci_pdu)->rballoc = rel8->resource_block_coding; + ((DCI1_5MHz_TDD_t *) dci_pdu)->rv = rel8->redundancy_version_1; + ((DCI1_5MHz_TDD_t *) dci_pdu)->TPC = rel8->tpc; + ((DCI1_5MHz_TDD_t *) dci_pdu)->harq_pid = rel8->harq_process; + ((DCI1_5MHz_TDD_t *) dci_pdu)->dai = rel8->downlink_assignment_index; // printf("TDD 1: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB); } else { - dci_alloc->dci_length = sizeof_DCI1_5MHz_FDD_t; - ((DCI1_5MHz_FDD_t *)dci_pdu)->rah = rel8->resource_allocation_type; - ((DCI1_5MHz_FDD_t *)dci_pdu)->mcs = rel8->mcs_1; - ((DCI1_5MHz_FDD_t *)dci_pdu)->ndi = rel8->new_data_indicator_1; - ((DCI1_5MHz_FDD_t *)dci_pdu)->rballoc = rel8->resource_block_coding; - ((DCI1_5MHz_FDD_t *)dci_pdu)->rv = rel8->redundancy_version_1; - ((DCI1_5MHz_FDD_t *)dci_pdu)->TPC = rel8->tpc; - ((DCI1_5MHz_FDD_t *)dci_pdu)->harq_pid = rel8->harq_process; + dci_alloc->dci_length = sizeof_DCI1_5MHz_FDD_t; + ((DCI1_5MHz_FDD_t *) dci_pdu)->rah = rel8->resource_allocation_type; + ((DCI1_5MHz_FDD_t *) dci_pdu)->mcs = rel8->mcs_1; + ((DCI1_5MHz_FDD_t *) dci_pdu)->ndi = rel8->new_data_indicator_1; + ((DCI1_5MHz_FDD_t *) dci_pdu)->rballoc = rel8->resource_block_coding; + ((DCI1_5MHz_FDD_t *) dci_pdu)->rv = rel8->redundancy_version_1; + ((DCI1_5MHz_FDD_t *) dci_pdu)->TPC = rel8->tpc; + ((DCI1_5MHz_FDD_t *) dci_pdu)->harq_pid = rel8->harq_process; // printf("FDD 1: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB); } break; case 50: if (fp->frame_type == TDD) { - dci_alloc->dci_length = sizeof_DCI1_10MHz_TDD_t; - ((DCI1_10MHz_TDD_t *)dci_pdu)->rah = rel8->resource_allocation_type; - ((DCI1_10MHz_TDD_t *)dci_pdu)->mcs = rel8->mcs_1; - ((DCI1_10MHz_TDD_t *)dci_pdu)->ndi = rel8->new_data_indicator_1; - ((DCI1_10MHz_TDD_t *)dci_pdu)->rballoc = rel8->resource_block_coding; - ((DCI1_10MHz_TDD_t *)dci_pdu)->rv = rel8->redundancy_version_1; - ((DCI1_10MHz_TDD_t *)dci_pdu)->TPC = rel8->tpc; - ((DCI1_10MHz_TDD_t *)dci_pdu)->harq_pid = rel8->harq_process; - ((DCI1_10MHz_TDD_t *)dci_pdu)->dai = rel8->downlink_assignment_index; + dci_alloc->dci_length = sizeof_DCI1_10MHz_TDD_t; + ((DCI1_10MHz_TDD_t *) dci_pdu)->rah = rel8->resource_allocation_type; + ((DCI1_10MHz_TDD_t *) dci_pdu)->mcs = rel8->mcs_1; + ((DCI1_10MHz_TDD_t *) dci_pdu)->ndi = rel8->new_data_indicator_1; + ((DCI1_10MHz_TDD_t *) dci_pdu)->rballoc = rel8->resource_block_coding; + ((DCI1_10MHz_TDD_t *) dci_pdu)->rv = rel8->redundancy_version_1; + ((DCI1_10MHz_TDD_t *) dci_pdu)->TPC = rel8->tpc; + ((DCI1_10MHz_TDD_t *) dci_pdu)->harq_pid = rel8->harq_process; + ((DCI1_10MHz_TDD_t *) dci_pdu)->dai = rel8->downlink_assignment_index; // printf("TDD 1: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB); } else { - dci_alloc->dci_length = sizeof_DCI1_10MHz_FDD_t; - ((DCI1_10MHz_FDD_t *)dci_pdu)->rah = rel8->resource_allocation_type; - ((DCI1_10MHz_FDD_t *)dci_pdu)->mcs = rel8->mcs_1; - ((DCI1_10MHz_FDD_t *)dci_pdu)->ndi = rel8->new_data_indicator_1; - ((DCI1_10MHz_FDD_t *)dci_pdu)->rballoc = rel8->resource_block_coding; - ((DCI1_10MHz_FDD_t *)dci_pdu)->rv = rel8->redundancy_version_1; - ((DCI1_10MHz_FDD_t *)dci_pdu)->TPC = rel8->tpc; - ((DCI1_10MHz_FDD_t *)dci_pdu)->harq_pid = rel8->harq_process; + dci_alloc->dci_length = sizeof_DCI1_10MHz_FDD_t; + ((DCI1_10MHz_FDD_t *) dci_pdu)->rah = rel8->resource_allocation_type; + ((DCI1_10MHz_FDD_t *) dci_pdu)->mcs = rel8->mcs_1; + ((DCI1_10MHz_FDD_t *) dci_pdu)->ndi = rel8->new_data_indicator_1; + ((DCI1_10MHz_FDD_t *) dci_pdu)->rballoc = rel8->resource_block_coding; + ((DCI1_10MHz_FDD_t *) dci_pdu)->rv = rel8->redundancy_version_1; + ((DCI1_10MHz_FDD_t *) dci_pdu)->TPC = rel8->tpc; + ((DCI1_10MHz_FDD_t *) dci_pdu)->harq_pid = rel8->harq_process; } break; case 100: if (fp->frame_type == TDD) { - dci_alloc->dci_length = sizeof_DCI1_20MHz_TDD_t; - ((DCI1_20MHz_TDD_t *)dci_pdu)->rah = rel8->resource_allocation_type; - ((DCI1_20MHz_TDD_t *)dci_pdu)->mcs = rel8->mcs_1; - ((DCI1_20MHz_TDD_t *)dci_pdu)->ndi = rel8->new_data_indicator_1; - ((DCI1_20MHz_TDD_t *)dci_pdu)->rballoc = rel8->resource_block_coding; - ((DCI1_20MHz_TDD_t *)dci_pdu)->rv = rel8->redundancy_version_1; - ((DCI1_20MHz_TDD_t *)dci_pdu)->TPC = rel8->tpc; - ((DCI1_20MHz_TDD_t *)dci_pdu)->harq_pid = rel8->harq_process; - ((DCI1_20MHz_TDD_t *)dci_pdu)->dai = rel8->downlink_assignment_index; + dci_alloc->dci_length = sizeof_DCI1_20MHz_TDD_t; + ((DCI1_20MHz_TDD_t *) dci_pdu)->rah = rel8->resource_allocation_type; + ((DCI1_20MHz_TDD_t *) dci_pdu)->mcs = rel8->mcs_1; + ((DCI1_20MHz_TDD_t *) dci_pdu)->ndi = rel8->new_data_indicator_1; + ((DCI1_20MHz_TDD_t *) dci_pdu)->rballoc = rel8->resource_block_coding; + ((DCI1_20MHz_TDD_t *) dci_pdu)->rv = rel8->redundancy_version_1; + ((DCI1_20MHz_TDD_t *) dci_pdu)->TPC = rel8->tpc; + ((DCI1_20MHz_TDD_t *) dci_pdu)->harq_pid = rel8->harq_process; + ((DCI1_20MHz_TDD_t *) dci_pdu)->dai = rel8->downlink_assignment_index; // printf("TDD 1: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB); } else { - dci_alloc->dci_length = sizeof_DCI1_20MHz_FDD_t; - ((DCI1_20MHz_FDD_t *)dci_pdu)->rah = rel8->resource_allocation_type; - ((DCI1_20MHz_FDD_t *)dci_pdu)->mcs = rel8->mcs_1; - ((DCI1_20MHz_FDD_t *)dci_pdu)->ndi = rel8->new_data_indicator_1; - ((DCI1_20MHz_FDD_t *)dci_pdu)->rballoc = rel8->resource_block_coding; - ((DCI1_20MHz_FDD_t *)dci_pdu)->rv = rel8->redundancy_version_1; - ((DCI1_20MHz_FDD_t *)dci_pdu)->TPC = rel8->tpc; - ((DCI1_20MHz_FDD_t *)dci_pdu)->harq_pid = rel8->harq_process; + dci_alloc->dci_length = sizeof_DCI1_20MHz_FDD_t; + ((DCI1_20MHz_FDD_t *) dci_pdu)->rah = rel8->resource_allocation_type; + ((DCI1_20MHz_FDD_t *) dci_pdu)->mcs = rel8->mcs_1; + ((DCI1_20MHz_FDD_t *) dci_pdu)->ndi = rel8->new_data_indicator_1; + ((DCI1_20MHz_FDD_t *) dci_pdu)->rballoc = rel8->resource_block_coding; + ((DCI1_20MHz_FDD_t *) dci_pdu)->rv = rel8->redundancy_version_1; + ((DCI1_20MHz_FDD_t *) dci_pdu)->TPC = rel8->tpc; + ((DCI1_20MHz_FDD_t *) dci_pdu)->harq_pid = rel8->harq_process; } break; } - AssertFatal(rel8->harq_process<8,"Format 1: harq_pid=%d >= 8\n", rel8->harq_process); + AssertFatal (rel8->harq_process < 8, "Format 1: harq_pid=%d >= 8\n", rel8->harq_process); dlsch0_harq = dlsch0->harq_processes[rel8->harq_process]; - dlsch0_harq->codeword=0; + dlsch0_harq->codeword = 0; // printf("DCI: Setting subframe_tx for subframe %d\n",subframe); dlsch0->subframe_tx[subframe] = 1; - conv_rballoc(rel8->resource_allocation_type, - rel8->resource_block_coding, - fp->N_RB_DL, - dlsch0_harq->rb_alloc); + conv_rballoc (rel8->resource_allocation_type, rel8->resource_block_coding, fp->N_RB_DL, dlsch0_harq->rb_alloc); - dlsch0_harq->nb_rb = conv_nprb(rel8->resource_allocation_type, - rel8->resource_block_coding, - fp->N_RB_DL); + dlsch0_harq->nb_rb = conv_nprb (rel8->resource_allocation_type, rel8->resource_block_coding, fp->N_RB_DL); - NPRB = dlsch0_harq->nb_rb; + NPRB = dlsch0_harq->nb_rb; - AssertFatal(NPRB>0,"NPRB == 0\n"); + AssertFatal (NPRB > 0, "NPRB == 0\n"); - dlsch0_harq->rvidx = rel8->redundancy_version_1; + dlsch0_harq->rvidx = rel8->redundancy_version_1; - dlsch0_harq->Nl = 1; + dlsch0_harq->Nl = 1; // dlsch[0]->layer_index = 0; if (beamforming_mode == 0) dlsch0_harq->mimo_mode = (fp->nb_antenna_ports_eNB == 1) ? SISO : ALAMOUTI; else if (beamforming_mode == 7) dlsch0_harq->mimo_mode = TM7; else - LOG_E(PHY,"Invalid beamforming mode %dL\n", beamforming_mode); + LOG_E (PHY, "Invalid beamforming mode %dL\n", beamforming_mode); dlsch0_harq->dl_power_off = 1; @@ -1382,16 +1397,16 @@ LOG_D(PHY,"NFAPI: harq_pid %d harq_mask %x, round %d ndi (%d,%d) rnti type %d\n" // printf("Setting DLSCH process %d to ACTIVE\n",rel8->harq_process); // MCS and TBS don't change across HARQ rounds - dlsch0_harq->mcs = rel8->mcs_1; - dlsch0_harq->Qm = get_Qm(rel8->mcs_1); - dlsch0_harq->TBS = TBStable[get_I_TBS(dlsch0_harq->mcs)][NPRB-1]; + dlsch0_harq->mcs = rel8->mcs_1; + dlsch0_harq->Qm = get_Qm (rel8->mcs_1); + dlsch0_harq->TBS = TBStable[get_I_TBS (dlsch0_harq->mcs)][NPRB - 1]; } - LOG_D(PHY,"DCI: Set harq_ids[%d] to %d (%p)\n",subframe,rel8->harq_process,dlsch0); + LOG_D (PHY, "DCI: Set harq_ids[%d] to %d (%p)\n", subframe, rel8->harq_process, dlsch0); dlsch0->harq_ids[subframe] = rel8->harq_process; - dlsch0->harq_mask |= (1<harq_process); + dlsch0->harq_mask |= (1 << rel8->harq_process); dlsch0->rnti = rel8->rnti; @@ -1400,138 +1415,138 @@ LOG_D(PHY,"NFAPI: harq_pid %d harq_mask %x, round %d ndi (%d,%d) rnti type %d\n" break; case NFAPI_DL_DCI_FORMAT_2A: - dci_alloc->format = format2A; + dci_alloc->format = format2A; switch (fp->N_RB_DL) { case 6: if (fp->frame_type == TDD) { - dci_alloc->dci_length = sizeof_DCI2A_1_5MHz_2A_TDD_t; - ((DCI2A_1_5MHz_2A_TDD_t *)dci_pdu)->rah = rel8->resource_allocation_type; - ((DCI2A_1_5MHz_2A_TDD_t *)dci_pdu)->mcs1 = rel8->mcs_1; - ((DCI2A_1_5MHz_2A_TDD_t *)dci_pdu)->mcs2 = rel8->mcs_2; - ((DCI2A_1_5MHz_2A_TDD_t *)dci_pdu)->ndi1 = rel8->new_data_indicator_1; - ((DCI2A_1_5MHz_2A_TDD_t *)dci_pdu)->ndi2 = rel8->new_data_indicator_2; - ((DCI2A_1_5MHz_2A_TDD_t *)dci_pdu)->rballoc = rel8->resource_block_coding; - ((DCI2A_1_5MHz_2A_TDD_t *)dci_pdu)->rv1 = rel8->redundancy_version_1; - ((DCI2A_1_5MHz_2A_TDD_t *)dci_pdu)->rv2 = rel8->redundancy_version_2; - ((DCI2A_1_5MHz_2A_TDD_t *)dci_pdu)->TPC = rel8->tpc; - ((DCI2A_1_5MHz_2A_TDD_t *)dci_pdu)->harq_pid = rel8->harq_process; - ((DCI2A_1_5MHz_2A_TDD_t *)dci_pdu)->tb_swap = rel8->transport_block_to_codeword_swap_flag; - ((DCI2A_1_5MHz_2A_TDD_t *)dci_pdu)->dai = rel8->downlink_assignment_index; + dci_alloc->dci_length = sizeof_DCI2A_1_5MHz_2A_TDD_t; + ((DCI2A_1_5MHz_2A_TDD_t *) dci_pdu)->rah = rel8->resource_allocation_type; + ((DCI2A_1_5MHz_2A_TDD_t *) dci_pdu)->mcs1 = rel8->mcs_1; + ((DCI2A_1_5MHz_2A_TDD_t *) dci_pdu)->mcs2 = rel8->mcs_2; + ((DCI2A_1_5MHz_2A_TDD_t *) dci_pdu)->ndi1 = rel8->new_data_indicator_1; + ((DCI2A_1_5MHz_2A_TDD_t *) dci_pdu)->ndi2 = rel8->new_data_indicator_2; + ((DCI2A_1_5MHz_2A_TDD_t *) dci_pdu)->rballoc = rel8->resource_block_coding; + ((DCI2A_1_5MHz_2A_TDD_t *) dci_pdu)->rv1 = rel8->redundancy_version_1; + ((DCI2A_1_5MHz_2A_TDD_t *) dci_pdu)->rv2 = rel8->redundancy_version_2; + ((DCI2A_1_5MHz_2A_TDD_t *) dci_pdu)->TPC = rel8->tpc; + ((DCI2A_1_5MHz_2A_TDD_t *) dci_pdu)->harq_pid = rel8->harq_process; + ((DCI2A_1_5MHz_2A_TDD_t *) dci_pdu)->tb_swap = rel8->transport_block_to_codeword_swap_flag; + ((DCI2A_1_5MHz_2A_TDD_t *) dci_pdu)->dai = rel8->downlink_assignment_index; // printf("TDD 1: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB); } else { - dci_alloc->dci_length = sizeof_DCI2A_1_5MHz_2A_FDD_t; - ((DCI2A_1_5MHz_2A_FDD_t *)dci_pdu)->rah = rel8->resource_allocation_type; - ((DCI2A_1_5MHz_2A_FDD_t *)dci_pdu)->mcs1 = rel8->mcs_1; - ((DCI2A_1_5MHz_2A_FDD_t *)dci_pdu)->mcs2 = rel8->mcs_2; - ((DCI2A_1_5MHz_2A_FDD_t *)dci_pdu)->ndi1 = rel8->new_data_indicator_1; - ((DCI2A_1_5MHz_2A_FDD_t *)dci_pdu)->ndi2 = rel8->new_data_indicator_2; - ((DCI2A_1_5MHz_2A_FDD_t *)dci_pdu)->rballoc = rel8->resource_block_coding; - ((DCI2A_1_5MHz_2A_FDD_t *)dci_pdu)->rv1 = rel8->redundancy_version_1; - ((DCI2A_1_5MHz_2A_FDD_t *)dci_pdu)->rv2 = rel8->redundancy_version_2; - ((DCI2A_1_5MHz_2A_FDD_t *)dci_pdu)->TPC = rel8->tpc; - ((DCI2A_1_5MHz_2A_FDD_t *)dci_pdu)->harq_pid = rel8->harq_process; - ((DCI2A_1_5MHz_2A_FDD_t *)dci_pdu)->tb_swap = rel8->transport_block_to_codeword_swap_flag; + dci_alloc->dci_length = sizeof_DCI2A_1_5MHz_2A_FDD_t; + ((DCI2A_1_5MHz_2A_FDD_t *) dci_pdu)->rah = rel8->resource_allocation_type; + ((DCI2A_1_5MHz_2A_FDD_t *) dci_pdu)->mcs1 = rel8->mcs_1; + ((DCI2A_1_5MHz_2A_FDD_t *) dci_pdu)->mcs2 = rel8->mcs_2; + ((DCI2A_1_5MHz_2A_FDD_t *) dci_pdu)->ndi1 = rel8->new_data_indicator_1; + ((DCI2A_1_5MHz_2A_FDD_t *) dci_pdu)->ndi2 = rel8->new_data_indicator_2; + ((DCI2A_1_5MHz_2A_FDD_t *) dci_pdu)->rballoc = rel8->resource_block_coding; + ((DCI2A_1_5MHz_2A_FDD_t *) dci_pdu)->rv1 = rel8->redundancy_version_1; + ((DCI2A_1_5MHz_2A_FDD_t *) dci_pdu)->rv2 = rel8->redundancy_version_2; + ((DCI2A_1_5MHz_2A_FDD_t *) dci_pdu)->TPC = rel8->tpc; + ((DCI2A_1_5MHz_2A_FDD_t *) dci_pdu)->harq_pid = rel8->harq_process; + ((DCI2A_1_5MHz_2A_FDD_t *) dci_pdu)->tb_swap = rel8->transport_block_to_codeword_swap_flag; // printf("FDD 1: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB); } break; case 25: if (fp->frame_type == TDD) { - dci_alloc->dci_length = sizeof_DCI2A_5MHz_2A_TDD_t; - ((DCI2A_5MHz_2A_TDD_t *)dci_pdu)->rah = rel8->resource_allocation_type; - ((DCI2A_5MHz_2A_TDD_t *)dci_pdu)->mcs1 = rel8->mcs_1; - ((DCI2A_5MHz_2A_TDD_t *)dci_pdu)->mcs2 = rel8->mcs_2; - ((DCI2A_5MHz_2A_TDD_t *)dci_pdu)->ndi1 = rel8->new_data_indicator_1; - ((DCI2A_5MHz_2A_TDD_t *)dci_pdu)->ndi2 = rel8->new_data_indicator_2; - ((DCI2A_5MHz_2A_TDD_t *)dci_pdu)->rballoc = rel8->resource_block_coding; - ((DCI2A_5MHz_2A_TDD_t *)dci_pdu)->rv1 = rel8->redundancy_version_1; - ((DCI2A_5MHz_2A_TDD_t *)dci_pdu)->rv2 = rel8->redundancy_version_2; - ((DCI2A_5MHz_2A_TDD_t *)dci_pdu)->TPC = rel8->tpc; - ((DCI2A_5MHz_2A_TDD_t *)dci_pdu)->harq_pid = rel8->harq_process; - ((DCI2A_5MHz_2A_TDD_t *)dci_pdu)->tb_swap = rel8->transport_block_to_codeword_swap_flag; - ((DCI2A_5MHz_2A_TDD_t *)dci_pdu)->dai = rel8->downlink_assignment_index; + dci_alloc->dci_length = sizeof_DCI2A_5MHz_2A_TDD_t; + ((DCI2A_5MHz_2A_TDD_t *) dci_pdu)->rah = rel8->resource_allocation_type; + ((DCI2A_5MHz_2A_TDD_t *) dci_pdu)->mcs1 = rel8->mcs_1; + ((DCI2A_5MHz_2A_TDD_t *) dci_pdu)->mcs2 = rel8->mcs_2; + ((DCI2A_5MHz_2A_TDD_t *) dci_pdu)->ndi1 = rel8->new_data_indicator_1; + ((DCI2A_5MHz_2A_TDD_t *) dci_pdu)->ndi2 = rel8->new_data_indicator_2; + ((DCI2A_5MHz_2A_TDD_t *) dci_pdu)->rballoc = rel8->resource_block_coding; + ((DCI2A_5MHz_2A_TDD_t *) dci_pdu)->rv1 = rel8->redundancy_version_1; + ((DCI2A_5MHz_2A_TDD_t *) dci_pdu)->rv2 = rel8->redundancy_version_2; + ((DCI2A_5MHz_2A_TDD_t *) dci_pdu)->TPC = rel8->tpc; + ((DCI2A_5MHz_2A_TDD_t *) dci_pdu)->harq_pid = rel8->harq_process; + ((DCI2A_5MHz_2A_TDD_t *) dci_pdu)->tb_swap = rel8->transport_block_to_codeword_swap_flag; + ((DCI2A_5MHz_2A_TDD_t *) dci_pdu)->dai = rel8->downlink_assignment_index; // printf("TDD 1: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB); } else { - dci_alloc->dci_length = sizeof_DCI2A_5MHz_2A_FDD_t; - ((DCI2A_5MHz_2A_FDD_t *)dci_pdu)->rah = rel8->resource_allocation_type; - ((DCI2A_5MHz_2A_FDD_t *)dci_pdu)->mcs1 = rel8->mcs_1; - ((DCI2A_5MHz_2A_FDD_t *)dci_pdu)->mcs2 = rel8->mcs_2; - ((DCI2A_5MHz_2A_FDD_t *)dci_pdu)->ndi1 = rel8->new_data_indicator_1; - ((DCI2A_5MHz_2A_FDD_t *)dci_pdu)->ndi2 = rel8->new_data_indicator_2; - ((DCI2A_5MHz_2A_FDD_t *)dci_pdu)->rballoc = rel8->resource_block_coding; - ((DCI2A_5MHz_2A_FDD_t *)dci_pdu)->rv1 = rel8->redundancy_version_1; - ((DCI2A_5MHz_2A_FDD_t *)dci_pdu)->rv2 = rel8->redundancy_version_2; - ((DCI2A_5MHz_2A_FDD_t *)dci_pdu)->TPC = rel8->tpc; - ((DCI2A_5MHz_2A_FDD_t *)dci_pdu)->harq_pid = rel8->harq_process; - ((DCI2A_5MHz_2A_FDD_t *)dci_pdu)->tb_swap = rel8->transport_block_to_codeword_swap_flag; + dci_alloc->dci_length = sizeof_DCI2A_5MHz_2A_FDD_t; + ((DCI2A_5MHz_2A_FDD_t *) dci_pdu)->rah = rel8->resource_allocation_type; + ((DCI2A_5MHz_2A_FDD_t *) dci_pdu)->mcs1 = rel8->mcs_1; + ((DCI2A_5MHz_2A_FDD_t *) dci_pdu)->mcs2 = rel8->mcs_2; + ((DCI2A_5MHz_2A_FDD_t *) dci_pdu)->ndi1 = rel8->new_data_indicator_1; + ((DCI2A_5MHz_2A_FDD_t *) dci_pdu)->ndi2 = rel8->new_data_indicator_2; + ((DCI2A_5MHz_2A_FDD_t *) dci_pdu)->rballoc = rel8->resource_block_coding; + ((DCI2A_5MHz_2A_FDD_t *) dci_pdu)->rv1 = rel8->redundancy_version_1; + ((DCI2A_5MHz_2A_FDD_t *) dci_pdu)->rv2 = rel8->redundancy_version_2; + ((DCI2A_5MHz_2A_FDD_t *) dci_pdu)->TPC = rel8->tpc; + ((DCI2A_5MHz_2A_FDD_t *) dci_pdu)->harq_pid = rel8->harq_process; + ((DCI2A_5MHz_2A_FDD_t *) dci_pdu)->tb_swap = rel8->transport_block_to_codeword_swap_flag; // printf("FDD 1: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB); } break; case 50: if (fp->frame_type == TDD) { - dci_alloc->dci_length = sizeof_DCI2A_10MHz_2A_TDD_t; - ((DCI2A_10MHz_2A_TDD_t *)dci_pdu)->rah = rel8->resource_allocation_type; - ((DCI2A_10MHz_2A_TDD_t *)dci_pdu)->mcs1 = rel8->mcs_1; - ((DCI2A_10MHz_2A_TDD_t *)dci_pdu)->mcs2 = rel8->mcs_2; - ((DCI2A_10MHz_2A_TDD_t *)dci_pdu)->ndi1 = rel8->new_data_indicator_1; - ((DCI2A_10MHz_2A_TDD_t *)dci_pdu)->ndi2 = rel8->new_data_indicator_2; - ((DCI2A_10MHz_2A_TDD_t *)dci_pdu)->rballoc = rel8->resource_block_coding; - ((DCI2A_10MHz_2A_TDD_t *)dci_pdu)->rv1 = rel8->redundancy_version_1; - ((DCI2A_10MHz_2A_TDD_t *)dci_pdu)->rv2 = rel8->redundancy_version_2; - ((DCI2A_10MHz_2A_TDD_t *)dci_pdu)->TPC = rel8->tpc; - ((DCI2A_10MHz_2A_TDD_t *)dci_pdu)->harq_pid = rel8->harq_process; - ((DCI2A_10MHz_2A_TDD_t *)dci_pdu)->tb_swap = rel8->transport_block_to_codeword_swap_flag; - ((DCI2A_10MHz_2A_TDD_t *)dci_pdu)->dai = rel8->downlink_assignment_index; + dci_alloc->dci_length = sizeof_DCI2A_10MHz_2A_TDD_t; + ((DCI2A_10MHz_2A_TDD_t *) dci_pdu)->rah = rel8->resource_allocation_type; + ((DCI2A_10MHz_2A_TDD_t *) dci_pdu)->mcs1 = rel8->mcs_1; + ((DCI2A_10MHz_2A_TDD_t *) dci_pdu)->mcs2 = rel8->mcs_2; + ((DCI2A_10MHz_2A_TDD_t *) dci_pdu)->ndi1 = rel8->new_data_indicator_1; + ((DCI2A_10MHz_2A_TDD_t *) dci_pdu)->ndi2 = rel8->new_data_indicator_2; + ((DCI2A_10MHz_2A_TDD_t *) dci_pdu)->rballoc = rel8->resource_block_coding; + ((DCI2A_10MHz_2A_TDD_t *) dci_pdu)->rv1 = rel8->redundancy_version_1; + ((DCI2A_10MHz_2A_TDD_t *) dci_pdu)->rv2 = rel8->redundancy_version_2; + ((DCI2A_10MHz_2A_TDD_t *) dci_pdu)->TPC = rel8->tpc; + ((DCI2A_10MHz_2A_TDD_t *) dci_pdu)->harq_pid = rel8->harq_process; + ((DCI2A_10MHz_2A_TDD_t *) dci_pdu)->tb_swap = rel8->transport_block_to_codeword_swap_flag; + ((DCI2A_10MHz_2A_TDD_t *) dci_pdu)->dai = rel8->downlink_assignment_index; // printf("TDD 1: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB); } else { - dci_alloc->dci_length = sizeof_DCI2A_10MHz_2A_FDD_t; - ((DCI2A_10MHz_2A_FDD_t *)dci_pdu)->rah = rel8->resource_allocation_type; - ((DCI2A_10MHz_2A_FDD_t *)dci_pdu)->mcs1 = rel8->mcs_1; - ((DCI2A_10MHz_2A_FDD_t *)dci_pdu)->mcs2 = rel8->mcs_2; - ((DCI2A_10MHz_2A_FDD_t *)dci_pdu)->ndi1 = rel8->new_data_indicator_1; - ((DCI2A_10MHz_2A_FDD_t *)dci_pdu)->ndi2 = rel8->new_data_indicator_2; - ((DCI2A_10MHz_2A_FDD_t *)dci_pdu)->rballoc = rel8->resource_block_coding; - ((DCI2A_10MHz_2A_FDD_t *)dci_pdu)->rv1 = rel8->redundancy_version_1; - ((DCI2A_10MHz_2A_FDD_t *)dci_pdu)->rv2 = rel8->redundancy_version_2; - ((DCI2A_10MHz_2A_FDD_t *)dci_pdu)->TPC = rel8->tpc; - ((DCI2A_10MHz_2A_FDD_t *)dci_pdu)->harq_pid = rel8->harq_process; - ((DCI2A_10MHz_2A_FDD_t *)dci_pdu)->tb_swap = rel8->transport_block_to_codeword_swap_flag; + dci_alloc->dci_length = sizeof_DCI2A_10MHz_2A_FDD_t; + ((DCI2A_10MHz_2A_FDD_t *) dci_pdu)->rah = rel8->resource_allocation_type; + ((DCI2A_10MHz_2A_FDD_t *) dci_pdu)->mcs1 = rel8->mcs_1; + ((DCI2A_10MHz_2A_FDD_t *) dci_pdu)->mcs2 = rel8->mcs_2; + ((DCI2A_10MHz_2A_FDD_t *) dci_pdu)->ndi1 = rel8->new_data_indicator_1; + ((DCI2A_10MHz_2A_FDD_t *) dci_pdu)->ndi2 = rel8->new_data_indicator_2; + ((DCI2A_10MHz_2A_FDD_t *) dci_pdu)->rballoc = rel8->resource_block_coding; + ((DCI2A_10MHz_2A_FDD_t *) dci_pdu)->rv1 = rel8->redundancy_version_1; + ((DCI2A_10MHz_2A_FDD_t *) dci_pdu)->rv2 = rel8->redundancy_version_2; + ((DCI2A_10MHz_2A_FDD_t *) dci_pdu)->TPC = rel8->tpc; + ((DCI2A_10MHz_2A_FDD_t *) dci_pdu)->harq_pid = rel8->harq_process; + ((DCI2A_10MHz_2A_FDD_t *) dci_pdu)->tb_swap = rel8->transport_block_to_codeword_swap_flag; } break; case 100: if (fp->frame_type == TDD) { - dci_alloc->dci_length = sizeof_DCI2A_20MHz_2A_TDD_t; - ((DCI2A_20MHz_2A_TDD_t *)dci_pdu)->rah = rel8->resource_allocation_type; - ((DCI2A_20MHz_2A_TDD_t *)dci_pdu)->mcs1 = rel8->mcs_1; - ((DCI2A_20MHz_2A_TDD_t *)dci_pdu)->mcs2 = rel8->mcs_2; - ((DCI2A_20MHz_2A_TDD_t *)dci_pdu)->ndi1 = rel8->new_data_indicator_1; - ((DCI2A_20MHz_2A_TDD_t *)dci_pdu)->ndi2 = rel8->new_data_indicator_2; - ((DCI2A_20MHz_2A_TDD_t *)dci_pdu)->rballoc = rel8->resource_block_coding; - ((DCI2A_20MHz_2A_TDD_t *)dci_pdu)->rv1 = rel8->redundancy_version_1; - ((DCI2A_20MHz_2A_TDD_t *)dci_pdu)->rv2 = rel8->redundancy_version_2; - ((DCI2A_20MHz_2A_TDD_t *)dci_pdu)->TPC = rel8->tpc; - ((DCI2A_20MHz_2A_TDD_t *)dci_pdu)->harq_pid = rel8->harq_process; - ((DCI2A_20MHz_2A_TDD_t *)dci_pdu)->tb_swap = rel8->transport_block_to_codeword_swap_flag; - ((DCI2A_20MHz_2A_TDD_t *)dci_pdu)->dai = rel8->downlink_assignment_index; + dci_alloc->dci_length = sizeof_DCI2A_20MHz_2A_TDD_t; + ((DCI2A_20MHz_2A_TDD_t *) dci_pdu)->rah = rel8->resource_allocation_type; + ((DCI2A_20MHz_2A_TDD_t *) dci_pdu)->mcs1 = rel8->mcs_1; + ((DCI2A_20MHz_2A_TDD_t *) dci_pdu)->mcs2 = rel8->mcs_2; + ((DCI2A_20MHz_2A_TDD_t *) dci_pdu)->ndi1 = rel8->new_data_indicator_1; + ((DCI2A_20MHz_2A_TDD_t *) dci_pdu)->ndi2 = rel8->new_data_indicator_2; + ((DCI2A_20MHz_2A_TDD_t *) dci_pdu)->rballoc = rel8->resource_block_coding; + ((DCI2A_20MHz_2A_TDD_t *) dci_pdu)->rv1 = rel8->redundancy_version_1; + ((DCI2A_20MHz_2A_TDD_t *) dci_pdu)->rv2 = rel8->redundancy_version_2; + ((DCI2A_20MHz_2A_TDD_t *) dci_pdu)->TPC = rel8->tpc; + ((DCI2A_20MHz_2A_TDD_t *) dci_pdu)->harq_pid = rel8->harq_process; + ((DCI2A_20MHz_2A_TDD_t *) dci_pdu)->tb_swap = rel8->transport_block_to_codeword_swap_flag; + ((DCI2A_20MHz_2A_TDD_t *) dci_pdu)->dai = rel8->downlink_assignment_index; // printf("TDD 1: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB); } else { - dci_alloc->dci_length = sizeof_DCI2A_20MHz_2A_FDD_t; - ((DCI2A_20MHz_2A_FDD_t *)dci_pdu)->rah = rel8->resource_allocation_type; - ((DCI2A_20MHz_2A_FDD_t *)dci_pdu)->mcs1 = rel8->mcs_1; - ((DCI2A_20MHz_2A_FDD_t *)dci_pdu)->mcs2 = rel8->mcs_2; - ((DCI2A_20MHz_2A_FDD_t *)dci_pdu)->ndi1 = rel8->new_data_indicator_1; - ((DCI2A_20MHz_2A_FDD_t *)dci_pdu)->ndi2 = rel8->new_data_indicator_2; - ((DCI2A_20MHz_2A_FDD_t *)dci_pdu)->rballoc = rel8->resource_block_coding; - ((DCI2A_20MHz_2A_FDD_t *)dci_pdu)->rv1 = rel8->redundancy_version_1; - ((DCI2A_20MHz_2A_FDD_t *)dci_pdu)->rv2 = rel8->redundancy_version_2; - ((DCI2A_20MHz_2A_FDD_t *)dci_pdu)->TPC = rel8->tpc; - ((DCI2A_20MHz_2A_FDD_t *)dci_pdu)->harq_pid = rel8->harq_process; - ((DCI2A_20MHz_2A_TDD_t *)dci_pdu)->tb_swap = rel8->transport_block_to_codeword_swap_flag; + dci_alloc->dci_length = sizeof_DCI2A_20MHz_2A_FDD_t; + ((DCI2A_20MHz_2A_FDD_t *) dci_pdu)->rah = rel8->resource_allocation_type; + ((DCI2A_20MHz_2A_FDD_t *) dci_pdu)->mcs1 = rel8->mcs_1; + ((DCI2A_20MHz_2A_FDD_t *) dci_pdu)->mcs2 = rel8->mcs_2; + ((DCI2A_20MHz_2A_FDD_t *) dci_pdu)->ndi1 = rel8->new_data_indicator_1; + ((DCI2A_20MHz_2A_FDD_t *) dci_pdu)->ndi2 = rel8->new_data_indicator_2; + ((DCI2A_20MHz_2A_FDD_t *) dci_pdu)->rballoc = rel8->resource_block_coding; + ((DCI2A_20MHz_2A_FDD_t *) dci_pdu)->rv1 = rel8->redundancy_version_1; + ((DCI2A_20MHz_2A_FDD_t *) dci_pdu)->rv2 = rel8->redundancy_version_2; + ((DCI2A_20MHz_2A_FDD_t *) dci_pdu)->TPC = rel8->tpc; + ((DCI2A_20MHz_2A_FDD_t *) dci_pdu)->harq_pid = rel8->harq_process; + ((DCI2A_20MHz_2A_TDD_t *) dci_pdu)->tb_swap = rel8->transport_block_to_codeword_swap_flag; } break; } - AssertFatal(rel8->harq_process<8,"Format 2_2A: harq_pid=%d >= 8\n", rel8->harq_process); + AssertFatal (rel8->harq_process < 8, "Format 2_2A: harq_pid=%d >= 8\n", rel8->harq_process); // Flip the TB to codeword mapping as described in 5.3.3.1.5 of 36-212 V11.3.0 @@ -1553,154 +1568,148 @@ LOG_D(PHY,"NFAPI: harq_pid %d harq_mask %x, round %d ndi (%d,%d) rnti type %d\n" // printf("Setting DLSCH harq id %d to subframe %d\n",harq_pid,subframe); - conv_rballoc(rel8->resource_allocation_type, - rel8->resource_block_coding, - fp->N_RB_DL, - dlsch0_harq->rb_alloc); + conv_rballoc (rel8->resource_allocation_type, rel8->resource_block_coding, fp->N_RB_DL, dlsch0_harq->rb_alloc); - dlsch1_harq->rb_alloc[0] = dlsch0_harq->rb_alloc[0]; - dlsch0_harq->nb_rb = conv_nprb(rel8->resource_allocation_type, - rel8->resource_block_coding, - fp->N_RB_DL); - dlsch1_harq->nb_rb = dlsch0_harq->nb_rb; + dlsch1_harq->rb_alloc[0] = dlsch0_harq->rb_alloc[0]; + dlsch0_harq->nb_rb = conv_nprb (rel8->resource_allocation_type, rel8->resource_block_coding, fp->N_RB_DL); + dlsch1_harq->nb_rb = dlsch0_harq->nb_rb; - AssertFatal(dlsch0_harq->nb_rb > 0,"nb_rb=0\n"); + AssertFatal (dlsch0_harq->nb_rb > 0, "nb_rb=0\n"); - dlsch0_harq->mcs = rel8->mcs_1; - dlsch1_harq->mcs = rel8->mcs_2; - dlsch0_harq->Qm = get_Qm(rel8->mcs_1); - dlsch1_harq->Qm = get_Qm(rel8->mcs_2); - dlsch0_harq->rvidx = rel8->redundancy_version_1; - dlsch1_harq->rvidx = rel8->redundancy_version_2; + dlsch0_harq->mcs = rel8->mcs_1; + dlsch1_harq->mcs = rel8->mcs_2; + dlsch0_harq->Qm = get_Qm (rel8->mcs_1); + dlsch1_harq->Qm = get_Qm (rel8->mcs_2); + dlsch0_harq->rvidx = rel8->redundancy_version_1; + dlsch1_harq->rvidx = rel8->redundancy_version_2; // assume both TBs are active - dlsch0_harq->Nl = 1; - dlsch1_harq->Nl = 1; + dlsch0_harq->Nl = 1; + dlsch1_harq->Nl = 1; dlsch0->active = 1; dlsch1->active = 1; - dlsch0->harq_mask |= (1<harq_process); - dlsch1->harq_mask |= (1<harq_process); + dlsch0->harq_mask |= (1 << rel8->harq_process); + dlsch1->harq_mask |= (1 << rel8->harq_process); // check if either TB is disabled (see 36-213 V11.3 Section ) if ((dlsch0_harq->rvidx == 1) && (dlsch0_harq->mcs == 0)) { dlsch0->active = 0; - dlsch0->harq_mask &= ~(1<harq_process); + dlsch0->harq_mask &= ~(1 << rel8->harq_process); } if ((dlsch1_harq->rvidx == 1) && (dlsch1_harq->mcs == 0)) { dlsch1->active = 0; - dlsch1->harq_mask &= ~(1<harq_process); + dlsch1->harq_mask &= ~(1 << rel8->harq_process); } - - // dlsch0_harq->dl_power_off = 0; - // dlsch1_harq->dl_power_off = 0; + // dlsch0_harq->dl_power_off = 0; + // dlsch1_harq->dl_power_off = 0; if (fp->nb_antenna_ports_eNB == 2) { - dlsch0_harq->TBS = TBStable[get_I_TBS(dlsch0_harq->mcs)][dlsch0_harq->nb_rb-1]; - dlsch1_harq->TBS = TBStable[get_I_TBS(dlsch1_harq->mcs)][dlsch0_harq->nb_rb-1]; + dlsch0_harq->TBS = TBStable[get_I_TBS (dlsch0_harq->mcs)][dlsch0_harq->nb_rb - 1]; + dlsch1_harq->TBS = TBStable[get_I_TBS (dlsch1_harq->mcs)][dlsch0_harq->nb_rb - 1]; - if ((dlsch0->active==1) && (dlsch1->active==1)) { + if ((dlsch0->active == 1) && (dlsch1->active == 1)) { dlsch0_harq->mimo_mode = LARGE_CDD; dlsch1_harq->mimo_mode = LARGE_CDD; dlsch0_harq->dl_power_off = 1; dlsch1_harq->dl_power_off = 1; } else { - dlsch0_harq->mimo_mode = ALAMOUTI; - dlsch1_harq->mimo_mode = ALAMOUTI; + dlsch0_harq->mimo_mode = ALAMOUTI; + dlsch1_harq->mimo_mode = ALAMOUTI; } } else if (fp->nb_antenna_ports_eNB == 4) { // 4 antenna case - if ((dlsch0->active==1) && (dlsch1->active==1)) { + if ((dlsch0->active == 1) && (dlsch1->active == 1)) { switch (rel8->precoding_information) { - case 0: // one layer per transport block - dlsch0_harq->mimo_mode = LARGE_CDD; - dlsch1_harq->mimo_mode = LARGE_CDD; - dlsch0_harq->TBS = TBStable[get_I_TBS(dlsch0_harq->mcs)][dlsch0_harq->nb_rb-1]; - dlsch0_harq->TBS = TBStable[get_I_TBS(dlsch0_harq->mcs)][dlsch0_harq->nb_rb-1]; + case 0: // one layer per transport block + dlsch0_harq->mimo_mode = LARGE_CDD; + dlsch1_harq->mimo_mode = LARGE_CDD; + dlsch0_harq->TBS = TBStable[get_I_TBS (dlsch0_harq->mcs)][dlsch0_harq->nb_rb - 1]; + dlsch0_harq->TBS = TBStable[get_I_TBS (dlsch0_harq->mcs)][dlsch0_harq->nb_rb - 1]; dlsch0_harq->dl_power_off = 1; dlsch1_harq->dl_power_off = 1; break; - case 1: // one-layers on TB 0, two on TB 1 - dlsch0_harq->mimo_mode = LARGE_CDD; - dlsch1_harq->mimo_mode = LARGE_CDD; - dlsch1_harq->Nl = 2; - dlsch1_harq->TBS = TBStable[get_I_TBS(dlsch1_harq->mcs)][(dlsch1_harq->nb_rb<<1)-1]; + case 1: // one-layers on TB 0, two on TB 1 + dlsch0_harq->mimo_mode = LARGE_CDD; + dlsch1_harq->mimo_mode = LARGE_CDD; + dlsch1_harq->Nl = 2; + dlsch1_harq->TBS = TBStable[get_I_TBS (dlsch1_harq->mcs)][(dlsch1_harq->nb_rb << 1) - 1]; dlsch0_harq->dl_power_off = 1; dlsch1_harq->dl_power_off = 1; break; - case 2: // two-layers on TB 0, two on TB 1 - dlsch0_harq->mimo_mode = LARGE_CDD; - dlsch1_harq->mimo_mode = LARGE_CDD; - dlsch0_harq->Nl = 2; + case 2: // two-layers on TB 0, two on TB 1 + dlsch0_harq->mimo_mode = LARGE_CDD; + dlsch1_harq->mimo_mode = LARGE_CDD; + dlsch0_harq->Nl = 2; dlsch0_harq->dl_power_off = 1; dlsch1_harq->dl_power_off = 1; if (fp->N_RB_DL <= 56) { - dlsch0_harq->TBS = TBStable[get_I_TBS(dlsch0_harq->mcs)][(dlsch0_harq->nb_rb<<1)-1]; - dlsch1_harq->TBS = TBStable[get_I_TBS(dlsch1_harq->mcs)][(dlsch1_harq->nb_rb<<1)-1]; + dlsch0_harq->TBS = TBStable[get_I_TBS (dlsch0_harq->mcs)][(dlsch0_harq->nb_rb << 1) - 1]; + dlsch1_harq->TBS = TBStable[get_I_TBS (dlsch1_harq->mcs)][(dlsch1_harq->nb_rb << 1) - 1]; } else { - LOG_E(PHY,"Add implementation of Table 7.1.7.2.2-1 for two-layer TBS conversion with N_RB_DL > 56\n"); + LOG_E (PHY, "Add implementation of Table 7.1.7.2.2-1 for two-layer TBS conversion with N_RB_DL > 56\n"); } break; - case 3: // - LOG_E(PHY,"Illegal value (3) for TPMI in Format 2A DCI\n"); + case 3: // + LOG_E (PHY, "Illegal value (3) for TPMI in Format 2A DCI\n"); break; } } else if (dlsch0->active == 1) { switch (rel8->precoding_information) { - case 0: // one layer per transport block - dlsch0_harq->mimo_mode = ALAMOUTI; - dlsch1_harq->mimo_mode = ALAMOUTI; - dlsch0_harq->TBS = TBStable[get_I_TBS(dlsch0_harq->mcs)][dlsch0_harq->nb_rb-1]; + case 0: // one layer per transport block + dlsch0_harq->mimo_mode = ALAMOUTI; + dlsch1_harq->mimo_mode = ALAMOUTI; + dlsch0_harq->TBS = TBStable[get_I_TBS (dlsch0_harq->mcs)][dlsch0_harq->nb_rb - 1]; break; - case 1: // two-layers on TB 0 - dlsch0_harq->mimo_mode = LARGE_CDD; - dlsch0_harq->Nl = 2; + case 1: // two-layers on TB 0 + dlsch0_harq->mimo_mode = LARGE_CDD; + dlsch0_harq->Nl = 2; dlsch0_harq->dl_power_off = 1; - dlsch0_harq->TBS = TBStable[get_I_TBS(dlsch0_harq->mcs)][(dlsch0_harq->nb_rb<<1)-1]; + dlsch0_harq->TBS = TBStable[get_I_TBS (dlsch0_harq->mcs)][(dlsch0_harq->nb_rb << 1) - 1]; break; - case 2: // two-layers on TB 0, two on TB 1 - case 3: // - LOG_E(PHY,"Illegal value %d for TPMI in Format 2A DCI with one transport block enabled\n",rel8->precoding_information); + case 2: // two-layers on TB 0, two on TB 1 + case 3: // + LOG_E (PHY, "Illegal value %d for TPMI in Format 2A DCI with one transport block enabled\n", rel8->precoding_information); break; } } else if (dlsch1->active == 1) { switch (rel8->precoding_information) { - case 0: // one layer per transport block - dlsch0_harq->mimo_mode = ALAMOUTI; - dlsch1_harq->mimo_mode = ALAMOUTI; - dlsch1_harq->TBS = TBStable[get_I_TBS(dlsch1_harq->mcs)][dlsch1_harq->nb_rb-1]; + case 0: // one layer per transport block + dlsch0_harq->mimo_mode = ALAMOUTI; + dlsch1_harq->mimo_mode = ALAMOUTI; + dlsch1_harq->TBS = TBStable[get_I_TBS (dlsch1_harq->mcs)][dlsch1_harq->nb_rb - 1]; break; - case 1: // two-layers on TB 0 - dlsch1_harq->mimo_mode = LARGE_CDD; - dlsch1_harq->Nl = 2; + case 1: // two-layers on TB 0 + dlsch1_harq->mimo_mode = LARGE_CDD; + dlsch1_harq->Nl = 2; dlsch1_harq->dl_power_off = 1; - dlsch1_harq->TBS = TBStable[get_I_TBS(dlsch1_harq->mcs)][(dlsch1_harq->nb_rb<<1)-1]; + dlsch1_harq->TBS = TBStable[get_I_TBS (dlsch1_harq->mcs)][(dlsch1_harq->nb_rb << 1) - 1]; break; - case 2: // two-layers on TB 0, two on TB 1 - case 3: // - LOG_E(PHY,"Illegal value %d for TPMI in Format 2A DCI with one transport block enabled\n",rel8->precoding_information); + case 2: // two-layers on TB 0, two on TB 1 + case 3: // + LOG_E (PHY, "Illegal value %d for TPMI in Format 2A DCI with one transport block enabled\n", rel8->precoding_information); break; } } } else { - LOG_E(PHY,"Illegal number of antennas for eNB %d\n",fp->nb_antenna_ports_eNB); + LOG_E (PHY, "Illegal number of antennas for eNB %d\n", fp->nb_antenna_ports_eNB); } // reset HARQ process if this is the first transmission - if ((dlsch0->active==1) && (dlsch0_harq->round == 0)) + if ((dlsch0->active == 1) && (dlsch0_harq->round == 0)) dlsch0_harq->status = ACTIVE; - if ((dlsch1->active==1) && (dlsch1_harq->round == 0)) + if ((dlsch1->active == 1) && (dlsch1_harq->round == 0)) dlsch1_harq->status = ACTIVE; dlsch0->rnti = rel8->rnti; @@ -1708,147 +1717,147 @@ LOG_D(PHY,"NFAPI: harq_pid %d harq_mask %x, round %d ndi (%d,%d) rnti type %d\n" break; - + case NFAPI_DL_DCI_FORMAT_2: - dci_alloc->format = format2; + dci_alloc->format = format2; switch (fp->N_RB_DL) { case 6: if (fp->frame_type == TDD) { - dci_alloc->dci_length = sizeof_DCI2_1_5MHz_2A_TDD_t; - ((DCI2_1_5MHz_2A_TDD_t *)dci_pdu)->mcs1 = rel8->mcs_1; - ((DCI2_1_5MHz_2A_TDD_t *)dci_pdu)->mcs2 = rel8->mcs_2; - ((DCI2_1_5MHz_2A_TDD_t *)dci_pdu)->ndi1 = rel8->new_data_indicator_1; - ((DCI2_1_5MHz_2A_TDD_t *)dci_pdu)->ndi2 = rel8->new_data_indicator_2; - ((DCI2_1_5MHz_2A_TDD_t *)dci_pdu)->rballoc = rel8->resource_block_coding; - ((DCI2_1_5MHz_2A_TDD_t *)dci_pdu)->rv1 = rel8->redundancy_version_1; - ((DCI2_1_5MHz_2A_TDD_t *)dci_pdu)->rv2 = rel8->redundancy_version_2; - ((DCI2_1_5MHz_2A_TDD_t *)dci_pdu)->TPC = rel8->tpc; - ((DCI2_1_5MHz_2A_TDD_t *)dci_pdu)->harq_pid = rel8->harq_process; - ((DCI2_1_5MHz_2A_TDD_t *)dci_pdu)->tb_swap = rel8->transport_block_to_codeword_swap_flag; - ((DCI2_1_5MHz_2A_TDD_t *)dci_pdu)->dai = rel8->downlink_assignment_index; - ((DCI2_1_5MHz_2A_TDD_t *)dci_pdu)->tpmi = rel8->precoding_information; + dci_alloc->dci_length = sizeof_DCI2_1_5MHz_2A_TDD_t; + ((DCI2_1_5MHz_2A_TDD_t *) dci_pdu)->mcs1 = rel8->mcs_1; + ((DCI2_1_5MHz_2A_TDD_t *) dci_pdu)->mcs2 = rel8->mcs_2; + ((DCI2_1_5MHz_2A_TDD_t *) dci_pdu)->ndi1 = rel8->new_data_indicator_1; + ((DCI2_1_5MHz_2A_TDD_t *) dci_pdu)->ndi2 = rel8->new_data_indicator_2; + ((DCI2_1_5MHz_2A_TDD_t *) dci_pdu)->rballoc = rel8->resource_block_coding; + ((DCI2_1_5MHz_2A_TDD_t *) dci_pdu)->rv1 = rel8->redundancy_version_1; + ((DCI2_1_5MHz_2A_TDD_t *) dci_pdu)->rv2 = rel8->redundancy_version_2; + ((DCI2_1_5MHz_2A_TDD_t *) dci_pdu)->TPC = rel8->tpc; + ((DCI2_1_5MHz_2A_TDD_t *) dci_pdu)->harq_pid = rel8->harq_process; + ((DCI2_1_5MHz_2A_TDD_t *) dci_pdu)->tb_swap = rel8->transport_block_to_codeword_swap_flag; + ((DCI2_1_5MHz_2A_TDD_t *) dci_pdu)->dai = rel8->downlink_assignment_index; + ((DCI2_1_5MHz_2A_TDD_t *) dci_pdu)->tpmi = rel8->precoding_information; // printf("TDD 1: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB); } else { - dci_alloc->dci_length = sizeof_DCI2_1_5MHz_2A_FDD_t; - ((DCI2_1_5MHz_2A_FDD_t *)dci_pdu)->mcs1 = rel8->mcs_1; - ((DCI2_1_5MHz_2A_FDD_t *)dci_pdu)->mcs2 = rel8->mcs_2; - ((DCI2_1_5MHz_2A_FDD_t *)dci_pdu)->ndi1 = rel8->new_data_indicator_1; - ((DCI2_1_5MHz_2A_FDD_t *)dci_pdu)->ndi2 = rel8->new_data_indicator_2; - ((DCI2_1_5MHz_2A_FDD_t *)dci_pdu)->rballoc = rel8->resource_block_coding; - ((DCI2_1_5MHz_2A_FDD_t *)dci_pdu)->rv1 = rel8->redundancy_version_1; - ((DCI2_1_5MHz_2A_FDD_t *)dci_pdu)->rv2 = rel8->redundancy_version_2; - ((DCI2_1_5MHz_2A_FDD_t *)dci_pdu)->TPC = rel8->tpc; - ((DCI2_1_5MHz_2A_FDD_t *)dci_pdu)->harq_pid = rel8->harq_process; - ((DCI2_1_5MHz_2A_FDD_t *)dci_pdu)->tb_swap = rel8->transport_block_to_codeword_swap_flag; - ((DCI2_1_5MHz_2A_FDD_t *)dci_pdu)->tpmi = rel8->precoding_information; + dci_alloc->dci_length = sizeof_DCI2_1_5MHz_2A_FDD_t; + ((DCI2_1_5MHz_2A_FDD_t *) dci_pdu)->mcs1 = rel8->mcs_1; + ((DCI2_1_5MHz_2A_FDD_t *) dci_pdu)->mcs2 = rel8->mcs_2; + ((DCI2_1_5MHz_2A_FDD_t *) dci_pdu)->ndi1 = rel8->new_data_indicator_1; + ((DCI2_1_5MHz_2A_FDD_t *) dci_pdu)->ndi2 = rel8->new_data_indicator_2; + ((DCI2_1_5MHz_2A_FDD_t *) dci_pdu)->rballoc = rel8->resource_block_coding; + ((DCI2_1_5MHz_2A_FDD_t *) dci_pdu)->rv1 = rel8->redundancy_version_1; + ((DCI2_1_5MHz_2A_FDD_t *) dci_pdu)->rv2 = rel8->redundancy_version_2; + ((DCI2_1_5MHz_2A_FDD_t *) dci_pdu)->TPC = rel8->tpc; + ((DCI2_1_5MHz_2A_FDD_t *) dci_pdu)->harq_pid = rel8->harq_process; + ((DCI2_1_5MHz_2A_FDD_t *) dci_pdu)->tb_swap = rel8->transport_block_to_codeword_swap_flag; + ((DCI2_1_5MHz_2A_FDD_t *) dci_pdu)->tpmi = rel8->precoding_information; // printf("FDD 1: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB); } break; case 25: if (fp->frame_type == TDD) { - dci_alloc->dci_length = sizeof_DCI2_5MHz_2A_TDD_t; - ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->rah = rel8->resource_allocation_type; - ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->mcs1 = rel8->mcs_1; - ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->mcs2 = rel8->mcs_2; - ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->ndi1 = rel8->new_data_indicator_1; - ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->ndi2 = rel8->new_data_indicator_2; - ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->rballoc = rel8->resource_block_coding; - ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->rv1 = rel8->redundancy_version_1; - ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->rv2 = rel8->redundancy_version_2; - ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->TPC = rel8->tpc; - ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->harq_pid = rel8->harq_process; - ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->tb_swap = rel8->transport_block_to_codeword_swap_flag; - ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->dai = rel8->downlink_assignment_index; - ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->tpmi = rel8->precoding_information; + dci_alloc->dci_length = sizeof_DCI2_5MHz_2A_TDD_t; + ((DCI2_5MHz_2A_TDD_t *) dci_pdu)->rah = rel8->resource_allocation_type; + ((DCI2_5MHz_2A_TDD_t *) dci_pdu)->mcs1 = rel8->mcs_1; + ((DCI2_5MHz_2A_TDD_t *) dci_pdu)->mcs2 = rel8->mcs_2; + ((DCI2_5MHz_2A_TDD_t *) dci_pdu)->ndi1 = rel8->new_data_indicator_1; + ((DCI2_5MHz_2A_TDD_t *) dci_pdu)->ndi2 = rel8->new_data_indicator_2; + ((DCI2_5MHz_2A_TDD_t *) dci_pdu)->rballoc = rel8->resource_block_coding; + ((DCI2_5MHz_2A_TDD_t *) dci_pdu)->rv1 = rel8->redundancy_version_1; + ((DCI2_5MHz_2A_TDD_t *) dci_pdu)->rv2 = rel8->redundancy_version_2; + ((DCI2_5MHz_2A_TDD_t *) dci_pdu)->TPC = rel8->tpc; + ((DCI2_5MHz_2A_TDD_t *) dci_pdu)->harq_pid = rel8->harq_process; + ((DCI2_5MHz_2A_TDD_t *) dci_pdu)->tb_swap = rel8->transport_block_to_codeword_swap_flag; + ((DCI2_5MHz_2A_TDD_t *) dci_pdu)->dai = rel8->downlink_assignment_index; + ((DCI2_5MHz_2A_TDD_t *) dci_pdu)->tpmi = rel8->precoding_information; // printf("TDD 1: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB); } else { - dci_alloc->dci_length = sizeof_DCI2_5MHz_2A_FDD_t; - ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->rah = rel8->resource_allocation_type; - ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->mcs1 = rel8->mcs_1; - ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->mcs2 = rel8->mcs_2; - ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->ndi1 = rel8->new_data_indicator_1; - ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->ndi2 = rel8->new_data_indicator_2; - ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->rballoc = rel8->resource_block_coding; - ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->rv1 = rel8->redundancy_version_1; - ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->rv2 = rel8->redundancy_version_2; - ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->TPC = rel8->tpc; - ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->harq_pid = rel8->harq_process; - ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->tb_swap = rel8->transport_block_to_codeword_swap_flag; - ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->tpmi = rel8->precoding_information; + dci_alloc->dci_length = sizeof_DCI2_5MHz_2A_FDD_t; + ((DCI2_5MHz_2A_FDD_t *) dci_pdu)->rah = rel8->resource_allocation_type; + ((DCI2_5MHz_2A_FDD_t *) dci_pdu)->mcs1 = rel8->mcs_1; + ((DCI2_5MHz_2A_FDD_t *) dci_pdu)->mcs2 = rel8->mcs_2; + ((DCI2_5MHz_2A_FDD_t *) dci_pdu)->ndi1 = rel8->new_data_indicator_1; + ((DCI2_5MHz_2A_FDD_t *) dci_pdu)->ndi2 = rel8->new_data_indicator_2; + ((DCI2_5MHz_2A_FDD_t *) dci_pdu)->rballoc = rel8->resource_block_coding; + ((DCI2_5MHz_2A_FDD_t *) dci_pdu)->rv1 = rel8->redundancy_version_1; + ((DCI2_5MHz_2A_FDD_t *) dci_pdu)->rv2 = rel8->redundancy_version_2; + ((DCI2_5MHz_2A_FDD_t *) dci_pdu)->TPC = rel8->tpc; + ((DCI2_5MHz_2A_FDD_t *) dci_pdu)->harq_pid = rel8->harq_process; + ((DCI2_5MHz_2A_FDD_t *) dci_pdu)->tb_swap = rel8->transport_block_to_codeword_swap_flag; + ((DCI2_5MHz_2A_FDD_t *) dci_pdu)->tpmi = rel8->precoding_information; // printf("FDD 1: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB); } break; case 50: if (fp->frame_type == TDD) { - dci_alloc->dci_length = sizeof_DCI2_10MHz_2A_TDD_t; - ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->rah = rel8->resource_allocation_type; - ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->mcs1 = rel8->mcs_1; - ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->mcs2 = rel8->mcs_2; - ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->ndi1 = rel8->new_data_indicator_1; - ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->ndi2 = rel8->new_data_indicator_2; - ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->rballoc = rel8->resource_block_coding; - ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->rv1 = rel8->redundancy_version_1; - ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->rv2 = rel8->redundancy_version_2; - ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->TPC = rel8->tpc; - ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->harq_pid = rel8->harq_process; - ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->tb_swap = rel8->transport_block_to_codeword_swap_flag; - ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->dai = rel8->downlink_assignment_index; - ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->tpmi = rel8->precoding_information; + dci_alloc->dci_length = sizeof_DCI2_10MHz_2A_TDD_t; + ((DCI2_10MHz_2A_TDD_t *) dci_pdu)->rah = rel8->resource_allocation_type; + ((DCI2_10MHz_2A_TDD_t *) dci_pdu)->mcs1 = rel8->mcs_1; + ((DCI2_10MHz_2A_TDD_t *) dci_pdu)->mcs2 = rel8->mcs_2; + ((DCI2_10MHz_2A_TDD_t *) dci_pdu)->ndi1 = rel8->new_data_indicator_1; + ((DCI2_10MHz_2A_TDD_t *) dci_pdu)->ndi2 = rel8->new_data_indicator_2; + ((DCI2_10MHz_2A_TDD_t *) dci_pdu)->rballoc = rel8->resource_block_coding; + ((DCI2_10MHz_2A_TDD_t *) dci_pdu)->rv1 = rel8->redundancy_version_1; + ((DCI2_10MHz_2A_TDD_t *) dci_pdu)->rv2 = rel8->redundancy_version_2; + ((DCI2_10MHz_2A_TDD_t *) dci_pdu)->TPC = rel8->tpc; + ((DCI2_10MHz_2A_TDD_t *) dci_pdu)->harq_pid = rel8->harq_process; + ((DCI2_10MHz_2A_TDD_t *) dci_pdu)->tb_swap = rel8->transport_block_to_codeword_swap_flag; + ((DCI2_10MHz_2A_TDD_t *) dci_pdu)->dai = rel8->downlink_assignment_index; + ((DCI2_10MHz_2A_TDD_t *) dci_pdu)->tpmi = rel8->precoding_information; // printf("TDD 1: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB); } else { - dci_alloc->dci_length = sizeof_DCI2_10MHz_2A_FDD_t; - ((DCI2_10MHz_2A_FDD_t *)dci_pdu)->rah = rel8->resource_allocation_type; - ((DCI2_10MHz_2A_FDD_t *)dci_pdu)->mcs1 = rel8->mcs_1; - ((DCI2_10MHz_2A_FDD_t *)dci_pdu)->mcs2 = rel8->mcs_2; - ((DCI2_10MHz_2A_FDD_t *)dci_pdu)->ndi1 = rel8->new_data_indicator_1; - ((DCI2_10MHz_2A_FDD_t *)dci_pdu)->ndi2 = rel8->new_data_indicator_2; - ((DCI2_10MHz_2A_FDD_t *)dci_pdu)->rballoc = rel8->resource_block_coding; - ((DCI2_10MHz_2A_FDD_t *)dci_pdu)->rv1 = rel8->redundancy_version_1; - ((DCI2_10MHz_2A_FDD_t *)dci_pdu)->rv2 = rel8->redundancy_version_2; - ((DCI2_10MHz_2A_FDD_t *)dci_pdu)->TPC = rel8->tpc; - ((DCI2_10MHz_2A_FDD_t *)dci_pdu)->harq_pid = rel8->harq_process; - ((DCI2_10MHz_2A_FDD_t *)dci_pdu)->tb_swap = rel8->transport_block_to_codeword_swap_flag; - ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->tpmi = rel8->precoding_information; + dci_alloc->dci_length = sizeof_DCI2_10MHz_2A_FDD_t; + ((DCI2_10MHz_2A_FDD_t *) dci_pdu)->rah = rel8->resource_allocation_type; + ((DCI2_10MHz_2A_FDD_t *) dci_pdu)->mcs1 = rel8->mcs_1; + ((DCI2_10MHz_2A_FDD_t *) dci_pdu)->mcs2 = rel8->mcs_2; + ((DCI2_10MHz_2A_FDD_t *) dci_pdu)->ndi1 = rel8->new_data_indicator_1; + ((DCI2_10MHz_2A_FDD_t *) dci_pdu)->ndi2 = rel8->new_data_indicator_2; + ((DCI2_10MHz_2A_FDD_t *) dci_pdu)->rballoc = rel8->resource_block_coding; + ((DCI2_10MHz_2A_FDD_t *) dci_pdu)->rv1 = rel8->redundancy_version_1; + ((DCI2_10MHz_2A_FDD_t *) dci_pdu)->rv2 = rel8->redundancy_version_2; + ((DCI2_10MHz_2A_FDD_t *) dci_pdu)->TPC = rel8->tpc; + ((DCI2_10MHz_2A_FDD_t *) dci_pdu)->harq_pid = rel8->harq_process; + ((DCI2_10MHz_2A_FDD_t *) dci_pdu)->tb_swap = rel8->transport_block_to_codeword_swap_flag; + ((DCI2_10MHz_2A_TDD_t *) dci_pdu)->tpmi = rel8->precoding_information; } break; case 100: if (fp->frame_type == TDD) { - dci_alloc->dci_length = sizeof_DCI2_20MHz_2A_TDD_t; - ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->rah = rel8->resource_allocation_type; - ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->mcs1 = rel8->mcs_1; - ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->mcs2 = rel8->mcs_2; - ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->ndi1 = rel8->new_data_indicator_1; - ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->ndi2 = rel8->new_data_indicator_2; - ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->rballoc = rel8->resource_block_coding; - ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->rv1 = rel8->redundancy_version_1; - ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->rv2 = rel8->redundancy_version_2; - ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->TPC = rel8->tpc; - ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->harq_pid = rel8->harq_process; - ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->tb_swap = rel8->transport_block_to_codeword_swap_flag; - ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->dai = rel8->downlink_assignment_index; - ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->tpmi = rel8->precoding_information; + dci_alloc->dci_length = sizeof_DCI2_20MHz_2A_TDD_t; + ((DCI2_20MHz_2A_TDD_t *) dci_pdu)->rah = rel8->resource_allocation_type; + ((DCI2_20MHz_2A_TDD_t *) dci_pdu)->mcs1 = rel8->mcs_1; + ((DCI2_20MHz_2A_TDD_t *) dci_pdu)->mcs2 = rel8->mcs_2; + ((DCI2_20MHz_2A_TDD_t *) dci_pdu)->ndi1 = rel8->new_data_indicator_1; + ((DCI2_20MHz_2A_TDD_t *) dci_pdu)->ndi2 = rel8->new_data_indicator_2; + ((DCI2_20MHz_2A_TDD_t *) dci_pdu)->rballoc = rel8->resource_block_coding; + ((DCI2_20MHz_2A_TDD_t *) dci_pdu)->rv1 = rel8->redundancy_version_1; + ((DCI2_20MHz_2A_TDD_t *) dci_pdu)->rv2 = rel8->redundancy_version_2; + ((DCI2_20MHz_2A_TDD_t *) dci_pdu)->TPC = rel8->tpc; + ((DCI2_20MHz_2A_TDD_t *) dci_pdu)->harq_pid = rel8->harq_process; + ((DCI2_20MHz_2A_TDD_t *) dci_pdu)->tb_swap = rel8->transport_block_to_codeword_swap_flag; + ((DCI2_20MHz_2A_TDD_t *) dci_pdu)->dai = rel8->downlink_assignment_index; + ((DCI2_20MHz_2A_TDD_t *) dci_pdu)->tpmi = rel8->precoding_information; // printf("TDD 1: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB); } else { - dci_alloc->dci_length = sizeof_DCI2_20MHz_2A_FDD_t; - ((DCI2_20MHz_2A_FDD_t *)dci_pdu)->rah = rel8->resource_allocation_type; - ((DCI2_20MHz_2A_FDD_t *)dci_pdu)->mcs1 = rel8->mcs_1; - ((DCI2_20MHz_2A_FDD_t *)dci_pdu)->mcs2 = rel8->mcs_2; - ((DCI2_20MHz_2A_FDD_t *)dci_pdu)->ndi1 = rel8->new_data_indicator_1; - ((DCI2_20MHz_2A_FDD_t *)dci_pdu)->ndi2 = rel8->new_data_indicator_2; - ((DCI2_20MHz_2A_FDD_t *)dci_pdu)->rballoc = rel8->resource_block_coding; - ((DCI2_20MHz_2A_FDD_t *)dci_pdu)->rv1 = rel8->redundancy_version_1; - ((DCI2_20MHz_2A_FDD_t *)dci_pdu)->rv2 = rel8->redundancy_version_2; - ((DCI2_20MHz_2A_FDD_t *)dci_pdu)->TPC = rel8->tpc; - ((DCI2_20MHz_2A_FDD_t *)dci_pdu)->harq_pid = rel8->harq_process; - ((DCI2_20MHz_2A_FDD_t *)dci_pdu)->tb_swap = rel8->transport_block_to_codeword_swap_flag; - ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->tpmi = rel8->precoding_information; + dci_alloc->dci_length = sizeof_DCI2_20MHz_2A_FDD_t; + ((DCI2_20MHz_2A_FDD_t *) dci_pdu)->rah = rel8->resource_allocation_type; + ((DCI2_20MHz_2A_FDD_t *) dci_pdu)->mcs1 = rel8->mcs_1; + ((DCI2_20MHz_2A_FDD_t *) dci_pdu)->mcs2 = rel8->mcs_2; + ((DCI2_20MHz_2A_FDD_t *) dci_pdu)->ndi1 = rel8->new_data_indicator_1; + ((DCI2_20MHz_2A_FDD_t *) dci_pdu)->ndi2 = rel8->new_data_indicator_2; + ((DCI2_20MHz_2A_FDD_t *) dci_pdu)->rballoc = rel8->resource_block_coding; + ((DCI2_20MHz_2A_FDD_t *) dci_pdu)->rv1 = rel8->redundancy_version_1; + ((DCI2_20MHz_2A_FDD_t *) dci_pdu)->rv2 = rel8->redundancy_version_2; + ((DCI2_20MHz_2A_FDD_t *) dci_pdu)->TPC = rel8->tpc; + ((DCI2_20MHz_2A_FDD_t *) dci_pdu)->harq_pid = rel8->harq_process; + ((DCI2_20MHz_2A_FDD_t *) dci_pdu)->tb_swap = rel8->transport_block_to_codeword_swap_flag; + ((DCI2_20MHz_2A_TDD_t *) dci_pdu)->tpmi = rel8->precoding_information; } break; } - AssertFatal(rel8->harq_process>=8, "Format 2_2A: harq_pid=%d >= 8\n", rel8->harq_process); + AssertFatal (rel8->harq_process >= 8, "Format 2_2A: harq_pid=%d >= 8\n", rel8->harq_process); // Flip the TB to codeword mapping as described in 5.3.3.1.5 of 36-212 V11.3.0 @@ -1857,235 +1866,224 @@ LOG_D(PHY,"NFAPI: harq_pid %d harq_mask %x, round %d ndi (%d,%d) rnti type %d\n" TB1_active = 1; if ((rel8->redundancy_version_1 == 1) && (rel8->mcs_1 == 0)) { - TB0_active=0; + TB0_active = 0; } if ((rel8->redundancy_version_2 == 1) && (rel8->mcs_2 == 0)) { - TB1_active=0; + TB1_active = 0; } #ifdef DEBUG_HARQ - printf("RV0 = %d, RV1 = %d. MCS0 = %d, MCS1=%d\n", rel8->redundancy_version_1, rel8->redundancy_version_2, rel8->mcs_1, rel8->mcs_2); + printf ("RV0 = %d, RV1 = %d. MCS0 = %d, MCS1=%d\n", rel8->redundancy_version_1, rel8->redundancy_version_2, rel8->mcs_1, rel8->mcs_2); #endif - if (TB0_active && TB1_active && rel8->transport_block_to_codeword_swap_flag==0) { + if (TB0_active && TB1_active && rel8->transport_block_to_codeword_swap_flag == 0) { dlsch0->active = 1; dlsch1->active = 1; - dlsch0->harq_mask |= (1<harq_process); - dlsch1->harq_mask |= (1<harq_process); + dlsch0->harq_mask |= (1 << rel8->harq_process); + dlsch1->harq_mask |= (1 << rel8->harq_process); dlsch0_harq = dlsch0->harq_processes[rel8->harq_process]; dlsch1_harq = dlsch1->harq_processes[rel8->harq_process]; dlsch0_harq->mcs = rel8->mcs_1; dlsch1_harq->mcs = rel8->mcs_2; - dlsch0_harq->Qm = get_Qm(rel8->mcs_1); - dlsch1_harq->Qm = get_Qm(rel8->mcs_2); + dlsch0_harq->Qm = get_Qm (rel8->mcs_1); + dlsch1_harq->Qm = get_Qm (rel8->mcs_2); dlsch0_harq->rvidx = rel8->redundancy_version_1; dlsch1_harq->rvidx = rel8->redundancy_version_2; dlsch0_harq->status = ACTIVE; dlsch1_harq->status = ACTIVE; - dlsch0_harq->codeword=0; - dlsch1_harq->codeword=1; + dlsch0_harq->codeword = 0; + dlsch1_harq->codeword = 1; #ifdef DEBUG_HARQ - printf("\n ENB: BOTH ACTIVE\n"); + printf ("\n ENB: BOTH ACTIVE\n"); #endif - } - else if (TB0_active && TB1_active && rel8->transport_block_to_codeword_swap_flag==1) { + } else if (TB0_active && TB1_active && rel8->transport_block_to_codeword_swap_flag == 1) { dlsch0 = eNB->dlsch[UE_id][1]; dlsch1 = eNB->dlsch[UE_id][0]; dlsch0->active = 1; dlsch1->active = 1; - dlsch0->harq_mask |= (1<harq_process); - dlsch1->harq_mask |= (1<harq_process); + dlsch0->harq_mask |= (1 << rel8->harq_process); + dlsch1->harq_mask |= (1 << rel8->harq_process); dlsch1_harq = dlsch1->harq_processes[rel8->harq_process]; dlsch0_harq->mcs = rel8->mcs_1; dlsch1_harq->mcs = rel8->mcs_2; - dlsch0_harq->Qm = get_Qm(rel8->mcs_1); - dlsch1_harq->Qm = get_Qm(rel8->mcs_2); + dlsch0_harq->Qm = get_Qm (rel8->mcs_1); + dlsch1_harq->Qm = get_Qm (rel8->mcs_2); dlsch0_harq->rvidx = rel8->redundancy_version_1; dlsch1_harq->rvidx = rel8->redundancy_version_2; dlsch0_harq->status = ACTIVE; dlsch1_harq->status = ACTIVE; - dlsch0_harq->codeword=1; - dlsch1_harq->codeword=0; - } - else if (TB0_active && (TB1_active==0)) { + dlsch0_harq->codeword = 1; + dlsch1_harq->codeword = 0; + } else if (TB0_active && (TB1_active == 0)) { dlsch0->active = 1; - dlsch0->harq_mask |= (1<harq_process); + dlsch0->harq_mask |= (1 << rel8->harq_process); dlsch0_harq = dlsch0->harq_processes[rel8->harq_process]; dlsch0_harq->mcs = rel8->mcs_1; - dlsch0_harq->Qm = get_Qm(rel8->mcs_1); + dlsch0_harq->Qm = get_Qm (rel8->mcs_1); dlsch0_harq->rvidx = rel8->redundancy_version_1; dlsch0_harq->status = ACTIVE; dlsch0_harq->codeword = 0; - dlsch1=NULL; + dlsch1 = NULL; dlsch1_harq = NULL; #ifdef DEBUG_HARQ - printf("\n ENB: TB1 is deactivated, retransmit TB0 transmit in TM6\n"); + printf ("\n ENB: TB1 is deactivated, retransmit TB0 transmit in TM6\n"); #endif - } - else if ((TB0_active==0) && TB1_active) { + } else if ((TB0_active == 0) && TB1_active) { dlsch1->active = 1; - dlsch1->harq_mask |= (1<harq_process); + dlsch1->harq_mask |= (1 << rel8->harq_process); dlsch1_harq = dlsch1->harq_processes[rel8->harq_process]; dlsch1_harq->mcs = rel8->mcs_2; - dlsch1_harq->Qm = get_Qm(rel8->mcs_2); + dlsch1_harq->Qm = get_Qm (rel8->mcs_2); dlsch1_harq->rvidx = rel8->redundancy_version_2; dlsch1_harq->status = ACTIVE; dlsch1_harq->codeword = 0; - dlsch0=NULL; + dlsch0 = NULL; dlsch0_harq = NULL; #ifdef DEBUG_HARQ - printf("\n ENB: TB0 is deactivated, retransmit TB1 transmit in TM6\n"); + printf ("\n ENB: TB0 is deactivated, retransmit TB1 transmit in TM6\n"); #endif } - if (dlsch0 != NULL){ + if (dlsch0 != NULL) { dlsch0->subframe_tx[subframe] = 1; dlsch0->harq_ids[subframe] = rel8->harq_process; } - if (dlsch1_harq != NULL){ + if (dlsch1_harq != NULL) { dlsch1->harq_ids[subframe] = rel8->harq_process; } - if (dlsch0 != NULL ){ - conv_rballoc(rel8->resource_allocation_type, - rel8->resource_block_coding, - fp->N_RB_DL, - dlsch0_harq->rb_alloc); + if (dlsch0 != NULL) { + conv_rballoc (rel8->resource_allocation_type, rel8->resource_block_coding, fp->N_RB_DL, dlsch0_harq->rb_alloc); - dlsch0_harq->nb_rb = conv_nprb(rel8->resource_allocation_type, rel8->resource_block_coding, fp->N_RB_DL); + dlsch0_harq->nb_rb = conv_nprb (rel8->resource_allocation_type, rel8->resource_block_coding, fp->N_RB_DL); - if (dlsch1 != NULL){ + if (dlsch1 != NULL) { dlsch1_harq->rb_alloc[0] = dlsch0_harq->rb_alloc[0]; dlsch1_harq->nb_rb = dlsch0_harq->nb_rb; } - } else if ((dlsch0 == NULL ) && (dlsch1 != NULL )){ - conv_rballoc(rel8->resource_allocation_type, - rel8->resource_block_coding, - fp->N_RB_DL, - dlsch1_harq->rb_alloc); + } else if ((dlsch0 == NULL) && (dlsch1 != NULL)) { + conv_rballoc (rel8->resource_allocation_type, rel8->resource_block_coding, fp->N_RB_DL, dlsch1_harq->rb_alloc); - dlsch1_harq->nb_rb = conv_nprb(rel8->resource_allocation_type, rel8->resource_block_coding, fp->N_RB_DL); + dlsch1_harq->nb_rb = conv_nprb (rel8->resource_allocation_type, rel8->resource_block_coding, fp->N_RB_DL); } - // assume both TBs are active if (dlsch0_harq != NULL) - dlsch0_harq->Nl = 1; + dlsch0_harq->Nl = 1; if (dlsch1_harq != NULL) - dlsch1_harq->Nl = 1; + dlsch1_harq->Nl = 1; // check if either TB is disabled (see 36-213 V11.3 Section ) if (fp->nb_antenna_ports_eNB == 2) { - if ((dlsch0 != NULL) && (dlsch1 != NULL)) { //two CW active + if ((dlsch0 != NULL) && (dlsch1 != NULL)) { //two CW active dlsch0_harq->dl_power_off = 1; dlsch1_harq->dl_power_off = 1; - dlsch0_harq->TBS = TBStable[get_I_TBS(dlsch0_harq->mcs)][dlsch0_harq->nb_rb-1]; - dlsch1_harq->TBS = TBStable[get_I_TBS(dlsch1_harq->mcs)][dlsch1_harq->nb_rb-1]; + dlsch0_harq->TBS = TBStable[get_I_TBS (dlsch0_harq->mcs)][dlsch0_harq->nb_rb - 1]; + dlsch1_harq->TBS = TBStable[get_I_TBS (dlsch1_harq->mcs)][dlsch1_harq->nb_rb - 1]; switch (rel8->precoding_information) { case 0: - dlsch0_harq->mimo_mode = DUALSTREAM_UNIFORM_PRECODING1; - dlsch1_harq->mimo_mode = DUALSTREAM_UNIFORM_PRECODING1; - dlsch0_harq->pmi_alloc = pmi_extend(fp,0,1); - dlsch1_harq->pmi_alloc = pmi_extend(fp,0,1); + dlsch0_harq->mimo_mode = DUALSTREAM_UNIFORM_PRECODING1; + dlsch1_harq->mimo_mode = DUALSTREAM_UNIFORM_PRECODING1; + dlsch0_harq->pmi_alloc = pmi_extend (fp, 0, 1); + dlsch1_harq->pmi_alloc = pmi_extend (fp, 0, 1); break; case 1: - dlsch0_harq->mimo_mode = DUALSTREAM_UNIFORM_PRECODINGj; - dlsch1_harq->mimo_mode = DUALSTREAM_UNIFORM_PRECODINGj; - dlsch0_harq->pmi_alloc = pmi_extend(fp,1,1); - dlsch0_harq->pmi_alloc = pmi_extend(fp,1,1); + dlsch0_harq->mimo_mode = DUALSTREAM_UNIFORM_PRECODINGj; + dlsch1_harq->mimo_mode = DUALSTREAM_UNIFORM_PRECODINGj; + dlsch0_harq->pmi_alloc = pmi_extend (fp, 1, 1); + dlsch0_harq->pmi_alloc = pmi_extend (fp, 1, 1); break; - case 2: // PUSCH precoding - dlsch0_harq->mimo_mode = DUALSTREAM_PUSCH_PRECODING; - dlsch0_harq->pmi_alloc = DL_pmi_single; - dlsch1_harq->mimo_mode = DUALSTREAM_PUSCH_PRECODING; - dlsch1_harq->pmi_alloc = DL_pmi_single; + case 2: // PUSCH precoding + dlsch0_harq->mimo_mode = DUALSTREAM_PUSCH_PRECODING; + dlsch0_harq->pmi_alloc = DL_pmi_single; + dlsch1_harq->mimo_mode = DUALSTREAM_PUSCH_PRECODING; + dlsch1_harq->pmi_alloc = DL_pmi_single; break; default: break; } - } else if ((dlsch0 != NULL) && (dlsch1 == NULL)) { // only CW 0 active + } else if ((dlsch0 != NULL) && (dlsch1 == NULL)) { // only CW 0 active dlsch0_harq->dl_power_off = 1; - dlsch0_harq->TBS= TBStable[get_I_TBS(dlsch0_harq->mcs)][dlsch0_harq->nb_rb-1]; + dlsch0_harq->TBS = TBStable[get_I_TBS (dlsch0_harq->mcs)][dlsch0_harq->nb_rb - 1]; switch (rel8->precoding_information) { - case 0 : - dlsch0_harq->mimo_mode = ALAMOUTI; + case 0: + dlsch0_harq->mimo_mode = ALAMOUTI; break; case 1: - dlsch0_harq->mimo_mode = UNIFORM_PRECODING11; - dlsch0_harq->pmi_alloc = pmi_extend(fp,0,0); + dlsch0_harq->mimo_mode = UNIFORM_PRECODING11; + dlsch0_harq->pmi_alloc = pmi_extend (fp, 0, 0); break; case 2: - dlsch0_harq->mimo_mode = UNIFORM_PRECODING1m1; - dlsch0_harq->pmi_alloc = pmi_extend(fp,1,0); + dlsch0_harq->mimo_mode = UNIFORM_PRECODING1m1; + dlsch0_harq->pmi_alloc = pmi_extend (fp, 1, 0); break; case 3: - dlsch0_harq->mimo_mode = UNIFORM_PRECODING1j; - dlsch0_harq->pmi_alloc = pmi_extend(fp,2,0); + dlsch0_harq->mimo_mode = UNIFORM_PRECODING1j; + dlsch0_harq->pmi_alloc = pmi_extend (fp, 2, 0); break; case 4: - dlsch0_harq->mimo_mode = UNIFORM_PRECODING1mj; - dlsch0_harq->pmi_alloc = pmi_extend(fp,3,0); + dlsch0_harq->mimo_mode = UNIFORM_PRECODING1mj; + dlsch0_harq->pmi_alloc = pmi_extend (fp, 3, 0); break; case 5: - dlsch0_harq->mimo_mode = PUSCH_PRECODING0; - dlsch0_harq->pmi_alloc = DL_pmi_single; + dlsch0_harq->mimo_mode = PUSCH_PRECODING0; + dlsch0_harq->pmi_alloc = DL_pmi_single; break; case 6: - dlsch0_harq->mimo_mode = PUSCH_PRECODING1; - dlsch0_harq->pmi_alloc = DL_pmi_single; + dlsch0_harq->mimo_mode = PUSCH_PRECODING1; + dlsch0_harq->pmi_alloc = DL_pmi_single; break; } - } else if ((dlsch0 == NULL) && (dlsch1 != NULL)) { - dlsch1_harq->dl_power_off = 1; - dlsch1_harq->TBS= TBStable[get_I_TBS(dlsch1_harq->mcs)][dlsch1_harq->nb_rb-1]; - switch (rel8->precoding_information) { - case 0 : - dlsch1_harq->mimo_mode = ALAMOUTI; - break; - case 1: - dlsch1_harq->mimo_mode = UNIFORM_PRECODING11; - dlsch1_harq->pmi_alloc = pmi_extend(fp,0,0); - break; - case 2: - dlsch1_harq->mimo_mode = UNIFORM_PRECODING1m1; - dlsch1_harq->pmi_alloc = pmi_extend(fp,1,0); - break; - case 3: - dlsch1_harq->mimo_mode = UNIFORM_PRECODING1j; - dlsch1_harq->pmi_alloc = pmi_extend(fp,2,0); - break; - case 4: - dlsch1_harq->mimo_mode = UNIFORM_PRECODING1mj; - dlsch1_harq->pmi_alloc = pmi_extend(fp,3,0); - break; - case 5: - dlsch1_harq->mimo_mode = PUSCH_PRECODING0; - dlsch1_harq->pmi_alloc = DL_pmi_single; - break; - case 6: - dlsch1_harq->mimo_mode = PUSCH_PRECODING1; - dlsch1_harq->pmi_alloc = DL_pmi_single; - break; - } + } else if ((dlsch0 == NULL) && (dlsch1 != NULL)) { + dlsch1_harq->dl_power_off = 1; + dlsch1_harq->TBS = TBStable[get_I_TBS (dlsch1_harq->mcs)][dlsch1_harq->nb_rb - 1]; + switch (rel8->precoding_information) { + case 0: + dlsch1_harq->mimo_mode = ALAMOUTI; + break; + case 1: + dlsch1_harq->mimo_mode = UNIFORM_PRECODING11; + dlsch1_harq->pmi_alloc = pmi_extend (fp, 0, 0); + break; + case 2: + dlsch1_harq->mimo_mode = UNIFORM_PRECODING1m1; + dlsch1_harq->pmi_alloc = pmi_extend (fp, 1, 0); + break; + case 3: + dlsch1_harq->mimo_mode = UNIFORM_PRECODING1j; + dlsch1_harq->pmi_alloc = pmi_extend (fp, 2, 0); + break; + case 4: + dlsch1_harq->mimo_mode = UNIFORM_PRECODING1mj; + dlsch1_harq->pmi_alloc = pmi_extend (fp, 3, 0); + break; + case 5: + dlsch1_harq->mimo_mode = PUSCH_PRECODING0; + dlsch1_harq->pmi_alloc = DL_pmi_single; + break; + case 6: + dlsch1_harq->mimo_mode = PUSCH_PRECODING1; + dlsch1_harq->pmi_alloc = DL_pmi_single; + break; } + } } else if (fp->nb_antenna_ports_eNB == 4) { // fill in later } - // reset HARQ process if this is the first transmission - /* if (dlsch0_harq->round == 0) - dlsch0_harq->status = ACTIVE; + /* if (dlsch0_harq->round == 0) + dlsch0_harq->status = ACTIVE; - if (dlsch1_harq->round == 0) - dlsch1_harq->status = ACTIVE;*/ + if (dlsch1_harq->round == 0) + dlsch1_harq->status = ACTIVE; */ if (dlsch0_harq != NULL) dlsch0->rnti = rel8->rnti; if (dlsch1 != NULL) @@ -2095,285 +2093,281 @@ LOG_D(PHY,"NFAPI: harq_pid %d harq_mask %x, round %d ndi (%d,%d) rnti type %d\n" } if (dlsch0_harq) { - dlsch0_harq->frame = proc->frame_tx; + dlsch0_harq->frame = proc->frame_tx; dlsch0_harq->subframe = subframe; } if (dlsch1_harq) { - dlsch1_harq->frame = proc->frame_tx; + dlsch1_harq->frame = proc->frame_tx; dlsch1_harq->subframe = subframe; } - #ifdef DEBUG_DCI if (dlsch0) { - printf("dlsch0 eNB: dlsch0 %p\n",dlsch0); - printf("dlsch0 eNB: rnti %x\n",dlsch0->rnti); - printf("dlsch0 eNB: NBRB %d\n",dlsch0_harq->nb_rb); - printf("dlsch0 eNB: rballoc %x\n",dlsch0_harq->rb_alloc[0]); - printf("dlsch0 eNB: harq_pid %d\n",harq_pid); - printf("dlsch0 eNB: round %d\n",dlsch0_harq->round); - printf("dlsch0 eNB: rvidx %d\n",dlsch0_harq->rvidx); - printf("dlsch0 eNB: TBS %d (NPRB %d)\n",dlsch0_harq->TBS,NPRB); - printf("dlsch0 eNB: mcs %d\n",dlsch0_harq->mcs); - printf("dlsch0 eNB: tpmi %d\n",rel8->precoding_information); - printf("dlsch0 eNB: mimo_mode %d\n",dlsch0_harq->mimo_mode); + printf ("dlsch0 eNB: dlsch0 %p\n", dlsch0); + printf ("dlsch0 eNB: rnti %x\n", dlsch0->rnti); + printf ("dlsch0 eNB: NBRB %d\n", dlsch0_harq->nb_rb); + printf ("dlsch0 eNB: rballoc %x\n", dlsch0_harq->rb_alloc[0]); + printf ("dlsch0 eNB: harq_pid %d\n", harq_pid); + printf ("dlsch0 eNB: round %d\n", dlsch0_harq->round); + printf ("dlsch0 eNB: rvidx %d\n", dlsch0_harq->rvidx); + printf ("dlsch0 eNB: TBS %d (NPRB %d)\n", dlsch0_harq->TBS, NPRB); + printf ("dlsch0 eNB: mcs %d\n", dlsch0_harq->mcs); + printf ("dlsch0 eNB: tpmi %d\n", rel8->precoding_information); + printf ("dlsch0 eNB: mimo_mode %d\n", dlsch0_harq->mimo_mode); } - if (dlsch1) { - printf("dlsch1 eNB: dlsch1 %p\n",dlsch1); - printf("dlsch1 eNB: rnti %x\n",dlsch1->rnti); - printf("dlsch1 eNB: NBRB %d\n",dlsch1_harq->nb_rb); - printf("dlsch1 eNB: rballoc %x\n",dlsch1_harq->rb_alloc[0]); - printf("dlsch1 eNB: harq_pid %d\n",harq_pid); - printf("dlsch1 eNB: round %d\n",dlsch1_harq->round); - printf("dlsch1 eNB: rvidx %d\n",dlsch1_harq->rvidx); - printf("dlsch1 eNB: TBS %d (NPRB %d)\n",dlsch1_harq->TBS,NPRB); - printf("dlsch1 eNB: mcs %d\n",dlsch1_harq->mcs); - printf("dlsch1 eNB: tpmi %d\n",rel8->precoding_information); - printf("dlsch1 eNB: mimo_mode %d\n",dlsch1_harq->mimo_mode); + if (dlsch1) { + printf ("dlsch1 eNB: dlsch1 %p\n", dlsch1); + printf ("dlsch1 eNB: rnti %x\n", dlsch1->rnti); + printf ("dlsch1 eNB: NBRB %d\n", dlsch1_harq->nb_rb); + printf ("dlsch1 eNB: rballoc %x\n", dlsch1_harq->rb_alloc[0]); + printf ("dlsch1 eNB: harq_pid %d\n", harq_pid); + printf ("dlsch1 eNB: round %d\n", dlsch1_harq->round); + printf ("dlsch1 eNB: rvidx %d\n", dlsch1_harq->rvidx); + printf ("dlsch1 eNB: TBS %d (NPRB %d)\n", dlsch1_harq->TBS, NPRB); + printf ("dlsch1 eNB: mcs %d\n", dlsch1_harq->mcs); + printf ("dlsch1 eNB: tpmi %d\n", rel8->precoding_information); + printf ("dlsch1 eNB: mimo_mode %d\n", dlsch1_harq->mimo_mode); } - #endif - + #if T_TRACER if (dlsch0->active) - T(T_ENB_PHY_DLSCH_UE_DCI, T_INT(0), T_INT(proc->frame_tx), T_INT(proc->subframe_tx), - T_INT(rel8->rnti), T_INT(rel8->dci_format), T_INT(rel8->harq_process), - T_INT(rel8->mcs_1), T_INT(dlsch0_harq->TBS)); + T (T_ENB_PHY_DLSCH_UE_DCI, T_INT (0), T_INT (proc->frame_tx), T_INT (proc->subframe_tx), + T_INT (rel8->rnti), T_INT (rel8->dci_format), T_INT (rel8->harq_process), T_INT (rel8->mcs_1), T_INT (dlsch0_harq->TBS)); #endif } -void fill_mdci_and_dlsch(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,mDCI_ALLOC_t *dci_alloc,nfapi_dl_config_mpdcch_pdu *pdu) { +void +fill_mdci_and_dlsch (PHY_VARS_eNB * eNB, eNB_rxtx_proc_t * proc, mDCI_ALLOC_t * dci_alloc, nfapi_dl_config_mpdcch_pdu * pdu) +{ LTE_DL_FRAME_PARMS *fp = &eNB->frame_parms; - uint8_t *dci_pdu = &dci_alloc->dci_pdu[0]; + uint8_t *dci_pdu = &dci_alloc->dci_pdu[0]; nfapi_dl_config_mpdcch_pdu_rel13_t *rel13 = &pdu->mpdcch_pdu_rel13; - LTE_eNB_DLSCH_t *dlsch0=NULL; - LTE_DL_eNB_HARQ_t *dlsch0_harq=NULL; - int UE_id; - int subframe = proc->subframe_tx; + LTE_eNB_DLSCH_t *dlsch0 = NULL; + LTE_DL_eNB_HARQ_t *dlsch0_harq = NULL; + int UE_id; + int subframe = proc->subframe_tx; + int frame = proc->frame_tx; - dci_alloc->firstCCE = rel13->ecce_index; - dci_alloc->L = rel13->aggregation_level; - dci_alloc->rnti = rel13->rnti; - dci_alloc->harq_pid = rel13->harq_process; - dci_alloc->narrowband = rel13->mpdcch_narrow_band; - dci_alloc->number_of_prb_pairs = rel13->number_of_prb_pairs; - dci_alloc->resource_block_assignment = rel13->resource_block_assignment; - dci_alloc->transmission_type = rel13->mpdcch_tansmission_type; - dci_alloc->start_symbol = rel13->start_symbol; - dci_alloc->ce_mode = rel13->ce_mode; - dci_alloc->dmrs_scrambling_init = rel13->drms_scrambling_init; - dci_alloc->i0 = rel13->initial_transmission_sf_io; + dci_alloc->firstCCE = rel13->ecce_index; + dci_alloc->L = rel13->aggregation_level; + dci_alloc->rnti = rel13->rnti; + dci_alloc->harq_pid = rel13->harq_process; + dci_alloc->narrowband = rel13->mpdcch_narrow_band; + dci_alloc->number_of_prb_pairs = rel13->number_of_prb_pairs; + dci_alloc->resource_block_assignment = rel13->resource_block_assignment; + dci_alloc->transmission_type = rel13->mpdcch_tansmission_type; + dci_alloc->start_symbol = rel13->start_symbol; + dci_alloc->ce_mode = rel13->ce_mode; + dci_alloc->dmrs_scrambling_init = rel13->drms_scrambling_init; + dci_alloc->i0 = rel13->initial_transmission_sf_io; - dci_alloc->ra_flag = 0; - if (rel13->rnti_type == 2 ) dci_alloc->ra_flag = 1; + dci_alloc->ra_flag = 0; + if (rel13->rnti_type == 2) + dci_alloc->ra_flag = 1; - UE_id = find_dlsch(rel13->rnti,eNB,SEARCH_EXIST_OR_FREE); - AssertFatal(UE_id!=-1,"no free or exiting dlsch_context\n"); - AssertFatal(UE_id= %d(NUMBER_OF_UE_MAX)\n",UE_id,NUMBER_OF_UE_MAX); + UE_id = find_dlsch (rel13->rnti, eNB, SEARCH_EXIST_OR_FREE); + AssertFatal (UE_id != -1, "no free or exiting dlsch_context\n"); + AssertFatal (UE_id < NUMBER_OF_UE_MAX, "returned UE_id %d >= %d(NUMBER_OF_UE_MAX)\n", UE_id, NUMBER_OF_UE_MAX); dlsch0 = eNB->dlsch[UE_id][0]; - dlsch0_harq = dlsch0->harq_processes[rel13->harq_process]; + dlsch0_harq = dlsch0->harq_processes[rel13->harq_process]; - AssertFatal(fp->frame_type==FDD,"TDD is not supported yet for eMTC\n"); - AssertFatal(fp->N_RB_DL==25 || fp->N_RB_DL==50 ||fp->N_RB_DL==100, - "eMTC only with N_RB_DL = 25,50,100\n"); + AssertFatal (fp->frame_type == FDD, "TDD is not supported yet for eMTC\n"); + AssertFatal (fp->N_RB_DL == 25 || fp->N_RB_DL == 50 || fp->N_RB_DL == 100, "eMTC only with N_RB_DL = 25,50,100\n"); switch (rel13->dci_format) { - case 10: // Format 6-1A - dci_alloc->format = format6_1A; - dlsch0->active = 1; + case 10: // Format 6-1A + dci_alloc->format = format6_1A; + dlsch0->active = 1; switch (fp->N_RB_DL) { case 25: - dci_alloc->dci_length = sizeof_DCI6_1A_5MHz_t; - ((DCI6_1A_5MHz_t *)dci_pdu)->type = 1; - ((DCI6_1A_5MHz_t *)dci_pdu)->hopping = rel13->frequency_hopping_enabled_flag; - ((DCI6_1A_5MHz_t *)dci_pdu)->rballoc = rel13->resource_block_coding; - ((DCI6_1A_5MHz_t *)dci_pdu)->mcs = rel13->mcs; - ((DCI6_1A_5MHz_t *)dci_pdu)->rep = (rel13->pdsch_reptition_levels-1); - ((DCI6_1A_5MHz_t *)dci_pdu)->harq_pid = rel13->harq_process; - ((DCI6_1A_5MHz_t *)dci_pdu)->ndi = rel13->new_data_indicator; - ((DCI6_1A_5MHz_t *)dci_pdu)->rv = rel13->redundancy_version; - ((DCI6_1A_5MHz_t *)dci_pdu)->TPC = rel13->tpc; - ((DCI6_1A_5MHz_t *)dci_pdu)->srs_req = rel13->srs_request; - ((DCI6_1A_5MHz_t *)dci_pdu)->harq_ack_off = rel13->harq_resource_offset; - ((DCI6_1A_5MHz_t *)dci_pdu)->dci_rep = rel13->dci_subframe_repetition_number-1; - + dci_alloc->dci_length = sizeof_DCI6_1A_5MHz_t; + ((DCI6_1A_5MHz_t *) dci_pdu)->type = 1; + ((DCI6_1A_5MHz_t *) dci_pdu)->hopping = rel13->frequency_hopping_enabled_flag; + ((DCI6_1A_5MHz_t *) dci_pdu)->rballoc = rel13->resource_block_coding; + ((DCI6_1A_5MHz_t *) dci_pdu)->mcs = rel13->mcs; + ((DCI6_1A_5MHz_t *) dci_pdu)->rep = (rel13->pdsch_reptition_levels - 1); + ((DCI6_1A_5MHz_t *) dci_pdu)->harq_pid = rel13->harq_process; + ((DCI6_1A_5MHz_t *) dci_pdu)->ndi = rel13->new_data_indicator; + ((DCI6_1A_5MHz_t *) dci_pdu)->rv = rel13->redundancy_version; + ((DCI6_1A_5MHz_t *) dci_pdu)->TPC = rel13->tpc; + ((DCI6_1A_5MHz_t *) dci_pdu)->srs_req = rel13->srs_request; + ((DCI6_1A_5MHz_t *) dci_pdu)->harq_ack_off = rel13->harq_resource_offset; + ((DCI6_1A_5MHz_t *) dci_pdu)->dci_rep = rel13->dci_subframe_repetition_number - 1; + break; case 50: - dci_alloc->dci_length = sizeof_DCI6_1A_10MHz_t; - ((DCI6_1A_10MHz_t *)dci_pdu)->type = 1; - ((DCI6_1A_10MHz_t *)dci_pdu)->hopping = rel13->frequency_hopping_enabled_flag; - ((DCI6_1A_10MHz_t *)dci_pdu)->rballoc = rel13->resource_block_coding; - ((DCI6_1A_10MHz_t *)dci_pdu)->mcs = rel13->mcs; - ((DCI6_1A_10MHz_t *)dci_pdu)->rep = (rel13->pdsch_reptition_levels-1); - ((DCI6_1A_10MHz_t *)dci_pdu)->harq_pid = rel13->harq_process; - ((DCI6_1A_10MHz_t *)dci_pdu)->ndi = rel13->new_data_indicator; - ((DCI6_1A_10MHz_t *)dci_pdu)->rv = rel13->redundancy_version; - ((DCI6_1A_10MHz_t *)dci_pdu)->TPC = rel13->tpc; - ((DCI6_1A_10MHz_t *)dci_pdu)->srs_req = rel13->srs_request; - ((DCI6_1A_10MHz_t *)dci_pdu)->harq_ack_off = rel13->harq_resource_offset; - ((DCI6_1A_10MHz_t *)dci_pdu)->dci_rep = rel13->dci_subframe_repetition_number-1; + dci_alloc->dci_length = sizeof_DCI6_1A_10MHz_t; + ((DCI6_1A_10MHz_t *) dci_pdu)->type = 1; + ((DCI6_1A_10MHz_t *) dci_pdu)->hopping = rel13->frequency_hopping_enabled_flag; + ((DCI6_1A_10MHz_t *) dci_pdu)->rballoc = rel13->resource_block_coding; + ((DCI6_1A_10MHz_t *) dci_pdu)->mcs = rel13->mcs; + ((DCI6_1A_10MHz_t *) dci_pdu)->rep = (rel13->pdsch_reptition_levels - 1); + ((DCI6_1A_10MHz_t *) dci_pdu)->harq_pid = rel13->harq_process; + ((DCI6_1A_10MHz_t *) dci_pdu)->ndi = rel13->new_data_indicator; + ((DCI6_1A_10MHz_t *) dci_pdu)->rv = rel13->redundancy_version; + ((DCI6_1A_10MHz_t *) dci_pdu)->TPC = rel13->tpc; + ((DCI6_1A_10MHz_t *) dci_pdu)->srs_req = rel13->srs_request; + ((DCI6_1A_10MHz_t *) dci_pdu)->harq_ack_off = rel13->harq_resource_offset; + ((DCI6_1A_10MHz_t *) dci_pdu)->dci_rep = rel13->dci_subframe_repetition_number - 1; break; case 100: - dci_alloc->dci_length = sizeof_DCI6_1A_20MHz_t; - ((DCI6_1A_20MHz_t *)dci_pdu)->type = 1; - ((DCI6_1A_20MHz_t *)dci_pdu)->hopping = rel13->frequency_hopping_enabled_flag; - ((DCI6_1A_20MHz_t *)dci_pdu)->rballoc = rel13->resource_block_coding; - ((DCI6_1A_20MHz_t *)dci_pdu)->mcs = rel13->mcs; - ((DCI6_1A_20MHz_t *)dci_pdu)->rep = (rel13->pdsch_reptition_levels-1); - ((DCI6_1A_20MHz_t *)dci_pdu)->harq_pid = rel13->harq_process; - ((DCI6_1A_20MHz_t *)dci_pdu)->ndi = rel13->new_data_indicator; - ((DCI6_1A_20MHz_t *)dci_pdu)->rv = rel13->redundancy_version; - ((DCI6_1A_20MHz_t *)dci_pdu)->TPC = rel13->tpc; - ((DCI6_1A_20MHz_t *)dci_pdu)->srs_req = rel13->srs_request; - ((DCI6_1A_20MHz_t *)dci_pdu)->harq_ack_off = rel13->harq_resource_offset; - ((DCI6_1A_20MHz_t *)dci_pdu)->dci_rep = rel13->dci_subframe_repetition_number-1; + dci_alloc->dci_length = sizeof_DCI6_1A_20MHz_t; + ((DCI6_1A_20MHz_t *) dci_pdu)->type = 1; + ((DCI6_1A_20MHz_t *) dci_pdu)->hopping = rel13->frequency_hopping_enabled_flag; + ((DCI6_1A_20MHz_t *) dci_pdu)->rballoc = rel13->resource_block_coding; + ((DCI6_1A_20MHz_t *) dci_pdu)->mcs = rel13->mcs; + ((DCI6_1A_20MHz_t *) dci_pdu)->rep = (rel13->pdsch_reptition_levels - 1); + ((DCI6_1A_20MHz_t *) dci_pdu)->harq_pid = rel13->harq_process; + ((DCI6_1A_20MHz_t *) dci_pdu)->ndi = rel13->new_data_indicator; + ((DCI6_1A_20MHz_t *) dci_pdu)->rv = rel13->redundancy_version; + ((DCI6_1A_20MHz_t *) dci_pdu)->TPC = rel13->tpc; + ((DCI6_1A_20MHz_t *) dci_pdu)->srs_req = rel13->srs_request; + ((DCI6_1A_20MHz_t *) dci_pdu)->harq_ack_off = rel13->harq_resource_offset; + ((DCI6_1A_20MHz_t *) dci_pdu)->dci_rep = rel13->dci_subframe_repetition_number - 1; break; } break; - case 11: // Format 6-1B - dci_alloc->format = format6_1B; - dlsch0->active = 1; + case 11: // Format 6-1B + dci_alloc->format = format6_1B; + dlsch0->active = 1; switch (fp->N_RB_DL) { case 25: - dci_alloc->dci_length = sizeof_DCI6_1B_5MHz_t; - ((DCI6_1B_5MHz_t *)dci_pdu)->type = 1; - ((DCI6_1B_5MHz_t *)dci_pdu)->rballoc = rel13->resource_block_coding; - ((DCI6_1B_5MHz_t *)dci_pdu)->mcs = rel13->mcs; - ((DCI6_1B_5MHz_t *)dci_pdu)->rep = (rel13->pdsch_reptition_levels-1); - ((DCI6_1B_5MHz_t *)dci_pdu)->harq_pid = rel13->harq_process; - ((DCI6_1B_5MHz_t *)dci_pdu)->ndi = rel13->new_data_indicator; - ((DCI6_1B_5MHz_t *)dci_pdu)->harq_ack_off = rel13->harq_resource_offset; - ((DCI6_1B_5MHz_t *)dci_pdu)->dci_rep = rel13->dci_subframe_repetition_number-1; - + dci_alloc->dci_length = sizeof_DCI6_1B_5MHz_t; + ((DCI6_1B_5MHz_t *) dci_pdu)->type = 1; + ((DCI6_1B_5MHz_t *) dci_pdu)->rballoc = rel13->resource_block_coding; + ((DCI6_1B_5MHz_t *) dci_pdu)->mcs = rel13->mcs; + ((DCI6_1B_5MHz_t *) dci_pdu)->rep = (rel13->pdsch_reptition_levels - 1); + ((DCI6_1B_5MHz_t *) dci_pdu)->harq_pid = rel13->harq_process; + ((DCI6_1B_5MHz_t *) dci_pdu)->ndi = rel13->new_data_indicator; + ((DCI6_1B_5MHz_t *) dci_pdu)->harq_ack_off = rel13->harq_resource_offset; + ((DCI6_1B_5MHz_t *) dci_pdu)->dci_rep = rel13->dci_subframe_repetition_number - 1; + break; case 50: - dci_alloc->dci_length = sizeof_DCI6_1B_10MHz_t; - ((DCI6_1B_10MHz_t *)dci_pdu)->type = 1; - ((DCI6_1B_10MHz_t *)dci_pdu)->rballoc = rel13->resource_block_coding; - ((DCI6_1B_10MHz_t *)dci_pdu)->mcs = rel13->mcs; - ((DCI6_1B_10MHz_t *)dci_pdu)->rep = (rel13->pdsch_reptition_levels-1); - ((DCI6_1B_10MHz_t *)dci_pdu)->harq_pid = rel13->harq_process; - ((DCI6_1B_10MHz_t *)dci_pdu)->ndi = rel13->new_data_indicator; - ((DCI6_1B_10MHz_t *)dci_pdu)->harq_ack_off = rel13->harq_resource_offset; - ((DCI6_1B_10MHz_t *)dci_pdu)->dci_rep = rel13->dci_subframe_repetition_number-1; + dci_alloc->dci_length = sizeof_DCI6_1B_10MHz_t; + ((DCI6_1B_10MHz_t *) dci_pdu)->type = 1; + ((DCI6_1B_10MHz_t *) dci_pdu)->rballoc = rel13->resource_block_coding; + ((DCI6_1B_10MHz_t *) dci_pdu)->mcs = rel13->mcs; + ((DCI6_1B_10MHz_t *) dci_pdu)->rep = (rel13->pdsch_reptition_levels - 1); + ((DCI6_1B_10MHz_t *) dci_pdu)->harq_pid = rel13->harq_process; + ((DCI6_1B_10MHz_t *) dci_pdu)->ndi = rel13->new_data_indicator; + ((DCI6_1B_10MHz_t *) dci_pdu)->harq_ack_off = rel13->harq_resource_offset; + ((DCI6_1B_10MHz_t *) dci_pdu)->dci_rep = rel13->dci_subframe_repetition_number - 1; break; case 100: - dci_alloc->dci_length = sizeof_DCI6_1B_20MHz_t; - ((DCI6_1B_20MHz_t *)dci_pdu)->type = 1; - ((DCI6_1B_20MHz_t *)dci_pdu)->rballoc = rel13->resource_block_coding; - ((DCI6_1B_20MHz_t *)dci_pdu)->mcs = rel13->mcs; - ((DCI6_1B_20MHz_t *)dci_pdu)->rep = (rel13->pdsch_reptition_levels-1); - ((DCI6_1B_20MHz_t *)dci_pdu)->harq_pid = rel13->harq_process; - ((DCI6_1B_20MHz_t *)dci_pdu)->ndi = rel13->new_data_indicator; - ((DCI6_1B_20MHz_t *)dci_pdu)->harq_ack_off = rel13->harq_resource_offset; - ((DCI6_1B_20MHz_t *)dci_pdu)->dci_rep = rel13->dci_subframe_repetition_number-1; + dci_alloc->dci_length = sizeof_DCI6_1B_20MHz_t; + ((DCI6_1B_20MHz_t *) dci_pdu)->type = 1; + ((DCI6_1B_20MHz_t *) dci_pdu)->rballoc = rel13->resource_block_coding; + ((DCI6_1B_20MHz_t *) dci_pdu)->mcs = rel13->mcs; + ((DCI6_1B_20MHz_t *) dci_pdu)->rep = (rel13->pdsch_reptition_levels - 1); + ((DCI6_1B_20MHz_t *) dci_pdu)->harq_pid = rel13->harq_process; + ((DCI6_1B_20MHz_t *) dci_pdu)->ndi = rel13->new_data_indicator; + ((DCI6_1B_20MHz_t *) dci_pdu)->harq_ack_off = rel13->harq_resource_offset; + ((DCI6_1B_20MHz_t *) dci_pdu)->dci_rep = rel13->dci_subframe_repetition_number - 1; break; } - case 12: // Format 6-2 - dci_alloc->format = format6_2; - dlsch0->active = 1; + case 12: // Format 6-2 + dci_alloc->format = format6_2; + dlsch0->active = 1; switch (fp->N_RB_DL) { case 25: - dci_alloc->dci_length = sizeof_DCI6_2_5MHz_t; - if (rel13->paging_direct_indication_differentiation_flag==0) { - ((DCI6_2_di_5MHz_t *)dci_pdu)->type = 0; - ((DCI6_2_di_5MHz_t *)dci_pdu)->di_info = rel13->direct_indication; - } - else { - ((DCI6_2_paging_5MHz_t *)dci_pdu)->type = 1; - ((DCI6_2_paging_5MHz_t *)dci_pdu)->rballoc = rel13->resource_block_coding; - ((DCI6_2_paging_5MHz_t *)dci_pdu)->mcs = rel13->mcs; - ((DCI6_2_paging_5MHz_t *)dci_pdu)->rep = (rel13->pdsch_reptition_levels-1); - ((DCI6_2_paging_5MHz_t *)dci_pdu)->dci_rep = rel13->dci_subframe_repetition_number-1; + dci_alloc->dci_length = sizeof_DCI6_2_5MHz_t; + if (rel13->paging_direct_indication_differentiation_flag == 0) { + ((DCI6_2_di_5MHz_t *) dci_pdu)->type = 0; + ((DCI6_2_di_5MHz_t *) dci_pdu)->di_info = rel13->direct_indication; + } else { + ((DCI6_2_paging_5MHz_t *) dci_pdu)->type = 1; + ((DCI6_2_paging_5MHz_t *) dci_pdu)->rballoc = rel13->resource_block_coding; + ((DCI6_2_paging_5MHz_t *) dci_pdu)->mcs = rel13->mcs; + ((DCI6_2_paging_5MHz_t *) dci_pdu)->rep = (rel13->pdsch_reptition_levels - 1); + ((DCI6_2_paging_5MHz_t *) dci_pdu)->dci_rep = rel13->dci_subframe_repetition_number - 1; } - break; + break; case 50: - dci_alloc->dci_length = sizeof_DCI6_2_10MHz_t; - if (rel13->paging_direct_indication_differentiation_flag==0) { - ((DCI6_2_di_10MHz_t *)dci_pdu)->type = 0; - ((DCI6_2_di_10MHz_t *)dci_pdu)->di_info = rel13->direct_indication; - } - else { - ((DCI6_2_paging_10MHz_t *)dci_pdu)->type = 1; - ((DCI6_2_paging_10MHz_t *)dci_pdu)->rballoc = rel13->resource_block_coding; - ((DCI6_2_paging_10MHz_t *)dci_pdu)->mcs = rel13->mcs; - ((DCI6_2_paging_10MHz_t *)dci_pdu)->rep = (rel13->pdsch_reptition_levels-1); - ((DCI6_2_paging_10MHz_t *)dci_pdu)->dci_rep = rel13->dci_subframe_repetition_number-1; + dci_alloc->dci_length = sizeof_DCI6_2_10MHz_t; + if (rel13->paging_direct_indication_differentiation_flag == 0) { + ((DCI6_2_di_10MHz_t *) dci_pdu)->type = 0; + ((DCI6_2_di_10MHz_t *) dci_pdu)->di_info = rel13->direct_indication; + } else { + ((DCI6_2_paging_10MHz_t *) dci_pdu)->type = 1; + ((DCI6_2_paging_10MHz_t *) dci_pdu)->rballoc = rel13->resource_block_coding; + ((DCI6_2_paging_10MHz_t *) dci_pdu)->mcs = rel13->mcs; + ((DCI6_2_paging_10MHz_t *) dci_pdu)->rep = (rel13->pdsch_reptition_levels - 1); + ((DCI6_2_paging_10MHz_t *) dci_pdu)->dci_rep = rel13->dci_subframe_repetition_number - 1; } - break; + break; case 100: - dci_alloc->dci_length = sizeof_DCI6_2_20MHz_t; - if (rel13->paging_direct_indication_differentiation_flag==0) { - ((DCI6_2_di_20MHz_t *)dci_pdu)->type = 0; - ((DCI6_2_di_20MHz_t *)dci_pdu)->di_info = rel13->direct_indication; - } - else { - ((DCI6_2_paging_20MHz_t *)dci_pdu)->type = 1; - ((DCI6_2_paging_20MHz_t *)dci_pdu)->rballoc = rel13->resource_block_coding; - ((DCI6_2_paging_20MHz_t *)dci_pdu)->mcs = rel13->mcs; - ((DCI6_2_paging_20MHz_t *)dci_pdu)->rep = (rel13->pdsch_reptition_levels-1); - ((DCI6_2_paging_20MHz_t *)dci_pdu)->dci_rep = rel13->dci_subframe_repetition_number-1; + dci_alloc->dci_length = sizeof_DCI6_2_20MHz_t; + if (rel13->paging_direct_indication_differentiation_flag == 0) { + ((DCI6_2_di_20MHz_t *) dci_pdu)->type = 0; + ((DCI6_2_di_20MHz_t *) dci_pdu)->di_info = rel13->direct_indication; + } else { + ((DCI6_2_paging_20MHz_t *) dci_pdu)->type = 1; + ((DCI6_2_paging_20MHz_t *) dci_pdu)->rballoc = rel13->resource_block_coding; + ((DCI6_2_paging_20MHz_t *) dci_pdu)->mcs = rel13->mcs; + ((DCI6_2_paging_20MHz_t *) dci_pdu)->rep = (rel13->pdsch_reptition_levels - 1); + ((DCI6_2_paging_20MHz_t *) dci_pdu)->dci_rep = rel13->dci_subframe_repetition_number - 1; } break; } } - AssertFatal(rel13->harq_process<8, - "ERROR: Format 6_1A: harq_pid=%d >= 8\n", rel13->harq_process); - + AssertFatal (rel13->harq_process < 8, "ERROR: Format 6_1A: harq_pid=%d >= 8\n", rel13->harq_process); + dlsch0_harq = dlsch0->harq_processes[rel13->harq_process]; - dlsch0_harq->codeword=0; - + dlsch0_harq->codeword = 0; + // printf("DCI: Setting subframe_tx for subframe %d\n",subframe); - dlsch0->subframe_tx[subframe] = 1; - - conv_eMTC_rballoc(rel13->resource_block_coding, - fp->N_RB_DL, - dlsch0_harq->rb_alloc); - - dlsch0_harq->nb_rb = RIV2nb_rb_LUT6[rel13->resource_block_coding&31]; // this is the 6PRB RIV - - - dlsch0_harq->rvidx = rel13->redundancy_version; - - dlsch0_harq->Nl = 1; + dlsch0->subframe_tx[(subframe + 2) % 10] = 1; + + conv_eMTC_rballoc (rel13->resource_block_coding, fp->N_RB_DL, dlsch0_harq->rb_alloc); + + dlsch0_harq->nb_rb = RIV2nb_rb_LUT6[rel13->resource_block_coding & 31]; // this is the 6PRB RIV + + + dlsch0_harq->rvidx = rel13->redundancy_version; + + dlsch0_harq->Nl = 1; // dlsch[0]->layer_index = 0; // if (beamforming_mode == 0) dlsch0_harq->mimo_mode = (fp->nb_antenna_ports_eNB == 1) ? SISO : ALAMOUTI; - //else if (beamforming_mode == 7) - // dlsch0_harq->mimo_mode = TM7; - //else - //LOG_E(PHY,"Invalid beamforming mode %dL\n", beamforming_mode); - + //else if (beamforming_mode == 7) + // dlsch0_harq->mimo_mode = TM7; + //else + //LOG_E(PHY,"Invalid beamforming mode %dL\n", beamforming_mode); + dlsch0_harq->dl_power_off = 1; - + dlsch0->active = 1; - dlsch0->harq_mask |= (1<harq_process); - - + dlsch0->harq_mask |= (1 << rel13->harq_process); + + if (dlsch0_harq->round == 0) { dlsch0_harq->status = ACTIVE; // printf("Setting DLSCH process %d to ACTIVE\n",rel8->harq_process); // MCS and TBS don't change across HARQ rounds - dlsch0_harq->mcs = rel13->mcs; - dlsch0_harq->TBS = TBStable[get_I_TBS(dlsch0_harq->mcs)][dlsch0_harq->nb_rb-1]; - + dlsch0_harq->mcs = rel13->mcs; + dlsch0_harq->TBS = TBStable[get_I_TBS (dlsch0_harq->mcs)][dlsch0_harq->nb_rb - 1]; + } - - dlsch0->harq_ids[subframe] = rel13->harq_process; - - - + + dlsch0->harq_ids[(subframe + 2) % 10] = rel13->harq_process; + dlsch0_harq->frame = (subframe >= 8) ? ((frame + 1) & 1023) : frame; + dlsch0_harq->subframe = (subframe + 2) % 10; + + + dlsch0->rnti = rel13->rnti; @@ -2384,583 +2378,536 @@ void fill_mdci_and_dlsch(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,mDCI_ALLOC_t *d } -void fill_dci0(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,DCI_ALLOC_t *dci_alloc, - nfapi_hi_dci0_dci_pdu *pdu) +void +fill_dci0 (PHY_VARS_eNB * eNB, eNB_rxtx_proc_t * proc, DCI_ALLOC_t * dci_alloc, nfapi_hi_dci0_dci_pdu * pdu) { LTE_DL_FRAME_PARMS *frame_parms = &eNB->frame_parms; - uint32_t cqi_req = pdu->dci_pdu_rel8.cqi_csi_request; - uint32_t dai = pdu->dci_pdu_rel8.dl_assignment_index; - uint32_t cshift = pdu->dci_pdu_rel8.cyclic_shift_2_for_drms; - uint32_t TPC = pdu->dci_pdu_rel8.tpc; - uint32_t mcs = pdu->dci_pdu_rel8.mcs_1; - uint32_t hopping = pdu->dci_pdu_rel8.frequency_hopping_enabled_flag; - uint32_t rballoc = computeRIV(frame_parms->N_RB_DL, - pdu->dci_pdu_rel8.resource_block_start, - pdu->dci_pdu_rel8.number_of_resource_block); + uint32_t cqi_req = pdu->dci_pdu_rel8.cqi_csi_request; + uint32_t dai = pdu->dci_pdu_rel8.dl_assignment_index; + uint32_t cshift = pdu->dci_pdu_rel8.cyclic_shift_2_for_drms; + uint32_t TPC = pdu->dci_pdu_rel8.tpc; + uint32_t mcs = pdu->dci_pdu_rel8.mcs_1; + uint32_t hopping = pdu->dci_pdu_rel8.frequency_hopping_enabled_flag; + uint32_t rballoc = computeRIV (frame_parms->N_RB_DL, + pdu->dci_pdu_rel8.resource_block_start, + pdu->dci_pdu_rel8.number_of_resource_block); - uint32_t ndi = pdu->dci_pdu_rel8.new_data_indication_1; + uint32_t ndi = pdu->dci_pdu_rel8.new_data_indication_1; #ifdef T_TRACER - T(T_ENB_PHY_ULSCH_UE_DCI, T_INT(eNB->Mod_id), T_INT(proc->frame_tx), T_INT(proc->subframe_tx), - T_INT(pdu->dci_pdu_rel8.rnti), T_INT(((proc->frame_tx*10+proc->subframe_tx+4) % 8) /* TODO: correct harq pid */), - T_INT(mcs), T_INT(-1 /* TODO: remove round? */), - T_INT(pdu->dci_pdu_rel8.resource_block_start), - T_INT(pdu->dci_pdu_rel8.number_of_resource_block), - T_INT(get_TBS_UL(mcs, pdu->dci_pdu_rel8.number_of_resource_block) * 8), - T_INT(pdu->dci_pdu_rel8.aggregation_level), - T_INT(pdu->dci_pdu_rel8.cce_index)); + T (T_ENB_PHY_ULSCH_UE_DCI, T_INT (eNB->Mod_id), T_INT (proc->frame_tx), T_INT (proc->subframe_tx), + T_INT (pdu->dci_pdu_rel8.rnti), T_INT (((proc->frame_tx * 10 + proc->subframe_tx + 4) % 8) /* TODO: correct harq pid */ ), + T_INT (mcs), T_INT (-1 /* TODO: remove round? */ ), + T_INT (pdu->dci_pdu_rel8.resource_block_start), + T_INT (pdu->dci_pdu_rel8.number_of_resource_block), + T_INT (get_TBS_UL (mcs, pdu->dci_pdu_rel8.number_of_resource_block) * 8), T_INT (pdu->dci_pdu_rel8.aggregation_level), T_INT (pdu->dci_pdu_rel8.cce_index)); #endif - void *dci_pdu = (void*)dci_alloc->dci_pdu; + void *dci_pdu = (void *) dci_alloc->dci_pdu; - LOG_D(PHY,"Filling DCI0 with cqi %d, mcs %d, hopping %d, rballoc %x (%d,%d) ndi %d TPC %d cshift %d\n",cqi_req, - mcs,hopping,rballoc,pdu->dci_pdu_rel8.resource_block_start,pdu->dci_pdu_rel8.number_of_resource_block, - ndi,TPC,cshift); + LOG_D (PHY, "Filling DCI0 with cqi %d, mcs %d, hopping %d, rballoc %x (%d,%d) ndi %d TPC %d cshift %d\n", cqi_req, + mcs, hopping, rballoc, pdu->dci_pdu_rel8.resource_block_start, pdu->dci_pdu_rel8.number_of_resource_block, ndi, TPC, cshift); - dci_alloc->format = format0; + dci_alloc->format = format0; dci_alloc->firstCCE = pdu->dci_pdu_rel8.cce_index; - dci_alloc->L = pdu->dci_pdu_rel8.aggregation_level; - dci_alloc->rnti = pdu->dci_pdu_rel8.rnti; - dci_alloc->ra_flag = 0; + dci_alloc->L = pdu->dci_pdu_rel8.aggregation_level; + dci_alloc->rnti = pdu->dci_pdu_rel8.rnti; + dci_alloc->ra_flag = 0; switch (frame_parms->N_RB_DL) { case 6: if (frame_parms->frame_type == TDD) { - ((DCI0_1_5MHz_TDD_1_6_t *)dci_pdu)->cqi_req = cqi_req; - ((DCI0_1_5MHz_TDD_1_6_t *)dci_pdu)->dai = dai; - ((DCI0_1_5MHz_TDD_1_6_t *)dci_pdu)->cshift = cshift; - ((DCI0_1_5MHz_TDD_1_6_t *)dci_pdu)->TPC = TPC; - ((DCI0_1_5MHz_TDD_1_6_t *)dci_pdu)->mcs = mcs; - ((DCI0_1_5MHz_TDD_1_6_t *)dci_pdu)->ndi = ndi; - ((DCI0_1_5MHz_TDD_1_6_t *)dci_pdu)->rballoc = rballoc; - ((DCI0_1_5MHz_TDD_1_6_t *)dci_pdu)->hopping = hopping; - ((DCI0_1_5MHz_TDD_1_6_t *)dci_pdu)->type = 0; - ((DCI0_1_5MHz_TDD_1_6_t *)dci_pdu)->padding = 0; - dci_alloc->dci_length = sizeof_DCI0_1_5MHz_TDD_1_6_t; + ((DCI0_1_5MHz_TDD_1_6_t *) dci_pdu)->cqi_req = cqi_req; + ((DCI0_1_5MHz_TDD_1_6_t *) dci_pdu)->dai = dai; + ((DCI0_1_5MHz_TDD_1_6_t *) dci_pdu)->cshift = cshift; + ((DCI0_1_5MHz_TDD_1_6_t *) dci_pdu)->TPC = TPC; + ((DCI0_1_5MHz_TDD_1_6_t *) dci_pdu)->mcs = mcs; + ((DCI0_1_5MHz_TDD_1_6_t *) dci_pdu)->ndi = ndi; + ((DCI0_1_5MHz_TDD_1_6_t *) dci_pdu)->rballoc = rballoc; + ((DCI0_1_5MHz_TDD_1_6_t *) dci_pdu)->hopping = hopping; + ((DCI0_1_5MHz_TDD_1_6_t *) dci_pdu)->type = 0; + ((DCI0_1_5MHz_TDD_1_6_t *) dci_pdu)->padding = 0; + dci_alloc->dci_length = sizeof_DCI0_1_5MHz_TDD_1_6_t; } else { - ((DCI0_1_5MHz_FDD_t *)dci_pdu)->cqi_req = cqi_req; - ((DCI0_1_5MHz_FDD_t *)dci_pdu)->cshift = cshift; - ((DCI0_1_5MHz_FDD_t *)dci_pdu)->TPC = TPC; - ((DCI0_1_5MHz_FDD_t *)dci_pdu)->mcs = mcs; - ((DCI0_1_5MHz_FDD_t *)dci_pdu)->ndi = ndi; - ((DCI0_1_5MHz_FDD_t *)dci_pdu)->rballoc = rballoc; - ((DCI0_1_5MHz_FDD_t *)dci_pdu)->hopping = hopping; - ((DCI0_1_5MHz_FDD_t *)dci_pdu)->type = 0; - ((DCI0_1_5MHz_FDD_t *)dci_pdu)->padding = 0; - dci_alloc->dci_length = sizeof_DCI0_1_5MHz_FDD_t; + ((DCI0_1_5MHz_FDD_t *) dci_pdu)->cqi_req = cqi_req; + ((DCI0_1_5MHz_FDD_t *) dci_pdu)->cshift = cshift; + ((DCI0_1_5MHz_FDD_t *) dci_pdu)->TPC = TPC; + ((DCI0_1_5MHz_FDD_t *) dci_pdu)->mcs = mcs; + ((DCI0_1_5MHz_FDD_t *) dci_pdu)->ndi = ndi; + ((DCI0_1_5MHz_FDD_t *) dci_pdu)->rballoc = rballoc; + ((DCI0_1_5MHz_FDD_t *) dci_pdu)->hopping = hopping; + ((DCI0_1_5MHz_FDD_t *) dci_pdu)->type = 0; + ((DCI0_1_5MHz_FDD_t *) dci_pdu)->padding = 0; + dci_alloc->dci_length = sizeof_DCI0_1_5MHz_FDD_t; } - + break; - + case 25: if (frame_parms->frame_type == TDD) { - ((DCI0_5MHz_TDD_1_6_t *)dci_pdu)->cqi_req = cqi_req; - ((DCI0_5MHz_TDD_1_6_t *)dci_pdu)->dai = dai; - ((DCI0_5MHz_TDD_1_6_t *)dci_pdu)->cshift = cshift; - ((DCI0_5MHz_TDD_1_6_t *)dci_pdu)->TPC = TPC; - ((DCI0_5MHz_TDD_1_6_t *)dci_pdu)->mcs = mcs; - ((DCI0_5MHz_TDD_1_6_t *)dci_pdu)->ndi = ndi; - ((DCI0_5MHz_TDD_1_6_t *)dci_pdu)->rballoc = rballoc; - ((DCI0_5MHz_TDD_1_6_t *)dci_pdu)->hopping = hopping; - ((DCI0_5MHz_TDD_1_6_t *)dci_pdu)->type = 0; - ((DCI0_5MHz_TDD_1_6_t *)dci_pdu)->padding = 0; - dci_alloc->dci_length = sizeof_DCI0_5MHz_TDD_1_6_t; + ((DCI0_5MHz_TDD_1_6_t *) dci_pdu)->cqi_req = cqi_req; + ((DCI0_5MHz_TDD_1_6_t *) dci_pdu)->dai = dai; + ((DCI0_5MHz_TDD_1_6_t *) dci_pdu)->cshift = cshift; + ((DCI0_5MHz_TDD_1_6_t *) dci_pdu)->TPC = TPC; + ((DCI0_5MHz_TDD_1_6_t *) dci_pdu)->mcs = mcs; + ((DCI0_5MHz_TDD_1_6_t *) dci_pdu)->ndi = ndi; + ((DCI0_5MHz_TDD_1_6_t *) dci_pdu)->rballoc = rballoc; + ((DCI0_5MHz_TDD_1_6_t *) dci_pdu)->hopping = hopping; + ((DCI0_5MHz_TDD_1_6_t *) dci_pdu)->type = 0; + ((DCI0_5MHz_TDD_1_6_t *) dci_pdu)->padding = 0; + dci_alloc->dci_length = sizeof_DCI0_5MHz_TDD_1_6_t; } else { - ((DCI0_5MHz_FDD_t *)dci_pdu)->cqi_req = cqi_req; - ((DCI0_5MHz_FDD_t *)dci_pdu)->cshift = cshift; - ((DCI0_5MHz_FDD_t *)dci_pdu)->TPC = TPC; - ((DCI0_5MHz_FDD_t *)dci_pdu)->mcs = mcs; - ((DCI0_5MHz_FDD_t *)dci_pdu)->ndi = ndi; - ((DCI0_5MHz_FDD_t *)dci_pdu)->rballoc = rballoc; - ((DCI0_5MHz_FDD_t *)dci_pdu)->hopping = hopping; - ((DCI0_5MHz_FDD_t *)dci_pdu)->type = 0; - ((DCI0_5MHz_FDD_t *)dci_pdu)->padding = 0; - dci_alloc->dci_length = sizeof_DCI0_5MHz_FDD_t; + ((DCI0_5MHz_FDD_t *) dci_pdu)->cqi_req = cqi_req; + ((DCI0_5MHz_FDD_t *) dci_pdu)->cshift = cshift; + ((DCI0_5MHz_FDD_t *) dci_pdu)->TPC = TPC; + ((DCI0_5MHz_FDD_t *) dci_pdu)->mcs = mcs; + ((DCI0_5MHz_FDD_t *) dci_pdu)->ndi = ndi; + ((DCI0_5MHz_FDD_t *) dci_pdu)->rballoc = rballoc; + ((DCI0_5MHz_FDD_t *) dci_pdu)->hopping = hopping; + ((DCI0_5MHz_FDD_t *) dci_pdu)->type = 0; + ((DCI0_5MHz_FDD_t *) dci_pdu)->padding = 0; + dci_alloc->dci_length = sizeof_DCI0_5MHz_FDD_t; } - + break; - + case 50: if (frame_parms->frame_type == TDD) { - ((DCI0_10MHz_TDD_1_6_t *)dci_pdu)->cqi_req = cqi_req; - ((DCI0_10MHz_TDD_1_6_t *)dci_pdu)->dai = dai; - ((DCI0_10MHz_TDD_1_6_t *)dci_pdu)->cshift = cshift; - ((DCI0_10MHz_TDD_1_6_t *)dci_pdu)->TPC = TPC; - ((DCI0_10MHz_TDD_1_6_t *)dci_pdu)->mcs = mcs; - ((DCI0_10MHz_TDD_1_6_t *)dci_pdu)->ndi = ndi; - ((DCI0_10MHz_TDD_1_6_t *)dci_pdu)->rballoc = rballoc; - ((DCI0_10MHz_TDD_1_6_t *)dci_pdu)->hopping = hopping; - ((DCI0_10MHz_TDD_1_6_t *)dci_pdu)->type = 0; - ((DCI0_10MHz_TDD_1_6_t *)dci_pdu)->padding = 0; - dci_alloc->dci_length = sizeof_DCI0_10MHz_TDD_1_6_t; + ((DCI0_10MHz_TDD_1_6_t *) dci_pdu)->cqi_req = cqi_req; + ((DCI0_10MHz_TDD_1_6_t *) dci_pdu)->dai = dai; + ((DCI0_10MHz_TDD_1_6_t *) dci_pdu)->cshift = cshift; + ((DCI0_10MHz_TDD_1_6_t *) dci_pdu)->TPC = TPC; + ((DCI0_10MHz_TDD_1_6_t *) dci_pdu)->mcs = mcs; + ((DCI0_10MHz_TDD_1_6_t *) dci_pdu)->ndi = ndi; + ((DCI0_10MHz_TDD_1_6_t *) dci_pdu)->rballoc = rballoc; + ((DCI0_10MHz_TDD_1_6_t *) dci_pdu)->hopping = hopping; + ((DCI0_10MHz_TDD_1_6_t *) dci_pdu)->type = 0; + ((DCI0_10MHz_TDD_1_6_t *) dci_pdu)->padding = 0; + dci_alloc->dci_length = sizeof_DCI0_10MHz_TDD_1_6_t; } else { - ((DCI0_10MHz_FDD_t *)dci_pdu)->cqi_req = cqi_req; - ((DCI0_10MHz_FDD_t *)dci_pdu)->cshift = cshift; - ((DCI0_10MHz_FDD_t *)dci_pdu)->TPC = TPC; - ((DCI0_10MHz_FDD_t *)dci_pdu)->mcs = mcs; - ((DCI0_10MHz_FDD_t *)dci_pdu)->ndi = ndi; - ((DCI0_10MHz_FDD_t *)dci_pdu)->rballoc = rballoc; - ((DCI0_10MHz_FDD_t *)dci_pdu)->hopping = hopping; - ((DCI0_10MHz_FDD_t *)dci_pdu)->type = 0; - ((DCI0_10MHz_FDD_t *)dci_pdu)->padding = 0; - dci_alloc->dci_length = sizeof_DCI0_10MHz_FDD_t; + ((DCI0_10MHz_FDD_t *) dci_pdu)->cqi_req = cqi_req; + ((DCI0_10MHz_FDD_t *) dci_pdu)->cshift = cshift; + ((DCI0_10MHz_FDD_t *) dci_pdu)->TPC = TPC; + ((DCI0_10MHz_FDD_t *) dci_pdu)->mcs = mcs; + ((DCI0_10MHz_FDD_t *) dci_pdu)->ndi = ndi; + ((DCI0_10MHz_FDD_t *) dci_pdu)->rballoc = rballoc; + ((DCI0_10MHz_FDD_t *) dci_pdu)->hopping = hopping; + ((DCI0_10MHz_FDD_t *) dci_pdu)->type = 0; + ((DCI0_10MHz_FDD_t *) dci_pdu)->padding = 0; + dci_alloc->dci_length = sizeof_DCI0_10MHz_FDD_t; } - + break; - + case 100: if (frame_parms->frame_type == TDD) { - ((DCI0_20MHz_TDD_1_6_t *)dci_pdu)->cqi_req = cqi_req; - ((DCI0_20MHz_TDD_1_6_t *)dci_pdu)->dai = dai; - ((DCI0_20MHz_TDD_1_6_t *)dci_pdu)->cshift = cshift; - ((DCI0_20MHz_TDD_1_6_t *)dci_pdu)->TPC = TPC; - ((DCI0_20MHz_TDD_1_6_t *)dci_pdu)->mcs = mcs; - ((DCI0_20MHz_TDD_1_6_t *)dci_pdu)->ndi = ndi; - ((DCI0_20MHz_TDD_1_6_t *)dci_pdu)->rballoc = rballoc; - ((DCI0_20MHz_TDD_1_6_t *)dci_pdu)->hopping = hopping; - ((DCI0_20MHz_TDD_1_6_t *)dci_pdu)->type = 0; - ((DCI0_20MHz_TDD_1_6_t *)dci_pdu)->padding = 0; + ((DCI0_20MHz_TDD_1_6_t *) dci_pdu)->cqi_req = cqi_req; + ((DCI0_20MHz_TDD_1_6_t *) dci_pdu)->dai = dai; + ((DCI0_20MHz_TDD_1_6_t *) dci_pdu)->cshift = cshift; + ((DCI0_20MHz_TDD_1_6_t *) dci_pdu)->TPC = TPC; + ((DCI0_20MHz_TDD_1_6_t *) dci_pdu)->mcs = mcs; + ((DCI0_20MHz_TDD_1_6_t *) dci_pdu)->ndi = ndi; + ((DCI0_20MHz_TDD_1_6_t *) dci_pdu)->rballoc = rballoc; + ((DCI0_20MHz_TDD_1_6_t *) dci_pdu)->hopping = hopping; + ((DCI0_20MHz_TDD_1_6_t *) dci_pdu)->type = 0; + ((DCI0_20MHz_TDD_1_6_t *) dci_pdu)->padding = 0; - dci_alloc->dci_length = sizeof_DCI0_20MHz_TDD_1_6_t; + dci_alloc->dci_length = sizeof_DCI0_20MHz_TDD_1_6_t; } else { - ((DCI0_20MHz_FDD_t *)dci_pdu)->cqi_req = cqi_req; - ((DCI0_20MHz_FDD_t *)dci_pdu)->cshift = cshift; - ((DCI0_20MHz_FDD_t *)dci_pdu)->TPC = TPC; - ((DCI0_20MHz_FDD_t *)dci_pdu)->mcs = mcs; - ((DCI0_20MHz_FDD_t *)dci_pdu)->ndi = ndi; - ((DCI0_20MHz_FDD_t *)dci_pdu)->rballoc = rballoc; - ((DCI0_20MHz_FDD_t *)dci_pdu)->hopping = hopping; - ((DCI0_20MHz_FDD_t *)dci_pdu)->type = 0; - ((DCI0_20MHz_FDD_t *)dci_pdu)->padding = 0; - dci_alloc->dci_length = sizeof_DCI0_20MHz_FDD_t; + ((DCI0_20MHz_FDD_t *) dci_pdu)->cqi_req = cqi_req; + ((DCI0_20MHz_FDD_t *) dci_pdu)->cshift = cshift; + ((DCI0_20MHz_FDD_t *) dci_pdu)->TPC = TPC; + ((DCI0_20MHz_FDD_t *) dci_pdu)->mcs = mcs; + ((DCI0_20MHz_FDD_t *) dci_pdu)->ndi = ndi; + ((DCI0_20MHz_FDD_t *) dci_pdu)->rballoc = rballoc; + ((DCI0_20MHz_FDD_t *) dci_pdu)->hopping = hopping; + ((DCI0_20MHz_FDD_t *) dci_pdu)->type = 0; + ((DCI0_20MHz_FDD_t *) dci_pdu)->padding = 0; + dci_alloc->dci_length = sizeof_DCI0_20MHz_FDD_t; } - - //printf("eNB: rb_alloc (20 MHz dci) %d\n",rballoc); - break; - + + //printf("eNB: rb_alloc (20 MHz dci) %d\n",rballoc); + break; + default: - LOG_E(PHY,"Invalid N_RB_DL %d\n", frame_parms->N_RB_DL); + LOG_E (PHY, "Invalid N_RB_DL %d\n", frame_parms->N_RB_DL); DevParam (frame_parms->N_RB_DL, 0, 0); break; } } -void fill_ulsch(PHY_VARS_eNB *eNB,nfapi_ul_config_ulsch_pdu *ulsch_pdu,int frame,int subframe) +void +fill_ulsch (PHY_VARS_eNB * eNB, nfapi_ul_config_ulsch_pdu * ulsch_pdu, int frame, int subframe) { - uint8_t harq_pid; - uint8_t UE_id; - boolean_t new_ulsch = (find_ulsch(ulsch_pdu->ulsch_pdu_rel8.rnti,eNB,SEARCH_EXIST)==-1) ? TRUE : FALSE; + uint8_t harq_pid; + uint8_t UE_id; + boolean_t new_ulsch = (find_ulsch (ulsch_pdu->ulsch_pdu_rel8.rnti, eNB, SEARCH_EXIST) == -1) ? TRUE : FALSE; - AssertFatal((UE_id=find_ulsch(ulsch_pdu->ulsch_pdu_rel8.rnti,eNB,SEARCH_EXIST_OR_FREE))>=0, - "No existing/free UE ULSCH for rnti %x\n",ulsch_pdu->ulsch_pdu_rel8.rnti); + AssertFatal ((UE_id = find_ulsch (ulsch_pdu->ulsch_pdu_rel8.rnti, eNB, SEARCH_EXIST_OR_FREE)) >= 0, "No existing/free UE ULSCH for rnti %x\n", ulsch_pdu->ulsch_pdu_rel8.rnti); - LTE_eNB_ULSCH_t *ulsch=eNB->ulsch[UE_id]; + LTE_eNB_ULSCH_t *ulsch = eNB->ulsch[UE_id]; LTE_DL_FRAME_PARMS *frame_parms = &eNB->frame_parms; - int use_srs = 0; + int use_srs = 0; harq_pid = ulsch_pdu->ulsch_pdu_rel8.harq_process_number; ulsch->harq_mask |= 1 << harq_pid; - ulsch->harq_processes[harq_pid]->frame = frame; - ulsch->harq_processes[harq_pid]->subframe = subframe; - ulsch->harq_processes[harq_pid]->handled = 0; + ulsch->harq_processes[harq_pid]->frame = frame; + ulsch->harq_processes[harq_pid]->subframe = subframe; + ulsch->harq_processes[harq_pid]->handled = 0; - ulsch->harq_processes[harq_pid]->first_rb = ulsch_pdu->ulsch_pdu_rel8.resource_block_start; - ulsch->harq_processes[harq_pid]->nb_rb = ulsch_pdu->ulsch_pdu_rel8.number_of_resource_blocks; + ulsch->harq_processes[harq_pid]->first_rb = ulsch_pdu->ulsch_pdu_rel8.resource_block_start; + ulsch->harq_processes[harq_pid]->nb_rb = ulsch_pdu->ulsch_pdu_rel8.number_of_resource_blocks; - AssertFatal(ulsch->harq_processes[harq_pid]->nb_rb>0,"nb_rb = 0\n"); + AssertFatal (ulsch->harq_processes[harq_pid]->nb_rb > 0, "nb_rb = 0\n"); - ulsch->harq_processes[harq_pid]->dci_alloc = 1; - ulsch->harq_processes[harq_pid]->rar_alloc = 0; - ulsch->harq_processes[harq_pid]->n_DMRS = ulsch_pdu->ulsch_pdu_rel8.cyclic_shift_2_for_drms; + ulsch->harq_processes[harq_pid]->dci_alloc = 1; + ulsch->harq_processes[harq_pid]->rar_alloc = 0; + ulsch->harq_processes[harq_pid]->n_DMRS = ulsch_pdu->ulsch_pdu_rel8.cyclic_shift_2_for_drms; - ulsch->harq_processes[harq_pid]->Nsymb_pusch = 12-(frame_parms->Ncp<<1)-(use_srs==0?0:1); - ulsch->harq_processes[harq_pid]->srs_active = use_srs; + ulsch->harq_processes[harq_pid]->Nsymb_pusch = 12 - (frame_parms->Ncp << 1) - (use_srs == 0 ? 0 : 1); + ulsch->harq_processes[harq_pid]->srs_active = use_srs; //Mapping of cyclic shift field in DCI format0 to n_DMRS2 (3GPP 36.211, Table 5.5.2.1.1-1) - if(ulsch->harq_processes[harq_pid]->n_DMRS == 0) + if (ulsch->harq_processes[harq_pid]->n_DMRS == 0) ulsch->harq_processes[harq_pid]->n_DMRS2 = 0; - else if(ulsch->harq_processes[harq_pid]->n_DMRS == 1) + else if (ulsch->harq_processes[harq_pid]->n_DMRS == 1) ulsch->harq_processes[harq_pid]->n_DMRS2 = 6; - else if(ulsch->harq_processes[harq_pid]->n_DMRS == 2) + else if (ulsch->harq_processes[harq_pid]->n_DMRS == 2) ulsch->harq_processes[harq_pid]->n_DMRS2 = 3; - else if(ulsch->harq_processes[harq_pid]->n_DMRS == 3) + else if (ulsch->harq_processes[harq_pid]->n_DMRS == 3) ulsch->harq_processes[harq_pid]->n_DMRS2 = 4; - else if(ulsch->harq_processes[harq_pid]->n_DMRS == 4) + else if (ulsch->harq_processes[harq_pid]->n_DMRS == 4) ulsch->harq_processes[harq_pid]->n_DMRS2 = 2; - else if(ulsch->harq_processes[harq_pid]->n_DMRS == 5) + else if (ulsch->harq_processes[harq_pid]->n_DMRS == 5) ulsch->harq_processes[harq_pid]->n_DMRS2 = 8; - else if(ulsch->harq_processes[harq_pid]->n_DMRS == 6) + else if (ulsch->harq_processes[harq_pid]->n_DMRS == 6) ulsch->harq_processes[harq_pid]->n_DMRS2 = 10; - else if(ulsch->harq_processes[harq_pid]->n_DMRS == 7) + else if (ulsch->harq_processes[harq_pid]->n_DMRS == 7) ulsch->harq_processes[harq_pid]->n_DMRS2 = 9; - LOG_D(PHY,"[eNB %d][PUSCH %d] Programming PUSCH with n_DMRS2 %d (cshift %d) for Frame %d, Subframe %d\n", - eNB->Mod_id,harq_pid,ulsch->harq_processes[harq_pid]->n_DMRS2,ulsch->harq_processes[harq_pid]->n_DMRS, - frame,subframe); + LOG_D (PHY, "[eNB %d][PUSCH %d] Programming PUSCH with n_DMRS2 %d (cshift %d) for Frame %d, Subframe %d\n", + eNB->Mod_id, harq_pid, ulsch->harq_processes[harq_pid]->n_DMRS2, ulsch->harq_processes[harq_pid]->n_DMRS, frame, subframe); ulsch->harq_processes[harq_pid]->rvidx = ulsch_pdu->ulsch_pdu_rel8.redundancy_version; - ulsch->harq_processes[harq_pid]->Qm = ulsch_pdu->ulsch_pdu_rel8.modulation_type; + ulsch->harq_processes[harq_pid]->Qm = ulsch_pdu->ulsch_pdu_rel8.modulation_type; // Set O_ACK to 0 by default, will be set of DLSCH is scheduled and needs to be - ulsch->harq_processes[harq_pid]->O_ACK = 0; + ulsch->harq_processes[harq_pid]->O_ACK = 0; - if ((ulsch->harq_processes[harq_pid]->status == SCH_IDLE) || - (ulsch->harq_processes[harq_pid]->ndi != ulsch_pdu->ulsch_pdu_rel8.new_data_indication) || - (new_ulsch == TRUE)){ - ulsch->harq_processes[harq_pid]->status = ACTIVE; + if ((ulsch->harq_processes[harq_pid]->status == SCH_IDLE) || (ulsch->harq_processes[harq_pid]->ndi != ulsch_pdu->ulsch_pdu_rel8.new_data_indication) || (new_ulsch == TRUE)) { + ulsch->harq_processes[harq_pid]->status = ACTIVE; - ulsch->harq_processes[harq_pid]->TBS = ulsch_pdu->ulsch_pdu_rel8.size<<3; + ulsch->harq_processes[harq_pid]->TBS = ulsch_pdu->ulsch_pdu_rel8.size << 3; - ulsch->harq_processes[harq_pid]->Msc_initial = 12*ulsch_pdu->ulsch_pdu_rel8.number_of_resource_blocks; + ulsch->harq_processes[harq_pid]->Msc_initial = 12 * ulsch_pdu->ulsch_pdu_rel8.number_of_resource_blocks; ulsch->harq_processes[harq_pid]->Nsymb_initial = ulsch->harq_processes[harq_pid]->Nsymb_pusch; - ulsch->harq_processes[harq_pid]->round = 0; - ulsch->harq_processes[harq_pid]->ndi = ulsch_pdu->ulsch_pdu_rel8.new_data_indication; + ulsch->harq_processes[harq_pid]->round = 0; + ulsch->harq_processes[harq_pid]->ndi = ulsch_pdu->ulsch_pdu_rel8.new_data_indication; // note here, the CQI bits need to be kept constant as in initial transmission // set to 0 in initial transmission, and don't touch them during retransmissions // will be set if MAC has activated ULSCH_CQI_RI_PDU or ULSCH_CQI_HARQ_RI_PDU - ulsch->harq_processes[harq_pid]->Or1 = 0; - ulsch->harq_processes[harq_pid]->Or2 = 0; - } - else ulsch->harq_processes[harq_pid]->round++; + ulsch->harq_processes[harq_pid]->Or1 = 0; + ulsch->harq_processes[harq_pid]->Or2 = 0; + } else + ulsch->harq_processes[harq_pid]->round++; ulsch->rnti = ulsch_pdu->ulsch_pdu_rel8.rnti; - LOG_D(PHY,"Filling ULSCH %x (UE_id %d) (new_ulsch %d) for Frame %d, Subframe %d : harq_pid %d, first_rb %d, nb_rb %d, rvidx %d, Qm %d, TBS %d, round %d \n", - ulsch->rnti, - UE_id, - new_ulsch, - frame, - subframe, - harq_pid, - ulsch->harq_processes[harq_pid]->first_rb, - ulsch->harq_processes[harq_pid]->nb_rb, - ulsch->harq_processes[harq_pid]->rvidx, - ulsch->harq_processes[harq_pid]->Qm, - ulsch->harq_processes[harq_pid]->TBS, - ulsch->harq_processes[harq_pid]->round); + LOG_D (PHY, "Filling ULSCH %x (UE_id %d) (new_ulsch %d) for Frame %d, Subframe %d : harq_pid %d, first_rb %d, nb_rb %d, rvidx %d, Qm %d, TBS %d, round %d \n", + ulsch->rnti, + UE_id, + new_ulsch, + frame, + subframe, + harq_pid, + ulsch->harq_processes[harq_pid]->first_rb, + ulsch->harq_processes[harq_pid]->nb_rb, + ulsch->harq_processes[harq_pid]->rvidx, ulsch->harq_processes[harq_pid]->Qm, ulsch->harq_processes[harq_pid]->TBS, ulsch->harq_processes[harq_pid]->round); } -int dump_dci(LTE_DL_FRAME_PARMS *frame_parms, DCI_ALLOC_t *dci) +int +dump_dci (LTE_DL_FRAME_PARMS * frame_parms, DCI_ALLOC_t * dci) { switch (dci->format) { - case format0: // This is an UL SCH allocation so nothing here, inform MAC - if ((frame_parms->frame_type == TDD) && - (frame_parms->tdd_config>0)) - switch(frame_parms->N_RB_DL) { + case format0: // This is an UL SCH allocation so nothing here, inform MAC + if ((frame_parms->frame_type == TDD) && (frame_parms->tdd_config > 0)) + switch (frame_parms->N_RB_DL) { case 6: - LOG_D(PHY,"DCI format0 (TDD, 1.5MHz), rnti %x (%x): hopping %d, rb_alloc %x, mcs %d, ndi %d, TPC %d, cshift %d, dai %d, cqi_req %d\n", - dci->rnti, - ((uint32_t*)&dci->dci_pdu[0])[0], - ((DCI0_1_5MHz_TDD_1_6_t *)&dci->dci_pdu[0])->hopping, - ((DCI0_1_5MHz_TDD_1_6_t *)&dci->dci_pdu[0])->rballoc, - ((DCI0_1_5MHz_TDD_1_6_t *)&dci->dci_pdu[0])->mcs, - ((DCI0_1_5MHz_TDD_1_6_t *)&dci->dci_pdu[0])->ndi, - ((DCI0_1_5MHz_TDD_1_6_t *)&dci->dci_pdu[0])->TPC, - ((DCI0_1_5MHz_TDD_1_6_t *)&dci->dci_pdu[0])->cshift, - ((DCI0_1_5MHz_TDD_1_6_t *)&dci->dci_pdu[0])->dai, - ((DCI0_1_5MHz_TDD_1_6_t *)&dci->dci_pdu[0])->cqi_req); + LOG_D (PHY, "DCI format0 (TDD, 1.5MHz), rnti %x (%x): hopping %d, rb_alloc %x, mcs %d, ndi %d, TPC %d, cshift %d, dai %d, cqi_req %d\n", + dci->rnti, + ((uint32_t *) & dci->dci_pdu[0])[0], + ((DCI0_1_5MHz_TDD_1_6_t *) & dci->dci_pdu[0])->hopping, + ((DCI0_1_5MHz_TDD_1_6_t *) & dci->dci_pdu[0])->rballoc, + ((DCI0_1_5MHz_TDD_1_6_t *) & dci->dci_pdu[0])->mcs, + ((DCI0_1_5MHz_TDD_1_6_t *) & dci->dci_pdu[0])->ndi, + ((DCI0_1_5MHz_TDD_1_6_t *) & dci->dci_pdu[0])->TPC, + ((DCI0_1_5MHz_TDD_1_6_t *) & dci->dci_pdu[0])->cshift, ((DCI0_1_5MHz_TDD_1_6_t *) & dci->dci_pdu[0])->dai, ((DCI0_1_5MHz_TDD_1_6_t *) & dci->dci_pdu[0])->cqi_req); break; case 25: - LOG_D(PHY,"DCI format0 (TDD1-6, 5MHz), rnti %x (%x): hopping %d, rb_alloc %x, mcs %d, ndi %d, TPC %d, cshift %d, dai %d, cqi_req %d\n", - dci->rnti, - ((uint32_t*)&dci->dci_pdu[0])[0], - ((DCI0_5MHz_TDD_1_6_t *)&dci->dci_pdu[0])->hopping, - ((DCI0_5MHz_TDD_1_6_t *)&dci->dci_pdu[0])->rballoc, - ((DCI0_5MHz_TDD_1_6_t *)&dci->dci_pdu[0])->mcs, - ((DCI0_5MHz_TDD_1_6_t *)&dci->dci_pdu[0])->ndi, - ((DCI0_5MHz_TDD_1_6_t *)&dci->dci_pdu[0])->TPC, - ((DCI0_5MHz_TDD_1_6_t *)&dci->dci_pdu[0])->cshift, - ((DCI0_5MHz_TDD_1_6_t *)&dci->dci_pdu[0])->dai, - ((DCI0_5MHz_TDD_1_6_t *)&dci->dci_pdu[0])->cqi_req); + LOG_D (PHY, "DCI format0 (TDD1-6, 5MHz), rnti %x (%x): hopping %d, rb_alloc %x, mcs %d, ndi %d, TPC %d, cshift %d, dai %d, cqi_req %d\n", + dci->rnti, + ((uint32_t *) & dci->dci_pdu[0])[0], + ((DCI0_5MHz_TDD_1_6_t *) & dci->dci_pdu[0])->hopping, + ((DCI0_5MHz_TDD_1_6_t *) & dci->dci_pdu[0])->rballoc, + ((DCI0_5MHz_TDD_1_6_t *) & dci->dci_pdu[0])->mcs, + ((DCI0_5MHz_TDD_1_6_t *) & dci->dci_pdu[0])->ndi, + ((DCI0_5MHz_TDD_1_6_t *) & dci->dci_pdu[0])->TPC, + ((DCI0_5MHz_TDD_1_6_t *) & dci->dci_pdu[0])->cshift, ((DCI0_5MHz_TDD_1_6_t *) & dci->dci_pdu[0])->dai, ((DCI0_5MHz_TDD_1_6_t *) & dci->dci_pdu[0])->cqi_req); break; case 50: - LOG_D(PHY,"DCI format0 (TDD1-6, 10MHz), rnti %x (%x): hopping %d, rb_alloc %x, mcs %d, ndi %d, TPC %d, cshift %d, dai %d, cqi_req %d\n", - dci->rnti, - ((uint32_t*)&dci->dci_pdu[0])[0], - ((DCI0_10MHz_TDD_1_6_t *)&dci->dci_pdu[0])->hopping, - ((DCI0_10MHz_TDD_1_6_t *)&dci->dci_pdu[0])->rballoc, - ((DCI0_10MHz_TDD_1_6_t *)&dci->dci_pdu[0])->mcs, - ((DCI0_10MHz_TDD_1_6_t *)&dci->dci_pdu[0])->ndi, - ((DCI0_10MHz_TDD_1_6_t *)&dci->dci_pdu[0])->TPC, - ((DCI0_10MHz_TDD_1_6_t *)&dci->dci_pdu[0])->cshift, - ((DCI0_10MHz_TDD_1_6_t *)&dci->dci_pdu[0])->dai, - ((DCI0_10MHz_TDD_1_6_t *)&dci->dci_pdu[0])->cqi_req); + LOG_D (PHY, "DCI format0 (TDD1-6, 10MHz), rnti %x (%x): hopping %d, rb_alloc %x, mcs %d, ndi %d, TPC %d, cshift %d, dai %d, cqi_req %d\n", + dci->rnti, + ((uint32_t *) & dci->dci_pdu[0])[0], + ((DCI0_10MHz_TDD_1_6_t *) & dci->dci_pdu[0])->hopping, + ((DCI0_10MHz_TDD_1_6_t *) & dci->dci_pdu[0])->rballoc, + ((DCI0_10MHz_TDD_1_6_t *) & dci->dci_pdu[0])->mcs, + ((DCI0_10MHz_TDD_1_6_t *) & dci->dci_pdu[0])->ndi, + ((DCI0_10MHz_TDD_1_6_t *) & dci->dci_pdu[0])->TPC, + ((DCI0_10MHz_TDD_1_6_t *) & dci->dci_pdu[0])->cshift, ((DCI0_10MHz_TDD_1_6_t *) & dci->dci_pdu[0])->dai, ((DCI0_10MHz_TDD_1_6_t *) & dci->dci_pdu[0])->cqi_req); break; case 100: - LOG_D(PHY,"DCI format0 (TDD1-6, 20MHz), rnti %x (%x): hopping %d, rb_alloc %x, mcs %d, ndi %d, TPC %d, cshift %d, dai %d, cqi_req %d\n", - dci->rnti, - ((uint32_t*)&dci->dci_pdu[0])[0], - ((DCI0_20MHz_TDD_1_6_t *)&dci->dci_pdu[0])->hopping, - ((DCI0_20MHz_TDD_1_6_t *)&dci->dci_pdu[0])->rballoc, - ((DCI0_20MHz_TDD_1_6_t *)&dci->dci_pdu[0])->mcs, - ((DCI0_20MHz_TDD_1_6_t *)&dci->dci_pdu[0])->ndi, - ((DCI0_20MHz_TDD_1_6_t *)&dci->dci_pdu[0])->TPC, - ((DCI0_20MHz_TDD_1_6_t *)&dci->dci_pdu[0])->cshift, - ((DCI0_20MHz_TDD_1_6_t *)&dci->dci_pdu[0])->dai, - ((DCI0_20MHz_TDD_1_6_t *)&dci->dci_pdu[0])->cqi_req); + LOG_D (PHY, "DCI format0 (TDD1-6, 20MHz), rnti %x (%x): hopping %d, rb_alloc %x, mcs %d, ndi %d, TPC %d, cshift %d, dai %d, cqi_req %d\n", + dci->rnti, + ((uint32_t *) & dci->dci_pdu[0])[0], + ((DCI0_20MHz_TDD_1_6_t *) & dci->dci_pdu[0])->hopping, + ((DCI0_20MHz_TDD_1_6_t *) & dci->dci_pdu[0])->rballoc, + ((DCI0_20MHz_TDD_1_6_t *) & dci->dci_pdu[0])->mcs, + ((DCI0_20MHz_TDD_1_6_t *) & dci->dci_pdu[0])->ndi, + ((DCI0_20MHz_TDD_1_6_t *) & dci->dci_pdu[0])->TPC, + ((DCI0_20MHz_TDD_1_6_t *) & dci->dci_pdu[0])->cshift, ((DCI0_20MHz_TDD_1_6_t *) & dci->dci_pdu[0])->dai, ((DCI0_20MHz_TDD_1_6_t *) & dci->dci_pdu[0])->cqi_req); break; default: - LOG_E(PHY,"Invalid N_RB_DL %d\n", frame_parms->N_RB_DL); + LOG_E (PHY, "Invalid N_RB_DL %d\n", frame_parms->N_RB_DL); DevParam (frame_parms->N_RB_DL, 0, 0); break; - } - else if (frame_parms->frame_type == FDD) - switch(frame_parms->N_RB_DL) { + } else if (frame_parms->frame_type == FDD) + switch (frame_parms->N_RB_DL) { case 6: - LOG_D(PHY,"DCI format0 (FDD, 1.5MHz), rnti %x (%x): hopping %d, rb_alloc %x, mcs %d, ndi %d, TPC %d, cshift %d, cqi_req %d\n", - dci->rnti, - ((uint32_t*)&dci->dci_pdu[0])[0], - ((DCI0_1_5MHz_FDD_t *)&dci->dci_pdu[0])->hopping, - ((DCI0_1_5MHz_FDD_t *)&dci->dci_pdu[0])->rballoc, - ((DCI0_1_5MHz_FDD_t *)&dci->dci_pdu[0])->mcs, - ((DCI0_1_5MHz_FDD_t *)&dci->dci_pdu[0])->ndi, - ((DCI0_1_5MHz_FDD_t *)&dci->dci_pdu[0])->TPC, - ((DCI0_1_5MHz_FDD_t *)&dci->dci_pdu[0])->cshift, - ((DCI0_1_5MHz_FDD_t *)&dci->dci_pdu[0])->cqi_req); + LOG_D (PHY, "DCI format0 (FDD, 1.5MHz), rnti %x (%x): hopping %d, rb_alloc %x, mcs %d, ndi %d, TPC %d, cshift %d, cqi_req %d\n", + dci->rnti, + ((uint32_t *) & dci->dci_pdu[0])[0], + ((DCI0_1_5MHz_FDD_t *) & dci->dci_pdu[0])->hopping, + ((DCI0_1_5MHz_FDD_t *) & dci->dci_pdu[0])->rballoc, + ((DCI0_1_5MHz_FDD_t *) & dci->dci_pdu[0])->mcs, + ((DCI0_1_5MHz_FDD_t *) & dci->dci_pdu[0])->ndi, + ((DCI0_1_5MHz_FDD_t *) & dci->dci_pdu[0])->TPC, ((DCI0_1_5MHz_FDD_t *) & dci->dci_pdu[0])->cshift, ((DCI0_1_5MHz_FDD_t *) & dci->dci_pdu[0])->cqi_req); break; case 25: - LOG_D(PHY,"DCI format0 (FDD, 5MHz), rnti %x (%x): hopping %d, rb_alloc %x, mcs %d, ndi %d, TPC %d, cshift %d, cqi_req %d\n", - dci->rnti, - ((uint32_t*)&dci->dci_pdu[0])[0], - ((DCI0_5MHz_FDD_t *)&dci->dci_pdu[0])->hopping, - ((DCI0_5MHz_FDD_t *)&dci->dci_pdu[0])->rballoc, - ((DCI0_5MHz_FDD_t *)&dci->dci_pdu[0])->mcs, - ((DCI0_5MHz_FDD_t *)&dci->dci_pdu[0])->ndi, - ((DCI0_5MHz_FDD_t *)&dci->dci_pdu[0])->TPC, - ((DCI0_5MHz_FDD_t *)&dci->dci_pdu[0])->cshift, - ((DCI0_5MHz_FDD_t *)&dci->dci_pdu[0])->cqi_req); + LOG_D (PHY, "DCI format0 (FDD, 5MHz), rnti %x (%x): hopping %d, rb_alloc %x, mcs %d, ndi %d, TPC %d, cshift %d, cqi_req %d\n", + dci->rnti, + ((uint32_t *) & dci->dci_pdu[0])[0], + ((DCI0_5MHz_FDD_t *) & dci->dci_pdu[0])->hopping, + ((DCI0_5MHz_FDD_t *) & dci->dci_pdu[0])->rballoc, + ((DCI0_5MHz_FDD_t *) & dci->dci_pdu[0])->mcs, + ((DCI0_5MHz_FDD_t *) & dci->dci_pdu[0])->ndi, + ((DCI0_5MHz_FDD_t *) & dci->dci_pdu[0])->TPC, ((DCI0_5MHz_FDD_t *) & dci->dci_pdu[0])->cshift, ((DCI0_5MHz_FDD_t *) & dci->dci_pdu[0])->cqi_req); break; case 50: - LOG_D(PHY,"DCI format0 (FDD, 10MHz), rnti %x (%x): hopping %d, rb_alloc %x, mcs %d, ndi %d, TPC %d, cshift %d, cqi_req %d\n", - dci->rnti, - ((uint32_t*)&dci->dci_pdu[0])[0], - ((DCI0_10MHz_FDD_t *)&dci->dci_pdu[0])->hopping, - ((DCI0_10MHz_FDD_t *)&dci->dci_pdu[0])->rballoc, - ((DCI0_10MHz_FDD_t *)&dci->dci_pdu[0])->mcs, - ((DCI0_10MHz_FDD_t *)&dci->dci_pdu[0])->ndi, - ((DCI0_10MHz_FDD_t *)&dci->dci_pdu[0])->TPC, - ((DCI0_10MHz_FDD_t *)&dci->dci_pdu[0])->cshift, - ((DCI0_10MHz_FDD_t *)&dci->dci_pdu[0])->cqi_req); + LOG_D (PHY, "DCI format0 (FDD, 10MHz), rnti %x (%x): hopping %d, rb_alloc %x, mcs %d, ndi %d, TPC %d, cshift %d, cqi_req %d\n", + dci->rnti, + ((uint32_t *) & dci->dci_pdu[0])[0], + ((DCI0_10MHz_FDD_t *) & dci->dci_pdu[0])->hopping, + ((DCI0_10MHz_FDD_t *) & dci->dci_pdu[0])->rballoc, + ((DCI0_10MHz_FDD_t *) & dci->dci_pdu[0])->mcs, + ((DCI0_10MHz_FDD_t *) & dci->dci_pdu[0])->ndi, + ((DCI0_10MHz_FDD_t *) & dci->dci_pdu[0])->TPC, ((DCI0_10MHz_FDD_t *) & dci->dci_pdu[0])->cshift, ((DCI0_10MHz_FDD_t *) & dci->dci_pdu[0])->cqi_req); break; case 100: - LOG_D(PHY,"DCI format0 (FDD, 20MHz), rnti %x (%x): hopping %d, rb_alloc %x, mcs %d, ndi %d, TPC %d, cshift %d, cqi_req %d\n", - dci->rnti, - ((uint32_t*)&dci->dci_pdu[0])[0], - ((DCI0_20MHz_FDD_t *)&dci->dci_pdu[0])->hopping, - ((DCI0_20MHz_FDD_t *)&dci->dci_pdu[0])->rballoc, - ((DCI0_20MHz_FDD_t *)&dci->dci_pdu[0])->mcs, - ((DCI0_20MHz_FDD_t *)&dci->dci_pdu[0])->ndi, - ((DCI0_20MHz_FDD_t *)&dci->dci_pdu[0])->TPC, - ((DCI0_20MHz_FDD_t *)&dci->dci_pdu[0])->cshift, - ((DCI0_20MHz_FDD_t *)&dci->dci_pdu[0])->cqi_req); + LOG_D (PHY, "DCI format0 (FDD, 20MHz), rnti %x (%x): hopping %d, rb_alloc %x, mcs %d, ndi %d, TPC %d, cshift %d, cqi_req %d\n", + dci->rnti, + ((uint32_t *) & dci->dci_pdu[0])[0], + ((DCI0_20MHz_FDD_t *) & dci->dci_pdu[0])->hopping, + ((DCI0_20MHz_FDD_t *) & dci->dci_pdu[0])->rballoc, + ((DCI0_20MHz_FDD_t *) & dci->dci_pdu[0])->mcs, + ((DCI0_20MHz_FDD_t *) & dci->dci_pdu[0])->ndi, + ((DCI0_20MHz_FDD_t *) & dci->dci_pdu[0])->TPC, ((DCI0_20MHz_FDD_t *) & dci->dci_pdu[0])->cshift, ((DCI0_20MHz_FDD_t *) & dci->dci_pdu[0])->cqi_req); break; default: - LOG_E(PHY,"Invalid N_RB_DL %d\n", frame_parms->N_RB_DL); + LOG_E (PHY, "Invalid N_RB_DL %d\n", frame_parms->N_RB_DL); DevParam (frame_parms->N_RB_DL, 0, 0); break; - } - else - LOG_E(PHY,"Don't know how to handle TDD format 0 yet\n"); + } else + LOG_E (PHY, "Don't know how to handle TDD format 0 yet\n"); break; case format1: - if ((frame_parms->frame_type == TDD) && - (frame_parms->tdd_config>0)) + if ((frame_parms->frame_type == TDD) && (frame_parms->tdd_config > 0)) - switch(frame_parms->N_RB_DL) { + switch (frame_parms->N_RB_DL) { case 6: - LOG_D(PHY,"DCI format1 (TDD 1.5 MHz), rnti %x (%x): rah %d, rb_alloc %x, mcs %d, harq_pid %d, ndi %d, RV %d, TPC %d, dai %d\n", - dci->rnti, - ((uint32_t*)&dci->dci_pdu)[0], - ((DCI1_1_5MHz_TDD_t *)&dci->dci_pdu[0])->rah, - ((DCI1_1_5MHz_TDD_t *)&dci->dci_pdu[0])->rballoc, - ((DCI1_1_5MHz_TDD_t *)&dci->dci_pdu[0])->mcs, - ((DCI1_1_5MHz_TDD_t *)&dci->dci_pdu[0])->harq_pid, - ((DCI1_1_5MHz_TDD_t *)&dci->dci_pdu[0])->ndi, - ((DCI1_1_5MHz_TDD_t *)&dci->dci_pdu[0])->rv, - ((DCI1_1_5MHz_TDD_t *)&dci->dci_pdu[0])->TPC, - ((DCI1_1_5MHz_TDD_t *)&dci->dci_pdu[0])->dai); + LOG_D (PHY, "DCI format1 (TDD 1.5 MHz), rnti %x (%x): rah %d, rb_alloc %x, mcs %d, harq_pid %d, ndi %d, RV %d, TPC %d, dai %d\n", + dci->rnti, + ((uint32_t *) & dci->dci_pdu)[0], + ((DCI1_1_5MHz_TDD_t *) & dci->dci_pdu[0])->rah, + ((DCI1_1_5MHz_TDD_t *) & dci->dci_pdu[0])->rballoc, + ((DCI1_1_5MHz_TDD_t *) & dci->dci_pdu[0])->mcs, + ((DCI1_1_5MHz_TDD_t *) & dci->dci_pdu[0])->harq_pid, + ((DCI1_1_5MHz_TDD_t *) & dci->dci_pdu[0])->ndi, + ((DCI1_1_5MHz_TDD_t *) & dci->dci_pdu[0])->rv, ((DCI1_1_5MHz_TDD_t *) & dci->dci_pdu[0])->TPC, ((DCI1_1_5MHz_TDD_t *) & dci->dci_pdu[0])->dai); break; case 25: - LOG_D(PHY,"DCI format1 (TDD 5 MHz), rnti %x (%x): rah %d, rb_alloc %x, mcs %d, harq_pid %d, ndi %d, RV %d, TPC %d, dai %d\n", - dci->rnti, - ((uint32_t*)&dci->dci_pdu)[0], - ((DCI1_5MHz_TDD_t *)&dci->dci_pdu[0])->rah, - ((DCI1_5MHz_TDD_t *)&dci->dci_pdu[0])->rballoc, - ((DCI1_5MHz_TDD_t *)&dci->dci_pdu[0])->mcs, - ((DCI1_5MHz_TDD_t *)&dci->dci_pdu[0])->harq_pid, - ((DCI1_5MHz_TDD_t *)&dci->dci_pdu[0])->ndi, - ((DCI1_5MHz_TDD_t *)&dci->dci_pdu[0])->rv, - ((DCI1_5MHz_TDD_t *)&dci->dci_pdu[0])->TPC, - ((DCI1_5MHz_TDD_t *)&dci->dci_pdu[0])->dai); + LOG_D (PHY, "DCI format1 (TDD 5 MHz), rnti %x (%x): rah %d, rb_alloc %x, mcs %d, harq_pid %d, ndi %d, RV %d, TPC %d, dai %d\n", + dci->rnti, + ((uint32_t *) & dci->dci_pdu)[0], + ((DCI1_5MHz_TDD_t *) & dci->dci_pdu[0])->rah, + ((DCI1_5MHz_TDD_t *) & dci->dci_pdu[0])->rballoc, + ((DCI1_5MHz_TDD_t *) & dci->dci_pdu[0])->mcs, + ((DCI1_5MHz_TDD_t *) & dci->dci_pdu[0])->harq_pid, + ((DCI1_5MHz_TDD_t *) & dci->dci_pdu[0])->ndi, ((DCI1_5MHz_TDD_t *) & dci->dci_pdu[0])->rv, ((DCI1_5MHz_TDD_t *) & dci->dci_pdu[0])->TPC, ((DCI1_5MHz_TDD_t *) & dci->dci_pdu[0])->dai); break; case 50: - LOG_D(PHY,"DCI format1 (TDD 10 MHz), rnti %x (%x): rah %d, rb_alloc %x, mcs %d, harq_pid %d, ndi %d, RV %d, TPC %d, dai %d\n", - dci->rnti, - ((uint32_t*)&dci->dci_pdu)[0], - ((DCI1_10MHz_TDD_t *)&dci->dci_pdu[0])->rah, - ((DCI1_10MHz_TDD_t *)&dci->dci_pdu[0])->rballoc, - ((DCI1_10MHz_TDD_t *)&dci->dci_pdu[0])->mcs, - ((DCI1_10MHz_TDD_t *)&dci->dci_pdu[0])->harq_pid, - ((DCI1_10MHz_TDD_t *)&dci->dci_pdu[0])->ndi, - ((DCI1_10MHz_TDD_t *)&dci->dci_pdu[0])->rv, - ((DCI1_10MHz_TDD_t *)&dci->dci_pdu[0])->TPC, - ((DCI1_10MHz_TDD_t *)&dci->dci_pdu[0])->dai); + LOG_D (PHY, "DCI format1 (TDD 10 MHz), rnti %x (%x): rah %d, rb_alloc %x, mcs %d, harq_pid %d, ndi %d, RV %d, TPC %d, dai %d\n", + dci->rnti, + ((uint32_t *) & dci->dci_pdu)[0], + ((DCI1_10MHz_TDD_t *) & dci->dci_pdu[0])->rah, + ((DCI1_10MHz_TDD_t *) & dci->dci_pdu[0])->rballoc, + ((DCI1_10MHz_TDD_t *) & dci->dci_pdu[0])->mcs, + ((DCI1_10MHz_TDD_t *) & dci->dci_pdu[0])->harq_pid, + ((DCI1_10MHz_TDD_t *) & dci->dci_pdu[0])->ndi, + ((DCI1_10MHz_TDD_t *) & dci->dci_pdu[0])->rv, ((DCI1_10MHz_TDD_t *) & dci->dci_pdu[0])->TPC, ((DCI1_10MHz_TDD_t *) & dci->dci_pdu[0])->dai); break; case 100: - LOG_D(PHY,"DCI format1 (TDD 20 MHz), rnti %x (%x): rah %d, rb_alloc %x, mcs %d, harq_pid %d, ndi %d, RV %d, TPC %d, dai %d\n", - dci->rnti, - ((uint32_t*)&dci->dci_pdu)[0], - ((DCI1_20MHz_TDD_t *)&dci->dci_pdu[0])->rah, - ((DCI1_20MHz_TDD_t *)&dci->dci_pdu[0])->rballoc, - ((DCI1_20MHz_TDD_t *)&dci->dci_pdu[0])->mcs, - ((DCI1_20MHz_TDD_t *)&dci->dci_pdu[0])->harq_pid, - ((DCI1_20MHz_TDD_t *)&dci->dci_pdu[0])->ndi, - ((DCI1_20MHz_TDD_t *)&dci->dci_pdu[0])->rv, - ((DCI1_20MHz_TDD_t *)&dci->dci_pdu[0])->TPC, - ((DCI1_20MHz_TDD_t *)&dci->dci_pdu[0])->dai); + LOG_D (PHY, "DCI format1 (TDD 20 MHz), rnti %x (%x): rah %d, rb_alloc %x, mcs %d, harq_pid %d, ndi %d, RV %d, TPC %d, dai %d\n", + dci->rnti, + ((uint32_t *) & dci->dci_pdu)[0], + ((DCI1_20MHz_TDD_t *) & dci->dci_pdu[0])->rah, + ((DCI1_20MHz_TDD_t *) & dci->dci_pdu[0])->rballoc, + ((DCI1_20MHz_TDD_t *) & dci->dci_pdu[0])->mcs, + ((DCI1_20MHz_TDD_t *) & dci->dci_pdu[0])->harq_pid, + ((DCI1_20MHz_TDD_t *) & dci->dci_pdu[0])->ndi, + ((DCI1_20MHz_TDD_t *) & dci->dci_pdu[0])->rv, ((DCI1_20MHz_TDD_t *) & dci->dci_pdu[0])->TPC, ((DCI1_20MHz_TDD_t *) & dci->dci_pdu[0])->dai); break; default: - LOG_E(PHY,"Invalid N_RB_DL %d\n", frame_parms->N_RB_DL); + LOG_E (PHY, "Invalid N_RB_DL %d\n", frame_parms->N_RB_DL); DevParam (frame_parms->N_RB_DL, 0, 0); break; - } - else if (frame_parms->frame_type == FDD) { - switch(frame_parms->N_RB_DL) { + } else if (frame_parms->frame_type == FDD) { + switch (frame_parms->N_RB_DL) { case 6: - LOG_D(PHY,"DCI format1 (FDD, 1.5 MHz), rnti %x (%x): rah %d, rb_alloc %x, mcs %d, harq_pid %d, ndi %d, RV %d, TPC %d\n", - dci->rnti, - ((uint32_t*)&dci->dci_pdu)[0], - ((DCI1_1_5MHz_FDD_t *)&dci->dci_pdu[0])->rah, - ((DCI1_1_5MHz_FDD_t *)&dci->dci_pdu[0])->rballoc, - ((DCI1_1_5MHz_FDD_t *)&dci->dci_pdu[0])->mcs, - ((DCI1_1_5MHz_FDD_t *)&dci->dci_pdu[0])->harq_pid, - ((DCI1_1_5MHz_FDD_t *)&dci->dci_pdu[0])->ndi, - ((DCI1_1_5MHz_FDD_t *)&dci->dci_pdu[0])->rv, - ((DCI1_1_5MHz_FDD_t *)&dci->dci_pdu[0])->TPC); + LOG_D (PHY, "DCI format1 (FDD, 1.5 MHz), rnti %x (%x): rah %d, rb_alloc %x, mcs %d, harq_pid %d, ndi %d, RV %d, TPC %d\n", + dci->rnti, + ((uint32_t *) & dci->dci_pdu)[0], + ((DCI1_1_5MHz_FDD_t *) & dci->dci_pdu[0])->rah, + ((DCI1_1_5MHz_FDD_t *) & dci->dci_pdu[0])->rballoc, + ((DCI1_1_5MHz_FDD_t *) & dci->dci_pdu[0])->mcs, + ((DCI1_1_5MHz_FDD_t *) & dci->dci_pdu[0])->harq_pid, + ((DCI1_1_5MHz_FDD_t *) & dci->dci_pdu[0])->ndi, ((DCI1_1_5MHz_FDD_t *) & dci->dci_pdu[0])->rv, ((DCI1_1_5MHz_FDD_t *) & dci->dci_pdu[0])->TPC); break; case 25: - LOG_D(PHY,"DCI format1 (FDD, 5 MHz), rnti %x (%x): rah %d, rb_alloc %x, mcs %d, harq_pid %d, ndi %d, RV %d, TPC %d\n", - dci->rnti, - ((uint32_t*)&dci->dci_pdu)[0], - ((DCI1_5MHz_FDD_t *)&dci->dci_pdu[0])->rah, - ((DCI1_5MHz_FDD_t *)&dci->dci_pdu[0])->rballoc, - ((DCI1_5MHz_FDD_t *)&dci->dci_pdu[0])->mcs, - ((DCI1_5MHz_FDD_t *)&dci->dci_pdu[0])->harq_pid, - ((DCI1_5MHz_FDD_t *)&dci->dci_pdu[0])->ndi, - ((DCI1_5MHz_FDD_t *)&dci->dci_pdu[0])->rv, - ((DCI1_5MHz_FDD_t *)&dci->dci_pdu[0])->TPC); + LOG_D (PHY, "DCI format1 (FDD, 5 MHz), rnti %x (%x): rah %d, rb_alloc %x, mcs %d, harq_pid %d, ndi %d, RV %d, TPC %d\n", + dci->rnti, + ((uint32_t *) & dci->dci_pdu)[0], + ((DCI1_5MHz_FDD_t *) & dci->dci_pdu[0])->rah, + ((DCI1_5MHz_FDD_t *) & dci->dci_pdu[0])->rballoc, + ((DCI1_5MHz_FDD_t *) & dci->dci_pdu[0])->mcs, + ((DCI1_5MHz_FDD_t *) & dci->dci_pdu[0])->harq_pid, + ((DCI1_5MHz_FDD_t *) & dci->dci_pdu[0])->ndi, ((DCI1_5MHz_FDD_t *) & dci->dci_pdu[0])->rv, ((DCI1_5MHz_FDD_t *) & dci->dci_pdu[0])->TPC); break; case 50: - LOG_D(PHY,"DCI format1 (FDD, 10 MHz), rnti %x (%x): rah %d, rb_alloc %x, mcs %d, harq_pid %d, ndi %d, RV %d, TPC %d\n", - dci->rnti, - ((uint32_t*)&dci->dci_pdu)[0], - ((DCI1_10MHz_FDD_t *)&dci->dci_pdu[0])->rah, - ((DCI1_10MHz_FDD_t *)&dci->dci_pdu[0])->rballoc, - ((DCI1_10MHz_FDD_t *)&dci->dci_pdu[0])->mcs, - ((DCI1_10MHz_FDD_t *)&dci->dci_pdu[0])->harq_pid, - ((DCI1_10MHz_FDD_t *)&dci->dci_pdu[0])->ndi, - ((DCI1_10MHz_FDD_t *)&dci->dci_pdu[0])->rv, - ((DCI1_10MHz_FDD_t *)&dci->dci_pdu[0])->TPC); + LOG_D (PHY, "DCI format1 (FDD, 10 MHz), rnti %x (%x): rah %d, rb_alloc %x, mcs %d, harq_pid %d, ndi %d, RV %d, TPC %d\n", + dci->rnti, + ((uint32_t *) & dci->dci_pdu)[0], + ((DCI1_10MHz_FDD_t *) & dci->dci_pdu[0])->rah, + ((DCI1_10MHz_FDD_t *) & dci->dci_pdu[0])->rballoc, + ((DCI1_10MHz_FDD_t *) & dci->dci_pdu[0])->mcs, + ((DCI1_10MHz_FDD_t *) & dci->dci_pdu[0])->harq_pid, + ((DCI1_10MHz_FDD_t *) & dci->dci_pdu[0])->ndi, ((DCI1_10MHz_FDD_t *) & dci->dci_pdu[0])->rv, ((DCI1_10MHz_FDD_t *) & dci->dci_pdu[0])->TPC); break; case 100: - LOG_D(PHY,"DCI format1 (FDD, 20 MHz), rnti %x (%x): rah %d, rb_alloc %x, mcs %d, harq_pid %d, ndi %d, RV %d, TPC %d\n", - dci->rnti, - ((uint32_t*)&dci->dci_pdu)[0], - ((DCI1_20MHz_FDD_t *)&dci->dci_pdu[0])->rah, - ((DCI1_20MHz_FDD_t *)&dci->dci_pdu[0])->rballoc, - ((DCI1_20MHz_FDD_t *)&dci->dci_pdu[0])->mcs, - ((DCI1_20MHz_FDD_t *)&dci->dci_pdu[0])->harq_pid, - ((DCI1_20MHz_FDD_t *)&dci->dci_pdu[0])->ndi, - ((DCI1_20MHz_FDD_t *)&dci->dci_pdu[0])->rv, - ((DCI1_20MHz_FDD_t *)&dci->dci_pdu[0])->TPC); + LOG_D (PHY, "DCI format1 (FDD, 20 MHz), rnti %x (%x): rah %d, rb_alloc %x, mcs %d, harq_pid %d, ndi %d, RV %d, TPC %d\n", + dci->rnti, + ((uint32_t *) & dci->dci_pdu)[0], + ((DCI1_20MHz_FDD_t *) & dci->dci_pdu[0])->rah, + ((DCI1_20MHz_FDD_t *) & dci->dci_pdu[0])->rballoc, + ((DCI1_20MHz_FDD_t *) & dci->dci_pdu[0])->mcs, + ((DCI1_20MHz_FDD_t *) & dci->dci_pdu[0])->harq_pid, + ((DCI1_20MHz_FDD_t *) & dci->dci_pdu[0])->ndi, ((DCI1_20MHz_FDD_t *) & dci->dci_pdu[0])->rv, ((DCI1_20MHz_FDD_t *) & dci->dci_pdu[0])->TPC); break; default: - LOG_E(PHY,"Invalid N_RB_DL %d\n", frame_parms->N_RB_DL); + LOG_E (PHY, "Invalid N_RB_DL %d\n", frame_parms->N_RB_DL); DevParam (frame_parms->N_RB_DL, 0, 0); break; } } else - LOG_E(PHY,"Don't know how to handle TDD format 0 yet\n"); + LOG_E (PHY, "Don't know how to handle TDD format 0 yet\n"); break; - case format1A: // This is DLSCH allocation for control traffic - if ((frame_parms->frame_type == TDD) && - (frame_parms->tdd_config>0)) { + case format1A: // This is DLSCH allocation for control traffic + if ((frame_parms->frame_type == TDD) && (frame_parms->tdd_config > 0)) { switch (frame_parms->N_RB_DL) { case 6: - LOG_D(PHY,"DCI format1A (TDD1-6, 1_5MHz), rnti %x (%x)\n",dci->rnti,((uint32_t*)&dci->dci_pdu[0])[0]); - LOG_D(PHY,"VRB_TYPE %d\n",((DCI1A_1_5MHz_TDD_1_6_t *)&dci->dci_pdu[0])->vrb_type); - LOG_D(PHY,"RB_ALLOC %x (NB_RB %d)\n",((DCI1A_1_5MHz_TDD_1_6_t *)&dci->dci_pdu[0])->rballoc,RIV2nb_rb_LUT25[((DCI1A_1_5MHz_TDD_1_6_t *)&dci->dci_pdu[0])->rballoc]); - LOG_D(PHY,"MCS %d\n",((DCI1A_1_5MHz_TDD_1_6_t *)&dci->dci_pdu[0])->mcs); - LOG_D(PHY,"HARQ_PID %d\n",((DCI1A_1_5MHz_TDD_1_6_t *)&dci->dci_pdu[0])->harq_pid); - LOG_D(PHY,"NDI %d\n",((DCI1A_1_5MHz_TDD_1_6_t *)&dci->dci_pdu[0])->ndi); - LOG_D(PHY,"RV %d\n",((DCI1A_1_5MHz_TDD_1_6_t *)&dci->dci_pdu[0])->rv); - LOG_D(PHY,"TPC %d\n",((DCI1A_1_5MHz_TDD_1_6_t *)&dci->dci_pdu[0])->TPC); - LOG_D(PHY,"DAI %d\n",((DCI1A_1_5MHz_TDD_1_6_t *)&dci->dci_pdu[0])->dai); + LOG_D (PHY, "DCI format1A (TDD1-6, 1_5MHz), rnti %x (%x)\n", dci->rnti, ((uint32_t *) & dci->dci_pdu[0])[0]); + LOG_D (PHY, "VRB_TYPE %d\n", ((DCI1A_1_5MHz_TDD_1_6_t *) & dci->dci_pdu[0])->vrb_type); + LOG_D (PHY, "RB_ALLOC %x (NB_RB %d)\n", ((DCI1A_1_5MHz_TDD_1_6_t *) & dci->dci_pdu[0])->rballoc, RIV2nb_rb_LUT25[((DCI1A_1_5MHz_TDD_1_6_t *) & dci->dci_pdu[0])->rballoc]); + LOG_D (PHY, "MCS %d\n", ((DCI1A_1_5MHz_TDD_1_6_t *) & dci->dci_pdu[0])->mcs); + LOG_D (PHY, "HARQ_PID %d\n", ((DCI1A_1_5MHz_TDD_1_6_t *) & dci->dci_pdu[0])->harq_pid); + LOG_D (PHY, "NDI %d\n", ((DCI1A_1_5MHz_TDD_1_6_t *) & dci->dci_pdu[0])->ndi); + LOG_D (PHY, "RV %d\n", ((DCI1A_1_5MHz_TDD_1_6_t *) & dci->dci_pdu[0])->rv); + LOG_D (PHY, "TPC %d\n", ((DCI1A_1_5MHz_TDD_1_6_t *) & dci->dci_pdu[0])->TPC); + LOG_D (PHY, "DAI %d\n", ((DCI1A_1_5MHz_TDD_1_6_t *) & dci->dci_pdu[0])->dai); break; case 25: - LOG_D(PHY,"DCI format1A (TDD1-6, 5MHz), rnti %x (%x)\n",dci->rnti,((uint32_t*)&dci->dci_pdu[0])[0]); - LOG_D(PHY,"VRB_TYPE %d\n",((DCI1A_5MHz_TDD_1_6_t *)&dci->dci_pdu[0])->vrb_type); - LOG_D(PHY,"RB_ALLOC %d (NB_RB %d)\n",((DCI1A_5MHz_TDD_1_6_t *)&dci->dci_pdu[0])->rballoc,RIV2nb_rb_LUT25[((DCI1A_5MHz_TDD_1_6_t *)&dci->dci_pdu[0])->rballoc]); - LOG_D(PHY,"MCS %d\n",((DCI1A_5MHz_TDD_1_6_t *)&dci->dci_pdu[0])->mcs); - LOG_D(PHY,"HARQ_PID %d\n",((DCI1A_5MHz_TDD_1_6_t *)&dci->dci_pdu[0])->harq_pid); - LOG_D(PHY,"NDI %d\n",((DCI1A_5MHz_TDD_1_6_t *)&dci->dci_pdu[0])->ndi); - LOG_D(PHY,"RV %d\n",((DCI1A_5MHz_TDD_1_6_t *)&dci->dci_pdu[0])->rv); - LOG_D(PHY,"TPC %d\n",((DCI1A_5MHz_TDD_1_6_t *)&dci->dci_pdu[0])->TPC); - LOG_D(PHY,"DAI %d\n",((DCI1A_5MHz_TDD_1_6_t *)&dci->dci_pdu[0])->dai); + LOG_D (PHY, "DCI format1A (TDD1-6, 5MHz), rnti %x (%x)\n", dci->rnti, ((uint32_t *) & dci->dci_pdu[0])[0]); + LOG_D (PHY, "VRB_TYPE %d\n", ((DCI1A_5MHz_TDD_1_6_t *) & dci->dci_pdu[0])->vrb_type); + LOG_D (PHY, "RB_ALLOC %d (NB_RB %d)\n", ((DCI1A_5MHz_TDD_1_6_t *) & dci->dci_pdu[0])->rballoc, RIV2nb_rb_LUT25[((DCI1A_5MHz_TDD_1_6_t *) & dci->dci_pdu[0])->rballoc]); + LOG_D (PHY, "MCS %d\n", ((DCI1A_5MHz_TDD_1_6_t *) & dci->dci_pdu[0])->mcs); + LOG_D (PHY, "HARQ_PID %d\n", ((DCI1A_5MHz_TDD_1_6_t *) & dci->dci_pdu[0])->harq_pid); + LOG_D (PHY, "NDI %d\n", ((DCI1A_5MHz_TDD_1_6_t *) & dci->dci_pdu[0])->ndi); + LOG_D (PHY, "RV %d\n", ((DCI1A_5MHz_TDD_1_6_t *) & dci->dci_pdu[0])->rv); + LOG_D (PHY, "TPC %d\n", ((DCI1A_5MHz_TDD_1_6_t *) & dci->dci_pdu[0])->TPC); + LOG_D (PHY, "DAI %d\n", ((DCI1A_5MHz_TDD_1_6_t *) & dci->dci_pdu[0])->dai); break; case 50: - LOG_D(PHY,"DCI format1A (TDD1-6, 10MHz), rnti %x (%x)\n",dci->rnti,((uint32_t*)&dci->dci_pdu[0])[0]); - LOG_D(PHY,"VRB_TYPE %d\n",((DCI1A_10MHz_TDD_1_6_t *)&dci->dci_pdu[0])->vrb_type); - LOG_D(PHY,"RB_ALLOC %x (NB_RB %d)\n",((DCI1A_10MHz_TDD_1_6_t *)&dci->dci_pdu[0])->rballoc,RIV2nb_rb_LUT50[((DCI1A_10MHz_TDD_1_6_t *)&dci->dci_pdu[0])->rballoc]); - LOG_D(PHY,"MCS %d\n",((DCI1A_10MHz_TDD_1_6_t *)&dci->dci_pdu[0])->mcs); - LOG_D(PHY,"HARQ_PID %d\n",((DCI1A_10MHz_TDD_1_6_t *)&dci->dci_pdu[0])->harq_pid); - LOG_D(PHY,"NDI %d\n",((DCI1A_10MHz_TDD_1_6_t *)&dci->dci_pdu[0])->ndi); - LOG_D(PHY,"RV %d\n",((DCI1A_10MHz_TDD_1_6_t *)&dci->dci_pdu[0])->rv); - LOG_D(PHY,"TPC %d\n",((DCI1A_10MHz_TDD_1_6_t *)&dci->dci_pdu[0])->TPC); - LOG_D(PHY,"DAI %d\n",((DCI1A_10MHz_TDD_1_6_t *)&dci->dci_pdu[0])->dai); + LOG_D (PHY, "DCI format1A (TDD1-6, 10MHz), rnti %x (%x)\n", dci->rnti, ((uint32_t *) & dci->dci_pdu[0])[0]); + LOG_D (PHY, "VRB_TYPE %d\n", ((DCI1A_10MHz_TDD_1_6_t *) & dci->dci_pdu[0])->vrb_type); + LOG_D (PHY, "RB_ALLOC %x (NB_RB %d)\n", ((DCI1A_10MHz_TDD_1_6_t *) & dci->dci_pdu[0])->rballoc, RIV2nb_rb_LUT50[((DCI1A_10MHz_TDD_1_6_t *) & dci->dci_pdu[0])->rballoc]); + LOG_D (PHY, "MCS %d\n", ((DCI1A_10MHz_TDD_1_6_t *) & dci->dci_pdu[0])->mcs); + LOG_D (PHY, "HARQ_PID %d\n", ((DCI1A_10MHz_TDD_1_6_t *) & dci->dci_pdu[0])->harq_pid); + LOG_D (PHY, "NDI %d\n", ((DCI1A_10MHz_TDD_1_6_t *) & dci->dci_pdu[0])->ndi); + LOG_D (PHY, "RV %d\n", ((DCI1A_10MHz_TDD_1_6_t *) & dci->dci_pdu[0])->rv); + LOG_D (PHY, "TPC %d\n", ((DCI1A_10MHz_TDD_1_6_t *) & dci->dci_pdu[0])->TPC); + LOG_D (PHY, "DAI %d\n", ((DCI1A_10MHz_TDD_1_6_t *) & dci->dci_pdu[0])->dai); break; case 100: - LOG_D(PHY,"DCI format1A (TDD1-6, 20MHz), rnti %x (%x)\n",dci->rnti,((uint32_t*)&dci->dci_pdu[0])[0]); - LOG_D(PHY,"VRB_TYPE %d\n",((DCI1A_20MHz_TDD_1_6_t *)&dci->dci_pdu[0])->vrb_type); - LOG_D(PHY,"RB_ALLOC %x (NB_RB %d)\n",((DCI1A_20MHz_TDD_1_6_t *)&dci->dci_pdu[0])->rballoc,RIV2nb_rb_LUT100[((DCI1A_20MHz_TDD_1_6_t *)&dci->dci_pdu[0])->rballoc]); - LOG_D(PHY,"MCS %d\n",((DCI1A_20MHz_TDD_1_6_t *)&dci->dci_pdu[0])->mcs); - LOG_D(PHY,"HARQ_PID %d\n",((DCI1A_20MHz_TDD_1_6_t *)&dci->dci_pdu[0])->harq_pid); - LOG_D(PHY,"NDI %d\n",((DCI1A_20MHz_TDD_1_6_t *)&dci->dci_pdu[0])->ndi); - LOG_D(PHY,"RV %d\n",((DCI1A_20MHz_TDD_1_6_t *)&dci->dci_pdu[0])->rv); - LOG_D(PHY,"TPC %d\n",((DCI1A_20MHz_TDD_1_6_t *)&dci->dci_pdu[0])->TPC); - LOG_D(PHY,"DAI %d\n",((DCI1A_20MHz_TDD_1_6_t *)&dci->dci_pdu[0])->dai); + LOG_D (PHY, "DCI format1A (TDD1-6, 20MHz), rnti %x (%x)\n", dci->rnti, ((uint32_t *) & dci->dci_pdu[0])[0]); + LOG_D (PHY, "VRB_TYPE %d\n", ((DCI1A_20MHz_TDD_1_6_t *) & dci->dci_pdu[0])->vrb_type); + LOG_D (PHY, "RB_ALLOC %x (NB_RB %d)\n", ((DCI1A_20MHz_TDD_1_6_t *) & dci->dci_pdu[0])->rballoc, RIV2nb_rb_LUT100[((DCI1A_20MHz_TDD_1_6_t *) & dci->dci_pdu[0])->rballoc]); + LOG_D (PHY, "MCS %d\n", ((DCI1A_20MHz_TDD_1_6_t *) & dci->dci_pdu[0])->mcs); + LOG_D (PHY, "HARQ_PID %d\n", ((DCI1A_20MHz_TDD_1_6_t *) & dci->dci_pdu[0])->harq_pid); + LOG_D (PHY, "NDI %d\n", ((DCI1A_20MHz_TDD_1_6_t *) & dci->dci_pdu[0])->ndi); + LOG_D (PHY, "RV %d\n", ((DCI1A_20MHz_TDD_1_6_t *) & dci->dci_pdu[0])->rv); + LOG_D (PHY, "TPC %d\n", ((DCI1A_20MHz_TDD_1_6_t *) & dci->dci_pdu[0])->TPC); + LOG_D (PHY, "DAI %d\n", ((DCI1A_20MHz_TDD_1_6_t *) & dci->dci_pdu[0])->dai); break; default: - LOG_E(PHY,"Invalid N_RB_DL %d\n", frame_parms->N_RB_DL); + LOG_E (PHY, "Invalid N_RB_DL %d\n", frame_parms->N_RB_DL); DevParam (frame_parms->N_RB_DL, 0, 0); break; } @@ -2968,51 +2915,51 @@ int dump_dci(LTE_DL_FRAME_PARMS *frame_parms, DCI_ALLOC_t *dci) } else if (frame_parms->frame_type == FDD) { switch (frame_parms->N_RB_DL) { case 6: - LOG_D(PHY,"DCI format1A(FDD, 1.5MHz), rnti %x (%x)\n",dci->rnti,((uint32_t*)&dci->dci_pdu[0])[0]); - LOG_D(PHY,"VRB_TYPE %d\n",((DCI1A_1_5MHz_FDD_t *)&dci->dci_pdu[0])->vrb_type); - LOG_D(PHY,"RB_ALLOC %x (NB_RB %d)\n",((DCI1A_1_5MHz_FDD_t *)&dci->dci_pdu[0])->rballoc,RIV2nb_rb_LUT25[((DCI1A_1_5MHz_FDD_t *)&dci->dci_pdu[0])->rballoc]); - LOG_D(PHY,"MCS %d\n",((DCI1A_1_5MHz_FDD_t *)&dci->dci_pdu[0])->mcs); - LOG_D(PHY,"HARQ_PID %d\n",((DCI1A_1_5MHz_FDD_t *)&dci->dci_pdu[0])->harq_pid); - LOG_D(PHY,"NDI %d\n",((DCI1A_1_5MHz_FDD_t *)&dci->dci_pdu[0])->ndi); - LOG_D(PHY,"RV %d\n",((DCI1A_1_5MHz_FDD_t *)&dci->dci_pdu[0])->rv); - LOG_D(PHY,"TPC %d\n",((DCI1A_1_5MHz_FDD_t *)&dci->dci_pdu[0])->TPC); + LOG_D (PHY, "DCI format1A(FDD, 1.5MHz), rnti %x (%x)\n", dci->rnti, ((uint32_t *) & dci->dci_pdu[0])[0]); + LOG_D (PHY, "VRB_TYPE %d\n", ((DCI1A_1_5MHz_FDD_t *) & dci->dci_pdu[0])->vrb_type); + LOG_D (PHY, "RB_ALLOC %x (NB_RB %d)\n", ((DCI1A_1_5MHz_FDD_t *) & dci->dci_pdu[0])->rballoc, RIV2nb_rb_LUT25[((DCI1A_1_5MHz_FDD_t *) & dci->dci_pdu[0])->rballoc]); + LOG_D (PHY, "MCS %d\n", ((DCI1A_1_5MHz_FDD_t *) & dci->dci_pdu[0])->mcs); + LOG_D (PHY, "HARQ_PID %d\n", ((DCI1A_1_5MHz_FDD_t *) & dci->dci_pdu[0])->harq_pid); + LOG_D (PHY, "NDI %d\n", ((DCI1A_1_5MHz_FDD_t *) & dci->dci_pdu[0])->ndi); + LOG_D (PHY, "RV %d\n", ((DCI1A_1_5MHz_FDD_t *) & dci->dci_pdu[0])->rv); + LOG_D (PHY, "TPC %d\n", ((DCI1A_1_5MHz_FDD_t *) & dci->dci_pdu[0])->TPC); break; case 25: - LOG_D(PHY,"DCI format1A(FDD, 5MHz), rnti %x (%x)\n",dci->rnti,((uint32_t*)&dci->dci_pdu[0])[0]); - LOG_D(PHY,"VRB_TYPE %d\n",((DCI1A_5MHz_FDD_t *)&dci->dci_pdu[0])->vrb_type); - LOG_D(PHY,"RB_ALLOC %x (NB_RB %d)\n",((DCI1A_5MHz_FDD_t *)&dci->dci_pdu[0])->rballoc,RIV2nb_rb_LUT25[((DCI1A_5MHz_FDD_t *)&dci->dci_pdu[0])->rballoc]); - LOG_D(PHY,"MCS %d\n",((DCI1A_5MHz_FDD_t *)&dci->dci_pdu[0])->mcs); - LOG_D(PHY,"HARQ_PID %d\n",((DCI1A_5MHz_FDD_t *)&dci->dci_pdu[0])->harq_pid); - LOG_D(PHY,"NDI %d\n",((DCI1A_5MHz_FDD_t *)&dci->dci_pdu[0])->ndi); - LOG_D(PHY,"RV %d\n",((DCI1A_5MHz_FDD_t *)&dci->dci_pdu[0])->rv); - LOG_D(PHY,"TPC %d\n",((DCI1A_5MHz_FDD_t *)&dci->dci_pdu[0])->TPC); + LOG_D (PHY, "DCI format1A(FDD, 5MHz), rnti %x (%x)\n", dci->rnti, ((uint32_t *) & dci->dci_pdu[0])[0]); + LOG_D (PHY, "VRB_TYPE %d\n", ((DCI1A_5MHz_FDD_t *) & dci->dci_pdu[0])->vrb_type); + LOG_D (PHY, "RB_ALLOC %x (NB_RB %d)\n", ((DCI1A_5MHz_FDD_t *) & dci->dci_pdu[0])->rballoc, RIV2nb_rb_LUT25[((DCI1A_5MHz_FDD_t *) & dci->dci_pdu[0])->rballoc]); + LOG_D (PHY, "MCS %d\n", ((DCI1A_5MHz_FDD_t *) & dci->dci_pdu[0])->mcs); + LOG_D (PHY, "HARQ_PID %d\n", ((DCI1A_5MHz_FDD_t *) & dci->dci_pdu[0])->harq_pid); + LOG_D (PHY, "NDI %d\n", ((DCI1A_5MHz_FDD_t *) & dci->dci_pdu[0])->ndi); + LOG_D (PHY, "RV %d\n", ((DCI1A_5MHz_FDD_t *) & dci->dci_pdu[0])->rv); + LOG_D (PHY, "TPC %d\n", ((DCI1A_5MHz_FDD_t *) & dci->dci_pdu[0])->TPC); break; case 50: - LOG_D(PHY,"DCI format1A(FDD, 10MHz), rnti %x (%x)\n",dci->rnti,((uint32_t*)&dci->dci_pdu[0])[0]); - LOG_D(PHY,"VRB_TYPE %d\n",((DCI1A_10MHz_FDD_t *)&dci->dci_pdu[0])->vrb_type); - LOG_D(PHY,"RB_ALLOC %x (NB_RB %d)\n",((DCI1A_10MHz_FDD_t *)&dci->dci_pdu[0])->rballoc,RIV2nb_rb_LUT50[((DCI1A_10MHz_FDD_t *)&dci->dci_pdu[0])->rballoc]); - LOG_D(PHY,"MCS %d\n",((DCI1A_10MHz_FDD_t *)&dci->dci_pdu[0])->mcs); - LOG_D(PHY,"HARQ_PID %d\n",((DCI1A_10MHz_FDD_t *)&dci->dci_pdu[0])->harq_pid); - LOG_D(PHY,"NDI %d\n",((DCI1A_10MHz_FDD_t *)&dci->dci_pdu[0])->ndi); - LOG_D(PHY,"RV %d\n",((DCI1A_10MHz_FDD_t *)&dci->dci_pdu[0])->rv); - LOG_D(PHY,"TPC %d\n",((DCI1A_10MHz_FDD_t *)&dci->dci_pdu[0])->TPC); + LOG_D (PHY, "DCI format1A(FDD, 10MHz), rnti %x (%x)\n", dci->rnti, ((uint32_t *) & dci->dci_pdu[0])[0]); + LOG_D (PHY, "VRB_TYPE %d\n", ((DCI1A_10MHz_FDD_t *) & dci->dci_pdu[0])->vrb_type); + LOG_D (PHY, "RB_ALLOC %x (NB_RB %d)\n", ((DCI1A_10MHz_FDD_t *) & dci->dci_pdu[0])->rballoc, RIV2nb_rb_LUT50[((DCI1A_10MHz_FDD_t *) & dci->dci_pdu[0])->rballoc]); + LOG_D (PHY, "MCS %d\n", ((DCI1A_10MHz_FDD_t *) & dci->dci_pdu[0])->mcs); + LOG_D (PHY, "HARQ_PID %d\n", ((DCI1A_10MHz_FDD_t *) & dci->dci_pdu[0])->harq_pid); + LOG_D (PHY, "NDI %d\n", ((DCI1A_10MHz_FDD_t *) & dci->dci_pdu[0])->ndi); + LOG_D (PHY, "RV %d\n", ((DCI1A_10MHz_FDD_t *) & dci->dci_pdu[0])->rv); + LOG_D (PHY, "TPC %d\n", ((DCI1A_10MHz_FDD_t *) & dci->dci_pdu[0])->TPC); break; case 100: - LOG_D(PHY,"DCI format1A(FDD, 20MHz), rnti %x (%x)\n",dci->rnti,((uint32_t*)&dci->dci_pdu[0])[0]); - LOG_D(PHY,"VRB_TYPE %d\n",((DCI1A_20MHz_FDD_t *)&dci->dci_pdu[0])->vrb_type); - LOG_D(PHY,"RB_ALLOC %x (NB_RB %d)\n",((DCI1A_20MHz_FDD_t *)&dci->dci_pdu[0])->rballoc,RIV2nb_rb_LUT100[((DCI1A_20MHz_FDD_t *)&dci->dci_pdu[0])->rballoc]); - LOG_D(PHY,"MCS %d\n",((DCI1A_20MHz_FDD_t *)&dci->dci_pdu[0])->mcs); - LOG_D(PHY,"HARQ_PID %d\n",((DCI1A_20MHz_FDD_t *)&dci->dci_pdu[0])->harq_pid); - LOG_D(PHY,"NDI %d\n",((DCI1A_20MHz_FDD_t *)&dci->dci_pdu[0])->ndi); - LOG_D(PHY,"RV %d\n",((DCI1A_20MHz_FDD_t *)&dci->dci_pdu[0])->rv); - LOG_D(PHY,"TPC %d\n",((DCI1A_20MHz_FDD_t *)&dci->dci_pdu[0])->TPC); + LOG_D (PHY, "DCI format1A(FDD, 20MHz), rnti %x (%x)\n", dci->rnti, ((uint32_t *) & dci->dci_pdu[0])[0]); + LOG_D (PHY, "VRB_TYPE %d\n", ((DCI1A_20MHz_FDD_t *) & dci->dci_pdu[0])->vrb_type); + LOG_D (PHY, "RB_ALLOC %x (NB_RB %d)\n", ((DCI1A_20MHz_FDD_t *) & dci->dci_pdu[0])->rballoc, RIV2nb_rb_LUT100[((DCI1A_20MHz_FDD_t *) & dci->dci_pdu[0])->rballoc]); + LOG_D (PHY, "MCS %d\n", ((DCI1A_20MHz_FDD_t *) & dci->dci_pdu[0])->mcs); + LOG_D (PHY, "HARQ_PID %d\n", ((DCI1A_20MHz_FDD_t *) & dci->dci_pdu[0])->harq_pid); + LOG_D (PHY, "NDI %d\n", ((DCI1A_20MHz_FDD_t *) & dci->dci_pdu[0])->ndi); + LOG_D (PHY, "RV %d\n", ((DCI1A_20MHz_FDD_t *) & dci->dci_pdu[0])->rv); + LOG_D (PHY, "TPC %d\n", ((DCI1A_20MHz_FDD_t *) & dci->dci_pdu[0])->TPC); break; default: - LOG_E(PHY,"Invalid N_RB_DL %d\n", frame_parms->N_RB_DL); + LOG_E (PHY, "Invalid N_RB_DL %d\n", frame_parms->N_RB_DL); DevParam (frame_parms->N_RB_DL, 0, 0); break; } @@ -3020,40 +2967,39 @@ int dump_dci(LTE_DL_FRAME_PARMS *frame_parms, DCI_ALLOC_t *dci) break; - case format1C: // This is DLSCH allocation for control traffic + case format1C: // This is DLSCH allocation for control traffic switch (frame_parms->N_RB_DL) { case 6: - LOG_D(PHY,"DCI format1C (1.5MHz), rnti %x (%x)\n",dci->rnti,((uint32_t*)&dci->dci_pdu[0])[0]); - LOG_D(PHY,"RB_ALLOC %x (NB_RB %d)\n", - ((DCI1C_1_5MHz_t *)&dci->dci_pdu[0])->rballoc,RIV2nb_rb_LUT6[conv_1C_RIV(((DCI1C_1_5MHz_t *)&dci->dci_pdu[0])->rballoc,6)]); - LOG_D(PHY,"MCS %d\n",((DCI1C_1_5MHz_t *)&dci->dci_pdu[0])->mcs); + LOG_D (PHY, "DCI format1C (1.5MHz), rnti %x (%x)\n", dci->rnti, ((uint32_t *) & dci->dci_pdu[0])[0]); + LOG_D (PHY, "RB_ALLOC %x (NB_RB %d)\n", ((DCI1C_1_5MHz_t *) & dci->dci_pdu[0])->rballoc, RIV2nb_rb_LUT6[conv_1C_RIV (((DCI1C_1_5MHz_t *) & dci->dci_pdu[0])->rballoc, 6)]); + LOG_D (PHY, "MCS %d\n", ((DCI1C_1_5MHz_t *) & dci->dci_pdu[0])->mcs); break; case 25: - LOG_D(PHY,"DCI format1C (5MHz), rnti %x (%x)\n",dci->rnti,((uint32_t*)&dci->dci_pdu[0])[0]); - LOG_D(PHY,"RB_ALLOC %x (NB_RB %d)\n",((DCI1C_5MHz_t *)&dci->dci_pdu[0])->rballoc,RIV2nb_rb_LUT25[conv_1C_RIV(((DCI1C_5MHz_t *)&dci->dci_pdu[0])->rballoc,25)]); - LOG_D(PHY,"MCS %d\n",((DCI1C_5MHz_t *)&dci->dci_pdu[0])->mcs); + LOG_D (PHY, "DCI format1C (5MHz), rnti %x (%x)\n", dci->rnti, ((uint32_t *) & dci->dci_pdu[0])[0]); + LOG_D (PHY, "RB_ALLOC %x (NB_RB %d)\n", ((DCI1C_5MHz_t *) & dci->dci_pdu[0])->rballoc, RIV2nb_rb_LUT25[conv_1C_RIV (((DCI1C_5MHz_t *) & dci->dci_pdu[0])->rballoc, 25)]); + LOG_D (PHY, "MCS %d\n", ((DCI1C_5MHz_t *) & dci->dci_pdu[0])->mcs); break; case 50: - LOG_D(PHY,"DCI format1C (10MHz), rnti %x (%x)\n",dci->rnti,((uint32_t*)&dci->dci_pdu[0])[0]); - LOG_D(PHY,"Ngap %d\n",((DCI1C_10MHz_t *)&dci->dci_pdu[0])->Ngap); - LOG_D(PHY,"RB_ALLOC %x (NB_RB %d)\n",((DCI1C_10MHz_t *)&dci->dci_pdu[0])->rballoc,RIV2nb_rb_LUT50[conv_1C_RIV(((DCI1C_10MHz_t *)&dci->dci_pdu[0])->rballoc,50)]); - LOG_D(PHY,"MCS %d\n",((DCI1C_10MHz_t *)&dci->dci_pdu[0])->mcs); + LOG_D (PHY, "DCI format1C (10MHz), rnti %x (%x)\n", dci->rnti, ((uint32_t *) & dci->dci_pdu[0])[0]); + LOG_D (PHY, "Ngap %d\n", ((DCI1C_10MHz_t *) & dci->dci_pdu[0])->Ngap); + LOG_D (PHY, "RB_ALLOC %x (NB_RB %d)\n", ((DCI1C_10MHz_t *) & dci->dci_pdu[0])->rballoc, RIV2nb_rb_LUT50[conv_1C_RIV (((DCI1C_10MHz_t *) & dci->dci_pdu[0])->rballoc, 50)]); + LOG_D (PHY, "MCS %d\n", ((DCI1C_10MHz_t *) & dci->dci_pdu[0])->mcs); break; case 100: - LOG_D(PHY,"DCI format1C (20MHz), rnti %x (%x)\n",dci->rnti,((uint32_t*)&dci->dci_pdu[0])[0]); - LOG_D(PHY,"Ngap %d\n",((DCI1C_20MHz_t *)&dci->dci_pdu[0])->Ngap); - LOG_D(PHY,"RB_ALLOC %x (NB_RB %d)\n",((DCI1C_20MHz_t *)&dci->dci_pdu[0])->rballoc,RIV2nb_rb_LUT50[conv_1C_RIV(((DCI1C_20MHz_t *)&dci->dci_pdu[0])->rballoc,100)]); - LOG_D(PHY,"MCS %d\n",((DCI1C_20MHz_t *)&dci->dci_pdu[0])->mcs); + LOG_D (PHY, "DCI format1C (20MHz), rnti %x (%x)\n", dci->rnti, ((uint32_t *) & dci->dci_pdu[0])[0]); + LOG_D (PHY, "Ngap %d\n", ((DCI1C_20MHz_t *) & dci->dci_pdu[0])->Ngap); + LOG_D (PHY, "RB_ALLOC %x (NB_RB %d)\n", ((DCI1C_20MHz_t *) & dci->dci_pdu[0])->rballoc, RIV2nb_rb_LUT50[conv_1C_RIV (((DCI1C_20MHz_t *) & dci->dci_pdu[0])->rballoc, 100)]); + LOG_D (PHY, "MCS %d\n", ((DCI1C_20MHz_t *) & dci->dci_pdu[0])->mcs); break; default: - LOG_E(PHY,"Invalid N_RB_DL %d\n", frame_parms->N_RB_DL); - DevParam (frame_parms->N_RB_DL, 0, 0); - break; + LOG_E (PHY, "Invalid N_RB_DL %d\n", frame_parms->N_RB_DL); + DevParam (frame_parms->N_RB_DL, 0, 0); + break; } @@ -3061,332 +3007,296 @@ int dump_dci(LTE_DL_FRAME_PARMS *frame_parms, DCI_ALLOC_t *dci) case format2: - if ((frame_parms->frame_type == TDD) && - (frame_parms->tdd_config>0)) { + if ((frame_parms->frame_type == TDD) && (frame_parms->tdd_config > 0)) { if (frame_parms->nb_antenna_ports_eNB == 2) { - switch(frame_parms->N_RB_DL) { + switch (frame_parms->N_RB_DL) { case 6: - LOG_D(PHY,"DCI format2 2 antennas (TDD 1.5 MHz), rnti %x (%x): rb_alloc %x, mcs %d|%d, harq_pid %d, ndi %d|%d, RV %d|%d, TPC %d, dai %d, tbswap %d, tpmi %d\n", - dci->rnti, - ((uint32_t*)&dci->dci_pdu)[0], - ((DCI2_1_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->rballoc, - ((DCI2_1_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->mcs1, - ((DCI2_1_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->mcs2, - ((DCI2_1_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->harq_pid, - ((DCI2_1_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->ndi1, - ((DCI2_1_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->ndi2, - ((DCI2_1_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->rv1, - ((DCI2_1_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->rv2, - ((DCI2_1_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->TPC, - ((DCI2_1_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->dai, - ((DCI2_1_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->tb_swap, - ((DCI2_1_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->tpmi - ); + LOG_D (PHY, "DCI format2 2 antennas (TDD 1.5 MHz), rnti %x (%x): rb_alloc %x, mcs %d|%d, harq_pid %d, ndi %d|%d, RV %d|%d, TPC %d, dai %d, tbswap %d, tpmi %d\n", + dci->rnti, + ((uint32_t *) & dci->dci_pdu)[0], + ((DCI2_1_5MHz_2A_TDD_t *) & dci->dci_pdu[0])->rballoc, + ((DCI2_1_5MHz_2A_TDD_t *) & dci->dci_pdu[0])->mcs1, + ((DCI2_1_5MHz_2A_TDD_t *) & dci->dci_pdu[0])->mcs2, + ((DCI2_1_5MHz_2A_TDD_t *) & dci->dci_pdu[0])->harq_pid, + ((DCI2_1_5MHz_2A_TDD_t *) & dci->dci_pdu[0])->ndi1, + ((DCI2_1_5MHz_2A_TDD_t *) & dci->dci_pdu[0])->ndi2, + ((DCI2_1_5MHz_2A_TDD_t *) & dci->dci_pdu[0])->rv1, + ((DCI2_1_5MHz_2A_TDD_t *) & dci->dci_pdu[0])->rv2, + ((DCI2_1_5MHz_2A_TDD_t *) & dci->dci_pdu[0])->TPC, + ((DCI2_1_5MHz_2A_TDD_t *) & dci->dci_pdu[0])->dai, ((DCI2_1_5MHz_2A_TDD_t *) & dci->dci_pdu[0])->tb_swap, ((DCI2_1_5MHz_2A_TDD_t *) & dci->dci_pdu[0])->tpmi); break; case 25: - LOG_D(PHY,"DCI format2 2 antennas (TDD 5 MHz), rnti %x (%x): rah %d, rb_alloc %x, mcs %d|%d, harq_pid %d, ndi %d|%d, RV %d|%d, TPC %d, dai %d, tb_swap %d, tpmi %d\n", - dci->rnti, - ((uint32_t*)&dci->dci_pdu)[0], - ((DCI2_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->rah, - ((DCI2_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->rballoc, - ((DCI2_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->mcs1, - ((DCI2_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->mcs2, - ((DCI2_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->harq_pid, - ((DCI2_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->ndi1, - ((DCI2_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->ndi2, - ((DCI2_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->rv1, - ((DCI2_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->rv2, - ((DCI2_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->TPC, - ((DCI2_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->dai, - ((DCI2_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->tb_swap, - ((DCI2_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->tpmi); + LOG_D (PHY, "DCI format2 2 antennas (TDD 5 MHz), rnti %x (%x): rah %d, rb_alloc %x, mcs %d|%d, harq_pid %d, ndi %d|%d, RV %d|%d, TPC %d, dai %d, tb_swap %d, tpmi %d\n", + dci->rnti, + ((uint32_t *) & dci->dci_pdu)[0], + ((DCI2_5MHz_2A_TDD_t *) & dci->dci_pdu[0])->rah, + ((DCI2_5MHz_2A_TDD_t *) & dci->dci_pdu[0])->rballoc, + ((DCI2_5MHz_2A_TDD_t *) & dci->dci_pdu[0])->mcs1, + ((DCI2_5MHz_2A_TDD_t *) & dci->dci_pdu[0])->mcs2, + ((DCI2_5MHz_2A_TDD_t *) & dci->dci_pdu[0])->harq_pid, + ((DCI2_5MHz_2A_TDD_t *) & dci->dci_pdu[0])->ndi1, + ((DCI2_5MHz_2A_TDD_t *) & dci->dci_pdu[0])->ndi2, + ((DCI2_5MHz_2A_TDD_t *) & dci->dci_pdu[0])->rv1, + ((DCI2_5MHz_2A_TDD_t *) & dci->dci_pdu[0])->rv2, + ((DCI2_5MHz_2A_TDD_t *) & dci->dci_pdu[0])->TPC, + ((DCI2_5MHz_2A_TDD_t *) & dci->dci_pdu[0])->dai, ((DCI2_5MHz_2A_TDD_t *) & dci->dci_pdu[0])->tb_swap, ((DCI2_5MHz_2A_TDD_t *) & dci->dci_pdu[0])->tpmi); break; case 50: - LOG_D(PHY,"DCI format2 2 antennas (TDD 10 MHz), rnti %x (%x): rah %d, rb_alloc %x, mcs %d|%d, harq_pid %d, ndi %d|%d, RV %d|%d, TPC %d, dai %d, tb_swap %d, tpmi %d\n", - dci->rnti, - ((uint32_t*)&dci->dci_pdu)[0], - ((DCI2_10MHz_2A_TDD_t *)&dci->dci_pdu[0])->rah, - ((DCI2_10MHz_2A_TDD_t *)&dci->dci_pdu[0])->rballoc, - ((DCI2_10MHz_2A_TDD_t *)&dci->dci_pdu[0])->mcs1, - ((DCI2_10MHz_2A_TDD_t *)&dci->dci_pdu[0])->mcs2, - ((DCI2_10MHz_2A_TDD_t *)&dci->dci_pdu[0])->harq_pid, - ((DCI2_10MHz_2A_TDD_t *)&dci->dci_pdu[0])->ndi1, - ((DCI2_10MHz_2A_TDD_t *)&dci->dci_pdu[0])->ndi2, - ((DCI2_10MHz_2A_TDD_t *)&dci->dci_pdu[0])->rv1, - ((DCI2_10MHz_2A_TDD_t *)&dci->dci_pdu[0])->rv2, - ((DCI2_10MHz_2A_TDD_t *)&dci->dci_pdu[0])->TPC, - ((DCI2_10MHz_2A_TDD_t *)&dci->dci_pdu[0])->dai, - ((DCI2_10MHz_2A_TDD_t *)&dci->dci_pdu[0])->tb_swap, - ((DCI2_10MHz_2A_TDD_t *)&dci->dci_pdu[0])->tpmi); + LOG_D (PHY, "DCI format2 2 antennas (TDD 10 MHz), rnti %x (%x): rah %d, rb_alloc %x, mcs %d|%d, harq_pid %d, ndi %d|%d, RV %d|%d, TPC %d, dai %d, tb_swap %d, tpmi %d\n", + dci->rnti, + ((uint32_t *) & dci->dci_pdu)[0], + ((DCI2_10MHz_2A_TDD_t *) & dci->dci_pdu[0])->rah, + ((DCI2_10MHz_2A_TDD_t *) & dci->dci_pdu[0])->rballoc, + ((DCI2_10MHz_2A_TDD_t *) & dci->dci_pdu[0])->mcs1, + ((DCI2_10MHz_2A_TDD_t *) & dci->dci_pdu[0])->mcs2, + ((DCI2_10MHz_2A_TDD_t *) & dci->dci_pdu[0])->harq_pid, + ((DCI2_10MHz_2A_TDD_t *) & dci->dci_pdu[0])->ndi1, + ((DCI2_10MHz_2A_TDD_t *) & dci->dci_pdu[0])->ndi2, + ((DCI2_10MHz_2A_TDD_t *) & dci->dci_pdu[0])->rv1, + ((DCI2_10MHz_2A_TDD_t *) & dci->dci_pdu[0])->rv2, + ((DCI2_10MHz_2A_TDD_t *) & dci->dci_pdu[0])->TPC, + ((DCI2_10MHz_2A_TDD_t *) & dci->dci_pdu[0])->dai, ((DCI2_10MHz_2A_TDD_t *) & dci->dci_pdu[0])->tb_swap, ((DCI2_10MHz_2A_TDD_t *) & dci->dci_pdu[0])->tpmi); break; case 100: - LOG_D(PHY,"DCI format2 2 antennas (TDD 20 MHz), rnti %x (%x): rah %d, rb_alloc %x, mcs %d|%d, harq_pid %d, ndi %d|%d, RV %d|%d, TPC %d, dai %d, tb_swap %d, tpmi %d\n", - dci->rnti, - ((uint32_t*)&dci->dci_pdu)[0], - ((DCI2_20MHz_2A_TDD_t *)&dci->dci_pdu[0])->rah, - ((DCI2_20MHz_2A_TDD_t *)&dci->dci_pdu[0])->rballoc, - ((DCI2_20MHz_2A_TDD_t *)&dci->dci_pdu[0])->mcs1, - ((DCI2_20MHz_2A_TDD_t *)&dci->dci_pdu[0])->mcs2, - ((DCI2_20MHz_2A_TDD_t *)&dci->dci_pdu[0])->harq_pid, - ((DCI2_20MHz_2A_TDD_t *)&dci->dci_pdu[0])->ndi1, - ((DCI2_20MHz_2A_TDD_t *)&dci->dci_pdu[0])->ndi2, - ((DCI2_20MHz_2A_TDD_t *)&dci->dci_pdu[0])->rv1, - ((DCI2_20MHz_2A_TDD_t *)&dci->dci_pdu[0])->rv2, - ((DCI2_20MHz_2A_TDD_t *)&dci->dci_pdu[0])->TPC, - ((DCI2_20MHz_2A_TDD_t *)&dci->dci_pdu[0])->dai, - ((DCI2_20MHz_2A_TDD_t *)&dci->dci_pdu[0])->tb_swap, - ((DCI2_20MHz_2A_TDD_t *)&dci->dci_pdu[0])->tpmi); + LOG_D (PHY, "DCI format2 2 antennas (TDD 20 MHz), rnti %x (%x): rah %d, rb_alloc %x, mcs %d|%d, harq_pid %d, ndi %d|%d, RV %d|%d, TPC %d, dai %d, tb_swap %d, tpmi %d\n", + dci->rnti, + ((uint32_t *) & dci->dci_pdu)[0], + ((DCI2_20MHz_2A_TDD_t *) & dci->dci_pdu[0])->rah, + ((DCI2_20MHz_2A_TDD_t *) & dci->dci_pdu[0])->rballoc, + ((DCI2_20MHz_2A_TDD_t *) & dci->dci_pdu[0])->mcs1, + ((DCI2_20MHz_2A_TDD_t *) & dci->dci_pdu[0])->mcs2, + ((DCI2_20MHz_2A_TDD_t *) & dci->dci_pdu[0])->harq_pid, + ((DCI2_20MHz_2A_TDD_t *) & dci->dci_pdu[0])->ndi1, + ((DCI2_20MHz_2A_TDD_t *) & dci->dci_pdu[0])->ndi2, + ((DCI2_20MHz_2A_TDD_t *) & dci->dci_pdu[0])->rv1, + ((DCI2_20MHz_2A_TDD_t *) & dci->dci_pdu[0])->rv2, + ((DCI2_20MHz_2A_TDD_t *) & dci->dci_pdu[0])->TPC, + ((DCI2_20MHz_2A_TDD_t *) & dci->dci_pdu[0])->dai, ((DCI2_20MHz_2A_TDD_t *) & dci->dci_pdu[0])->tb_swap, ((DCI2_20MHz_2A_TDD_t *) & dci->dci_pdu[0])->tpmi); break; default: - LOG_E(PHY,"Invalid N_RB_DL %d\n", frame_parms->N_RB_DL); + LOG_E (PHY, "Invalid N_RB_DL %d\n", frame_parms->N_RB_DL); DevParam (frame_parms->N_RB_DL, 0, 0); break; } } else if (frame_parms->nb_antenna_ports_eNB == 4) { - switch(frame_parms->N_RB_DL) { + switch (frame_parms->N_RB_DL) { case 6: - LOG_D(PHY,"DCI format2 2 antennas (TDD 1.5 MHz), rnti %x (%x): rb_alloc %x, mcs %d|%d, harq_pid %d, ndi %d|%d, RV %d|%d, TPC %d, dai %d, tbswap %d, tpmi %d\n", - dci->rnti, - ((uint32_t*)&dci->dci_pdu)[0], - ((DCI2_1_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->rballoc, - ((DCI2_1_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->mcs1, - ((DCI2_1_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->mcs2, - ((DCI2_1_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->harq_pid, - ((DCI2_1_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->ndi1, - ((DCI2_1_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->ndi2, - ((DCI2_1_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->rv1, - ((DCI2_1_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->rv2, - ((DCI2_1_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->TPC, - ((DCI2_1_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->dai, - ((DCI2_1_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->tb_swap, - ((DCI2_1_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->tpmi - ); + LOG_D (PHY, "DCI format2 2 antennas (TDD 1.5 MHz), rnti %x (%x): rb_alloc %x, mcs %d|%d, harq_pid %d, ndi %d|%d, RV %d|%d, TPC %d, dai %d, tbswap %d, tpmi %d\n", + dci->rnti, + ((uint32_t *) & dci->dci_pdu)[0], + ((DCI2_1_5MHz_4A_TDD_t *) & dci->dci_pdu[0])->rballoc, + ((DCI2_1_5MHz_4A_TDD_t *) & dci->dci_pdu[0])->mcs1, + ((DCI2_1_5MHz_4A_TDD_t *) & dci->dci_pdu[0])->mcs2, + ((DCI2_1_5MHz_4A_TDD_t *) & dci->dci_pdu[0])->harq_pid, + ((DCI2_1_5MHz_4A_TDD_t *) & dci->dci_pdu[0])->ndi1, + ((DCI2_1_5MHz_4A_TDD_t *) & dci->dci_pdu[0])->ndi2, + ((DCI2_1_5MHz_4A_TDD_t *) & dci->dci_pdu[0])->rv1, + ((DCI2_1_5MHz_4A_TDD_t *) & dci->dci_pdu[0])->rv2, + ((DCI2_1_5MHz_4A_TDD_t *) & dci->dci_pdu[0])->TPC, + ((DCI2_1_5MHz_4A_TDD_t *) & dci->dci_pdu[0])->dai, ((DCI2_1_5MHz_4A_TDD_t *) & dci->dci_pdu[0])->tb_swap, ((DCI2_1_5MHz_4A_TDD_t *) & dci->dci_pdu[0])->tpmi); break; case 25: - LOG_D(PHY,"DCI format2 2 antennas (TDD 5 MHz), rnti %x (%x): rah %d, rb_alloc %x, mcs %d|%d, harq_pid %d, ndi %d|%d, RV %d|%d, TPC %d, dai %d, tb_swap %d, tpmi %d\n", - dci->rnti, - ((uint32_t*)&dci->dci_pdu)[0], - ((DCI2_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->rah, - ((DCI2_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->rballoc, - ((DCI2_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->mcs1, - ((DCI2_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->mcs2, - ((DCI2_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->harq_pid, - ((DCI2_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->ndi1, - ((DCI2_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->ndi2, - ((DCI2_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->rv1, - ((DCI2_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->rv2, - ((DCI2_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->TPC, - ((DCI2_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->dai, - ((DCI2_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->tb_swap, - ((DCI2_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->tpmi); + LOG_D (PHY, "DCI format2 2 antennas (TDD 5 MHz), rnti %x (%x): rah %d, rb_alloc %x, mcs %d|%d, harq_pid %d, ndi %d|%d, RV %d|%d, TPC %d, dai %d, tb_swap %d, tpmi %d\n", + dci->rnti, + ((uint32_t *) & dci->dci_pdu)[0], + ((DCI2_5MHz_4A_TDD_t *) & dci->dci_pdu[0])->rah, + ((DCI2_5MHz_4A_TDD_t *) & dci->dci_pdu[0])->rballoc, + ((DCI2_5MHz_4A_TDD_t *) & dci->dci_pdu[0])->mcs1, + ((DCI2_5MHz_4A_TDD_t *) & dci->dci_pdu[0])->mcs2, + ((DCI2_5MHz_4A_TDD_t *) & dci->dci_pdu[0])->harq_pid, + ((DCI2_5MHz_4A_TDD_t *) & dci->dci_pdu[0])->ndi1, + ((DCI2_5MHz_4A_TDD_t *) & dci->dci_pdu[0])->ndi2, + ((DCI2_5MHz_4A_TDD_t *) & dci->dci_pdu[0])->rv1, + ((DCI2_5MHz_4A_TDD_t *) & dci->dci_pdu[0])->rv2, + ((DCI2_5MHz_4A_TDD_t *) & dci->dci_pdu[0])->TPC, + ((DCI2_5MHz_4A_TDD_t *) & dci->dci_pdu[0])->dai, ((DCI2_5MHz_4A_TDD_t *) & dci->dci_pdu[0])->tb_swap, ((DCI2_5MHz_4A_TDD_t *) & dci->dci_pdu[0])->tpmi); break; case 50: - LOG_D(PHY,"DCI format2 2 antennas (TDD 10 MHz), rnti %x (%x): rah %d, rb_alloc %x, mcs %d|%d, harq_pid %d, ndi %d|%d, RV %d|%d, TPC %d, dai %d, tb_swap %d, tpmi %d\n", - dci->rnti, - ((uint32_t*)&dci->dci_pdu)[0], - ((DCI2_10MHz_4A_TDD_t *)&dci->dci_pdu[0])->rah, - ((DCI2_10MHz_4A_TDD_t *)&dci->dci_pdu[0])->rballoc, - ((DCI2_10MHz_4A_TDD_t *)&dci->dci_pdu[0])->mcs1, - ((DCI2_10MHz_4A_TDD_t *)&dci->dci_pdu[0])->mcs2, - ((DCI2_10MHz_4A_TDD_t *)&dci->dci_pdu[0])->harq_pid, - ((DCI2_10MHz_4A_TDD_t *)&dci->dci_pdu[0])->ndi1, - ((DCI2_10MHz_4A_TDD_t *)&dci->dci_pdu[0])->ndi2, - ((DCI2_10MHz_4A_TDD_t *)&dci->dci_pdu[0])->rv1, - ((DCI2_10MHz_4A_TDD_t *)&dci->dci_pdu[0])->rv2, - ((DCI2_10MHz_4A_TDD_t *)&dci->dci_pdu[0])->TPC, - ((DCI2_10MHz_4A_TDD_t *)&dci->dci_pdu[0])->dai, - ((DCI2_10MHz_4A_TDD_t *)&dci->dci_pdu[0])->tb_swap, - ((DCI2_10MHz_4A_TDD_t *)&dci->dci_pdu[0])->tpmi); + LOG_D (PHY, "DCI format2 2 antennas (TDD 10 MHz), rnti %x (%x): rah %d, rb_alloc %x, mcs %d|%d, harq_pid %d, ndi %d|%d, RV %d|%d, TPC %d, dai %d, tb_swap %d, tpmi %d\n", + dci->rnti, + ((uint32_t *) & dci->dci_pdu)[0], + ((DCI2_10MHz_4A_TDD_t *) & dci->dci_pdu[0])->rah, + ((DCI2_10MHz_4A_TDD_t *) & dci->dci_pdu[0])->rballoc, + ((DCI2_10MHz_4A_TDD_t *) & dci->dci_pdu[0])->mcs1, + ((DCI2_10MHz_4A_TDD_t *) & dci->dci_pdu[0])->mcs2, + ((DCI2_10MHz_4A_TDD_t *) & dci->dci_pdu[0])->harq_pid, + ((DCI2_10MHz_4A_TDD_t *) & dci->dci_pdu[0])->ndi1, + ((DCI2_10MHz_4A_TDD_t *) & dci->dci_pdu[0])->ndi2, + ((DCI2_10MHz_4A_TDD_t *) & dci->dci_pdu[0])->rv1, + ((DCI2_10MHz_4A_TDD_t *) & dci->dci_pdu[0])->rv2, + ((DCI2_10MHz_4A_TDD_t *) & dci->dci_pdu[0])->TPC, + ((DCI2_10MHz_4A_TDD_t *) & dci->dci_pdu[0])->dai, ((DCI2_10MHz_4A_TDD_t *) & dci->dci_pdu[0])->tb_swap, ((DCI2_10MHz_4A_TDD_t *) & dci->dci_pdu[0])->tpmi); break; case 100: - LOG_D(PHY,"DCI format2 2 antennas (TDD 20 MHz), rnti %x (%x): rah %d, rb_alloc %x, mcs %d|%d, harq_pid %d, ndi %d|%d, RV %d|%d, TPC %d, dai %d, tb_swap %d, tpmi %d\n", - dci->rnti, - ((uint32_t*)&dci->dci_pdu)[0], - ((DCI2_20MHz_4A_TDD_t *)&dci->dci_pdu[0])->rah, - ((DCI2_20MHz_4A_TDD_t *)&dci->dci_pdu[0])->rballoc, - ((DCI2_20MHz_4A_TDD_t *)&dci->dci_pdu[0])->mcs1, - ((DCI2_20MHz_4A_TDD_t *)&dci->dci_pdu[0])->mcs2, - ((DCI2_20MHz_4A_TDD_t *)&dci->dci_pdu[0])->harq_pid, - ((DCI2_20MHz_4A_TDD_t *)&dci->dci_pdu[0])->ndi1, - ((DCI2_20MHz_4A_TDD_t *)&dci->dci_pdu[0])->ndi2, - ((DCI2_20MHz_4A_TDD_t *)&dci->dci_pdu[0])->rv1, - ((DCI2_20MHz_4A_TDD_t *)&dci->dci_pdu[0])->rv2, - ((DCI2_20MHz_4A_TDD_t *)&dci->dci_pdu[0])->TPC, - ((DCI2_20MHz_4A_TDD_t *)&dci->dci_pdu[0])->dai, - ((DCI2_20MHz_4A_TDD_t *)&dci->dci_pdu[0])->tb_swap, - ((DCI2_20MHz_4A_TDD_t *)&dci->dci_pdu[0])->tpmi); + LOG_D (PHY, "DCI format2 2 antennas (TDD 20 MHz), rnti %x (%x): rah %d, rb_alloc %x, mcs %d|%d, harq_pid %d, ndi %d|%d, RV %d|%d, TPC %d, dai %d, tb_swap %d, tpmi %d\n", + dci->rnti, + ((uint32_t *) & dci->dci_pdu)[0], + ((DCI2_20MHz_4A_TDD_t *) & dci->dci_pdu[0])->rah, + ((DCI2_20MHz_4A_TDD_t *) & dci->dci_pdu[0])->rballoc, + ((DCI2_20MHz_4A_TDD_t *) & dci->dci_pdu[0])->mcs1, + ((DCI2_20MHz_4A_TDD_t *) & dci->dci_pdu[0])->mcs2, + ((DCI2_20MHz_4A_TDD_t *) & dci->dci_pdu[0])->harq_pid, + ((DCI2_20MHz_4A_TDD_t *) & dci->dci_pdu[0])->ndi1, + ((DCI2_20MHz_4A_TDD_t *) & dci->dci_pdu[0])->ndi2, + ((DCI2_20MHz_4A_TDD_t *) & dci->dci_pdu[0])->rv1, + ((DCI2_20MHz_4A_TDD_t *) & dci->dci_pdu[0])->rv2, + ((DCI2_20MHz_4A_TDD_t *) & dci->dci_pdu[0])->TPC, + ((DCI2_20MHz_4A_TDD_t *) & dci->dci_pdu[0])->dai, ((DCI2_20MHz_4A_TDD_t *) & dci->dci_pdu[0])->tb_swap, ((DCI2_20MHz_4A_TDD_t *) & dci->dci_pdu[0])->tpmi); break; default: - LOG_E(PHY,"Invalid N_RB_DL %d\n", frame_parms->N_RB_DL); + LOG_E (PHY, "Invalid N_RB_DL %d\n", frame_parms->N_RB_DL); DevParam (frame_parms->N_RB_DL, 0, 0); break; } } } else if (frame_parms->frame_type == FDD) { if (frame_parms->nb_antenna_ports_eNB == 2) { - switch(frame_parms->N_RB_DL) { + switch (frame_parms->N_RB_DL) { case 6: - LOG_D(PHY,"DCI format2 2 antennas (FDD, 1.5 MHz), rnti %x (%x): rb_alloc %x, mcs1 %d, mcs2 %d, harq_pid %d, ndi1 %d, ndi2 %d, RV1 %d, RV2 %d, tb_swap %d, tpmi %d, TPC %d\n", - dci->rnti, - ((uint32_t*)&dci->dci_pdu)[0], - ((DCI2_1_5MHz_2A_FDD_t *)&dci->dci_pdu[0])->rballoc, - ((DCI2_1_5MHz_2A_FDD_t *)&dci->dci_pdu[0])->mcs1, - ((DCI2_1_5MHz_2A_FDD_t *)&dci->dci_pdu[0])->mcs2, - ((DCI2_1_5MHz_2A_FDD_t *)&dci->dci_pdu[0])->harq_pid, - ((DCI2_1_5MHz_2A_FDD_t *)&dci->dci_pdu[0])->ndi1, - ((DCI2_1_5MHz_2A_FDD_t *)&dci->dci_pdu[0])->ndi2, - ((DCI2_1_5MHz_2A_FDD_t *)&dci->dci_pdu[0])->rv1, - ((DCI2_1_5MHz_2A_FDD_t *)&dci->dci_pdu[0])->rv2, - ((DCI2_1_5MHz_2A_FDD_t *)&dci->dci_pdu[0])->tb_swap, - ((DCI2_1_5MHz_2A_FDD_t *)&dci->dci_pdu[0])->tpmi, - ((DCI2_1_5MHz_2A_FDD_t *)&dci->dci_pdu[0])->TPC); + LOG_D (PHY, "DCI format2 2 antennas (FDD, 1.5 MHz), rnti %x (%x): rb_alloc %x, mcs1 %d, mcs2 %d, harq_pid %d, ndi1 %d, ndi2 %d, RV1 %d, RV2 %d, tb_swap %d, tpmi %d, TPC %d\n", + dci->rnti, + ((uint32_t *) & dci->dci_pdu)[0], + ((DCI2_1_5MHz_2A_FDD_t *) & dci->dci_pdu[0])->rballoc, + ((DCI2_1_5MHz_2A_FDD_t *) & dci->dci_pdu[0])->mcs1, + ((DCI2_1_5MHz_2A_FDD_t *) & dci->dci_pdu[0])->mcs2, + ((DCI2_1_5MHz_2A_FDD_t *) & dci->dci_pdu[0])->harq_pid, + ((DCI2_1_5MHz_2A_FDD_t *) & dci->dci_pdu[0])->ndi1, + ((DCI2_1_5MHz_2A_FDD_t *) & dci->dci_pdu[0])->ndi2, + ((DCI2_1_5MHz_2A_FDD_t *) & dci->dci_pdu[0])->rv1, + ((DCI2_1_5MHz_2A_FDD_t *) & dci->dci_pdu[0])->rv2, + ((DCI2_1_5MHz_2A_FDD_t *) & dci->dci_pdu[0])->tb_swap, ((DCI2_1_5MHz_2A_FDD_t *) & dci->dci_pdu[0])->tpmi, ((DCI2_1_5MHz_2A_FDD_t *) & dci->dci_pdu[0])->TPC); break; case 25: - LOG_D(PHY,"DCI format2 2 antennas (FDD, 5 MHz), rnti %x (%x): rah %d, rb_alloc %x, mcs1 %d, mcs2 %d, harq_pid %d, ndi1 %d, ndi2 %d, RV1 %d, RV2 %d, swap %d, TPMI %d, TPC %d\n", - - dci->rnti, - ((uint32_t*)&dci->dci_pdu)[0], - ((DCI2_5MHz_2A_FDD_t *)&dci->dci_pdu[0])->rah, - ((DCI2_5MHz_2A_FDD_t *)&dci->dci_pdu[0])->rballoc, - ((DCI2_5MHz_2A_FDD_t *)&dci->dci_pdu[0])->mcs1, - ((DCI2_5MHz_2A_FDD_t *)&dci->dci_pdu[0])->mcs2, - ((DCI2_5MHz_2A_FDD_t *)&dci->dci_pdu[0])->harq_pid, - ((DCI2_5MHz_2A_FDD_t *)&dci->dci_pdu[0])->ndi1, - ((DCI2_5MHz_2A_FDD_t *)&dci->dci_pdu[0])->ndi2, - ((DCI2_5MHz_2A_FDD_t *)&dci->dci_pdu[0])->rv1, - ((DCI2_5MHz_2A_FDD_t *)&dci->dci_pdu[0])->rv2, - ((DCI2_5MHz_2A_FDD_t *)&dci->dci_pdu[0])->tb_swap, - ((DCI2_5MHz_2A_FDD_t *)&dci->dci_pdu[0])->tpmi, - ((DCI2_5MHz_2A_FDD_t *)&dci->dci_pdu[0])->TPC); + LOG_D (PHY, "DCI format2 2 antennas (FDD, 5 MHz), rnti %x (%x): rah %d, rb_alloc %x, mcs1 %d, mcs2 %d, harq_pid %d, ndi1 %d, ndi2 %d, RV1 %d, RV2 %d, swap %d, TPMI %d, TPC %d\n", + dci->rnti, + ((uint32_t *) & dci->dci_pdu)[0], + ((DCI2_5MHz_2A_FDD_t *) & dci->dci_pdu[0])->rah, + ((DCI2_5MHz_2A_FDD_t *) & dci->dci_pdu[0])->rballoc, + ((DCI2_5MHz_2A_FDD_t *) & dci->dci_pdu[0])->mcs1, + ((DCI2_5MHz_2A_FDD_t *) & dci->dci_pdu[0])->mcs2, + ((DCI2_5MHz_2A_FDD_t *) & dci->dci_pdu[0])->harq_pid, + ((DCI2_5MHz_2A_FDD_t *) & dci->dci_pdu[0])->ndi1, + ((DCI2_5MHz_2A_FDD_t *) & dci->dci_pdu[0])->ndi2, + ((DCI2_5MHz_2A_FDD_t *) & dci->dci_pdu[0])->rv1, + ((DCI2_5MHz_2A_FDD_t *) & dci->dci_pdu[0])->rv2, + ((DCI2_5MHz_2A_FDD_t *) & dci->dci_pdu[0])->tb_swap, ((DCI2_5MHz_2A_FDD_t *) & dci->dci_pdu[0])->tpmi, ((DCI2_5MHz_2A_FDD_t *) & dci->dci_pdu[0])->TPC); break; case 50: - LOG_D(PHY,"DCI format2 2 antennas (FDD, 10 MHz), rnti %x (%x): rah %d, rb_alloc %x, mcs %d|%d, harq_pid %d, ndi %d|%d, RV %d|%d, tb_swap %d, tpmi %d, TPC %d\n", - dci->rnti, - ((uint32_t*)&dci->dci_pdu)[0], - ((DCI2_10MHz_2A_FDD_t *)&dci->dci_pdu[0])->rah, - ((DCI2_10MHz_2A_FDD_t *)&dci->dci_pdu[0])->rballoc, - ((DCI2_10MHz_2A_FDD_t *)&dci->dci_pdu[0])->mcs1, - ((DCI2_10MHz_2A_FDD_t *)&dci->dci_pdu[0])->mcs2, - ((DCI2_10MHz_2A_FDD_t *)&dci->dci_pdu[0])->harq_pid, - ((DCI2_10MHz_2A_FDD_t *)&dci->dci_pdu[0])->ndi1, - ((DCI2_10MHz_2A_FDD_t *)&dci->dci_pdu[0])->ndi2, - ((DCI2_10MHz_2A_FDD_t *)&dci->dci_pdu[0])->rv1, - ((DCI2_10MHz_2A_FDD_t *)&dci->dci_pdu[0])->rv2, - ((DCI2_10MHz_2A_FDD_t *)&dci->dci_pdu[0])->tb_swap, - ((DCI2_10MHz_2A_FDD_t *)&dci->dci_pdu[0])->tpmi, - ((DCI2_10MHz_2A_FDD_t *)&dci->dci_pdu[0])->TPC); + LOG_D (PHY, "DCI format2 2 antennas (FDD, 10 MHz), rnti %x (%x): rah %d, rb_alloc %x, mcs %d|%d, harq_pid %d, ndi %d|%d, RV %d|%d, tb_swap %d, tpmi %d, TPC %d\n", + dci->rnti, + ((uint32_t *) & dci->dci_pdu)[0], + ((DCI2_10MHz_2A_FDD_t *) & dci->dci_pdu[0])->rah, + ((DCI2_10MHz_2A_FDD_t *) & dci->dci_pdu[0])->rballoc, + ((DCI2_10MHz_2A_FDD_t *) & dci->dci_pdu[0])->mcs1, + ((DCI2_10MHz_2A_FDD_t *) & dci->dci_pdu[0])->mcs2, + ((DCI2_10MHz_2A_FDD_t *) & dci->dci_pdu[0])->harq_pid, + ((DCI2_10MHz_2A_FDD_t *) & dci->dci_pdu[0])->ndi1, + ((DCI2_10MHz_2A_FDD_t *) & dci->dci_pdu[0])->ndi2, + ((DCI2_10MHz_2A_FDD_t *) & dci->dci_pdu[0])->rv1, + ((DCI2_10MHz_2A_FDD_t *) & dci->dci_pdu[0])->rv2, + ((DCI2_10MHz_2A_FDD_t *) & dci->dci_pdu[0])->tb_swap, ((DCI2_10MHz_2A_FDD_t *) & dci->dci_pdu[0])->tpmi, ((DCI2_10MHz_2A_FDD_t *) & dci->dci_pdu[0])->TPC); break; case 100: - LOG_D(PHY,"DCI format2 2 antennas (FDD, 20 MHz), rnti %x (%x): rah %d, rb_alloc %x, mcs %d|%d, harq_pid %d, ndi %d|%d, RV %d|%d, tb_swap %d, tpmi %d, TPC %d\n", - dci->rnti, - ((uint32_t*)&dci->dci_pdu)[0], - ((DCI2_20MHz_2A_FDD_t *)&dci->dci_pdu[0])->rah, - ((DCI2_20MHz_2A_FDD_t *)&dci->dci_pdu[0])->rballoc, - ((DCI2_20MHz_2A_FDD_t *)&dci->dci_pdu[0])->mcs1, - ((DCI2_20MHz_2A_FDD_t *)&dci->dci_pdu[0])->mcs2, - ((DCI2_20MHz_2A_FDD_t *)&dci->dci_pdu[0])->harq_pid, - ((DCI2_20MHz_2A_FDD_t *)&dci->dci_pdu[0])->ndi1, - ((DCI2_20MHz_2A_FDD_t *)&dci->dci_pdu[0])->ndi2, - ((DCI2_20MHz_2A_FDD_t *)&dci->dci_pdu[0])->rv1, - ((DCI2_20MHz_2A_FDD_t *)&dci->dci_pdu[0])->rv2, - ((DCI2_20MHz_2A_FDD_t *)&dci->dci_pdu[0])->tb_swap, - ((DCI2_20MHz_2A_FDD_t *)&dci->dci_pdu[0])->tpmi, - ((DCI2_20MHz_2A_FDD_t *)&dci->dci_pdu[0])->TPC); + LOG_D (PHY, "DCI format2 2 antennas (FDD, 20 MHz), rnti %x (%x): rah %d, rb_alloc %x, mcs %d|%d, harq_pid %d, ndi %d|%d, RV %d|%d, tb_swap %d, tpmi %d, TPC %d\n", + dci->rnti, + ((uint32_t *) & dci->dci_pdu)[0], + ((DCI2_20MHz_2A_FDD_t *) & dci->dci_pdu[0])->rah, + ((DCI2_20MHz_2A_FDD_t *) & dci->dci_pdu[0])->rballoc, + ((DCI2_20MHz_2A_FDD_t *) & dci->dci_pdu[0])->mcs1, + ((DCI2_20MHz_2A_FDD_t *) & dci->dci_pdu[0])->mcs2, + ((DCI2_20MHz_2A_FDD_t *) & dci->dci_pdu[0])->harq_pid, + ((DCI2_20MHz_2A_FDD_t *) & dci->dci_pdu[0])->ndi1, + ((DCI2_20MHz_2A_FDD_t *) & dci->dci_pdu[0])->ndi2, + ((DCI2_20MHz_2A_FDD_t *) & dci->dci_pdu[0])->rv1, + ((DCI2_20MHz_2A_FDD_t *) & dci->dci_pdu[0])->rv2, + ((DCI2_20MHz_2A_FDD_t *) & dci->dci_pdu[0])->tb_swap, ((DCI2_20MHz_2A_FDD_t *) & dci->dci_pdu[0])->tpmi, ((DCI2_20MHz_2A_FDD_t *) & dci->dci_pdu[0])->TPC); break; default: - LOG_E(PHY,"Invalid N_RB_DL %d\n", frame_parms->N_RB_DL); + LOG_E (PHY, "Invalid N_RB_DL %d\n", frame_parms->N_RB_DL); DevParam (frame_parms->N_RB_DL, 0, 0); break; } } else if (frame_parms->nb_antenna_ports_eNB == 4) { - switch(frame_parms->N_RB_DL) { + switch (frame_parms->N_RB_DL) { case 6: - LOG_D(PHY,"DCI format2 4 antennas (FDD, 1.5 MHz), rnti %x (%x): rb_alloc %x, mcs1 %d, mcs2 %d, harq_pid %d, ndi1 %d, ndi2 %d, RV1 %d, RV2 %d, tb_swap %d, tpmi %d, TPC %d\n", - dci->rnti, - ((uint32_t*)&dci->dci_pdu)[0], - ((DCI2_1_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->rballoc, - ((DCI2_1_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->mcs1, - ((DCI2_1_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->mcs2, - ((DCI2_1_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->harq_pid, - ((DCI2_1_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->ndi1, - ((DCI2_1_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->ndi2, - ((DCI2_1_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->rv1, - ((DCI2_1_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->rv2, - ((DCI2_1_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->tb_swap, - ((DCI2_1_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->tpmi, - ((DCI2_1_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->TPC); + LOG_D (PHY, "DCI format2 4 antennas (FDD, 1.5 MHz), rnti %x (%x): rb_alloc %x, mcs1 %d, mcs2 %d, harq_pid %d, ndi1 %d, ndi2 %d, RV1 %d, RV2 %d, tb_swap %d, tpmi %d, TPC %d\n", + dci->rnti, + ((uint32_t *) & dci->dci_pdu)[0], + ((DCI2_1_5MHz_4A_FDD_t *) & dci->dci_pdu[0])->rballoc, + ((DCI2_1_5MHz_4A_FDD_t *) & dci->dci_pdu[0])->mcs1, + ((DCI2_1_5MHz_4A_FDD_t *) & dci->dci_pdu[0])->mcs2, + ((DCI2_1_5MHz_4A_FDD_t *) & dci->dci_pdu[0])->harq_pid, + ((DCI2_1_5MHz_4A_FDD_t *) & dci->dci_pdu[0])->ndi1, + ((DCI2_1_5MHz_4A_FDD_t *) & dci->dci_pdu[0])->ndi2, + ((DCI2_1_5MHz_4A_FDD_t *) & dci->dci_pdu[0])->rv1, + ((DCI2_1_5MHz_4A_FDD_t *) & dci->dci_pdu[0])->rv2, + ((DCI2_1_5MHz_4A_FDD_t *) & dci->dci_pdu[0])->tb_swap, ((DCI2_1_5MHz_4A_FDD_t *) & dci->dci_pdu[0])->tpmi, ((DCI2_1_5MHz_4A_FDD_t *) & dci->dci_pdu[0])->TPC); break; case 25: - LOG_D(PHY,"DCI format2 4 antennas (FDD, 5 MHz), rnti %x (%x): rah %d, rb_alloc %x, mcs %d|%d, harq_pid %d, ndi %d|%d, RV %d|%d, tb_swap %d, tpmi %d, TPC %d\n", - dci->rnti, - ((uint32_t*)&dci->dci_pdu)[0], - ((DCI2_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->rah, - ((DCI2_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->rballoc, - ((DCI2_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->mcs1, - ((DCI2_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->mcs2, - ((DCI2_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->harq_pid, - ((DCI2_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->ndi1, - ((DCI2_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->ndi2, - ((DCI2_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->rv1, - ((DCI2_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->rv2, - ((DCI2_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->tb_swap, - ((DCI2_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->tpmi, - ((DCI2_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->TPC); + LOG_D (PHY, "DCI format2 4 antennas (FDD, 5 MHz), rnti %x (%x): rah %d, rb_alloc %x, mcs %d|%d, harq_pid %d, ndi %d|%d, RV %d|%d, tb_swap %d, tpmi %d, TPC %d\n", + dci->rnti, + ((uint32_t *) & dci->dci_pdu)[0], + ((DCI2_5MHz_4A_FDD_t *) & dci->dci_pdu[0])->rah, + ((DCI2_5MHz_4A_FDD_t *) & dci->dci_pdu[0])->rballoc, + ((DCI2_5MHz_4A_FDD_t *) & dci->dci_pdu[0])->mcs1, + ((DCI2_5MHz_4A_FDD_t *) & dci->dci_pdu[0])->mcs2, + ((DCI2_5MHz_4A_FDD_t *) & dci->dci_pdu[0])->harq_pid, + ((DCI2_5MHz_4A_FDD_t *) & dci->dci_pdu[0])->ndi1, + ((DCI2_5MHz_4A_FDD_t *) & dci->dci_pdu[0])->ndi2, + ((DCI2_5MHz_4A_FDD_t *) & dci->dci_pdu[0])->rv1, + ((DCI2_5MHz_4A_FDD_t *) & dci->dci_pdu[0])->rv2, + ((DCI2_5MHz_4A_FDD_t *) & dci->dci_pdu[0])->tb_swap, ((DCI2_5MHz_4A_FDD_t *) & dci->dci_pdu[0])->tpmi, ((DCI2_5MHz_4A_FDD_t *) & dci->dci_pdu[0])->TPC); break; case 50: - LOG_D(PHY,"DCI format2 4 antennas (FDD, 10 MHz), rnti %x (%x): rah %d, rb_alloc %x, mcs %d|%d, harq_pid %d, ndi %d|%d, RV %d|%d, tb_swap %d, tpmi %d, TPC %d\n", - dci->rnti, - ((uint32_t*)&dci->dci_pdu)[0], - ((DCI2_10MHz_4A_FDD_t *)&dci->dci_pdu[0])->rah, - ((DCI2_10MHz_4A_FDD_t *)&dci->dci_pdu[0])->rballoc, - ((DCI2_10MHz_4A_FDD_t *)&dci->dci_pdu[0])->mcs1, - ((DCI2_10MHz_4A_FDD_t *)&dci->dci_pdu[0])->mcs2, - ((DCI2_10MHz_4A_FDD_t *)&dci->dci_pdu[0])->harq_pid, - ((DCI2_10MHz_4A_FDD_t *)&dci->dci_pdu[0])->ndi1, - ((DCI2_10MHz_4A_FDD_t *)&dci->dci_pdu[0])->ndi2, - ((DCI2_10MHz_4A_FDD_t *)&dci->dci_pdu[0])->rv1, - ((DCI2_10MHz_4A_FDD_t *)&dci->dci_pdu[0])->rv2, - ((DCI2_10MHz_4A_FDD_t *)&dci->dci_pdu[0])->tb_swap, - ((DCI2_10MHz_4A_FDD_t *)&dci->dci_pdu[0])->tpmi, - ((DCI2_10MHz_4A_FDD_t *)&dci->dci_pdu[0])->TPC); + LOG_D (PHY, "DCI format2 4 antennas (FDD, 10 MHz), rnti %x (%x): rah %d, rb_alloc %x, mcs %d|%d, harq_pid %d, ndi %d|%d, RV %d|%d, tb_swap %d, tpmi %d, TPC %d\n", + dci->rnti, + ((uint32_t *) & dci->dci_pdu)[0], + ((DCI2_10MHz_4A_FDD_t *) & dci->dci_pdu[0])->rah, + ((DCI2_10MHz_4A_FDD_t *) & dci->dci_pdu[0])->rballoc, + ((DCI2_10MHz_4A_FDD_t *) & dci->dci_pdu[0])->mcs1, + ((DCI2_10MHz_4A_FDD_t *) & dci->dci_pdu[0])->mcs2, + ((DCI2_10MHz_4A_FDD_t *) & dci->dci_pdu[0])->harq_pid, + ((DCI2_10MHz_4A_FDD_t *) & dci->dci_pdu[0])->ndi1, + ((DCI2_10MHz_4A_FDD_t *) & dci->dci_pdu[0])->ndi2, + ((DCI2_10MHz_4A_FDD_t *) & dci->dci_pdu[0])->rv1, + ((DCI2_10MHz_4A_FDD_t *) & dci->dci_pdu[0])->rv2, + ((DCI2_10MHz_4A_FDD_t *) & dci->dci_pdu[0])->tb_swap, ((DCI2_10MHz_4A_FDD_t *) & dci->dci_pdu[0])->tpmi, ((DCI2_10MHz_4A_FDD_t *) & dci->dci_pdu[0])->TPC); break; case 100: - LOG_D(PHY,"DCI format2 4 antennas (FDD, 20 MHz), rnti %x (%x): rah %d, rb_alloc %x, mcs %d|%d, harq_pid %d, ndi %d|%d, RV %d|%d, tb_swap %d, tpmi %d, TPC %d\n", - dci->rnti, - ((uint32_t*)&dci->dci_pdu)[0], - ((DCI2_20MHz_4A_FDD_t *)&dci->dci_pdu[0])->rah, - ((DCI2_20MHz_4A_FDD_t *)&dci->dci_pdu[0])->rballoc, - ((DCI2_20MHz_4A_FDD_t *)&dci->dci_pdu[0])->mcs1, - ((DCI2_20MHz_4A_FDD_t *)&dci->dci_pdu[0])->mcs2, - ((DCI2_20MHz_4A_FDD_t *)&dci->dci_pdu[0])->harq_pid, - ((DCI2_20MHz_4A_FDD_t *)&dci->dci_pdu[0])->ndi1, - ((DCI2_20MHz_4A_FDD_t *)&dci->dci_pdu[0])->ndi2, - ((DCI2_20MHz_4A_FDD_t *)&dci->dci_pdu[0])->rv1, - ((DCI2_20MHz_4A_FDD_t *)&dci->dci_pdu[0])->rv2, - ((DCI2_20MHz_4A_FDD_t *)&dci->dci_pdu[0])->tb_swap, - ((DCI2_20MHz_4A_FDD_t *)&dci->dci_pdu[0])->tpmi, - ((DCI2_20MHz_4A_FDD_t *)&dci->dci_pdu[0])->TPC); + LOG_D (PHY, "DCI format2 4 antennas (FDD, 20 MHz), rnti %x (%x): rah %d, rb_alloc %x, mcs %d|%d, harq_pid %d, ndi %d|%d, RV %d|%d, tb_swap %d, tpmi %d, TPC %d\n", + dci->rnti, + ((uint32_t *) & dci->dci_pdu)[0], + ((DCI2_20MHz_4A_FDD_t *) & dci->dci_pdu[0])->rah, + ((DCI2_20MHz_4A_FDD_t *) & dci->dci_pdu[0])->rballoc, + ((DCI2_20MHz_4A_FDD_t *) & dci->dci_pdu[0])->mcs1, + ((DCI2_20MHz_4A_FDD_t *) & dci->dci_pdu[0])->mcs2, + ((DCI2_20MHz_4A_FDD_t *) & dci->dci_pdu[0])->harq_pid, + ((DCI2_20MHz_4A_FDD_t *) & dci->dci_pdu[0])->ndi1, + ((DCI2_20MHz_4A_FDD_t *) & dci->dci_pdu[0])->ndi2, + ((DCI2_20MHz_4A_FDD_t *) & dci->dci_pdu[0])->rv1, + ((DCI2_20MHz_4A_FDD_t *) & dci->dci_pdu[0])->rv2, + ((DCI2_20MHz_4A_FDD_t *) & dci->dci_pdu[0])->tb_swap, ((DCI2_20MHz_4A_FDD_t *) & dci->dci_pdu[0])->tpmi, ((DCI2_20MHz_4A_FDD_t *) & dci->dci_pdu[0])->TPC); break; default: - LOG_E(PHY,"Invalid N_RB_DL %d\n", frame_parms->N_RB_DL); + LOG_E (PHY, "Invalid N_RB_DL %d\n", frame_parms->N_RB_DL); DevParam (frame_parms->N_RB_DL, 0, 0); break; } @@ -3394,328 +3304,251 @@ int dump_dci(LTE_DL_FRAME_PARMS *frame_parms, DCI_ALLOC_t *dci) } else - LOG_E(PHY,"Don't know how to handle TDD format 0 yet\n"); + LOG_E (PHY, "Don't know how to handle TDD format 0 yet\n"); break; case format2A: - if ((frame_parms->frame_type == TDD) && - (frame_parms->tdd_config>0)) { + if ((frame_parms->frame_type == TDD) && (frame_parms->tdd_config > 0)) { if (frame_parms->nb_antenna_ports_eNB == 2) { - switch(frame_parms->N_RB_DL) { + switch (frame_parms->N_RB_DL) { case 6: - LOG_D(PHY,"DCI format2A 2 antennas (FDD 1.5 MHz), rnti %x (%x): rb_alloc %x, mcs1 %d, mcs2 %d, harq_pid %d, ndi1 %d, ndi2 %d, RV1 %d, RV2 %d, TPC %d, dai %d, tbswap %d\n", - dci->rnti, - ((uint32_t*)&dci->dci_pdu)[0], - ((DCI2A_1_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->rballoc, - ((DCI2A_1_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->mcs1, - ((DCI2A_1_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->mcs2, - ((DCI2A_1_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->harq_pid, - ((DCI2A_1_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->ndi1, - ((DCI2A_1_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->ndi2, - ((DCI2A_1_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->rv1, - ((DCI2A_1_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->rv2, - ((DCI2A_1_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->TPC, - ((DCI2A_1_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->dai, - ((DCI2A_1_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->tb_swap - ); + LOG_D (PHY, "DCI format2A 2 antennas (FDD 1.5 MHz), rnti %x (%x): rb_alloc %x, mcs1 %d, mcs2 %d, harq_pid %d, ndi1 %d, ndi2 %d, RV1 %d, RV2 %d, TPC %d, dai %d, tbswap %d\n", + dci->rnti, + ((uint32_t *) & dci->dci_pdu)[0], + ((DCI2A_1_5MHz_2A_TDD_t *) & dci->dci_pdu[0])->rballoc, + ((DCI2A_1_5MHz_2A_TDD_t *) & dci->dci_pdu[0])->mcs1, + ((DCI2A_1_5MHz_2A_TDD_t *) & dci->dci_pdu[0])->mcs2, + ((DCI2A_1_5MHz_2A_TDD_t *) & dci->dci_pdu[0])->harq_pid, + ((DCI2A_1_5MHz_2A_TDD_t *) & dci->dci_pdu[0])->ndi1, + ((DCI2A_1_5MHz_2A_TDD_t *) & dci->dci_pdu[0])->ndi2, + ((DCI2A_1_5MHz_2A_TDD_t *) & dci->dci_pdu[0])->rv1, + ((DCI2A_1_5MHz_2A_TDD_t *) & dci->dci_pdu[0])->rv2, + ((DCI2A_1_5MHz_2A_TDD_t *) & dci->dci_pdu[0])->TPC, ((DCI2A_1_5MHz_2A_TDD_t *) & dci->dci_pdu[0])->dai, ((DCI2A_1_5MHz_2A_TDD_t *) & dci->dci_pdu[0])->tb_swap); break; case 25: - LOG_D(PHY,"DCI format2A 2 antennas (FDD 5 MHz), rnti %x (%"PRIu64"): rah %d, rb_alloc %x, mcs1 %d, mcs2 %d, harq_pid %d, ndi1 %d, ndi2 %d, RV1 %d, RV2 %d, TPC %d, dai %d, tbswap %d\n", - dci->rnti, - ((uint64_t*)&dci->dci_pdu)[0], - ((DCI2A_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->rah, - ((DCI2A_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->rballoc, - ((DCI2A_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->mcs1, - ((DCI2A_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->mcs2, - ((DCI2A_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->harq_pid, - ((DCI2A_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->ndi1, - ((DCI2A_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->ndi2, - ((DCI2A_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->rv1, - ((DCI2A_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->rv2, - ((DCI2A_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->TPC, - ((DCI2A_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->dai, - ((DCI2A_5MHz_2A_TDD_t *)&dci->dci_pdu[0])->tb_swap); + LOG_D (PHY, "DCI format2A 2 antennas (FDD 5 MHz), rnti %x (%" PRIu64 "): rah %d, rb_alloc %x, mcs1 %d, mcs2 %d, harq_pid %d, ndi1 %d, ndi2 %d, RV1 %d, RV2 %d, TPC %d, dai %d, tbswap %d\n", + dci->rnti, + ((uint64_t *) & dci->dci_pdu)[0], + ((DCI2A_5MHz_2A_TDD_t *) & dci->dci_pdu[0])->rah, + ((DCI2A_5MHz_2A_TDD_t *) & dci->dci_pdu[0])->rballoc, + ((DCI2A_5MHz_2A_TDD_t *) & dci->dci_pdu[0])->mcs1, + ((DCI2A_5MHz_2A_TDD_t *) & dci->dci_pdu[0])->mcs2, + ((DCI2A_5MHz_2A_TDD_t *) & dci->dci_pdu[0])->harq_pid, + ((DCI2A_5MHz_2A_TDD_t *) & dci->dci_pdu[0])->ndi1, + ((DCI2A_5MHz_2A_TDD_t *) & dci->dci_pdu[0])->ndi2, + ((DCI2A_5MHz_2A_TDD_t *) & dci->dci_pdu[0])->rv1, + ((DCI2A_5MHz_2A_TDD_t *) & dci->dci_pdu[0])->rv2, + ((DCI2A_5MHz_2A_TDD_t *) & dci->dci_pdu[0])->TPC, ((DCI2A_5MHz_2A_TDD_t *) & dci->dci_pdu[0])->dai, ((DCI2A_5MHz_2A_TDD_t *) & dci->dci_pdu[0])->tb_swap); break; case 50: - LOG_D(PHY,"DCI format2A 2 antennas (FDD 10 MHz), rnti %x (%"PRIu64"): rah %d, rb_alloc %x, mcs1 %d, mcs2 %d, harq_pid %d, ndi1 %d, ndi2 %d, RV1 %d, RV2 %d, TPC %d, dai %d, tbswap %d\n", - dci->rnti, - ((uint64_t*)&dci->dci_pdu)[0], - ((DCI2A_10MHz_2A_TDD_t *)&dci->dci_pdu[0])->rah, - ((DCI2A_10MHz_2A_TDD_t *)&dci->dci_pdu[0])->rballoc, - ((DCI2A_10MHz_2A_TDD_t *)&dci->dci_pdu[0])->mcs1, - ((DCI2A_10MHz_2A_TDD_t *)&dci->dci_pdu[0])->mcs2, - ((DCI2A_10MHz_2A_TDD_t *)&dci->dci_pdu[0])->harq_pid, - ((DCI2A_10MHz_2A_TDD_t *)&dci->dci_pdu[0])->ndi1, - ((DCI2A_10MHz_2A_TDD_t *)&dci->dci_pdu[0])->ndi2, - ((DCI2A_10MHz_2A_TDD_t *)&dci->dci_pdu[0])->rv1, - ((DCI2A_10MHz_2A_TDD_t *)&dci->dci_pdu[0])->rv2, - ((DCI2A_10MHz_2A_TDD_t *)&dci->dci_pdu[0])->TPC, - ((DCI2A_10MHz_2A_TDD_t *)&dci->dci_pdu[0])->dai, - ((DCI2A_10MHz_2A_TDD_t *)&dci->dci_pdu[0])->tb_swap); + LOG_D (PHY, "DCI format2A 2 antennas (FDD 10 MHz), rnti %x (%" PRIu64 "): rah %d, rb_alloc %x, mcs1 %d, mcs2 %d, harq_pid %d, ndi1 %d, ndi2 %d, RV1 %d, RV2 %d, TPC %d, dai %d, tbswap %d\n", + dci->rnti, + ((uint64_t *) & dci->dci_pdu)[0], + ((DCI2A_10MHz_2A_TDD_t *) & dci->dci_pdu[0])->rah, + ((DCI2A_10MHz_2A_TDD_t *) & dci->dci_pdu[0])->rballoc, + ((DCI2A_10MHz_2A_TDD_t *) & dci->dci_pdu[0])->mcs1, + ((DCI2A_10MHz_2A_TDD_t *) & dci->dci_pdu[0])->mcs2, + ((DCI2A_10MHz_2A_TDD_t *) & dci->dci_pdu[0])->harq_pid, + ((DCI2A_10MHz_2A_TDD_t *) & dci->dci_pdu[0])->ndi1, + ((DCI2A_10MHz_2A_TDD_t *) & dci->dci_pdu[0])->ndi2, + ((DCI2A_10MHz_2A_TDD_t *) & dci->dci_pdu[0])->rv1, + ((DCI2A_10MHz_2A_TDD_t *) & dci->dci_pdu[0])->rv2, + ((DCI2A_10MHz_2A_TDD_t *) & dci->dci_pdu[0])->TPC, ((DCI2A_10MHz_2A_TDD_t *) & dci->dci_pdu[0])->dai, ((DCI2A_10MHz_2A_TDD_t *) & dci->dci_pdu[0])->tb_swap); break; case 100: - LOG_D(PHY,"DCI format2A 2 antennas (FDD 20 MHz), rnti %x (%"PRIu64"): rah %d, rb_alloc %x, mcs1 %d, mcs2 %d, harq_pid %d, ndi1 %d, ndi2 %d, RV1 %d, RV2 %d, TPC %d, dai %d, tbswap %d\n", - dci->rnti, - ((uint64_t*)&dci->dci_pdu)[0], - ((DCI2A_20MHz_2A_TDD_t *)&dci->dci_pdu[0])->rah, - ((DCI2A_20MHz_2A_TDD_t *)&dci->dci_pdu[0])->rballoc, - ((DCI2A_20MHz_2A_TDD_t *)&dci->dci_pdu[0])->mcs1, - ((DCI2A_20MHz_2A_TDD_t *)&dci->dci_pdu[0])->mcs2, - ((DCI2A_20MHz_2A_TDD_t *)&dci->dci_pdu[0])->harq_pid, - ((DCI2A_20MHz_2A_TDD_t *)&dci->dci_pdu[0])->ndi1, - ((DCI2A_20MHz_2A_TDD_t *)&dci->dci_pdu[0])->ndi2, - ((DCI2A_20MHz_2A_TDD_t *)&dci->dci_pdu[0])->rv1, - ((DCI2A_20MHz_2A_TDD_t *)&dci->dci_pdu[0])->rv2, - ((DCI2A_20MHz_2A_TDD_t *)&dci->dci_pdu[0])->TPC, - ((DCI2A_20MHz_2A_TDD_t *)&dci->dci_pdu[0])->dai, - ((DCI2A_20MHz_2A_TDD_t *)&dci->dci_pdu[0])->tb_swap); + LOG_D (PHY, "DCI format2A 2 antennas (FDD 20 MHz), rnti %x (%" PRIu64 "): rah %d, rb_alloc %x, mcs1 %d, mcs2 %d, harq_pid %d, ndi1 %d, ndi2 %d, RV1 %d, RV2 %d, TPC %d, dai %d, tbswap %d\n", + dci->rnti, + ((uint64_t *) & dci->dci_pdu)[0], + ((DCI2A_20MHz_2A_TDD_t *) & dci->dci_pdu[0])->rah, + ((DCI2A_20MHz_2A_TDD_t *) & dci->dci_pdu[0])->rballoc, + ((DCI2A_20MHz_2A_TDD_t *) & dci->dci_pdu[0])->mcs1, + ((DCI2A_20MHz_2A_TDD_t *) & dci->dci_pdu[0])->mcs2, + ((DCI2A_20MHz_2A_TDD_t *) & dci->dci_pdu[0])->harq_pid, + ((DCI2A_20MHz_2A_TDD_t *) & dci->dci_pdu[0])->ndi1, + ((DCI2A_20MHz_2A_TDD_t *) & dci->dci_pdu[0])->ndi2, + ((DCI2A_20MHz_2A_TDD_t *) & dci->dci_pdu[0])->rv1, + ((DCI2A_20MHz_2A_TDD_t *) & dci->dci_pdu[0])->rv2, + ((DCI2A_20MHz_2A_TDD_t *) & dci->dci_pdu[0])->TPC, ((DCI2A_20MHz_2A_TDD_t *) & dci->dci_pdu[0])->dai, ((DCI2A_20MHz_2A_TDD_t *) & dci->dci_pdu[0])->tb_swap); break; default: - LOG_E(PHY,"Invalid N_RB_DL %d\n", frame_parms->N_RB_DL); + LOG_E (PHY, "Invalid N_RB_DL %d\n", frame_parms->N_RB_DL); DevParam (frame_parms->N_RB_DL, 0, 0); break; } } else if (frame_parms->nb_antenna_ports_eNB == 4) { - switch(frame_parms->N_RB_DL) { + switch (frame_parms->N_RB_DL) { case 6: - LOG_D(PHY,"DCI format2A 4 antennas (TDD 1.5 MHz), rnti %x (%"PRIu64"): rb_alloc %x, mcs1 %d, mcs2 %d, harq_pid %d, ndi1 %d, ndi2 %d, RV1 %d, RV2 %d, TPC %d, dai %d, tbswap %d, tpmi %d\n", - dci->rnti, - ((uint64_t*)&dci->dci_pdu)[0], - ((DCI2A_1_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->rballoc, - ((DCI2A_1_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->mcs1, - ((DCI2A_1_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->mcs2, - ((DCI2A_1_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->harq_pid, - ((DCI2A_1_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->ndi1, - ((DCI2A_1_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->ndi2, - ((DCI2A_1_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->rv1, - ((DCI2A_1_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->rv2, - ((DCI2A_1_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->TPC, - ((DCI2A_1_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->dai, - ((DCI2A_1_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->tb_swap, - ((DCI2A_1_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->tpmi - ); + LOG_D (PHY, + "DCI format2A 4 antennas (TDD 1.5 MHz), rnti %x (%" PRIu64 "): rb_alloc %x, mcs1 %d, mcs2 %d, harq_pid %d, ndi1 %d, ndi2 %d, RV1 %d, RV2 %d, TPC %d, dai %d, tbswap %d, tpmi %d\n", + dci->rnti, ((uint64_t *) & dci->dci_pdu)[0], ((DCI2A_1_5MHz_4A_TDD_t *) & dci->dci_pdu[0])->rballoc, ((DCI2A_1_5MHz_4A_TDD_t *) & dci->dci_pdu[0])->mcs1, + ((DCI2A_1_5MHz_4A_TDD_t *) & dci->dci_pdu[0])->mcs2, ((DCI2A_1_5MHz_4A_TDD_t *) & dci->dci_pdu[0])->harq_pid, ((DCI2A_1_5MHz_4A_TDD_t *) & dci->dci_pdu[0])->ndi1, + ((DCI2A_1_5MHz_4A_TDD_t *) & dci->dci_pdu[0])->ndi2, ((DCI2A_1_5MHz_4A_TDD_t *) & dci->dci_pdu[0])->rv1, ((DCI2A_1_5MHz_4A_TDD_t *) & dci->dci_pdu[0])->rv2, + ((DCI2A_1_5MHz_4A_TDD_t *) & dci->dci_pdu[0])->TPC, ((DCI2A_1_5MHz_4A_TDD_t *) & dci->dci_pdu[0])->dai, ((DCI2A_1_5MHz_4A_TDD_t *) & dci->dci_pdu[0])->tb_swap, + ((DCI2A_1_5MHz_4A_TDD_t *) & dci->dci_pdu[0])->tpmi); break; case 25: - LOG_D(PHY,"DCI format2A 4 antennas (TDD 5 MHz), rnti %x (%"PRIu64"): rah %d, rb_alloc %x, mcs1 %d, mcs2 %d, harq_pid %d, ndi1 %d, ndi2 %d, RV1 %d, RV2 %d, TPC %d, dai %d, tbswap %d, tpmi %d\n", - dci->rnti, - ((uint64_t*)&dci->dci_pdu)[0], - ((DCI2A_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->rah, - ((DCI2A_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->rballoc, - ((DCI2A_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->mcs1, - ((DCI2A_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->mcs2, - ((DCI2A_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->harq_pid, - ((DCI2A_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->ndi1, - ((DCI2A_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->ndi2, - ((DCI2A_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->rv1, - ((DCI2A_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->rv2, - ((DCI2A_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->TPC, - ((DCI2A_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->dai, - ((DCI2A_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->tb_swap, - ((DCI2A_5MHz_4A_TDD_t *)&dci->dci_pdu[0])->tpmi); + LOG_D (PHY, + "DCI format2A 4 antennas (TDD 5 MHz), rnti %x (%" PRIu64 + "): rah %d, rb_alloc %x, mcs1 %d, mcs2 %d, harq_pid %d, ndi1 %d, ndi2 %d, RV1 %d, RV2 %d, TPC %d, dai %d, tbswap %d, tpmi %d\n", dci->rnti, ((uint64_t *) & dci->dci_pdu)[0], + ((DCI2A_5MHz_4A_TDD_t *) & dci->dci_pdu[0])->rah, ((DCI2A_5MHz_4A_TDD_t *) & dci->dci_pdu[0])->rballoc, ((DCI2A_5MHz_4A_TDD_t *) & dci->dci_pdu[0])->mcs1, + ((DCI2A_5MHz_4A_TDD_t *) & dci->dci_pdu[0])->mcs2, ((DCI2A_5MHz_4A_TDD_t *) & dci->dci_pdu[0])->harq_pid, ((DCI2A_5MHz_4A_TDD_t *) & dci->dci_pdu[0])->ndi1, + ((DCI2A_5MHz_4A_TDD_t *) & dci->dci_pdu[0])->ndi2, ((DCI2A_5MHz_4A_TDD_t *) & dci->dci_pdu[0])->rv1, ((DCI2A_5MHz_4A_TDD_t *) & dci->dci_pdu[0])->rv2, + ((DCI2A_5MHz_4A_TDD_t *) & dci->dci_pdu[0])->TPC, ((DCI2A_5MHz_4A_TDD_t *) & dci->dci_pdu[0])->dai, ((DCI2A_5MHz_4A_TDD_t *) & dci->dci_pdu[0])->tb_swap, + ((DCI2A_5MHz_4A_TDD_t *) & dci->dci_pdu[0])->tpmi); break; case 50: - LOG_D(PHY,"DCI format2A 4 antennas (TDD 10 MHz), rnti %x (%"PRIu64"): rah %d, rb_alloc %x, mcs1 %d, mcs2 %d, harq_pid %d, ndi1 %d, ndi2 %d, RV1 %d, RV2 %d, TPC %d, dai %d, tbswap %d, tpmi %d\n", - dci->rnti, - ((uint64_t*)&dci->dci_pdu)[0], - ((DCI2A_10MHz_4A_TDD_t *)&dci->dci_pdu[0])->rah, - ((DCI2A_10MHz_4A_TDD_t *)&dci->dci_pdu[0])->rballoc, - ((DCI2A_10MHz_4A_TDD_t *)&dci->dci_pdu[0])->mcs1, - ((DCI2A_10MHz_4A_TDD_t *)&dci->dci_pdu[0])->mcs2, - ((DCI2A_10MHz_4A_TDD_t *)&dci->dci_pdu[0])->harq_pid, - ((DCI2A_10MHz_4A_TDD_t *)&dci->dci_pdu[0])->ndi1, - ((DCI2A_10MHz_4A_TDD_t *)&dci->dci_pdu[0])->ndi2, - ((DCI2A_10MHz_4A_TDD_t *)&dci->dci_pdu[0])->rv1, - ((DCI2A_10MHz_4A_TDD_t *)&dci->dci_pdu[0])->rv2, - ((DCI2A_10MHz_4A_TDD_t *)&dci->dci_pdu[0])->TPC, - ((DCI2A_10MHz_4A_TDD_t *)&dci->dci_pdu[0])->dai, - ((DCI2A_10MHz_4A_TDD_t *)&dci->dci_pdu[0])->tb_swap, - ((DCI2A_10MHz_4A_TDD_t *)&dci->dci_pdu[0])->tpmi); + LOG_D (PHY, + "DCI format2A 4 antennas (TDD 10 MHz), rnti %x (%" PRIu64 + "): rah %d, rb_alloc %x, mcs1 %d, mcs2 %d, harq_pid %d, ndi1 %d, ndi2 %d, RV1 %d, RV2 %d, TPC %d, dai %d, tbswap %d, tpmi %d\n", dci->rnti, ((uint64_t *) & dci->dci_pdu)[0], + ((DCI2A_10MHz_4A_TDD_t *) & dci->dci_pdu[0])->rah, ((DCI2A_10MHz_4A_TDD_t *) & dci->dci_pdu[0])->rballoc, ((DCI2A_10MHz_4A_TDD_t *) & dci->dci_pdu[0])->mcs1, + ((DCI2A_10MHz_4A_TDD_t *) & dci->dci_pdu[0])->mcs2, ((DCI2A_10MHz_4A_TDD_t *) & dci->dci_pdu[0])->harq_pid, ((DCI2A_10MHz_4A_TDD_t *) & dci->dci_pdu[0])->ndi1, + ((DCI2A_10MHz_4A_TDD_t *) & dci->dci_pdu[0])->ndi2, ((DCI2A_10MHz_4A_TDD_t *) & dci->dci_pdu[0])->rv1, ((DCI2A_10MHz_4A_TDD_t *) & dci->dci_pdu[0])->rv2, + ((DCI2A_10MHz_4A_TDD_t *) & dci->dci_pdu[0])->TPC, ((DCI2A_10MHz_4A_TDD_t *) & dci->dci_pdu[0])->dai, ((DCI2A_10MHz_4A_TDD_t *) & dci->dci_pdu[0])->tb_swap, + ((DCI2A_10MHz_4A_TDD_t *) & dci->dci_pdu[0])->tpmi); break; case 100: - LOG_D(PHY,"DCI format2A 4 antennas (TDD 20 MHz), rnti %x (%"PRIu64"): rah %d, rb_alloc %x, mcs1 %d, mcs2 %d, harq_pid %d, ndi1 %d, ndi2 %d, RV1 %d, RV2 %d, TPC %d, dai %d, tbswap %d, tpmi %d\n", - dci->rnti, - ((uint64_t*)&dci->dci_pdu)[0], - ((DCI2A_20MHz_4A_TDD_t *)&dci->dci_pdu[0])->rah, - ((DCI2A_20MHz_4A_TDD_t *)&dci->dci_pdu[0])->rballoc, - ((DCI2A_20MHz_4A_TDD_t *)&dci->dci_pdu[0])->mcs1, - ((DCI2A_20MHz_4A_TDD_t *)&dci->dci_pdu[0])->mcs2, - ((DCI2A_20MHz_4A_TDD_t *)&dci->dci_pdu[0])->harq_pid, - ((DCI2A_20MHz_4A_TDD_t *)&dci->dci_pdu[0])->ndi1, - ((DCI2A_20MHz_4A_TDD_t *)&dci->dci_pdu[0])->ndi2, - ((DCI2A_20MHz_4A_TDD_t *)&dci->dci_pdu[0])->rv1, - ((DCI2A_20MHz_4A_TDD_t *)&dci->dci_pdu[0])->rv2, - ((DCI2A_20MHz_4A_TDD_t *)&dci->dci_pdu[0])->TPC, - ((DCI2A_20MHz_4A_TDD_t *)&dci->dci_pdu[0])->dai, - ((DCI2A_20MHz_4A_TDD_t *)&dci->dci_pdu[0])->tb_swap, - ((DCI2A_20MHz_4A_TDD_t *)&dci->dci_pdu[0])->tpmi); + LOG_D (PHY, + "DCI format2A 4 antennas (TDD 20 MHz), rnti %x (%" PRIu64 + "): rah %d, rb_alloc %x, mcs1 %d, mcs2 %d, harq_pid %d, ndi1 %d, ndi2 %d, RV1 %d, RV2 %d, TPC %d, dai %d, tbswap %d, tpmi %d\n", dci->rnti, ((uint64_t *) & dci->dci_pdu)[0], + ((DCI2A_20MHz_4A_TDD_t *) & dci->dci_pdu[0])->rah, ((DCI2A_20MHz_4A_TDD_t *) & dci->dci_pdu[0])->rballoc, ((DCI2A_20MHz_4A_TDD_t *) & dci->dci_pdu[0])->mcs1, + ((DCI2A_20MHz_4A_TDD_t *) & dci->dci_pdu[0])->mcs2, ((DCI2A_20MHz_4A_TDD_t *) & dci->dci_pdu[0])->harq_pid, ((DCI2A_20MHz_4A_TDD_t *) & dci->dci_pdu[0])->ndi1, + ((DCI2A_20MHz_4A_TDD_t *) & dci->dci_pdu[0])->ndi2, ((DCI2A_20MHz_4A_TDD_t *) & dci->dci_pdu[0])->rv1, ((DCI2A_20MHz_4A_TDD_t *) & dci->dci_pdu[0])->rv2, + ((DCI2A_20MHz_4A_TDD_t *) & dci->dci_pdu[0])->TPC, ((DCI2A_20MHz_4A_TDD_t *) & dci->dci_pdu[0])->dai, ((DCI2A_20MHz_4A_TDD_t *) & dci->dci_pdu[0])->tb_swap, + ((DCI2A_20MHz_4A_TDD_t *) & dci->dci_pdu[0])->tpmi); break; default: - LOG_E(PHY,"Invalid N_RB_DL %d\n", frame_parms->N_RB_DL); + LOG_E (PHY, "Invalid N_RB_DL %d\n", frame_parms->N_RB_DL); DevParam (frame_parms->N_RB_DL, 0, 0); break; } } } else if (frame_parms->frame_type == FDD) { if (frame_parms->nb_antenna_ports_eNB == 2) { - switch(frame_parms->N_RB_DL) { + switch (frame_parms->N_RB_DL) { case 6: - LOG_D(PHY,"DCI format2A 2 antennas (FDD, 1.5 MHz), rnti %x (%x): rb_alloc %x, mcs1 %d, mcs2 %d, harq_pid %d, ndi1 %d, ndi2 %d, RV1 %d, RV2 %d, tb_swap %d, TPC %d\n", - dci->rnti, - ((uint32_t*)&dci->dci_pdu)[0], - ((DCI2A_1_5MHz_2A_FDD_t *)&dci->dci_pdu[0])->rballoc, - ((DCI2A_1_5MHz_2A_FDD_t *)&dci->dci_pdu[0])->mcs1, - ((DCI2A_1_5MHz_2A_FDD_t *)&dci->dci_pdu[0])->mcs2, - ((DCI2A_1_5MHz_2A_FDD_t *)&dci->dci_pdu[0])->harq_pid, - ((DCI2A_1_5MHz_2A_FDD_t *)&dci->dci_pdu[0])->ndi1, - ((DCI2A_1_5MHz_2A_FDD_t *)&dci->dci_pdu[0])->ndi2, - ((DCI2A_1_5MHz_2A_FDD_t *)&dci->dci_pdu[0])->rv1, - ((DCI2A_1_5MHz_2A_FDD_t *)&dci->dci_pdu[0])->rv2, - ((DCI2A_1_5MHz_2A_FDD_t *)&dci->dci_pdu[0])->tb_swap, - ((DCI2A_1_5MHz_2A_FDD_t *)&dci->dci_pdu[0])->TPC); + LOG_D (PHY, "DCI format2A 2 antennas (FDD, 1.5 MHz), rnti %x (%x): rb_alloc %x, mcs1 %d, mcs2 %d, harq_pid %d, ndi1 %d, ndi2 %d, RV1 %d, RV2 %d, tb_swap %d, TPC %d\n", + dci->rnti, + ((uint32_t *) & dci->dci_pdu)[0], + ((DCI2A_1_5MHz_2A_FDD_t *) & dci->dci_pdu[0])->rballoc, + ((DCI2A_1_5MHz_2A_FDD_t *) & dci->dci_pdu[0])->mcs1, + ((DCI2A_1_5MHz_2A_FDD_t *) & dci->dci_pdu[0])->mcs2, + ((DCI2A_1_5MHz_2A_FDD_t *) & dci->dci_pdu[0])->harq_pid, + ((DCI2A_1_5MHz_2A_FDD_t *) & dci->dci_pdu[0])->ndi1, + ((DCI2A_1_5MHz_2A_FDD_t *) & dci->dci_pdu[0])->ndi2, + ((DCI2A_1_5MHz_2A_FDD_t *) & dci->dci_pdu[0])->rv1, + ((DCI2A_1_5MHz_2A_FDD_t *) & dci->dci_pdu[0])->rv2, ((DCI2A_1_5MHz_2A_FDD_t *) & dci->dci_pdu[0])->tb_swap, ((DCI2A_1_5MHz_2A_FDD_t *) & dci->dci_pdu[0])->TPC); break; case 25: - LOG_D(PHY,"DCI format2A 2 antennas (FDD, 5 MHz), rnti %x (%"PRIu64"): rah %d, rb_alloc %x, mcs1 %d, mcs2 %d, harq_pid %d, ndi1 %d, ndi2 %d, RV1 %d, RV2 %d, tb_swap %d, TPC %d\n", - dci->rnti, - ((uint64_t*)&dci->dci_pdu)[0], - ((DCI2A_5MHz_2A_FDD_t *)&dci->dci_pdu[0])->rah, - ((DCI2A_5MHz_2A_FDD_t *)&dci->dci_pdu[0])->rballoc, - ((DCI2A_5MHz_2A_FDD_t *)&dci->dci_pdu[0])->mcs1, - ((DCI2A_5MHz_2A_FDD_t *)&dci->dci_pdu[0])->mcs2, - ((DCI2A_5MHz_2A_FDD_t *)&dci->dci_pdu[0])->harq_pid, - ((DCI2A_5MHz_2A_FDD_t *)&dci->dci_pdu[0])->ndi1, - ((DCI2A_5MHz_2A_FDD_t *)&dci->dci_pdu[0])->ndi2, - ((DCI2A_5MHz_2A_FDD_t *)&dci->dci_pdu[0])->rv1, - ((DCI2A_5MHz_2A_FDD_t *)&dci->dci_pdu[0])->rv2, - ((DCI2A_5MHz_2A_FDD_t *)&dci->dci_pdu[0])->tb_swap, - ((DCI2A_5MHz_2A_FDD_t *)&dci->dci_pdu[0])->TPC); + LOG_D (PHY, "DCI format2A 2 antennas (FDD, 5 MHz), rnti %x (%" PRIu64 "): rah %d, rb_alloc %x, mcs1 %d, mcs2 %d, harq_pid %d, ndi1 %d, ndi2 %d, RV1 %d, RV2 %d, tb_swap %d, TPC %d\n", + dci->rnti, + ((uint64_t *) & dci->dci_pdu)[0], + ((DCI2A_5MHz_2A_FDD_t *) & dci->dci_pdu[0])->rah, + ((DCI2A_5MHz_2A_FDD_t *) & dci->dci_pdu[0])->rballoc, + ((DCI2A_5MHz_2A_FDD_t *) & dci->dci_pdu[0])->mcs1, + ((DCI2A_5MHz_2A_FDD_t *) & dci->dci_pdu[0])->mcs2, + ((DCI2A_5MHz_2A_FDD_t *) & dci->dci_pdu[0])->harq_pid, + ((DCI2A_5MHz_2A_FDD_t *) & dci->dci_pdu[0])->ndi1, + ((DCI2A_5MHz_2A_FDD_t *) & dci->dci_pdu[0])->ndi2, + ((DCI2A_5MHz_2A_FDD_t *) & dci->dci_pdu[0])->rv1, + ((DCI2A_5MHz_2A_FDD_t *) & dci->dci_pdu[0])->rv2, ((DCI2A_5MHz_2A_FDD_t *) & dci->dci_pdu[0])->tb_swap, ((DCI2A_5MHz_2A_FDD_t *) & dci->dci_pdu[0])->TPC); break; case 50: - LOG_D(PHY,"DCI format2A 2 antennas (FDD, 10 MHz), rnti %x (%"PRIu64"): rah %d, rb_alloc %x, mcs1 %d, mcs2 %d, harq_pid %d, ndi1 %d, ndi2 %d, RV1 %d, RV2 %d, tb_swap %d, TPC %d\n", - dci->rnti, - ((uint64_t*)&dci->dci_pdu)[0], - ((DCI2A_10MHz_2A_FDD_t *)&dci->dci_pdu[0])->rah, - ((DCI2A_10MHz_2A_FDD_t *)&dci->dci_pdu[0])->rballoc, - ((DCI2A_10MHz_2A_FDD_t *)&dci->dci_pdu[0])->mcs1, - ((DCI2A_10MHz_2A_FDD_t *)&dci->dci_pdu[0])->mcs2, - ((DCI2A_10MHz_2A_FDD_t *)&dci->dci_pdu[0])->harq_pid, - ((DCI2A_10MHz_2A_FDD_t *)&dci->dci_pdu[0])->ndi1, - ((DCI2A_10MHz_2A_FDD_t *)&dci->dci_pdu[0])->ndi2, - ((DCI2A_10MHz_2A_FDD_t *)&dci->dci_pdu[0])->rv1, - ((DCI2A_10MHz_2A_FDD_t *)&dci->dci_pdu[0])->rv2, - ((DCI2A_10MHz_2A_FDD_t *)&dci->dci_pdu[0])->tb_swap, - ((DCI2A_10MHz_2A_FDD_t *)&dci->dci_pdu[0])->TPC); + LOG_D (PHY, "DCI format2A 2 antennas (FDD, 10 MHz), rnti %x (%" PRIu64 "): rah %d, rb_alloc %x, mcs1 %d, mcs2 %d, harq_pid %d, ndi1 %d, ndi2 %d, RV1 %d, RV2 %d, tb_swap %d, TPC %d\n", + dci->rnti, + ((uint64_t *) & dci->dci_pdu)[0], + ((DCI2A_10MHz_2A_FDD_t *) & dci->dci_pdu[0])->rah, + ((DCI2A_10MHz_2A_FDD_t *) & dci->dci_pdu[0])->rballoc, + ((DCI2A_10MHz_2A_FDD_t *) & dci->dci_pdu[0])->mcs1, + ((DCI2A_10MHz_2A_FDD_t *) & dci->dci_pdu[0])->mcs2, + ((DCI2A_10MHz_2A_FDD_t *) & dci->dci_pdu[0])->harq_pid, + ((DCI2A_10MHz_2A_FDD_t *) & dci->dci_pdu[0])->ndi1, + ((DCI2A_10MHz_2A_FDD_t *) & dci->dci_pdu[0])->ndi2, + ((DCI2A_10MHz_2A_FDD_t *) & dci->dci_pdu[0])->rv1, + ((DCI2A_10MHz_2A_FDD_t *) & dci->dci_pdu[0])->rv2, ((DCI2A_10MHz_2A_FDD_t *) & dci->dci_pdu[0])->tb_swap, ((DCI2A_10MHz_2A_FDD_t *) & dci->dci_pdu[0])->TPC); break; case 100: - LOG_D(PHY,"DCI format2A 2 antennas (FDD, 20 MHz), rnti %x (%"PRIu64"): rah %d, rb_alloc %x, mcs1 %d, mcs2 %d, harq_pid %d, ndi1 %d, ndi2 %d, RV1 %d, RV2 %d, tb_swap %d, TPC %d\n", - dci->rnti, - ((uint64_t*)&dci->dci_pdu)[0], - ((DCI2A_20MHz_2A_FDD_t *)&dci->dci_pdu[0])->rah, - ((DCI2A_20MHz_2A_FDD_t *)&dci->dci_pdu[0])->rballoc, - ((DCI2A_20MHz_2A_FDD_t *)&dci->dci_pdu[0])->mcs1, - ((DCI2A_20MHz_2A_FDD_t *)&dci->dci_pdu[0])->mcs2, - ((DCI2A_20MHz_2A_FDD_t *)&dci->dci_pdu[0])->harq_pid, - ((DCI2A_20MHz_2A_FDD_t *)&dci->dci_pdu[0])->ndi1, - ((DCI2A_20MHz_2A_FDD_t *)&dci->dci_pdu[0])->ndi2, - ((DCI2A_20MHz_2A_FDD_t *)&dci->dci_pdu[0])->rv1, - ((DCI2A_20MHz_2A_FDD_t *)&dci->dci_pdu[0])->rv2, - ((DCI2A_20MHz_2A_FDD_t *)&dci->dci_pdu[0])->tb_swap, - ((DCI2A_20MHz_2A_FDD_t *)&dci->dci_pdu[0])->TPC); + LOG_D (PHY, "DCI format2A 2 antennas (FDD, 20 MHz), rnti %x (%" PRIu64 "): rah %d, rb_alloc %x, mcs1 %d, mcs2 %d, harq_pid %d, ndi1 %d, ndi2 %d, RV1 %d, RV2 %d, tb_swap %d, TPC %d\n", + dci->rnti, + ((uint64_t *) & dci->dci_pdu)[0], + ((DCI2A_20MHz_2A_FDD_t *) & dci->dci_pdu[0])->rah, + ((DCI2A_20MHz_2A_FDD_t *) & dci->dci_pdu[0])->rballoc, + ((DCI2A_20MHz_2A_FDD_t *) & dci->dci_pdu[0])->mcs1, + ((DCI2A_20MHz_2A_FDD_t *) & dci->dci_pdu[0])->mcs2, + ((DCI2A_20MHz_2A_FDD_t *) & dci->dci_pdu[0])->harq_pid, + ((DCI2A_20MHz_2A_FDD_t *) & dci->dci_pdu[0])->ndi1, + ((DCI2A_20MHz_2A_FDD_t *) & dci->dci_pdu[0])->ndi2, + ((DCI2A_20MHz_2A_FDD_t *) & dci->dci_pdu[0])->rv1, + ((DCI2A_20MHz_2A_FDD_t *) & dci->dci_pdu[0])->rv2, ((DCI2A_20MHz_2A_FDD_t *) & dci->dci_pdu[0])->tb_swap, ((DCI2A_20MHz_2A_FDD_t *) & dci->dci_pdu[0])->TPC); break; default: - LOG_E(PHY,"Invalid N_RB_DL %d\n", frame_parms->N_RB_DL); + LOG_E (PHY, "Invalid N_RB_DL %d\n", frame_parms->N_RB_DL); DevParam (frame_parms->N_RB_DL, 0, 0); break; } } else if (frame_parms->nb_antenna_ports_eNB == 4) { - switch(frame_parms->N_RB_DL) { + switch (frame_parms->N_RB_DL) { case 6: - LOG_D(PHY,"DCI format2A 4 antennas (FDD, 1.5 MHz), rnti %x (%"PRIu64"): rb_alloc %x, mcs1 %d, mcs2 %d, harq_pid %d, ndi1 %d, ndi2 %d, RV1 %d, RV2 %d, tb_swap %d, tpmi %d, TPC %d\n", - dci->rnti, - ((uint64_t*)&dci->dci_pdu)[0], - ((DCI2A_1_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->rballoc, - ((DCI2A_1_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->mcs1, - ((DCI2A_1_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->mcs2, - ((DCI2A_1_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->harq_pid, - ((DCI2A_1_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->ndi1, - ((DCI2A_1_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->ndi2, - ((DCI2A_1_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->rv1, - ((DCI2A_1_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->rv2, - ((DCI2A_1_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->tb_swap, - ((DCI2A_1_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->tpmi, - ((DCI2A_1_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->TPC); + LOG_D (PHY, "DCI format2A 4 antennas (FDD, 1.5 MHz), rnti %x (%" PRIu64 "): rb_alloc %x, mcs1 %d, mcs2 %d, harq_pid %d, ndi1 %d, ndi2 %d, RV1 %d, RV2 %d, tb_swap %d, tpmi %d, TPC %d\n", + dci->rnti, + ((uint64_t *) & dci->dci_pdu)[0], + ((DCI2A_1_5MHz_4A_FDD_t *) & dci->dci_pdu[0])->rballoc, + ((DCI2A_1_5MHz_4A_FDD_t *) & dci->dci_pdu[0])->mcs1, + ((DCI2A_1_5MHz_4A_FDD_t *) & dci->dci_pdu[0])->mcs2, + ((DCI2A_1_5MHz_4A_FDD_t *) & dci->dci_pdu[0])->harq_pid, + ((DCI2A_1_5MHz_4A_FDD_t *) & dci->dci_pdu[0])->ndi1, + ((DCI2A_1_5MHz_4A_FDD_t *) & dci->dci_pdu[0])->ndi2, + ((DCI2A_1_5MHz_4A_FDD_t *) & dci->dci_pdu[0])->rv1, + ((DCI2A_1_5MHz_4A_FDD_t *) & dci->dci_pdu[0])->rv2, + ((DCI2A_1_5MHz_4A_FDD_t *) & dci->dci_pdu[0])->tb_swap, ((DCI2A_1_5MHz_4A_FDD_t *) & dci->dci_pdu[0])->tpmi, ((DCI2A_1_5MHz_4A_FDD_t *) & dci->dci_pdu[0])->TPC); break; case 25: - LOG_D(PHY,"DCI format2A 4 antennas (FDD, 5 MHz), rnti %x (%"PRIu64"): rah %d, rb_alloc %x, mcs1 %d, mcs2 %d, harq_pid %d, ndi1 %d, ndi2 %d, RV1 %d, RV2 %d, tb_swap %d, tpmi %d, TPC %d\n", - dci->rnti, - ((uint64_t*)&dci->dci_pdu)[0], - ((DCI2A_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->rah, - ((DCI2A_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->rballoc, - ((DCI2A_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->mcs1, - ((DCI2A_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->mcs2, - ((DCI2A_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->harq_pid, - ((DCI2A_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->ndi1, - ((DCI2A_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->ndi2, - ((DCI2A_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->rv1, - ((DCI2A_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->rv2, - ((DCI2A_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->tb_swap, - ((DCI2A_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->tpmi, - ((DCI2A_5MHz_4A_FDD_t *)&dci->dci_pdu[0])->TPC); + LOG_D (PHY, + "DCI format2A 4 antennas (FDD, 5 MHz), rnti %x (%" PRIu64 "): rah %d, rb_alloc %x, mcs1 %d, mcs2 %d, harq_pid %d, ndi1 %d, ndi2 %d, RV1 %d, RV2 %d, tb_swap %d, tpmi %d, TPC %d\n", + dci->rnti, ((uint64_t *) & dci->dci_pdu)[0], ((DCI2A_5MHz_4A_FDD_t *) & dci->dci_pdu[0])->rah, ((DCI2A_5MHz_4A_FDD_t *) & dci->dci_pdu[0])->rballoc, + ((DCI2A_5MHz_4A_FDD_t *) & dci->dci_pdu[0])->mcs1, ((DCI2A_5MHz_4A_FDD_t *) & dci->dci_pdu[0])->mcs2, ((DCI2A_5MHz_4A_FDD_t *) & dci->dci_pdu[0])->harq_pid, + ((DCI2A_5MHz_4A_FDD_t *) & dci->dci_pdu[0])->ndi1, ((DCI2A_5MHz_4A_FDD_t *) & dci->dci_pdu[0])->ndi2, ((DCI2A_5MHz_4A_FDD_t *) & dci->dci_pdu[0])->rv1, + ((DCI2A_5MHz_4A_FDD_t *) & dci->dci_pdu[0])->rv2, ((DCI2A_5MHz_4A_FDD_t *) & dci->dci_pdu[0])->tb_swap, ((DCI2A_5MHz_4A_FDD_t *) & dci->dci_pdu[0])->tpmi, + ((DCI2A_5MHz_4A_FDD_t *) & dci->dci_pdu[0])->TPC); break; case 50: - LOG_D(PHY,"DCI format2A 4 antennas (FDD, 5 MHz), rnti %x (%"PRIu64"): rah %d, rb_alloc %x, mcs1 %d, mcs2 %d, harq_pid %d, ndi1 %d, ndi2 %d, RV1 %d, RV2 %d, tb_swap %d, tpmi %d, TPC %d\n", - dci->rnti, - ((uint64_t*)&dci->dci_pdu)[0], - ((DCI2A_10MHz_4A_FDD_t *)&dci->dci_pdu[0])->rah, - ((DCI2A_10MHz_4A_FDD_t *)&dci->dci_pdu[0])->rballoc, - ((DCI2A_10MHz_4A_FDD_t *)&dci->dci_pdu[0])->mcs1, - ((DCI2A_10MHz_4A_FDD_t *)&dci->dci_pdu[0])->mcs2, - ((DCI2A_10MHz_4A_FDD_t *)&dci->dci_pdu[0])->harq_pid, - ((DCI2A_10MHz_4A_FDD_t *)&dci->dci_pdu[0])->ndi1, - ((DCI2A_10MHz_4A_FDD_t *)&dci->dci_pdu[0])->ndi2, - ((DCI2A_10MHz_4A_FDD_t *)&dci->dci_pdu[0])->rv1, - ((DCI2A_10MHz_4A_FDD_t *)&dci->dci_pdu[0])->rv2, - ((DCI2A_10MHz_4A_FDD_t *)&dci->dci_pdu[0])->tb_swap, - ((DCI2A_10MHz_4A_FDD_t *)&dci->dci_pdu[0])->tpmi, - ((DCI2A_10MHz_4A_FDD_t *)&dci->dci_pdu[0])->TPC); + LOG_D (PHY, + "DCI format2A 4 antennas (FDD, 5 MHz), rnti %x (%" PRIu64 "): rah %d, rb_alloc %x, mcs1 %d, mcs2 %d, harq_pid %d, ndi1 %d, ndi2 %d, RV1 %d, RV2 %d, tb_swap %d, tpmi %d, TPC %d\n", + dci->rnti, ((uint64_t *) & dci->dci_pdu)[0], ((DCI2A_10MHz_4A_FDD_t *) & dci->dci_pdu[0])->rah, ((DCI2A_10MHz_4A_FDD_t *) & dci->dci_pdu[0])->rballoc, + ((DCI2A_10MHz_4A_FDD_t *) & dci->dci_pdu[0])->mcs1, ((DCI2A_10MHz_4A_FDD_t *) & dci->dci_pdu[0])->mcs2, ((DCI2A_10MHz_4A_FDD_t *) & dci->dci_pdu[0])->harq_pid, + ((DCI2A_10MHz_4A_FDD_t *) & dci->dci_pdu[0])->ndi1, ((DCI2A_10MHz_4A_FDD_t *) & dci->dci_pdu[0])->ndi2, ((DCI2A_10MHz_4A_FDD_t *) & dci->dci_pdu[0])->rv1, + ((DCI2A_10MHz_4A_FDD_t *) & dci->dci_pdu[0])->rv2, ((DCI2A_10MHz_4A_FDD_t *) & dci->dci_pdu[0])->tb_swap, ((DCI2A_10MHz_4A_FDD_t *) & dci->dci_pdu[0])->tpmi, + ((DCI2A_10MHz_4A_FDD_t *) & dci->dci_pdu[0])->TPC); break; case 100: - LOG_D(PHY,"DCI format2A 4 antennas (FDD, 5 MHz), rnti %x (%"PRIu64"): rah %d, rb_alloc %x, mcs1 %d, mcs2 %d, harq_pid %d, ndi1 %d, ndi2 %d, RV1 %d, RV2 %d, tb_swap %d, tpmi %d, TPC %d\n", - dci->rnti, - ((uint64_t*)&dci->dci_pdu)[0], - ((DCI2A_20MHz_4A_FDD_t *)&dci->dci_pdu[0])->rah, - ((DCI2A_20MHz_4A_FDD_t *)&dci->dci_pdu[0])->rballoc, - ((DCI2A_20MHz_4A_FDD_t *)&dci->dci_pdu[0])->mcs1, - ((DCI2A_20MHz_4A_FDD_t *)&dci->dci_pdu[0])->mcs2, - ((DCI2A_20MHz_4A_FDD_t *)&dci->dci_pdu[0])->harq_pid, - ((DCI2A_20MHz_4A_FDD_t *)&dci->dci_pdu[0])->ndi1, - ((DCI2A_20MHz_4A_FDD_t *)&dci->dci_pdu[0])->ndi2, - ((DCI2A_20MHz_4A_FDD_t *)&dci->dci_pdu[0])->rv1, - ((DCI2A_20MHz_4A_FDD_t *)&dci->dci_pdu[0])->rv2, - ((DCI2A_20MHz_4A_FDD_t *)&dci->dci_pdu[0])->tb_swap, - ((DCI2A_20MHz_4A_FDD_t *)&dci->dci_pdu[0])->tpmi, - ((DCI2A_20MHz_4A_FDD_t *)&dci->dci_pdu[0])->TPC); + LOG_D (PHY, + "DCI format2A 4 antennas (FDD, 5 MHz), rnti %x (%" PRIu64 "): rah %d, rb_alloc %x, mcs1 %d, mcs2 %d, harq_pid %d, ndi1 %d, ndi2 %d, RV1 %d, RV2 %d, tb_swap %d, tpmi %d, TPC %d\n", + dci->rnti, ((uint64_t *) & dci->dci_pdu)[0], ((DCI2A_20MHz_4A_FDD_t *) & dci->dci_pdu[0])->rah, ((DCI2A_20MHz_4A_FDD_t *) & dci->dci_pdu[0])->rballoc, + ((DCI2A_20MHz_4A_FDD_t *) & dci->dci_pdu[0])->mcs1, ((DCI2A_20MHz_4A_FDD_t *) & dci->dci_pdu[0])->mcs2, ((DCI2A_20MHz_4A_FDD_t *) & dci->dci_pdu[0])->harq_pid, + ((DCI2A_20MHz_4A_FDD_t *) & dci->dci_pdu[0])->ndi1, ((DCI2A_20MHz_4A_FDD_t *) & dci->dci_pdu[0])->ndi2, ((DCI2A_20MHz_4A_FDD_t *) & dci->dci_pdu[0])->rv1, + ((DCI2A_20MHz_4A_FDD_t *) & dci->dci_pdu[0])->rv2, ((DCI2A_20MHz_4A_FDD_t *) & dci->dci_pdu[0])->tb_swap, ((DCI2A_20MHz_4A_FDD_t *) & dci->dci_pdu[0])->tpmi, + ((DCI2A_20MHz_4A_FDD_t *) & dci->dci_pdu[0])->TPC); break; default: - LOG_E(PHY,"Invalid N_RB_DL %d\n", frame_parms->N_RB_DL); + LOG_E (PHY, "Invalid N_RB_DL %d\n", frame_parms->N_RB_DL); DevParam (frame_parms->N_RB_DL, 0, 0); break; } @@ -3723,2305 +3556,2126 @@ int dump_dci(LTE_DL_FRAME_PARMS *frame_parms, DCI_ALLOC_t *dci) } else - LOG_E(PHY,"Don't know how to handle TDD format 0 yet\n"); + LOG_E (PHY, "Don't know how to handle TDD format 0 yet\n"); break; case format1E_2A_M10PRB: - LOG_D(PHY,"DCI format1E_2A_M10PRB, rnti %x (%8x): harq_pid %d, rah %d, rb_alloc %x, mcs %d, rv %d, tpmi %d, ndi %d, dl_power_offset %d\n", - dci->rnti, - ((uint32_t *)&dci->dci_pdu)[0], - ((DCI1E_5MHz_2A_M10PRB_TDD_t *)&dci->dci_pdu[0])->harq_pid, - //((DCI1E_5MHz_2A_M10PRB_TDD_t *)&dci->dci_pdu[0])->tb_swap, - ((DCI1E_5MHz_2A_M10PRB_TDD_t *)&dci->dci_pdu[0])->rah, - ((DCI1E_5MHz_2A_M10PRB_TDD_t *)&dci->dci_pdu[0])->rballoc, - ((DCI1E_5MHz_2A_M10PRB_TDD_t *)&dci->dci_pdu[0])->mcs, - ((DCI1E_5MHz_2A_M10PRB_TDD_t *)&dci->dci_pdu[0])->rv, - ((DCI1E_5MHz_2A_M10PRB_TDD_t *)&dci->dci_pdu[0])->tpmi, - ((DCI1E_5MHz_2A_M10PRB_TDD_t *)&dci->dci_pdu[0])->ndi, - ((DCI1E_5MHz_2A_M10PRB_TDD_t *)&dci->dci_pdu[0])->dl_power_off - ); + LOG_D (PHY, "DCI format1E_2A_M10PRB, rnti %x (%8x): harq_pid %d, rah %d, rb_alloc %x, mcs %d, rv %d, tpmi %d, ndi %d, dl_power_offset %d\n", + dci->rnti, ((uint32_t *) & dci->dci_pdu)[0], ((DCI1E_5MHz_2A_M10PRB_TDD_t *) & dci->dci_pdu[0])->harq_pid, + //((DCI1E_5MHz_2A_M10PRB_TDD_t *)&dci->dci_pdu[0])->tb_swap, + ((DCI1E_5MHz_2A_M10PRB_TDD_t *) & dci->dci_pdu[0])->rah, + ((DCI1E_5MHz_2A_M10PRB_TDD_t *) & dci->dci_pdu[0])->rballoc, + ((DCI1E_5MHz_2A_M10PRB_TDD_t *) & dci->dci_pdu[0])->mcs, + ((DCI1E_5MHz_2A_M10PRB_TDD_t *) & dci->dci_pdu[0])->rv, + ((DCI1E_5MHz_2A_M10PRB_TDD_t *) & dci->dci_pdu[0])->tpmi, ((DCI1E_5MHz_2A_M10PRB_TDD_t *) & dci->dci_pdu[0])->ndi, ((DCI1E_5MHz_2A_M10PRB_TDD_t *) & dci->dci_pdu[0])->dl_power_off); break; default: - LOG_E(PHY,"dci_tools.c: dump_dci, unknown format %d\n",dci->format); - return(-1); + LOG_E (PHY, "dci_tools.c: dump_dci, unknown format %d\n", dci->format); + return (-1); } - return(0); + return (0); } -void extract_dci1A_info(uint8_t N_RB_DL, lte_frame_type_t frame_type, void *dci_pdu, DCI_INFO_EXTRACTED_t *pdci_info_extarcted) +void +extract_dci1A_info (uint8_t N_RB_DL, lte_frame_type_t frame_type, void *dci_pdu, DCI_INFO_EXTRACTED_t * pdci_info_extarcted) { - uint8_t harq_pid=0; - uint32_t rballoc=0; - uint8_t vrb_type=0; - uint8_t mcs=0; - uint8_t rv=0; - uint8_t ndi=0; - uint8_t TPC=0; + uint8_t harq_pid = 0; + uint32_t rballoc = 0; + uint8_t vrb_type = 0; + uint8_t mcs = 0; + uint8_t rv = 0; + uint8_t ndi = 0; + uint8_t TPC = 0; - uint8_t dai=0; + uint8_t dai = 0; - switch (N_RB_DL) { - case 6: - if (frame_type == TDD) { - vrb_type = ((DCI1A_1_5MHz_TDD_1_6_t *)dci_pdu)->vrb_type; - mcs = ((DCI1A_1_5MHz_TDD_1_6_t *)dci_pdu)->mcs; - rballoc = ((DCI1A_1_5MHz_TDD_1_6_t *)dci_pdu)->rballoc; - rv = ((DCI1A_1_5MHz_TDD_1_6_t *)dci_pdu)->rv; - ndi = ((DCI1A_1_5MHz_TDD_1_6_t *)dci_pdu)->ndi; - TPC = ((DCI1A_1_5MHz_TDD_1_6_t *)dci_pdu)->TPC; - harq_pid = ((DCI1A_1_5MHz_TDD_1_6_t *)dci_pdu)->harq_pid; - dai = ((DCI1A_1_5MHz_TDD_1_6_t *)dci_pdu)->dai; - // printf("TDD 1A: mcs %d, rballoc %x,rv %d, TPC %d\n",mcs,rballoc,rv,TPC); - } else { - vrb_type = ((DCI1A_1_5MHz_FDD_t *)dci_pdu)->vrb_type; - mcs = ((DCI1A_1_5MHz_FDD_t *)dci_pdu)->mcs; - rballoc = ((DCI1A_1_5MHz_FDD_t *)dci_pdu)->rballoc; - rv = ((DCI1A_1_5MHz_FDD_t *)dci_pdu)->rv; - ndi = ((DCI1A_1_5MHz_FDD_t *)dci_pdu)->ndi; - TPC = ((DCI1A_1_5MHz_FDD_t *)dci_pdu)->TPC; - harq_pid = ((DCI1A_1_5MHz_FDD_t *)dci_pdu)->harq_pid; - //printf("FDD 1A: mcs %d, rballoc %x,rv %d, TPC %d\n",mcs,rballoc,rv,TPC); - } - break; - - case 25: - - if (frame_type == TDD) { - vrb_type = ((DCI1A_5MHz_TDD_1_6_t *)dci_pdu)->vrb_type; - mcs = ((DCI1A_5MHz_TDD_1_6_t *)dci_pdu)->mcs; - rballoc = ((DCI1A_5MHz_TDD_1_6_t *)dci_pdu)->rballoc; - rv = ((DCI1A_5MHz_TDD_1_6_t *)dci_pdu)->rv; - ndi = ((DCI1A_5MHz_TDD_1_6_t *)dci_pdu)->ndi; - TPC = ((DCI1A_5MHz_TDD_1_6_t *)dci_pdu)->TPC; - harq_pid = ((DCI1A_5MHz_TDD_1_6_t *)dci_pdu)->harq_pid; - dai = ((DCI1A_5MHz_TDD_1_6_t *)dci_pdu)->dai; - //printf("TDD 1A: mcs %d, rballoc %x,rv %d, TPC %d\n",mcs,rballoc,rv,TPC); - } else { - vrb_type = ((DCI1A_5MHz_FDD_t *)dci_pdu)->vrb_type; - mcs = ((DCI1A_5MHz_FDD_t *)dci_pdu)->mcs; - rballoc = ((DCI1A_5MHz_FDD_t *)dci_pdu)->rballoc; - rv = ((DCI1A_5MHz_FDD_t *)dci_pdu)->rv; - ndi = ((DCI1A_5MHz_FDD_t *)dci_pdu)->ndi; - TPC = ((DCI1A_5MHz_FDD_t *)dci_pdu)->TPC; - harq_pid = ((DCI1A_5MHz_FDD_t *)dci_pdu)->harq_pid; - //printf("FDD 1A: mcs %d, rballoc %x,rv %d, TPC %d\n",mcs,rballoc,rv,TPC); - } - - break; - - case 50: - if (frame_type == TDD) { - vrb_type = ((DCI1A_10MHz_TDD_1_6_t *)dci_pdu)->vrb_type; - mcs = ((DCI1A_10MHz_TDD_1_6_t *)dci_pdu)->mcs; - rballoc = ((DCI1A_10MHz_TDD_1_6_t *)dci_pdu)->rballoc; - rv = ((DCI1A_10MHz_TDD_1_6_t *)dci_pdu)->rv; - ndi = ((DCI1A_10MHz_TDD_1_6_t *)dci_pdu)->ndi; - TPC = ((DCI1A_10MHz_TDD_1_6_t *)dci_pdu)->TPC; - harq_pid = ((DCI1A_10MHz_TDD_1_6_t *)dci_pdu)->harq_pid; - dai = ((DCI1A_10MHz_TDD_1_6_t *)dci_pdu)->dai; - // printf("TDD 1A: mcs %d, rballoc %x,rv %d, TPC %d\n",mcs,rballoc,rv,TPC); - } else { - vrb_type = ((DCI1A_10MHz_FDD_t *)dci_pdu)->vrb_type; - mcs = ((DCI1A_10MHz_FDD_t *)dci_pdu)->mcs; - rballoc = ((DCI1A_10MHz_FDD_t *)dci_pdu)->rballoc; - rv = ((DCI1A_10MHz_FDD_t *)dci_pdu)->rv; - ndi = ((DCI1A_10MHz_FDD_t *)dci_pdu)->ndi; - TPC = ((DCI1A_10MHz_FDD_t *)dci_pdu)->TPC; - harq_pid = ((DCI1A_10MHz_FDD_t *)dci_pdu)->harq_pid; - //printf("FDD 1A: mcs %d, vrb_type %d, rballoc %x,ndi %d, rv %d, TPC %d\n",mcs,vrb_type,rballoc,ndi,rv,TPC); - } - break; - - case 100: - if (frame_type == TDD) { - vrb_type = ((DCI1A_20MHz_TDD_1_6_t *)dci_pdu)->vrb_type; - mcs = ((DCI1A_20MHz_TDD_1_6_t *)dci_pdu)->mcs; - rballoc = ((DCI1A_20MHz_TDD_1_6_t *)dci_pdu)->rballoc; - rv = ((DCI1A_20MHz_TDD_1_6_t *)dci_pdu)->rv; - ndi = ((DCI1A_20MHz_TDD_1_6_t *)dci_pdu)->ndi; - TPC = ((DCI1A_20MHz_TDD_1_6_t *)dci_pdu)->TPC; - harq_pid = ((DCI1A_20MHz_TDD_1_6_t *)dci_pdu)->harq_pid; - dai = ((DCI1A_20MHz_TDD_1_6_t *)dci_pdu)->dai; - // printf("TDD 1A: mcs %d, rballoc %x,rv %d, TPC %d\n",mcs,rballoc,rv,TPC); - } else { - vrb_type = ((DCI1A_20MHz_FDD_t *)dci_pdu)->vrb_type; - mcs = ((DCI1A_20MHz_FDD_t *)dci_pdu)->mcs; - rballoc = ((DCI1A_20MHz_FDD_t *)dci_pdu)->rballoc; - rv = ((DCI1A_20MHz_FDD_t *)dci_pdu)->rv; - ndi = ((DCI1A_20MHz_FDD_t *)dci_pdu)->ndi; - TPC = ((DCI1A_20MHz_FDD_t *)dci_pdu)->TPC; - harq_pid = ((DCI1A_20MHz_FDD_t *)dci_pdu)->harq_pid; - //printf("FDD 1A: mcs %d, rballoc %x,rv %d, TPC %d\n",mcs,rballoc,rv,TPC); - } - break; + switch (N_RB_DL) { + case 6: + if (frame_type == TDD) { + vrb_type = ((DCI1A_1_5MHz_TDD_1_6_t *) dci_pdu)->vrb_type; + mcs = ((DCI1A_1_5MHz_TDD_1_6_t *) dci_pdu)->mcs; + rballoc = ((DCI1A_1_5MHz_TDD_1_6_t *) dci_pdu)->rballoc; + rv = ((DCI1A_1_5MHz_TDD_1_6_t *) dci_pdu)->rv; + ndi = ((DCI1A_1_5MHz_TDD_1_6_t *) dci_pdu)->ndi; + TPC = ((DCI1A_1_5MHz_TDD_1_6_t *) dci_pdu)->TPC; + harq_pid = ((DCI1A_1_5MHz_TDD_1_6_t *) dci_pdu)->harq_pid; + dai = ((DCI1A_1_5MHz_TDD_1_6_t *) dci_pdu)->dai; + // printf("TDD 1A: mcs %d, rballoc %x,rv %d, TPC %d\n",mcs,rballoc,rv,TPC); + } else { + vrb_type = ((DCI1A_1_5MHz_FDD_t *) dci_pdu)->vrb_type; + mcs = ((DCI1A_1_5MHz_FDD_t *) dci_pdu)->mcs; + rballoc = ((DCI1A_1_5MHz_FDD_t *) dci_pdu)->rballoc; + rv = ((DCI1A_1_5MHz_FDD_t *) dci_pdu)->rv; + ndi = ((DCI1A_1_5MHz_FDD_t *) dci_pdu)->ndi; + TPC = ((DCI1A_1_5MHz_FDD_t *) dci_pdu)->TPC; + harq_pid = ((DCI1A_1_5MHz_FDD_t *) dci_pdu)->harq_pid; + //printf("FDD 1A: mcs %d, rballoc %x,rv %d, TPC %d\n",mcs,rballoc,rv,TPC); } - - pdci_info_extarcted->vrb_type = vrb_type; - pdci_info_extarcted->mcs1 = mcs; - pdci_info_extarcted->rballoc = rballoc; - pdci_info_extarcted->rv1 = rv; - pdci_info_extarcted->ndi1 = ndi; - pdci_info_extarcted->TPC = TPC; - pdci_info_extarcted->harq_pid = harq_pid; - pdci_info_extarcted->dai = dai; -} - -void extract_dci1C_info(uint8_t N_RB_DL, lte_frame_type_t frame_type, void *dci_pdu, DCI_INFO_EXTRACTED_t *pdci_info_extarcted) -{ - - uint32_t rballoc=0; - uint8_t mcs=0; - - switch (N_RB_DL) { - case 6: - mcs = ((DCI1C_5MHz_t *)dci_pdu)->mcs; - rballoc = conv_1C_RIV(((DCI1C_5MHz_t *)dci_pdu)->rballoc,6); - - break; - - case 25: - mcs = ((DCI1C_5MHz_t *)dci_pdu)->mcs; - rballoc = conv_1C_RIV(((DCI1C_5MHz_t *)dci_pdu)->rballoc,6); - - break; - - case 50: - mcs = ((DCI1C_10MHz_t *)dci_pdu)->mcs; - rballoc = conv_1C_RIV(((DCI1C_10MHz_t *)dci_pdu)->rballoc,6); - - break; - - case 100: - mcs = ((DCI1C_20MHz_t *)dci_pdu)->mcs; - rballoc = conv_1C_RIV(((DCI1C_20MHz_t *)dci_pdu)->rballoc,6); - break; - - default: - AssertFatal(0,"Format 1C: Unknown N_RB_DL %d\n",N_RB_DL); - break; - } - - pdci_info_extarcted->mcs1 = mcs; - pdci_info_extarcted->rballoc = rballoc; -} - -void extract_dci1_info(uint8_t N_RB_DL, lte_frame_type_t frame_type, void *dci_pdu, DCI_INFO_EXTRACTED_t *pdci_info_extarcted) -{ - - uint32_t rballoc=0; - uint8_t mcs=0; - uint8_t rah=0; - uint8_t rv=0; - uint8_t TPC=0; - uint8_t ndi=0; - uint8_t harq_pid=0; - - switch (N_RB_DL) { - case 6: - if (frame_type == TDD) { - mcs = ((DCI1_1_5MHz_TDD_t *)dci_pdu)->mcs; - rballoc = ((DCI1_1_5MHz_TDD_t *)dci_pdu)->rballoc; - rah = ((DCI1_1_5MHz_TDD_t *)dci_pdu)->rah; - rv = ((DCI1_1_5MHz_TDD_t *)dci_pdu)->rv; - TPC = ((DCI1_1_5MHz_TDD_t *)dci_pdu)->TPC; - ndi = ((DCI1_1_5MHz_TDD_t *)dci_pdu)->ndi; - harq_pid = ((DCI1_1_5MHz_TDD_t *)dci_pdu)->harq_pid; - } else { - mcs = ((DCI1_1_5MHz_FDD_t *)dci_pdu)->mcs; - rah = ((DCI1_1_5MHz_FDD_t *)dci_pdu)->rah; - rballoc = ((DCI1_1_5MHz_FDD_t *)dci_pdu)->rballoc; - rv = ((DCI1_1_5MHz_FDD_t *)dci_pdu)->rv; - TPC = ((DCI1_1_5MHz_FDD_t *)dci_pdu)->TPC; - ndi = ((DCI1_1_5MHz_FDD_t *)dci_pdu)->ndi; - harq_pid = ((DCI1_1_5MHz_FDD_t *)dci_pdu)->harq_pid; - } - - break; - - case 25: - if (frame_type == TDD) { - mcs = ((DCI1_5MHz_TDD_t *)dci_pdu)->mcs; - rballoc = ((DCI1_5MHz_TDD_t *)dci_pdu)->rballoc; - rah = ((DCI1_5MHz_TDD_t *)dci_pdu)->rah; - rv = ((DCI1_5MHz_TDD_t *)dci_pdu)->rv; - TPC = ((DCI1_5MHz_TDD_t *)dci_pdu)->TPC; - ndi = ((DCI1_5MHz_TDD_t *)dci_pdu)->ndi; - harq_pid = ((DCI1_5MHz_TDD_t *)dci_pdu)->harq_pid; - } else { - mcs = ((DCI1_5MHz_FDD_t *)dci_pdu)->mcs; - rah = ((DCI1_5MHz_FDD_t *)dci_pdu)->rah; - rballoc = ((DCI1_5MHz_FDD_t *)dci_pdu)->rballoc; - rv = ((DCI1_5MHz_FDD_t *)dci_pdu)->rv; - TPC = ((DCI1_5MHz_FDD_t *)dci_pdu)->TPC; - ndi = ((DCI1_5MHz_FDD_t *)dci_pdu)->ndi; - harq_pid = ((DCI1_5MHz_FDD_t *)dci_pdu)->harq_pid; - } - - break; - - case 50: - if (frame_type == TDD) { - mcs = ((DCI1_10MHz_TDD_t *)dci_pdu)->mcs; - rballoc = ((DCI1_10MHz_TDD_t *)dci_pdu)->rballoc; - rah = ((DCI1_10MHz_TDD_t *)dci_pdu)->rah; - rv = ((DCI1_10MHz_TDD_t *)dci_pdu)->rv; - TPC = ((DCI1_10MHz_TDD_t *)dci_pdu)->TPC; - ndi = ((DCI1_10MHz_TDD_t *)dci_pdu)->ndi; - harq_pid = ((DCI1_10MHz_TDD_t *)dci_pdu)->harq_pid; - } else { - mcs = ((DCI1_10MHz_FDD_t *)dci_pdu)->mcs; - rah = ((DCI1_10MHz_FDD_t *)dci_pdu)->rah; - rballoc = ((DCI1_10MHz_FDD_t *)dci_pdu)->rballoc; - rv = ((DCI1_10MHz_FDD_t *)dci_pdu)->rv; - TPC = ((DCI1_10MHz_FDD_t *)dci_pdu)->TPC; - ndi = ((DCI1_10MHz_FDD_t *)dci_pdu)->ndi; - harq_pid = ((DCI1_10MHz_FDD_t *)dci_pdu)->harq_pid; - } - - break; - - case 100: - if (frame_type == TDD) { - mcs = ((DCI1_20MHz_TDD_t *)dci_pdu)->mcs; - rballoc = ((DCI1_20MHz_TDD_t *)dci_pdu)->rballoc; - rah = ((DCI1_20MHz_TDD_t *)dci_pdu)->rah; - rv = ((DCI1_20MHz_TDD_t *)dci_pdu)->rv; - TPC = ((DCI1_20MHz_TDD_t *)dci_pdu)->TPC; - ndi = ((DCI1_20MHz_TDD_t *)dci_pdu)->ndi; - harq_pid = ((DCI1_20MHz_TDD_t *)dci_pdu)->harq_pid; - } else { - mcs = ((DCI1_20MHz_FDD_t *)dci_pdu)->mcs; - rah = ((DCI1_20MHz_FDD_t *)dci_pdu)->rah; - rballoc = ((DCI1_20MHz_FDD_t *)dci_pdu)->rballoc; - rv = ((DCI1_20MHz_FDD_t *)dci_pdu)->rv; - TPC = ((DCI1_20MHz_FDD_t *)dci_pdu)->TPC; - ndi = ((DCI1_20MHz_FDD_t *)dci_pdu)->ndi; - harq_pid = ((DCI1_20MHz_FDD_t *)dci_pdu)->harq_pid; - } - - break; - } - - pdci_info_extarcted->mcs1 = mcs; - pdci_info_extarcted->rah = rah; - pdci_info_extarcted->rballoc = rballoc; - pdci_info_extarcted->rv1 = rv; - pdci_info_extarcted->TPC = TPC; - pdci_info_extarcted->ndi1 = ndi; - pdci_info_extarcted->harq_pid = harq_pid; - -} - -void extract_dci2_info(uint8_t N_RB_DL, lte_frame_type_t frame_type, uint8_t nb_antenna_ports_eNB, void *dci_pdu, DCI_INFO_EXTRACTED_t *pdci_info_extarcted) -{ - - uint32_t rballoc=0; - uint8_t rah=0; - uint8_t mcs1=0; - uint8_t mcs2=0; - uint8_t rv1=0; - uint8_t rv2=0; - uint8_t ndi1=0; - uint8_t ndi2=0; - uint8_t tbswap=0; - uint8_t tpmi=0; - uint8_t harq_pid=0; - uint8_t TPC=0; - - switch (N_RB_DL) { - - case 6: - if (nb_antenna_ports_eNB == 2) { - if (frame_type == TDD) { - rah = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->rah; - mcs1 = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->mcs1; - mcs2 = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->mcs2; - rballoc = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->rballoc; - rv1 = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->rv1; - rv2 = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->rv2; - harq_pid = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->harq_pid; - tbswap = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->tb_swap; - tpmi = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->tpmi; - TPC = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->TPC; - ndi1 = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->ndi1; - ndi2 = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->ndi2; - } else { - rah = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->rah; - mcs1 = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->mcs1; - mcs2 = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->mcs2; - rballoc = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->rballoc; - rv1 = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->rv1; - rv2 = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->rv2; - harq_pid = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->harq_pid; - tbswap = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->tb_swap; - tpmi = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->tpmi; - TPC = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->TPC; - ndi1 = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->ndi1; - ndi2 = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->ndi2; - } - } else if (nb_antenna_ports_eNB == 4) { - if (frame_type == TDD) { - rah = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->rah; - mcs1 = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->mcs1; - mcs2 = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->mcs2; - rballoc = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->rballoc; - rv1 = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->rv1; - rv2 = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->rv2; - harq_pid = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->harq_pid; - tbswap = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->tb_swap; - tpmi = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->tpmi; - TPC = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->TPC; - ndi1 = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->ndi1; - ndi2 = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->ndi2; - } else { - rah = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->rah; - mcs1 = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->mcs1; - mcs2 = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->mcs2; - rballoc = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->rballoc; - rv1 = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->rv1; - rv2 = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->rv2; - harq_pid = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->harq_pid; - tbswap = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->tb_swap; - tpmi = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->tpmi; - TPC = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->TPC; - ndi1 = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->ndi1; - ndi2 = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->ndi2; - } - } else { - LOG_E(PHY,"UE: Format2 DCI: unsupported number of TX antennas %d\n",nb_antenna_ports_eNB); - } - - break; - - case 25: - if (nb_antenna_ports_eNB == 2) { - if (frame_type == TDD) { - rah = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->rah; - mcs1 = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->mcs1; - mcs2 = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->mcs2; - rballoc = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->rballoc; - rv1 = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->rv1; - rv2 = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->rv2; - harq_pid = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->harq_pid; - tbswap = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->tb_swap; - tpmi = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->tpmi; - TPC = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->TPC; - ndi1 = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->ndi1; - ndi2 = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->ndi2; - } else { - rah = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->rah; - mcs1 = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->mcs1; - mcs2 = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->mcs2; - rballoc = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->rballoc; - rv1 = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->rv1; - rv2 = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->rv2; - harq_pid = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->harq_pid; - tbswap = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->tb_swap; - tpmi = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->tpmi; - TPC = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->TPC; - ndi1 = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->ndi1; - ndi2 = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->ndi2; - } - } else if (nb_antenna_ports_eNB == 4) { - if (frame_type == TDD) { - rah = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->rah; - mcs1 = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->mcs1; - mcs2 = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->mcs2; - rballoc = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->rballoc; - rv1 = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->rv1; - rv2 = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->rv2; - harq_pid = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->harq_pid; - tbswap = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->tb_swap; - tpmi = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->tpmi; - TPC = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->TPC; - ndi1 = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->ndi1; - ndi2 = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->ndi2; - } else { - rah = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->rah; - mcs1 = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->mcs1; - mcs2 = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->mcs2; - rballoc = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->rballoc; - rv1 = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->rv1; - rv2 = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->rv2; - harq_pid = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->harq_pid; - tbswap = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->tb_swap; - tpmi = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->tpmi; - TPC = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->TPC; - ndi1 = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->ndi1; - ndi2 = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->ndi2; - } - } else { - LOG_E(PHY,"UE: Format2 DCI: unsupported number of TX antennas %d\n",nb_antenna_ports_eNB); - } - - break; - - case 50: - if (nb_antenna_ports_eNB == 2) { - if (frame_type == TDD) { - rah = ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->rah; - mcs1 = ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->mcs1; - mcs2 = ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->mcs2; - rballoc = ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->rballoc; - rv1 = ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->rv1; - rv2 = ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->rv2; - harq_pid = ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->harq_pid; - tbswap = ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->tb_swap; - tpmi = ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->tpmi; - TPC = ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->TPC; - ndi1 = ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->ndi1; - ndi2 = ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->ndi2; - } else { - rah = ((DCI2_10MHz_2A_FDD_t *)dci_pdu)->rah; - mcs1 = ((DCI2_10MHz_2A_FDD_t *)dci_pdu)->mcs1; - mcs2 = ((DCI2_10MHz_2A_FDD_t *)dci_pdu)->mcs2; - rballoc = ((DCI2_10MHz_2A_FDD_t *)dci_pdu)->rballoc; - rv1 = ((DCI2_10MHz_2A_FDD_t *)dci_pdu)->rv1; - rv2 = ((DCI2_10MHz_2A_FDD_t *)dci_pdu)->rv2; - harq_pid = ((DCI2_10MHz_2A_FDD_t *)dci_pdu)->harq_pid; - tbswap = ((DCI2_10MHz_2A_FDD_t *)dci_pdu)->tb_swap; - tpmi = ((DCI2_10MHz_2A_FDD_t *)dci_pdu)->tpmi; - TPC = ((DCI2_10MHz_2A_FDD_t *)dci_pdu)->TPC; - ndi1 = ((DCI2_10MHz_2A_FDD_t *)dci_pdu)->ndi1; - ndi2 = ((DCI2_10MHz_2A_FDD_t *)dci_pdu)->ndi2; - } - } else if (nb_antenna_ports_eNB == 4) { - if (frame_type == TDD) { - rah = ((DCI2_10MHz_4A_TDD_t *)dci_pdu)->rah; - mcs1 = ((DCI2_10MHz_4A_TDD_t *)dci_pdu)->mcs1; - mcs2 = ((DCI2_10MHz_4A_TDD_t *)dci_pdu)->mcs2; - rballoc = ((DCI2_10MHz_4A_TDD_t *)dci_pdu)->rballoc; - rv1 = ((DCI2_10MHz_4A_TDD_t *)dci_pdu)->rv1; - rv2 = ((DCI2_10MHz_4A_TDD_t *)dci_pdu)->rv2; - harq_pid = ((DCI2_10MHz_4A_TDD_t *)dci_pdu)->harq_pid; - tbswap = ((DCI2_10MHz_4A_TDD_t *)dci_pdu)->tb_swap; - tpmi = ((DCI2_10MHz_4A_TDD_t *)dci_pdu)->tpmi; - TPC = ((DCI2_10MHz_4A_TDD_t *)dci_pdu)->TPC; - ndi1 = ((DCI2_10MHz_4A_TDD_t *)dci_pdu)->ndi1; - ndi2 = ((DCI2_10MHz_4A_TDD_t *)dci_pdu)->ndi2; - } else { - rah = ((DCI2_10MHz_4A_FDD_t *)dci_pdu)->rah; - mcs1 = ((DCI2_10MHz_4A_FDD_t *)dci_pdu)->mcs1; - mcs2 = ((DCI2_10MHz_4A_FDD_t *)dci_pdu)->mcs2; - rballoc = ((DCI2_10MHz_4A_FDD_t *)dci_pdu)->rballoc; - rv1 = ((DCI2_10MHz_4A_FDD_t *)dci_pdu)->rv1; - rv2 = ((DCI2_10MHz_4A_FDD_t *)dci_pdu)->rv2; - harq_pid = ((DCI2_10MHz_4A_FDD_t *)dci_pdu)->harq_pid; - tbswap = ((DCI2_10MHz_4A_FDD_t *)dci_pdu)->tb_swap; - tpmi = ((DCI2_10MHz_4A_FDD_t *)dci_pdu)->tpmi; - TPC = ((DCI2_10MHz_4A_FDD_t *)dci_pdu)->TPC; - ndi1 = ((DCI2_10MHz_4A_FDD_t *)dci_pdu)->ndi1; - ndi2 = ((DCI2_10MHz_4A_FDD_t *)dci_pdu)->ndi2; - } - } else { - LOG_E(PHY,"UE: Format2A DCI: unsupported number of TX antennas %d\n",nb_antenna_ports_eNB); - } - - break; - - case 100: - if (nb_antenna_ports_eNB == 2) { - if (frame_type == TDD) { - rah = ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->rah; - mcs1 = ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->mcs1; - mcs2 = ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->mcs2; - rballoc = ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->rballoc; - rv1 = ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->rv1; - rv2 = ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->rv2; - harq_pid = ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->harq_pid; - tbswap = ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->tb_swap; - tpmi = ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->tpmi; - TPC = ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->TPC; - ndi1 = ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->ndi1; - ndi2 = ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->ndi2; - } else { - rah = ((DCI2_20MHz_2A_FDD_t *)dci_pdu)->rah; - mcs1 = ((DCI2_20MHz_2A_FDD_t *)dci_pdu)->mcs1; - mcs2 = ((DCI2_20MHz_2A_FDD_t *)dci_pdu)->mcs2; - rballoc = ((DCI2_20MHz_2A_FDD_t *)dci_pdu)->rballoc; - rv1 = ((DCI2_20MHz_2A_FDD_t *)dci_pdu)->rv1; - rv2 = ((DCI2_20MHz_2A_FDD_t *)dci_pdu)->rv2; - harq_pid = ((DCI2_20MHz_2A_FDD_t *)dci_pdu)->harq_pid; - tbswap = ((DCI2_20MHz_2A_FDD_t *)dci_pdu)->tb_swap; - tpmi = ((DCI2_20MHz_2A_FDD_t *)dci_pdu)->tpmi; - TPC = ((DCI2_20MHz_2A_FDD_t *)dci_pdu)->TPC; - ndi1 = ((DCI2_20MHz_2A_FDD_t *)dci_pdu)->ndi1; - ndi2 = ((DCI2_20MHz_2A_FDD_t *)dci_pdu)->ndi2; - } - } else if (nb_antenna_ports_eNB == 4) { - if (frame_type == TDD) { - rah = ((DCI2_20MHz_4A_TDD_t *)dci_pdu)->rah; - mcs1 = ((DCI2_20MHz_4A_TDD_t *)dci_pdu)->mcs1; - mcs2 = ((DCI2_20MHz_4A_TDD_t *)dci_pdu)->mcs2; - rballoc = ((DCI2_20MHz_4A_TDD_t *)dci_pdu)->rballoc; - rv1 = ((DCI2_20MHz_4A_TDD_t *)dci_pdu)->rv1; - rv2 = ((DCI2_20MHz_4A_TDD_t *)dci_pdu)->rv2; - harq_pid = ((DCI2_20MHz_4A_TDD_t *)dci_pdu)->harq_pid; - tbswap = ((DCI2_20MHz_4A_TDD_t *)dci_pdu)->tb_swap; - tpmi = ((DCI2_20MHz_4A_TDD_t *)dci_pdu)->tpmi; - TPC = ((DCI2_20MHz_4A_TDD_t *)dci_pdu)->TPC; - ndi1 = ((DCI2_20MHz_4A_TDD_t *)dci_pdu)->ndi1; - ndi2 = ((DCI2_20MHz_4A_TDD_t *)dci_pdu)->ndi2; - } else { - rah = ((DCI2_20MHz_4A_FDD_t *)dci_pdu)->rah; - mcs1 = ((DCI2_20MHz_4A_FDD_t *)dci_pdu)->mcs1; - mcs2 = ((DCI2_20MHz_4A_FDD_t *)dci_pdu)->mcs2; - rballoc = ((DCI2_20MHz_4A_FDD_t *)dci_pdu)->rballoc; - rv1 = ((DCI2_20MHz_4A_FDD_t *)dci_pdu)->rv1; - rv2 = ((DCI2_20MHz_4A_FDD_t *)dci_pdu)->rv2; - harq_pid = ((DCI2_20MHz_4A_FDD_t *)dci_pdu)->harq_pid; - tbswap = ((DCI2_20MHz_4A_FDD_t *)dci_pdu)->tb_swap; - tpmi = ((DCI2_20MHz_4A_FDD_t *)dci_pdu)->tpmi; - TPC = ((DCI2_20MHz_4A_FDD_t *)dci_pdu)->TPC; - ndi1 = ((DCI2_20MHz_4A_FDD_t *)dci_pdu)->ndi1; - ndi2 = ((DCI2_20MHz_4A_FDD_t *)dci_pdu)->ndi2; - } - } else { - LOG_E(PHY,"UE: Format2A DCI: unsupported number of TX antennas %d\n",nb_antenna_ports_eNB); - } - - break; - } - - pdci_info_extarcted->rah = rah; - pdci_info_extarcted->mcs1 = mcs1; - pdci_info_extarcted->mcs2 = mcs2; - pdci_info_extarcted->rv1 = rv1; - pdci_info_extarcted->rv2 = rv2; - pdci_info_extarcted->harq_pid = harq_pid; - pdci_info_extarcted->rballoc = rballoc; - pdci_info_extarcted->tb_swap = tbswap; - pdci_info_extarcted->tpmi = tpmi; - pdci_info_extarcted->TPC = TPC; - pdci_info_extarcted->ndi1 = ndi1; - pdci_info_extarcted->ndi2 = ndi2; - -} - -void extract_dci2A_info(uint8_t N_RB_DL, lte_frame_type_t frame_type, uint8_t nb_antenna_ports_eNB, void *dci_pdu, DCI_INFO_EXTRACTED_t *pdci_info_extarcted) -{ - - uint32_t rballoc=0; - uint8_t rah=0; - uint8_t mcs1=0; - uint8_t mcs2=0; - uint8_t rv1=0; - uint8_t rv2=0; - uint8_t ndi1=0; - uint8_t ndi2=0; - uint8_t tbswap=0; - uint8_t tpmi=0; - uint8_t harq_pid=0; - uint8_t TPC=0; - - AssertFatal( (nb_antenna_ports_eNB == 2) || (nb_antenna_ports_eNB == 4), "unsupported nb_antenna_ports_eNB %d\n", nb_antenna_ports_eNB); - switch (N_RB_DL) { - - case 6: - if (nb_antenna_ports_eNB == 2) { - if (frame_type == TDD) { - mcs1 = ((DCI2A_1_5MHz_2A_TDD_t *)dci_pdu)->mcs1; - mcs2 = ((DCI2A_1_5MHz_2A_TDD_t *)dci_pdu)->mcs2; - rballoc = ((DCI2A_1_5MHz_2A_TDD_t *)dci_pdu)->rballoc; - rv1 = ((DCI2A_1_5MHz_2A_TDD_t *)dci_pdu)->rv1; - rv2 = ((DCI2A_1_5MHz_2A_TDD_t *)dci_pdu)->rv2; - ndi1 = ((DCI2A_1_5MHz_2A_TDD_t *)dci_pdu)->ndi1; - ndi2 = ((DCI2A_1_5MHz_2A_TDD_t *)dci_pdu)->ndi2; - harq_pid = ((DCI2A_1_5MHz_2A_TDD_t *)dci_pdu)->harq_pid; - tbswap = ((DCI2A_1_5MHz_2A_TDD_t *)dci_pdu)->tb_swap; - TPC = ((DCI2A_1_5MHz_2A_TDD_t *)dci_pdu)->TPC; - } else { - mcs1 = ((DCI2A_1_5MHz_2A_FDD_t *)dci_pdu)->mcs1; - mcs2 = ((DCI2A_1_5MHz_2A_FDD_t *)dci_pdu)->mcs2; - rballoc = ((DCI2A_1_5MHz_2A_FDD_t *)dci_pdu)->rballoc; - rv1 = ((DCI2A_1_5MHz_2A_FDD_t *)dci_pdu)->rv1; - rv2 = ((DCI2A_1_5MHz_2A_FDD_t *)dci_pdu)->rv2; - ndi1 = ((DCI2A_1_5MHz_2A_FDD_t *)dci_pdu)->ndi1; - ndi2 = ((DCI2A_1_5MHz_2A_FDD_t *)dci_pdu)->ndi2; - harq_pid = ((DCI2A_1_5MHz_2A_FDD_t *)dci_pdu)->harq_pid; - tbswap = ((DCI2A_1_5MHz_2A_FDD_t *)dci_pdu)->tb_swap; - TPC = ((DCI2A_1_5MHz_2A_FDD_t *)dci_pdu)->TPC; - } - } else if (nb_antenna_ports_eNB == 4) { - if (frame_type == TDD) { - mcs1 = ((DCI2A_1_5MHz_4A_TDD_t *)dci_pdu)->mcs1; - mcs2 = ((DCI2A_1_5MHz_4A_TDD_t *)dci_pdu)->mcs2; - rballoc = ((DCI2A_1_5MHz_4A_TDD_t *)dci_pdu)->rballoc; - rv1 = ((DCI2A_1_5MHz_4A_TDD_t *)dci_pdu)->rv1; - rv2 = ((DCI2A_1_5MHz_4A_TDD_t *)dci_pdu)->rv2; - ndi1 = ((DCI2A_1_5MHz_4A_TDD_t *)dci_pdu)->ndi1; - ndi2 = ((DCI2A_1_5MHz_4A_TDD_t *)dci_pdu)->ndi2; - harq_pid = ((DCI2A_1_5MHz_4A_TDD_t *)dci_pdu)->harq_pid; - tbswap = ((DCI2A_1_5MHz_4A_TDD_t *)dci_pdu)->tb_swap; - tpmi = ((DCI2A_1_5MHz_4A_TDD_t *)dci_pdu)->tpmi; - TPC = ((DCI2A_1_5MHz_4A_TDD_t *)dci_pdu)->TPC; - } else { - mcs1 = ((DCI2A_1_5MHz_4A_FDD_t *)dci_pdu)->mcs1; - mcs2 = ((DCI2A_1_5MHz_4A_FDD_t *)dci_pdu)->mcs2; - rballoc = ((DCI2A_1_5MHz_4A_FDD_t *)dci_pdu)->rballoc; - rv1 = ((DCI2A_1_5MHz_4A_FDD_t *)dci_pdu)->rv1; - rv2 = ((DCI2A_1_5MHz_4A_FDD_t *)dci_pdu)->rv2; - ndi1 = ((DCI2A_1_5MHz_4A_FDD_t *)dci_pdu)->ndi1; - ndi2 = ((DCI2A_1_5MHz_4A_FDD_t *)dci_pdu)->ndi2; - harq_pid = ((DCI2A_1_5MHz_4A_FDD_t *)dci_pdu)->harq_pid; - tbswap = ((DCI2A_1_5MHz_4A_FDD_t *)dci_pdu)->tb_swap; - tpmi = ((DCI2A_1_5MHz_4A_FDD_t *)dci_pdu)->tpmi; - TPC = ((DCI2A_1_5MHz_4A_FDD_t *)dci_pdu)->TPC; - } - } - - break; - - case 25: - if (nb_antenna_ports_eNB == 2) { - if (frame_type == TDD) { - mcs1 = ((DCI2A_5MHz_2A_TDD_t *)dci_pdu)->mcs1; - mcs2 = ((DCI2A_5MHz_2A_TDD_t *)dci_pdu)->mcs2; - rballoc = ((DCI2A_5MHz_2A_TDD_t *)dci_pdu)->rballoc; - rah = ((DCI2A_5MHz_2A_TDD_t *)dci_pdu)->rah; - rv1 = ((DCI2A_5MHz_2A_TDD_t *)dci_pdu)->rv1; - rv2 = ((DCI2A_5MHz_2A_TDD_t *)dci_pdu)->rv2; - ndi1 = ((DCI2A_5MHz_2A_TDD_t *)dci_pdu)->ndi1; - ndi2 = ((DCI2A_5MHz_2A_TDD_t *)dci_pdu)->ndi2; - harq_pid = ((DCI2A_5MHz_2A_TDD_t *)dci_pdu)->harq_pid; - tbswap = ((DCI2A_5MHz_2A_TDD_t *)dci_pdu)->tb_swap; - TPC = ((DCI2A_5MHz_2A_TDD_t *)dci_pdu)->TPC; - } else { - mcs1 = ((DCI2A_5MHz_2A_FDD_t *)dci_pdu)->mcs1; - mcs2 = ((DCI2A_5MHz_2A_FDD_t *)dci_pdu)->mcs2; - rballoc = ((DCI2A_5MHz_2A_FDD_t *)dci_pdu)->rballoc; - rah = ((DCI2A_5MHz_2A_FDD_t *)dci_pdu)->rah; - rv1 = ((DCI2A_5MHz_2A_FDD_t *)dci_pdu)->rv1; - rv2 = ((DCI2A_5MHz_2A_FDD_t *)dci_pdu)->rv2; - ndi1 = ((DCI2A_5MHz_2A_FDD_t *)dci_pdu)->ndi1; - ndi2 = ((DCI2A_5MHz_2A_FDD_t *)dci_pdu)->ndi2; - harq_pid = ((DCI2A_5MHz_2A_FDD_t *)dci_pdu)->harq_pid; - tbswap = ((DCI2A_5MHz_2A_FDD_t *)dci_pdu)->tb_swap; - TPC = ((DCI2A_5MHz_2A_FDD_t *)dci_pdu)->TPC; - } - } else if (nb_antenna_ports_eNB == 4) { - if (frame_type == TDD) { - mcs1 = ((DCI2A_5MHz_4A_TDD_t *)dci_pdu)->mcs1; - mcs2 = ((DCI2A_5MHz_4A_TDD_t *)dci_pdu)->mcs2; - rballoc = ((DCI2A_5MHz_4A_TDD_t *)dci_pdu)->rballoc; - rah = ((DCI2A_5MHz_4A_TDD_t *)dci_pdu)->rah; - rv1 = ((DCI2A_5MHz_4A_TDD_t *)dci_pdu)->rv1; - rv2 = ((DCI2A_5MHz_4A_TDD_t *)dci_pdu)->rv2; - ndi1 = ((DCI2A_5MHz_4A_TDD_t *)dci_pdu)->ndi1; - ndi2 = ((DCI2A_5MHz_4A_TDD_t *)dci_pdu)->ndi2; - harq_pid = ((DCI2A_5MHz_4A_TDD_t *)dci_pdu)->harq_pid; - tbswap = ((DCI2A_5MHz_4A_TDD_t *)dci_pdu)->tb_swap; - tpmi = ((DCI2A_5MHz_4A_TDD_t *)dci_pdu)->tpmi; - TPC = ((DCI2A_5MHz_4A_TDD_t *)dci_pdu)->TPC; - } else { - mcs1 = ((DCI2A_5MHz_4A_FDD_t *)dci_pdu)->mcs1; - mcs2 = ((DCI2A_5MHz_4A_FDD_t *)dci_pdu)->mcs2; - rballoc = ((DCI2A_5MHz_4A_FDD_t *)dci_pdu)->rballoc; - rah = ((DCI2A_5MHz_4A_FDD_t *)dci_pdu)->rah; - rv1 = ((DCI2A_5MHz_4A_FDD_t *)dci_pdu)->rv1; - rv2 = ((DCI2A_5MHz_4A_FDD_t *)dci_pdu)->rv2; - ndi1 = ((DCI2A_5MHz_4A_TDD_t *)dci_pdu)->ndi1; - ndi2 = ((DCI2A_5MHz_4A_TDD_t *)dci_pdu)->ndi2; - harq_pid = ((DCI2A_5MHz_4A_FDD_t *)dci_pdu)->harq_pid; - tbswap = ((DCI2A_5MHz_4A_FDD_t *)dci_pdu)->tb_swap; - tpmi = ((DCI2A_5MHz_4A_FDD_t *)dci_pdu)->tpmi; - TPC = ((DCI2A_5MHz_4A_FDD_t *)dci_pdu)->TPC; - } - } - break; - - case 50: - if (nb_antenna_ports_eNB == 2) { - if (frame_type == TDD) { - mcs1 = ((DCI2A_10MHz_2A_TDD_t *)dci_pdu)->mcs1; - mcs2 = ((DCI2A_10MHz_2A_TDD_t *)dci_pdu)->mcs2; - rballoc = ((DCI2A_10MHz_2A_TDD_t *)dci_pdu)->rballoc; - rah = ((DCI2A_10MHz_2A_TDD_t *)dci_pdu)->rah; - rv1 = ((DCI2A_10MHz_2A_TDD_t *)dci_pdu)->rv1; - rv2 = ((DCI2A_10MHz_2A_TDD_t *)dci_pdu)->rv2; - ndi1 = ((DCI2A_10MHz_2A_TDD_t *)dci_pdu)->ndi1; - ndi2 = ((DCI2A_10MHz_2A_TDD_t *)dci_pdu)->ndi2; - harq_pid = ((DCI2A_10MHz_2A_TDD_t *)dci_pdu)->harq_pid; - tbswap = ((DCI2A_10MHz_2A_TDD_t *)dci_pdu)->tb_swap; - TPC = ((DCI2A_10MHz_2A_TDD_t *)dci_pdu)->TPC; - } else { - mcs1 = ((DCI2A_10MHz_2A_FDD_t *)dci_pdu)->mcs1; - mcs2 = ((DCI2A_10MHz_2A_FDD_t *)dci_pdu)->mcs2; - rballoc = ((DCI2A_10MHz_2A_FDD_t *)dci_pdu)->rballoc; - rah = ((DCI2A_10MHz_2A_FDD_t *)dci_pdu)->rah; - rv1 = ((DCI2A_10MHz_2A_FDD_t *)dci_pdu)->rv1; - rv2 = ((DCI2A_10MHz_2A_FDD_t *)dci_pdu)->rv2; - ndi1 = ((DCI2A_10MHz_2A_FDD_t *)dci_pdu)->ndi1; - ndi2 = ((DCI2A_10MHz_2A_FDD_t *)dci_pdu)->ndi2; - harq_pid = ((DCI2A_10MHz_2A_FDD_t *)dci_pdu)->harq_pid; - tbswap = ((DCI2A_10MHz_2A_FDD_t *)dci_pdu)->tb_swap; - TPC = ((DCI2A_10MHz_2A_FDD_t *)dci_pdu)->TPC; - } - } else if (nb_antenna_ports_eNB == 4) { - if (frame_type == TDD) { - mcs1 = ((DCI2A_10MHz_4A_TDD_t *)dci_pdu)->mcs1; - mcs2 = ((DCI2A_10MHz_4A_TDD_t *)dci_pdu)->mcs2; - rballoc = ((DCI2A_10MHz_4A_TDD_t *)dci_pdu)->rballoc; - rah = ((DCI2A_10MHz_4A_TDD_t *)dci_pdu)->rah; - rv1 = ((DCI2A_10MHz_4A_TDD_t *)dci_pdu)->rv1; - rv2 = ((DCI2A_10MHz_4A_TDD_t *)dci_pdu)->rv2; - ndi1 = ((DCI2A_10MHz_4A_TDD_t *)dci_pdu)->ndi1; - ndi2 = ((DCI2A_10MHz_4A_TDD_t *)dci_pdu)->ndi2; - harq_pid = ((DCI2A_10MHz_4A_TDD_t *)dci_pdu)->harq_pid; - tbswap = ((DCI2A_10MHz_4A_TDD_t *)dci_pdu)->tb_swap; - tpmi = ((DCI2A_10MHz_4A_TDD_t *)dci_pdu)->tpmi; - TPC = ((DCI2A_10MHz_4A_TDD_t *)dci_pdu)->TPC; - } else { - mcs1 = ((DCI2A_10MHz_4A_FDD_t *)dci_pdu)->mcs1; - mcs2 = ((DCI2A_10MHz_4A_FDD_t *)dci_pdu)->mcs2; - rballoc = ((DCI2A_10MHz_4A_FDD_t *)dci_pdu)->rballoc; - rah = ((DCI2A_10MHz_4A_FDD_t *)dci_pdu)->rah; - rv1 = ((DCI2A_10MHz_4A_FDD_t *)dci_pdu)->rv1; - rv2 = ((DCI2A_10MHz_4A_FDD_t *)dci_pdu)->rv2; - ndi1 = ((DCI2A_10MHz_4A_FDD_t *)dci_pdu)->ndi1; - ndi2 = ((DCI2A_10MHz_4A_FDD_t *)dci_pdu)->ndi2; - harq_pid = ((DCI2A_10MHz_4A_FDD_t *)dci_pdu)->harq_pid; - tbswap = ((DCI2A_10MHz_4A_FDD_t *)dci_pdu)->tb_swap; - tpmi = ((DCI2A_10MHz_4A_FDD_t *)dci_pdu)->tpmi; - TPC = ((DCI2A_10MHz_4A_FDD_t *)dci_pdu)->TPC; - } - } - - break; - - case 100: - if (nb_antenna_ports_eNB == 2) { - if (frame_type == TDD) { - mcs1 = ((DCI2A_20MHz_2A_TDD_t *)dci_pdu)->mcs1; - mcs2 = ((DCI2A_20MHz_2A_TDD_t *)dci_pdu)->mcs2; - rballoc = ((DCI2A_20MHz_2A_TDD_t *)dci_pdu)->rballoc; - rah = ((DCI2A_20MHz_2A_TDD_t *)dci_pdu)->rah; - rv1 = ((DCI2A_20MHz_2A_TDD_t *)dci_pdu)->rv1; - rv2 = ((DCI2A_20MHz_2A_TDD_t *)dci_pdu)->rv2; - ndi1 = ((DCI2A_20MHz_2A_TDD_t *)dci_pdu)->ndi1; - ndi2 = ((DCI2A_20MHz_2A_TDD_t *)dci_pdu)->ndi2; - harq_pid = ((DCI2A_20MHz_2A_TDD_t *)dci_pdu)->harq_pid; - tbswap = ((DCI2A_20MHz_2A_TDD_t *)dci_pdu)->tb_swap; - TPC = ((DCI2A_20MHz_2A_TDD_t *)dci_pdu)->TPC; - } else { - mcs1 = ((DCI2A_20MHz_2A_FDD_t *)dci_pdu)->mcs1; - mcs2 = ((DCI2A_20MHz_2A_FDD_t *)dci_pdu)->mcs2; - rballoc = ((DCI2A_20MHz_2A_FDD_t *)dci_pdu)->rballoc; - rah = ((DCI2A_20MHz_2A_FDD_t *)dci_pdu)->rah; - rv1 = ((DCI2A_20MHz_2A_FDD_t *)dci_pdu)->rv1; - rv2 = ((DCI2A_20MHz_2A_FDD_t *)dci_pdu)->rv2; - ndi1 = ((DCI2A_20MHz_2A_FDD_t *)dci_pdu)->ndi1; - ndi2 = ((DCI2A_20MHz_2A_FDD_t *)dci_pdu)->ndi2; - harq_pid = ((DCI2A_20MHz_2A_FDD_t *)dci_pdu)->harq_pid; - tbswap = ((DCI2A_20MHz_2A_FDD_t *)dci_pdu)->tb_swap; - TPC = ((DCI2A_20MHz_2A_FDD_t *)dci_pdu)->TPC; - } - } else if (nb_antenna_ports_eNB == 4) { - if (frame_type == TDD) { - mcs1 = ((DCI2A_20MHz_4A_TDD_t *)dci_pdu)->mcs1; - mcs2 = ((DCI2A_20MHz_4A_TDD_t *)dci_pdu)->mcs2; - rballoc = ((DCI2A_20MHz_4A_TDD_t *)dci_pdu)->rballoc; - rah = ((DCI2A_20MHz_4A_TDD_t *)dci_pdu)->rah; - rv1 = ((DCI2A_20MHz_4A_TDD_t *)dci_pdu)->rv1; - rv2 = ((DCI2A_20MHz_4A_TDD_t *)dci_pdu)->rv2; - ndi1 = ((DCI2A_20MHz_4A_TDD_t *)dci_pdu)->ndi1; - ndi2 = ((DCI2A_20MHz_4A_TDD_t *)dci_pdu)->ndi2; - harq_pid = ((DCI2A_20MHz_4A_TDD_t *)dci_pdu)->harq_pid; - tbswap = ((DCI2A_20MHz_4A_TDD_t *)dci_pdu)->tb_swap; - tpmi = ((DCI2A_20MHz_4A_TDD_t *)dci_pdu)->tpmi; - TPC = ((DCI2A_20MHz_4A_TDD_t *)dci_pdu)->TPC; - } else { - mcs1 = ((DCI2A_20MHz_4A_FDD_t *)dci_pdu)->mcs1; - mcs2 = ((DCI2A_20MHz_4A_FDD_t *)dci_pdu)->mcs2; - rballoc = ((DCI2A_20MHz_4A_FDD_t *)dci_pdu)->rballoc; - rah = ((DCI2A_20MHz_4A_FDD_t *)dci_pdu)->rah; - rv1 = ((DCI2A_20MHz_4A_FDD_t *)dci_pdu)->rv1; - rv2 = ((DCI2A_20MHz_4A_FDD_t *)dci_pdu)->rv2; - ndi1 = ((DCI2A_20MHz_4A_FDD_t *)dci_pdu)->ndi1; - ndi2 = ((DCI2A_20MHz_4A_FDD_t *)dci_pdu)->ndi2; - harq_pid = ((DCI2A_20MHz_4A_FDD_t *)dci_pdu)->harq_pid; - tbswap = ((DCI2A_20MHz_4A_FDD_t *)dci_pdu)->tb_swap; - tpmi = ((DCI2A_20MHz_4A_FDD_t *)dci_pdu)->tpmi; - TPC = ((DCI2A_20MHz_4A_FDD_t *)dci_pdu)->TPC; - } - } - - break; - } - - pdci_info_extarcted->mcs1 = mcs1; - pdci_info_extarcted->mcs2 = mcs2; - pdci_info_extarcted->rballoc = rballoc; - pdci_info_extarcted->rah = rah; - pdci_info_extarcted->rv1 = rv1; - pdci_info_extarcted->rv2 = rv2; - pdci_info_extarcted->ndi1 = ndi1; - pdci_info_extarcted->ndi2 = ndi2; - pdci_info_extarcted->harq_pid = harq_pid; - pdci_info_extarcted->tb_swap = tbswap; - pdci_info_extarcted->TPC = TPC; - pdci_info_extarcted->tpmi = tpmi; -} - -int check_dci_format1_1a_coherency(DCI_format_t dci_format, - uint8_t N_RB_DL, - uint16_t rnti, - uint16_t tc_rnti, - uint16_t si_rnti, - uint16_t ra_rnti, - uint16_t p_rnti, - uint32_t frame, - uint8_t subframe, - DCI_INFO_EXTRACTED_t *pdci_info_extarcted, - LTE_DL_UE_HARQ_t *pdlsch0_harq) -{ - uint8_t harq_pid = pdci_info_extarcted->harq_pid; - uint32_t rballoc = pdci_info_extarcted->rballoc; - uint8_t mcs1 = pdci_info_extarcted->mcs1; - uint8_t TPC = pdci_info_extarcted->TPC; - uint8_t rah = pdci_info_extarcted->rah; -#ifdef DEBUG_DCI - uint8_t rv1 = pdci_info_extarcted->rv1; - uint8_t ndi1 = pdci_info_extarcted->ndi1; -#endif - - uint8_t NPRB = 0; - long long int RIV_max = 0; - -#ifdef DEBUG_DCI - LOG_I(PHY,"[DCI-FORMAT-1-1A] AbsSubframe %d.%d dci_format %d\n", frame, subframe, dci_format); - LOG_I(PHY,"[DCI-FORMAT-1-1A] rnti %x\n", rnti); - LOG_I(PHY,"[DCI-FORMAT-1-1A] harq_pid %d\n", harq_pid); - LOG_I(PHY,"[DCI-FORMAT-1-1A] rah %d\n", rah); - LOG_I(PHY,"[DCI-FORMAT-1-1A] rballoc %x\n", rballoc); - LOG_I(PHY,"[DCI-FORMAT-1-1A] mcs1 %d\n", mcs1); - LOG_I(PHY,"[DCI-FORMAT-1-1A] rv1 %d\n", rv1); - LOG_I(PHY,"[DCI-FORMAT-1-1A] ndi1 %d\n", ndi1); - LOG_I(PHY,"[DCI-FORMAT-1-1A] TPC %d\n", TPC); -#endif - - - // I- check dci content minimum coherency - if( ((rnti==si_rnti) || (rnti==p_rnti) || (rnti==ra_rnti)) && harq_pid > 0) - { - return(0); - } - - if(harq_pid>=8) - { - LOG_I(PHY,"bad harq id \n"); - return(0); - } - - if(dci_format == format1 && ((rnti==si_rnti) || (rnti==p_rnti) || (rnti==ra_rnti)) ) - { - LOG_I(PHY,"bad dci format \n"); - return(0); - } - - - if( mcs1 > 28) - { - if(pdlsch0_harq->round == 0) - { - LOG_I(PHY,"bad dci mcs + round \n"); - return(0); - } - - if((rnti==si_rnti) || (rnti==p_rnti) || (rnti==ra_rnti)) - { - LOG_I(PHY,"bad dci mcs + rnti \n"); - return(0); - } - } - - if ((rnti==si_rnti) || (rnti==p_rnti) || (rnti==ra_rnti)) - { - NPRB = (TPC&1) + 2; - switch (N_RB_DL) { - case 6: - RIV_max = RIV_max6; - break; - case 25: - RIV_max = RIV_max25; - break; - case 50: - RIV_max = RIV_max50; - break; - case 100: - RIV_max = RIV_max100; - break; - } - } - else - { - switch (N_RB_DL) { - case 6: - NPRB = RIV2nb_rb_LUT6[rballoc];//NPRB; - if(rah) - RIV_max = RIV_max6; - else - RIV_max = 0x3F; - break; - case 25: - NPRB = RIV2nb_rb_LUT25[rballoc];//NPRB; - if(rah) - RIV_max = RIV_max25; - else - RIV_max = 0x1FFF; - break; - case 50: - NPRB = RIV2nb_rb_LUT50[rballoc];//NPRB; - if(rah) - RIV_max = RIV_max50; - else - RIV_max = 0x1FFFF; - break; - case 100: - NPRB = RIV2nb_rb_LUT100[rballoc];//NPRB; - if(rah) - RIV_max = RIV_max100; - else - RIV_max = 0x1FFFFFF; - break; - } - } - - - if(dci_format == format1) - { - NPRB = conv_nprb(rah, rballoc, N_RB_DL); - } - - - if(rballoc > RIV_max) - { - LOG_I(PHY,"bad dci rballoc rballoc %d RIV_max %lld \n",rballoc, RIV_max); - // DCI false detection - return(0); - } - - if(NPRB == 0) - { - // DCI false detection - LOG_I(PHY,"bad NPRB = 0 \n"); - return(0); - } - - // this a retransmission - if(pdlsch0_harq->round>0) - { - // compare old TBS to new TBS - if((mcs1<29) && (pdlsch0_harq->TBS != TBStable[get_I_TBS(mcs1)][NPRB-1])) - { - // this is an eNB issue - // retransmisison but old and new TBS are different !!! - // work around, consider it as a new transmission - LOG_E(PHY,"Format1A Retransmission but TBS are different: consider it as new transmission !!! \n"); - pdlsch0_harq->round = 0; - //return(0); // ?? to cross check - } - } - - return(1); -} - -int check_dci_format1c_coherency(uint8_t N_RB_DL, - DCI_INFO_EXTRACTED_t *pdci_info_extarcted, - uint16_t rnti, - uint16_t si_rnti, - uint16_t ra_rnti, - uint16_t p_rnti, - LTE_DL_UE_HARQ_t *pdlsch0_harq) -{ - uint32_t rballoc = pdci_info_extarcted->rballoc; - - uint8_t NPRB = 0; - uint32_t RIV_max = 0; - - // I- check dci content minimum coherency - - if((rnti!=si_rnti) && (rnti!=p_rnti) && (rnti!=ra_rnti)) - return(0); - - switch (N_RB_DL) { - case 6: - NPRB = RIV2nb_rb_LUT6[rballoc];//NPRB; - RIV_max = RIV_max6; break; - case 25: - NPRB = RIV2nb_rb_LUT25[rballoc];//NPRB; - RIV_max = RIV_max25; + + case 25: + + if (frame_type == TDD) { + vrb_type = ((DCI1A_5MHz_TDD_1_6_t *) dci_pdu)->vrb_type; + mcs = ((DCI1A_5MHz_TDD_1_6_t *) dci_pdu)->mcs; + rballoc = ((DCI1A_5MHz_TDD_1_6_t *) dci_pdu)->rballoc; + rv = ((DCI1A_5MHz_TDD_1_6_t *) dci_pdu)->rv; + ndi = ((DCI1A_5MHz_TDD_1_6_t *) dci_pdu)->ndi; + TPC = ((DCI1A_5MHz_TDD_1_6_t *) dci_pdu)->TPC; + harq_pid = ((DCI1A_5MHz_TDD_1_6_t *) dci_pdu)->harq_pid; + dai = ((DCI1A_5MHz_TDD_1_6_t *) dci_pdu)->dai; + //printf("TDD 1A: mcs %d, rballoc %x,rv %d, TPC %d\n",mcs,rballoc,rv,TPC); + } else { + vrb_type = ((DCI1A_5MHz_FDD_t *) dci_pdu)->vrb_type; + mcs = ((DCI1A_5MHz_FDD_t *) dci_pdu)->mcs; + rballoc = ((DCI1A_5MHz_FDD_t *) dci_pdu)->rballoc; + rv = ((DCI1A_5MHz_FDD_t *) dci_pdu)->rv; + ndi = ((DCI1A_5MHz_FDD_t *) dci_pdu)->ndi; + TPC = ((DCI1A_5MHz_FDD_t *) dci_pdu)->TPC; + harq_pid = ((DCI1A_5MHz_FDD_t *) dci_pdu)->harq_pid; + //printf("FDD 1A: mcs %d, rballoc %x,rv %d, TPC %d\n",mcs,rballoc,rv,TPC); + } + break; - case 50: - NPRB = RIV2nb_rb_LUT50[rballoc];//NPRB; - RIV_max = RIV_max50; + + case 50: + if (frame_type == TDD) { + vrb_type = ((DCI1A_10MHz_TDD_1_6_t *) dci_pdu)->vrb_type; + mcs = ((DCI1A_10MHz_TDD_1_6_t *) dci_pdu)->mcs; + rballoc = ((DCI1A_10MHz_TDD_1_6_t *) dci_pdu)->rballoc; + rv = ((DCI1A_10MHz_TDD_1_6_t *) dci_pdu)->rv; + ndi = ((DCI1A_10MHz_TDD_1_6_t *) dci_pdu)->ndi; + TPC = ((DCI1A_10MHz_TDD_1_6_t *) dci_pdu)->TPC; + harq_pid = ((DCI1A_10MHz_TDD_1_6_t *) dci_pdu)->harq_pid; + dai = ((DCI1A_10MHz_TDD_1_6_t *) dci_pdu)->dai; + // printf("TDD 1A: mcs %d, rballoc %x,rv %d, TPC %d\n",mcs,rballoc,rv,TPC); + } else { + vrb_type = ((DCI1A_10MHz_FDD_t *) dci_pdu)->vrb_type; + mcs = ((DCI1A_10MHz_FDD_t *) dci_pdu)->mcs; + rballoc = ((DCI1A_10MHz_FDD_t *) dci_pdu)->rballoc; + rv = ((DCI1A_10MHz_FDD_t *) dci_pdu)->rv; + ndi = ((DCI1A_10MHz_FDD_t *) dci_pdu)->ndi; + TPC = ((DCI1A_10MHz_FDD_t *) dci_pdu)->TPC; + harq_pid = ((DCI1A_10MHz_FDD_t *) dci_pdu)->harq_pid; + //printf("FDD 1A: mcs %d, vrb_type %d, rballoc %x,ndi %d, rv %d, TPC %d\n",mcs,vrb_type,rballoc,ndi,rv,TPC); + } break; - case 100: - NPRB = RIV2nb_rb_LUT100[rballoc];//NPRB; - RIV_max = RIV_max100; + + case 100: + if (frame_type == TDD) { + vrb_type = ((DCI1A_20MHz_TDD_1_6_t *) dci_pdu)->vrb_type; + mcs = ((DCI1A_20MHz_TDD_1_6_t *) dci_pdu)->mcs; + rballoc = ((DCI1A_20MHz_TDD_1_6_t *) dci_pdu)->rballoc; + rv = ((DCI1A_20MHz_TDD_1_6_t *) dci_pdu)->rv; + ndi = ((DCI1A_20MHz_TDD_1_6_t *) dci_pdu)->ndi; + TPC = ((DCI1A_20MHz_TDD_1_6_t *) dci_pdu)->TPC; + harq_pid = ((DCI1A_20MHz_TDD_1_6_t *) dci_pdu)->harq_pid; + dai = ((DCI1A_20MHz_TDD_1_6_t *) dci_pdu)->dai; + // printf("TDD 1A: mcs %d, rballoc %x,rv %d, TPC %d\n",mcs,rballoc,rv,TPC); + } else { + vrb_type = ((DCI1A_20MHz_FDD_t *) dci_pdu)->vrb_type; + mcs = ((DCI1A_20MHz_FDD_t *) dci_pdu)->mcs; + rballoc = ((DCI1A_20MHz_FDD_t *) dci_pdu)->rballoc; + rv = ((DCI1A_20MHz_FDD_t *) dci_pdu)->rv; + ndi = ((DCI1A_20MHz_FDD_t *) dci_pdu)->ndi; + TPC = ((DCI1A_20MHz_FDD_t *) dci_pdu)->TPC; + harq_pid = ((DCI1A_20MHz_FDD_t *) dci_pdu)->harq_pid; + //printf("FDD 1A: mcs %d, rballoc %x,rv %d, TPC %d\n",mcs,rballoc,rv,TPC); + } break; - } + } - if(rballoc > RIV_max) - { - // DCI false detection - return(0); - } - - if(NPRB == 0) - { - // DCI false detection - return(0); - } - - return(1); + pdci_info_extarcted->vrb_type = vrb_type; + pdci_info_extarcted->mcs1 = mcs; + pdci_info_extarcted->rballoc = rballoc; + pdci_info_extarcted->rv1 = rv; + pdci_info_extarcted->ndi1 = ndi; + pdci_info_extarcted->TPC = TPC; + pdci_info_extarcted->harq_pid = harq_pid; + pdci_info_extarcted->dai = dai; } -int check_dci_format2_2a_coherency(DCI_format_t dci_format, - uint8_t N_RB_DL, - DCI_INFO_EXTRACTED_t *pdci_info_extarcted, - uint16_t rnti, - uint16_t si_rnti, - uint16_t ra_rnti, - uint16_t p_rnti, - LTE_DL_UE_HARQ_t *pdlsch0_harq, - LTE_DL_UE_HARQ_t *pdlsch1_harq) +void +extract_dci1C_info (uint8_t N_RB_DL, lte_frame_type_t frame_type, void *dci_pdu, DCI_INFO_EXTRACTED_t * pdci_info_extarcted) { - uint8_t rah = pdci_info_extarcted->rah; - uint8_t mcs1 = pdci_info_extarcted->mcs1; - uint8_t mcs2 = pdci_info_extarcted->mcs2; - uint8_t rv1 = pdci_info_extarcted->rv1; - uint8_t rv2 = pdci_info_extarcted->rv2; - uint8_t harq_pid = pdci_info_extarcted->harq_pid; - uint32_t rballoc = pdci_info_extarcted->rballoc; -#ifdef DEBUG_DCI - uint8_t ndi1 = pdci_info_extarcted->ndi1; - uint8_t ndi2 = pdci_info_extarcted->ndi2; -#endif + uint32_t rballoc = 0; + uint8_t mcs = 0; - uint8_t NPRB = 0; - long long RIV_max = 0; + switch (N_RB_DL) { + case 6: + mcs = ((DCI1C_5MHz_t *) dci_pdu)->mcs; + rballoc = conv_1C_RIV (((DCI1C_5MHz_t *) dci_pdu)->rballoc, 6); -#ifdef DEBUG_DCI - LOG_I(PHY, "extarcted dci - dci_format %d \n", dci_format); - LOG_I(PHY, "extarcted dci - rnti %d \n", rnti); - LOG_I(PHY, "extarcted dci - rah %d \n", rah); - LOG_I(PHY, "extarcted dci - mcs1 %d \n", mcs1); - LOG_I(PHY, "extarcted dci - mcs2 %d \n", mcs2); - LOG_I(PHY, "extarcted dci - rv1 %d \n", rv1); - LOG_I(PHY, "extarcted dci - rv2 %d \n", rv2); - //LOG_I(PHY, "extarcted dci - ndi1 %d \n", ndi1); - //LOG_I(PHY, "extarcted dci - ndi2 %d \n", ndi2); - LOG_I(PHY, "extarcted dci - rballoc %x \n", rballoc); - LOG_I(PHY, "extarcted dci - harq pid %d \n", harq_pid); - LOG_I(PHY, "extarcted dci - round0 %d \n", pdlsch0_harq->round); - LOG_I(PHY, "extarcted dci - round1 %d \n", pdlsch1_harq->round); -#endif + break; - // I- check dci content minimum coherency - if(harq_pid>=8) - { - LOG_I(PHY,"bad harq pid\n"); - return(0); - } + case 25: + mcs = ((DCI1C_5MHz_t *) dci_pdu)->mcs; + rballoc = conv_1C_RIV (((DCI1C_5MHz_t *) dci_pdu)->rballoc, 6); - if( (rnti==si_rnti) || (rnti==p_rnti) || (rnti==ra_rnti) ) - { - LOG_I(PHY,"bad rnti\n"); - return(0); - } + break; + case 50: + mcs = ((DCI1C_10MHz_t *) dci_pdu)->mcs; + rballoc = conv_1C_RIV (((DCI1C_10MHz_t *) dci_pdu)->rballoc, 6); - if( mcs1 > 28) - { - if(pdlsch0_harq->round == 0) - { - LOG_I(PHY,"bad mcs1\n"); - return(0); - } - } + break; - if( mcs2 > 28) - { - if(pdlsch1_harq->round == 0) - { - LOG_I(PHY,"bad mcs2\n"); - return(0); - } - } + case 100: + mcs = ((DCI1C_20MHz_t *) dci_pdu)->mcs; + rballoc = conv_1C_RIV (((DCI1C_20MHz_t *) dci_pdu)->rballoc, 6); + break; + default: + AssertFatal (0, "Format 1C: Unknown N_RB_DL %d\n", N_RB_DL); + break; + } - if((pdlsch0_harq->round == 0) && (rv1 > 0) && (mcs1 != 0)) - { - // DCI false detection - LOG_I(PHY,"bad rv1\n"); - return(0); - } - - if((pdlsch1_harq->round == 0) && (rv2 > 0) && (mcs2 != 0)) - { - // DCI false detection - LOG_I(PHY,"bad rv2\n"); - return(0); - } - - - switch (N_RB_DL) { - case 6: - if (rah == 0) - { - //RBG = 1; - RIV_max = 0x3F; - } - else - { - RIV_max = RIV_max6; - } - break; - case 25: - if (rah == 0) - { - //RBG = 2; - RIV_max = 0x1FFF; - } - else - { - RIV_max = RIV_max25; - } - break; - case 50: - if (rah == 0) - { - //RBG = 3; - RIV_max = 0x1FFFF; - } - else - { - RIV_max = RIV_max50; - } - break; - case 100: - if (rah == 0) - { - //RBG = 4; - RIV_max = 0x1FFFFFF; - } - else - { - RIV_max = RIV_max100; - } - break; - } - - NPRB = conv_nprb(rah, - rballoc, - N_RB_DL); - - - - if( (rballoc > RIV_max) && (rah == 1) ) - { - // DCI false detection - LOG_I(PHY,"bad rballoc %d RIV_max %lld\n", rballoc, RIV_max); - return(0); - } - - if(NPRB == 0) - { - // DCI false detection - LOG_I(PHY,"bad NPRB\n"); - return(0); - } - - return(1); + pdci_info_extarcted->mcs1 = mcs; + pdci_info_extarcted->rballoc = rballoc; } -void compute_llr_offset(LTE_DL_FRAME_PARMS *frame_parms, - LTE_UE_PDCCH *pdcch_vars, - LTE_UE_PDSCH *pdsch_vars, - LTE_DL_UE_HARQ_t *dlsch0_harq, - uint8_t nb_rb_alloc, - uint8_t subframe) -{ - uint32_t pbch_pss_sss_re; - uint32_t crs_re; - uint32_t granted_re; - uint32_t data_re; - uint32_t llr_offset; - uint8_t symbol; - uint8_t symbol_mod; - - pdsch_vars->llr_offset[pdcch_vars->num_pdcch_symbols] = 0; - - //LOG_I(PHY,"compute_llr_offset: nb RB %d - Qm %d \n", nb_rb_alloc, dlsch0_harq->Qm); - - //dlsch0_harq->rb_alloc_even; - //dlsch0_harq->rb_alloc_odd; - - for(symbol=pdcch_vars->num_pdcch_symbols; symbolsymbols_per_tti; symbol++) - { - symbol_mod = (symbol >= (7-frame_parms->Ncp))? (symbol-(7-frame_parms->Ncp)) : symbol; - if((symbol_mod == 0) || symbol_mod == (4-frame_parms->Ncp)) - { - if (frame_parms->nb_antennas_tx == 2) - crs_re = 4; - else - crs_re = 2; - } - else - { - crs_re = 0; - } - - granted_re = nb_rb_alloc * (12-crs_re); - pbch_pss_sss_re = adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,dlsch0_harq->Qm,subframe,symbol); - pbch_pss_sss_re = (double)pbch_pss_sss_re * ((double)(12-crs_re)/12); - data_re = granted_re - pbch_pss_sss_re; - llr_offset = data_re * dlsch0_harq->Qm * 2; - - pdsch_vars->llr_length[symbol] = data_re; - if(symbol < (frame_parms->symbols_per_tti-1)) - pdsch_vars->llr_offset[symbol+1] = pdsch_vars->llr_offset[symbol] + llr_offset; - - //LOG_I(PHY,"Granted Re subframe %d / symbol %d => %d (%d RBs)\n", subframe, symbol_mod, granted_re,dlsch0_harq->nb_rb); - //LOG_I(PHY,"Pbch/PSS/SSS Re subframe %d / symbol %d => %d \n", subframe, symbol_mod, pbch_pss_sss_re); - //LOG_I(PHY,"CRS Re Per PRB subframe %d / symbol %d => %d \n", subframe, symbol_mod, crs_re); - //LOG_I(PHY,"Data Re subframe %d / symbol %d => %d \n", subframe, symbol_mod, data_re); - - - - //LOG_I(PHY,"Data Re subframe %d-symbol %d => llr length %d, llr offset %d \n", subframe, symbol, - // pdsch_vars->llr_length[symbol], pdsch_vars->llr_offset[symbol]); - } -} -void prepare_dl_decoding_format1_1A(DCI_format_t dci_format, - uint8_t N_RB_DL, - DCI_INFO_EXTRACTED_t *pdci_info_extarcted, - LTE_DL_FRAME_PARMS *frame_parms, - LTE_UE_PDCCH *pdcch_vars, - LTE_UE_PDSCH *pdsch_vars, - uint8_t subframe, - uint16_t rnti, - uint16_t tc_rnti, - uint16_t si_rnti, - uint16_t ra_rnti, - uint16_t p_rnti, - LTE_DL_UE_HARQ_t *pdlsch0_harq, - LTE_UE_DLSCH_t *pdlsch0) +void +extract_dci1_info (uint8_t N_RB_DL, lte_frame_type_t frame_type, void *dci_pdu, DCI_INFO_EXTRACTED_t * pdci_info_extarcted) { - uint8_t harq_pid = pdci_info_extarcted->harq_pid; - uint8_t vrb_type = pdci_info_extarcted->vrb_type; - uint32_t rballoc = pdci_info_extarcted->rballoc; - uint8_t mcs1 = pdci_info_extarcted->mcs1; - uint8_t rv1 = pdci_info_extarcted->rv1; - uint8_t ndi1 = pdci_info_extarcted->ndi1; - uint8_t TPC = pdci_info_extarcted->TPC; - uint8_t rah = pdci_info_extarcted->rah; - uint8_t dai = pdci_info_extarcted->dai; + uint32_t rballoc = 0; + uint8_t mcs = 0; + uint8_t rah = 0; + uint8_t rv = 0; + uint8_t TPC = 0; + uint8_t ndi = 0; + uint8_t harq_pid = 0; - - uint8_t NPRB = 0; - uint8_t NPRB4TBS = 0; - uint8_t nb_rb_alloc = 0; - - if(dci_format == format1A) - { - switch (N_RB_DL) { - case 6: - NPRB = RIV2nb_rb_LUT6[rballoc]; - break; - case 25: - NPRB = RIV2nb_rb_LUT25[rballoc]; - break; - case 50: - NPRB = RIV2nb_rb_LUT50[rballoc]; - break; - case 100: - NPRB = RIV2nb_rb_LUT100[rballoc]; - break; - } - if ((rnti==si_rnti) || (rnti==p_rnti) || (rnti==ra_rnti)) - { - NPRB4TBS = (TPC&1) + 2; - } - else - { - NPRB4TBS = NPRB; - /* - switch (N_RB_DL) { - case 6: - NPRB = RIV2nb_rb_LUT6[rballoc];//NPRB; - break; - case 25: - NPRB = RIV2nb_rb_LUT25[rballoc];//NPRB; - break; - case 50: - NPRB = RIV2nb_rb_LUT50[rballoc];//NPRB; - break; - case 100: - NPRB = RIV2nb_rb_LUT100[rballoc];//NPRB; - break; - } - - */ - nb_rb_alloc = NPRB; - } - } - else // format1 - { - NPRB = conv_nprb(rah, rballoc, N_RB_DL); - NPRB4TBS=NPRB; - nb_rb_alloc = NPRB; + switch (N_RB_DL) { + case 6: + if (frame_type == TDD) { + mcs = ((DCI1_1_5MHz_TDD_t *) dci_pdu)->mcs; + rballoc = ((DCI1_1_5MHz_TDD_t *) dci_pdu)->rballoc; + rah = ((DCI1_1_5MHz_TDD_t *) dci_pdu)->rah; + rv = ((DCI1_1_5MHz_TDD_t *) dci_pdu)->rv; + TPC = ((DCI1_1_5MHz_TDD_t *) dci_pdu)->TPC; + ndi = ((DCI1_1_5MHz_TDD_t *) dci_pdu)->ndi; + harq_pid = ((DCI1_1_5MHz_TDD_t *) dci_pdu)->harq_pid; + } else { + mcs = ((DCI1_1_5MHz_FDD_t *) dci_pdu)->mcs; + rah = ((DCI1_1_5MHz_FDD_t *) dci_pdu)->rah; + rballoc = ((DCI1_1_5MHz_FDD_t *) dci_pdu)->rballoc; + rv = ((DCI1_1_5MHz_FDD_t *) dci_pdu)->rv; + TPC = ((DCI1_1_5MHz_FDD_t *) dci_pdu)->TPC; + ndi = ((DCI1_1_5MHz_FDD_t *) dci_pdu)->ndi; + harq_pid = ((DCI1_1_5MHz_FDD_t *) dci_pdu)->harq_pid; } - pdlsch0->current_harq_pid = harq_pid; - pdlsch0->active = 1; - pdlsch0->rnti = rnti; - if(dci_format == format1A) - pdlsch0->harq_ack[subframe].vDAI_DL = dai+1; + break; - if ((rnti==si_rnti) || (rnti==p_rnti) || (rnti==ra_rnti)) - { - pdlsch0_harq->round = 0; - pdlsch0_harq->status = ACTIVE; - } - else //CRNTI - { - if (rnti == tc_rnti) { - //fix for standalone Contention Resolution Id - pdlsch0_harq->DCINdi = (uint8_t)-1; - LOG_D(PHY,"UE (%x/%d): Format1A DCI: C-RNTI is temporary. Set NDI = %d and to be ignored\n", - rnti,harq_pid,pdlsch0_harq->DCINdi); - } - - // NDI has been toggled or this is the first transmission - if ((ndi1!=pdlsch0_harq->DCINdi) || (pdlsch0_harq->first_tx==1)) - { - pdlsch0_harq->round = 0; - pdlsch0_harq->first_tx = 0; - pdlsch0_harq->status = ACTIVE; - - }else if (rv1 != 0 ) - //NDI has not been toggled but rv was increased by eNB: retransmission - { - if (pdlsch0_harq->status == SCH_IDLE) - //packet was actually decoded in previous transmission (ACK was missed by eNB) - //However, the round is not a good check as it might have been decoded in a retransmission prior to this one. - { - LOG_D(PHY,"skip pdsch decoding and report ack\n"); - // skip pdsch decoding and report ack - //pdlsch0_harq->status = SCH_IDLE; - pdlsch0->active = 0; - pdlsch0->harq_ack[subframe].ack = 1; - pdlsch0->harq_ack[subframe].harq_id = harq_pid; - pdlsch0->harq_ack[subframe].send_harq_status = 1; - - //pdlsch0_harq->first_tx = 0; - } - else //normal retransmission - { - // nothing special to do - } - } - else - { - pdlsch0_harq->status = ACTIVE; - } + case 25: + if (frame_type == TDD) { + mcs = ((DCI1_5MHz_TDD_t *) dci_pdu)->mcs; + rballoc = ((DCI1_5MHz_TDD_t *) dci_pdu)->rballoc; + rah = ((DCI1_5MHz_TDD_t *) dci_pdu)->rah; + rv = ((DCI1_5MHz_TDD_t *) dci_pdu)->rv; + TPC = ((DCI1_5MHz_TDD_t *) dci_pdu)->TPC; + ndi = ((DCI1_5MHz_TDD_t *) dci_pdu)->ndi; + harq_pid = ((DCI1_5MHz_TDD_t *) dci_pdu)->harq_pid; + } else { + mcs = ((DCI1_5MHz_FDD_t *) dci_pdu)->mcs; + rah = ((DCI1_5MHz_FDD_t *) dci_pdu)->rah; + rballoc = ((DCI1_5MHz_FDD_t *) dci_pdu)->rballoc; + rv = ((DCI1_5MHz_FDD_t *) dci_pdu)->rv; + TPC = ((DCI1_5MHz_FDD_t *) dci_pdu)->TPC; + ndi = ((DCI1_5MHz_FDD_t *) dci_pdu)->ndi; + harq_pid = ((DCI1_5MHz_FDD_t *) dci_pdu)->harq_pid; } - pdlsch0_harq->DCINdi = ndi1; - pdlsch0_harq->mcs = mcs1; - pdlsch0_harq->rvidx = rv1; - pdlsch0_harq->nb_rb = NPRB; + break; - pdlsch0_harq->codeword = 0; - pdlsch0_harq->Nl = 1; - pdlsch0_harq->mimo_mode = frame_parms->nb_antenna_ports_eNB == 1 ?SISO : ALAMOUTI; - pdlsch0_harq->dl_power_off = 1; //no power offset - pdlsch0_harq->delta_PUCCH = delta_PUCCH_lut[TPC &3]; - - // compute resource allocation - if(dci_format == format1A) - { - switch (N_RB_DL) { - case 6: - if (vrb_type == LOCALIZED) { - pdlsch0_harq->rb_alloc_even[0] = localRIV2alloc_LUT6[rballoc]; - pdlsch0_harq->rb_alloc_odd[0] = localRIV2alloc_LUT6[rballoc]; - } - else { - pdlsch0_harq->rb_alloc_even[0] = distRIV2alloc_even_LUT6[rballoc]; - pdlsch0_harq->rb_alloc_odd[0] = distRIV2alloc_odd_LUT6[rballoc]; - } - break; - - case 25: - if (vrb_type == LOCALIZED) { - pdlsch0_harq->rb_alloc_even[0] = localRIV2alloc_LUT25[rballoc]; - pdlsch0_harq->rb_alloc_odd[0] = localRIV2alloc_LUT25[rballoc]; - } - else { - pdlsch0_harq->rb_alloc_even[0] = distRIV2alloc_even_LUT25[rballoc]; - pdlsch0_harq->rb_alloc_odd[0] = distRIV2alloc_odd_LUT25[rballoc]; - } - break; - - case 50: - if (vrb_type == LOCALIZED) { - pdlsch0_harq->rb_alloc_even[0] = localRIV2alloc_LUT50_0[rballoc]; - pdlsch0_harq->rb_alloc_even[1] = localRIV2alloc_LUT50_1[rballoc]; - pdlsch0_harq->rb_alloc_odd[0] = localRIV2alloc_LUT50_0[rballoc]; - pdlsch0_harq->rb_alloc_odd[1] = localRIV2alloc_LUT50_1[rballoc]; - printf("rballoc: %08x.%08x\n",pdlsch0_harq->rb_alloc_even[0],pdlsch0_harq->rb_alloc_even[1]); - } else { // DISTRIBUTED - if ((rballoc&(1<<10)) == 0) { - rballoc = rballoc&(~(1<<10)); - pdlsch0_harq->rb_alloc_even[0] = distRIV2alloc_gap0_even_LUT50_0[rballoc]; - pdlsch0_harq->rb_alloc_even[1] = distRIV2alloc_gap0_even_LUT50_1[rballoc]; - pdlsch0_harq->rb_alloc_odd[0] = distRIV2alloc_gap0_odd_LUT50_0[rballoc]; - pdlsch0_harq->rb_alloc_odd[1] = distRIV2alloc_gap0_odd_LUT50_1[rballoc]; - } - else { - rballoc = rballoc&(~(1<<10)); - pdlsch0_harq->rb_alloc_even[0] = distRIV2alloc_gap0_even_LUT50_0[rballoc]; - pdlsch0_harq->rb_alloc_even[1] = distRIV2alloc_gap0_even_LUT50_1[rballoc]; - pdlsch0_harq->rb_alloc_odd[0] = distRIV2alloc_gap0_odd_LUT50_0[rballoc]; - pdlsch0_harq->rb_alloc_odd[1] = distRIV2alloc_gap0_odd_LUT50_1[rballoc]; - } - } - break; - - case 100: - if (vrb_type == LOCALIZED) { - pdlsch0_harq->rb_alloc_even[0] = localRIV2alloc_LUT100_0[rballoc]; - pdlsch0_harq->rb_alloc_even[1] = localRIV2alloc_LUT100_1[rballoc]; - pdlsch0_harq->rb_alloc_even[2] = localRIV2alloc_LUT100_2[rballoc]; - pdlsch0_harq->rb_alloc_even[3] = localRIV2alloc_LUT100_3[rballoc]; - pdlsch0_harq->rb_alloc_odd[0] = localRIV2alloc_LUT100_0[rballoc]; - pdlsch0_harq->rb_alloc_odd[1] = localRIV2alloc_LUT100_1[rballoc]; - pdlsch0_harq->rb_alloc_odd[2] = localRIV2alloc_LUT100_2[rballoc]; - pdlsch0_harq->rb_alloc_odd[3] = localRIV2alloc_LUT100_3[rballoc]; - } else { - if ((rballoc&(1<<10)) == 0) { //Gap 1 - rballoc = rballoc&(~(1<<12)); - pdlsch0_harq->rb_alloc_even[0] = distRIV2alloc_gap0_even_LUT100_0[rballoc]; - pdlsch0_harq->rb_alloc_even[1] = distRIV2alloc_gap0_even_LUT100_1[rballoc]; - pdlsch0_harq->rb_alloc_even[2] = distRIV2alloc_gap0_even_LUT100_2[rballoc]; - pdlsch0_harq->rb_alloc_even[3] = distRIV2alloc_gap0_even_LUT100_3[rballoc]; - pdlsch0_harq->rb_alloc_odd[0] = distRIV2alloc_gap0_odd_LUT100_0[rballoc]; - pdlsch0_harq->rb_alloc_odd[1] = distRIV2alloc_gap0_odd_LUT100_1[rballoc]; - pdlsch0_harq->rb_alloc_odd[2] = distRIV2alloc_gap0_odd_LUT100_2[rballoc]; - pdlsch0_harq->rb_alloc_odd[3] = distRIV2alloc_gap0_odd_LUT100_3[rballoc]; - } - else { //Gap 2 - rballoc = rballoc&(~(1<<12)); - pdlsch0_harq->rb_alloc_even[0] = distRIV2alloc_gap1_even_LUT100_0[rballoc]; - pdlsch0_harq->rb_alloc_even[1] = distRIV2alloc_gap1_even_LUT100_1[rballoc]; - pdlsch0_harq->rb_alloc_even[2] = distRIV2alloc_gap1_even_LUT100_2[rballoc]; - pdlsch0_harq->rb_alloc_even[3] = distRIV2alloc_gap1_even_LUT100_3[rballoc]; - pdlsch0_harq->rb_alloc_odd[0] = distRIV2alloc_gap1_odd_LUT100_0[rballoc]; - pdlsch0_harq->rb_alloc_odd[1] = distRIV2alloc_gap1_odd_LUT100_1[rballoc]; - pdlsch0_harq->rb_alloc_odd[2] = distRIV2alloc_gap1_odd_LUT100_2[rballoc]; - pdlsch0_harq->rb_alloc_odd[3] = distRIV2alloc_gap1_odd_LUT100_3[rballoc]; - } - } - break; - } - } - else // format1 - { - conv_rballoc(rah,rballoc,frame_parms->N_RB_DL,pdlsch0_harq->rb_alloc_even); - pdlsch0_harq->rb_alloc_odd[0]= pdlsch0_harq->rb_alloc_even[0]; - pdlsch0_harq->rb_alloc_odd[1]= pdlsch0_harq->rb_alloc_even[1]; - pdlsch0_harq->rb_alloc_odd[2]= pdlsch0_harq->rb_alloc_even[2]; - pdlsch0_harq->rb_alloc_odd[3]= pdlsch0_harq->rb_alloc_even[3]; - } - if ((rnti==si_rnti) || (rnti==p_rnti) || (rnti==ra_rnti)) - { - pdlsch0_harq->TBS = TBStable[mcs1][NPRB4TBS-1]; - pdlsch0_harq->Qm = 2; - } - else - { - if(mcs1 < 29) - { - pdlsch0_harq->TBS = TBStable[get_I_TBS(mcs1)][NPRB4TBS-1]; - pdlsch0_harq->Qm = get_Qm(mcs1); - } + case 50: + if (frame_type == TDD) { + mcs = ((DCI1_10MHz_TDD_t *) dci_pdu)->mcs; + rballoc = ((DCI1_10MHz_TDD_t *) dci_pdu)->rballoc; + rah = ((DCI1_10MHz_TDD_t *) dci_pdu)->rah; + rv = ((DCI1_10MHz_TDD_t *) dci_pdu)->rv; + TPC = ((DCI1_10MHz_TDD_t *) dci_pdu)->TPC; + ndi = ((DCI1_10MHz_TDD_t *) dci_pdu)->ndi; + harq_pid = ((DCI1_10MHz_TDD_t *) dci_pdu)->harq_pid; + } else { + mcs = ((DCI1_10MHz_FDD_t *) dci_pdu)->mcs; + rah = ((DCI1_10MHz_FDD_t *) dci_pdu)->rah; + rballoc = ((DCI1_10MHz_FDD_t *) dci_pdu)->rballoc; + rv = ((DCI1_10MHz_FDD_t *) dci_pdu)->rv; + TPC = ((DCI1_10MHz_FDD_t *) dci_pdu)->TPC; + ndi = ((DCI1_10MHz_FDD_t *) dci_pdu)->ndi; + harq_pid = ((DCI1_10MHz_FDD_t *) dci_pdu)->harq_pid; } - compute_llr_offset(frame_parms, - pdcch_vars, - pdsch_vars, - pdlsch0_harq, - nb_rb_alloc, - subframe); -} + break; -void prepare_dl_decoding_format1C(uint8_t N_RB_DL, - DCI_INFO_EXTRACTED_t *pdci_info_extarcted, - LTE_DL_FRAME_PARMS *frame_parms, - LTE_UE_PDCCH *pdcch_vars, - LTE_UE_PDSCH *pdsch_vars, - uint32_t rnti, - uint32_t si_rnti, - uint32_t ra_rnti, - uint32_t p_rnti, - uint32_t frame, - uint8_t subframe, - LTE_DL_UE_HARQ_t *pdlsch0_harq, - LTE_UE_DLSCH_t *pdlsch0) -{ - - uint8_t harq_pid = pdci_info_extarcted->harq_pid; - uint32_t rballoc = pdci_info_extarcted->rballoc; - uint8_t mcs1 = pdci_info_extarcted->mcs1; - uint8_t Ngap = pdci_info_extarcted->Ngap; - - pdlsch0_harq->round = 0; - pdlsch0_harq->first_tx = 1; - pdlsch0_harq->vrb_type = DISTRIBUTED; - - if (rnti==si_rnti) { // rule from Section 5.3.1 of 36.321 - if (((frame&1) == 0) && (subframe == 5)) - pdlsch0_harq->rvidx = (((3*((frame>>1)&3))+1)>>1)&3; // SIB1 - else - pdlsch0_harq->rvidx = (((3*(subframe&3))+1)>>1)&3; // other SIBs - } - else if ((rnti==p_rnti) || (rnti==ra_rnti)) { // Section 7.1.7.3 - pdlsch0_harq->rvidx = 0; - } - - - pdlsch0_harq->Nl = 1; - pdlsch0_harq->mimo_mode = frame_parms->nb_antenna_ports_eNB == 1 ?SISO : ALAMOUTI; - pdlsch0_harq->dl_power_off = 1; //no power offset - - pdlsch0_harq->codeword = 0; - pdlsch0_harq->mcs = mcs1; - pdlsch0_harq->TBS = TBStable1C[mcs1]; - pdlsch0_harq->Qm = 2; - - - pdlsch0->current_harq_pid = harq_pid; - pdlsch0->active = 1; - pdlsch0->rnti = rnti; - - switch (N_RB_DL) { - case 6: - pdlsch0_harq->nb_rb = RIV2nb_rb_LUT6[rballoc]; - pdlsch0_harq->rb_alloc_even[0] = distRIV2alloc_even_LUT6[rballoc]; - pdlsch0_harq->rb_alloc_odd[0] = distRIV2alloc_odd_LUT6[rballoc]; - - break; - - case 25: - pdlsch0_harq->nb_rb = RIV2nb_rb_LUT25[rballoc]; - pdlsch0_harq->rb_alloc_even[0] = distRIV2alloc_even_LUT25[rballoc]; - pdlsch0_harq->rb_alloc_odd[0] = distRIV2alloc_odd_LUT25[rballoc]; - break; - - case 50: - pdlsch0_harq->nb_rb = RIV2nb_rb_LUT50[rballoc]; - if (Ngap == 0) { - pdlsch0_harq->rb_alloc_even[0] = distRIV2alloc_gap0_even_LUT50_0[rballoc]; - pdlsch0_harq->rb_alloc_odd[0] = distRIV2alloc_gap0_odd_LUT50_0[rballoc]; - pdlsch0_harq->rb_alloc_even[1] = distRIV2alloc_gap0_even_LUT50_1[rballoc]; - pdlsch0_harq->rb_alloc_odd[1] = distRIV2alloc_gap0_odd_LUT50_1[rballoc]; - } - else { - pdlsch0_harq->rb_alloc_even[0] = distRIV2alloc_gap1_even_LUT50_0[rballoc]; - pdlsch0_harq->rb_alloc_odd[0] = distRIV2alloc_gap1_odd_LUT50_0[rballoc]; - pdlsch0_harq->rb_alloc_even[1] = distRIV2alloc_gap1_even_LUT50_1[rballoc]; - pdlsch0_harq->rb_alloc_odd[1] = distRIV2alloc_gap1_odd_LUT50_1[rballoc]; - } - break; - - case 100: - pdlsch0_harq->nb_rb = RIV2nb_rb_LUT100[rballoc]; - if (Ngap==0) { - pdlsch0_harq->rb_alloc_even[0] = distRIV2alloc_gap0_even_LUT100_0[rballoc]; - pdlsch0_harq->rb_alloc_odd[0] = distRIV2alloc_gap0_odd_LUT100_0[rballoc]; - pdlsch0_harq->rb_alloc_even[1] = distRIV2alloc_gap0_even_LUT100_1[rballoc]; - pdlsch0_harq->rb_alloc_odd[1] = distRIV2alloc_gap0_odd_LUT100_1[rballoc]; - pdlsch0_harq->rb_alloc_even[2] = distRIV2alloc_gap0_even_LUT100_2[rballoc]; - pdlsch0_harq->rb_alloc_odd[2] = distRIV2alloc_gap0_odd_LUT100_2[rballoc]; - pdlsch0_harq->rb_alloc_even[3] = distRIV2alloc_gap0_even_LUT100_3[rballoc]; - pdlsch0_harq->rb_alloc_odd[3] = distRIV2alloc_gap0_odd_LUT100_3[rballoc]; - } - else { - pdlsch0_harq->rb_alloc_even[0] = distRIV2alloc_gap1_even_LUT100_0[rballoc]; - pdlsch0_harq->rb_alloc_odd[0] = distRIV2alloc_gap1_odd_LUT100_0[rballoc]; - pdlsch0_harq->rb_alloc_even[1] = distRIV2alloc_gap1_even_LUT100_1[rballoc]; - pdlsch0_harq->rb_alloc_odd[1] = distRIV2alloc_gap1_odd_LUT100_1[rballoc]; - pdlsch0_harq->rb_alloc_even[2] = distRIV2alloc_gap1_even_LUT100_2[rballoc]; - pdlsch0_harq->rb_alloc_odd[2] = distRIV2alloc_gap1_odd_LUT100_2[rballoc]; - pdlsch0_harq->rb_alloc_even[3] = distRIV2alloc_gap1_even_LUT100_3[rballoc]; - pdlsch0_harq->rb_alloc_odd[3] = distRIV2alloc_gap1_odd_LUT100_3[rballoc]; - } - break; - - default: - AssertFatal(0,"Format 1C: Unknown N_RB_DL %d\n",frame_parms->N_RB_DL); - break; + case 100: + if (frame_type == TDD) { + mcs = ((DCI1_20MHz_TDD_t *) dci_pdu)->mcs; + rballoc = ((DCI1_20MHz_TDD_t *) dci_pdu)->rballoc; + rah = ((DCI1_20MHz_TDD_t *) dci_pdu)->rah; + rv = ((DCI1_20MHz_TDD_t *) dci_pdu)->rv; + TPC = ((DCI1_20MHz_TDD_t *) dci_pdu)->TPC; + ndi = ((DCI1_20MHz_TDD_t *) dci_pdu)->ndi; + harq_pid = ((DCI1_20MHz_TDD_t *) dci_pdu)->harq_pid; + } else { + mcs = ((DCI1_20MHz_FDD_t *) dci_pdu)->mcs; + rah = ((DCI1_20MHz_FDD_t *) dci_pdu)->rah; + rballoc = ((DCI1_20MHz_FDD_t *) dci_pdu)->rballoc; + rv = ((DCI1_20MHz_FDD_t *) dci_pdu)->rv; + TPC = ((DCI1_20MHz_FDD_t *) dci_pdu)->TPC; + ndi = ((DCI1_20MHz_FDD_t *) dci_pdu)->ndi; + harq_pid = ((DCI1_20MHz_FDD_t *) dci_pdu)->harq_pid; } - compute_llr_offset(frame_parms, - pdcch_vars, - pdsch_vars, - pdlsch0_harq, - pdlsch0_harq->nb_rb, - subframe); + break; + } + + pdci_info_extarcted->mcs1 = mcs; + pdci_info_extarcted->rah = rah; + pdci_info_extarcted->rballoc = rballoc; + pdci_info_extarcted->rv1 = rv; + pdci_info_extarcted->TPC = TPC; + pdci_info_extarcted->ndi1 = ndi; + pdci_info_extarcted->harq_pid = harq_pid; } -void compute_precoding_info_2cw(uint8_t tpmi, uint8_t tbswap, uint16_t pmi_alloc, LTE_DL_FRAME_PARMS *frame_parms, LTE_DL_UE_HARQ_t *dlsch0_harq, LTE_DL_UE_HARQ_t *dlsch1_harq) +void +extract_dci2_info (uint8_t N_RB_DL, lte_frame_type_t frame_type, uint8_t nb_antenna_ports_eNB, void *dci_pdu, DCI_INFO_EXTRACTED_t * pdci_info_extarcted) { -switch (tpmi) { - case 0: - dlsch0_harq->mimo_mode = DUALSTREAM_UNIFORM_PRECODING1; - dlsch1_harq->mimo_mode = DUALSTREAM_UNIFORM_PRECODING1; - dlsch0_harq->pmi_alloc = pmi_extend(frame_parms,0, 1); - dlsch1_harq->pmi_alloc = pmi_extend(frame_parms,0, 1); - break; - case 1: - dlsch0_harq->mimo_mode = DUALSTREAM_UNIFORM_PRECODINGj; - dlsch1_harq->mimo_mode = DUALSTREAM_UNIFORM_PRECODINGj; - dlsch0_harq->pmi_alloc = pmi_extend(frame_parms,1, 1); - dlsch1_harq->pmi_alloc = pmi_extend(frame_parms,1, 1); - break; - case 2: // PUSCH precoding - dlsch0_harq->mimo_mode = DUALSTREAM_PUSCH_PRECODING; - dlsch1_harq->mimo_mode = DUALSTREAM_PUSCH_PRECODING; - if (tbswap==0){ - dlsch0_harq->pmi_alloc = pmi_alloc; - dlsch1_harq->pmi_alloc = pmi_alloc^0x1555; - } else { - dlsch1_harq->pmi_alloc = pmi_alloc; - dlsch0_harq->pmi_alloc = pmi_alloc^0x1555; - } -#ifdef DEBUG_HARQ - printf ("\n \n compute_precoding_info_2cw pmi_alloc_new = %d\n", dlsch0_harq->pmi_alloc); - #endif - break; - default: - break; - } -} + uint32_t rballoc = 0; + uint8_t rah = 0; + uint8_t mcs1 = 0; + uint8_t mcs2 = 0; + uint8_t rv1 = 0; + uint8_t rv2 = 0; + uint8_t ndi1 = 0; + uint8_t ndi2 = 0; + uint8_t tbswap = 0; + uint8_t tpmi = 0; + uint8_t harq_pid = 0; + uint8_t TPC = 0; -void compute_precoding_info_1cw(uint8_t tpmi, uint16_t pmi_alloc, LTE_DL_FRAME_PARMS *frame_parms, LTE_DL_UE_HARQ_t *dlsch_harq) -{ - -switch (tpmi) { - case 0 : - dlsch_harq->mimo_mode = ALAMOUTI; - break; - case 1: - dlsch_harq->mimo_mode = UNIFORM_PRECODING11; - dlsch_harq->pmi_alloc = pmi_extend(frame_parms,0, 0); - break; - case 2: - dlsch_harq->mimo_mode = UNIFORM_PRECODING1m1; - dlsch_harq->pmi_alloc = pmi_extend(frame_parms,1, 0); - break; - case 3: - dlsch_harq->mimo_mode = UNIFORM_PRECODING1j; - dlsch_harq->pmi_alloc = pmi_extend(frame_parms,2, 0); - break; - case 4: - dlsch_harq->mimo_mode = UNIFORM_PRECODING1mj; - dlsch_harq->pmi_alloc = pmi_extend(frame_parms,3, 0); - break; - case 5: - dlsch_harq->mimo_mode = PUSCH_PRECODING0; - dlsch_harq->pmi_alloc = pmi_alloc;//pmi_convert(frame_parms,dlsch0->pmi_alloc,0); - break; - case 6: - dlsch_harq->mimo_mode = PUSCH_PRECODING1; - dlsch_harq->pmi_alloc = pmi_alloc;//pmi_convert(frame_parms,dlsch0->pmi_alloc,1); - break; - } - #ifdef DEBUG_HARQ - printf ("[DCI UE] I am calling from the UE side pmi_alloc_new = %d with tpmi %d\n", dlsch_harq->pmi_alloc, tpmi); - #endif - } - -void compute_precoding_info_format2A(uint8_t tpmi, - uint8_t nb_antenna_ports_eNB, - uint8_t tb0_active, - uint8_t tb1_active, - LTE_DL_UE_HARQ_t *dlsch0_harq, - LTE_DL_UE_HARQ_t *dlsch1_harq) -{ - - dlsch0_harq->dl_power_off = 0; - dlsch1_harq->dl_power_off = 0; + switch (N_RB_DL) { + case 6: if (nb_antenna_ports_eNB == 2) { - if ((tb0_active==1) && (tb1_active==1)) { - dlsch0_harq->mimo_mode = LARGE_CDD; - dlsch1_harq->mimo_mode = LARGE_CDD; - dlsch0_harq->dl_power_off = 1; - dlsch1_harq->dl_power_off = 1; - } else { - dlsch0_harq->mimo_mode = ALAMOUTI; - dlsch1_harq->mimo_mode = ALAMOUTI; - } - } else if (nb_antenna_ports_eNB == 4) { // 4 antenna case - if ((tb0_active==1) && (tb1_active==1)) { - switch (tpmi) { - case 0: // one layer per transport block - dlsch0_harq->mimo_mode = LARGE_CDD; - dlsch1_harq->mimo_mode = LARGE_CDD; - dlsch0_harq->dl_power_off = 1; - dlsch1_harq->dl_power_off = 1; - break; - - case 1: // one-layers on TB 0, two on TB 1 - dlsch0_harq->mimo_mode = LARGE_CDD; - dlsch1_harq->mimo_mode = LARGE_CDD; - dlsch1_harq->Nl = 2; - dlsch0_harq->dl_power_off = 1; - dlsch1_harq->dl_power_off = 1; - break; - - case 2: // two-layers on TB 0, two on TB 1 - dlsch0_harq->mimo_mode = LARGE_CDD; - dlsch1_harq->mimo_mode = LARGE_CDD; - dlsch0_harq->Nl = 2; - dlsch0_harq->dl_power_off = 1; - dlsch1_harq->dl_power_off = 1; - break; - - case 3: // - LOG_E(PHY,"Illegal value (3) for TPMI in Format 2A DCI\n"); - break; - } - } else if (tb0_active == 1) { - switch (tpmi) { - case 0: // one layer per transport block - dlsch0_harq->mimo_mode = ALAMOUTI; - dlsch1_harq->mimo_mode = ALAMOUTI; - break; - - case 1: // two-layers on TB 0 - dlsch0_harq->mimo_mode = LARGE_CDD; - dlsch0_harq->Nl = 2; - dlsch0_harq->dl_power_off = 1; - break; - - case 2: // two-layers on TB 0, two on TB 1 - case 3: // - LOG_E(PHY,"Illegal value %d for TPMI in Format 2A DCI with one transport block enabled\n",tpmi); - break; - } - } else if (tb1_active == 1) { - switch (tpmi) { - case 0: // one layer per transport block - dlsch0_harq->mimo_mode = ALAMOUTI; - dlsch1_harq->mimo_mode = ALAMOUTI; - break; - - case 1: // two-layers on TB 0 - dlsch1_harq->mimo_mode = LARGE_CDD; - dlsch1_harq->Nl = 2; - dlsch0_harq->dl_power_off = 1; - break; - - case 2: // two-layers on TB 0, two on TB 1 - case 3: // - LOG_E(PHY,"Illegal value %d for TPMI in Format 2A DCI with one transport block enabled\n",tpmi); - break; - } - } + if (frame_type == TDD) { + rah = ((DCI2_5MHz_2A_TDD_t *) dci_pdu)->rah; + mcs1 = ((DCI2_5MHz_2A_TDD_t *) dci_pdu)->mcs1; + mcs2 = ((DCI2_5MHz_2A_TDD_t *) dci_pdu)->mcs2; + rballoc = ((DCI2_5MHz_2A_TDD_t *) dci_pdu)->rballoc; + rv1 = ((DCI2_5MHz_2A_TDD_t *) dci_pdu)->rv1; + rv2 = ((DCI2_5MHz_2A_TDD_t *) dci_pdu)->rv2; + harq_pid = ((DCI2_5MHz_2A_TDD_t *) dci_pdu)->harq_pid; + tbswap = ((DCI2_5MHz_2A_TDD_t *) dci_pdu)->tb_swap; + tpmi = ((DCI2_5MHz_2A_TDD_t *) dci_pdu)->tpmi; + TPC = ((DCI2_5MHz_2A_TDD_t *) dci_pdu)->TPC; + ndi1 = ((DCI2_5MHz_2A_TDD_t *) dci_pdu)->ndi1; + ndi2 = ((DCI2_5MHz_2A_TDD_t *) dci_pdu)->ndi2; + } else { + rah = ((DCI2_5MHz_2A_FDD_t *) dci_pdu)->rah; + mcs1 = ((DCI2_5MHz_2A_FDD_t *) dci_pdu)->mcs1; + mcs2 = ((DCI2_5MHz_2A_FDD_t *) dci_pdu)->mcs2; + rballoc = ((DCI2_5MHz_2A_FDD_t *) dci_pdu)->rballoc; + rv1 = ((DCI2_5MHz_2A_FDD_t *) dci_pdu)->rv1; + rv2 = ((DCI2_5MHz_2A_FDD_t *) dci_pdu)->rv2; + harq_pid = ((DCI2_5MHz_2A_FDD_t *) dci_pdu)->harq_pid; + tbswap = ((DCI2_5MHz_2A_FDD_t *) dci_pdu)->tb_swap; + tpmi = ((DCI2_5MHz_2A_FDD_t *) dci_pdu)->tpmi; + TPC = ((DCI2_5MHz_2A_FDD_t *) dci_pdu)->TPC; + ndi1 = ((DCI2_5MHz_2A_FDD_t *) dci_pdu)->ndi1; + ndi2 = ((DCI2_5MHz_2A_FDD_t *) dci_pdu)->ndi2; } - // printf("Format 2A: NPRB=%d (rballoc %x,mcs1 %d, mcs2 %d, frame_type %d N_RB_DL %d,active %d/%d)\n",NPRB,rballoc,mcs1,mcs2,frame_parms->frame_type,frame_parms->N_RB_DL,dlsch0->active,dlsch1->active); - //printf("UE (%x/%d): Subframe %d Format2A DCI: ndi1 %d, old_ndi1 %d, ndi2 %d, old_ndi2 %d (first tx1 %d, first tx2 %d) harq_status1 %d, harq_status2 %d\n",dlsch0->rnti,harq_pid,subframe,ndi,dlsch0_harq->DCINdi, - // dlsch0_harq->first_tx,dlsch1_harq->first_tx,dlsch0_harq->status,dlsch1_harq->status); - //printf("TBS0 %d, TBS1 %d\n",dlsch0_harq->TBS,dlsch1_harq->TBS); + } else if (nb_antenna_ports_eNB == 4) { + if (frame_type == TDD) { + rah = ((DCI2_5MHz_4A_TDD_t *) dci_pdu)->rah; + mcs1 = ((DCI2_5MHz_4A_TDD_t *) dci_pdu)->mcs1; + mcs2 = ((DCI2_5MHz_4A_TDD_t *) dci_pdu)->mcs2; + rballoc = ((DCI2_5MHz_4A_TDD_t *) dci_pdu)->rballoc; + rv1 = ((DCI2_5MHz_4A_TDD_t *) dci_pdu)->rv1; + rv2 = ((DCI2_5MHz_4A_TDD_t *) dci_pdu)->rv2; + harq_pid = ((DCI2_5MHz_4A_TDD_t *) dci_pdu)->harq_pid; + tbswap = ((DCI2_5MHz_4A_TDD_t *) dci_pdu)->tb_swap; + tpmi = ((DCI2_5MHz_4A_TDD_t *) dci_pdu)->tpmi; + TPC = ((DCI2_5MHz_4A_TDD_t *) dci_pdu)->TPC; + ndi1 = ((DCI2_5MHz_4A_TDD_t *) dci_pdu)->ndi1; + ndi2 = ((DCI2_5MHz_4A_TDD_t *) dci_pdu)->ndi2; + } else { + rah = ((DCI2_5MHz_4A_FDD_t *) dci_pdu)->rah; + mcs1 = ((DCI2_5MHz_4A_FDD_t *) dci_pdu)->mcs1; + mcs2 = ((DCI2_5MHz_4A_FDD_t *) dci_pdu)->mcs2; + rballoc = ((DCI2_5MHz_4A_FDD_t *) dci_pdu)->rballoc; + rv1 = ((DCI2_5MHz_4A_FDD_t *) dci_pdu)->rv1; + rv2 = ((DCI2_5MHz_4A_FDD_t *) dci_pdu)->rv2; + harq_pid = ((DCI2_5MHz_4A_FDD_t *) dci_pdu)->harq_pid; + tbswap = ((DCI2_5MHz_4A_FDD_t *) dci_pdu)->tb_swap; + tpmi = ((DCI2_5MHz_4A_FDD_t *) dci_pdu)->tpmi; + TPC = ((DCI2_5MHz_4A_FDD_t *) dci_pdu)->TPC; + ndi1 = ((DCI2_5MHz_4A_FDD_t *) dci_pdu)->ndi1; + ndi2 = ((DCI2_5MHz_4A_FDD_t *) dci_pdu)->ndi2; + } + } else { + LOG_E (PHY, "UE: Format2 DCI: unsupported number of TX antennas %d\n", nb_antenna_ports_eNB); + } + + break; + + case 25: + if (nb_antenna_ports_eNB == 2) { + if (frame_type == TDD) { + rah = ((DCI2_5MHz_2A_TDD_t *) dci_pdu)->rah; + mcs1 = ((DCI2_5MHz_2A_TDD_t *) dci_pdu)->mcs1; + mcs2 = ((DCI2_5MHz_2A_TDD_t *) dci_pdu)->mcs2; + rballoc = ((DCI2_5MHz_2A_TDD_t *) dci_pdu)->rballoc; + rv1 = ((DCI2_5MHz_2A_TDD_t *) dci_pdu)->rv1; + rv2 = ((DCI2_5MHz_2A_TDD_t *) dci_pdu)->rv2; + harq_pid = ((DCI2_5MHz_2A_TDD_t *) dci_pdu)->harq_pid; + tbswap = ((DCI2_5MHz_2A_TDD_t *) dci_pdu)->tb_swap; + tpmi = ((DCI2_5MHz_2A_TDD_t *) dci_pdu)->tpmi; + TPC = ((DCI2_5MHz_2A_TDD_t *) dci_pdu)->TPC; + ndi1 = ((DCI2_5MHz_2A_TDD_t *) dci_pdu)->ndi1; + ndi2 = ((DCI2_5MHz_2A_TDD_t *) dci_pdu)->ndi2; + } else { + rah = ((DCI2_5MHz_2A_FDD_t *) dci_pdu)->rah; + mcs1 = ((DCI2_5MHz_2A_FDD_t *) dci_pdu)->mcs1; + mcs2 = ((DCI2_5MHz_2A_FDD_t *) dci_pdu)->mcs2; + rballoc = ((DCI2_5MHz_2A_FDD_t *) dci_pdu)->rballoc; + rv1 = ((DCI2_5MHz_2A_FDD_t *) dci_pdu)->rv1; + rv2 = ((DCI2_5MHz_2A_FDD_t *) dci_pdu)->rv2; + harq_pid = ((DCI2_5MHz_2A_FDD_t *) dci_pdu)->harq_pid; + tbswap = ((DCI2_5MHz_2A_FDD_t *) dci_pdu)->tb_swap; + tpmi = ((DCI2_5MHz_2A_FDD_t *) dci_pdu)->tpmi; + TPC = ((DCI2_5MHz_2A_FDD_t *) dci_pdu)->TPC; + ndi1 = ((DCI2_5MHz_2A_FDD_t *) dci_pdu)->ndi1; + ndi2 = ((DCI2_5MHz_2A_FDD_t *) dci_pdu)->ndi2; + } + } else if (nb_antenna_ports_eNB == 4) { + if (frame_type == TDD) { + rah = ((DCI2_5MHz_4A_TDD_t *) dci_pdu)->rah; + mcs1 = ((DCI2_5MHz_4A_TDD_t *) dci_pdu)->mcs1; + mcs2 = ((DCI2_5MHz_4A_TDD_t *) dci_pdu)->mcs2; + rballoc = ((DCI2_5MHz_4A_TDD_t *) dci_pdu)->rballoc; + rv1 = ((DCI2_5MHz_4A_TDD_t *) dci_pdu)->rv1; + rv2 = ((DCI2_5MHz_4A_TDD_t *) dci_pdu)->rv2; + harq_pid = ((DCI2_5MHz_4A_TDD_t *) dci_pdu)->harq_pid; + tbswap = ((DCI2_5MHz_4A_TDD_t *) dci_pdu)->tb_swap; + tpmi = ((DCI2_5MHz_4A_TDD_t *) dci_pdu)->tpmi; + TPC = ((DCI2_5MHz_4A_TDD_t *) dci_pdu)->TPC; + ndi1 = ((DCI2_5MHz_2A_TDD_t *) dci_pdu)->ndi1; + ndi2 = ((DCI2_5MHz_2A_TDD_t *) dci_pdu)->ndi2; + } else { + rah = ((DCI2_5MHz_4A_FDD_t *) dci_pdu)->rah; + mcs1 = ((DCI2_5MHz_4A_FDD_t *) dci_pdu)->mcs1; + mcs2 = ((DCI2_5MHz_4A_FDD_t *) dci_pdu)->mcs2; + rballoc = ((DCI2_5MHz_4A_FDD_t *) dci_pdu)->rballoc; + rv1 = ((DCI2_5MHz_4A_FDD_t *) dci_pdu)->rv1; + rv2 = ((DCI2_5MHz_4A_FDD_t *) dci_pdu)->rv2; + harq_pid = ((DCI2_5MHz_4A_FDD_t *) dci_pdu)->harq_pid; + tbswap = ((DCI2_5MHz_4A_FDD_t *) dci_pdu)->tb_swap; + tpmi = ((DCI2_5MHz_4A_FDD_t *) dci_pdu)->tpmi; + TPC = ((DCI2_5MHz_4A_FDD_t *) dci_pdu)->TPC; + ndi1 = ((DCI2_5MHz_4A_FDD_t *) dci_pdu)->ndi1; + ndi2 = ((DCI2_5MHz_4A_FDD_t *) dci_pdu)->ndi2; + } + } else { + LOG_E (PHY, "UE: Format2 DCI: unsupported number of TX antennas %d\n", nb_antenna_ports_eNB); + } + + break; + + case 50: + if (nb_antenna_ports_eNB == 2) { + if (frame_type == TDD) { + rah = ((DCI2_10MHz_2A_TDD_t *) dci_pdu)->rah; + mcs1 = ((DCI2_10MHz_2A_TDD_t *) dci_pdu)->mcs1; + mcs2 = ((DCI2_10MHz_2A_TDD_t *) dci_pdu)->mcs2; + rballoc = ((DCI2_10MHz_2A_TDD_t *) dci_pdu)->rballoc; + rv1 = ((DCI2_10MHz_2A_TDD_t *) dci_pdu)->rv1; + rv2 = ((DCI2_10MHz_2A_TDD_t *) dci_pdu)->rv2; + harq_pid = ((DCI2_10MHz_2A_TDD_t *) dci_pdu)->harq_pid; + tbswap = ((DCI2_10MHz_2A_TDD_t *) dci_pdu)->tb_swap; + tpmi = ((DCI2_10MHz_2A_TDD_t *) dci_pdu)->tpmi; + TPC = ((DCI2_10MHz_2A_TDD_t *) dci_pdu)->TPC; + ndi1 = ((DCI2_10MHz_2A_TDD_t *) dci_pdu)->ndi1; + ndi2 = ((DCI2_10MHz_2A_TDD_t *) dci_pdu)->ndi2; + } else { + rah = ((DCI2_10MHz_2A_FDD_t *) dci_pdu)->rah; + mcs1 = ((DCI2_10MHz_2A_FDD_t *) dci_pdu)->mcs1; + mcs2 = ((DCI2_10MHz_2A_FDD_t *) dci_pdu)->mcs2; + rballoc = ((DCI2_10MHz_2A_FDD_t *) dci_pdu)->rballoc; + rv1 = ((DCI2_10MHz_2A_FDD_t *) dci_pdu)->rv1; + rv2 = ((DCI2_10MHz_2A_FDD_t *) dci_pdu)->rv2; + harq_pid = ((DCI2_10MHz_2A_FDD_t *) dci_pdu)->harq_pid; + tbswap = ((DCI2_10MHz_2A_FDD_t *) dci_pdu)->tb_swap; + tpmi = ((DCI2_10MHz_2A_FDD_t *) dci_pdu)->tpmi; + TPC = ((DCI2_10MHz_2A_FDD_t *) dci_pdu)->TPC; + ndi1 = ((DCI2_10MHz_2A_FDD_t *) dci_pdu)->ndi1; + ndi2 = ((DCI2_10MHz_2A_FDD_t *) dci_pdu)->ndi2; + } + } else if (nb_antenna_ports_eNB == 4) { + if (frame_type == TDD) { + rah = ((DCI2_10MHz_4A_TDD_t *) dci_pdu)->rah; + mcs1 = ((DCI2_10MHz_4A_TDD_t *) dci_pdu)->mcs1; + mcs2 = ((DCI2_10MHz_4A_TDD_t *) dci_pdu)->mcs2; + rballoc = ((DCI2_10MHz_4A_TDD_t *) dci_pdu)->rballoc; + rv1 = ((DCI2_10MHz_4A_TDD_t *) dci_pdu)->rv1; + rv2 = ((DCI2_10MHz_4A_TDD_t *) dci_pdu)->rv2; + harq_pid = ((DCI2_10MHz_4A_TDD_t *) dci_pdu)->harq_pid; + tbswap = ((DCI2_10MHz_4A_TDD_t *) dci_pdu)->tb_swap; + tpmi = ((DCI2_10MHz_4A_TDD_t *) dci_pdu)->tpmi; + TPC = ((DCI2_10MHz_4A_TDD_t *) dci_pdu)->TPC; + ndi1 = ((DCI2_10MHz_4A_TDD_t *) dci_pdu)->ndi1; + ndi2 = ((DCI2_10MHz_4A_TDD_t *) dci_pdu)->ndi2; + } else { + rah = ((DCI2_10MHz_4A_FDD_t *) dci_pdu)->rah; + mcs1 = ((DCI2_10MHz_4A_FDD_t *) dci_pdu)->mcs1; + mcs2 = ((DCI2_10MHz_4A_FDD_t *) dci_pdu)->mcs2; + rballoc = ((DCI2_10MHz_4A_FDD_t *) dci_pdu)->rballoc; + rv1 = ((DCI2_10MHz_4A_FDD_t *) dci_pdu)->rv1; + rv2 = ((DCI2_10MHz_4A_FDD_t *) dci_pdu)->rv2; + harq_pid = ((DCI2_10MHz_4A_FDD_t *) dci_pdu)->harq_pid; + tbswap = ((DCI2_10MHz_4A_FDD_t *) dci_pdu)->tb_swap; + tpmi = ((DCI2_10MHz_4A_FDD_t *) dci_pdu)->tpmi; + TPC = ((DCI2_10MHz_4A_FDD_t *) dci_pdu)->TPC; + ndi1 = ((DCI2_10MHz_4A_FDD_t *) dci_pdu)->ndi1; + ndi2 = ((DCI2_10MHz_4A_FDD_t *) dci_pdu)->ndi2; + } + } else { + LOG_E (PHY, "UE: Format2A DCI: unsupported number of TX antennas %d\n", nb_antenna_ports_eNB); + } + + break; + + case 100: + if (nb_antenna_ports_eNB == 2) { + if (frame_type == TDD) { + rah = ((DCI2_20MHz_2A_TDD_t *) dci_pdu)->rah; + mcs1 = ((DCI2_20MHz_2A_TDD_t *) dci_pdu)->mcs1; + mcs2 = ((DCI2_20MHz_2A_TDD_t *) dci_pdu)->mcs2; + rballoc = ((DCI2_20MHz_2A_TDD_t *) dci_pdu)->rballoc; + rv1 = ((DCI2_20MHz_2A_TDD_t *) dci_pdu)->rv1; + rv2 = ((DCI2_20MHz_2A_TDD_t *) dci_pdu)->rv2; + harq_pid = ((DCI2_20MHz_2A_TDD_t *) dci_pdu)->harq_pid; + tbswap = ((DCI2_20MHz_2A_TDD_t *) dci_pdu)->tb_swap; + tpmi = ((DCI2_20MHz_2A_TDD_t *) dci_pdu)->tpmi; + TPC = ((DCI2_20MHz_2A_TDD_t *) dci_pdu)->TPC; + ndi1 = ((DCI2_20MHz_2A_TDD_t *) dci_pdu)->ndi1; + ndi2 = ((DCI2_20MHz_2A_TDD_t *) dci_pdu)->ndi2; + } else { + rah = ((DCI2_20MHz_2A_FDD_t *) dci_pdu)->rah; + mcs1 = ((DCI2_20MHz_2A_FDD_t *) dci_pdu)->mcs1; + mcs2 = ((DCI2_20MHz_2A_FDD_t *) dci_pdu)->mcs2; + rballoc = ((DCI2_20MHz_2A_FDD_t *) dci_pdu)->rballoc; + rv1 = ((DCI2_20MHz_2A_FDD_t *) dci_pdu)->rv1; + rv2 = ((DCI2_20MHz_2A_FDD_t *) dci_pdu)->rv2; + harq_pid = ((DCI2_20MHz_2A_FDD_t *) dci_pdu)->harq_pid; + tbswap = ((DCI2_20MHz_2A_FDD_t *) dci_pdu)->tb_swap; + tpmi = ((DCI2_20MHz_2A_FDD_t *) dci_pdu)->tpmi; + TPC = ((DCI2_20MHz_2A_FDD_t *) dci_pdu)->TPC; + ndi1 = ((DCI2_20MHz_2A_FDD_t *) dci_pdu)->ndi1; + ndi2 = ((DCI2_20MHz_2A_FDD_t *) dci_pdu)->ndi2; + } + } else if (nb_antenna_ports_eNB == 4) { + if (frame_type == TDD) { + rah = ((DCI2_20MHz_4A_TDD_t *) dci_pdu)->rah; + mcs1 = ((DCI2_20MHz_4A_TDD_t *) dci_pdu)->mcs1; + mcs2 = ((DCI2_20MHz_4A_TDD_t *) dci_pdu)->mcs2; + rballoc = ((DCI2_20MHz_4A_TDD_t *) dci_pdu)->rballoc; + rv1 = ((DCI2_20MHz_4A_TDD_t *) dci_pdu)->rv1; + rv2 = ((DCI2_20MHz_4A_TDD_t *) dci_pdu)->rv2; + harq_pid = ((DCI2_20MHz_4A_TDD_t *) dci_pdu)->harq_pid; + tbswap = ((DCI2_20MHz_4A_TDD_t *) dci_pdu)->tb_swap; + tpmi = ((DCI2_20MHz_4A_TDD_t *) dci_pdu)->tpmi; + TPC = ((DCI2_20MHz_4A_TDD_t *) dci_pdu)->TPC; + ndi1 = ((DCI2_20MHz_4A_TDD_t *) dci_pdu)->ndi1; + ndi2 = ((DCI2_20MHz_4A_TDD_t *) dci_pdu)->ndi2; + } else { + rah = ((DCI2_20MHz_4A_FDD_t *) dci_pdu)->rah; + mcs1 = ((DCI2_20MHz_4A_FDD_t *) dci_pdu)->mcs1; + mcs2 = ((DCI2_20MHz_4A_FDD_t *) dci_pdu)->mcs2; + rballoc = ((DCI2_20MHz_4A_FDD_t *) dci_pdu)->rballoc; + rv1 = ((DCI2_20MHz_4A_FDD_t *) dci_pdu)->rv1; + rv2 = ((DCI2_20MHz_4A_FDD_t *) dci_pdu)->rv2; + harq_pid = ((DCI2_20MHz_4A_FDD_t *) dci_pdu)->harq_pid; + tbswap = ((DCI2_20MHz_4A_FDD_t *) dci_pdu)->tb_swap; + tpmi = ((DCI2_20MHz_4A_FDD_t *) dci_pdu)->tpmi; + TPC = ((DCI2_20MHz_4A_FDD_t *) dci_pdu)->TPC; + ndi1 = ((DCI2_20MHz_4A_FDD_t *) dci_pdu)->ndi1; + ndi2 = ((DCI2_20MHz_4A_FDD_t *) dci_pdu)->ndi2; + } + } else { + LOG_E (PHY, "UE: Format2A DCI: unsupported number of TX antennas %d\n", nb_antenna_ports_eNB); + } + + break; + } + + pdci_info_extarcted->rah = rah; + pdci_info_extarcted->mcs1 = mcs1; + pdci_info_extarcted->mcs2 = mcs2; + pdci_info_extarcted->rv1 = rv1; + pdci_info_extarcted->rv2 = rv2; + pdci_info_extarcted->harq_pid = harq_pid; + pdci_info_extarcted->rballoc = rballoc; + pdci_info_extarcted->tb_swap = tbswap; + pdci_info_extarcted->tpmi = tpmi; + pdci_info_extarcted->TPC = TPC; + pdci_info_extarcted->ndi1 = ndi1; + pdci_info_extarcted->ndi2 = ndi2; } -void prepare_dl_decoding_format2_2A(DCI_format_t dci_format, - DCI_INFO_EXTRACTED_t *pdci_info_extarcted, - LTE_DL_FRAME_PARMS *frame_parms, - LTE_UE_PDCCH *pdcch_vars, - LTE_UE_PDSCH *pdsch_vars, - uint16_t rnti, - uint8_t subframe, - LTE_DL_UE_HARQ_t *dlsch0_harq, - LTE_DL_UE_HARQ_t *dlsch1_harq, - LTE_UE_DLSCH_t *pdlsch0, - LTE_UE_DLSCH_t *pdlsch1) +void +extract_dci2A_info (uint8_t N_RB_DL, lte_frame_type_t frame_type, uint8_t nb_antenna_ports_eNB, void *dci_pdu, DCI_INFO_EXTRACTED_t * pdci_info_extarcted) { - uint8_t rah = pdci_info_extarcted->rah; - uint8_t mcs1 = pdci_info_extarcted->mcs1; - uint8_t mcs2 = pdci_info_extarcted->mcs2; - uint8_t rv1 = pdci_info_extarcted->rv1; - uint8_t rv2 = pdci_info_extarcted->rv2; - uint8_t harq_pid = pdci_info_extarcted->harq_pid; - uint32_t rballoc = pdci_info_extarcted->rballoc; - uint8_t tbswap = pdci_info_extarcted->tb_swap; - uint8_t tpmi = pdci_info_extarcted->tpmi; - uint8_t TPC = pdci_info_extarcted->TPC; - uint8_t ndi1 = pdci_info_extarcted->ndi1; - uint8_t ndi2 = pdci_info_extarcted->ndi2; + uint32_t rballoc = 0; + uint8_t rah = 0; + uint8_t mcs1 = 0; + uint8_t mcs2 = 0; + uint8_t rv1 = 0; + uint8_t rv2 = 0; + uint8_t ndi1 = 0; + uint8_t ndi2 = 0; + uint8_t tbswap = 0; + uint8_t tpmi = 0; + uint8_t harq_pid = 0; + uint8_t TPC = 0; - uint8_t TB0_active = 1; - uint8_t TB1_active = 1; + AssertFatal ((nb_antenna_ports_eNB == 2) || (nb_antenna_ports_eNB == 4), "unsupported nb_antenna_ports_eNB %d\n", nb_antenna_ports_eNB); + switch (N_RB_DL) { - // printf("inside prepare pdlsch1->pmi_alloc %d \n",pdlsch1->pmi_alloc); - - - if ((rv1 == 1) && (mcs1 == 0)) { - TB0_active=0; + case 6: + if (nb_antenna_ports_eNB == 2) { + if (frame_type == TDD) { + mcs1 = ((DCI2A_1_5MHz_2A_TDD_t *) dci_pdu)->mcs1; + mcs2 = ((DCI2A_1_5MHz_2A_TDD_t *) dci_pdu)->mcs2; + rballoc = ((DCI2A_1_5MHz_2A_TDD_t *) dci_pdu)->rballoc; + rv1 = ((DCI2A_1_5MHz_2A_TDD_t *) dci_pdu)->rv1; + rv2 = ((DCI2A_1_5MHz_2A_TDD_t *) dci_pdu)->rv2; + ndi1 = ((DCI2A_1_5MHz_2A_TDD_t *) dci_pdu)->ndi1; + ndi2 = ((DCI2A_1_5MHz_2A_TDD_t *) dci_pdu)->ndi2; + harq_pid = ((DCI2A_1_5MHz_2A_TDD_t *) dci_pdu)->harq_pid; + tbswap = ((DCI2A_1_5MHz_2A_TDD_t *) dci_pdu)->tb_swap; + TPC = ((DCI2A_1_5MHz_2A_TDD_t *) dci_pdu)->TPC; + } else { + mcs1 = ((DCI2A_1_5MHz_2A_FDD_t *) dci_pdu)->mcs1; + mcs2 = ((DCI2A_1_5MHz_2A_FDD_t *) dci_pdu)->mcs2; + rballoc = ((DCI2A_1_5MHz_2A_FDD_t *) dci_pdu)->rballoc; + rv1 = ((DCI2A_1_5MHz_2A_FDD_t *) dci_pdu)->rv1; + rv2 = ((DCI2A_1_5MHz_2A_FDD_t *) dci_pdu)->rv2; + ndi1 = ((DCI2A_1_5MHz_2A_FDD_t *) dci_pdu)->ndi1; + ndi2 = ((DCI2A_1_5MHz_2A_FDD_t *) dci_pdu)->ndi2; + harq_pid = ((DCI2A_1_5MHz_2A_FDD_t *) dci_pdu)->harq_pid; + tbswap = ((DCI2A_1_5MHz_2A_FDD_t *) dci_pdu)->tb_swap; + TPC = ((DCI2A_1_5MHz_2A_FDD_t *) dci_pdu)->TPC; } - if ((rv2 == 1) && (mcs2 == 0)) { - TB1_active=0; + } else if (nb_antenna_ports_eNB == 4) { + if (frame_type == TDD) { + mcs1 = ((DCI2A_1_5MHz_4A_TDD_t *) dci_pdu)->mcs1; + mcs2 = ((DCI2A_1_5MHz_4A_TDD_t *) dci_pdu)->mcs2; + rballoc = ((DCI2A_1_5MHz_4A_TDD_t *) dci_pdu)->rballoc; + rv1 = ((DCI2A_1_5MHz_4A_TDD_t *) dci_pdu)->rv1; + rv2 = ((DCI2A_1_5MHz_4A_TDD_t *) dci_pdu)->rv2; + ndi1 = ((DCI2A_1_5MHz_4A_TDD_t *) dci_pdu)->ndi1; + ndi2 = ((DCI2A_1_5MHz_4A_TDD_t *) dci_pdu)->ndi2; + harq_pid = ((DCI2A_1_5MHz_4A_TDD_t *) dci_pdu)->harq_pid; + tbswap = ((DCI2A_1_5MHz_4A_TDD_t *) dci_pdu)->tb_swap; + tpmi = ((DCI2A_1_5MHz_4A_TDD_t *) dci_pdu)->tpmi; + TPC = ((DCI2A_1_5MHz_4A_TDD_t *) dci_pdu)->TPC; + } else { + mcs1 = ((DCI2A_1_5MHz_4A_FDD_t *) dci_pdu)->mcs1; + mcs2 = ((DCI2A_1_5MHz_4A_FDD_t *) dci_pdu)->mcs2; + rballoc = ((DCI2A_1_5MHz_4A_FDD_t *) dci_pdu)->rballoc; + rv1 = ((DCI2A_1_5MHz_4A_FDD_t *) dci_pdu)->rv1; + rv2 = ((DCI2A_1_5MHz_4A_FDD_t *) dci_pdu)->rv2; + ndi1 = ((DCI2A_1_5MHz_4A_FDD_t *) dci_pdu)->ndi1; + ndi2 = ((DCI2A_1_5MHz_4A_FDD_t *) dci_pdu)->ndi2; + harq_pid = ((DCI2A_1_5MHz_4A_FDD_t *) dci_pdu)->harq_pid; + tbswap = ((DCI2A_1_5MHz_4A_FDD_t *) dci_pdu)->tb_swap; + tpmi = ((DCI2A_1_5MHz_4A_FDD_t *) dci_pdu)->tpmi; + TPC = ((DCI2A_1_5MHz_4A_FDD_t *) dci_pdu)->TPC; } + } -#ifdef DEBUG_HARQ - printf("[DCI UE]: TB0 status %d , TB1 status %d\n", TB0_active, TB1_active); + break; + + case 25: + if (nb_antenna_ports_eNB == 2) { + if (frame_type == TDD) { + mcs1 = ((DCI2A_5MHz_2A_TDD_t *) dci_pdu)->mcs1; + mcs2 = ((DCI2A_5MHz_2A_TDD_t *) dci_pdu)->mcs2; + rballoc = ((DCI2A_5MHz_2A_TDD_t *) dci_pdu)->rballoc; + rah = ((DCI2A_5MHz_2A_TDD_t *) dci_pdu)->rah; + rv1 = ((DCI2A_5MHz_2A_TDD_t *) dci_pdu)->rv1; + rv2 = ((DCI2A_5MHz_2A_TDD_t *) dci_pdu)->rv2; + ndi1 = ((DCI2A_5MHz_2A_TDD_t *) dci_pdu)->ndi1; + ndi2 = ((DCI2A_5MHz_2A_TDD_t *) dci_pdu)->ndi2; + harq_pid = ((DCI2A_5MHz_2A_TDD_t *) dci_pdu)->harq_pid; + tbswap = ((DCI2A_5MHz_2A_TDD_t *) dci_pdu)->tb_swap; + TPC = ((DCI2A_5MHz_2A_TDD_t *) dci_pdu)->TPC; + } else { + mcs1 = ((DCI2A_5MHz_2A_FDD_t *) dci_pdu)->mcs1; + mcs2 = ((DCI2A_5MHz_2A_FDD_t *) dci_pdu)->mcs2; + rballoc = ((DCI2A_5MHz_2A_FDD_t *) dci_pdu)->rballoc; + rah = ((DCI2A_5MHz_2A_FDD_t *) dci_pdu)->rah; + rv1 = ((DCI2A_5MHz_2A_FDD_t *) dci_pdu)->rv1; + rv2 = ((DCI2A_5MHz_2A_FDD_t *) dci_pdu)->rv2; + ndi1 = ((DCI2A_5MHz_2A_FDD_t *) dci_pdu)->ndi1; + ndi2 = ((DCI2A_5MHz_2A_FDD_t *) dci_pdu)->ndi2; + harq_pid = ((DCI2A_5MHz_2A_FDD_t *) dci_pdu)->harq_pid; + tbswap = ((DCI2A_5MHz_2A_FDD_t *) dci_pdu)->tb_swap; + TPC = ((DCI2A_5MHz_2A_FDD_t *) dci_pdu)->TPC; + } + } else if (nb_antenna_ports_eNB == 4) { + if (frame_type == TDD) { + mcs1 = ((DCI2A_5MHz_4A_TDD_t *) dci_pdu)->mcs1; + mcs2 = ((DCI2A_5MHz_4A_TDD_t *) dci_pdu)->mcs2; + rballoc = ((DCI2A_5MHz_4A_TDD_t *) dci_pdu)->rballoc; + rah = ((DCI2A_5MHz_4A_TDD_t *) dci_pdu)->rah; + rv1 = ((DCI2A_5MHz_4A_TDD_t *) dci_pdu)->rv1; + rv2 = ((DCI2A_5MHz_4A_TDD_t *) dci_pdu)->rv2; + ndi1 = ((DCI2A_5MHz_4A_TDD_t *) dci_pdu)->ndi1; + ndi2 = ((DCI2A_5MHz_4A_TDD_t *) dci_pdu)->ndi2; + harq_pid = ((DCI2A_5MHz_4A_TDD_t *) dci_pdu)->harq_pid; + tbswap = ((DCI2A_5MHz_4A_TDD_t *) dci_pdu)->tb_swap; + tpmi = ((DCI2A_5MHz_4A_TDD_t *) dci_pdu)->tpmi; + TPC = ((DCI2A_5MHz_4A_TDD_t *) dci_pdu)->TPC; + } else { + mcs1 = ((DCI2A_5MHz_4A_FDD_t *) dci_pdu)->mcs1; + mcs2 = ((DCI2A_5MHz_4A_FDD_t *) dci_pdu)->mcs2; + rballoc = ((DCI2A_5MHz_4A_FDD_t *) dci_pdu)->rballoc; + rah = ((DCI2A_5MHz_4A_FDD_t *) dci_pdu)->rah; + rv1 = ((DCI2A_5MHz_4A_FDD_t *) dci_pdu)->rv1; + rv2 = ((DCI2A_5MHz_4A_FDD_t *) dci_pdu)->rv2; + ndi1 = ((DCI2A_5MHz_4A_TDD_t *) dci_pdu)->ndi1; + ndi2 = ((DCI2A_5MHz_4A_TDD_t *) dci_pdu)->ndi2; + harq_pid = ((DCI2A_5MHz_4A_FDD_t *) dci_pdu)->harq_pid; + tbswap = ((DCI2A_5MHz_4A_FDD_t *) dci_pdu)->tb_swap; + tpmi = ((DCI2A_5MHz_4A_FDD_t *) dci_pdu)->tpmi; + TPC = ((DCI2A_5MHz_4A_FDD_t *) dci_pdu)->TPC; + } + } + break; + + case 50: + if (nb_antenna_ports_eNB == 2) { + if (frame_type == TDD) { + mcs1 = ((DCI2A_10MHz_2A_TDD_t *) dci_pdu)->mcs1; + mcs2 = ((DCI2A_10MHz_2A_TDD_t *) dci_pdu)->mcs2; + rballoc = ((DCI2A_10MHz_2A_TDD_t *) dci_pdu)->rballoc; + rah = ((DCI2A_10MHz_2A_TDD_t *) dci_pdu)->rah; + rv1 = ((DCI2A_10MHz_2A_TDD_t *) dci_pdu)->rv1; + rv2 = ((DCI2A_10MHz_2A_TDD_t *) dci_pdu)->rv2; + ndi1 = ((DCI2A_10MHz_2A_TDD_t *) dci_pdu)->ndi1; + ndi2 = ((DCI2A_10MHz_2A_TDD_t *) dci_pdu)->ndi2; + harq_pid = ((DCI2A_10MHz_2A_TDD_t *) dci_pdu)->harq_pid; + tbswap = ((DCI2A_10MHz_2A_TDD_t *) dci_pdu)->tb_swap; + TPC = ((DCI2A_10MHz_2A_TDD_t *) dci_pdu)->TPC; + } else { + mcs1 = ((DCI2A_10MHz_2A_FDD_t *) dci_pdu)->mcs1; + mcs2 = ((DCI2A_10MHz_2A_FDD_t *) dci_pdu)->mcs2; + rballoc = ((DCI2A_10MHz_2A_FDD_t *) dci_pdu)->rballoc; + rah = ((DCI2A_10MHz_2A_FDD_t *) dci_pdu)->rah; + rv1 = ((DCI2A_10MHz_2A_FDD_t *) dci_pdu)->rv1; + rv2 = ((DCI2A_10MHz_2A_FDD_t *) dci_pdu)->rv2; + ndi1 = ((DCI2A_10MHz_2A_FDD_t *) dci_pdu)->ndi1; + ndi2 = ((DCI2A_10MHz_2A_FDD_t *) dci_pdu)->ndi2; + harq_pid = ((DCI2A_10MHz_2A_FDD_t *) dci_pdu)->harq_pid; + tbswap = ((DCI2A_10MHz_2A_FDD_t *) dci_pdu)->tb_swap; + TPC = ((DCI2A_10MHz_2A_FDD_t *) dci_pdu)->TPC; + } + } else if (nb_antenna_ports_eNB == 4) { + if (frame_type == TDD) { + mcs1 = ((DCI2A_10MHz_4A_TDD_t *) dci_pdu)->mcs1; + mcs2 = ((DCI2A_10MHz_4A_TDD_t *) dci_pdu)->mcs2; + rballoc = ((DCI2A_10MHz_4A_TDD_t *) dci_pdu)->rballoc; + rah = ((DCI2A_10MHz_4A_TDD_t *) dci_pdu)->rah; + rv1 = ((DCI2A_10MHz_4A_TDD_t *) dci_pdu)->rv1; + rv2 = ((DCI2A_10MHz_4A_TDD_t *) dci_pdu)->rv2; + ndi1 = ((DCI2A_10MHz_4A_TDD_t *) dci_pdu)->ndi1; + ndi2 = ((DCI2A_10MHz_4A_TDD_t *) dci_pdu)->ndi2; + harq_pid = ((DCI2A_10MHz_4A_TDD_t *) dci_pdu)->harq_pid; + tbswap = ((DCI2A_10MHz_4A_TDD_t *) dci_pdu)->tb_swap; + tpmi = ((DCI2A_10MHz_4A_TDD_t *) dci_pdu)->tpmi; + TPC = ((DCI2A_10MHz_4A_TDD_t *) dci_pdu)->TPC; + } else { + mcs1 = ((DCI2A_10MHz_4A_FDD_t *) dci_pdu)->mcs1; + mcs2 = ((DCI2A_10MHz_4A_FDD_t *) dci_pdu)->mcs2; + rballoc = ((DCI2A_10MHz_4A_FDD_t *) dci_pdu)->rballoc; + rah = ((DCI2A_10MHz_4A_FDD_t *) dci_pdu)->rah; + rv1 = ((DCI2A_10MHz_4A_FDD_t *) dci_pdu)->rv1; + rv2 = ((DCI2A_10MHz_4A_FDD_t *) dci_pdu)->rv2; + ndi1 = ((DCI2A_10MHz_4A_FDD_t *) dci_pdu)->ndi1; + ndi2 = ((DCI2A_10MHz_4A_FDD_t *) dci_pdu)->ndi2; + harq_pid = ((DCI2A_10MHz_4A_FDD_t *) dci_pdu)->harq_pid; + tbswap = ((DCI2A_10MHz_4A_FDD_t *) dci_pdu)->tb_swap; + tpmi = ((DCI2A_10MHz_4A_FDD_t *) dci_pdu)->tpmi; + TPC = ((DCI2A_10MHz_4A_FDD_t *) dci_pdu)->TPC; + } + } + + break; + + case 100: + if (nb_antenna_ports_eNB == 2) { + if (frame_type == TDD) { + mcs1 = ((DCI2A_20MHz_2A_TDD_t *) dci_pdu)->mcs1; + mcs2 = ((DCI2A_20MHz_2A_TDD_t *) dci_pdu)->mcs2; + rballoc = ((DCI2A_20MHz_2A_TDD_t *) dci_pdu)->rballoc; + rah = ((DCI2A_20MHz_2A_TDD_t *) dci_pdu)->rah; + rv1 = ((DCI2A_20MHz_2A_TDD_t *) dci_pdu)->rv1; + rv2 = ((DCI2A_20MHz_2A_TDD_t *) dci_pdu)->rv2; + ndi1 = ((DCI2A_20MHz_2A_TDD_t *) dci_pdu)->ndi1; + ndi2 = ((DCI2A_20MHz_2A_TDD_t *) dci_pdu)->ndi2; + harq_pid = ((DCI2A_20MHz_2A_TDD_t *) dci_pdu)->harq_pid; + tbswap = ((DCI2A_20MHz_2A_TDD_t *) dci_pdu)->tb_swap; + TPC = ((DCI2A_20MHz_2A_TDD_t *) dci_pdu)->TPC; + } else { + mcs1 = ((DCI2A_20MHz_2A_FDD_t *) dci_pdu)->mcs1; + mcs2 = ((DCI2A_20MHz_2A_FDD_t *) dci_pdu)->mcs2; + rballoc = ((DCI2A_20MHz_2A_FDD_t *) dci_pdu)->rballoc; + rah = ((DCI2A_20MHz_2A_FDD_t *) dci_pdu)->rah; + rv1 = ((DCI2A_20MHz_2A_FDD_t *) dci_pdu)->rv1; + rv2 = ((DCI2A_20MHz_2A_FDD_t *) dci_pdu)->rv2; + ndi1 = ((DCI2A_20MHz_2A_FDD_t *) dci_pdu)->ndi1; + ndi2 = ((DCI2A_20MHz_2A_FDD_t *) dci_pdu)->ndi2; + harq_pid = ((DCI2A_20MHz_2A_FDD_t *) dci_pdu)->harq_pid; + tbswap = ((DCI2A_20MHz_2A_FDD_t *) dci_pdu)->tb_swap; + TPC = ((DCI2A_20MHz_2A_FDD_t *) dci_pdu)->TPC; + } + } else if (nb_antenna_ports_eNB == 4) { + if (frame_type == TDD) { + mcs1 = ((DCI2A_20MHz_4A_TDD_t *) dci_pdu)->mcs1; + mcs2 = ((DCI2A_20MHz_4A_TDD_t *) dci_pdu)->mcs2; + rballoc = ((DCI2A_20MHz_4A_TDD_t *) dci_pdu)->rballoc; + rah = ((DCI2A_20MHz_4A_TDD_t *) dci_pdu)->rah; + rv1 = ((DCI2A_20MHz_4A_TDD_t *) dci_pdu)->rv1; + rv2 = ((DCI2A_20MHz_4A_TDD_t *) dci_pdu)->rv2; + ndi1 = ((DCI2A_20MHz_4A_TDD_t *) dci_pdu)->ndi1; + ndi2 = ((DCI2A_20MHz_4A_TDD_t *) dci_pdu)->ndi2; + harq_pid = ((DCI2A_20MHz_4A_TDD_t *) dci_pdu)->harq_pid; + tbswap = ((DCI2A_20MHz_4A_TDD_t *) dci_pdu)->tb_swap; + tpmi = ((DCI2A_20MHz_4A_TDD_t *) dci_pdu)->tpmi; + TPC = ((DCI2A_20MHz_4A_TDD_t *) dci_pdu)->TPC; + } else { + mcs1 = ((DCI2A_20MHz_4A_FDD_t *) dci_pdu)->mcs1; + mcs2 = ((DCI2A_20MHz_4A_FDD_t *) dci_pdu)->mcs2; + rballoc = ((DCI2A_20MHz_4A_FDD_t *) dci_pdu)->rballoc; + rah = ((DCI2A_20MHz_4A_FDD_t *) dci_pdu)->rah; + rv1 = ((DCI2A_20MHz_4A_FDD_t *) dci_pdu)->rv1; + rv2 = ((DCI2A_20MHz_4A_FDD_t *) dci_pdu)->rv2; + ndi1 = ((DCI2A_20MHz_4A_FDD_t *) dci_pdu)->ndi1; + ndi2 = ((DCI2A_20MHz_4A_FDD_t *) dci_pdu)->ndi2; + harq_pid = ((DCI2A_20MHz_4A_FDD_t *) dci_pdu)->harq_pid; + tbswap = ((DCI2A_20MHz_4A_FDD_t *) dci_pdu)->tb_swap; + tpmi = ((DCI2A_20MHz_4A_FDD_t *) dci_pdu)->tpmi; + TPC = ((DCI2A_20MHz_4A_FDD_t *) dci_pdu)->TPC; + } + } + + break; + } + + pdci_info_extarcted->mcs1 = mcs1; + pdci_info_extarcted->mcs2 = mcs2; + pdci_info_extarcted->rballoc = rballoc; + pdci_info_extarcted->rah = rah; + pdci_info_extarcted->rv1 = rv1; + pdci_info_extarcted->rv2 = rv2; + pdci_info_extarcted->ndi1 = ndi1; + pdci_info_extarcted->ndi2 = ndi2; + pdci_info_extarcted->harq_pid = harq_pid; + pdci_info_extarcted->tb_swap = tbswap; + pdci_info_extarcted->TPC = TPC; + pdci_info_extarcted->tpmi = tpmi; +} + +int +check_dci_format1_1a_coherency (DCI_format_t dci_format, + uint8_t N_RB_DL, + uint16_t rnti, + uint16_t tc_rnti, + uint16_t si_rnti, uint16_t ra_rnti, uint16_t p_rnti, uint32_t frame, uint8_t subframe, DCI_INFO_EXTRACTED_t * pdci_info_extarcted, LTE_DL_UE_HARQ_t * pdlsch0_harq) +{ + uint8_t harq_pid = pdci_info_extarcted->harq_pid; + uint32_t rballoc = pdci_info_extarcted->rballoc; + uint8_t mcs1 = pdci_info_extarcted->mcs1; + uint8_t TPC = pdci_info_extarcted->TPC; + uint8_t rah = pdci_info_extarcted->rah; +#ifdef DEBUG_DCI + uint8_t rv1 = pdci_info_extarcted->rv1; + uint8_t ndi1 = pdci_info_extarcted->ndi1; #endif - dlsch0_harq->mcs = mcs1; - dlsch1_harq->mcs = mcs2; - dlsch0_harq->rvidx = rv1; - dlsch1_harq->rvidx = rv2; - dlsch0_harq->DCINdi = ndi1; - dlsch1_harq->DCINdi = ndi2; + uint8_t NPRB = 0; + long long int RIV_max = 0; - dlsch0_harq->codeword = 0; - dlsch1_harq->codeword = 1; - dlsch0_harq->Nl = 1; - dlsch1_harq->Nl = 1; - dlsch0_harq->delta_PUCCH = delta_PUCCH_lut[TPC&3]; - dlsch1_harq->delta_PUCCH = delta_PUCCH_lut[TPC&3]; +#ifdef DEBUG_DCI + LOG_I (PHY, "[DCI-FORMAT-1-1A] AbsSubframe %d.%d dci_format %d\n", frame, subframe, dci_format); + LOG_I (PHY, "[DCI-FORMAT-1-1A] rnti %x\n", rnti); + LOG_I (PHY, "[DCI-FORMAT-1-1A] harq_pid %d\n", harq_pid); + LOG_I (PHY, "[DCI-FORMAT-1-1A] rah %d\n", rah); + LOG_I (PHY, "[DCI-FORMAT-1-1A] rballoc %x\n", rballoc); + LOG_I (PHY, "[DCI-FORMAT-1-1A] mcs1 %d\n", mcs1); + LOG_I (PHY, "[DCI-FORMAT-1-1A] rv1 %d\n", rv1); + LOG_I (PHY, "[DCI-FORMAT-1-1A] ndi1 %d\n", ndi1); + LOG_I (PHY, "[DCI-FORMAT-1-1A] TPC %d\n", TPC); +#endif + + + // I- check dci content minimum coherency + if (((rnti == si_rnti) || (rnti == p_rnti) || (rnti == ra_rnti)) && harq_pid > 0) { + return (0); + } + + if (harq_pid >= 8) { + LOG_I (PHY, "bad harq id \n"); + return (0); + } + + if (dci_format == format1 && ((rnti == si_rnti) || (rnti == p_rnti) || (rnti == ra_rnti))) { + LOG_I (PHY, "bad dci format \n"); + return (0); + } + + + if (mcs1 > 28) { + if (pdlsch0_harq->round == 0) { + LOG_I (PHY, "bad dci mcs + round \n"); + return (0); + } + + if ((rnti == si_rnti) || (rnti == p_rnti) || (rnti == ra_rnti)) { + LOG_I (PHY, "bad dci mcs + rnti \n"); + return (0); + } + } + + if ((rnti == si_rnti) || (rnti == p_rnti) || (rnti == ra_rnti)) { + NPRB = (TPC & 1) + 2; + switch (N_RB_DL) { + case 6: + RIV_max = RIV_max6; + break; + case 25: + RIV_max = RIV_max25; + break; + case 50: + RIV_max = RIV_max50; + break; + case 100: + RIV_max = RIV_max100; + break; + } + } else { + switch (N_RB_DL) { + case 6: + NPRB = RIV2nb_rb_LUT6[rballoc]; //NPRB; + if (rah) + RIV_max = RIV_max6; + else + RIV_max = 0x3F; + break; + case 25: + NPRB = RIV2nb_rb_LUT25[rballoc]; //NPRB; + if (rah) + RIV_max = RIV_max25; + else + RIV_max = 0x1FFF; + break; + case 50: + NPRB = RIV2nb_rb_LUT50[rballoc]; //NPRB; + if (rah) + RIV_max = RIV_max50; + else + RIV_max = 0x1FFFF; + break; + case 100: + NPRB = RIV2nb_rb_LUT100[rballoc]; //NPRB; + if (rah) + RIV_max = RIV_max100; + else + RIV_max = 0x1FFFFFF; + break; + } + } + + + if (dci_format == format1) { + NPRB = conv_nprb (rah, rballoc, N_RB_DL); + } + + + if (rballoc > RIV_max) { + LOG_I (PHY, "bad dci rballoc rballoc %d RIV_max %lld \n", rballoc, RIV_max); + // DCI false detection + return (0); + } + + if (NPRB == 0) { + // DCI false detection + LOG_I (PHY, "bad NPRB = 0 \n"); + return (0); + } + // this a retransmission + if (pdlsch0_harq->round > 0) { + // compare old TBS to new TBS + if ((mcs1 < 29) && (pdlsch0_harq->TBS != TBStable[get_I_TBS (mcs1)][NPRB - 1])) { + // this is an eNB issue + // retransmisison but old and new TBS are different !!! + // work around, consider it as a new transmission + LOG_E (PHY, "Format1A Retransmission but TBS are different: consider it as new transmission !!! \n"); + pdlsch0_harq->round = 0; + //return(0); // ?? to cross check + } + } + + return (1); +} + +int +check_dci_format1c_coherency (uint8_t N_RB_DL, DCI_INFO_EXTRACTED_t * pdci_info_extarcted, uint16_t rnti, uint16_t si_rnti, uint16_t ra_rnti, uint16_t p_rnti, LTE_DL_UE_HARQ_t * pdlsch0_harq) +{ + uint32_t rballoc = pdci_info_extarcted->rballoc; + + uint8_t NPRB = 0; + uint32_t RIV_max = 0; + + // I- check dci content minimum coherency + + if ((rnti != si_rnti) && (rnti != p_rnti) && (rnti != ra_rnti)) + return (0); + + switch (N_RB_DL) { + case 6: + NPRB = RIV2nb_rb_LUT6[rballoc]; //NPRB; + RIV_max = RIV_max6; + break; + case 25: + NPRB = RIV2nb_rb_LUT25[rballoc]; //NPRB; + RIV_max = RIV_max25; + break; + case 50: + NPRB = RIV2nb_rb_LUT50[rballoc]; //NPRB; + RIV_max = RIV_max50; + break; + case 100: + NPRB = RIV2nb_rb_LUT100[rballoc]; //NPRB; + RIV_max = RIV_max100; + break; + } + + if (rballoc > RIV_max) { + // DCI false detection + return (0); + } + + if (NPRB == 0) { + // DCI false detection + return (0); + } + + return (1); +} + +int +check_dci_format2_2a_coherency (DCI_format_t dci_format, + uint8_t N_RB_DL, + DCI_INFO_EXTRACTED_t * pdci_info_extarcted, + uint16_t rnti, uint16_t si_rnti, uint16_t ra_rnti, uint16_t p_rnti, LTE_DL_UE_HARQ_t * pdlsch0_harq, LTE_DL_UE_HARQ_t * pdlsch1_harq) +{ + uint8_t rah = pdci_info_extarcted->rah; + uint8_t mcs1 = pdci_info_extarcted->mcs1; + uint8_t mcs2 = pdci_info_extarcted->mcs2; + uint8_t rv1 = pdci_info_extarcted->rv1; + uint8_t rv2 = pdci_info_extarcted->rv2; + uint8_t harq_pid = pdci_info_extarcted->harq_pid; + uint32_t rballoc = pdci_info_extarcted->rballoc; + +#ifdef DEBUG_DCI + uint8_t ndi1 = pdci_info_extarcted->ndi1; + uint8_t ndi2 = pdci_info_extarcted->ndi2; +#endif + + uint8_t NPRB = 0; + long long RIV_max = 0; + +#ifdef DEBUG_DCI + LOG_I (PHY, "extarcted dci - dci_format %d \n", dci_format); + LOG_I (PHY, "extarcted dci - rnti %d \n", rnti); + LOG_I (PHY, "extarcted dci - rah %d \n", rah); + LOG_I (PHY, "extarcted dci - mcs1 %d \n", mcs1); + LOG_I (PHY, "extarcted dci - mcs2 %d \n", mcs2); + LOG_I (PHY, "extarcted dci - rv1 %d \n", rv1); + LOG_I (PHY, "extarcted dci - rv2 %d \n", rv2); + //LOG_I(PHY, "extarcted dci - ndi1 %d \n", ndi1); + //LOG_I(PHY, "extarcted dci - ndi2 %d \n", ndi2); + LOG_I (PHY, "extarcted dci - rballoc %x \n", rballoc); + LOG_I (PHY, "extarcted dci - harq pid %d \n", harq_pid); + LOG_I (PHY, "extarcted dci - round0 %d \n", pdlsch0_harq->round); + LOG_I (PHY, "extarcted dci - round1 %d \n", pdlsch1_harq->round); +#endif + + // I- check dci content minimum coherency + if (harq_pid >= 8) { + LOG_I (PHY, "bad harq pid\n"); + return (0); + } + + if ((rnti == si_rnti) || (rnti == p_rnti) || (rnti == ra_rnti)) { + LOG_I (PHY, "bad rnti\n"); + return (0); + } + + + if (mcs1 > 28) { + if (pdlsch0_harq->round == 0) { + LOG_I (PHY, "bad mcs1\n"); + return (0); + } + } + + if (mcs2 > 28) { + if (pdlsch1_harq->round == 0) { + LOG_I (PHY, "bad mcs2\n"); + return (0); + } + } + + + if ((pdlsch0_harq->round == 0) && (rv1 > 0) && (mcs1 != 0)) { + // DCI false detection + LOG_I (PHY, "bad rv1\n"); + return (0); + } + + if ((pdlsch1_harq->round == 0) && (rv2 > 0) && (mcs2 != 0)) { + // DCI false detection + LOG_I (PHY, "bad rv2\n"); + return (0); + } + + + switch (N_RB_DL) { + case 6: + if (rah == 0) { + //RBG = 1; + RIV_max = 0x3F; + } else { + RIV_max = RIV_max6; + } + break; + case 25: + if (rah == 0) { + //RBG = 2; + RIV_max = 0x1FFF; + } else { + RIV_max = RIV_max25; + } + break; + case 50: + if (rah == 0) { + //RBG = 3; + RIV_max = 0x1FFFF; + } else { + RIV_max = RIV_max50; + } + break; + case 100: + if (rah == 0) { + //RBG = 4; + RIV_max = 0x1FFFFFF; + } else { + RIV_max = RIV_max100; + } + break; + } + + NPRB = conv_nprb (rah, rballoc, N_RB_DL); + + + + if ((rballoc > RIV_max) && (rah == 1)) { + // DCI false detection + LOG_I (PHY, "bad rballoc %d RIV_max %lld\n", rballoc, RIV_max); + return (0); + } + + if (NPRB == 0) { + // DCI false detection + LOG_I (PHY, "bad NPRB\n"); + return (0); + } + + return (1); +} + +void +compute_llr_offset (LTE_DL_FRAME_PARMS * frame_parms, LTE_UE_PDCCH * pdcch_vars, LTE_UE_PDSCH * pdsch_vars, LTE_DL_UE_HARQ_t * dlsch0_harq, uint8_t nb_rb_alloc, uint8_t subframe) +{ + uint32_t pbch_pss_sss_re; + uint32_t crs_re; + uint32_t granted_re; + uint32_t data_re; + uint32_t llr_offset; + uint8_t symbol; + uint8_t symbol_mod; + + pdsch_vars->llr_offset[pdcch_vars->num_pdcch_symbols] = 0; + + //LOG_I(PHY,"compute_llr_offset: nb RB %d - Qm %d \n", nb_rb_alloc, dlsch0_harq->Qm); + + //dlsch0_harq->rb_alloc_even; + //dlsch0_harq->rb_alloc_odd; + + for (symbol = pdcch_vars->num_pdcch_symbols; symbol < frame_parms->symbols_per_tti; symbol++) { + symbol_mod = (symbol >= (7 - frame_parms->Ncp)) ? (symbol - (7 - frame_parms->Ncp)) : symbol; + if ((symbol_mod == 0) || symbol_mod == (4 - frame_parms->Ncp)) { + if (frame_parms->nb_antennas_tx == 2) + crs_re = 4; + else + crs_re = 2; + } else { + crs_re = 0; + } + + granted_re = nb_rb_alloc * (12 - crs_re); + pbch_pss_sss_re = adjust_G2 (frame_parms, dlsch0_harq->rb_alloc_even, dlsch0_harq->Qm, subframe, symbol); + pbch_pss_sss_re = (double) pbch_pss_sss_re *((double) (12 - crs_re) / 12); + data_re = granted_re - pbch_pss_sss_re; + llr_offset = data_re * dlsch0_harq->Qm * 2; + + pdsch_vars->llr_length[symbol] = data_re; + if (symbol < (frame_parms->symbols_per_tti - 1)) + pdsch_vars->llr_offset[symbol + 1] = pdsch_vars->llr_offset[symbol] + llr_offset; + + //LOG_I(PHY,"Granted Re subframe %d / symbol %d => %d (%d RBs)\n", subframe, symbol_mod, granted_re,dlsch0_harq->nb_rb); + //LOG_I(PHY,"Pbch/PSS/SSS Re subframe %d / symbol %d => %d \n", subframe, symbol_mod, pbch_pss_sss_re); + //LOG_I(PHY,"CRS Re Per PRB subframe %d / symbol %d => %d \n", subframe, symbol_mod, crs_re); + //LOG_I(PHY,"Data Re subframe %d / symbol %d => %d \n", subframe, symbol_mod, data_re); + + + + //LOG_I(PHY,"Data Re subframe %d-symbol %d => llr length %d, llr offset %d \n", subframe, symbol, + // pdsch_vars->llr_length[symbol], pdsch_vars->llr_offset[symbol]); + } +} + +void +prepare_dl_decoding_format1_1A (DCI_format_t dci_format, + uint8_t N_RB_DL, + DCI_INFO_EXTRACTED_t * pdci_info_extarcted, + LTE_DL_FRAME_PARMS * frame_parms, + LTE_UE_PDCCH * pdcch_vars, + LTE_UE_PDSCH * pdsch_vars, + uint8_t subframe, uint16_t rnti, uint16_t tc_rnti, uint16_t si_rnti, uint16_t ra_rnti, uint16_t p_rnti, LTE_DL_UE_HARQ_t * pdlsch0_harq, LTE_UE_DLSCH_t * pdlsch0) +{ + + uint8_t harq_pid = pdci_info_extarcted->harq_pid; + uint8_t vrb_type = pdci_info_extarcted->vrb_type; + uint32_t rballoc = pdci_info_extarcted->rballoc; + uint8_t mcs1 = pdci_info_extarcted->mcs1; + uint8_t rv1 = pdci_info_extarcted->rv1; + uint8_t ndi1 = pdci_info_extarcted->ndi1; + uint8_t TPC = pdci_info_extarcted->TPC; + uint8_t rah = pdci_info_extarcted->rah; + uint8_t dai = pdci_info_extarcted->dai; + + + uint8_t NPRB = 0; + uint8_t NPRB4TBS = 0; + uint8_t nb_rb_alloc = 0; + + if (dci_format == format1A) { + switch (N_RB_DL) { + case 6: + NPRB = RIV2nb_rb_LUT6[rballoc]; + break; + case 25: + NPRB = RIV2nb_rb_LUT25[rballoc]; + break; + case 50: + NPRB = RIV2nb_rb_LUT50[rballoc]; + break; + case 100: + NPRB = RIV2nb_rb_LUT100[rballoc]; + break; + } + if ((rnti == si_rnti) || (rnti == p_rnti) || (rnti == ra_rnti)) { + NPRB4TBS = (TPC & 1) + 2; + } else { + NPRB4TBS = NPRB; + /* + switch (N_RB_DL) { + case 6: + NPRB = RIV2nb_rb_LUT6[rballoc];//NPRB; + break; + case 25: + NPRB = RIV2nb_rb_LUT25[rballoc];//NPRB; + break; + case 50: + NPRB = RIV2nb_rb_LUT50[rballoc];//NPRB; + break; + case 100: + NPRB = RIV2nb_rb_LUT100[rballoc];//NPRB; + break; + } + + */ + nb_rb_alloc = NPRB; + } + } else // format1 + { + NPRB = conv_nprb (rah, rballoc, N_RB_DL); + NPRB4TBS = NPRB; + nb_rb_alloc = NPRB; + } + + pdlsch0->current_harq_pid = harq_pid; + pdlsch0->active = 1; + pdlsch0->rnti = rnti; + if (dci_format == format1A) + pdlsch0->harq_ack[subframe].vDAI_DL = dai + 1; + + if ((rnti == si_rnti) || (rnti == p_rnti) || (rnti == ra_rnti)) { + pdlsch0_harq->round = 0; + pdlsch0_harq->status = ACTIVE; + } else //CRNTI + { + if (rnti == tc_rnti) { + //fix for standalone Contention Resolution Id + pdlsch0_harq->DCINdi = (uint8_t) - 1; + LOG_D (PHY, "UE (%x/%d): Format1A DCI: C-RNTI is temporary. Set NDI = %d and to be ignored\n", rnti, harq_pid, pdlsch0_harq->DCINdi); + } + // NDI has been toggled or this is the first transmission + if ((ndi1 != pdlsch0_harq->DCINdi) || (pdlsch0_harq->first_tx == 1)) { + pdlsch0_harq->round = 0; + pdlsch0_harq->first_tx = 0; + pdlsch0_harq->status = ACTIVE; + + } else if (rv1 != 0) + //NDI has not been toggled but rv was increased by eNB: retransmission + { + if (pdlsch0_harq->status == SCH_IDLE) + //packet was actually decoded in previous transmission (ACK was missed by eNB) + //However, the round is not a good check as it might have been decoded in a retransmission prior to this one. + { + LOG_D (PHY, "skip pdsch decoding and report ack\n"); + // skip pdsch decoding and report ack + //pdlsch0_harq->status = SCH_IDLE; + pdlsch0->active = 0; + pdlsch0->harq_ack[subframe].ack = 1; + pdlsch0->harq_ack[subframe].harq_id = harq_pid; + pdlsch0->harq_ack[subframe].send_harq_status = 1; + + //pdlsch0_harq->first_tx = 0; + } else //normal retransmission + { + // nothing special to do + } + } else { + pdlsch0_harq->status = ACTIVE; + } + } + + pdlsch0_harq->DCINdi = ndi1; + pdlsch0_harq->mcs = mcs1; + pdlsch0_harq->rvidx = rv1; + pdlsch0_harq->nb_rb = NPRB; + + pdlsch0_harq->codeword = 0; + pdlsch0_harq->Nl = 1; + pdlsch0_harq->mimo_mode = frame_parms->nb_antenna_ports_eNB == 1 ? SISO : ALAMOUTI; + pdlsch0_harq->dl_power_off = 1; //no power offset + pdlsch0_harq->delta_PUCCH = delta_PUCCH_lut[TPC & 3]; + + // compute resource allocation + if (dci_format == format1A) { + switch (N_RB_DL) { + case 6: + if (vrb_type == LOCALIZED) { + pdlsch0_harq->rb_alloc_even[0] = localRIV2alloc_LUT6[rballoc]; + pdlsch0_harq->rb_alloc_odd[0] = localRIV2alloc_LUT6[rballoc]; + } else { + pdlsch0_harq->rb_alloc_even[0] = distRIV2alloc_even_LUT6[rballoc]; + pdlsch0_harq->rb_alloc_odd[0] = distRIV2alloc_odd_LUT6[rballoc]; + } + break; + + case 25: + if (vrb_type == LOCALIZED) { + pdlsch0_harq->rb_alloc_even[0] = localRIV2alloc_LUT25[rballoc]; + pdlsch0_harq->rb_alloc_odd[0] = localRIV2alloc_LUT25[rballoc]; + } else { + pdlsch0_harq->rb_alloc_even[0] = distRIV2alloc_even_LUT25[rballoc]; + pdlsch0_harq->rb_alloc_odd[0] = distRIV2alloc_odd_LUT25[rballoc]; + } + break; + + case 50: + if (vrb_type == LOCALIZED) { + pdlsch0_harq->rb_alloc_even[0] = localRIV2alloc_LUT50_0[rballoc]; + pdlsch0_harq->rb_alloc_even[1] = localRIV2alloc_LUT50_1[rballoc]; + pdlsch0_harq->rb_alloc_odd[0] = localRIV2alloc_LUT50_0[rballoc]; + pdlsch0_harq->rb_alloc_odd[1] = localRIV2alloc_LUT50_1[rballoc]; + printf ("rballoc: %08x.%08x\n", pdlsch0_harq->rb_alloc_even[0], pdlsch0_harq->rb_alloc_even[1]); + } else { // DISTRIBUTED + if ((rballoc & (1 << 10)) == 0) { + rballoc = rballoc & (~(1 << 10)); + pdlsch0_harq->rb_alloc_even[0] = distRIV2alloc_gap0_even_LUT50_0[rballoc]; + pdlsch0_harq->rb_alloc_even[1] = distRIV2alloc_gap0_even_LUT50_1[rballoc]; + pdlsch0_harq->rb_alloc_odd[0] = distRIV2alloc_gap0_odd_LUT50_0[rballoc]; + pdlsch0_harq->rb_alloc_odd[1] = distRIV2alloc_gap0_odd_LUT50_1[rballoc]; + } else { + rballoc = rballoc & (~(1 << 10)); + pdlsch0_harq->rb_alloc_even[0] = distRIV2alloc_gap0_even_LUT50_0[rballoc]; + pdlsch0_harq->rb_alloc_even[1] = distRIV2alloc_gap0_even_LUT50_1[rballoc]; + pdlsch0_harq->rb_alloc_odd[0] = distRIV2alloc_gap0_odd_LUT50_0[rballoc]; + pdlsch0_harq->rb_alloc_odd[1] = distRIV2alloc_gap0_odd_LUT50_1[rballoc]; + } + } + break; + + case 100: + if (vrb_type == LOCALIZED) { + pdlsch0_harq->rb_alloc_even[0] = localRIV2alloc_LUT100_0[rballoc]; + pdlsch0_harq->rb_alloc_even[1] = localRIV2alloc_LUT100_1[rballoc]; + pdlsch0_harq->rb_alloc_even[2] = localRIV2alloc_LUT100_2[rballoc]; + pdlsch0_harq->rb_alloc_even[3] = localRIV2alloc_LUT100_3[rballoc]; + pdlsch0_harq->rb_alloc_odd[0] = localRIV2alloc_LUT100_0[rballoc]; + pdlsch0_harq->rb_alloc_odd[1] = localRIV2alloc_LUT100_1[rballoc]; + pdlsch0_harq->rb_alloc_odd[2] = localRIV2alloc_LUT100_2[rballoc]; + pdlsch0_harq->rb_alloc_odd[3] = localRIV2alloc_LUT100_3[rballoc]; + } else { + if ((rballoc & (1 << 10)) == 0) { //Gap 1 + rballoc = rballoc & (~(1 << 12)); + pdlsch0_harq->rb_alloc_even[0] = distRIV2alloc_gap0_even_LUT100_0[rballoc]; + pdlsch0_harq->rb_alloc_even[1] = distRIV2alloc_gap0_even_LUT100_1[rballoc]; + pdlsch0_harq->rb_alloc_even[2] = distRIV2alloc_gap0_even_LUT100_2[rballoc]; + pdlsch0_harq->rb_alloc_even[3] = distRIV2alloc_gap0_even_LUT100_3[rballoc]; + pdlsch0_harq->rb_alloc_odd[0] = distRIV2alloc_gap0_odd_LUT100_0[rballoc]; + pdlsch0_harq->rb_alloc_odd[1] = distRIV2alloc_gap0_odd_LUT100_1[rballoc]; + pdlsch0_harq->rb_alloc_odd[2] = distRIV2alloc_gap0_odd_LUT100_2[rballoc]; + pdlsch0_harq->rb_alloc_odd[3] = distRIV2alloc_gap0_odd_LUT100_3[rballoc]; + } else { //Gap 2 + rballoc = rballoc & (~(1 << 12)); + pdlsch0_harq->rb_alloc_even[0] = distRIV2alloc_gap1_even_LUT100_0[rballoc]; + pdlsch0_harq->rb_alloc_even[1] = distRIV2alloc_gap1_even_LUT100_1[rballoc]; + pdlsch0_harq->rb_alloc_even[2] = distRIV2alloc_gap1_even_LUT100_2[rballoc]; + pdlsch0_harq->rb_alloc_even[3] = distRIV2alloc_gap1_even_LUT100_3[rballoc]; + pdlsch0_harq->rb_alloc_odd[0] = distRIV2alloc_gap1_odd_LUT100_0[rballoc]; + pdlsch0_harq->rb_alloc_odd[1] = distRIV2alloc_gap1_odd_LUT100_1[rballoc]; + pdlsch0_harq->rb_alloc_odd[2] = distRIV2alloc_gap1_odd_LUT100_2[rballoc]; + pdlsch0_harq->rb_alloc_odd[3] = distRIV2alloc_gap1_odd_LUT100_3[rballoc]; + } + } + break; + } + } else // format1 + { + conv_rballoc (rah, rballoc, frame_parms->N_RB_DL, pdlsch0_harq->rb_alloc_even); + pdlsch0_harq->rb_alloc_odd[0] = pdlsch0_harq->rb_alloc_even[0]; + pdlsch0_harq->rb_alloc_odd[1] = pdlsch0_harq->rb_alloc_even[1]; + pdlsch0_harq->rb_alloc_odd[2] = pdlsch0_harq->rb_alloc_even[2]; + pdlsch0_harq->rb_alloc_odd[3] = pdlsch0_harq->rb_alloc_even[3]; + } + if ((rnti == si_rnti) || (rnti == p_rnti) || (rnti == ra_rnti)) { + pdlsch0_harq->TBS = TBStable[mcs1][NPRB4TBS - 1]; + pdlsch0_harq->Qm = 2; + } else { + if (mcs1 < 29) { + pdlsch0_harq->TBS = TBStable[get_I_TBS (mcs1)][NPRB4TBS - 1]; + pdlsch0_harq->Qm = get_Qm (mcs1); + } + } + + compute_llr_offset (frame_parms, pdcch_vars, pdsch_vars, pdlsch0_harq, nb_rb_alloc, subframe); +} + +void +prepare_dl_decoding_format1C (uint8_t N_RB_DL, + DCI_INFO_EXTRACTED_t * pdci_info_extarcted, + LTE_DL_FRAME_PARMS * frame_parms, + LTE_UE_PDCCH * pdcch_vars, + LTE_UE_PDSCH * pdsch_vars, + uint32_t rnti, uint32_t si_rnti, uint32_t ra_rnti, uint32_t p_rnti, uint32_t frame, uint8_t subframe, LTE_DL_UE_HARQ_t * pdlsch0_harq, LTE_UE_DLSCH_t * pdlsch0) +{ + + uint8_t harq_pid = pdci_info_extarcted->harq_pid; + uint32_t rballoc = pdci_info_extarcted->rballoc; + uint8_t mcs1 = pdci_info_extarcted->mcs1; + uint8_t Ngap = pdci_info_extarcted->Ngap; + + pdlsch0_harq->round = 0; + pdlsch0_harq->first_tx = 1; + pdlsch0_harq->vrb_type = DISTRIBUTED; + + if (rnti == si_rnti) { // rule from Section 5.3.1 of 36.321 + if (((frame & 1) == 0) && (subframe == 5)) + pdlsch0_harq->rvidx = (((3 * ((frame >> 1) & 3)) + 1) >> 1) & 3; // SIB1 + else + pdlsch0_harq->rvidx = (((3 * (subframe & 3)) + 1) >> 1) & 3; // other SIBs + } else if ((rnti == p_rnti) || (rnti == ra_rnti)) { // Section 7.1.7.3 + pdlsch0_harq->rvidx = 0; + } + + + pdlsch0_harq->Nl = 1; + pdlsch0_harq->mimo_mode = frame_parms->nb_antenna_ports_eNB == 1 ? SISO : ALAMOUTI; + pdlsch0_harq->dl_power_off = 1; //no power offset + + pdlsch0_harq->codeword = 0; + pdlsch0_harq->mcs = mcs1; + pdlsch0_harq->TBS = TBStable1C[mcs1]; + pdlsch0_harq->Qm = 2; + + + pdlsch0->current_harq_pid = harq_pid; + pdlsch0->active = 1; + pdlsch0->rnti = rnti; + + switch (N_RB_DL) { + case 6: + pdlsch0_harq->nb_rb = RIV2nb_rb_LUT6[rballoc]; + pdlsch0_harq->rb_alloc_even[0] = distRIV2alloc_even_LUT6[rballoc]; + pdlsch0_harq->rb_alloc_odd[0] = distRIV2alloc_odd_LUT6[rballoc]; + + break; + + case 25: + pdlsch0_harq->nb_rb = RIV2nb_rb_LUT25[rballoc]; + pdlsch0_harq->rb_alloc_even[0] = distRIV2alloc_even_LUT25[rballoc]; + pdlsch0_harq->rb_alloc_odd[0] = distRIV2alloc_odd_LUT25[rballoc]; + break; + + case 50: + pdlsch0_harq->nb_rb = RIV2nb_rb_LUT50[rballoc]; + if (Ngap == 0) { + pdlsch0_harq->rb_alloc_even[0] = distRIV2alloc_gap0_even_LUT50_0[rballoc]; + pdlsch0_harq->rb_alloc_odd[0] = distRIV2alloc_gap0_odd_LUT50_0[rballoc]; + pdlsch0_harq->rb_alloc_even[1] = distRIV2alloc_gap0_even_LUT50_1[rballoc]; + pdlsch0_harq->rb_alloc_odd[1] = distRIV2alloc_gap0_odd_LUT50_1[rballoc]; + } else { + pdlsch0_harq->rb_alloc_even[0] = distRIV2alloc_gap1_even_LUT50_0[rballoc]; + pdlsch0_harq->rb_alloc_odd[0] = distRIV2alloc_gap1_odd_LUT50_0[rballoc]; + pdlsch0_harq->rb_alloc_even[1] = distRIV2alloc_gap1_even_LUT50_1[rballoc]; + pdlsch0_harq->rb_alloc_odd[1] = distRIV2alloc_gap1_odd_LUT50_1[rballoc]; + } + break; + + case 100: + pdlsch0_harq->nb_rb = RIV2nb_rb_LUT100[rballoc]; + if (Ngap == 0) { + pdlsch0_harq->rb_alloc_even[0] = distRIV2alloc_gap0_even_LUT100_0[rballoc]; + pdlsch0_harq->rb_alloc_odd[0] = distRIV2alloc_gap0_odd_LUT100_0[rballoc]; + pdlsch0_harq->rb_alloc_even[1] = distRIV2alloc_gap0_even_LUT100_1[rballoc]; + pdlsch0_harq->rb_alloc_odd[1] = distRIV2alloc_gap0_odd_LUT100_1[rballoc]; + pdlsch0_harq->rb_alloc_even[2] = distRIV2alloc_gap0_even_LUT100_2[rballoc]; + pdlsch0_harq->rb_alloc_odd[2] = distRIV2alloc_gap0_odd_LUT100_2[rballoc]; + pdlsch0_harq->rb_alloc_even[3] = distRIV2alloc_gap0_even_LUT100_3[rballoc]; + pdlsch0_harq->rb_alloc_odd[3] = distRIV2alloc_gap0_odd_LUT100_3[rballoc]; + } else { + pdlsch0_harq->rb_alloc_even[0] = distRIV2alloc_gap1_even_LUT100_0[rballoc]; + pdlsch0_harq->rb_alloc_odd[0] = distRIV2alloc_gap1_odd_LUT100_0[rballoc]; + pdlsch0_harq->rb_alloc_even[1] = distRIV2alloc_gap1_even_LUT100_1[rballoc]; + pdlsch0_harq->rb_alloc_odd[1] = distRIV2alloc_gap1_odd_LUT100_1[rballoc]; + pdlsch0_harq->rb_alloc_even[2] = distRIV2alloc_gap1_even_LUT100_2[rballoc]; + pdlsch0_harq->rb_alloc_odd[2] = distRIV2alloc_gap1_odd_LUT100_2[rballoc]; + pdlsch0_harq->rb_alloc_even[3] = distRIV2alloc_gap1_even_LUT100_3[rballoc]; + pdlsch0_harq->rb_alloc_odd[3] = distRIV2alloc_gap1_odd_LUT100_3[rballoc]; + } + break; + + default: + AssertFatal (0, "Format 1C: Unknown N_RB_DL %d\n", frame_parms->N_RB_DL); + break; + } + + compute_llr_offset (frame_parms, pdcch_vars, pdsch_vars, pdlsch0_harq, pdlsch0_harq->nb_rb, subframe); + +} + +void +compute_precoding_info_2cw (uint8_t tpmi, uint8_t tbswap, uint16_t pmi_alloc, LTE_DL_FRAME_PARMS * frame_parms, LTE_DL_UE_HARQ_t * dlsch0_harq, LTE_DL_UE_HARQ_t * dlsch1_harq) +{ + + switch (tpmi) { + case 0: + dlsch0_harq->mimo_mode = DUALSTREAM_UNIFORM_PRECODING1; + dlsch1_harq->mimo_mode = DUALSTREAM_UNIFORM_PRECODING1; + dlsch0_harq->pmi_alloc = pmi_extend (frame_parms, 0, 1); + dlsch1_harq->pmi_alloc = pmi_extend (frame_parms, 0, 1); + break; + case 1: + dlsch0_harq->mimo_mode = DUALSTREAM_UNIFORM_PRECODINGj; + dlsch1_harq->mimo_mode = DUALSTREAM_UNIFORM_PRECODINGj; + dlsch0_harq->pmi_alloc = pmi_extend (frame_parms, 1, 1); + dlsch1_harq->pmi_alloc = pmi_extend (frame_parms, 1, 1); + break; + case 2: // PUSCH precoding + dlsch0_harq->mimo_mode = DUALSTREAM_PUSCH_PRECODING; + dlsch1_harq->mimo_mode = DUALSTREAM_PUSCH_PRECODING; + if (tbswap == 0) { + dlsch0_harq->pmi_alloc = pmi_alloc; + dlsch1_harq->pmi_alloc = pmi_alloc ^ 0x1555; + } else { + dlsch1_harq->pmi_alloc = pmi_alloc; + dlsch0_harq->pmi_alloc = pmi_alloc ^ 0x1555; + } +#ifdef DEBUG_HARQ + printf ("\n \n compute_precoding_info_2cw pmi_alloc_new = %d\n", dlsch0_harq->pmi_alloc); +#endif + break; + default: + break; + } +} + +void +compute_precoding_info_1cw (uint8_t tpmi, uint16_t pmi_alloc, LTE_DL_FRAME_PARMS * frame_parms, LTE_DL_UE_HARQ_t * dlsch_harq) +{ + + switch (tpmi) { + case 0: + dlsch_harq->mimo_mode = ALAMOUTI; + break; + case 1: + dlsch_harq->mimo_mode = UNIFORM_PRECODING11; + dlsch_harq->pmi_alloc = pmi_extend (frame_parms, 0, 0); + break; + case 2: + dlsch_harq->mimo_mode = UNIFORM_PRECODING1m1; + dlsch_harq->pmi_alloc = pmi_extend (frame_parms, 1, 0); + break; + case 3: + dlsch_harq->mimo_mode = UNIFORM_PRECODING1j; + dlsch_harq->pmi_alloc = pmi_extend (frame_parms, 2, 0); + break; + case 4: + dlsch_harq->mimo_mode = UNIFORM_PRECODING1mj; + dlsch_harq->pmi_alloc = pmi_extend (frame_parms, 3, 0); + break; + case 5: + dlsch_harq->mimo_mode = PUSCH_PRECODING0; + dlsch_harq->pmi_alloc = pmi_alloc; //pmi_convert(frame_parms,dlsch0->pmi_alloc,0); + break; + case 6: + dlsch_harq->mimo_mode = PUSCH_PRECODING1; + dlsch_harq->pmi_alloc = pmi_alloc; //pmi_convert(frame_parms,dlsch0->pmi_alloc,1); + break; + } +#ifdef DEBUG_HARQ + printf ("[DCI UE] I am calling from the UE side pmi_alloc_new = %d with tpmi %d\n", dlsch_harq->pmi_alloc, tpmi); +#endif +} + +void +compute_precoding_info_format2A (uint8_t tpmi, uint8_t nb_antenna_ports_eNB, uint8_t tb0_active, uint8_t tb1_active, LTE_DL_UE_HARQ_t * dlsch0_harq, LTE_DL_UE_HARQ_t * dlsch1_harq) +{ + + dlsch0_harq->dl_power_off = 0; + dlsch1_harq->dl_power_off = 0; + + if (nb_antenna_ports_eNB == 2) { + if ((tb0_active == 1) && (tb1_active == 1)) { + dlsch0_harq->mimo_mode = LARGE_CDD; + dlsch1_harq->mimo_mode = LARGE_CDD; + dlsch0_harq->dl_power_off = 1; + dlsch1_harq->dl_power_off = 1; + } else { + dlsch0_harq->mimo_mode = ALAMOUTI; + dlsch1_harq->mimo_mode = ALAMOUTI; + } + } else if (nb_antenna_ports_eNB == 4) { // 4 antenna case + if ((tb0_active == 1) && (tb1_active == 1)) { + switch (tpmi) { + case 0: // one layer per transport block + dlsch0_harq->mimo_mode = LARGE_CDD; + dlsch1_harq->mimo_mode = LARGE_CDD; dlsch0_harq->dl_power_off = 1; dlsch1_harq->dl_power_off = 1; + break; - pdlsch0->current_harq_pid = harq_pid; - pdlsch0->harq_ack[subframe].harq_id = harq_pid; - pdlsch1->current_harq_pid = harq_pid; - pdlsch1->harq_ack[subframe].harq_id = harq_pid; + case 1: // one-layers on TB 0, two on TB 1 + dlsch0_harq->mimo_mode = LARGE_CDD; + dlsch1_harq->mimo_mode = LARGE_CDD; + dlsch1_harq->Nl = 2; + dlsch0_harq->dl_power_off = 1; + dlsch1_harq->dl_power_off = 1; + break; - // assume two CW are active - dlsch0_harq->status = ACTIVE; - dlsch1_harq->status = ACTIVE; - pdlsch0->active = 1; - pdlsch1->active = 1; - pdlsch0->rnti = rnti; - pdlsch1->rnti = rnti; + case 2: // two-layers on TB 0, two on TB 1 + dlsch0_harq->mimo_mode = LARGE_CDD; + dlsch1_harq->mimo_mode = LARGE_CDD; + dlsch0_harq->Nl = 2; + dlsch0_harq->dl_power_off = 1; + dlsch1_harq->dl_power_off = 1; + break; - - if (TB0_active && TB1_active && tbswap==1) { - dlsch0_harq->codeword = 1; - dlsch1_harq->codeword = 0; + case 3: // + LOG_E (PHY, "Illegal value (3) for TPMI in Format 2A DCI\n"); + break; } + } else if (tb0_active == 1) { + switch (tpmi) { + case 0: // one layer per transport block + dlsch0_harq->mimo_mode = ALAMOUTI; + dlsch1_harq->mimo_mode = ALAMOUTI; + break; + case 1: // two-layers on TB 0 + dlsch0_harq->mimo_mode = LARGE_CDD; + dlsch0_harq->Nl = 2; + dlsch0_harq->dl_power_off = 1; + break; - if (!TB0_active && TB1_active){ - dlsch1_harq->codeword = 0; + case 2: // two-layers on TB 0, two on TB 1 + case 3: // + LOG_E (PHY, "Illegal value %d for TPMI in Format 2A DCI with one transport block enabled\n", tpmi); + break; } + } else if (tb1_active == 1) { + switch (tpmi) { + case 0: // one layer per transport block + dlsch0_harq->mimo_mode = ALAMOUTI; + dlsch1_harq->mimo_mode = ALAMOUTI; + break; - if (TB0_active && !TB1_active){ - dlsch0_harq->codeword = 0; + case 1: // two-layers on TB 0 + dlsch1_harq->mimo_mode = LARGE_CDD; + dlsch1_harq->Nl = 2; + dlsch0_harq->dl_power_off = 1; + break; + + case 2: // two-layers on TB 0, two on TB 1 + case 3: // + LOG_E (PHY, "Illegal value %d for TPMI in Format 2A DCI with one transport block enabled\n", tpmi); + break; } + } + } + // printf("Format 2A: NPRB=%d (rballoc %x,mcs1 %d, mcs2 %d, frame_type %d N_RB_DL %d,active %d/%d)\n",NPRB,rballoc,mcs1,mcs2,frame_parms->frame_type,frame_parms->N_RB_DL,dlsch0->active,dlsch1->active); + //printf("UE (%x/%d): Subframe %d Format2A DCI: ndi1 %d, old_ndi1 %d, ndi2 %d, old_ndi2 %d (first tx1 %d, first tx2 %d) harq_status1 %d, harq_status2 %d\n",dlsch0->rnti,harq_pid,subframe,ndi,dlsch0_harq->DCINdi, + // dlsch0_harq->first_tx,dlsch1_harq->first_tx,dlsch0_harq->status,dlsch1_harq->status); + //printf("TBS0 %d, TBS1 %d\n",dlsch0_harq->TBS,dlsch1_harq->TBS); - - if (TB0_active==0) { - dlsch0_harq->status = SCH_IDLE; - pdlsch0->active = 0; - #ifdef DEBUG_HARQ - printf("[DCI UE]: TB0 is deactivated, retransmit TB1 transmit in TM6\n"); - #endif - } - - if (TB1_active==0) { - dlsch1_harq->status = SCH_IDLE; - pdlsch1->active = 0; - } - -#ifdef DEBUG_HARQ - printf("[DCI UE]: dlsch0_harq status %d , dlsch1_harq status %d\n", dlsch0_harq->status, dlsch1_harq->status); -#endif - - // compute resource allocation - if (TB0_active == 1){ - - dlsch0_harq->nb_rb = conv_nprb(rah, - rballoc, - frame_parms->N_RB_DL); - conv_rballoc(rah, - rballoc, - frame_parms->N_RB_DL, - dlsch0_harq->rb_alloc_even); - - dlsch0_harq->rb_alloc_odd[0]= dlsch0_harq->rb_alloc_even[0]; - dlsch0_harq->rb_alloc_odd[1]= dlsch0_harq->rb_alloc_even[1]; - dlsch0_harq->rb_alloc_odd[2]= dlsch0_harq->rb_alloc_even[2]; - dlsch0_harq->rb_alloc_odd[3]= dlsch0_harq->rb_alloc_even[3]; - - if (TB1_active == 1){ - dlsch1_harq->rb_alloc_even[0]= dlsch0_harq->rb_alloc_even[0]; - dlsch1_harq->rb_alloc_even[1]= dlsch0_harq->rb_alloc_even[1]; - dlsch1_harq->rb_alloc_even[2]= dlsch0_harq->rb_alloc_even[2]; - dlsch1_harq->rb_alloc_even[3]= dlsch0_harq->rb_alloc_even[3]; - dlsch1_harq->rb_alloc_odd[0] = dlsch0_harq->rb_alloc_odd[0]; - dlsch1_harq->rb_alloc_odd[1] = dlsch0_harq->rb_alloc_odd[1]; - dlsch1_harq->rb_alloc_odd[2] = dlsch0_harq->rb_alloc_odd[2]; - dlsch1_harq->rb_alloc_odd[3] = dlsch0_harq->rb_alloc_odd[3]; - - dlsch1_harq->nb_rb = dlsch0_harq->nb_rb; - - //dlsch0_harq->Nl = 1; - //dlsch1_harq->Nl = 1; - } - } else if ((TB0_active == 0) && (TB1_active == 1)){ - - conv_rballoc(rah, - rballoc, - frame_parms->N_RB_DL, - dlsch1_harq->rb_alloc_even); - - dlsch1_harq->rb_alloc_odd[0]= dlsch1_harq->rb_alloc_even[0]; - dlsch1_harq->rb_alloc_odd[1]= dlsch1_harq->rb_alloc_even[1]; - dlsch1_harq->rb_alloc_odd[2]= dlsch1_harq->rb_alloc_even[2]; - dlsch1_harq->rb_alloc_odd[3]= dlsch1_harq->rb_alloc_even[3]; - dlsch1_harq->nb_rb = conv_nprb(rah, - rballoc, - frame_parms->N_RB_DL); - } - - - // compute precoding matrix + mimo mode - if(dci_format == format2) - { - if ((TB0_active) && (TB1_active)){ //two CW active - compute_precoding_info_2cw(tpmi, tbswap, pdlsch0->pmi_alloc,frame_parms, dlsch0_harq, dlsch1_harq); - - // printf("[DCI UE 1]: dlsch0_harq status %d , dlsch1_harq status %d\n", dlsch0_harq->status, dlsch1_harq->status); - } else if ((TB0_active) && (!TB1_active)) { // only CW 0 active - compute_precoding_info_1cw(tpmi, pdlsch0->pmi_alloc, frame_parms, dlsch0_harq); - } else { - compute_precoding_info_1cw(tpmi, pdlsch1->pmi_alloc, frame_parms, dlsch1_harq); - // printf("I am doing compute_precoding_info_1cw with tpmi %d \n", tpmi); - } - //printf(" UE DCI harq0 MIMO mode = %d\n", dlsch0_harq->mimo_mode); - if ((frame_parms->nb_antenna_ports_eNB == 1) && (TB0_active)) - dlsch0_harq->mimo_mode = SISO; - } - else - { - compute_precoding_info_format2A( tpmi, - frame_parms->nb_antenna_ports_eNB, - TB0_active, - TB1_active, - dlsch0_harq, - dlsch1_harq); - } - // printf("[DCI UE 2]: dlsch0_harq status %d , dlsch1_harq status %d\n", dlsch0_harq->status, dlsch1_harq->status); - // reset round + compute Qm - if (TB0_active) { - // printf("TB0 ndi1 =%d, dlsch0_harq->DCINdi =%d, dlsch0_harq->first_tx = %d\n", ndi1, dlsch0_harq->DCINdi, dlsch0_harq->first_tx); - if ((ndi1!=dlsch0_harq->DCINdi) || (dlsch0_harq->first_tx==1)) { - dlsch0_harq->round = 0; - dlsch0_harq->status = ACTIVE; - dlsch0_harq->DCINdi = ndi1; - - //LOG_I(PHY,"[UE] DLSCH: New Data Indicator CW0 subframe %d (pid %d, round %d)\n", - // subframe,harq_pid,dlsch0_harq->round); - if ( dlsch0_harq->first_tx==1) { - LOG_D(PHY,"Format 2 DCI First TX0: Clearing flag\n"); - dlsch0_harq->first_tx = 0; - } - } - /*else if (rv1 != 0 ) - //NDI has not been toggled but rv was increased by eNB: retransmission - { - if(dlsch0_harq->status == SCH_IDLE) { - // skip pdsch decoding and report ack - //dlsch0_harq->status = SCH_IDLE; - pdlsch0->active = 0; - pdlsch0->harq_ack[subframe].ack = 1; - pdlsch0->harq_ack[subframe].harq_id = harq_pid; - pdlsch0->harq_ack[subframe].send_harq_status = 1; - }*/ - - // if Imcs in [29..31] TBS is assumed to be as determined from DCI transported in the latest - // PDCCH for the same trasport block using Imcs in [0 .. 28] - if(dlsch0_harq->mcs <= 28) - { - dlsch0_harq->TBS = TBStable[get_I_TBS(dlsch0_harq->mcs)][dlsch0_harq->nb_rb-1]; - LOG_D(PHY,"[UE] DLSCH: New TBS CW0 subframe %d (pid %d, round %d) TBS %d \n", - subframe,harq_pid,dlsch0_harq->round, dlsch0_harq->TBS); - } - else - { - LOG_D(PHY,"[UE] DLSCH: Keep the same TBS CW0 subframe %d (pid %d, round %d) TBS %d \n", - subframe,harq_pid,dlsch0_harq->round, dlsch0_harq->TBS); - } - //if(dlsch0_harq->Nl == 2) - //dlsch0_harq->TBS = TBStable[get_I_TBS(dlsch0_harq->mcs)][(dlsch0_harq->nb_rb<<1)-1]; - if (mcs1 <= 28) - dlsch0_harq->Qm = get_Qm(mcs1); - else if (mcs1<=31) - dlsch0_harq->Qm = (mcs1-28)<<1; - } - - // printf("[DCI UE 3]: dlsch0_harq status %d , dlsch1_harq status %d\n", dlsch0_harq->status, dlsch1_harq->status); - - if (TB1_active) { - // printf("TB1 ndi2 =%d, dlsch1_harq->DCINdi =%d, dlsch1_harq->first_tx = %d\n", ndi2, dlsch1_harq->DCINdi, dlsch1_harq->first_tx); - if ((ndi2!=dlsch1_harq->DCINdi) || (dlsch1_harq->first_tx==1)) { - dlsch1_harq->round = 0; - dlsch1_harq->status = ACTIVE; - dlsch1_harq->DCINdi = ndi2; - //LOG_I(PHY,"[UE] DLSCH: New Data Indicator CW1 subframe %d (pid %d, round %d)\n", - // subframe,harq_pid,dlsch0_harq->round); - if (dlsch1_harq->first_tx==1) { - LOG_D(PHY,"Format 2 DCI First TX1: Clearing flag\n"); - dlsch1_harq->first_tx = 0; - } - } - /*else if (rv1 != 0 ) - //NDI has not been toggled but rv was increased by eNB: retransmission - { - if(dlsch1_harq->status == SCH_IDLE) { - // skip pdsch decoding and report ack - //dlsch1_harq->status = SCH_IDLE; - pdlsch1->active = 0; - pdlsch1->harq_ack[subframe].ack = 1; - pdlsch1->harq_ack[subframe].harq_id = harq_pid; - pdlsch1->harq_ack[subframe].send_harq_status = 1; - } - }*/ - - // if Imcs in [29..31] TBS is assumed to be as determined from DCI transported in the latest - // PDCCH for the same trasport block using Imcs in [0 .. 28] - if(dlsch1_harq->mcs <= 28) - { - dlsch1_harq->TBS = TBStable[get_I_TBS(dlsch1_harq->mcs)][dlsch1_harq->nb_rb-1]; - LOG_D(PHY,"[UE] DLSCH: New TBS CW1 subframe %d (pid %d, round %d) TBS %d \n", - subframe,harq_pid,dlsch1_harq->round, dlsch1_harq->TBS); - } - else - { - LOG_D(PHY,"[UE] DLSCH: Keep the same TBS CW1 subframe %d (pid %d, round %d) TBS %d \n", - subframe,harq_pid,dlsch1_harq->round, dlsch1_harq->TBS); - } - if (mcs2 <= 28) - dlsch1_harq->Qm = get_Qm(mcs2); - else if (mcs1<=31) - dlsch1_harq->Qm = (mcs2-28)<<1; - } - - - compute_llr_offset(frame_parms, - pdcch_vars, - pdsch_vars, - dlsch0_harq, - dlsch0_harq->nb_rb, - subframe); - - - /* #ifdef DEBUG_HARQ - printf("[DCI UE]: dlsch0_harq status %d , dlsch1_harq status %d\n", dlsch0_harq->status, dlsch1_harq->status); - printf("[DCI UE]: TB0_active %d , TB1_active %d\n", TB0_active, TB1_active); - if (dlsch0 != NULL && dlsch1 != NULL) - printf("[DCI UE] dlsch0_harq status = %d, dlsch1_harq status = %d\n", dlsch0_harq->status, dlsch1_harq->status); - else if (dlsch0 == NULL && dlsch1 != NULL) - printf("[DCI UE] dlsch0_harq NULL dlsch1_harq status = %d\n", dlsch1_harq->status); - else if (dlsch0 != NULL && dlsch1 == NULL) - printf("[DCI UE] dlsch1_harq NULL dlsch0_harq status = %d\n", dlsch0_harq->status); - #endif*/ } -int generate_ue_dlsch_params_from_dci(int frame, - uint8_t subframe, - void *dci_pdu, - uint16_t rnti, - DCI_format_t dci_format, - LTE_UE_PDCCH *pdcch_vars, - LTE_UE_PDSCH *pdsch_vars, - LTE_UE_DLSCH_t **dlsch, - LTE_DL_FRAME_PARMS *frame_parms, - PDSCH_CONFIG_DEDICATED *pdsch_config_dedicated, - uint16_t si_rnti, - uint16_t ra_rnti, - uint16_t p_rnti, - uint8_t beamforming_mode, - uint16_t tc_rnti) +void +prepare_dl_decoding_format2_2A (DCI_format_t dci_format, + DCI_INFO_EXTRACTED_t * pdci_info_extarcted, + LTE_DL_FRAME_PARMS * frame_parms, + LTE_UE_PDCCH * pdcch_vars, + LTE_UE_PDSCH * pdsch_vars, + uint16_t rnti, uint8_t subframe, LTE_DL_UE_HARQ_t * dlsch0_harq, LTE_DL_UE_HARQ_t * dlsch1_harq, LTE_UE_DLSCH_t * pdlsch0, LTE_UE_DLSCH_t * pdlsch1) { - uint8_t harq_pid=0; - uint8_t frame_type=frame_parms->frame_type; - uint8_t tpmi=0; - LTE_UE_DLSCH_t *dlsch0=NULL,*dlsch1=NULL; - LTE_DL_UE_HARQ_t *dlsch0_harq=NULL,*dlsch1_harq=NULL; + uint8_t rah = pdci_info_extarcted->rah; + uint8_t mcs1 = pdci_info_extarcted->mcs1; + uint8_t mcs2 = pdci_info_extarcted->mcs2; + uint8_t rv1 = pdci_info_extarcted->rv1; + uint8_t rv2 = pdci_info_extarcted->rv2; + uint8_t harq_pid = pdci_info_extarcted->harq_pid; + uint32_t rballoc = pdci_info_extarcted->rballoc; + uint8_t tbswap = pdci_info_extarcted->tb_swap; + uint8_t tpmi = pdci_info_extarcted->tpmi; + uint8_t TPC = pdci_info_extarcted->TPC; + uint8_t ndi1 = pdci_info_extarcted->ndi1; + uint8_t ndi2 = pdci_info_extarcted->ndi2; - DCI_INFO_EXTRACTED_t dci_info_extarcted; - uint8_t status=0; + uint8_t TB0_active = 1; + uint8_t TB1_active = 1; - if (!dlsch[0]) return -1; + // printf("inside prepare pdlsch1->pmi_alloc %d \n",pdlsch1->pmi_alloc); - #ifdef DEBUG_DCI - LOG_D(PHY,"dci_tools.c: Filling ue dlsch params -> rnti %x, SFN/SF %d/%d, dci_format %s\n", - rnti, - frame%1024, - subframe, - (dci_format==format0? "Format 0":( - dci_format==format1? "format 1":( - dci_format==format1A? "format 1A":( - dci_format==format1B? "format 1B":( - dci_format==format1C? "format 1C":( - dci_format==format1D? "format 1D":( - dci_format==format1E_2A_M10PRB? "format 1E_2A_M10PRB":( - dci_format==format2? "format 2":( - dci_format==format2A? "format 2A":( - dci_format==format2B? "format 2B":( - dci_format==format2C? "format 2C":( - dci_format==format2D? "format 2D":( - dci_format==format3? "format 3": "UNKNOWN" - )))))))))))))); - #endif - memset(&dci_info_extarcted,0,sizeof(dci_info_extarcted)); - switch (dci_format) { + if ((rv1 == 1) && (mcs1 == 0)) { + TB0_active = 0; + } + if ((rv2 == 1) && (mcs2 == 0)) { + TB1_active = 0; + } +#ifdef DEBUG_HARQ + printf ("[DCI UE]: TB0 status %d , TB1 status %d\n", TB0_active, TB1_active); +#endif - case format0: // This is an ULSCH allocation so nothing here, inform MAC - LOG_E(PHY,"format0 not possible\n"); - return(-1); - break; + dlsch0_harq->mcs = mcs1; + dlsch1_harq->mcs = mcs2; + dlsch0_harq->rvidx = rv1; + dlsch1_harq->rvidx = rv2; + dlsch0_harq->DCINdi = ndi1; + dlsch1_harq->DCINdi = ndi2; - case format1A: + dlsch0_harq->codeword = 0; + dlsch1_harq->codeword = 1; + dlsch0_harq->Nl = 1; + dlsch1_harq->Nl = 1; + dlsch0_harq->delta_PUCCH = delta_PUCCH_lut[TPC & 3]; + dlsch1_harq->delta_PUCCH = delta_PUCCH_lut[TPC & 3]; + dlsch0_harq->dl_power_off = 1; + dlsch1_harq->dl_power_off = 1; + + pdlsch0->current_harq_pid = harq_pid; + pdlsch0->harq_ack[subframe].harq_id = harq_pid; + pdlsch1->current_harq_pid = harq_pid; + pdlsch1->harq_ack[subframe].harq_id = harq_pid; + + // assume two CW are active + dlsch0_harq->status = ACTIVE; + dlsch1_harq->status = ACTIVE; + pdlsch0->active = 1; + pdlsch1->active = 1; + pdlsch0->rnti = rnti; + pdlsch1->rnti = rnti; + + + if (TB0_active && TB1_active && tbswap == 1) { + dlsch0_harq->codeword = 1; + dlsch1_harq->codeword = 0; + } + + + if (!TB0_active && TB1_active) { + dlsch1_harq->codeword = 0; + } + + if (TB0_active && !TB1_active) { + dlsch0_harq->codeword = 0; + } + + + if (TB0_active == 0) { + dlsch0_harq->status = SCH_IDLE; + pdlsch0->active = 0; +#ifdef DEBUG_HARQ + printf ("[DCI UE]: TB0 is deactivated, retransmit TB1 transmit in TM6\n"); +#endif + } + + if (TB1_active == 0) { + dlsch1_harq->status = SCH_IDLE; + pdlsch1->active = 0; + } +#ifdef DEBUG_HARQ + printf ("[DCI UE]: dlsch0_harq status %d , dlsch1_harq status %d\n", dlsch0_harq->status, dlsch1_harq->status); +#endif + + // compute resource allocation + if (TB0_active == 1) { + + dlsch0_harq->nb_rb = conv_nprb (rah, rballoc, frame_parms->N_RB_DL); + conv_rballoc (rah, rballoc, frame_parms->N_RB_DL, dlsch0_harq->rb_alloc_even); + + dlsch0_harq->rb_alloc_odd[0] = dlsch0_harq->rb_alloc_even[0]; + dlsch0_harq->rb_alloc_odd[1] = dlsch0_harq->rb_alloc_even[1]; + dlsch0_harq->rb_alloc_odd[2] = dlsch0_harq->rb_alloc_even[2]; + dlsch0_harq->rb_alloc_odd[3] = dlsch0_harq->rb_alloc_even[3]; + + if (TB1_active == 1) { + dlsch1_harq->rb_alloc_even[0] = dlsch0_harq->rb_alloc_even[0]; + dlsch1_harq->rb_alloc_even[1] = dlsch0_harq->rb_alloc_even[1]; + dlsch1_harq->rb_alloc_even[2] = dlsch0_harq->rb_alloc_even[2]; + dlsch1_harq->rb_alloc_even[3] = dlsch0_harq->rb_alloc_even[3]; + dlsch1_harq->rb_alloc_odd[0] = dlsch0_harq->rb_alloc_odd[0]; + dlsch1_harq->rb_alloc_odd[1] = dlsch0_harq->rb_alloc_odd[1]; + dlsch1_harq->rb_alloc_odd[2] = dlsch0_harq->rb_alloc_odd[2]; + dlsch1_harq->rb_alloc_odd[3] = dlsch0_harq->rb_alloc_odd[3]; + + dlsch1_harq->nb_rb = dlsch0_harq->nb_rb; + + //dlsch0_harq->Nl = 1; + //dlsch1_harq->Nl = 1; + } + } else if ((TB0_active == 0) && (TB1_active == 1)) { + + conv_rballoc (rah, rballoc, frame_parms->N_RB_DL, dlsch1_harq->rb_alloc_even); + + dlsch1_harq->rb_alloc_odd[0] = dlsch1_harq->rb_alloc_even[0]; + dlsch1_harq->rb_alloc_odd[1] = dlsch1_harq->rb_alloc_even[1]; + dlsch1_harq->rb_alloc_odd[2] = dlsch1_harq->rb_alloc_even[2]; + dlsch1_harq->rb_alloc_odd[3] = dlsch1_harq->rb_alloc_even[3]; + dlsch1_harq->nb_rb = conv_nprb (rah, rballoc, frame_parms->N_RB_DL); + } + + // compute precoding matrix + mimo mode + if (dci_format == format2) { + if ((TB0_active) && (TB1_active)) { //two CW active + compute_precoding_info_2cw (tpmi, tbswap, pdlsch0->pmi_alloc, frame_parms, dlsch0_harq, dlsch1_harq); + + // printf("[DCI UE 1]: dlsch0_harq status %d , dlsch1_harq status %d\n", dlsch0_harq->status, dlsch1_harq->status); + } else if ((TB0_active) && (!TB1_active)) { // only CW 0 active + compute_precoding_info_1cw (tpmi, pdlsch0->pmi_alloc, frame_parms, dlsch0_harq); + } else { + compute_precoding_info_1cw (tpmi, pdlsch1->pmi_alloc, frame_parms, dlsch1_harq); + // printf("I am doing compute_precoding_info_1cw with tpmi %d \n", tpmi); + } + //printf(" UE DCI harq0 MIMO mode = %d\n", dlsch0_harq->mimo_mode); + if ((frame_parms->nb_antenna_ports_eNB == 1) && (TB0_active)) + dlsch0_harq->mimo_mode = SISO; + } else { + compute_precoding_info_format2A (tpmi, frame_parms->nb_antenna_ports_eNB, TB0_active, TB1_active, dlsch0_harq, dlsch1_harq); + } + // printf("[DCI UE 2]: dlsch0_harq status %d , dlsch1_harq status %d\n", dlsch0_harq->status, dlsch1_harq->status); + // reset round + compute Qm + if (TB0_active) { + // printf("TB0 ndi1 =%d, dlsch0_harq->DCINdi =%d, dlsch0_harq->first_tx = %d\n", ndi1, dlsch0_harq->DCINdi, dlsch0_harq->first_tx); + if ((ndi1 != dlsch0_harq->DCINdi) || (dlsch0_harq->first_tx == 1)) { + dlsch0_harq->round = 0; + dlsch0_harq->status = ACTIVE; + dlsch0_harq->DCINdi = ndi1; + + //LOG_I(PHY,"[UE] DLSCH: New Data Indicator CW0 subframe %d (pid %d, round %d)\n", + // subframe,harq_pid,dlsch0_harq->round); + if (dlsch0_harq->first_tx == 1) { + LOG_D (PHY, "Format 2 DCI First TX0: Clearing flag\n"); + dlsch0_harq->first_tx = 0; + } + } + /*else if (rv1 != 0 ) + //NDI has not been toggled but rv was increased by eNB: retransmission + { + if(dlsch0_harq->status == SCH_IDLE) { + // skip pdsch decoding and report ack + //dlsch0_harq->status = SCH_IDLE; + pdlsch0->active = 0; + pdlsch0->harq_ack[subframe].ack = 1; + pdlsch0->harq_ack[subframe].harq_id = harq_pid; + pdlsch0->harq_ack[subframe].send_harq_status = 1; + } */ + + // if Imcs in [29..31] TBS is assumed to be as determined from DCI transported in the latest + // PDCCH for the same trasport block using Imcs in [0 .. 28] + if (dlsch0_harq->mcs <= 28) { + dlsch0_harq->TBS = TBStable[get_I_TBS (dlsch0_harq->mcs)][dlsch0_harq->nb_rb - 1]; + LOG_D (PHY, "[UE] DLSCH: New TBS CW0 subframe %d (pid %d, round %d) TBS %d \n", subframe, harq_pid, dlsch0_harq->round, dlsch0_harq->TBS); + } else { + LOG_D (PHY, "[UE] DLSCH: Keep the same TBS CW0 subframe %d (pid %d, round %d) TBS %d \n", subframe, harq_pid, dlsch0_harq->round, dlsch0_harq->TBS); + } + //if(dlsch0_harq->Nl == 2) + //dlsch0_harq->TBS = TBStable[get_I_TBS(dlsch0_harq->mcs)][(dlsch0_harq->nb_rb<<1)-1]; + if (mcs1 <= 28) + dlsch0_harq->Qm = get_Qm (mcs1); + else if (mcs1 <= 31) + dlsch0_harq->Qm = (mcs1 - 28) << 1; + } + // printf("[DCI UE 3]: dlsch0_harq status %d , dlsch1_harq status %d\n", dlsch0_harq->status, dlsch1_harq->status); + + if (TB1_active) { + // printf("TB1 ndi2 =%d, dlsch1_harq->DCINdi =%d, dlsch1_harq->first_tx = %d\n", ndi2, dlsch1_harq->DCINdi, dlsch1_harq->first_tx); + if ((ndi2 != dlsch1_harq->DCINdi) || (dlsch1_harq->first_tx == 1)) { + dlsch1_harq->round = 0; + dlsch1_harq->status = ACTIVE; + dlsch1_harq->DCINdi = ndi2; + //LOG_I(PHY,"[UE] DLSCH: New Data Indicator CW1 subframe %d (pid %d, round %d)\n", + // subframe,harq_pid,dlsch0_harq->round); + if (dlsch1_harq->first_tx == 1) { + LOG_D (PHY, "Format 2 DCI First TX1: Clearing flag\n"); + dlsch1_harq->first_tx = 0; + } + } + /*else if (rv1 != 0 ) + //NDI has not been toggled but rv was increased by eNB: retransmission + { + if(dlsch1_harq->status == SCH_IDLE) { + // skip pdsch decoding and report ack + //dlsch1_harq->status = SCH_IDLE; + pdlsch1->active = 0; + pdlsch1->harq_ack[subframe].ack = 1; + pdlsch1->harq_ack[subframe].harq_id = harq_pid; + pdlsch1->harq_ack[subframe].send_harq_status = 1; + } + } */ + + // if Imcs in [29..31] TBS is assumed to be as determined from DCI transported in the latest + // PDCCH for the same trasport block using Imcs in [0 .. 28] + if (dlsch1_harq->mcs <= 28) { + dlsch1_harq->TBS = TBStable[get_I_TBS (dlsch1_harq->mcs)][dlsch1_harq->nb_rb - 1]; + LOG_D (PHY, "[UE] DLSCH: New TBS CW1 subframe %d (pid %d, round %d) TBS %d \n", subframe, harq_pid, dlsch1_harq->round, dlsch1_harq->TBS); + } else { + LOG_D (PHY, "[UE] DLSCH: Keep the same TBS CW1 subframe %d (pid %d, round %d) TBS %d \n", subframe, harq_pid, dlsch1_harq->round, dlsch1_harq->TBS); + } + if (mcs2 <= 28) + dlsch1_harq->Qm = get_Qm (mcs2); + else if (mcs1 <= 31) + dlsch1_harq->Qm = (mcs2 - 28) << 1; + } + + + compute_llr_offset (frame_parms, pdcch_vars, pdsch_vars, dlsch0_harq, dlsch0_harq->nb_rb, subframe); + + + /* #ifdef DEBUG_HARQ + printf("[DCI UE]: dlsch0_harq status %d , dlsch1_harq status %d\n", dlsch0_harq->status, dlsch1_harq->status); + printf("[DCI UE]: TB0_active %d , TB1_active %d\n", TB0_active, TB1_active); + if (dlsch0 != NULL && dlsch1 != NULL) + printf("[DCI UE] dlsch0_harq status = %d, dlsch1_harq status = %d\n", dlsch0_harq->status, dlsch1_harq->status); + else if (dlsch0 == NULL && dlsch1 != NULL) + printf("[DCI UE] dlsch0_harq NULL dlsch1_harq status = %d\n", dlsch1_harq->status); + else if (dlsch0 != NULL && dlsch1 == NULL) + printf("[DCI UE] dlsch1_harq NULL dlsch0_harq status = %d\n", dlsch0_harq->status); + #endif */ +} + +int +generate_ue_dlsch_params_from_dci (int frame, + uint8_t subframe, + void *dci_pdu, + uint16_t rnti, + DCI_format_t dci_format, + LTE_UE_PDCCH * pdcch_vars, + LTE_UE_PDSCH * pdsch_vars, + LTE_UE_DLSCH_t ** dlsch, + LTE_DL_FRAME_PARMS * frame_parms, + PDSCH_CONFIG_DEDICATED * pdsch_config_dedicated, uint16_t si_rnti, uint16_t ra_rnti, uint16_t p_rnti, uint8_t beamforming_mode, uint16_t tc_rnti) +{ + + uint8_t harq_pid = 0; + uint8_t frame_type = frame_parms->frame_type; + uint8_t tpmi = 0; + LTE_UE_DLSCH_t *dlsch0 = NULL, *dlsch1 = NULL; + LTE_DL_UE_HARQ_t *dlsch0_harq = NULL, *dlsch1_harq = NULL; + + DCI_INFO_EXTRACTED_t dci_info_extarcted; + uint8_t status = 0; + + if (!dlsch[0]) + return -1; + +#ifdef DEBUG_DCI + LOG_D (PHY, "dci_tools.c: Filling ue dlsch params -> rnti %x, SFN/SF %d/%d, dci_format %s\n", + rnti, + frame % 1024, + subframe, + (dci_format == + format0 ? "Format 0" : (dci_format == + format1 ? "format 1" : (dci_format == + format1A ? "format 1A" : (dci_format == + format1B ? "format 1B" : (dci_format == + format1C ? "format 1C" : (dci_format == + format1D ? "format 1D" : (dci_format == + format1E_2A_M10PRB ? + "format 1E_2A_M10PRB" : (dci_format == + format2 ? + "format 2" + : (dci_format + == + format2A ? + "format 2A" + : + (dci_format + == + format2B + ? + "format 2B" + : + (dci_format + == + format2C + ? + "format 2C" + : + (dci_format + == + format2D + ? + "format 2D" + : + (dci_format + == + format3 + ? + "format 3" + : + "UNKNOWN")))))))))))))); +#endif + + memset (&dci_info_extarcted, 0, sizeof (dci_info_extarcted)); + switch (dci_format) { + + case format0: // This is an ULSCH allocation so nothing here, inform MAC + LOG_E (PHY, "format0 not possible\n"); + return (-1); + break; + + case format1A: { // extract dci infomation #ifdef DEBUG_DCI - LOG_I(PHY,"[DCI-FORMAT-1A] AbsSubframe %d.%d extarct dci info \n", frame, subframe); + LOG_I (PHY, "[DCI-FORMAT-1A] AbsSubframe %d.%d extarct dci info \n", frame, subframe); #endif - extract_dci1A_info(frame_parms->N_RB_DL, - frame_type, - dci_pdu, - &dci_info_extarcted); + extract_dci1A_info (frame_parms->N_RB_DL, frame_type, dci_pdu, &dci_info_extarcted); // check dci content dlsch0 = dlsch[0]; dlsch0->active = 0; - dlsch0_harq = dlsch[0]->harq_processes[dci_info_extarcted.harq_pid]; + dlsch0_harq = dlsch[0]->harq_processes[dci_info_extarcted.harq_pid]; #ifdef DEBUG_DCI - LOG_I(PHY,"[DCI-FORMAT-1A] AbsSubframe %d.%d check dci coherency \n", frame, subframe); + LOG_I (PHY, "[DCI-FORMAT-1A] AbsSubframe %d.%d check dci coherency \n", frame, subframe); #endif - status = check_dci_format1_1a_coherency(format1A, - frame_parms->N_RB_DL, - rnti, - tc_rnti, - si_rnti, - ra_rnti, - p_rnti,frame,subframe, - &dci_info_extarcted, - dlsch0_harq); - if(status == 0) - { - printf("bad DCI 1A !!! \n"); - return(-1); + status = check_dci_format1_1a_coherency (format1A, frame_parms->N_RB_DL, rnti, tc_rnti, si_rnti, ra_rnti, p_rnti, frame, subframe, &dci_info_extarcted, dlsch0_harq); + if (status == 0) { + printf ("bad DCI 1A !!! \n"); + return (-1); } - // dci is correct ==> update internal structure and prepare dl decoding #ifdef DEBUG_DCI - LOG_I(PHY,"[DCI-FORMAT-1A] AbsSubframe %d.%d prepare dl decoding \n", frame, subframe); + LOG_I (PHY, "[DCI-FORMAT-1A] AbsSubframe %d.%d prepare dl decoding \n", frame, subframe); #endif - prepare_dl_decoding_format1_1A(format1A, - frame_parms->N_RB_DL, - &dci_info_extarcted, - frame_parms, - pdcch_vars, - pdsch_vars, - subframe, - rnti, - tc_rnti, - si_rnti, - ra_rnti, - p_rnti, - dlsch0_harq, - dlsch0); + prepare_dl_decoding_format1_1A (format1A, frame_parms->N_RB_DL, &dci_info_extarcted, frame_parms, pdcch_vars, pdsch_vars, subframe, rnti, tc_rnti, si_rnti, ra_rnti, p_rnti, dlsch0_harq, dlsch0); break; } - case format1C: + case format1C: { // extract dci infomation #ifdef DEBUG_DL_DECODING - LOG_I(PHY,"[DCI Format-1C] extact dci information \n"); + LOG_I (PHY, "[DCI Format-1C] extact dci information \n"); #endif - extract_dci1C_info(frame_parms->N_RB_DL, - frame_type, - dci_pdu, - &dci_info_extarcted); + extract_dci1C_info (frame_parms->N_RB_DL, frame_type, dci_pdu, &dci_info_extarcted); // check dci content #ifdef DEBUG_DL_DECODING - LOG_I(PHY,"[DCI Format-1C] check dci content \n"); + LOG_I (PHY, "[DCI Format-1C] check dci content \n"); #endif dlsch0 = dlsch[0]; dlsch0->active = 0; dlsch0_harq = dlsch[0]->harq_processes[dci_info_extarcted.harq_pid]; - status = check_dci_format1c_coherency(frame_parms->N_RB_DL, - &dci_info_extarcted, - rnti, - si_rnti, - ra_rnti, - p_rnti, - dlsch0_harq); - if(status == 0) - return(-1); + status = check_dci_format1c_coherency (frame_parms->N_RB_DL, &dci_info_extarcted, rnti, si_rnti, ra_rnti, p_rnti, dlsch0_harq); + if (status == 0) + return (-1); // dci is correct ==> update internal structure and prepare dl decoding #ifdef DEBUG_DL_DECODING - LOG_I(PHY,"[DCI Format-1C] prepare downlink decoding \n"); + LOG_I (PHY, "[DCI Format-1C] prepare downlink decoding \n"); #endif - prepare_dl_decoding_format1C(frame_parms->N_RB_DL, - &dci_info_extarcted, - frame_parms, - pdcch_vars, - pdsch_vars, - rnti, - si_rnti, - ra_rnti, - p_rnti, - frame, - subframe, - dlsch0_harq, - dlsch0); + prepare_dl_decoding_format1C (frame_parms->N_RB_DL, &dci_info_extarcted, frame_parms, pdcch_vars, pdsch_vars, rnti, si_rnti, ra_rnti, p_rnti, frame, subframe, dlsch0_harq, dlsch0); break; } - case format1: + case format1: { // extract dci infomation #ifdef DEBUG_DCI - LOG_I(PHY,"[DCI-FORMAT-1] AbsSubframe %d.%d extarct dci info \n", frame, subframe); + LOG_I (PHY, "[DCI-FORMAT-1] AbsSubframe %d.%d extarct dci info \n", frame, subframe); #endif - extract_dci1_info(frame_parms->N_RB_DL, - frame_type, - dci_pdu, - &dci_info_extarcted); + extract_dci1_info (frame_parms->N_RB_DL, frame_type, dci_pdu, &dci_info_extarcted); // check dci content dlsch0 = dlsch[0]; @@ -6029,403 +5683,324 @@ int generate_ue_dlsch_params_from_dci(int frame, dlsch0_harq = dlsch[0]->harq_processes[dci_info_extarcted.harq_pid]; #ifdef DEBUG_DCI - LOG_I(PHY,"[DCI-FORMAT-1] AbsSubframe %d.%d check dci coherency \n", frame, subframe); + LOG_I (PHY, "[DCI-FORMAT-1] AbsSubframe %d.%d check dci coherency \n", frame, subframe); #endif - status = check_dci_format1_1a_coherency(format1, - frame_parms->N_RB_DL, - rnti, - tc_rnti, - si_rnti, - ra_rnti, - p_rnti,frame,subframe, - &dci_info_extarcted, - dlsch0_harq); - if(status == 0) - { - printf("bad DCI 1 !!! \n"); - return(-1); + status = check_dci_format1_1a_coherency (format1, frame_parms->N_RB_DL, rnti, tc_rnti, si_rnti, ra_rnti, p_rnti, frame, subframe, &dci_info_extarcted, dlsch0_harq); + if (status == 0) { + printf ("bad DCI 1 !!! \n"); + return (-1); } - // dci is correct ==> update internal structure and prepare dl decoding #ifdef DEBUG_DCI - LOG_I(PHY,"[DCI-FORMAT-1] AbsSubframe %d.%d prepare dl decoding \n", frame, subframe); + LOG_I (PHY, "[DCI-FORMAT-1] AbsSubframe %d.%d prepare dl decoding \n", frame, subframe); #endif - prepare_dl_decoding_format1_1A(format1, - frame_parms->N_RB_DL, - &dci_info_extarcted, - frame_parms, - pdcch_vars, - pdsch_vars, - subframe, - rnti, - tc_rnti, - si_rnti, - ra_rnti, - p_rnti, - dlsch0_harq, - dlsch0); + prepare_dl_decoding_format1_1A (format1, frame_parms->N_RB_DL, &dci_info_extarcted, frame_parms, pdcch_vars, pdsch_vars, subframe, rnti, tc_rnti, si_rnti, ra_rnti, p_rnti, dlsch0_harq, dlsch0); break; } - case format2: + case format2: { - // extract dci infomation - //LOG_I(PHY,"[DCI-format2] AbsSubframe %d.%d extract dci infomation \n", frame, subframe); - extract_dci2_info(frame_parms->N_RB_DL, - frame_type, - frame_parms->nb_antenna_ports_eNB, - dci_pdu, - &dci_info_extarcted); + // extract dci infomation + //LOG_I(PHY,"[DCI-format2] AbsSubframe %d.%d extract dci infomation \n", frame, subframe); + extract_dci2_info (frame_parms->N_RB_DL, frame_type, frame_parms->nb_antenna_ports_eNB, dci_pdu, &dci_info_extarcted); - // check dci content - dlsch[0]->active = 1; - dlsch[1]->active = 1; + // check dci content + dlsch[0]->active = 1; + dlsch[1]->active = 1; - dlsch0 = dlsch[0]; - dlsch1 = dlsch[1]; + dlsch0 = dlsch[0]; + dlsch1 = dlsch[1]; - dlsch0_harq = dlsch0->harq_processes[dci_info_extarcted.harq_pid]; - dlsch1_harq = dlsch1->harq_processes[dci_info_extarcted.harq_pid]; - // printf("before coherency dlsch[1]->pmi_alloc %d\n",dlsch[1]->pmi_alloc); - // printf("before coherency dlsch1->pmi_alloc %d\n",dlsch1->pmi_alloc); - // printf("before coherency dlsch1_harq->pmi_alloc %d\n",dlsch1_harq->pmi_alloc); + dlsch0_harq = dlsch0->harq_processes[dci_info_extarcted.harq_pid]; + dlsch1_harq = dlsch1->harq_processes[dci_info_extarcted.harq_pid]; + // printf("before coherency dlsch[1]->pmi_alloc %d\n",dlsch[1]->pmi_alloc); + // printf("before coherency dlsch1->pmi_alloc %d\n",dlsch1->pmi_alloc); + // printf("before coherency dlsch1_harq->pmi_alloc %d\n",dlsch1_harq->pmi_alloc); - //LOG_I(PHY,"[DCI-format2] check dci content \n"); - status = check_dci_format2_2a_coherency(format2, - frame_parms->N_RB_DL, - &dci_info_extarcted, - rnti, - si_rnti, - ra_rnti, - p_rnti, - dlsch0_harq, - dlsch1_harq); - if(status == 0) - return(-1); + //LOG_I(PHY,"[DCI-format2] check dci content \n"); + status = check_dci_format2_2a_coherency (format2, frame_parms->N_RB_DL, &dci_info_extarcted, rnti, si_rnti, ra_rnti, p_rnti, dlsch0_harq, dlsch1_harq); + if (status == 0) + return (-1); - // dci is correct ==> update internal structure and prepare dl decoding - //LOG_I(PHY,"[DCI-format2] update internal structure and prepare dl decoding \n"); - prepare_dl_decoding_format2_2A(format2, - &dci_info_extarcted, - frame_parms, - pdcch_vars, - pdsch_vars, - rnti, - subframe, - dlsch0_harq, - dlsch1_harq, - dlsch0, - dlsch1); + // dci is correct ==> update internal structure and prepare dl decoding + //LOG_I(PHY,"[DCI-format2] update internal structure and prepare dl decoding \n"); + prepare_dl_decoding_format2_2A (format2, &dci_info_extarcted, frame_parms, pdcch_vars, pdsch_vars, rnti, subframe, dlsch0_harq, dlsch1_harq, dlsch0, dlsch1); } break; - case format2A: + case format2A: { - // extract dci infomation - LOG_I(PHY,"[DCI-format2] AbsSubframe %d.%d extract dci infomation \n", frame%1024, subframe); - extract_dci2A_info(frame_parms->N_RB_DL, - frame_type, - frame_parms->nb_antenna_ports_eNB, - dci_pdu, - &dci_info_extarcted); + // extract dci infomation + LOG_I (PHY, "[DCI-format2] AbsSubframe %d.%d extract dci infomation \n", frame % 1024, subframe); + extract_dci2A_info (frame_parms->N_RB_DL, frame_type, frame_parms->nb_antenna_ports_eNB, dci_pdu, &dci_info_extarcted); - // check dci content - //LOG_I(PHY,"[DCI-format2A] check dci content \n"); - //LOG_I(PHY,"[DCI-format2A] tb_swap %d harq_pid %d\n", dci_info_extarcted.tb_swap, dci_info_extarcted.harq_pid); + // check dci content + //LOG_I(PHY,"[DCI-format2A] check dci content \n"); + //LOG_I(PHY,"[DCI-format2A] tb_swap %d harq_pid %d\n", dci_info_extarcted.tb_swap, dci_info_extarcted.harq_pid); //dlsch[0]->active = 0; //dlsch[1]->active = 0; - if (dci_info_extarcted.tb_swap == 0) { - dlsch0 = dlsch[0]; - dlsch1 = dlsch[1]; - } else { - dlsch0 = dlsch[1]; - dlsch1 = dlsch[0]; - } - dlsch0_harq = dlsch0->harq_processes[dci_info_extarcted.harq_pid]; - dlsch1_harq = dlsch1->harq_processes[dci_info_extarcted.harq_pid]; - - //LOG_I(PHY,"[DCI-format2A] check dci content \n"); - status = check_dci_format2_2a_coherency(format2A, - frame_parms->N_RB_DL, - &dci_info_extarcted, - rnti, - si_rnti, - ra_rnti, - p_rnti, - dlsch0_harq, - dlsch1_harq); - if(status == 0) - return(-1); - - // dci is correct ==> update internal structure and prepare dl decoding - //LOG_I(PHY,"[DCI-format2A] update internal structure and prepare dl decoding \n"); - prepare_dl_decoding_format2_2A(format2A, - &dci_info_extarcted, - frame_parms, - pdcch_vars, - pdsch_vars, - rnti, - subframe, - dlsch0_harq, - dlsch1_harq, - dlsch0, - dlsch1); - } - break; - - case format1E_2A_M10PRB: - if (!dlsch[0]) return -1; - - harq_pid = ((DCI1E_5MHz_2A_M10PRB_TDD_t *)dci_pdu)->harq_pid; - - if (harq_pid>=8) { - LOG_E(PHY,"Format 1E_2A_M10PRB: harq_pid=%d >= 8\n", harq_pid); - return(-1); - } - - dlsch[0]->current_harq_pid = harq_pid; - dlsch[0]->harq_ack[subframe].harq_id = harq_pid; - - /* - tbswap = ((DCI1E_5MHz_2A_M10PRB_TDD_t *)dci_pdu)->tb_swap; - if (tbswap == 0) { + if (dci_info_extarcted.tb_swap == 0) { dlsch0 = dlsch[0]; dlsch1 = dlsch[1]; - } - else{ + } else { dlsch0 = dlsch[1]; dlsch1 = dlsch[0]; - } - */ - dlsch0 = dlsch[0]; - - dlsch0_harq = dlsch[0]->harq_processes[harq_pid]; - // Needs to be checked - dlsch0_harq->codeword=0; - conv_rballoc(((DCI1E_5MHz_2A_M10PRB_TDD_t *)dci_pdu)->rah, - ((DCI1E_5MHz_2A_M10PRB_TDD_t *)dci_pdu)->rballoc,frame_parms->N_RB_DL, - dlsch0_harq->rb_alloc_even); - - dlsch0_harq->rb_alloc_odd[0] = dlsch0_harq->rb_alloc_even[0]; - dlsch0_harq->rb_alloc_odd[1] = dlsch0_harq->rb_alloc_even[1]; - dlsch0_harq->rb_alloc_odd[2] = dlsch0_harq->rb_alloc_even[2]; - dlsch0_harq->rb_alloc_odd[3] = dlsch0_harq->rb_alloc_even[3]; - /* - dlsch1_harq->rb_alloc_even[0] = dlsch0_harq->rb_alloc_even[0]; - dlsch1_harq->rb_alloc_even[1] = dlsch0_harq->rb_alloc_even[1]; - dlsch1_harq->rb_alloc_even[2] = dlsch0_harq->rb_alloc_even[2]; - dlsch1_harq->rb_alloc_even[3] = dlsch0_harq->rb_alloc_even[3]; - */ - dlsch0_harq->nb_rb = conv_nprb(((DCI1E_5MHz_2A_M10PRB_TDD_t *)dci_pdu)->rah, - ((DCI1E_5MHz_2A_M10PRB_TDD_t *)dci_pdu)->rballoc, - frame_parms->N_RB_DL); - //dlsch1_harq->nb_rb = dlsch0_harq->nb_rb; - - dlsch0_harq->mcs = ((DCI1E_5MHz_2A_M10PRB_TDD_t *)dci_pdu)->mcs; - dlsch0_harq->delta_PUCCH = delta_PUCCH_lut[((DCI1E_5MHz_2A_M10PRB_TDD_t *)dci_pdu)->TPC&3]; - - - - /* - if (dlsch0_harq->mcs>20) { - printf("dci_tools.c: mcs > 20 disabled for now (asked %d)\n",dlsch0_harq->mcs); - return(-1); - } - */ - - //dlsch1_harq->mcs = ((DCI1E_5MHz_2A_M10PRB_TDD_t *)dci_pdu)->mcs2; - dlsch0_harq->rvidx = ((DCI1E_5MHz_2A_M10PRB_TDD_t *)dci_pdu)->rv; - //dlsch1_harq->rvidx = ((DCI1E_5MHz_2A_M10PRB_TDD_t *)dci_pdu)->rv2; - - // check if either TB is disabled (see 36-213 V8.6 p. 26) - - if ((dlsch0_harq->rvidx == 1) && (dlsch0_harq->mcs == 0)) { - dlsch0_harq->status = DISABLED; } + dlsch0_harq = dlsch0->harq_processes[dci_info_extarcted.harq_pid]; + dlsch1_harq = dlsch1->harq_processes[dci_info_extarcted.harq_pid]; - //if ((dlsch1_harq->rvidx == 1) && (dlsch1_harq->mcs == 0)) { - //dlsch1_harq->status = DISABLED; - //} - dlsch0_harq->Nl = 1; + //LOG_I(PHY,"[DCI-format2A] check dci content \n"); + status = check_dci_format2_2a_coherency (format2A, frame_parms->N_RB_DL, &dci_info_extarcted, rnti, si_rnti, ra_rnti, p_rnti, dlsch0_harq, dlsch1_harq); + if (status == 0) + return (-1); - //dlsch0->layer_index = tbswap; - //dlsch1->layer_index = 1-tbswap; + // dci is correct ==> update internal structure and prepare dl decoding + //LOG_I(PHY,"[DCI-format2A] update internal structure and prepare dl decoding \n"); + prepare_dl_decoding_format2_2A (format2A, &dci_info_extarcted, frame_parms, pdcch_vars, pdsch_vars, rnti, subframe, dlsch0_harq, dlsch1_harq, dlsch0, dlsch1); + } + break; + + case format1E_2A_M10PRB: + if (!dlsch[0]) + return -1; + + harq_pid = ((DCI1E_5MHz_2A_M10PRB_TDD_t *) dci_pdu)->harq_pid; + + if (harq_pid >= 8) { + LOG_E (PHY, "Format 1E_2A_M10PRB: harq_pid=%d >= 8\n", harq_pid); + return (-1); + } + + dlsch[0]->current_harq_pid = harq_pid; + dlsch[0]->harq_ack[subframe].harq_id = harq_pid; + + /* + tbswap = ((DCI1E_5MHz_2A_M10PRB_TDD_t *)dci_pdu)->tb_swap; + if (tbswap == 0) { + dlsch0 = dlsch[0]; + dlsch1 = dlsch[1]; + } + else{ + dlsch0 = dlsch[1]; + dlsch1 = dlsch[0]; + } + */ + dlsch0 = dlsch[0]; + + dlsch0_harq = dlsch[0]->harq_processes[harq_pid]; + // Needs to be checked + dlsch0_harq->codeword = 0; + conv_rballoc (((DCI1E_5MHz_2A_M10PRB_TDD_t *) dci_pdu)->rah, ((DCI1E_5MHz_2A_M10PRB_TDD_t *) dci_pdu)->rballoc, frame_parms->N_RB_DL, dlsch0_harq->rb_alloc_even); + + dlsch0_harq->rb_alloc_odd[0] = dlsch0_harq->rb_alloc_even[0]; + dlsch0_harq->rb_alloc_odd[1] = dlsch0_harq->rb_alloc_even[1]; + dlsch0_harq->rb_alloc_odd[2] = dlsch0_harq->rb_alloc_even[2]; + dlsch0_harq->rb_alloc_odd[3] = dlsch0_harq->rb_alloc_even[3]; + /* + dlsch1_harq->rb_alloc_even[0] = dlsch0_harq->rb_alloc_even[0]; + dlsch1_harq->rb_alloc_even[1] = dlsch0_harq->rb_alloc_even[1]; + dlsch1_harq->rb_alloc_even[2] = dlsch0_harq->rb_alloc_even[2]; + dlsch1_harq->rb_alloc_even[3] = dlsch0_harq->rb_alloc_even[3]; + */ + dlsch0_harq->nb_rb = conv_nprb (((DCI1E_5MHz_2A_M10PRB_TDD_t *) dci_pdu)->rah, ((DCI1E_5MHz_2A_M10PRB_TDD_t *) dci_pdu)->rballoc, frame_parms->N_RB_DL); + //dlsch1_harq->nb_rb = dlsch0_harq->nb_rb; + + dlsch0_harq->mcs = ((DCI1E_5MHz_2A_M10PRB_TDD_t *) dci_pdu)->mcs; + dlsch0_harq->delta_PUCCH = delta_PUCCH_lut[((DCI1E_5MHz_2A_M10PRB_TDD_t *) dci_pdu)->TPC & 3]; - // Fix this - tpmi = ((DCI1E_5MHz_2A_M10PRB_TDD_t *)dci_pdu)->tpmi; - // printf("ue: tpmi %d\n",tpmi); - switch (tpmi) { - case 0 : - dlsch0_harq->mimo_mode = ALAMOUTI; - break; + /* + if (dlsch0_harq->mcs>20) { + printf("dci_tools.c: mcs > 20 disabled for now (asked %d)\n",dlsch0_harq->mcs); + return(-1); + } + */ - case 1: - dlsch0_harq->mimo_mode = UNIFORM_PRECODING11; - dlsch0_harq->pmi_alloc = pmi_extend(frame_parms,0,0); - break; + //dlsch1_harq->mcs = ((DCI1E_5MHz_2A_M10PRB_TDD_t *)dci_pdu)->mcs2; + dlsch0_harq->rvidx = ((DCI1E_5MHz_2A_M10PRB_TDD_t *) dci_pdu)->rv; + //dlsch1_harq->rvidx = ((DCI1E_5MHz_2A_M10PRB_TDD_t *)dci_pdu)->rv2; - case 2: - dlsch0_harq->mimo_mode = UNIFORM_PRECODING1m1; - dlsch0_harq->pmi_alloc = pmi_extend(frame_parms,1, 0); - break; + // check if either TB is disabled (see 36-213 V8.6 p. 26) - case 3: - dlsch0_harq->mimo_mode = UNIFORM_PRECODING1j; - dlsch0_harq->pmi_alloc = pmi_extend(frame_parms,2, 0); + if ((dlsch0_harq->rvidx == 1) && (dlsch0_harq->mcs == 0)) { + dlsch0_harq->status = DISABLED; + } + //if ((dlsch1_harq->rvidx == 1) && (dlsch1_harq->mcs == 0)) { + //dlsch1_harq->status = DISABLED; + //} + dlsch0_harq->Nl = 1; - break; - - case 4: - dlsch0_harq->mimo_mode = UNIFORM_PRECODING1mj; - dlsch0_harq->pmi_alloc = pmi_extend(frame_parms,3, 0); - break; - - case 5: - dlsch0_harq->mimo_mode = PUSCH_PRECODING0; - // pmi stored from ulsch allocation routine - dlsch0_harq->pmi_alloc = dlsch0->pmi_alloc; - //LOG_I(PHY,"XXX using PMI %x\n",pmi2hex_2Ar1(dlsch0_harq->pmi_alloc)); - break; + //dlsch0->layer_index = tbswap; + //dlsch1->layer_index = 1-tbswap; - case 6: - dlsch0_harq->mimo_mode = PUSCH_PRECODING1; - LOG_E(PHY,"Unsupported TPMI\n"); - return(-1); - break; - } + // Fix this + tpmi = ((DCI1E_5MHz_2A_M10PRB_TDD_t *) dci_pdu)->tpmi; + // printf("ue: tpmi %d\n",tpmi); + switch (tpmi) { + case 0: + dlsch0_harq->mimo_mode = ALAMOUTI; + break; - if (frame_parms->nb_antenna_ports_eNB == 1) - dlsch0_harq->mimo_mode = SISO; + case 1: + dlsch0_harq->mimo_mode = UNIFORM_PRECODING11; + dlsch0_harq->pmi_alloc = pmi_extend (frame_parms, 0, 0); + break; + case 2: + dlsch0_harq->mimo_mode = UNIFORM_PRECODING1m1; + dlsch0_harq->pmi_alloc = pmi_extend (frame_parms, 1, 0); + break; - if ((dlsch0_harq->DCINdi != ((DCI1E_5MHz_2A_M10PRB_TDD_t *)dci_pdu)->ndi) || - (dlsch0_harq->first_tx==1)) { - - dlsch0_harq->round = 0; - dlsch0_harq->first_tx = 0; - dlsch0_harq->status = ACTIVE; - } - /* - else if (dlsch0_harq->status == SCH_IDLE) { // we got same ndi for a previously decoded process, - // this happens if either another harq process in the same - // is NAK or an ACK was not received - - dlsch0->harq_ack[subframe].ack = 1; - dlsch0->harq_ack[subframe].harq_id = harq_pid; - dlsch0->harq_ack[subframe].send_harq_status = 1; - dlsch0->active = 0; - return(0); - } - */ - - dlsch0_harq->DCINdi = ((DCI1E_5MHz_2A_M10PRB_TDD_t *)dci_pdu)->ndi; - dlsch0_harq->mcs = ((DCI1E_5MHz_2A_M10PRB_TDD_t *)dci_pdu)->mcs; - - if (dlsch0_harq->nb_rb>1) { - dlsch0_harq->TBS = TBStable[get_I_TBS(dlsch0_harq->mcs)][dlsch0_harq->nb_rb-1]; - } else - dlsch0_harq->TBS =0; - - dlsch0->rnti = rnti; - //dlsch1->rnti = rnti; - - dlsch0->active = 1; - //dlsch1->active = 1; - - dlsch0_harq->dl_power_off = ((DCI1E_5MHz_2A_M10PRB_TDD_t *)dci_pdu)->dl_power_off; - //dlsch1_harq->dl_power_off = ((DCI1E_5MHz_2A_M10PRB_TDD_t *)dci_pdu)->dl_power_off; - + case 3: + dlsch0_harq->mimo_mode = UNIFORM_PRECODING1j; + dlsch0_harq->pmi_alloc = pmi_extend (frame_parms, 2, 0); break; - default: - LOG_E(PHY,"format %d not yet implemented\n",dci_format); - return(-1); + case 4: + dlsch0_harq->mimo_mode = UNIFORM_PRECODING1mj; + dlsch0_harq->pmi_alloc = pmi_extend (frame_parms, 3, 0); + break; + + case 5: + dlsch0_harq->mimo_mode = PUSCH_PRECODING0; + // pmi stored from ulsch allocation routine + dlsch0_harq->pmi_alloc = dlsch0->pmi_alloc; + //LOG_I(PHY,"XXX using PMI %x\n",pmi2hex_2Ar1(dlsch0_harq->pmi_alloc)); + break; + + + case 6: + dlsch0_harq->mimo_mode = PUSCH_PRECODING1; + LOG_E (PHY, "Unsupported TPMI\n"); + return (-1); break; } + + if (frame_parms->nb_antenna_ports_eNB == 1) + dlsch0_harq->mimo_mode = SISO; + + + if ((dlsch0_harq->DCINdi != ((DCI1E_5MHz_2A_M10PRB_TDD_t *) dci_pdu)->ndi) || (dlsch0_harq->first_tx == 1)) { + + dlsch0_harq->round = 0; + dlsch0_harq->first_tx = 0; + dlsch0_harq->status = ACTIVE; + } + /* + else if (dlsch0_harq->status == SCH_IDLE) { // we got same ndi for a previously decoded process, + // this happens if either another harq process in the same + // is NAK or an ACK was not received + + dlsch0->harq_ack[subframe].ack = 1; + dlsch0->harq_ack[subframe].harq_id = harq_pid; + dlsch0->harq_ack[subframe].send_harq_status = 1; + dlsch0->active = 0; + return(0); + } + */ + + dlsch0_harq->DCINdi = ((DCI1E_5MHz_2A_M10PRB_TDD_t *) dci_pdu)->ndi; + dlsch0_harq->mcs = ((DCI1E_5MHz_2A_M10PRB_TDD_t *) dci_pdu)->mcs; + + if (dlsch0_harq->nb_rb > 1) { + dlsch0_harq->TBS = TBStable[get_I_TBS (dlsch0_harq->mcs)][dlsch0_harq->nb_rb - 1]; + } else + dlsch0_harq->TBS = 0; + + dlsch0->rnti = rnti; + //dlsch1->rnti = rnti; + + dlsch0->active = 1; + //dlsch1->active = 1; + + dlsch0_harq->dl_power_off = ((DCI1E_5MHz_2A_M10PRB_TDD_t *) dci_pdu)->dl_power_off; + //dlsch1_harq->dl_power_off = ((DCI1E_5MHz_2A_M10PRB_TDD_t *)dci_pdu)->dl_power_off; + + + break; + + default: + LOG_E (PHY, "format %d not yet implemented\n", dci_format); + return (-1); + break; + } + #ifdef UE_DEBUG_TRACE - if (dlsch[0] && (dlsch[0]->rnti != 0xffff)) { - LOG_I(PHY,"dci_format:%d Abssubframe: %d.%d \n",dci_format,frame%1024,subframe); - LOG_I(PHY,"PDSCH dlsch0 UE: rnti %x\n",dlsch[0]->rnti); - LOG_D(PHY,"PDSCH dlsch0 UE: NBRB %d\n",dlsch0_harq->nb_rb); - LOG_D(PHY,"PDSCH dlsch0 UE: rballoc %x\n",dlsch0_harq->rb_alloc_even[0]); - LOG_I(PHY,"PDSCH dlsch0 UE: harq_pid %d\n",dci_info_extarcted.harq_pid); - LOG_I(PHY,"PDSCH dlsch0 UE: g %d\n",dlsch[0]->g_pucch); - LOG_D(PHY,"PDSCH dlsch0 UE: round %d\n",dlsch0_harq->round); - LOG_D(PHY,"PDSCH dlsch0 UE: DCINdi %d\n",dlsch0_harq->DCINdi); - LOG_D(PHY,"PDSCH dlsch0 UE: rvidx %d\n",dlsch0_harq->rvidx); - LOG_D(PHY,"PDSCH dlsch0 UE: TBS %d\n",dlsch0_harq->TBS); - LOG_D(PHY,"PDSCH dlsch0 UE: mcs %d\n",dlsch0_harq->mcs); - LOG_D(PHY,"PDSCH dlsch0 UE: pwr_off %d\n",dlsch0_harq->dl_power_off); - } + if (dlsch[0] && (dlsch[0]->rnti != 0xffff)) { + LOG_I (PHY, "dci_format:%d Abssubframe: %d.%d \n", dci_format, frame % 1024, subframe); + LOG_I (PHY, "PDSCH dlsch0 UE: rnti %x\n", dlsch[0]->rnti); + LOG_D (PHY, "PDSCH dlsch0 UE: NBRB %d\n", dlsch0_harq->nb_rb); + LOG_D (PHY, "PDSCH dlsch0 UE: rballoc %x\n", dlsch0_harq->rb_alloc_even[0]); + LOG_I (PHY, "PDSCH dlsch0 UE: harq_pid %d\n", dci_info_extarcted.harq_pid); + LOG_I (PHY, "PDSCH dlsch0 UE: g %d\n", dlsch[0]->g_pucch); + LOG_D (PHY, "PDSCH dlsch0 UE: round %d\n", dlsch0_harq->round); + LOG_D (PHY, "PDSCH dlsch0 UE: DCINdi %d\n", dlsch0_harq->DCINdi); + LOG_D (PHY, "PDSCH dlsch0 UE: rvidx %d\n", dlsch0_harq->rvidx); + LOG_D (PHY, "PDSCH dlsch0 UE: TBS %d\n", dlsch0_harq->TBS); + LOG_D (PHY, "PDSCH dlsch0 UE: mcs %d\n", dlsch0_harq->mcs); + LOG_D (PHY, "PDSCH dlsch0 UE: pwr_off %d\n", dlsch0_harq->dl_power_off); + } #endif #if T_TRACER - if( (dlsch[0]->rnti != si_rnti) && (dlsch[0]->rnti != ra_rnti) && (dlsch[0]->rnti != p_rnti)) - { - T(T_UE_PHY_DLSCH_UE_DCI, T_INT(0), T_INT(frame%1024), T_INT(subframe), - T_INT(dlsch[0]->rnti), T_INT(dci_format), - T_INT(harq_pid), - T_INT(dlsch0_harq->mcs), - T_INT(dlsch0_harq->TBS)); - } + if ((dlsch[0]->rnti != si_rnti) && (dlsch[0]->rnti != ra_rnti) && (dlsch[0]->rnti != p_rnti)) { + T (T_UE_PHY_DLSCH_UE_DCI, T_INT (0), T_INT (frame % 1024), T_INT (subframe), T_INT (dlsch[0]->rnti), T_INT (dci_format), T_INT (harq_pid), T_INT (dlsch0_harq->mcs), T_INT (dlsch0_harq->TBS)); + } #endif - // compute DL power control parameters - if (dlsch0_harq != NULL){ - computeRhoA_UE(pdsch_config_dedicated, dlsch[0],dlsch0_harq->dl_power_off, frame_parms->nb_antenna_ports_eNB); - computeRhoB_UE(pdsch_config_dedicated,&(frame_parms->pdsch_config_common),frame_parms->nb_antenna_ports_eNB,dlsch[0],dlsch0_harq->dl_power_off); - } + // compute DL power control parameters + if (dlsch0_harq != NULL) { + computeRhoA_UE (pdsch_config_dedicated, dlsch[0], dlsch0_harq->dl_power_off, frame_parms->nb_antenna_ports_eNB); + computeRhoB_UE (pdsch_config_dedicated, &(frame_parms->pdsch_config_common), frame_parms->nb_antenna_ports_eNB, dlsch[0], dlsch0_harq->dl_power_off); + } - if (dlsch1_harq != NULL) { - computeRhoA_UE(pdsch_config_dedicated, dlsch[1],dlsch1_harq->dl_power_off, frame_parms->nb_antenna_ports_eNB); - computeRhoB_UE(pdsch_config_dedicated,&(frame_parms->pdsch_config_common),frame_parms->nb_antenna_ports_eNB,dlsch[1],dlsch1_harq->dl_power_off); - } + if (dlsch1_harq != NULL) { + computeRhoA_UE (pdsch_config_dedicated, dlsch[1], dlsch1_harq->dl_power_off, frame_parms->nb_antenna_ports_eNB); + computeRhoB_UE (pdsch_config_dedicated, &(frame_parms->pdsch_config_common), frame_parms->nb_antenna_ports_eNB, dlsch[1], dlsch1_harq->dl_power_off); + } - return(0); + return (0); } -uint8_t subframe2harq_pid(LTE_DL_FRAME_PARMS *frame_parms,uint32_t frame,uint8_t subframe) +uint8_t +subframe2harq_pid (LTE_DL_FRAME_PARMS * frame_parms, uint32_t frame, uint8_t subframe) { - uint8_t ret = 255; + uint8_t ret = 255; if (frame_parms->frame_type == FDD) { - ret = (((frame<<1)+subframe)&7); + ret = (((frame << 1) + subframe) & 7); } else { switch (frame_parms->tdd_config) { case 1: - if ((subframe==2) || - (subframe==3) || - (subframe==7) || - (subframe==8)) + if ((subframe == 2) || (subframe == 3) || (subframe == 7) || (subframe == 8)) switch (subframe) { case 2: case 3: - ret = (subframe-2); + ret = (subframe - 2); break; case 7: case 8: - ret = (subframe-5); + ret = (subframe - 5); break; default: - LOG_E(PHY,"subframe2_harq_pid, Illegal subframe %d for TDD mode %d\n",subframe,frame_parms->tdd_config); + LOG_E (PHY, "subframe2_harq_pid, Illegal subframe %d for TDD mode %d\n", subframe, frame_parms->tdd_config); ret = (255); break; } @@ -6433,194 +6008,180 @@ uint8_t subframe2harq_pid(LTE_DL_FRAME_PARMS *frame_parms,uint32_t frame,uint8_t break; case 2: - if ((subframe!=2) && (subframe!=7)) { - LOG_E(PHY,"subframe2_harq_pid, Illegal subframe %d for TDD mode %d\n",subframe,frame_parms->tdd_config); - ret=255; - } - else ret = (subframe/7); + if ((subframe != 2) && (subframe != 7)) { + LOG_E (PHY, "subframe2_harq_pid, Illegal subframe %d for TDD mode %d\n", subframe, frame_parms->tdd_config); + ret = 255; + } else + ret = (subframe / 7); break; case 3: - if ((subframe<2) || (subframe>4)) { - LOG_E(PHY,"subframe2_harq_pid, Illegal subframe %d for TDD mode %d\n",subframe,frame_parms->tdd_config); + if ((subframe < 2) || (subframe > 4)) { + LOG_E (PHY, "subframe2_harq_pid, Illegal subframe %d for TDD mode %d\n", subframe, frame_parms->tdd_config); ret = (255); - } - else ret = (subframe-2); + } else + ret = (subframe - 2); break; case 4: - if ((subframe<2) || (subframe>3)) { - LOG_E(PHY,"subframe2_harq_pid, Illegal subframe %d for TDD mode %d\n",subframe,frame_parms->tdd_config); + if ((subframe < 2) || (subframe > 3)) { + LOG_E (PHY, "subframe2_harq_pid, Illegal subframe %d for TDD mode %d\n", subframe, frame_parms->tdd_config); ret = (255); - } - else ret = (subframe-2); + } else + ret = (subframe - 2); break; case 5: - if (subframe!=2) { - LOG_E(PHY,"subframe2_harq_pid, Illegal subframe %d for TDD mode %d\n",subframe,frame_parms->tdd_config); + if (subframe != 2) { + LOG_E (PHY, "subframe2_harq_pid, Illegal subframe %d for TDD mode %d\n", subframe, frame_parms->tdd_config); ret = (255); - } - else ret = (subframe-2); + } else + ret = (subframe - 2); break; default: - LOG_E(PHY,"subframe2_harq_pid, Unsupported TDD mode %d\n",frame_parms->tdd_config); + LOG_E (PHY, "subframe2_harq_pid, Unsupported TDD mode %d\n", frame_parms->tdd_config); ret = (255); } } - AssertFatal(ret!=255, - "invalid harq_pid(%d) at SFN/SF = %d/%d\n", (int8_t)ret, frame, subframe); + AssertFatal (ret != 255, "invalid harq_pid(%d) at SFN/SF = %d/%d\n", (int8_t) ret, frame, subframe); return ret; } -uint8_t pdcch_alloc2ul_subframe(LTE_DL_FRAME_PARMS *frame_parms,uint8_t n) +uint8_t +pdcch_alloc2ul_subframe (LTE_DL_FRAME_PARMS * frame_parms, uint8_t n) { - uint8_t ul_subframe = 255; + uint8_t ul_subframe = 255; - if ((frame_parms->frame_type == TDD) && - (frame_parms->tdd_config == 1) && - ((n==1)||(n==6))) // tdd_config 0,1 SF 1,5 - ul_subframe = ((n+6)%10); - else if ((frame_parms->frame_type == TDD) && - (frame_parms->tdd_config == 6) && - ((n==0)||(n==1)||(n==5)||(n==6))) - ul_subframe = ((n+7)%10); - else if ((frame_parms->frame_type == TDD) && - (frame_parms->tdd_config == 6) && - (n==9)) // tdd_config 6 SF 9 - ul_subframe = ((n+5)%10); + if ((frame_parms->frame_type == TDD) && (frame_parms->tdd_config == 1) && ((n == 1) || (n == 6))) // tdd_config 0,1 SF 1,5 + ul_subframe = ((n + 6) % 10); + else if ((frame_parms->frame_type == TDD) && (frame_parms->tdd_config == 6) && ((n == 0) || (n == 1) || (n == 5) || (n == 6))) + ul_subframe = ((n + 7) % 10); + else if ((frame_parms->frame_type == TDD) && (frame_parms->tdd_config == 6) && (n == 9)) // tdd_config 6 SF 9 + ul_subframe = ((n + 5) % 10); else - ul_subframe = ((n+4)%10); + ul_subframe = ((n + 4) % 10); - if (subframe_select(frame_parms,ul_subframe) != SF_UL) return(255); + if (subframe_select (frame_parms, ul_subframe) != SF_UL) + return (255); - LOG_D(PHY, "subframe %d: PUSCH subframe = %d\n", n, ul_subframe); + LOG_D (PHY, "subframe %d: PUSCH subframe = %d\n", n, ul_subframe); return ul_subframe; } -uint8_t ul_subframe2pdcch_alloc_subframe(LTE_DL_FRAME_PARMS *frame_parms,uint8_t n) +uint8_t +ul_subframe2pdcch_alloc_subframe (LTE_DL_FRAME_PARMS * frame_parms, uint8_t n) { - if ((frame_parms->frame_type == TDD) && - (frame_parms->tdd_config == 1) && - ((n==7)||(n==2))) // tdd_config 0,1 SF 1,5 - return((n==7)? 1 : 6); - else if ((frame_parms->frame_type == TDD) && - (frame_parms->tdd_config == 6) && - ((n==7)||(n==8)||(n==2)||(n==3))) - return((n+3)%10); - else if ((frame_parms->frame_type == TDD) && - (frame_parms->tdd_config == 6) && - (n==4)) // tdd_config 6 SF 9 - return(9); + if ((frame_parms->frame_type == TDD) && (frame_parms->tdd_config == 1) && ((n == 7) || (n == 2))) // tdd_config 0,1 SF 1,5 + return ((n == 7) ? 1 : 6); + else if ((frame_parms->frame_type == TDD) && (frame_parms->tdd_config == 6) && ((n == 7) || (n == 8) || (n == 2) || (n == 3))) + return ((n + 3) % 10); + else if ((frame_parms->frame_type == TDD) && (frame_parms->tdd_config == 6) && (n == 4)) // tdd_config 6 SF 9 + return (9); else - return((n+6)%10); + return ((n + 6) % 10); } -uint32_t pdcch_alloc2ul_frame(LTE_DL_FRAME_PARMS *frame_parms,uint32_t frame, uint8_t n) +uint32_t +pdcch_alloc2ul_frame (LTE_DL_FRAME_PARMS * frame_parms, uint32_t frame, uint8_t n) { - uint32_t ul_frame; + uint32_t ul_frame; - if ((frame_parms->frame_type == TDD) && - (frame_parms->tdd_config == 1) && - ((n==1)||(n==6))) // tdd_config 0,1 SF 1,5 - ul_frame = (frame + (n==1 ? 0 : 1)); - else if ((frame_parms->frame_type == TDD) && - (frame_parms->tdd_config == 6) && - ((n==0)||(n==1)||(n==5)||(n==6))) - ul_frame = (frame + (n>=5 ? 1 : 0)); - else if ((frame_parms->frame_type == TDD) && - (frame_parms->tdd_config == 6) && - (n==9)) // tdd_config 6 SF 9 - ul_frame = (frame+1); + if ((frame_parms->frame_type == TDD) && (frame_parms->tdd_config == 1) && ((n == 1) || (n == 6))) // tdd_config 0,1 SF 1,5 + ul_frame = (frame + (n == 1 ? 0 : 1)); + else if ((frame_parms->frame_type == TDD) && (frame_parms->tdd_config == 6) && ((n == 0) || (n == 1) || (n == 5) || (n == 6))) + ul_frame = (frame + (n >= 5 ? 1 : 0)); + else if ((frame_parms->frame_type == TDD) && (frame_parms->tdd_config == 6) && (n == 9)) // tdd_config 6 SF 9 + ul_frame = (frame + 1); else - ul_frame = (frame+(n>=6 ? 1 : 0)); + ul_frame = (frame + (n >= 6 ? 1 : 0)); - LOG_D(PHY, "frame %d subframe %d: PUSCH frame = %d\n", frame, n, ul_frame); + LOG_D (PHY, "frame %d subframe %d: PUSCH frame = %d\n", frame, n, ul_frame); return ul_frame % 1024; } -int32_t pmi_convert_rank1_from_rank2(uint16_t pmi_alloc, int tpmi, int nb_rb) +int32_t +pmi_convert_rank1_from_rank2 (uint16_t pmi_alloc, int tpmi, int nb_rb) { - int nb_subbands = 0; - int32_t pmi_alloc_new = 0, pmi_new = 0, pmi_old = 0; - int i; + int nb_subbands = 0; + int32_t pmi_alloc_new = 0, pmi_new = 0, pmi_old = 0; + int i; switch (nb_rb) { - case 6: - nb_subbands = 6; - break; - default: - case 25: - nb_subbands = 7; - break; - case 50: - nb_subbands = 9; - break; - case 100: - nb_subbands = 13; - break; - } + case 6: + nb_subbands = 6; + break; + default: + case 25: + nb_subbands = 7; + break; + case 50: + nb_subbands = 9; + break; + case 100: + nb_subbands = 13; + break; + } for (i = 0; i < nb_subbands; i++) { - pmi_old = (pmi_alloc >> i)&1; + pmi_old = (pmi_alloc >> i) & 1; if (pmi_old == 0) if (tpmi == 5) pmi_new = 0; else pmi_new = 1; + else if (tpmi == 5) + pmi_new = 2; else - if (tpmi == 5) - pmi_new = 2; - else - pmi_new = 3; + pmi_new = 3; - pmi_alloc_new|=pmi_new<<(2*i); + pmi_alloc_new |= pmi_new << (2 * i); } #ifdef DEBUG_HARQ -printf(" [DCI UE] pmi_alloc_old %d, pmi_alloc_new %d pmi_old %d , pmi_new %d\n", pmi_alloc, pmi_alloc_new,pmi_old, pmi_new ); + printf (" [DCI UE] pmi_alloc_old %d, pmi_alloc_new %d pmi_old %d , pmi_new %d\n", pmi_alloc, pmi_alloc_new, pmi_old, pmi_new); #endif -return(pmi_alloc_new); + return (pmi_alloc_new); } -uint16_t quantize_subband_pmi(PHY_MEASUREMENTS *meas,uint8_t eNB_id,int nb_rb) +uint16_t +quantize_subband_pmi (PHY_MEASUREMENTS * meas, uint8_t eNB_id, int nb_rb) { - int i, aarx; - uint16_t pmiq=0; - uint32_t pmivect = 0; - uint8_t rank = meas->rank[eNB_id]; - int pmi_re,pmi_im; - int nb_subbands=0; + int i, aarx; + uint16_t pmiq = 0; + uint32_t pmivect = 0; + uint8_t rank = meas->rank[eNB_id]; + int pmi_re, pmi_im; + int nb_subbands = 0; switch (nb_rb) { - case 6: - nb_subbands = 6; - break; - default: - case 25: - nb_subbands = 7; - break; - case 50: - nb_subbands = 9; - break; - case 100: - nb_subbands = 13; - break; - } + case 6: + nb_subbands = 6; + break; + default: + case 25: + nb_subbands = 7; + break; + case 50: + nb_subbands = 9; + break; + case 100: + nb_subbands = 13; + break; + } - for (i=0; inb_antennas_rx; aarx++) { + for (aarx = 0; aarx < meas->nb_antennas_rx; aarx++) { pmi_re += meas->subband_pmi_re[eNB_id][i][aarx]; pmi_im += meas->subband_pmi_im[eNB_id][i][aarx]; } @@ -6639,51 +6200,51 @@ uint16_t quantize_subband_pmi(PHY_MEASUREMENTS *meas,uint8_t eNB_id,int nb_rb) pmiq = PMI_2A_1mj; // printf("subband %d, pmi%d \n",i,pmiq); - pmivect |= (pmiq<<(2*i)); + pmivect |= (pmiq << (2 * i)); } - else if (rank==1) { - for (aarx=0; aarxnb_antennas_rx; aarx++) { + else if (rank == 1) { + for (aarx = 0; aarx < meas->nb_antennas_rx; aarx++) { pmi_re += meas->subband_pmi_re[eNB_id][i][aarx]; - //printf("meas->subband_pmi_re[eNB_id][i][%d]=%d\n", aarx, meas->subband_pmi_re[eNB_id][i][aarx]); + //printf("meas->subband_pmi_re[eNB_id][i][%d]=%d\n", aarx, meas->subband_pmi_re[eNB_id][i][aarx]); pmi_im += meas->subband_pmi_im[eNB_id][i][aarx]; - //printf("meas->subband_pmi_im[eNB_id][i][%d]=%d\n",aarx, meas->subband_pmi_im[eNB_id][i][aarx]); + //printf("meas->subband_pmi_im[eNB_id][i][%d]=%d\n",aarx, meas->subband_pmi_im[eNB_id][i][aarx]); } - if (pmi_re >= pmi_im) // this is not orthogonal - // this is orthogonal - //if (((pmi_re >= pmi_im) && (pmi_re >= -pmi_im)) || ((pmi_re <= pmi_im) && (pmi_re >= -pmi_im))) - pmiq = PMI_2A_R1_11; - else - pmiq = PMI_2A_R1_1j; + if (pmi_re >= pmi_im) // this is not orthogonal + // this is orthogonal + //if (((pmi_re >= pmi_im) && (pmi_re >= -pmi_im)) || ((pmi_re <= pmi_im) && (pmi_re >= -pmi_im))) + pmiq = PMI_2A_R1_11; + else + pmiq = PMI_2A_R1_1j; - // printf("subband %d, pmi_re %d, pmi_im %d, pmiq %d \n",i,pmi_re,pmi_im,pmiq); - // printf("subband %d, pmi%d \n",i,pmiq); + // printf("subband %d, pmi_re %d, pmi_im %d, pmiq %d \n",i,pmi_re,pmi_im,pmiq); + // printf("subband %d, pmi%d \n",i,pmiq); //According to Section 7.2.4 of 36.213 - pmivect |= ((pmiq-1)<<(i)); //shift 1 since only one bit - } - else { - LOG_E(PHY,"PMI feedback for rank>1 not supported!\n"); + pmivect |= ((pmiq - 1) << (i)); //shift 1 since only one bit + } else { + LOG_E (PHY, "PMI feedback for rank>1 not supported!\n"); pmivect = 0; } } #ifdef DEBUG_HARQ - printf( "quantize_subband_pmi pmivect %d \n", pmivect); + printf ("quantize_subband_pmi pmivect %d \n", pmivect); #endif - return(pmivect); + return (pmivect); } -uint16_t quantize_subband_pmi2(PHY_MEASUREMENTS *meas,uint8_t eNB_id,uint8_t a_id,int nb_subbands) +uint16_t +quantize_subband_pmi2 (PHY_MEASUREMENTS * meas, uint8_t eNB_id, uint8_t a_id, int nb_subbands) { - uint8_t i; - uint16_t pmiq=0; - uint16_t pmivect = 0; - uint8_t rank = meas->rank[eNB_id]; - int pmi_re,pmi_im; + uint8_t i; + uint16_t pmiq = 0; + uint16_t pmivect = 0; + uint8_t rank = meas->rank[eNB_id]; + int pmi_re, pmi_im; - for (i=0; isubband_pmi_re[eNB_id][i][a_id]; @@ -6698,23 +6259,24 @@ uint16_t quantize_subband_pmi2(PHY_MEASUREMENTS *meas,uint8_t eNB_id,uint8_t a_i else if ((pmi_re > pmi_im) && (pmi_re < -pmi_im)) pmiq = PMI_2A_1mj; - pmivect |= (pmiq<<(2*i)); + pmivect |= (pmiq << (2 * i)); } else { // This needs to be done properly!!! pmivect = 0; } } - return(pmivect); + return (pmivect); } -uint16_t quantize_wideband_pmi(PHY_MEASUREMENTS *meas,uint8_t eNB_id) +uint16_t +quantize_wideband_pmi (PHY_MEASUREMENTS * meas, uint8_t eNB_id) { - uint16_t pmiq=0; - uint8_t rank = meas->rank[eNB_id]; + uint16_t pmiq = 0; + uint8_t rank = meas->rank[eNB_id]; //int pmi; - int pmi_re,pmi_im; + int pmi_re, pmi_im; if (rank == 1) { //pmi = @@ -6736,8 +6298,9 @@ uint16_t quantize_wideband_pmi(PHY_MEASUREMENTS *meas,uint8_t eNB_id) } - return(pmiq); + return (pmiq); } + /* uint8_t sinr2cqi(int sinr) { if (sinr<-3) @@ -6749,15 +6312,16 @@ uint16_t quantize_wideband_pmi(PHY_MEASUREMENTS *meas,uint8_t eNB_id) } */ -uint8_t sinr2cqi(double sinr,uint8_t trans_mode) +uint8_t +sinr2cqi (double sinr, uint8_t trans_mode) { // int flag_LA=0; - uint8_t retValue = 0; + uint8_t retValue = 0; - if(flag_LA==0) { + if (flag_LA == 0) { // Ideal Channel Estimation - if (sinr<=-4.89) + if (sinr <= -4.89) retValue = (0); else if (sinr < -3.53) retValue = (3); @@ -6786,25 +6350,26 @@ uint8_t sinr2cqi(double sinr,uint8_t trans_mode) else retValue = (15); } else { - int h=0; - int trans_mode_tmp; + int h = 0; + int trans_mode_tmp; - if (trans_mode ==5) - trans_mode_tmp=2; - else if(trans_mode ==6) - trans_mode_tmp=3; + if (trans_mode == 5) + trans_mode_tmp = 2; + else if (trans_mode == 6) + trans_mode_tmp = 3; else - trans_mode_tmp = trans_mode-1; + trans_mode_tmp = trans_mode - 1; - for(h=0; h<16; h++) { - if(sinr<=sinr_to_cqi[trans_mode_tmp][h]) + for (h = 0; h < 16; h++) { + if (sinr <= sinr_to_cqi[trans_mode_tmp][h]) retValue = (h); } } - LOG_D(PHY, "sinr=%f trans_mode=%d cqi=%d\n", sinr, trans_mode, retValue); + LOG_D (PHY, "sinr=%f trans_mode=%d cqi=%d\n", sinr, trans_mode, retValue); return retValue; } + //uint32_t fill_subband_cqi(PHY_MEASUREMENTS *meas,uint8_t eNB_id) { // // uint8_t i; @@ -6831,45 +6396,47 @@ uint8_t sinr2cqi(double sinr,uint8_t trans_mode) //} -uint32_t fill_subband_cqi(PHY_MEASUREMENTS *meas,uint8_t eNB_id,uint8_t trans_mode,int nb_subbands) +uint32_t +fill_subband_cqi (PHY_MEASUREMENTS * meas, uint8_t eNB_id, uint8_t trans_mode, int nb_subbands) { - uint8_t i; + uint8_t i; - uint32_t cqivect = 0,offset=0; + uint32_t cqivect = 0, offset = 0; - int diff_cqi=0; + int diff_cqi = 0; - for (i=0; iwideband_cqi_avg[eNB_id],trans_mode) + sinr2cqi(meas->subband_cqi_tot_dB[eNB_id][i],trans_mode); + diff_cqi = -sinr2cqi (meas->wideband_cqi_avg[eNB_id], trans_mode) + sinr2cqi (meas->subband_cqi_tot_dB[eNB_id][i], trans_mode); // Note, this is Table 7.2.1-2 from 36.213 - if (diff_cqi<=-1) + if (diff_cqi <= -1) offset = 3; - else if (diff_cqi>=2) + else if (diff_cqi >= 2) offset = 2; else - offset=(uint32_t)diff_cqi; + offset = (uint32_t) diff_cqi; - cqivect |= (offset<<(2*i)); + cqivect |= (offset << (2 * i)); } - return(cqivect); + return (cqivect); } -void fill_CQI(LTE_UE_ULSCH_t *ulsch,PHY_MEASUREMENTS *meas,uint8_t eNB_id,uint8_t harq_pid,int N_RB_DL,uint16_t rnti, uint8_t trans_mode, double sinr_eff) +void +fill_CQI (LTE_UE_ULSCH_t * ulsch, PHY_MEASUREMENTS * meas, uint8_t eNB_id, uint8_t harq_pid, int N_RB_DL, uint16_t rnti, uint8_t trans_mode, double sinr_eff) { // printf("[PHY][UE] Filling CQI for eNB %d, meas->wideband_cqi_tot[%d] %d\n", // eNB_id,eNB_id,meas->wideband_cqi_tot[eNB_id]); - double sinr_tmp; - uint8_t *o = ulsch->o; - UCI_format_t uci_format = ulsch->uci_format; + double sinr_tmp; + uint8_t *o = ulsch->o; + UCI_format_t uci_format = ulsch->uci_format; - if(flag_LA==1) + if (flag_LA == 1) sinr_tmp = sinr_eff; else sinr_tmp = (double) meas->wideband_cqi_avg[eNB_id]; @@ -6883,51 +6450,51 @@ void fill_CQI(LTE_UE_ULSCH_t *ulsch,PHY_MEASUREMENTS *meas,uint8_t eNB_id,uint8_ case 6: switch (uci_format) { case wideband_cqi_rank1_2A: - ((wideband_cqi_rank1_2A_1_5MHz *)o)->cqi1 = sinr2cqi(sinr_tmp,trans_mode); - ((wideband_cqi_rank1_2A_1_5MHz *)o)->pmi = quantize_subband_pmi(meas,eNB_id,6); + ((wideband_cqi_rank1_2A_1_5MHz *) o)->cqi1 = sinr2cqi (sinr_tmp, trans_mode); + ((wideband_cqi_rank1_2A_1_5MHz *) o)->pmi = quantize_subband_pmi (meas, eNB_id, 6); break; case wideband_cqi_rank2_2A: - ((wideband_cqi_rank2_2A_1_5MHz *)o)->cqi1 = sinr2cqi(sinr_tmp,trans_mode); //FIXME: calculate rank2 cqi - ((wideband_cqi_rank2_2A_1_5MHz *)o)->cqi2 = sinr2cqi(sinr_tmp,trans_mode); //FIXME: calculate rank2 cqi - ((wideband_cqi_rank2_2A_1_5MHz *)o)->pmi = quantize_subband_pmi(meas,eNB_id,6); + ((wideband_cqi_rank2_2A_1_5MHz *) o)->cqi1 = sinr2cqi (sinr_tmp, trans_mode); //FIXME: calculate rank2 cqi + ((wideband_cqi_rank2_2A_1_5MHz *) o)->cqi2 = sinr2cqi (sinr_tmp, trans_mode); //FIXME: calculate rank2 cqi + ((wideband_cqi_rank2_2A_1_5MHz *) o)->pmi = quantize_subband_pmi (meas, eNB_id, 6); break; case HLC_subband_cqi_nopmi: - ((HLC_subband_cqi_nopmi_1_5MHz *)o)->cqi1 = sinr2cqi(sinr_tmp,trans_mode); - ((HLC_subband_cqi_nopmi_1_5MHz *)o)->diffcqi1 = fill_subband_cqi(meas,eNB_id,trans_mode,6); + ((HLC_subband_cqi_nopmi_1_5MHz *) o)->cqi1 = sinr2cqi (sinr_tmp, trans_mode); + ((HLC_subband_cqi_nopmi_1_5MHz *) o)->diffcqi1 = fill_subband_cqi (meas, eNB_id, trans_mode, 6); break; case HLC_subband_cqi_rank1_2A: - ((HLC_subband_cqi_rank1_2A_1_5MHz *)o)->cqi1 = sinr2cqi(sinr_tmp,trans_mode); - ((HLC_subband_cqi_rank1_2A_1_5MHz *)o)->diffcqi1 = fill_subband_cqi(meas,eNB_id,trans_mode,6); - ((HLC_subband_cqi_rank1_2A_1_5MHz *)o)->pmi = quantize_wideband_pmi(meas,eNB_id); + ((HLC_subband_cqi_rank1_2A_1_5MHz *) o)->cqi1 = sinr2cqi (sinr_tmp, trans_mode); + ((HLC_subband_cqi_rank1_2A_1_5MHz *) o)->diffcqi1 = fill_subband_cqi (meas, eNB_id, trans_mode, 6); + ((HLC_subband_cqi_rank1_2A_1_5MHz *) o)->pmi = quantize_wideband_pmi (meas, eNB_id); break; case HLC_subband_cqi_rank2_2A: // This has to be improved!!! - ((HLC_subband_cqi_rank2_2A_1_5MHz *)o)->cqi1 = sinr2cqi(sinr_tmp,trans_mode); - ((HLC_subband_cqi_rank2_2A_1_5MHz *)o)->diffcqi1 = fill_subband_cqi(meas,eNB_id,trans_mode,6); - ((HLC_subband_cqi_rank2_2A_1_5MHz *)o)->cqi2 = sinr2cqi(sinr_tmp,trans_mode); - ((HLC_subband_cqi_rank2_2A_1_5MHz *)o)->diffcqi2 = fill_subband_cqi(meas,eNB_id,trans_mode,6); - ((HLC_subband_cqi_rank2_2A_1_5MHz *)o)->pmi = quantize_subband_pmi(meas,eNB_id,6); + ((HLC_subband_cqi_rank2_2A_1_5MHz *) o)->cqi1 = sinr2cqi (sinr_tmp, trans_mode); + ((HLC_subband_cqi_rank2_2A_1_5MHz *) o)->diffcqi1 = fill_subband_cqi (meas, eNB_id, trans_mode, 6); + ((HLC_subband_cqi_rank2_2A_1_5MHz *) o)->cqi2 = sinr2cqi (sinr_tmp, trans_mode); + ((HLC_subband_cqi_rank2_2A_1_5MHz *) o)->diffcqi2 = fill_subband_cqi (meas, eNB_id, trans_mode, 6); + ((HLC_subband_cqi_rank2_2A_1_5MHz *) o)->pmi = quantize_subband_pmi (meas, eNB_id, 6); break; case HLC_subband_cqi_mcs_CBA: // this is the cba mcs uci for cba transmission - ((HLC_subband_cqi_mcs_CBA_1_5MHz *)o)->mcs = ulsch->harq_processes[harq_pid]->mcs; - ((HLC_subband_cqi_mcs_CBA_1_5MHz *)o)->crnti = rnti; - LOG_D(PHY,"fill uci for cba rnti %x, mcs %d \n", rnti, ulsch->harq_processes[harq_pid]->mcs); + ((HLC_subband_cqi_mcs_CBA_1_5MHz *) o)->mcs = ulsch->harq_processes[harq_pid]->mcs; + ((HLC_subband_cqi_mcs_CBA_1_5MHz *) o)->crnti = rnti; + LOG_D (PHY, "fill uci for cba rnti %x, mcs %d \n", rnti, ulsch->harq_processes[harq_pid]->mcs); break; case ue_selected: - LOG_E(PHY,"fill_CQI ue_selected CQI not supported yet!!!\n"); - AssertFatal(1==0,"fill_CQI ue_selected CQI not supported yet!!!"); + LOG_E (PHY, "fill_CQI ue_selected CQI not supported yet!!!\n"); + AssertFatal (1 == 0, "fill_CQI ue_selected CQI not supported yet!!!"); break; default: - LOG_E(PHY,"unsupported CQI mode (%d)!!!\n",uci_format); - AssertFatal(1==0,"unsupported CQI mode !!!"); + LOG_E (PHY, "unsupported CQI mode (%d)!!!\n", uci_format); + AssertFatal (1 == 0, "unsupported CQI mode !!!"); break; } @@ -6937,51 +6504,51 @@ void fill_CQI(LTE_UE_ULSCH_t *ulsch,PHY_MEASUREMENTS *meas,uint8_t eNB_id,uint8_ case 25: switch (uci_format) { case wideband_cqi_rank1_2A: - ((wideband_cqi_rank1_2A_5MHz *)o)->cqi1 = sinr2cqi(sinr_tmp,trans_mode); - ((wideband_cqi_rank1_2A_5MHz *)o)->pmi = quantize_subband_pmi(meas,eNB_id,7); + ((wideband_cqi_rank1_2A_5MHz *) o)->cqi1 = sinr2cqi (sinr_tmp, trans_mode); + ((wideband_cqi_rank1_2A_5MHz *) o)->pmi = quantize_subband_pmi (meas, eNB_id, 7); break; case wideband_cqi_rank2_2A: - ((wideband_cqi_rank2_2A_5MHz *)o)->cqi1 = sinr2cqi(sinr_tmp,trans_mode); //FIXME: calculate rank2 cqi - ((wideband_cqi_rank2_2A_5MHz *)o)->cqi2 = sinr2cqi(sinr_tmp,trans_mode); //FIXME: calculate rank2 cqi - ((wideband_cqi_rank2_2A_5MHz *)o)->pmi = quantize_subband_pmi(meas,eNB_id,7); + ((wideband_cqi_rank2_2A_5MHz *) o)->cqi1 = sinr2cqi (sinr_tmp, trans_mode); //FIXME: calculate rank2 cqi + ((wideband_cqi_rank2_2A_5MHz *) o)->cqi2 = sinr2cqi (sinr_tmp, trans_mode); //FIXME: calculate rank2 cqi + ((wideband_cqi_rank2_2A_5MHz *) o)->pmi = quantize_subband_pmi (meas, eNB_id, 7); break; case HLC_subband_cqi_nopmi: - ((HLC_subband_cqi_nopmi_5MHz *)o)->cqi1 = sinr2cqi(sinr_tmp,trans_mode); - ((HLC_subband_cqi_nopmi_5MHz *)o)->diffcqi1 = fill_subband_cqi(meas,eNB_id,trans_mode,7); + ((HLC_subband_cqi_nopmi_5MHz *) o)->cqi1 = sinr2cqi (sinr_tmp, trans_mode); + ((HLC_subband_cqi_nopmi_5MHz *) o)->diffcqi1 = fill_subband_cqi (meas, eNB_id, trans_mode, 7); break; case HLC_subband_cqi_rank1_2A: - ((HLC_subband_cqi_rank1_2A_5MHz *)o)->cqi1 = sinr2cqi(sinr_tmp,trans_mode); - ((HLC_subband_cqi_rank1_2A_5MHz *)o)->diffcqi1 = fill_subband_cqi(meas,eNB_id,trans_mode,7); - ((HLC_subband_cqi_rank1_2A_5MHz *)o)->pmi = quantize_wideband_pmi(meas,eNB_id); + ((HLC_subband_cqi_rank1_2A_5MHz *) o)->cqi1 = sinr2cqi (sinr_tmp, trans_mode); + ((HLC_subband_cqi_rank1_2A_5MHz *) o)->diffcqi1 = fill_subband_cqi (meas, eNB_id, trans_mode, 7); + ((HLC_subband_cqi_rank1_2A_5MHz *) o)->pmi = quantize_wideband_pmi (meas, eNB_id); break; case HLC_subband_cqi_rank2_2A: // This has to be improved!!! - ((HLC_subband_cqi_rank2_2A_5MHz *)o)->cqi1 = sinr2cqi(sinr_tmp,trans_mode); - ((HLC_subband_cqi_rank2_2A_5MHz *)o)->diffcqi1 = fill_subband_cqi(meas,eNB_id,trans_mode,7); - ((HLC_subband_cqi_rank2_2A_5MHz *)o)->cqi2 = sinr2cqi(sinr_tmp,trans_mode); - ((HLC_subband_cqi_rank2_2A_5MHz *)o)->diffcqi2 = fill_subband_cqi(meas,eNB_id,trans_mode,7); - ((HLC_subband_cqi_rank2_2A_5MHz *)o)->pmi = quantize_subband_pmi(meas,eNB_id,7); + ((HLC_subband_cqi_rank2_2A_5MHz *) o)->cqi1 = sinr2cqi (sinr_tmp, trans_mode); + ((HLC_subband_cqi_rank2_2A_5MHz *) o)->diffcqi1 = fill_subband_cqi (meas, eNB_id, trans_mode, 7); + ((HLC_subband_cqi_rank2_2A_5MHz *) o)->cqi2 = sinr2cqi (sinr_tmp, trans_mode); + ((HLC_subband_cqi_rank2_2A_5MHz *) o)->diffcqi2 = fill_subband_cqi (meas, eNB_id, trans_mode, 7); + ((HLC_subband_cqi_rank2_2A_5MHz *) o)->pmi = quantize_subband_pmi (meas, eNB_id, 7); break; case HLC_subband_cqi_mcs_CBA: // this is the cba mcs uci for cba transmission - ((HLC_subband_cqi_mcs_CBA_5MHz *)o)->mcs = ulsch->harq_processes[harq_pid]->mcs; - ((HLC_subband_cqi_mcs_CBA_5MHz *)o)->crnti = rnti; - LOG_N(PHY,"fill uci for cba rnti %x, mcs %d \n", rnti, ulsch->harq_processes[harq_pid]->mcs); + ((HLC_subband_cqi_mcs_CBA_5MHz *) o)->mcs = ulsch->harq_processes[harq_pid]->mcs; + ((HLC_subband_cqi_mcs_CBA_5MHz *) o)->crnti = rnti; + LOG_N (PHY, "fill uci for cba rnti %x, mcs %d \n", rnti, ulsch->harq_processes[harq_pid]->mcs); break; case ue_selected: - LOG_E(PHY,"fill_CQI ue_selected CQI not supported yet!!!\n"); - AssertFatal(1==0,"fill_CQI ue_selected CQI not supported yet!!!"); + LOG_E (PHY, "fill_CQI ue_selected CQI not supported yet!!!\n"); + AssertFatal (1 == 0, "fill_CQI ue_selected CQI not supported yet!!!"); break; default: - LOG_E(PHY,"unsupported CQI mode (%d)!!!\n",uci_format); - AssertFatal(1==0,"unsupported CQI mode !!!"); + LOG_E (PHY, "unsupported CQI mode (%d)!!!\n", uci_format); + AssertFatal (1 == 0, "unsupported CQI mode !!!"); break; } @@ -6991,51 +6558,51 @@ void fill_CQI(LTE_UE_ULSCH_t *ulsch,PHY_MEASUREMENTS *meas,uint8_t eNB_id,uint8_ case 50: switch (uci_format) { case wideband_cqi_rank1_2A: - ((wideband_cqi_rank1_2A_10MHz *)o)->cqi1 = sinr2cqi(sinr_tmp,trans_mode); - ((wideband_cqi_rank1_2A_10MHz *)o)->pmi = quantize_subband_pmi(meas,eNB_id,9); + ((wideband_cqi_rank1_2A_10MHz *) o)->cqi1 = sinr2cqi (sinr_tmp, trans_mode); + ((wideband_cqi_rank1_2A_10MHz *) o)->pmi = quantize_subband_pmi (meas, eNB_id, 9); break; case wideband_cqi_rank2_2A: - ((wideband_cqi_rank2_2A_10MHz *)o)->cqi1 = sinr2cqi(sinr_tmp,trans_mode); //FIXME: calculate rank2 cqi - ((wideband_cqi_rank2_2A_10MHz *)o)->cqi2 = sinr2cqi(sinr_tmp,trans_mode); //FIXME: calculate rank2 cqi - ((wideband_cqi_rank2_2A_10MHz *)o)->pmi = quantize_subband_pmi(meas,eNB_id,9); + ((wideband_cqi_rank2_2A_10MHz *) o)->cqi1 = sinr2cqi (sinr_tmp, trans_mode); //FIXME: calculate rank2 cqi + ((wideband_cqi_rank2_2A_10MHz *) o)->cqi2 = sinr2cqi (sinr_tmp, trans_mode); //FIXME: calculate rank2 cqi + ((wideband_cqi_rank2_2A_10MHz *) o)->pmi = quantize_subband_pmi (meas, eNB_id, 9); break; case HLC_subband_cqi_nopmi: - ((HLC_subband_cqi_nopmi_10MHz *)o)->cqi1 = sinr2cqi(sinr_tmp,trans_mode); - ((HLC_subband_cqi_nopmi_10MHz *)o)->diffcqi1 = fill_subband_cqi(meas,eNB_id,trans_mode,9); + ((HLC_subband_cqi_nopmi_10MHz *) o)->cqi1 = sinr2cqi (sinr_tmp, trans_mode); + ((HLC_subband_cqi_nopmi_10MHz *) o)->diffcqi1 = fill_subband_cqi (meas, eNB_id, trans_mode, 9); break; case HLC_subband_cqi_rank1_2A: - ((HLC_subband_cqi_rank1_2A_10MHz *)o)->cqi1 = sinr2cqi(sinr_tmp,trans_mode); - ((HLC_subband_cqi_rank1_2A_10MHz *)o)->diffcqi1 = fill_subband_cqi(meas,eNB_id,trans_mode,9); - ((HLC_subband_cqi_rank1_2A_10MHz *)o)->pmi = quantize_wideband_pmi(meas,eNB_id); + ((HLC_subband_cqi_rank1_2A_10MHz *) o)->cqi1 = sinr2cqi (sinr_tmp, trans_mode); + ((HLC_subband_cqi_rank1_2A_10MHz *) o)->diffcqi1 = fill_subband_cqi (meas, eNB_id, trans_mode, 9); + ((HLC_subband_cqi_rank1_2A_10MHz *) o)->pmi = quantize_wideband_pmi (meas, eNB_id); break; case HLC_subband_cqi_rank2_2A: // This has to be improved!!! - ((HLC_subband_cqi_rank2_2A_10MHz *)o)->cqi1 = sinr2cqi(sinr_tmp,trans_mode); - ((HLC_subband_cqi_rank2_2A_10MHz *)o)->diffcqi1 = fill_subband_cqi(meas,eNB_id,trans_mode,9); - ((HLC_subband_cqi_rank2_2A_10MHz *)o)->cqi2 = sinr2cqi(sinr_tmp,trans_mode); - ((HLC_subband_cqi_rank2_2A_10MHz *)o)->diffcqi2 = fill_subband_cqi(meas,eNB_id,trans_mode,9); - ((HLC_subband_cqi_rank2_2A_10MHz *)o)->pmi = quantize_subband_pmi(meas,eNB_id,9); + ((HLC_subband_cqi_rank2_2A_10MHz *) o)->cqi1 = sinr2cqi (sinr_tmp, trans_mode); + ((HLC_subband_cqi_rank2_2A_10MHz *) o)->diffcqi1 = fill_subband_cqi (meas, eNB_id, trans_mode, 9); + ((HLC_subband_cqi_rank2_2A_10MHz *) o)->cqi2 = sinr2cqi (sinr_tmp, trans_mode); + ((HLC_subband_cqi_rank2_2A_10MHz *) o)->diffcqi2 = fill_subband_cqi (meas, eNB_id, trans_mode, 9); + ((HLC_subband_cqi_rank2_2A_10MHz *) o)->pmi = quantize_subband_pmi (meas, eNB_id, 9); break; case HLC_subband_cqi_mcs_CBA: // this is the cba mcs uci for cba transmission - ((HLC_subband_cqi_mcs_CBA_10MHz *)o)->mcs = ulsch->harq_processes[harq_pid]->mcs; - ((HLC_subband_cqi_mcs_CBA_10MHz *)o)->crnti = rnti; - LOG_N(PHY,"fill uci for cba rnti %x, mcs %d \n", rnti, ulsch->harq_processes[harq_pid]->mcs); + ((HLC_subband_cqi_mcs_CBA_10MHz *) o)->mcs = ulsch->harq_processes[harq_pid]->mcs; + ((HLC_subband_cqi_mcs_CBA_10MHz *) o)->crnti = rnti; + LOG_N (PHY, "fill uci for cba rnti %x, mcs %d \n", rnti, ulsch->harq_processes[harq_pid]->mcs); break; case ue_selected: - LOG_E(PHY,"fill_CQI ue_selected CQI not supported yet!!!\n"); - AssertFatal(1==0,"fill_CQI ue_selected CQI not supported yet!!!"); + LOG_E (PHY, "fill_CQI ue_selected CQI not supported yet!!!\n"); + AssertFatal (1 == 0, "fill_CQI ue_selected CQI not supported yet!!!"); break; default: - LOG_E(PHY,"unsupported CQI mode (%d)!!!\n",uci_format); - AssertFatal(1==0,"unsupported CQI mode !!!"); + LOG_E (PHY, "unsupported CQI mode (%d)!!!\n", uci_format); + AssertFatal (1 == 0, "unsupported CQI mode !!!"); break; } @@ -7045,51 +6612,51 @@ void fill_CQI(LTE_UE_ULSCH_t *ulsch,PHY_MEASUREMENTS *meas,uint8_t eNB_id,uint8_ case 100: switch (uci_format) { case wideband_cqi_rank1_2A: - ((wideband_cqi_rank1_2A_20MHz *)o)->cqi1 = sinr2cqi(sinr_tmp,trans_mode); - ((wideband_cqi_rank1_2A_20MHz *)o)->pmi = quantize_subband_pmi(meas,eNB_id,13); + ((wideband_cqi_rank1_2A_20MHz *) o)->cqi1 = sinr2cqi (sinr_tmp, trans_mode); + ((wideband_cqi_rank1_2A_20MHz *) o)->pmi = quantize_subband_pmi (meas, eNB_id, 13); break; case wideband_cqi_rank2_2A: - ((wideband_cqi_rank2_2A_20MHz *)o)->cqi1 = sinr2cqi(sinr_tmp,trans_mode); //FIXME: calculate rank2 cqi - ((wideband_cqi_rank2_2A_20MHz *)o)->cqi2 = sinr2cqi(sinr_tmp,trans_mode); //FIXME: calculate rank2 cqi - ((wideband_cqi_rank2_2A_20MHz *)o)->pmi = quantize_subband_pmi(meas,eNB_id,13); + ((wideband_cqi_rank2_2A_20MHz *) o)->cqi1 = sinr2cqi (sinr_tmp, trans_mode); //FIXME: calculate rank2 cqi + ((wideband_cqi_rank2_2A_20MHz *) o)->cqi2 = sinr2cqi (sinr_tmp, trans_mode); //FIXME: calculate rank2 cqi + ((wideband_cqi_rank2_2A_20MHz *) o)->pmi = quantize_subband_pmi (meas, eNB_id, 13); break; case HLC_subband_cqi_nopmi: - ((HLC_subband_cqi_nopmi_20MHz *)o)->cqi1 = sinr2cqi(sinr_tmp,trans_mode); - ((HLC_subband_cqi_nopmi_20MHz *)o)->diffcqi1 = fill_subband_cqi(meas,eNB_id,trans_mode,13); + ((HLC_subband_cqi_nopmi_20MHz *) o)->cqi1 = sinr2cqi (sinr_tmp, trans_mode); + ((HLC_subband_cqi_nopmi_20MHz *) o)->diffcqi1 = fill_subband_cqi (meas, eNB_id, trans_mode, 13); break; case HLC_subband_cqi_rank1_2A: - ((HLC_subband_cqi_rank1_2A_20MHz *)o)->cqi1 = sinr2cqi(sinr_tmp,trans_mode); - ((HLC_subband_cqi_rank1_2A_20MHz *)o)->diffcqi1 = fill_subband_cqi(meas,eNB_id,trans_mode,13); - ((HLC_subband_cqi_rank1_2A_20MHz *)o)->pmi = quantize_wideband_pmi(meas,eNB_id); + ((HLC_subband_cqi_rank1_2A_20MHz *) o)->cqi1 = sinr2cqi (sinr_tmp, trans_mode); + ((HLC_subband_cqi_rank1_2A_20MHz *) o)->diffcqi1 = fill_subband_cqi (meas, eNB_id, trans_mode, 13); + ((HLC_subband_cqi_rank1_2A_20MHz *) o)->pmi = quantize_wideband_pmi (meas, eNB_id); break; case HLC_subband_cqi_rank2_2A: // This has to be improved!!! - ((HLC_subband_cqi_rank2_2A_20MHz *)o)->cqi1 = sinr2cqi(sinr_tmp,trans_mode); - ((HLC_subband_cqi_rank2_2A_20MHz *)o)->diffcqi1 = fill_subband_cqi(meas,eNB_id,trans_mode,13); - ((HLC_subband_cqi_rank2_2A_20MHz *)o)->cqi2 = sinr2cqi(sinr_tmp,trans_mode); - ((HLC_subband_cqi_rank2_2A_20MHz *)o)->diffcqi2 = fill_subband_cqi(meas,eNB_id,trans_mode,13); - ((HLC_subband_cqi_rank2_2A_20MHz *)o)->pmi = quantize_subband_pmi(meas,eNB_id,13); + ((HLC_subband_cqi_rank2_2A_20MHz *) o)->cqi1 = sinr2cqi (sinr_tmp, trans_mode); + ((HLC_subband_cqi_rank2_2A_20MHz *) o)->diffcqi1 = fill_subband_cqi (meas, eNB_id, trans_mode, 13); + ((HLC_subband_cqi_rank2_2A_20MHz *) o)->cqi2 = sinr2cqi (sinr_tmp, trans_mode); + ((HLC_subband_cqi_rank2_2A_20MHz *) o)->diffcqi2 = fill_subband_cqi (meas, eNB_id, trans_mode, 13); + ((HLC_subband_cqi_rank2_2A_20MHz *) o)->pmi = quantize_subband_pmi (meas, eNB_id, 13); break; case HLC_subband_cqi_mcs_CBA: // this is the cba mcs uci for cba transmission - ((HLC_subband_cqi_mcs_CBA_20MHz *)o)->mcs = ulsch->harq_processes[harq_pid]->mcs; - ((HLC_subband_cqi_mcs_CBA_20MHz *)o)->crnti = rnti; - LOG_N(PHY,"fill uci for cba rnti %x, mcs %d \n", rnti, ulsch->harq_processes[harq_pid]->mcs); + ((HLC_subband_cqi_mcs_CBA_20MHz *) o)->mcs = ulsch->harq_processes[harq_pid]->mcs; + ((HLC_subband_cqi_mcs_CBA_20MHz *) o)->crnti = rnti; + LOG_N (PHY, "fill uci for cba rnti %x, mcs %d \n", rnti, ulsch->harq_processes[harq_pid]->mcs); break; case ue_selected: - LOG_E(PHY,"fill_CQI ue_selected CQI not supported yet!!!\n"); - AssertFatal(1==0,"fill_CQI ue_selected CQI not supported yet!!!"); + LOG_E (PHY, "fill_CQI ue_selected CQI not supported yet!!!\n"); + AssertFatal (1 == 0, "fill_CQI ue_selected CQI not supported yet!!!"); break; default: - LOG_E(PHY,"unsupported CQI mode (%d)!!!\n",uci_format); - AssertFatal(1==0,"unsupported CQI mode !!!"); + LOG_E (PHY, "unsupported CQI mode (%d)!!!\n", uci_format); + AssertFatal (1 == 0, "unsupported CQI mode !!!"); break; } @@ -7101,85 +6668,76 @@ void fill_CQI(LTE_UE_ULSCH_t *ulsch,PHY_MEASUREMENTS *meas,uint8_t eNB_id,uint8_ } -void reset_cba_uci(void *o) +void +reset_cba_uci (void *o) { // this is the cba mcs uci for cba transmission - ((HLC_subband_cqi_mcs_CBA_5MHz *)o)->mcs = 0; //fixme - ((HLC_subband_cqi_mcs_CBA_5MHz *)o)->crnti = 0x0; + ((HLC_subband_cqi_mcs_CBA_5MHz *) o)->mcs = 0; //fixme + ((HLC_subband_cqi_mcs_CBA_5MHz *) o)->crnti = 0x0; } -uint32_t pmi_extend(LTE_DL_FRAME_PARMS *frame_parms,uint8_t wideband_pmi, uint8_t rank) +uint32_t +pmi_extend (LTE_DL_FRAME_PARMS * frame_parms, uint8_t wideband_pmi, uint8_t rank) { - uint8_t i,wideband_pmi2; - uint32_t pmi_ex = 0; + uint8_t i, wideband_pmi2; + uint32_t pmi_ex = 0; - if (frame_parms->N_RB_DL!=25) { - LOG_E(PHY,"pmi_extend not yet implemented for anything else than 25PRB\n"); - return(-1); + if (frame_parms->N_RB_DL != 25) { + LOG_E (PHY, "pmi_extend not yet implemented for anything else than 25PRB\n"); + return (-1); } - if (rank==0) { - wideband_pmi2=wideband_pmi&3; - for (i=0; i<14; i+=2) - pmi_ex|=(wideband_pmi2<transmission_mode[eNB_id]; - ANFBmode_t AckNackFBMode; + uint8_t harq_pid; + uint8_t transmission_mode = ue->transmission_mode[eNB_id]; + ANFBmode_t AckNackFBMode; LTE_UE_ULSCH_t *ulsch = ue->ulsch[eNB_id]; LTE_UE_DLSCH_t **dlsch = ue->dlsch[ue->current_thread_id[subframe]][0]; PHY_MEASUREMENTS *meas = &ue->measurements; LTE_DL_FRAME_PARMS *frame_parms = &ue->frame_parms; // uint32_t current_dlsch_cqi = ue->current_dlsch_cqi[eNB_id]; - if(frame_parms->frame_type == TDD) - { - AckNackFBMode = ue->pucch_config_dedicated[eNB_id].tdd_AckNackFeedbackMode; - } - else - { - AckNackFBMode = 1; // 1: multiplexing for FDD + if (frame_parms->frame_type == TDD) { + AckNackFBMode = ue->pucch_config_dedicated[eNB_id].tdd_AckNackFeedbackMode; + } else { + AckNackFBMode = 1; // 1: multiplexing for FDD } - uint32_t cqi_req; - uint32_t dai=3; - uint32_t cshift; - uint32_t TPC; - uint32_t ndi; - uint32_t mcs; - uint32_t rballoc,RIV_max; - uint16_t* RIV2first_rb_LUT; - uint16_t* RIV2nb_rb_LUT; + uint32_t cqi_req; + uint32_t dai = 3; + uint32_t cshift; + uint32_t TPC; + uint32_t ndi; + uint32_t mcs; + uint32_t rballoc, RIV_max; + uint16_t *RIV2first_rb_LUT; + uint16_t *RIV2nb_rb_LUT; // uint32_t hopping; // uint32_t type; @@ -7192,35 +6750,32 @@ int generate_ue_ulsch_params_from_dci(void *dci_pdu, if (rnti == ra_rnti) harq_pid = 0; else - harq_pid = subframe2harq_pid(frame_parms, - pdcch_alloc2ul_frame(frame_parms,proc->frame_rx,subframe), - pdcch_alloc2ul_subframe(frame_parms,subframe)); + harq_pid = subframe2harq_pid (frame_parms, pdcch_alloc2ul_frame (frame_parms, proc->frame_rx, subframe), pdcch_alloc2ul_subframe (frame_parms, subframe)); if (harq_pid == 255) { - LOG_E(PHY, "frame %d, subframe %d, rnti %x, format %d: illegal harq_pid!\n", - proc->frame_rx, subframe, rnti, dci_format); - return(-1); + LOG_E (PHY, "frame %d, subframe %d, rnti %x, format %d: illegal harq_pid!\n", proc->frame_rx, subframe, rnti, dci_format); + return (-1); } switch (frame_parms->N_RB_DL) { case 6: if (frame_parms->frame_type == TDD) { - cqi_req = ((DCI0_1_5MHz_TDD_1_6_t *)dci_pdu)->cqi_req; - dai = ((DCI0_1_5MHz_TDD_1_6_t *)dci_pdu)->dai; - cshift = ((DCI0_1_5MHz_TDD_1_6_t *)dci_pdu)->cshift; - TPC = ((DCI0_1_5MHz_TDD_1_6_t *)dci_pdu)->TPC; - ndi = ((DCI0_1_5MHz_TDD_1_6_t *)dci_pdu)->ndi; - mcs = ((DCI0_1_5MHz_TDD_1_6_t *)dci_pdu)->mcs; - rballoc = ((DCI0_1_5MHz_TDD_1_6_t *)dci_pdu)->rballoc; + cqi_req = ((DCI0_1_5MHz_TDD_1_6_t *) dci_pdu)->cqi_req; + dai = ((DCI0_1_5MHz_TDD_1_6_t *) dci_pdu)->dai; + cshift = ((DCI0_1_5MHz_TDD_1_6_t *) dci_pdu)->cshift; + TPC = ((DCI0_1_5MHz_TDD_1_6_t *) dci_pdu)->TPC; + ndi = ((DCI0_1_5MHz_TDD_1_6_t *) dci_pdu)->ndi; + mcs = ((DCI0_1_5MHz_TDD_1_6_t *) dci_pdu)->mcs; + rballoc = ((DCI0_1_5MHz_TDD_1_6_t *) dci_pdu)->rballoc; // hopping = ((DCI0_1_5MHz_TDD_1_6_t *)dci_pdu)->hopping=hopping; // type = ((DCI0_1_5MHz_TDD_1_6_t *)dci_pdu)->type; } else { - cqi_req = ((DCI0_1_5MHz_FDD_t *)dci_pdu)->cqi_req; - cshift = ((DCI0_1_5MHz_FDD_t *)dci_pdu)->cshift; - TPC = ((DCI0_1_5MHz_FDD_t *)dci_pdu)->TPC; - ndi = ((DCI0_1_5MHz_FDD_t *)dci_pdu)->ndi; - mcs = ((DCI0_1_5MHz_FDD_t *)dci_pdu)->mcs; - rballoc = ((DCI0_1_5MHz_FDD_t *)dci_pdu)->rballoc; + cqi_req = ((DCI0_1_5MHz_FDD_t *) dci_pdu)->cqi_req; + cshift = ((DCI0_1_5MHz_FDD_t *) dci_pdu)->cshift; + TPC = ((DCI0_1_5MHz_FDD_t *) dci_pdu)->TPC; + ndi = ((DCI0_1_5MHz_FDD_t *) dci_pdu)->ndi; + mcs = ((DCI0_1_5MHz_FDD_t *) dci_pdu)->mcs; + rballoc = ((DCI0_1_5MHz_FDD_t *) dci_pdu)->rballoc; // hopping = ((DCI0_1_5MHz_FDD_t *)dci_pdu)->hopping=hopping; // type = ((DCI0_1_5MHz_FDD_t *)dci_pdu)->type; } @@ -7233,22 +6788,22 @@ int generate_ue_ulsch_params_from_dci(void *dci_pdu, case 25: if (frame_parms->frame_type == TDD) { - cqi_req = ((DCI0_5MHz_TDD_1_6_t *)dci_pdu)->cqi_req; - dai = ((DCI0_5MHz_TDD_1_6_t *)dci_pdu)->dai; - cshift = ((DCI0_5MHz_TDD_1_6_t *)dci_pdu)->cshift; - TPC = ((DCI0_5MHz_TDD_1_6_t *)dci_pdu)->TPC; - ndi = ((DCI0_5MHz_TDD_1_6_t *)dci_pdu)->ndi; - mcs = ((DCI0_5MHz_TDD_1_6_t *)dci_pdu)->mcs; - rballoc = ((DCI0_5MHz_TDD_1_6_t *)dci_pdu)->rballoc; + cqi_req = ((DCI0_5MHz_TDD_1_6_t *) dci_pdu)->cqi_req; + dai = ((DCI0_5MHz_TDD_1_6_t *) dci_pdu)->dai; + cshift = ((DCI0_5MHz_TDD_1_6_t *) dci_pdu)->cshift; + TPC = ((DCI0_5MHz_TDD_1_6_t *) dci_pdu)->TPC; + ndi = ((DCI0_5MHz_TDD_1_6_t *) dci_pdu)->ndi; + mcs = ((DCI0_5MHz_TDD_1_6_t *) dci_pdu)->mcs; + rballoc = ((DCI0_5MHz_TDD_1_6_t *) dci_pdu)->rballoc; // hopping = ((DCI0_5MHz_TDD_1_6_t *)dci_pdu)->hopping=hopping; // type = ((DCI0_5MHz_TDD_1_6_t *)dci_pdu)->type; } else { - cqi_req = ((DCI0_5MHz_FDD_t *)dci_pdu)->cqi_req; - cshift = ((DCI0_5MHz_FDD_t *)dci_pdu)->cshift; - TPC = ((DCI0_5MHz_FDD_t *)dci_pdu)->TPC; - ndi = ((DCI0_5MHz_FDD_t *)dci_pdu)->ndi; - mcs = ((DCI0_5MHz_FDD_t *)dci_pdu)->mcs; - rballoc = ((DCI0_5MHz_FDD_t *)dci_pdu)->rballoc; + cqi_req = ((DCI0_5MHz_FDD_t *) dci_pdu)->cqi_req; + cshift = ((DCI0_5MHz_FDD_t *) dci_pdu)->cshift; + TPC = ((DCI0_5MHz_FDD_t *) dci_pdu)->TPC; + ndi = ((DCI0_5MHz_FDD_t *) dci_pdu)->ndi; + mcs = ((DCI0_5MHz_FDD_t *) dci_pdu)->mcs; + rballoc = ((DCI0_5MHz_FDD_t *) dci_pdu)->rballoc; // hopping = ((DCI0_5MHz_FDD_t *)dci_pdu)->hopping=hopping; // type = ((DCI0_5MHz_FDD_t *)dci_pdu)->type; } @@ -7261,22 +6816,22 @@ int generate_ue_ulsch_params_from_dci(void *dci_pdu, case 50: if (frame_parms->frame_type == TDD) { - cqi_req = ((DCI0_10MHz_TDD_1_6_t *)dci_pdu)->cqi_req; - dai = ((DCI0_10MHz_TDD_1_6_t *)dci_pdu)->dai; - cshift = ((DCI0_10MHz_TDD_1_6_t *)dci_pdu)->cshift; - TPC = ((DCI0_10MHz_TDD_1_6_t *)dci_pdu)->TPC; - ndi = ((DCI0_10MHz_TDD_1_6_t *)dci_pdu)->ndi; - mcs = ((DCI0_10MHz_TDD_1_6_t *)dci_pdu)->mcs; - rballoc = ((DCI0_10MHz_TDD_1_6_t *)dci_pdu)->rballoc; + cqi_req = ((DCI0_10MHz_TDD_1_6_t *) dci_pdu)->cqi_req; + dai = ((DCI0_10MHz_TDD_1_6_t *) dci_pdu)->dai; + cshift = ((DCI0_10MHz_TDD_1_6_t *) dci_pdu)->cshift; + TPC = ((DCI0_10MHz_TDD_1_6_t *) dci_pdu)->TPC; + ndi = ((DCI0_10MHz_TDD_1_6_t *) dci_pdu)->ndi; + mcs = ((DCI0_10MHz_TDD_1_6_t *) dci_pdu)->mcs; + rballoc = ((DCI0_10MHz_TDD_1_6_t *) dci_pdu)->rballoc; // hopping = ((DCI0_10MHz_TDD_1_6_t *)dci_pdu)->hopping=hopping; // type = ((DCI0_10MHz_TDD_1_6_t *)dci_pdu)->type; } else { - cqi_req = ((DCI0_10MHz_FDD_t *)dci_pdu)->cqi_req; - cshift = ((DCI0_10MHz_FDD_t *)dci_pdu)->cshift; - TPC = ((DCI0_10MHz_FDD_t *)dci_pdu)->TPC; - ndi = ((DCI0_10MHz_FDD_t *)dci_pdu)->ndi; - mcs = ((DCI0_10MHz_FDD_t *)dci_pdu)->mcs; - rballoc = ((DCI0_10MHz_FDD_t *)dci_pdu)->rballoc; + cqi_req = ((DCI0_10MHz_FDD_t *) dci_pdu)->cqi_req; + cshift = ((DCI0_10MHz_FDD_t *) dci_pdu)->cshift; + TPC = ((DCI0_10MHz_FDD_t *) dci_pdu)->TPC; + ndi = ((DCI0_10MHz_FDD_t *) dci_pdu)->ndi; + mcs = ((DCI0_10MHz_FDD_t *) dci_pdu)->mcs; + rballoc = ((DCI0_10MHz_FDD_t *) dci_pdu)->rballoc; // hopping = ((DCI0_10MHz_FDD_t *)dci_pdu)->hopping=hopping; // type = ((DCI0_10MHz_FDD_t *)dci_pdu)->type; } @@ -7289,22 +6844,22 @@ int generate_ue_ulsch_params_from_dci(void *dci_pdu, case 100: if (frame_parms->frame_type == TDD) { - cqi_req = ((DCI0_20MHz_TDD_1_6_t *)dci_pdu)->cqi_req; - dai = ((DCI0_20MHz_TDD_1_6_t *)dci_pdu)->dai; - cshift = ((DCI0_20MHz_TDD_1_6_t *)dci_pdu)->cshift; - TPC = ((DCI0_20MHz_TDD_1_6_t *)dci_pdu)->TPC; - ndi = ((DCI0_20MHz_TDD_1_6_t *)dci_pdu)->ndi; - mcs = ((DCI0_20MHz_TDD_1_6_t *)dci_pdu)->mcs; - rballoc = ((DCI0_20MHz_TDD_1_6_t *)dci_pdu)->rballoc; + cqi_req = ((DCI0_20MHz_TDD_1_6_t *) dci_pdu)->cqi_req; + dai = ((DCI0_20MHz_TDD_1_6_t *) dci_pdu)->dai; + cshift = ((DCI0_20MHz_TDD_1_6_t *) dci_pdu)->cshift; + TPC = ((DCI0_20MHz_TDD_1_6_t *) dci_pdu)->TPC; + ndi = ((DCI0_20MHz_TDD_1_6_t *) dci_pdu)->ndi; + mcs = ((DCI0_20MHz_TDD_1_6_t *) dci_pdu)->mcs; + rballoc = ((DCI0_20MHz_TDD_1_6_t *) dci_pdu)->rballoc; // hopping = ((DCI0_20MHz_TDD_1_6_t *)dci_pdu)->hopping=hopping; // type = ((DCI0_20MHz_TDD_1_6_t *)dci_pdu)->type; } else { - cqi_req = ((DCI0_20MHz_FDD_t *)dci_pdu)->cqi_req; - cshift = ((DCI0_20MHz_FDD_t *)dci_pdu)->cshift; - TPC = ((DCI0_20MHz_FDD_t *)dci_pdu)->TPC; - ndi = ((DCI0_20MHz_FDD_t *)dci_pdu)->ndi; - mcs = ((DCI0_20MHz_FDD_t *)dci_pdu)->mcs; - rballoc = ((DCI0_20MHz_FDD_t *)dci_pdu)->rballoc; + cqi_req = ((DCI0_20MHz_FDD_t *) dci_pdu)->cqi_req; + cshift = ((DCI0_20MHz_FDD_t *) dci_pdu)->cshift; + TPC = ((DCI0_20MHz_FDD_t *) dci_pdu)->TPC; + ndi = ((DCI0_20MHz_FDD_t *) dci_pdu)->ndi; + mcs = ((DCI0_20MHz_FDD_t *) dci_pdu)->mcs; + rballoc = ((DCI0_20MHz_FDD_t *) dci_pdu)->rballoc; // hopping = ((DCI0_20MHz_FDD_t *)dci_pdu)->hopping=hopping; // type = ((DCI0_20MHz_FDD_t *)dci_pdu)->type; } @@ -7317,58 +6872,52 @@ int generate_ue_ulsch_params_from_dci(void *dci_pdu, break; default: - LOG_E(PHY,"Invalid N_RB_DL %d\n", frame_parms->N_RB_DL); + LOG_E (PHY, "Invalid N_RB_DL %d\n", frame_parms->N_RB_DL); DevParam (frame_parms->N_RB_DL, 0, 0); break; } if (rballoc > RIV_max) { - LOG_E(PHY,"frame %d, subframe %d, rnti %x, format %d: FATAL ERROR: generate_ue_ulsch_params_from_dci, rb_alloc[%d] > RIV_max[%d]\n", - proc->frame_rx, subframe, rnti, dci_format,rballoc,RIV_max); - LOG_E(PHY,"Wrong DCI0 detection, do not transmit PUSCH for HARQID: %d\n",harq_pid); + LOG_E (PHY, "frame %d, subframe %d, rnti %x, format %d: FATAL ERROR: generate_ue_ulsch_params_from_dci, rb_alloc[%d] > RIV_max[%d]\n", + proc->frame_rx, subframe, rnti, dci_format, rballoc, RIV_max); + LOG_E (PHY, "Wrong DCI0 detection, do not transmit PUSCH for HARQID: %d\n", harq_pid); ulsch->harq_processes[harq_pid]->subframe_scheduling_flag = 0; - return(-1); + return (-1); } - // indicate that this process is to be serviced in subframe n+4 if ((rnti >= cba_rnti) && (rnti < p_rnti)) - ulsch->harq_processes[harq_pid]->subframe_cba_scheduling_flag = 1; //+=1 this indicates the number of dci / cba group: not supported in the data struct - else - { - ulsch->harq_processes[harq_pid]->subframe_scheduling_flag = 1; - //LOG_I(PHY,"[HARQ-UL harqId: %d] DCI0 ==> subframe_scheduling_flag = %d round: %d\n", harq_pid, ulsch->harq_processes[harq_pid]->subframe_scheduling_flag, ulsch->harq_processes[harq_pid]->round); + ulsch->harq_processes[harq_pid]->subframe_cba_scheduling_flag = 1; //+=1 this indicates the number of dci / cba group: not supported in the data struct + else { + ulsch->harq_processes[harq_pid]->subframe_scheduling_flag = 1; + //LOG_I(PHY,"[HARQ-UL harqId: %d] DCI0 ==> subframe_scheduling_flag = %d round: %d\n", harq_pid, ulsch->harq_processes[harq_pid]->subframe_scheduling_flag, ulsch->harq_processes[harq_pid]->round); } - ulsch->harq_processes[harq_pid]->TPC = TPC; - ulsch->harq_processes[harq_pid]->first_rb = RIV2first_rb_LUT[rballoc]; - ulsch->harq_processes[harq_pid]->nb_rb = RIV2nb_rb_LUT[rballoc]; + ulsch->harq_processes[harq_pid]->TPC = TPC; + ulsch->harq_processes[harq_pid]->first_rb = RIV2first_rb_LUT[rballoc]; + ulsch->harq_processes[harq_pid]->nb_rb = RIV2nb_rb_LUT[rballoc]; if (ue->ul_power_control_dedicated[eNB_id].accumulationEnabled == 1) { - LOG_D(PHY,"[UE %d][PUSCH %d] Frame %d subframe %d: f_pusch (ACC) %d, adjusting by %d (TPC %d)\n", - ue->Mod_id,harq_pid,proc->frame_rx,subframe,ulsch->f_pusch, - delta_PUSCH_acc[ue->ulsch[eNB_id]->harq_processes[harq_pid]->TPC], - ue->ulsch[eNB_id]->harq_processes[harq_pid]->TPC); + LOG_D (PHY, "[UE %d][PUSCH %d] Frame %d subframe %d: f_pusch (ACC) %d, adjusting by %d (TPC %d)\n", + ue->Mod_id, harq_pid, proc->frame_rx, subframe, ulsch->f_pusch, delta_PUSCH_acc[ue->ulsch[eNB_id]->harq_processes[harq_pid]->TPC], ue->ulsch[eNB_id]->harq_processes[harq_pid]->TPC); ulsch->f_pusch += delta_PUSCH_acc[ue->ulsch[eNB_id]->harq_processes[harq_pid]->TPC]; } else { - LOG_D(PHY,"[UE %d][PUSCH %d] Frame %d subframe %d: f_pusch (ABS) %d, adjusting to %d (TPC %d)\n", - ue->Mod_id,harq_pid,proc->frame_rx,subframe,ulsch->f_pusch, - delta_PUSCH_abs[ue->ulsch[eNB_id]->harq_processes[harq_pid]->TPC], - ue->ulsch[eNB_id]->harq_processes[harq_pid]->TPC); + LOG_D (PHY, "[UE %d][PUSCH %d] Frame %d subframe %d: f_pusch (ABS) %d, adjusting to %d (TPC %d)\n", + ue->Mod_id, harq_pid, proc->frame_rx, subframe, ulsch->f_pusch, delta_PUSCH_abs[ue->ulsch[eNB_id]->harq_processes[harq_pid]->TPC], ue->ulsch[eNB_id]->harq_processes[harq_pid]->TPC); ulsch->f_pusch = delta_PUSCH_abs[ue->ulsch[eNB_id]->harq_processes[harq_pid]->TPC]; } - if (ulsch->harq_processes[harq_pid]->first_tx==1) { + if (ulsch->harq_processes[harq_pid]->first_tx == 1) { // ulsch->harq_processes[harq_pid]->Ndi = 1; - ulsch->harq_processes[harq_pid]->first_tx=0; - ulsch->harq_processes[harq_pid]->DCINdi= ndi; + ulsch->harq_processes[harq_pid]->first_tx = 0; + ulsch->harq_processes[harq_pid]->DCINdi = ndi; ulsch->harq_processes[harq_pid]->round = 0; } else { - if (ulsch->harq_processes[harq_pid]->DCINdi!=ndi) { // new SDU opportunity + if (ulsch->harq_processes[harq_pid]->DCINdi != ndi) { // new SDU opportunity // ulsch->harq_processes[harq_pid]->Ndi = 1; - ulsch->harq_processes[harq_pid]->DCINdi= ndi; + ulsch->harq_processes[harq_pid]->DCINdi = ndi; ulsch->harq_processes[harq_pid]->round = 0; } else { // ulsch->harq_processes[harq_pid]->Ndi = 0; @@ -7411,7 +6960,7 @@ int generate_ue_ulsch_params_from_dci(void *dci_pdu, } } - ulsch->harq_processes[harq_pid]->n_DMRS = cshift; + ulsch->harq_processes[harq_pid]->n_DMRS = cshift; //printf("nb_rb %d, first_rb %d (RIV %d)\n",ulsch->harq_processes[harq_pid]->nb_rb,ulsch->harq_processes[harq_pid]->first_rb,rballoc); if ((rnti >= cba_rnti) && (rnti < p_rnti)) { @@ -7423,34 +6972,34 @@ int generate_ue_ulsch_params_from_dci(void *dci_pdu, // printf("[PHY][UE] DCI format 0: harq_pid %d nb_rb %d, rballoc %d\n",harq_pid,ulsch->harq_processes[harq_pid]->nb_rb, // ((DCI0_5MHz_TDD_1_6_t *)dci_pdu)->rballoc); //Mapping of cyclic shift field in DCI format0 to n_DMRS2 (3GPP 36.211, Table 5.5.2.1.1-1) - if(cshift == 0) + if (cshift == 0) ulsch->harq_processes[harq_pid]->n_DMRS2 = 0; - else if(cshift == 1) + else if (cshift == 1) ulsch->harq_processes[harq_pid]->n_DMRS2 = 6; - else if(cshift == 2) + else if (cshift == 2) ulsch->harq_processes[harq_pid]->n_DMRS2 = 3; - else if(cshift == 3) + else if (cshift == 3) ulsch->harq_processes[harq_pid]->n_DMRS2 = 4; - else if(cshift == 4) + else if (cshift == 4) ulsch->harq_processes[harq_pid]->n_DMRS2 = 2; - else if(cshift == 5) + else if (cshift == 5) ulsch->harq_processes[harq_pid]->n_DMRS2 = 8; - else if(cshift == 6) + else if (cshift == 6) ulsch->harq_processes[harq_pid]->n_DMRS2 = 10; - else if(cshift == 7) + else if (cshift == 7) ulsch->harq_processes[harq_pid]->n_DMRS2 = 9; //reserved for cooperative communication /* - if(ulsch->n_DMRS2 == 6) - ulsch->cooperation_flag = 2; - else - ulsch->cooperation_flag = 0; - */ + if(ulsch->n_DMRS2 == 6) + ulsch->cooperation_flag = 2; + else + ulsch->cooperation_flag = 0; + */ - if ((ulsch->harq_processes[harq_pid]->nb_rb>0) && (ulsch->harq_processes[harq_pid]->nb_rb < 25)) - ulsch->power_offset = ue_power_offsets[ulsch->harq_processes[harq_pid]->nb_rb-1]; + if ((ulsch->harq_processes[harq_pid]->nb_rb > 0) && (ulsch->harq_processes[harq_pid]->nb_rb < 25)) + ulsch->power_offset = ue_power_offsets[ulsch->harq_processes[harq_pid]->nb_rb - 1]; // if (ulsch->harq_processes[harq_pid]->Ndi == 1) // ulsch->harq_processes[harq_pid]->status = ACTIVE; @@ -7458,82 +7007,79 @@ int generate_ue_ulsch_params_from_dci(void *dci_pdu, if (cqi_req == 1) { - if( (AntennaInfoDedicated__transmissionMode_tm3 == transmission_mode) || (AntennaInfoDedicated__transmissionMode_tm4 == transmission_mode) ) - { - ulsch->O_RI = 1; - } - else - { - ulsch->O_RI = 0; + if ((AntennaInfoDedicated__transmissionMode_tm3 == transmission_mode) || (AntennaInfoDedicated__transmissionMode_tm4 == transmission_mode)) { + ulsch->O_RI = 1; + } else { + ulsch->O_RI = 0; } //ulsch->O_RI = 0; //we only support 2 antenna ports, so this is always 1 according to 3GPP 36.213 Table - switch(transmission_mode) { + switch (transmission_mode) { // The aperiodic CQI reporting mode is fixed for every transmission mode instead of being configured by higher layer signaling case 1: if ((rnti >= cba_rnti) && (rnti < p_rnti)) { switch (ue->frame_parms.N_RB_DL) { case 6: - ulsch->O = sizeof_HLC_subband_cqi_mcs_CBA_1_5MHz; + ulsch->O = sizeof_HLC_subband_cqi_mcs_CBA_1_5MHz; break; case 25: - ulsch->O = sizeof_HLC_subband_cqi_mcs_CBA_5MHz; + ulsch->O = sizeof_HLC_subband_cqi_mcs_CBA_5MHz; break; case 50: - ulsch->O = sizeof_HLC_subband_cqi_mcs_CBA_10MHz; + ulsch->O = sizeof_HLC_subband_cqi_mcs_CBA_10MHz; break; case 100: - ulsch->O = sizeof_HLC_subband_cqi_mcs_CBA_20MHz; + ulsch->O = sizeof_HLC_subband_cqi_mcs_CBA_20MHz; break; } - ulsch->uci_format = HLC_subband_cqi_mcs_CBA; - ulsch->o_RI[0] = 0; - } else if(meas->rank[eNB_id] == 0) { + ulsch->uci_format = HLC_subband_cqi_mcs_CBA; + ulsch->o_RI[0] = 0; + } else if (meas->rank[eNB_id] == 0) { switch (ue->frame_parms.N_RB_DL) { case 6: - ulsch->O = sizeof_HLC_subband_cqi_nopmi_1_5MHz; + ulsch->O = sizeof_HLC_subband_cqi_nopmi_1_5MHz; break; case 25: - ulsch->O = sizeof_HLC_subband_cqi_nopmi_5MHz; + ulsch->O = sizeof_HLC_subband_cqi_nopmi_5MHz; break; case 50: - ulsch->O = sizeof_HLC_subband_cqi_nopmi_10MHz; + ulsch->O = sizeof_HLC_subband_cqi_nopmi_10MHz; break; case 100: - ulsch->O = sizeof_HLC_subband_cqi_nopmi_20MHz; + ulsch->O = sizeof_HLC_subband_cqi_nopmi_20MHz; break; } - ulsch->uci_format = HLC_subband_cqi_nopmi; - ulsch->o_RI[0] = 0; + ulsch->uci_format = HLC_subband_cqi_nopmi; + ulsch->o_RI[0] = 0; } else { switch (ue->frame_parms.N_RB_DL) { case 6: - ulsch->O = sizeof_HLC_subband_cqi_nopmi_1_5MHz; + ulsch->O = sizeof_HLC_subband_cqi_nopmi_1_5MHz; break; case 25: - ulsch->O = sizeof_HLC_subband_cqi_nopmi_5MHz; + ulsch->O = sizeof_HLC_subband_cqi_nopmi_5MHz; break; case 50: - ulsch->O = sizeof_HLC_subband_cqi_nopmi_10MHz; + ulsch->O = sizeof_HLC_subband_cqi_nopmi_10MHz; break; case 100: - ulsch->O = sizeof_HLC_subband_cqi_nopmi_20MHz; + ulsch->O = sizeof_HLC_subband_cqi_nopmi_20MHz; break; } - ulsch->uci_format = HLC_subband_cqi_nopmi; - ulsch->o_RI[0] = 1; + ulsch->uci_format = HLC_subband_cqi_nopmi; + ulsch->o_RI[0] = 1; } break; @@ -7542,66 +7088,66 @@ int generate_ue_ulsch_params_from_dci(void *dci_pdu, if ((rnti >= cba_rnti) && (rnti < p_rnti)) { switch (ue->frame_parms.N_RB_DL) { case 6: - ulsch->O = sizeof_HLC_subband_cqi_mcs_CBA_1_5MHz; + ulsch->O = sizeof_HLC_subband_cqi_mcs_CBA_1_5MHz; break; case 25: - ulsch->O = sizeof_HLC_subband_cqi_mcs_CBA_5MHz; + ulsch->O = sizeof_HLC_subband_cqi_mcs_CBA_5MHz; break; case 50: - ulsch->O = sizeof_HLC_subband_cqi_mcs_CBA_10MHz; + ulsch->O = sizeof_HLC_subband_cqi_mcs_CBA_10MHz; break; case 100: - ulsch->O = sizeof_HLC_subband_cqi_mcs_CBA_20MHz; + ulsch->O = sizeof_HLC_subband_cqi_mcs_CBA_20MHz; break; } - ulsch->uci_format = HLC_subband_cqi_mcs_CBA; - ulsch->o_RI[0] = 0; - } else if(meas->rank[eNB_id] == 0) { + ulsch->uci_format = HLC_subband_cqi_mcs_CBA; + ulsch->o_RI[0] = 0; + } else if (meas->rank[eNB_id] == 0) { switch (ue->frame_parms.N_RB_DL) { case 6: - ulsch->O = sizeof_HLC_subband_cqi_nopmi_1_5MHz; + ulsch->O = sizeof_HLC_subband_cqi_nopmi_1_5MHz; break; case 25: - ulsch->O = sizeof_HLC_subband_cqi_nopmi_5MHz; + ulsch->O = sizeof_HLC_subband_cqi_nopmi_5MHz; break; case 50: - ulsch->O = sizeof_HLC_subband_cqi_nopmi_10MHz; + ulsch->O = sizeof_HLC_subband_cqi_nopmi_10MHz; break; case 100: - ulsch->O = sizeof_HLC_subband_cqi_nopmi_20MHz; + ulsch->O = sizeof_HLC_subband_cqi_nopmi_20MHz; break; } - ulsch->uci_format = HLC_subband_cqi_nopmi; - ulsch->o_RI[0] = 0; + ulsch->uci_format = HLC_subband_cqi_nopmi; + ulsch->o_RI[0] = 0; } else { switch (ue->frame_parms.N_RB_DL) { case 6: - ulsch->O = sizeof_HLC_subband_cqi_nopmi_1_5MHz; + ulsch->O = sizeof_HLC_subband_cqi_nopmi_1_5MHz; break; case 25: - ulsch->O = sizeof_HLC_subband_cqi_nopmi_5MHz; + ulsch->O = sizeof_HLC_subband_cqi_nopmi_5MHz; break; case 50: - ulsch->O = sizeof_HLC_subband_cqi_nopmi_10MHz; + ulsch->O = sizeof_HLC_subband_cqi_nopmi_10MHz; break; case 100: - ulsch->O = sizeof_HLC_subband_cqi_nopmi_20MHz; + ulsch->O = sizeof_HLC_subband_cqi_nopmi_20MHz; break; } - ulsch->uci_format = HLC_subband_cqi_nopmi; - ulsch->o_RI[0] = 1; + ulsch->uci_format = HLC_subband_cqi_nopmi; + ulsch->o_RI[0] = 1; } break; @@ -7610,66 +7156,66 @@ int generate_ue_ulsch_params_from_dci(void *dci_pdu, if ((rnti >= cba_rnti) && (rnti < p_rnti)) { switch (ue->frame_parms.N_RB_DL) { case 6: - ulsch->O = sizeof_HLC_subband_cqi_mcs_CBA_1_5MHz; + ulsch->O = sizeof_HLC_subband_cqi_mcs_CBA_1_5MHz; break; case 25: - ulsch->O = sizeof_HLC_subband_cqi_mcs_CBA_5MHz; + ulsch->O = sizeof_HLC_subband_cqi_mcs_CBA_5MHz; break; case 50: - ulsch->O = sizeof_HLC_subband_cqi_mcs_CBA_10MHz; + ulsch->O = sizeof_HLC_subband_cqi_mcs_CBA_10MHz; break; case 100: - ulsch->O = sizeof_HLC_subband_cqi_mcs_CBA_20MHz; + ulsch->O = sizeof_HLC_subband_cqi_mcs_CBA_20MHz; break; } - ulsch->uci_format = HLC_subband_cqi_mcs_CBA; - ulsch->o_RI[0] = 0; - } else if(meas->rank[eNB_id] == 0) { + ulsch->uci_format = HLC_subband_cqi_mcs_CBA; + ulsch->o_RI[0] = 0; + } else if (meas->rank[eNB_id] == 0) { switch (ue->frame_parms.N_RB_DL) { case 6: - ulsch->O = sizeof_HLC_subband_cqi_nopmi_1_5MHz; + ulsch->O = sizeof_HLC_subband_cqi_nopmi_1_5MHz; break; case 25: - ulsch->O = sizeof_HLC_subband_cqi_nopmi_5MHz; + ulsch->O = sizeof_HLC_subband_cqi_nopmi_5MHz; break; case 50: - ulsch->O = sizeof_HLC_subband_cqi_nopmi_10MHz; + ulsch->O = sizeof_HLC_subband_cqi_nopmi_10MHz; break; case 100: - ulsch->O = sizeof_HLC_subband_cqi_nopmi_20MHz; + ulsch->O = sizeof_HLC_subband_cqi_nopmi_20MHz; break; } - ulsch->uci_format = HLC_subband_cqi_nopmi; - ulsch->o_RI[0] = 0; + ulsch->uci_format = HLC_subband_cqi_nopmi; + ulsch->o_RI[0] = 0; } else { switch (ue->frame_parms.N_RB_DL) { case 6: - ulsch->O = sizeof_HLC_subband_cqi_nopmi_1_5MHz; + ulsch->O = sizeof_HLC_subband_cqi_nopmi_1_5MHz; break; case 25: - ulsch->O = sizeof_HLC_subband_cqi_nopmi_5MHz; + ulsch->O = sizeof_HLC_subband_cqi_nopmi_5MHz; break; case 50: - ulsch->O = sizeof_HLC_subband_cqi_nopmi_10MHz; + ulsch->O = sizeof_HLC_subband_cqi_nopmi_10MHz; break; case 100: - ulsch->O = sizeof_HLC_subband_cqi_nopmi_20MHz; + ulsch->O = sizeof_HLC_subband_cqi_nopmi_20MHz; break; } - ulsch->uci_format = HLC_subband_cqi_nopmi; - ulsch->o_RI[0] = 1; + ulsch->uci_format = HLC_subband_cqi_nopmi; + ulsch->o_RI[0] = 1; } break; @@ -7678,66 +7224,66 @@ int generate_ue_ulsch_params_from_dci(void *dci_pdu, if ((rnti >= cba_rnti) && (rnti < p_rnti)) { switch (ue->frame_parms.N_RB_DL) { case 6: - ulsch->O = sizeof_HLC_subband_cqi_mcs_CBA_1_5MHz; + ulsch->O = sizeof_HLC_subband_cqi_mcs_CBA_1_5MHz; break; case 25: - ulsch->O = sizeof_HLC_subband_cqi_mcs_CBA_5MHz; + ulsch->O = sizeof_HLC_subband_cqi_mcs_CBA_5MHz; break; case 50: - ulsch->O = sizeof_HLC_subband_cqi_mcs_CBA_10MHz; + ulsch->O = sizeof_HLC_subband_cqi_mcs_CBA_10MHz; break; case 100: - ulsch->O = sizeof_HLC_subband_cqi_mcs_CBA_20MHz; + ulsch->O = sizeof_HLC_subband_cqi_mcs_CBA_20MHz; break; } - ulsch->uci_format = HLC_subband_cqi_mcs_CBA; - ulsch->o_RI[0] = 0; - } else if(meas->rank[eNB_id] == 0) { + ulsch->uci_format = HLC_subband_cqi_mcs_CBA; + ulsch->o_RI[0] = 0; + } else if (meas->rank[eNB_id] == 0) { switch (ue->frame_parms.N_RB_DL) { case 6: - ulsch->O = sizeof_wideband_cqi_rank1_2A_1_5MHz; + ulsch->O = sizeof_wideband_cqi_rank1_2A_1_5MHz; break; case 25: - ulsch->O = sizeof_wideband_cqi_rank1_2A_5MHz; + ulsch->O = sizeof_wideband_cqi_rank1_2A_5MHz; break; case 50: - ulsch->O = sizeof_wideband_cqi_rank1_2A_10MHz; + ulsch->O = sizeof_wideband_cqi_rank1_2A_10MHz; break; case 100: - ulsch->O = sizeof_wideband_cqi_rank1_2A_20MHz; + ulsch->O = sizeof_wideband_cqi_rank1_2A_20MHz; break; } - ulsch->uci_format = wideband_cqi_rank1_2A; - ulsch->o_RI[0] = 0; + ulsch->uci_format = wideband_cqi_rank1_2A; + ulsch->o_RI[0] = 0; } else { switch (ue->frame_parms.N_RB_DL) { case 6: - ulsch->O = sizeof_wideband_cqi_rank2_2A_1_5MHz; + ulsch->O = sizeof_wideband_cqi_rank2_2A_1_5MHz; break; case 25: - ulsch->O = sizeof_wideband_cqi_rank2_2A_5MHz; + ulsch->O = sizeof_wideband_cqi_rank2_2A_5MHz; break; case 50: - ulsch->O = sizeof_wideband_cqi_rank2_2A_10MHz; + ulsch->O = sizeof_wideband_cqi_rank2_2A_10MHz; break; case 100: - ulsch->O = sizeof_wideband_cqi_rank2_2A_20MHz; + ulsch->O = sizeof_wideband_cqi_rank2_2A_20MHz; break; } - ulsch->uci_format = wideband_cqi_rank2_2A; - ulsch->o_RI[0] = 1; + ulsch->uci_format = wideband_cqi_rank2_2A; + ulsch->o_RI[0] = 1; } break; @@ -7746,66 +7292,66 @@ int generate_ue_ulsch_params_from_dci(void *dci_pdu, if ((rnti >= cba_rnti) && (rnti < p_rnti)) { switch (ue->frame_parms.N_RB_DL) { case 6: - ulsch->O = sizeof_HLC_subband_cqi_mcs_CBA_1_5MHz; + ulsch->O = sizeof_HLC_subband_cqi_mcs_CBA_1_5MHz; break; case 25: - ulsch->O = sizeof_HLC_subband_cqi_mcs_CBA_5MHz; + ulsch->O = sizeof_HLC_subband_cqi_mcs_CBA_5MHz; break; case 50: - ulsch->O = sizeof_HLC_subband_cqi_mcs_CBA_10MHz; + ulsch->O = sizeof_HLC_subband_cqi_mcs_CBA_10MHz; break; case 100: - ulsch->O = sizeof_HLC_subband_cqi_mcs_CBA_20MHz; + ulsch->O = sizeof_HLC_subband_cqi_mcs_CBA_20MHz; break; } - ulsch->uci_format = HLC_subband_cqi_mcs_CBA; - ulsch->o_RI[0] = 0; - } else if(meas->rank[eNB_id] == 0) { + ulsch->uci_format = HLC_subband_cqi_mcs_CBA; + ulsch->o_RI[0] = 0; + } else if (meas->rank[eNB_id] == 0) { switch (ue->frame_parms.N_RB_DL) { case 6: - ulsch->O = sizeof_wideband_cqi_rank1_2A_1_5MHz; + ulsch->O = sizeof_wideband_cqi_rank1_2A_1_5MHz; break; case 25: - ulsch->O = sizeof_wideband_cqi_rank1_2A_5MHz; + ulsch->O = sizeof_wideband_cqi_rank1_2A_5MHz; break; case 50: - ulsch->O = sizeof_wideband_cqi_rank1_2A_10MHz; + ulsch->O = sizeof_wideband_cqi_rank1_2A_10MHz; break; case 100: - ulsch->O = sizeof_wideband_cqi_rank1_2A_20MHz; + ulsch->O = sizeof_wideband_cqi_rank1_2A_20MHz; break; } - ulsch->uci_format = wideband_cqi_rank1_2A; - ulsch->o_RI[0] = 0; + ulsch->uci_format = wideband_cqi_rank1_2A; + ulsch->o_RI[0] = 0; } else { switch (ue->frame_parms.N_RB_DL) { case 6: - ulsch->O = sizeof_wideband_cqi_rank2_2A_1_5MHz; + ulsch->O = sizeof_wideband_cqi_rank2_2A_1_5MHz; break; case 25: - ulsch->O = sizeof_wideband_cqi_rank2_2A_5MHz; + ulsch->O = sizeof_wideband_cqi_rank2_2A_5MHz; break; case 50: - ulsch->O = sizeof_wideband_cqi_rank2_2A_10MHz; + ulsch->O = sizeof_wideband_cqi_rank2_2A_10MHz; break; case 100: - ulsch->O = sizeof_wideband_cqi_rank2_2A_20MHz; + ulsch->O = sizeof_wideband_cqi_rank2_2A_20MHz; break; } - ulsch->uci_format = wideband_cqi_rank2_2A; - ulsch->o_RI[0] = 1; + ulsch->uci_format = wideband_cqi_rank2_2A; + ulsch->o_RI[0] = 1; } break; @@ -7814,66 +7360,66 @@ int generate_ue_ulsch_params_from_dci(void *dci_pdu, if ((rnti >= cba_rnti) && (rnti < p_rnti)) { switch (ue->frame_parms.N_RB_DL) { case 6: - ulsch->O = sizeof_HLC_subband_cqi_mcs_CBA_1_5MHz; + ulsch->O = sizeof_HLC_subband_cqi_mcs_CBA_1_5MHz; break; case 25: - ulsch->O = sizeof_HLC_subband_cqi_mcs_CBA_5MHz; + ulsch->O = sizeof_HLC_subband_cqi_mcs_CBA_5MHz; break; case 50: - ulsch->O = sizeof_HLC_subband_cqi_mcs_CBA_10MHz; + ulsch->O = sizeof_HLC_subband_cqi_mcs_CBA_10MHz; break; case 100: - ulsch->O = sizeof_HLC_subband_cqi_mcs_CBA_20MHz; + ulsch->O = sizeof_HLC_subband_cqi_mcs_CBA_20MHz; break; } - ulsch->uci_format = HLC_subband_cqi_mcs_CBA; - ulsch->o_RI[0] = 0; - } else if(meas->rank[eNB_id] == 0) { + ulsch->uci_format = HLC_subband_cqi_mcs_CBA; + ulsch->o_RI[0] = 0; + } else if (meas->rank[eNB_id] == 0) { switch (ue->frame_parms.N_RB_DL) { case 6: - ulsch->O = sizeof_wideband_cqi_rank1_2A_1_5MHz; + ulsch->O = sizeof_wideband_cqi_rank1_2A_1_5MHz; break; case 25: - ulsch->O = sizeof_wideband_cqi_rank1_2A_5MHz; + ulsch->O = sizeof_wideband_cqi_rank1_2A_5MHz; break; case 50: - ulsch->O = sizeof_wideband_cqi_rank1_2A_10MHz; + ulsch->O = sizeof_wideband_cqi_rank1_2A_10MHz; break; case 100: - ulsch->O = sizeof_wideband_cqi_rank1_2A_20MHz; + ulsch->O = sizeof_wideband_cqi_rank1_2A_20MHz; break; } - ulsch->uci_format = wideband_cqi_rank1_2A; - ulsch->o_RI[0] = 0; + ulsch->uci_format = wideband_cqi_rank1_2A; + ulsch->o_RI[0] = 0; } else { switch (ue->frame_parms.N_RB_DL) { case 6: - ulsch->O = sizeof_wideband_cqi_rank2_2A_1_5MHz; + ulsch->O = sizeof_wideband_cqi_rank2_2A_1_5MHz; break; case 25: - ulsch->O = sizeof_wideband_cqi_rank2_2A_5MHz; + ulsch->O = sizeof_wideband_cqi_rank2_2A_5MHz; break; case 50: - ulsch->O = sizeof_wideband_cqi_rank2_2A_10MHz; + ulsch->O = sizeof_wideband_cqi_rank2_2A_10MHz; break; case 100: - ulsch->O = sizeof_wideband_cqi_rank2_2A_20MHz; + ulsch->O = sizeof_wideband_cqi_rank2_2A_20MHz; break; } - ulsch->uci_format = wideband_cqi_rank2_2A; - ulsch->o_RI[0] = 1; + ulsch->uci_format = wideband_cqi_rank2_2A; + ulsch->o_RI[0] = 1; } break; @@ -7882,130 +7428,128 @@ int generate_ue_ulsch_params_from_dci(void *dci_pdu, if ((rnti >= cba_rnti) && (rnti < p_rnti)) { switch (ue->frame_parms.N_RB_DL) { case 6: - ulsch->O = sizeof_HLC_subband_cqi_mcs_CBA_1_5MHz; + ulsch->O = sizeof_HLC_subband_cqi_mcs_CBA_1_5MHz; break; case 25: - ulsch->O = sizeof_HLC_subband_cqi_mcs_CBA_5MHz; + ulsch->O = sizeof_HLC_subband_cqi_mcs_CBA_5MHz; break; case 50: - ulsch->O = sizeof_HLC_subband_cqi_mcs_CBA_10MHz; + ulsch->O = sizeof_HLC_subband_cqi_mcs_CBA_10MHz; break; case 100: - ulsch->O = sizeof_HLC_subband_cqi_mcs_CBA_20MHz; + ulsch->O = sizeof_HLC_subband_cqi_mcs_CBA_20MHz; break; } - ulsch->uci_format = HLC_subband_cqi_mcs_CBA; - ulsch->o_RI[0] = 0; - } else if(meas->rank[eNB_id] == 0) { + ulsch->uci_format = HLC_subband_cqi_mcs_CBA; + ulsch->o_RI[0] = 0; + } else if (meas->rank[eNB_id] == 0) { switch (ue->frame_parms.N_RB_DL) { case 6: - ulsch->O = sizeof_HLC_subband_cqi_nopmi_1_5MHz; + ulsch->O = sizeof_HLC_subband_cqi_nopmi_1_5MHz; break; case 25: - ulsch->O = sizeof_HLC_subband_cqi_nopmi_5MHz; + ulsch->O = sizeof_HLC_subband_cqi_nopmi_5MHz; break; case 50: - ulsch->O = sizeof_HLC_subband_cqi_nopmi_10MHz; + ulsch->O = sizeof_HLC_subband_cqi_nopmi_10MHz; break; case 100: - ulsch->O = sizeof_HLC_subband_cqi_nopmi_20MHz; + ulsch->O = sizeof_HLC_subband_cqi_nopmi_20MHz; break; } - ulsch->uci_format = HLC_subband_cqi_nopmi; - ulsch->o_RI[0] = 0; + ulsch->uci_format = HLC_subband_cqi_nopmi; + ulsch->o_RI[0] = 0; } else { switch (ue->frame_parms.N_RB_DL) { case 6: - ulsch->O = sizeof_HLC_subband_cqi_nopmi_1_5MHz; + ulsch->O = sizeof_HLC_subband_cqi_nopmi_1_5MHz; break; case 25: - ulsch->O = sizeof_HLC_subband_cqi_nopmi_5MHz; + ulsch->O = sizeof_HLC_subband_cqi_nopmi_5MHz; break; case 50: - ulsch->O = sizeof_HLC_subband_cqi_nopmi_10MHz; + ulsch->O = sizeof_HLC_subband_cqi_nopmi_10MHz; break; case 100: - ulsch->O = sizeof_HLC_subband_cqi_nopmi_20MHz; + ulsch->O = sizeof_HLC_subband_cqi_nopmi_20MHz; break; } - ulsch->uci_format = HLC_subband_cqi_nopmi; - ulsch->o_RI[0] = 1; + ulsch->uci_format = HLC_subband_cqi_nopmi; + ulsch->o_RI[0] = 1; } break; default: - LOG_E(PHY,"Incorrect Transmission Mode \n"); + LOG_E (PHY, "Incorrect Transmission Mode \n"); break; } } else { ulsch->O_RI = 0; - ulsch->O = 0; - ulsch->uci_format = HLC_subband_cqi_nopmi; + ulsch->O = 0; + ulsch->uci_format = HLC_subband_cqi_nopmi; } - print_CQI(ulsch->o,ulsch->uci_format,eNB_id,ue->frame_parms.N_RB_DL); + print_CQI (ulsch->o, ulsch->uci_format, eNB_id, ue->frame_parms.N_RB_DL); - ulsch->bundling = 1-AckNackFBMode; + ulsch->bundling = 1 - AckNackFBMode; if (frame_parms->frame_type == FDD) { //int dl_subframe = (subframe<4) ? (subframe+6) : (subframe-4); - int dl_subframe = subframe; + int dl_subframe = subframe; - if (ue->dlsch[ue->current_thread_id[subframe]][eNB_id][0]->harq_ack[dl_subframe].send_harq_status>0) { // we have downlink transmission + if (ue->dlsch[ue->current_thread_id[subframe]][eNB_id][0]->harq_ack[dl_subframe].send_harq_status > 0) { // we have downlink transmission ulsch->harq_processes[harq_pid]->O_ACK = 1; } else { ulsch->harq_processes[harq_pid]->O_ACK = 0; } /*LOG_I(PHY,"DCI 0 Processing: dl_subframe %d send_harq_status Odd %d send_harq_status Even %d harq_pid %d O_ACK %d\n", dl_subframe, - ue->dlsch[0][eNB_id][0]->harq_ack[dl_subframe].send_harq_status, - ue->dlsch[1][eNB_id][0]->harq_ack[dl_subframe].send_harq_status, - harq_pid, - ulsch->harq_processes[harq_pid]->O_ACK);*/ + ue->dlsch[0][eNB_id][0]->harq_ack[dl_subframe].send_harq_status, + ue->dlsch[1][eNB_id][0]->harq_ack[dl_subframe].send_harq_status, + harq_pid, + ulsch->harq_processes[harq_pid]->O_ACK); */ } else { if (ulsch->bundling) - ulsch->harq_processes[harq_pid]->O_ACK = (dai == 3)? 0 : 1; + ulsch->harq_processes[harq_pid]->O_ACK = (dai == 3) ? 0 : 1; else - ulsch->harq_processes[harq_pid]->O_ACK = (dai >= 2)? 2 : (dai+1)&3; //(dai+1)&3; + ulsch->harq_processes[harq_pid]->O_ACK = (dai >= 2) ? 2 : (dai + 1) & 3; //(dai+1)&3; // ulsch->harq_processes[harq_pid]->V_UL_DAI = dai+1; } - dlsch[0]->harq_ack[subframe].vDAI_UL = dai+1; + dlsch[0]->harq_ack[subframe].vDAI_UL = dai + 1; /*LOG_I(PHY, "[PUSCH %d] Format0 DCI %s, CQI_req=%d, cshift=%d, TPC=%d, DAI=%d, vDAI_UL[sf#%d]=%d, NDI=%d, MCS=%d, RBalloc=%d, first_rb=%d, harq_pid=%d, nb_rb=%d, subframe_scheduling_flag=%d" - " ulsch->bundling %d, O_ACK %d \n", - harq_pid, - (frame_parms->frame_type == TDD? "TDD" : "FDD"), - cqi_req, cshift, TPC, dai, subframe, dlsch[0]->harq_ack[subframe].vDAI_UL, ndi, mcs, rballoc, - ulsch->harq_processes[harq_pid]->first_rb, harq_pid, ulsch->harq_processes[harq_pid]->nb_rb, - ulsch->harq_processes[harq_pid]->subframe_scheduling_flag, - ulsch->bundling, - ulsch->harq_processes[harq_pid]->O_ACK);*/ - LOG_D(PHY,"Setting beta_offset_cqi_times8 to %d, index %d\n", - beta_cqi[ue->pusch_config_dedicated[eNB_id].betaOffset_CQI_Index], - ue->pusch_config_dedicated[eNB_id].betaOffset_CQI_Index); + " ulsch->bundling %d, O_ACK %d \n", + harq_pid, + (frame_parms->frame_type == TDD? "TDD" : "FDD"), + cqi_req, cshift, TPC, dai, subframe, dlsch[0]->harq_ack[subframe].vDAI_UL, ndi, mcs, rballoc, + ulsch->harq_processes[harq_pid]->first_rb, harq_pid, ulsch->harq_processes[harq_pid]->nb_rb, + ulsch->harq_processes[harq_pid]->subframe_scheduling_flag, + ulsch->bundling, + ulsch->harq_processes[harq_pid]->O_ACK); */ + LOG_D (PHY, "Setting beta_offset_cqi_times8 to %d, index %d\n", beta_cqi[ue->pusch_config_dedicated[eNB_id].betaOffset_CQI_Index], ue->pusch_config_dedicated[eNB_id].betaOffset_CQI_Index); - ulsch->beta_offset_cqi_times8 = beta_cqi[ue->pusch_config_dedicated[eNB_id].betaOffset_CQI_Index];//18; - ulsch->beta_offset_ri_times8 = beta_ri[ue->pusch_config_dedicated[eNB_id].betaOffset_RI_Index];//10; - ulsch->beta_offset_harqack_times8 = beta_ack[ue->pusch_config_dedicated[eNB_id].betaOffset_ACK_Index];//16; + ulsch->beta_offset_cqi_times8 = beta_cqi[ue->pusch_config_dedicated[eNB_id].betaOffset_CQI_Index]; //18; + ulsch->beta_offset_ri_times8 = beta_ri[ue->pusch_config_dedicated[eNB_id].betaOffset_RI_Index]; //10; + ulsch->beta_offset_harqack_times8 = beta_ack[ue->pusch_config_dedicated[eNB_id].betaOffset_ACK_Index]; //16; - ulsch->Nsymb_pusch = 12-(frame_parms->Ncp<<1)-(use_srs==0?0:1); - ulsch->srs_active = use_srs; + ulsch->Nsymb_pusch = 12 - (frame_parms->Ncp << 1) - (use_srs == 0 ? 0 : 1); + ulsch->srs_active = use_srs; if ((rnti >= cba_rnti) && (rnti < p_rnti)) ulsch->harq_processes[harq_pid]->status = CBA_ACTIVE; @@ -8021,47 +7565,47 @@ int generate_ue_ulsch_params_from_dci(void *dci_pdu, } else { ulsch->harq_processes[harq_pid]->rvidx = mcs - 28; if (ulsch->harq_processes[harq_pid]->round == 0) { - LOG_W(PHY,"PUSCH::mcs = %d and DCI0::mcs(%d) > 28 and round == %d\n", ulsch->harq_processes[harq_pid]->mcs, mcs, ulsch->harq_processes[harq_pid]->round); + LOG_W (PHY, "PUSCH::mcs = %d and DCI0::mcs(%d) > 28 and round == %d\n", ulsch->harq_processes[harq_pid]->mcs, mcs, ulsch->harq_processes[harq_pid]->round); } else { - LOG_D(PHY,"PUSCH::mcs = %d and DCI0::mcs(%d) > 28 and round == %d\n", ulsch->harq_processes[harq_pid]->mcs, mcs, ulsch->harq_processes[harq_pid]->round); + LOG_D (PHY, "PUSCH::mcs = %d and DCI0::mcs(%d) > 28 and round == %d\n", ulsch->harq_processes[harq_pid]->mcs, mcs, ulsch->harq_processes[harq_pid]->round); } //LOG_E(PHY,"Fatal: mcs(%d) > 28!!! and round == 0\n", mcs); } - ulsch->harq_processes[harq_pid]->TBS = TBStable[get_I_TBS_UL(ulsch->harq_processes[harq_pid]->mcs)][ulsch->harq_processes[harq_pid]->nb_rb-1]; + ulsch->harq_processes[harq_pid]->TBS = TBStable[get_I_TBS_UL (ulsch->harq_processes[harq_pid]->mcs)][ulsch->harq_processes[harq_pid]->nb_rb - 1]; /* else if (ulsch->harq_processes[harq_pid]->mcs == 29) { ulsch->harq_processes[harq_pid]->mcs = 4; ulsch->harq_processes[harq_pid]->TBS = TBStable[get_I_TBS_UL(ulsch->harq_processes[harq_pid]->mcs)][ulsch->harq_processes[harq_pid]->nb_rb-1]; - // ulsch->harq_processes[harq_pid]->calibration_flag =1; - // printf("Auto-Calibration (UE): mcs %d, TBS %d, nb_rb %d\n",ulsch->harq_processes[harq_pid]->mcs,ulsch->harq_processes[harq_pid]->TBS,ulsch->harq_processes[harq_pid]->nb_rb); - }*/ - ulsch->harq_processes[harq_pid]->Msc_initial = 12*ulsch->harq_processes[harq_pid]->nb_rb; + // ulsch->harq_processes[harq_pid]->calibration_flag =1; + // printf("Auto-Calibration (UE): mcs %d, TBS %d, nb_rb %d\n",ulsch->harq_processes[harq_pid]->mcs,ulsch->harq_processes[harq_pid]->TBS,ulsch->harq_processes[harq_pid]->nb_rb); + } */ + ulsch->harq_processes[harq_pid]->Msc_initial = 12 * ulsch->harq_processes[harq_pid]->nb_rb; ulsch->harq_processes[harq_pid]->Nsymb_initial = ulsch->Nsymb_pusch; // a Ndi=1 automatically acknowledges previous PUSCH transmission if (ue->ulsch_Msg3_active[eNB_id] == 1) ue->ulsch_Msg3_active[eNB_id] = 0; - LOG_D(PHY,"[UE %d][PUSCH %d] Frame %d, subframe %d : Programming PUSCH with n_DMRS2 %d (cshift %d), nb_rb %d, first_rb %d, mcs %d, round %d, rv %d, ulsch_ue_Msg3_active %d, cqi_req %d => O %d\n", - ue->Mod_id,harq_pid, - proc->frame_rx,subframe,ulsch->harq_processes[harq_pid]->n_DMRS2,cshift,ulsch->harq_processes[harq_pid]->nb_rb,ulsch->harq_processes[harq_pid]->first_rb, - ulsch->harq_processes[harq_pid]->mcs,ulsch->harq_processes[harq_pid]->round,ulsch->harq_processes[harq_pid]->rvidx, ue->ulsch_Msg3_active[eNB_id],cqi_req,ulsch->O); + LOG_D (PHY, + "[UE %d][PUSCH %d] Frame %d, subframe %d : Programming PUSCH with n_DMRS2 %d (cshift %d), nb_rb %d, first_rb %d, mcs %d, round %d, rv %d, ulsch_ue_Msg3_active %d, cqi_req %d => O %d\n", + ue->Mod_id, harq_pid, proc->frame_rx, subframe, ulsch->harq_processes[harq_pid]->n_DMRS2, cshift, ulsch->harq_processes[harq_pid]->nb_rb, ulsch->harq_processes[harq_pid]->first_rb, + ulsch->harq_processes[harq_pid]->mcs, ulsch->harq_processes[harq_pid]->round, ulsch->harq_processes[harq_pid]->rvidx, ue->ulsch_Msg3_active[eNB_id], cqi_req, ulsch->O); - // ulsch->n_DMRS2 = ((DCI0_5MHz_TDD_1_6_t *)dci_pdu)->cshift; + // ulsch->n_DMRS2 = ((DCI0_5MHz_TDD_1_6_t *)dci_pdu)->cshift; #ifdef UE_DEBUG_TRACE - LOG_I(PHY,"Format 0 DCI : ulsch (ue): AbsSubframe %d.%d\n",proc->frame_rx%1024,subframe); - LOG_D(PHY,"Format 0 DCI : ulsch (ue): NBRB %d\n",ulsch->harq_processes[harq_pid]->nb_rb); - LOG_D(PHY,"Format 0 DCI :ulsch (ue): first_rb %d\n",ulsch->harq_processes[harq_pid]->first_rb); - LOG_D(PHY,"Format 0 DCI :ulsch (ue): rballoc %d\n",rballoc); - LOG_D(PHY,"Format 0 DCI :ulsch (ue): harq_pid %d\n",harq_pid); - LOG_D(PHY,"Format 0 DCI :ulsch (ue): first_tx %d\n",ulsch->harq_processes[harq_pid]->first_tx); - LOG_D(PHY,"Format 0 DCI :ulsch (ue): DCINdi %d\n",ulsch->harq_processes[harq_pid]->DCINdi); - LOG_D(PHY,"Format 0 DCI :ulsch (ue): round %d\n",ulsch->harq_processes[harq_pid]->round); + LOG_I (PHY, "Format 0 DCI : ulsch (ue): AbsSubframe %d.%d\n", proc->frame_rx % 1024, subframe); + LOG_D (PHY, "Format 0 DCI : ulsch (ue): NBRB %d\n", ulsch->harq_processes[harq_pid]->nb_rb); + LOG_D (PHY, "Format 0 DCI :ulsch (ue): first_rb %d\n", ulsch->harq_processes[harq_pid]->first_rb); + LOG_D (PHY, "Format 0 DCI :ulsch (ue): rballoc %d\n", rballoc); + LOG_D (PHY, "Format 0 DCI :ulsch (ue): harq_pid %d\n", harq_pid); + LOG_D (PHY, "Format 0 DCI :ulsch (ue): first_tx %d\n", ulsch->harq_processes[harq_pid]->first_tx); + LOG_D (PHY, "Format 0 DCI :ulsch (ue): DCINdi %d\n", ulsch->harq_processes[harq_pid]->DCINdi); + LOG_D (PHY, "Format 0 DCI :ulsch (ue): round %d\n", ulsch->harq_processes[harq_pid]->round); //LOG_I(PHY,"Format 0 DCI :ulsch (ue): TBS %d\n",ulsch->harq_processes[harq_pid]->TBS); - LOG_D(PHY,"Format 0 DCI :ulsch (ue): mcs %d\n",ulsch->harq_processes[harq_pid]->mcs); + LOG_D (PHY, "Format 0 DCI :ulsch (ue): mcs %d\n", ulsch->harq_processes[harq_pid]->mcs); //LOG_I(PHY,"Format 0 DCI :ulsch (ue): O %d\n",ulsch->O); //LOG_I(PHY,"Format 0 DCI :ulsch (ue): cqiReq %d\n",cqi_req); //if (frame_parms->frame_type == TDD) @@ -8069,17 +7613,16 @@ int generate_ue_ulsch_params_from_dci(void *dci_pdu, //else // LOG_I(PHY,"Format 0 DCI :ulsch (ue): O_ACK %d\n",ulsch->harq_processes[harq_pid]->O_ACK); - LOG_D(PHY,"Format 0 DCI :ulsch (ue): Nsymb_pusch %d\n",ulsch->Nsymb_pusch); - LOG_D(PHY,"Format 0 DCI :ulsch (ue): cshift %d\n",ulsch->harq_processes[harq_pid]->n_DMRS2); - LOG_D(PHY,"Format 0 DCI :ulsch (ue): phich status %d\n",ulsch->harq_processes[harq_pid]->status); + LOG_D (PHY, "Format 0 DCI :ulsch (ue): Nsymb_pusch %d\n", ulsch->Nsymb_pusch); + LOG_D (PHY, "Format 0 DCI :ulsch (ue): cshift %d\n", ulsch->harq_processes[harq_pid]->n_DMRS2); + LOG_D (PHY, "Format 0 DCI :ulsch (ue): phich status %d\n", ulsch->harq_processes[harq_pid]->status); #else - UNUSED_VARIABLE(dai); + UNUSED_VARIABLE (dai); #endif - return(0); + return (0); } else { - LOG_E(PHY,"frame %d, subframe %d: FATAL ERROR, generate_ue_ulsch_params_from_dci, Illegal dci_format %d\n", - proc->frame_rx, subframe,dci_format); - return(-1); + LOG_E (PHY, "frame %d, subframe %d: FATAL ERROR, generate_ue_ulsch_params_from_dci, Illegal dci_format %d\n", proc->frame_rx, subframe, dci_format); + return (-1); } } @@ -8718,32 +8261,34 @@ int generate_eNB_ulsch_params_from_dci(PHY_VARS_eNB *eNB, } */ -double sinr_eff_cqi_calc(PHY_VARS_UE *ue, uint8_t eNB_id, uint8_t subframe) +double +sinr_eff_cqi_calc (PHY_VARS_UE * ue, uint8_t eNB_id, uint8_t subframe) { - uint8_t transmission_mode = ue->transmission_mode[eNB_id]; + uint8_t transmission_mode = ue->transmission_mode[eNB_id]; PHY_MEASUREMENTS *meas = &ue->measurements; - LTE_DL_FRAME_PARMS *frame_parms = &ue->frame_parms; - int32_t **dl_channel_est = ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[subframe]].dl_ch_estimates[eNB_id]; - double *s_dB; + LTE_DL_FRAME_PARMS *frame_parms = &ue->frame_parms; + int32_t **dl_channel_est = ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[subframe]].dl_ch_estimates[eNB_id]; + double *s_dB; s_dB = ue->sinr_CQI_dB; // LTE_UE_ULSCH_t *ulsch = ue->ulsch[eNB_id]; //for the calculation of SINR_eff for CQI calculation - int count,a_rx,a_tx; - double abs_channel=0; - double channelx=0; - double channely=0; - double channelx_i=0; - double channely_i=0; - uint16_t q = quantize_subband_pmi(meas,eNB_id,7); - uint8_t qq; + int count, a_rx, a_tx; + double abs_channel = 0; + double channelx = 0; + double channely = 0; + double channelx_i = 0; + double channely_i = 0; + uint16_t q = quantize_subband_pmi (meas, eNB_id, 7); + uint8_t qq; - switch(transmission_mode) { + switch (transmission_mode) { case 1: - for (count=0; countN_RB_DL*12; count++) { - for(a_tx=0; a_txnb_antenna_ports_eNB; a_tx++) { - for (a_rx=0; a_rxnb_antennas_rx; a_rx++) { - s_dB[count] = 10*log10(pow(((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+(LTE_CE_FILTER_LENGTH)*2],2) + pow(((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+1+(LTE_CE_FILTER_LENGTH)*2], - 2)) - meas->n0_power_avg_dB; + for (count = 0; count < frame_parms->N_RB_DL * 12; count++) { + for (a_tx = 0; a_tx < frame_parms->nb_antenna_ports_eNB; a_tx++) { + for (a_rx = 0; a_rx < frame_parms->nb_antennas_rx; a_rx++) { + s_dB[count] = + 10 * log10 (pow (((int16_t *) dl_channel_est[(a_tx << 1) + a_rx])[2 * count + (LTE_CE_FILTER_LENGTH) * 2], 2) + + pow (((int16_t *) dl_channel_est[(a_tx << 1) + a_rx])[2 * count + 1 + (LTE_CE_FILTER_LENGTH) * 2], 2)) - meas->n0_power_avg_dB; } } } @@ -8751,275 +8296,282 @@ double sinr_eff_cqi_calc(PHY_VARS_UE *ue, uint8_t eNB_id, uint8_t subframe) break; case 2: - for (count=0; countN_RB_DL*12; count++) { - abs_channel=0; + for (count = 0; count < frame_parms->N_RB_DL * 12; count++) { + abs_channel = 0; - for(a_tx=0; a_txnb_antenna_ports_eNB; a_tx++) { - for (a_rx=0; a_rxnb_antennas_rx; a_rx++) { - abs_channel += (pow(((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+(LTE_CE_FILTER_LENGTH)*2],2) + pow(((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+1+(LTE_CE_FILTER_LENGTH)*2],2)); + for (a_tx = 0; a_tx < frame_parms->nb_antenna_ports_eNB; a_tx++) { + for (a_rx = 0; a_rx < frame_parms->nb_antennas_rx; a_rx++) { + abs_channel += + (pow (((int16_t *) dl_channel_est[(a_tx << 1) + a_rx])[2 * count + (LTE_CE_FILTER_LENGTH) * 2], 2) + + pow (((int16_t *) dl_channel_est[(a_tx << 1) + a_rx])[2 * count + 1 + (LTE_CE_FILTER_LENGTH) * 2], 2)); } } - s_dB[count] = 10*log10(abs_channel/2) - meas->n0_power_avg_dB; + s_dB[count] = 10 * log10 (abs_channel / 2) - meas->n0_power_avg_dB; } break; case 5: - for (count=0; countN_RB_DL*12; count++) { - channelx=0; - channely=0; - channelx_i=0; - channely_i=0; - qq = (q>>(((count/12)>>2)<<1))&3; + for (count = 0; count < frame_parms->N_RB_DL * 12; count++) { + channelx = 0; + channely = 0; + channelx_i = 0; + channely_i = 0; + qq = (q >> (((count / 12) >> 2) << 1)) & 3; //printf("pmi_alloc %d: rb %d, pmi %d\n",q,count/12,qq); - for(a_tx=0; a_txnb_antenna_ports_eNB; a_tx++) { - for (a_rx=0; a_rxnb_antennas_rx; a_rx++) { - switch(qq) { + for (a_tx = 0; a_tx < frame_parms->nb_antenna_ports_eNB; a_tx++) { + for (a_rx = 0; a_rx < frame_parms->nb_antennas_rx; a_rx++) { + switch (qq) { case 0: - if (channelx==0 || channely==0) { - channelx = ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+(LTE_CE_FILTER_LENGTH)*2]; - channely = ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+1+(LTE_CE_FILTER_LENGTH)*2]; - channelx_i = ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+(LTE_CE_FILTER_LENGTH)*2]; - channely_i = ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+1+(LTE_CE_FILTER_LENGTH)*2]; + if (channelx == 0 || channely == 0) { + channelx = ((int16_t *) dl_channel_est[(a_tx << 1) + a_rx])[2 * count + (LTE_CE_FILTER_LENGTH) * 2]; + channely = ((int16_t *) dl_channel_est[(a_tx << 1) + a_rx])[2 * count + 1 + (LTE_CE_FILTER_LENGTH) * 2]; + channelx_i = ((int16_t *) dl_channel_est[(a_tx << 1) + a_rx])[2 * count + (LTE_CE_FILTER_LENGTH) * 2]; + channely_i = ((int16_t *) dl_channel_est[(a_tx << 1) + a_rx])[2 * count + 1 + (LTE_CE_FILTER_LENGTH) * 2]; } else { - channelx += ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+(LTE_CE_FILTER_LENGTH)*2]; - channely += ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+1+(LTE_CE_FILTER_LENGTH)*2]; - channelx_i -= ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+(LTE_CE_FILTER_LENGTH)*2]; - channely_i -= ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+1+(LTE_CE_FILTER_LENGTH)*2]; + channelx += ((int16_t *) dl_channel_est[(a_tx << 1) + a_rx])[2 * count + (LTE_CE_FILTER_LENGTH) * 2]; + channely += ((int16_t *) dl_channel_est[(a_tx << 1) + a_rx])[2 * count + 1 + (LTE_CE_FILTER_LENGTH) * 2]; + channelx_i -= ((int16_t *) dl_channel_est[(a_tx << 1) + a_rx])[2 * count + (LTE_CE_FILTER_LENGTH) * 2]; + channely_i -= ((int16_t *) dl_channel_est[(a_tx << 1) + a_rx])[2 * count + 1 + (LTE_CE_FILTER_LENGTH) * 2]; } break; case 1: - if (channelx==0 || channely==0) { - channelx = ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+(LTE_CE_FILTER_LENGTH)*2]; - channely = ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+1+(LTE_CE_FILTER_LENGTH)*2]; - channelx_i = ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+(LTE_CE_FILTER_LENGTH)*2]; - channely_i = ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+1+(LTE_CE_FILTER_LENGTH)*2]; + if (channelx == 0 || channely == 0) { + channelx = ((int16_t *) dl_channel_est[(a_tx << 1) + a_rx])[2 * count + (LTE_CE_FILTER_LENGTH) * 2]; + channely = ((int16_t *) dl_channel_est[(a_tx << 1) + a_rx])[2 * count + 1 + (LTE_CE_FILTER_LENGTH) * 2]; + channelx_i = ((int16_t *) dl_channel_est[(a_tx << 1) + a_rx])[2 * count + (LTE_CE_FILTER_LENGTH) * 2]; + channely_i = ((int16_t *) dl_channel_est[(a_tx << 1) + a_rx])[2 * count + 1 + (LTE_CE_FILTER_LENGTH) * 2]; } else { - channelx -= ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+(LTE_CE_FILTER_LENGTH)*2]; - channely -= ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+1+(LTE_CE_FILTER_LENGTH)*2]; - channelx_i += ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+(LTE_CE_FILTER_LENGTH)*2]; - channely_i += ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+1+(LTE_CE_FILTER_LENGTH)*2]; + channelx -= ((int16_t *) dl_channel_est[(a_tx << 1) + a_rx])[2 * count + (LTE_CE_FILTER_LENGTH) * 2]; + channely -= ((int16_t *) dl_channel_est[(a_tx << 1) + a_rx])[2 * count + 1 + (LTE_CE_FILTER_LENGTH) * 2]; + channelx_i += ((int16_t *) dl_channel_est[(a_tx << 1) + a_rx])[2 * count + (LTE_CE_FILTER_LENGTH) * 2]; + channely_i += ((int16_t *) dl_channel_est[(a_tx << 1) + a_rx])[2 * count + 1 + (LTE_CE_FILTER_LENGTH) * 2]; } break; case 2: - if (channelx==0 || channely==0) { - channelx = ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+(LTE_CE_FILTER_LENGTH)*2]; - channely = ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+1+(LTE_CE_FILTER_LENGTH)*2]; - channelx_i = ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+(LTE_CE_FILTER_LENGTH)*2]; - channely_i = ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+1+(LTE_CE_FILTER_LENGTH)*2]; + if (channelx == 0 || channely == 0) { + channelx = ((int16_t *) dl_channel_est[(a_tx << 1) + a_rx])[2 * count + (LTE_CE_FILTER_LENGTH) * 2]; + channely = ((int16_t *) dl_channel_est[(a_tx << 1) + a_rx])[2 * count + 1 + (LTE_CE_FILTER_LENGTH) * 2]; + channelx_i = ((int16_t *) dl_channel_est[(a_tx << 1) + a_rx])[2 * count + (LTE_CE_FILTER_LENGTH) * 2]; + channely_i = ((int16_t *) dl_channel_est[(a_tx << 1) + a_rx])[2 * count + 1 + (LTE_CE_FILTER_LENGTH) * 2]; } else { - channelx -= ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+1+(LTE_CE_FILTER_LENGTH)*2]; - channely += ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+(LTE_CE_FILTER_LENGTH)*2]; - channelx_i += ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+1+(LTE_CE_FILTER_LENGTH)*2]; - channely_i -= ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+(LTE_CE_FILTER_LENGTH)*2]; + channelx -= ((int16_t *) dl_channel_est[(a_tx << 1) + a_rx])[2 * count + 1 + (LTE_CE_FILTER_LENGTH) * 2]; + channely += ((int16_t *) dl_channel_est[(a_tx << 1) + a_rx])[2 * count + (LTE_CE_FILTER_LENGTH) * 2]; + channelx_i += ((int16_t *) dl_channel_est[(a_tx << 1) + a_rx])[2 * count + 1 + (LTE_CE_FILTER_LENGTH) * 2]; + channely_i -= ((int16_t *) dl_channel_est[(a_tx << 1) + a_rx])[2 * count + (LTE_CE_FILTER_LENGTH) * 2]; } break; case 3: - if (channelx==0 || channely==0) { - channelx = ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+(LTE_CE_FILTER_LENGTH)*2]; - channely = ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+1+(LTE_CE_FILTER_LENGTH)*2]; - channelx_i = ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+(LTE_CE_FILTER_LENGTH)*2]; - channely_i = ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+1+(LTE_CE_FILTER_LENGTH)*2]; + if (channelx == 0 || channely == 0) { + channelx = ((int16_t *) dl_channel_est[(a_tx << 1) + a_rx])[2 * count + (LTE_CE_FILTER_LENGTH) * 2]; + channely = ((int16_t *) dl_channel_est[(a_tx << 1) + a_rx])[2 * count + 1 + (LTE_CE_FILTER_LENGTH) * 2]; + channelx_i = ((int16_t *) dl_channel_est[(a_tx << 1) + a_rx])[2 * count + (LTE_CE_FILTER_LENGTH) * 2]; + channely_i = ((int16_t *) dl_channel_est[(a_tx << 1) + a_rx])[2 * count + 1 + (LTE_CE_FILTER_LENGTH) * 2]; } else { - channelx += ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+1+(LTE_CE_FILTER_LENGTH)*2]; - channely -= ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+(LTE_CE_FILTER_LENGTH)*2]; - channelx_i -= ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+1+(LTE_CE_FILTER_LENGTH)*2]; - channely_i += ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+(LTE_CE_FILTER_LENGTH)*2]; + channelx += ((int16_t *) dl_channel_est[(a_tx << 1) + a_rx])[2 * count + 1 + (LTE_CE_FILTER_LENGTH) * 2]; + channely -= ((int16_t *) dl_channel_est[(a_tx << 1) + a_rx])[2 * count + (LTE_CE_FILTER_LENGTH) * 2]; + channelx_i -= ((int16_t *) dl_channel_est[(a_tx << 1) + a_rx])[2 * count + 1 + (LTE_CE_FILTER_LENGTH) * 2]; + channely_i += ((int16_t *) dl_channel_est[(a_tx << 1) + a_rx])[2 * count + (LTE_CE_FILTER_LENGTH) * 2]; } break; default: - printf("Problem in SINR Calculation for TM5 \n"); + printf ("Problem in SINR Calculation for TM5 \n"); break; - }//switch(qq) - }//a_rx - }//a_tx + } //switch(qq) + } //a_rx + } //a_tx - s_dB[count] = 10 * log10 ((pow(channelx,2) + pow(channely,2))/2) - 10 * log10 ((pow(channelx_i,2) + pow(channely_i,2))/2) - meas->n0_power_avg_dB; - }//count + s_dB[count] = 10 * log10 ((pow (channelx, 2) + pow (channely, 2)) / 2) - 10 * log10 ((pow (channelx_i, 2) + pow (channely_i, 2)) / 2) - meas->n0_power_avg_dB; + } //count break; case 6: - for (count=0; countN_RB_DL*12; count++) { - channelx=0; - channely=0; - qq = (q>>(((count/12)>>2)<<1))&3; + for (count = 0; count < frame_parms->N_RB_DL * 12; count++) { + channelx = 0; + channely = 0; + qq = (q >> (((count / 12) >> 2) << 1)) & 3; //printf("pmi_alloc %d: rb %d, pmi %d\n",q,count/12,qq); - for(a_tx=0; a_txnb_antenna_ports_eNB; a_tx++) { - for (a_rx=0; a_rxnb_antennas_rx; a_rx++) { - switch(qq) { + for (a_tx = 0; a_tx < frame_parms->nb_antenna_ports_eNB; a_tx++) { + for (a_rx = 0; a_rx < frame_parms->nb_antennas_rx; a_rx++) { + switch (qq) { case 0: - if (channelx==0 || channely==0) { - channelx = ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+(LTE_CE_FILTER_LENGTH)*2]; - channely = ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+1+(LTE_CE_FILTER_LENGTH)*2]; + if (channelx == 0 || channely == 0) { + channelx = ((int16_t *) dl_channel_est[(a_tx << 1) + a_rx])[2 * count + (LTE_CE_FILTER_LENGTH) * 2]; + channely = ((int16_t *) dl_channel_est[(a_tx << 1) + a_rx])[2 * count + 1 + (LTE_CE_FILTER_LENGTH) * 2]; } else { - channelx += ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+(LTE_CE_FILTER_LENGTH)*2]; - channely += ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+1+(LTE_CE_FILTER_LENGTH)*2]; + channelx += ((int16_t *) dl_channel_est[(a_tx << 1) + a_rx])[2 * count + (LTE_CE_FILTER_LENGTH) * 2]; + channely += ((int16_t *) dl_channel_est[(a_tx << 1) + a_rx])[2 * count + 1 + (LTE_CE_FILTER_LENGTH) * 2]; } break; case 1: - if (channelx==0 || channely==0) { - channelx = ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+(LTE_CE_FILTER_LENGTH)*2]; - channely = ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+1+(LTE_CE_FILTER_LENGTH)*2]; + if (channelx == 0 || channely == 0) { + channelx = ((int16_t *) dl_channel_est[(a_tx << 1) + a_rx])[2 * count + (LTE_CE_FILTER_LENGTH) * 2]; + channely = ((int16_t *) dl_channel_est[(a_tx << 1) + a_rx])[2 * count + 1 + (LTE_CE_FILTER_LENGTH) * 2]; } else { - channelx -= ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+(LTE_CE_FILTER_LENGTH)*2]; - channely -= ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+1+(LTE_CE_FILTER_LENGTH)*2]; + channelx -= ((int16_t *) dl_channel_est[(a_tx << 1) + a_rx])[2 * count + (LTE_CE_FILTER_LENGTH) * 2]; + channely -= ((int16_t *) dl_channel_est[(a_tx << 1) + a_rx])[2 * count + 1 + (LTE_CE_FILTER_LENGTH) * 2]; } break; case 2: - if (channelx==0 || channely==0) { - channelx = ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+(LTE_CE_FILTER_LENGTH)*2]; - channely = ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+1+(LTE_CE_FILTER_LENGTH)*2]; + if (channelx == 0 || channely == 0) { + channelx = ((int16_t *) dl_channel_est[(a_tx << 1) + a_rx])[2 * count + (LTE_CE_FILTER_LENGTH) * 2]; + channely = ((int16_t *) dl_channel_est[(a_tx << 1) + a_rx])[2 * count + 1 + (LTE_CE_FILTER_LENGTH) * 2]; } else { - channelx -= ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+1+(LTE_CE_FILTER_LENGTH)*2]; - channely += ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+(LTE_CE_FILTER_LENGTH)*2]; + channelx -= ((int16_t *) dl_channel_est[(a_tx << 1) + a_rx])[2 * count + 1 + (LTE_CE_FILTER_LENGTH) * 2]; + channely += ((int16_t *) dl_channel_est[(a_tx << 1) + a_rx])[2 * count + (LTE_CE_FILTER_LENGTH) * 2]; } break; case 3: - if (channelx==0 || channely==0) { - channelx = ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+(LTE_CE_FILTER_LENGTH)*2]; - channely = ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+1+(LTE_CE_FILTER_LENGTH)*2]; + if (channelx == 0 || channely == 0) { + channelx = ((int16_t *) dl_channel_est[(a_tx << 1) + a_rx])[2 * count + (LTE_CE_FILTER_LENGTH) * 2]; + channely = ((int16_t *) dl_channel_est[(a_tx << 1) + a_rx])[2 * count + 1 + (LTE_CE_FILTER_LENGTH) * 2]; } else { - channelx += ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+1+(LTE_CE_FILTER_LENGTH)*2]; - channely -= ((int16_t *) dl_channel_est[(a_tx<<1)+a_rx])[2*count+(LTE_CE_FILTER_LENGTH)*2]; + channelx += ((int16_t *) dl_channel_est[(a_tx << 1) + a_rx])[2 * count + 1 + (LTE_CE_FILTER_LENGTH) * 2]; + channely -= ((int16_t *) dl_channel_est[(a_tx << 1) + a_rx])[2 * count + (LTE_CE_FILTER_LENGTH) * 2]; } break; default: - printf("Problem in SINR Calculation for TM6 \n"); + printf ("Problem in SINR Calculation for TM6 \n"); break; - }//switch(qq) - }//a_rx - }//a_tx + } //switch(qq) + } //a_rx + } //a_tx - s_dB[count] = 10 * log10 ((pow(channelx,2) + pow(channely,2))/2) - meas->n0_power_avg_dB; - }//count + s_dB[count] = 10 * log10 ((pow (channelx, 2) + pow (channely, 2)) / 2) - meas->n0_power_avg_dB; + } //count break; default: - printf("Problem in SINR Calculation for CQI \n"); + printf ("Problem in SINR Calculation for CQI \n"); break; } - int ii; - double sinr_eff = 0; - double sinr_eff_qpsk=0; - double sinr_eff_qam16=0; - double sinr_eff_qam64=0; - double x = 0; - double I_qpsk=0; - double I_qam16=0; - double I_qam64=0; - double I_qpsk_avg=0; - double I_qam16_avg=0; - double I_qam64_avg=0; - double qpsk_max=12.2; - double qam16_max=19.2; - double qam64_max=25.2; - double sinr_min = -20; - int offset=0; + int ii; + double sinr_eff = 0; + double sinr_eff_qpsk = 0; + double sinr_eff_qam16 = 0; + double sinr_eff_qam64 = 0; + double x = 0; + double I_qpsk = 0; + double I_qam16 = 0; + double I_qam64 = 0; + double I_qpsk_avg = 0; + double I_qam16_avg = 0; + double I_qam64_avg = 0; + double qpsk_max = 12.2; + double qam16_max = 19.2; + double qam64_max = 25.2; + double sinr_min = -20; + int offset = 0; for (offset = 0; offset <= 24; offset++) { - for(ii=0; ii<12; ii++) { + for (ii = 0; ii < 12; ii++) { //x is the sinr_dB in dB - x = s_dB[(offset*12)+ii]; + x = s_dB[(offset * 12) + ii]; - if(xqpsk_max) + if (x > qpsk_max) I_qpsk += 1; else - I_qpsk += (q_qpsk[0]*pow(x,7) + q_qpsk[1]*pow(x,6) + q_qpsk[2]*pow(x,5) + q_qpsk[3]*pow(x,4) + q_qpsk[4]*pow(x,3) + q_qpsk[5]*pow(x,2) + q_qpsk[6]*x + q_qpsk[7]); + I_qpsk += (q_qpsk[0] * pow (x, 7) + q_qpsk[1] * pow (x, 6) + q_qpsk[2] * pow (x, 5) + q_qpsk[3] * pow (x, 4) + q_qpsk[4] * pow (x, 3) + q_qpsk[5] * pow (x, 2) + q_qpsk[6] * x + q_qpsk[7]); - if(x>qam16_max) + if (x > qam16_max) I_qam16 += 1; else - I_qam16 += (q_qam16[0]*pow(x,7) + q_qam16[1]*pow(x,6) + q_qam16[2]*pow(x,5) + q_qam16[3]*pow(x,4) + q_qam16[4]*pow(x,3) + q_qam16[5]*pow(x,2) + q_qam16[6]*x + q_qam16[7]); + I_qam16 += + (q_qam16[0] * pow (x, 7) + q_qam16[1] * pow (x, 6) + q_qam16[2] * pow (x, 5) + q_qam16[3] * pow (x, 4) + q_qam16[4] * pow (x, 3) + q_qam16[5] * pow (x, 2) + q_qam16[6] * x + q_qam16[7]); - if(x>qam64_max) + if (x > qam64_max) I_qam64 += 1; else - I_qam64 += (q_qam64[0]*pow(x,7) + q_qam64[1]*pow(x,6) + q_qam64[2]*pow(x,5) + q_qam64[3]*pow(x,4) + q_qam64[4]*pow(x,3) + q_qam64[5]*pow(x,2) + q_qam64[6]*x + q_qam64[7]); + I_qam64 += + (q_qam64[0] * pow (x, 7) + q_qam64[1] * pow (x, 6) + q_qam64[2] * pow (x, 5) + q_qam64[3] * pow (x, 4) + q_qam64[4] * pow (x, 3) + q_qam64[5] * pow (x, 2) + q_qam64[6] * x + q_qam64[7]); } } } // averaging of accumulated MI - I_qpsk_avg = I_qpsk/(12*frame_parms->N_RB_DL); - I_qam16_avg = I_qam16/(12*frame_parms->N_RB_DL); - I_qam64_avg = I_qam64/(12*frame_parms->N_RB_DL); + I_qpsk_avg = I_qpsk / (12 * frame_parms->N_RB_DL); + I_qam16_avg = I_qam16 / (12 * frame_parms->N_RB_DL); + I_qam64_avg = I_qam64 / (12 * frame_parms->N_RB_DL); // I->SINR_effective Mapping - sinr_eff_qpsk = (p_qpsk[0]*pow(I_qpsk_avg,7) + p_qpsk[1]*pow(I_qpsk_avg,6) + p_qpsk[2]*pow(I_qpsk_avg,5) + p_qpsk[3]*pow(I_qpsk_avg,4) + p_qpsk[4]*pow(I_qpsk_avg,3) + p_qpsk[5]*pow(I_qpsk_avg, - 2) + p_qpsk[6]*I_qpsk_avg + p_qpsk[7]); + sinr_eff_qpsk = + (p_qpsk[0] * pow (I_qpsk_avg, 7) + p_qpsk[1] * pow (I_qpsk_avg, 6) + p_qpsk[2] * pow (I_qpsk_avg, 5) + p_qpsk[3] * pow (I_qpsk_avg, 4) + p_qpsk[4] * pow (I_qpsk_avg, 3) + + p_qpsk[5] * pow (I_qpsk_avg, 2) + p_qpsk[6] * I_qpsk_avg + p_qpsk[7]); - sinr_eff_qam16 = (p_qam16[0]*pow(I_qam16_avg,7) + p_qam16[1]*pow(I_qam16_avg,6) + p_qam16[2]*pow(I_qam16_avg,5) + p_qam16[3]*pow(I_qam16_avg,4) + p_qam16[4]*pow(I_qam16_avg, - 3) + p_qam16[5]*pow(I_qam16_avg,2) + p_qam16[6]*I_qam16_avg + p_qam16[7]); + sinr_eff_qam16 = (p_qam16[0] * pow (I_qam16_avg, 7) + p_qam16[1] * pow (I_qam16_avg, 6) + p_qam16[2] * pow (I_qam16_avg, 5) + p_qam16[3] * pow (I_qam16_avg, 4) + p_qam16[4] * pow (I_qam16_avg, + 3) + + p_qam16[5] * pow (I_qam16_avg, 2) + p_qam16[6] * I_qam16_avg + p_qam16[7]); - sinr_eff_qam64 = (p_qam64[0]*pow(I_qam64_avg,7) + p_qam64[1]*pow(I_qam64_avg,6) + p_qam64[2]*pow(I_qam64_avg,5) + p_qam64[3]*pow(I_qam64_avg,4) + p_qam64[4]*pow(I_qam64_avg, - 3) + p_qam64[5]*pow(I_qam64_avg,2) + p_qam64[6]*I_qam64_avg + p_qam64[7]); - sinr_eff = cmax3(sinr_eff_qpsk,sinr_eff_qam16,sinr_eff_qam64); + sinr_eff_qam64 = (p_qam64[0] * pow (I_qam64_avg, 7) + p_qam64[1] * pow (I_qam64_avg, 6) + p_qam64[2] * pow (I_qam64_avg, 5) + p_qam64[3] * pow (I_qam64_avg, 4) + p_qam64[4] * pow (I_qam64_avg, + 3) + + p_qam64[5] * pow (I_qam64_avg, 2) + p_qam64[6] * I_qam64_avg + p_qam64[7]); + sinr_eff = cmax3 (sinr_eff_qpsk, sinr_eff_qam16, sinr_eff_qam64); //printf("SINR_Eff = %e\n",sinr_eff); - return(sinr_eff); + return (sinr_eff); } + // #ifdef DEBUG_DLSCH_TOOLS -main() +main () { - int i; - uint8_t rah; - uint32_t rballoc; + int i; + uint8_t rah; + uint32_t rballoc; - generate_RIV_tables(); + generate_RIV_tables (); rah = 0; rballoc = 0x1fff; - printf("rballoc 0 %x => %x\n",rballoc,conv_rballoc(rah,rballoc)); + printf ("rballoc 0 %x => %x\n", rballoc, conv_rballoc (rah, rballoc)); rah = 1; rballoc = 0x1678; - printf("rballoc 1 %x => %x\n",rballoc,conv_rballoc(rah,rballoc)); + printf ("rballoc 1 %x => %x\n", rballoc, conv_rballoc (rah, rballoc)); rballoc = 0xfffc; - printf("rballoc 1 %x => %x\n",rballoc,conv_rballoc(rah,rballoc)); + printf ("rballoc 1 %x => %x\n", rballoc, conv_rballoc (rah, rballoc)); rballoc = 0xfffd; - printf("rballoc 1 %x => %x\n",rballoc,conv_rballoc(rah,rballoc)); + printf ("rballoc 1 %x => %x\n", rballoc, conv_rballoc (rah, rballoc)); rballoc = 0xffff; - printf("rballoc 1 %x => %x\n",rballoc,conv_rballoc(rah,rballoc)); + printf ("rballoc 1 %x => %x\n", rballoc, conv_rballoc (rah, rballoc)); rballoc = 0xfffe; - printf("rballoc 1 %x => %x\n",rballoc,conv_rballoc(rah,rballoc)); + printf ("rballoc 1 %x => %x\n", rballoc, conv_rballoc (rah, rballoc)); } #endif - diff --git a/openair1/PHY/LTE_TRANSPORT/edci.c b/openair1/PHY/LTE_TRANSPORT/edci.c index 6d67d87bdd..aa57f58b11 100755 --- a/openair1/PHY/LTE_TRANSPORT/edci.c +++ b/openair1/PHY/LTE_TRANSPORT/edci.c @@ -37,10 +37,10 @@ #include "PHY/defs.h" #include "PHY/extern.h" #include "SCHED/defs.h" -#include "SIMULATION/TOOLS/defs.h" // for taus +#include "SIMULATION/TOOLS/defs.h" // for taus #include "PHY/sse_intrin.h" -#include "assertions.h" +#include "assertions.h" #include "T.h" #include "UTIL/LOG/log.h" @@ -49,50 +49,51 @@ //#define DEBUG_PHY #ifdef Rel14 -void generate_edci_top(PHY_VARS_eNB *eNB, int frame, int subframe) { +void +generate_edci_top (PHY_VARS_eNB * eNB, int frame, int subframe) +{ } -void mpdcch_scrambling(LTE_DL_FRAME_PARMS *frame_parms, - mDCI_ALLOC_t *mdci, - uint16_t i, - uint8_t *e, - uint32_t length) +void +mpdcch_scrambling (LTE_DL_FRAME_PARMS * frame_parms, mDCI_ALLOC_t * mdci, uint16_t i, uint8_t * e, uint32_t length) { - int n; - uint8_t reset; - uint32_t x1, x2, s=0; - uint8_t Nacc=4; - uint16_t j0,j,idelta; - uint16_t i0 = mdci->i0; + int n; + uint8_t reset; + uint32_t x1, x2, s = 0; + uint8_t Nacc = 4; + uint16_t j0, j, idelta; + uint16_t i0 = mdci->i0; // Note: we could actually not do anything if i-i0 < Nacc, save it for later reset = 1; // x1 is set in lte_gold_generic - if ((mdci->rnti == 0xFFFE) || - (mdci->ce_mode == 2)) // CEModeB Note: also for mdci->rnti==SC_RNTI - Nacc=frame_parms->frame_type == FDD ? 4 : 10; - else Nacc=1; - - if (frame_parms->frame_type == FDD || Nacc == 1) idelta = 0; - else idelta = Nacc-2; - - j0 = (i0+idelta)/Nacc; - j = (i - i0)/Nacc; + if ((mdci->rnti == 0xFFFE) || (mdci->ce_mode == 2)) // CEModeB Note: also for mdci->rnti==SC_RNTI + Nacc = frame_parms->frame_type == FDD ? 4 : 10; + else + Nacc = 1; + + if (frame_parms->frame_type == FDD || Nacc == 1) + idelta = 0; + else + idelta = Nacc - 2; + + j0 = (i0 + idelta) / Nacc; + j = (i - i0) / Nacc; + - // rule for BL/CE UEs from Section 6.8.B2 in 36.211 - x2= ((((j0+j)*Nacc)%10)<<9) + mdci->dmrs_scrambling_init; - - for (n=0; ndmrs_scrambling_init; + + for (n = 0; n < length; n++) { + if ((i & 0x1f) == 0) { + s = lte_gold_generic (&x1, &x2, reset); //printf("lte_gold[%d]=%x\n",i,s); reset = 0; } - e[i] = (e[i]&1) ^ ((s>>(i&0x1f))&1); + e[i] = (e[i] & 1) ^ ((s >> (i & 0x1f)) & 1); } } @@ -189,7 +190,9 @@ extern uint8_t *generate_dci0(uint8_t *dci, uint8_t aggregation_level, uint16_t rnti); -void generate_mdci_top(PHY_VARS_eNB *eNB, int frame, int subframe,int16_t amp,int32_t **txdataF) { +void +generate_mdci_top (PHY_VARS_eNB * eNB, int frame, int subframe, int16_t amp, int32_t ** txdataF) +{ LTE_eNB_MPDCCH *mpdcch= &eNB->mpdcch_vars[subframe&2]; mDCI_ALLOC_t *mdci; @@ -210,13 +213,13 @@ void generate_mdci_top(PHY_VARS_eNB *eNB, int frame, int subframe,int16_t amp,in mdci = &mpdcch->mdci_alloc[i]; - AssertFatal(fp->frame_type==FDD,"TDD is not yet supported for MPDCCH\n"); - AssertFatal(fp->Ncp == NORMAL,"Extended Prefix not yet supported for MPDCCH\n"); - AssertFatal(mdci->L<=24,"L is %d\n",mdci->L); - AssertFatal(fp->N_RB_DL==50 || fp->N_RB_DL==100,"Only N_RB_DL=50,100 for MPDCCH\n"); + AssertFatal (fp->frame_type == FDD, "TDD is not yet supported for MPDCCH\n"); + AssertFatal (fp->Ncp == NORMAL, "Extended Prefix not yet supported for MPDCCH\n"); + AssertFatal (mdci->L <= 24, "L is %d\n", mdci->L); + AssertFatal (fp->N_RB_DL == 50 || fp->N_RB_DL == 100, "Only N_RB_DL=50,100 for MPDCCH\n"); // Force MPDDCH format 5 - AssertFatal(mdci->number_of_prb_pairs==6,"2 or 4 PRB pairs not support yet for MPDCCH\n"); - AssertFatal(mdci->reps>0,"mdci->reps==0\n"); + AssertFatal (mdci->number_of_prb_pairs == 6, "2 or 4 PRB pairs not support yet for MPDCCH\n"); + AssertFatal (mdci->reps > 0, "mdci->reps==0\n"); // 9 REs/EREG * 4 EREG/ECCE => 36 REs/ECCE => 72 bits/ECCE, so same as regular PDCCH channel encoding @@ -233,11 +236,9 @@ void generate_mdci_top(PHY_VARS_eNB *eNB, int frame, int subframe,int16_t amp,in coded_bits = bitsperCCE * mdci->L; // scrambling - uint16_t absSF = (frame*10)+subframe; + uint16_t absSF = (frame * 10) + subframe; - AssertFatal(absSF < 1024, - "Absolute subframe %d = %d*10 + %d > 1023\n", - absSF,frame,subframe); + AssertFatal (absSF < 1024, "Absolute subframe %d = %d*10 + %d > 1023\n", absSF, frame, subframe); mpdcch_scrambling(fp, mdci, @@ -246,12 +247,12 @@ void generate_mdci_top(PHY_VARS_eNB *eNB, int frame, int subframe,int16_t amp,in coded_bits); // Modulation for PDCCH - if (fp->nb_antenna_ports_eNB==1) - gain_lin_QPSK = (int16_t)((amp*ONE_OVER_SQRT2_Q15)>>15); + if (fp->nb_antenna_ports_eNB == 1) + gain_lin_QPSK = (int16_t) ((amp * ONE_OVER_SQRT2_Q15) >> 15); else - gain_lin_QPSK = amp/2; + gain_lin_QPSK = amp / 2; - uint8_t *e_ptr = mpdcch->e; + uint8_t *e_ptr = mpdcch->e; // if (mdci->transmission_type==0) nprime=mdci->rnti&3; // for Localized 2+4 we use 6.8B.5 rule // map directly to one antenna port for now @@ -261,19 +262,22 @@ void generate_mdci_top(PHY_VARS_eNB *eNB, int frame, int subframe,int16_t amp,in // mpdcchtab5 below contains the mapping from each coded symbol to relative RE avoiding the DMRS - int re_offset = fp->first_carrier_offset + 1 + ((fp->N_RB_DL==100)?1:0) + mdci->narrowband*12*6; - if (re_offset>fp->ofdm_symbol_size) re_offset-=(fp->ofdm_symbol_size-1); - int32_t *txF = &txdataF[0][re_offset]; - int32_t yIQ; + int re_offset = fp->first_carrier_offset + 1 + ((fp->N_RB_DL == 100) ? 1 : 0) + mdci->narrowband * 12 * 6; + if (re_offset > fp->ofdm_symbol_size) + re_offset -= (fp->ofdm_symbol_size - 1); + int32_t *txF = &txdataF[0][re_offset]; + int32_t yIQ; - for (i=0; i<(coded_bits>>1); i++) { + for (i = 0; i < (coded_bits >> 1); i++) { // QPSK modulation to yIQ - ((int16_t*)&yIQ)[0] = (*e_ptr == 1) ? -gain_lin_QPSK : gain_lin_QPSK; e_ptr++; - ((int16_t*)&yIQ)[1] = (*e_ptr == 1) ? -gain_lin_QPSK : gain_lin_QPSK; e_ptr++; - txF[mpdcch5tab[i+(36*mdci->firstCCE)]] = yIQ; + ((int16_t *) & yIQ)[0] = (*e_ptr == 1) ? -gain_lin_QPSK : gain_lin_QPSK; + e_ptr++; + ((int16_t *) & yIQ)[1] = (*e_ptr == 1) ? -gain_lin_QPSK : gain_lin_QPSK; + e_ptr++; + txF[mpdcch5tab[i + (36 * mdci->firstCCE)]] = yIQ; } } -} +} #endif diff --git a/openair1/PHY/LTE_TRANSPORT/proto.h b/openair1/PHY/LTE_TRANSPORT/proto.h index 8a0e160f23..6a27811036 100755 --- a/openair1/PHY/LTE_TRANSPORT/proto.h +++ b/openair1/PHY/LTE_TRANSPORT/proto.h @@ -1677,6 +1677,10 @@ void init_ul_hopping(LTE_DL_FRAME_PARMS *frame_parms); @param nB nB from 36.304 (0=4T,1=2T,2=T,3=T/2,4=T/4,5=T/8,6=T/16,7=T/32*/ int init_ue_paging_info(PHY_VARS_UE *ue, long defaultPagingCycle, long nB); +#ifdef Rel14 +void init_mpdcch5tab_normal_regular_subframe_evenNRBDL(PHY_VARS_eNB *eNB,int l_MPDCCH_start); +#endif + int32_t compareints (const void * a, const void * b); diff --git a/openair1/SCHED/fapi_l1.c b/openair1/SCHED/fapi_l1.c index 637bb129ea..3be6f4b987 100755 --- a/openair1/SCHED/fapi_l1.c +++ b/openair1/SCHED/fapi_l1.c @@ -59,7 +59,7 @@ void handle_nfapi_mpdcch_pdu(PHY_VARS_eNB *eNB, LTE_eNB_MPDCCH *mpdcch_vars = &eNB->mpdcch_vars[idx]; nfapi_dl_config_mpdcch_pdu *pdu = &dl_config_pdu->mpdcch_pdu; - LOG_D(PHY,"Frame %d, Subframe %d: MDCI processing\n",proc->frame_tx,proc->subframe_tx); + LOG_I(PHY,"Frame %d, Subframe %d: MDCI processing\n",proc->frame_tx,proc->subframe_tx); // copy dci configuration into eNB structure fill_mdci_and_dlsch(eNB,proc,&mpdcch_vars->mdci_alloc[mpdcch_vars->num_dci],pdu); @@ -147,7 +147,7 @@ void handle_nfapi_dlsch_pdu(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc, dlsch0_harq = dlsch0->harq_processes[0]; dlsch0_harq->pdu = sdu; - if (proc->frame_tx < 200) LOG_I(PHY,"NFAPI: frame %d, subframe %d: Programming SI-BR (%d) => %d\n",proc->frame_tx,proc->subframe_tx,rel13->pdsch_payload_type,UE_id); + if (proc->frame_tx < 200) LOG_D(PHY,"NFAPI: frame %d, subframe %d: Programming SI-BR (%d) => %d\n",proc->frame_tx,proc->subframe_tx,rel13->pdsch_payload_type,UE_id); dlsch0->rnti = 0xFFFF; dlsch0->Kmimo = 1; @@ -156,6 +156,8 @@ void handle_nfapi_dlsch_pdu(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc, dlsch0->i0 = rel13->initial_transmission_sf_io; dlsch0_harq->pdsch_start = rel10->pdsch_start; dlsch0->harq_ids[proc->subframe_tx] = 0; + dlsch0_harq->frame = proc->frame_tx; + dlsch0_harq->subframe = proc->subframe_tx; if (rel13->pdsch_payload_type == 0) dlsch0->sib1_br_flag=1; diff --git a/openair1/SCHED/phy_procedures_lte_eNb.c b/openair1/SCHED/phy_procedures_lte_eNb.c index 118f0f8eed..14618d7828 100755 --- a/openair1/SCHED/phy_procedures_lte_eNb.c +++ b/openair1/SCHED/phy_procedures_lte_eNb.c @@ -47,278 +47,208 @@ #include #if defined(ENABLE_ITTI) -# include "intertask_interface.h" +#include "intertask_interface.h" #endif -void pmch_procedures(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,PHY_VARS_RN *rn,relaying_type_t r_type) { +void +pmch_procedures (PHY_VARS_eNB * eNB, eNB_rxtx_proc_t * proc, PHY_VARS_RN * rn, relaying_type_t r_type) +{ #if defined(Rel10) || defined(Rel14) - MCH_PDU *mch_pduP=NULL; - MCH_PDU mch_pdu; + MCH_PDU *mch_pduP = NULL; + MCH_PDU mch_pdu; // uint8_t sync_area=255; #endif - int subframe = proc->subframe_tx; + int subframe = proc->subframe_tx; - AssertFatal(1==0,"pmch not tested for the moment, exiting\n"); + AssertFatal (1 == 0, "pmch not tested for the moment, exiting\n"); // This is DL-Cell spec pilots in Control region - generate_pilots_slot(eNB, - eNB->common_vars.txdataF, - AMP, - subframe<<1,1); + generate_pilots_slot (eNB, eNB->common_vars.txdataF, AMP, subframe << 1, 1); + - #if defined(Rel10) || defined(Rel14) // if mcch is active, send regardless of the node type: eNB or RN // when mcch is active, MAC sched does not allow MCCH and MTCH multiplexing /* - mch_pduP = mac_xface->get_mch_sdu(eNB->Mod_id, - eNB->CC_id, - proc->frame_tx, - subframe); - */ + mch_pduP = mac_xface->get_mch_sdu(eNB->Mod_id, + eNB->CC_id, + proc->frame_tx, + subframe); + */ switch (r_type) { case no_relay: if ((mch_pduP->Pdu_size > 0) && (mch_pduP->sync_area == 0)) // TEST: only transmit mcch for sync area 0 - LOG_D(PHY,"[eNB%"PRIu8"] Frame %d subframe %d : Got MCH pdu for MBSFN (MCS %"PRIu8", TBS %d) \n", - eNB->Mod_id,proc->frame_tx,subframe,mch_pduP->mcs, - eNB->dlsch_MCH->harq_processes[0]->TBS>>3); + LOG_D (PHY, "[eNB%" PRIu8 "] Frame %d subframe %d : Got MCH pdu for MBSFN (MCS %" PRIu8 ", TBS %d) \n", + eNB->Mod_id, proc->frame_tx, subframe, mch_pduP->mcs, eNB->dlsch_MCH->harq_processes[0]->TBS >> 3); else { - LOG_D(PHY,"[DeNB %"PRIu8"] Frame %d subframe %d : Do not transmit MCH pdu for MBSFN sync area %"PRIu8" (%s)\n", - eNB->Mod_id,proc->frame_tx,subframe,mch_pduP->sync_area, - (mch_pduP->Pdu_size == 0)? "Empty MCH PDU":"Let RN transmit for the moment"); + LOG_D (PHY, "[DeNB %" PRIu8 "] Frame %d subframe %d : Do not transmit MCH pdu for MBSFN sync area %" PRIu8 " (%s)\n", + eNB->Mod_id, proc->frame_tx, subframe, mch_pduP->sync_area, (mch_pduP->Pdu_size == 0) ? "Empty MCH PDU" : "Let RN transmit for the moment"); mch_pduP = NULL; } - + break; - + case multicast_relay: - if ((mch_pduP->Pdu_size > 0) && ((mch_pduP->mcch_active == 1) || mch_pduP->msi_active==1)) { - LOG_D(PHY,"[RN %"PRIu8"] Frame %d subframe %d: Got the MCH PDU for MBSFN sync area %"PRIu8" (MCS %"PRIu8", TBS %"PRIu16")\n", - rn->Mod_id,rn->frame, subframe, - mch_pduP->sync_area,mch_pduP->mcs,mch_pduP->Pdu_size); - } else if (rn->mch_avtive[subframe%5] == 1) { // SF2 -> SF7, SF3 -> SF8 - mch_pduP= &mch_pdu; - memcpy(&mch_pduP->payload, // could be a simple copy - rn->dlsch_rn_MCH[subframe%5]->harq_processes[0]->b, - rn->dlsch_rn_MCH[subframe%5]->harq_processes[0]->TBS>>3); - mch_pduP->Pdu_size = (uint16_t) (rn->dlsch_rn_MCH[subframe%5]->harq_processes[0]->TBS>>3); - mch_pduP->mcs = rn->dlsch_rn_MCH[subframe%5]->harq_processes[0]->mcs; - LOG_D(PHY,"[RN %"PRIu8"] Frame %d subframe %d: Forward the MCH PDU for MBSFN received on SF %d sync area %"PRIu8" (MCS %"PRIu8", TBS %"PRIu16")\n", - rn->Mod_id,rn->frame, subframe,subframe%5, - rn->sync_area[subframe%5],mch_pduP->mcs,mch_pduP->Pdu_size); + if ((mch_pduP->Pdu_size > 0) && ((mch_pduP->mcch_active == 1) || mch_pduP->msi_active == 1)) { + LOG_D (PHY, "[RN %" PRIu8 "] Frame %d subframe %d: Got the MCH PDU for MBSFN sync area %" PRIu8 " (MCS %" PRIu8 ", TBS %" PRIu16 ")\n", + rn->Mod_id, rn->frame, subframe, mch_pduP->sync_area, mch_pduP->mcs, mch_pduP->Pdu_size); + } else if (rn->mch_avtive[subframe % 5] == 1) { // SF2 -> SF7, SF3 -> SF8 + mch_pduP = &mch_pdu; + memcpy (&mch_pduP->payload, // could be a simple copy + rn->dlsch_rn_MCH[subframe % 5]->harq_processes[0]->b, rn->dlsch_rn_MCH[subframe % 5]->harq_processes[0]->TBS >> 3); + mch_pduP->Pdu_size = (uint16_t) (rn->dlsch_rn_MCH[subframe % 5]->harq_processes[0]->TBS >> 3); + mch_pduP->mcs = rn->dlsch_rn_MCH[subframe % 5]->harq_processes[0]->mcs; + LOG_D (PHY, "[RN %" PRIu8 "] Frame %d subframe %d: Forward the MCH PDU for MBSFN received on SF %d sync area %" PRIu8 " (MCS %" PRIu8 ", TBS %" PRIu16 ")\n", + rn->Mod_id, rn->frame, subframe, subframe % 5, rn->sync_area[subframe % 5], mch_pduP->mcs, mch_pduP->Pdu_size); } else { - mch_pduP=NULL; + mch_pduP = NULL; } - - rn->mch_avtive[subframe]=0; + + rn->mch_avtive[subframe] = 0; break; - + default: - LOG_W(PHY,"[eNB %"PRIu8"] Frame %d subframe %d: unknown relaying type %d \n", - eNB->Mod_id,proc->frame_tx,subframe,r_type); - mch_pduP=NULL; + LOG_W (PHY, "[eNB %" PRIu8 "] Frame %d subframe %d: unknown relaying type %d \n", eNB->Mod_id, proc->frame_tx, subframe, r_type); + mch_pduP = NULL; break; - }// switch - + } // switch + if (mch_pduP) { - fill_eNB_dlsch_MCH(eNB,mch_pduP->mcs,1,0); + fill_eNB_dlsch_MCH (eNB, mch_pduP->mcs, 1, 0); // Generate PMCH - generate_mch(eNB,proc,(uint8_t*)mch_pduP->payload); + generate_mch (eNB, proc, (uint8_t *) mch_pduP->payload); } else { - LOG_D(PHY,"[eNB/RN] Frame %d subframe %d: MCH not generated \n",proc->frame_tx,subframe); + LOG_D (PHY, "[eNB/RN] Frame %d subframe %d: MCH not generated \n", proc->frame_tx, subframe); } - + #endif } -void common_signal_procedures (PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc) { +void +common_signal_procedures (PHY_VARS_eNB * eNB, eNB_rxtx_proc_t * proc) +{ - LTE_DL_FRAME_PARMS *fp=&eNB->frame_parms; - int **txdataF = eNB->common_vars.txdataF; - uint8_t *pbch_pdu=&eNB->pbch_pdu[0]; - int subframe = proc->subframe_tx; - int frame = proc->frame_tx; + LTE_DL_FRAME_PARMS *fp = &eNB->frame_parms; + int **txdataF = eNB->common_vars.txdataF; + uint8_t *pbch_pdu = &eNB->pbch_pdu[0]; + int subframe = proc->subframe_tx; + int frame = proc->frame_tx; - LOG_D(PHY,"common_signal_procedures: frame %d, subframe %d\n",frame,subframe); + LOG_D (PHY, "common_signal_procedures: frame %d, subframe %d\n", frame, subframe); // generate Cell-Specific Reference Signals for both slots - VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_ENB_RS_TX,1); - generate_pilots_slot(eNB, - txdataF, - AMP, - subframe<<1,0); + VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME (VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_ENB_RS_TX, 1); + generate_pilots_slot (eNB, txdataF, AMP, subframe << 1, 0); // check that 2nd slot is for DL - if (subframe_select(fp,subframe) == SF_DL) - generate_pilots_slot(eNB, - txdataF, - AMP, - (subframe<<1)+1,0); - - VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_ENB_RS_TX,0); - + if (subframe_select (fp, subframe) == SF_DL) + generate_pilots_slot (eNB, txdataF, AMP, (subframe << 1) + 1, 0); + + VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME (VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_ENB_RS_TX, 0); + // First half of PSS/SSS (FDD, slot 0) if (subframe == 0) { if (fp->frame_type == FDD) { - generate_pss(txdataF, - AMP, - fp, - (fp->Ncp==NORMAL) ? 6 : 5, - 0); - generate_sss(txdataF, - AMP, - fp, - (fp->Ncp==NORMAL) ? 5 : 4, - 0); - + generate_pss (txdataF, AMP, fp, (fp->Ncp == NORMAL) ? 6 : 5, 0); + generate_sss (txdataF, AMP, fp, (fp->Ncp == NORMAL) ? 5 : 4, 0); + } - - + /// First half of SSS (TDD, slot 1) - - if (fp->frame_type == TDD) { - generate_sss(txdataF, - AMP, - fp, - (fp->Ncp==NORMAL) ? 6 : 5, - 1); - } + if (fp->frame_type == TDD) { + generate_sss (txdataF, AMP, fp, (fp->Ncp == NORMAL) ? 6 : 5, 1); + } // generate PBCH (Physical Broadcast CHannel) info /// generate PBCH - if ((frame&3)==0) { - AssertFatal(eNB->pbch_configured==1,"PBCH was not configured by MAC\n"); - eNB->pbch_configured=0; + if ((frame & 3) == 0) { + AssertFatal (eNB->pbch_configured == 1, "PBCH was not configured by MAC\n"); + eNB->pbch_configured = 0; } - generate_pbch(&eNB->pbch, - txdataF, - AMP, - fp, - pbch_pdu, - frame&3); - + generate_pbch (&eNB->pbch, txdataF, AMP, fp, pbch_pdu, frame & 3); + + } else if ((subframe == 1) && (fp->frame_type == TDD)) { + generate_pss (txdataF, AMP, fp, 2, 2); } - else if ((subframe == 1) && - (fp->frame_type == TDD)){ - generate_pss(txdataF, - AMP, - fp, - 2, - 2); - } - // Second half of PSS/SSS (FDD, slot 10) - else if ((subframe == 5) && - (fp->frame_type == FDD)) { - generate_pss(txdataF, - AMP, - &eNB->frame_parms, - (fp->Ncp==NORMAL) ? 6 : 5, - 10); - generate_sss(txdataF, - AMP, - &eNB->frame_parms, - (fp->Ncp==NORMAL) ? 5 : 4, - 10); + else if ((subframe == 5) && (fp->frame_type == FDD)) { + generate_pss (txdataF, AMP, &eNB->frame_parms, (fp->Ncp == NORMAL) ? 6 : 5, 10); + generate_sss (txdataF, AMP, &eNB->frame_parms, (fp->Ncp == NORMAL) ? 5 : 4, 10); } - // Second-half of SSS (TDD, slot 11) - else if ((subframe == 5) && - (fp->frame_type == TDD)) { - generate_sss(txdataF, - AMP, - fp, - (fp->Ncp==NORMAL) ? 6 : 5, - 11); + else if ((subframe == 5) && (fp->frame_type == TDD)) { + generate_sss (txdataF, AMP, fp, (fp->Ncp == NORMAL) ? 6 : 5, 11); } - // Second half of PSS (TDD, slot 12) - else if ((subframe == 6) && - (fp->frame_type == TDD)) { - generate_pss(txdataF, - AMP, - fp, - 2, - 12); + else if ((subframe == 6) && (fp->frame_type == TDD)) { + generate_pss (txdataF, AMP, fp, 2, 12); } } -void pdsch_procedures(PHY_VARS_eNB *eNB, - eNB_rxtx_proc_t *proc, - int harq_pid, - LTE_eNB_DLSCH_t *dlsch, - LTE_eNB_DLSCH_t *dlsch1, - LTE_eNB_UE_stats *ue_stats, - int ra_flag) { +void +pdsch_procedures (PHY_VARS_eNB * eNB, eNB_rxtx_proc_t * proc, int harq_pid, LTE_eNB_DLSCH_t * dlsch, LTE_eNB_DLSCH_t * dlsch1, LTE_eNB_UE_stats * ue_stats, int ra_flag) +{ - int frame=proc->frame_tx; - int subframe=proc->subframe_tx; - LTE_DL_eNB_HARQ_t *dlsch_harq=dlsch->harq_processes[harq_pid]; - int input_buffer_length = dlsch_harq->TBS/8; - LTE_DL_FRAME_PARMS *fp=&eNB->frame_parms; + int frame = proc->frame_tx; + int subframe = proc->subframe_tx; + LTE_DL_eNB_HARQ_t *dlsch_harq = dlsch->harq_processes[harq_pid]; + int input_buffer_length = dlsch_harq->TBS / 8; + LTE_DL_FRAME_PARMS *fp = &eNB->frame_parms; - if (frame < 200) { + if (dlsch->rnti != 0xFFFF) { - LOG_I(PHY, - "[eNB %"PRIu8"][PDSCH %"PRIx16"/%"PRIu8"] Frame %d, subframe %d: Generating PDSCH/DLSCH with input size = %"PRIu16", pdsch_start %d, G %d, nb_rb %"PRIu16", rb0 %x, rb1 %x, TBS %"PRIu16", pmi_alloc %"PRIx64", rv %"PRIu8" (round %"PRIu8")\n", - eNB->Mod_id, dlsch->rnti,harq_pid, - frame, subframe, input_buffer_length, dlsch_harq->pdsch_start, - get_G(fp, - dlsch_harq->nb_rb, - dlsch_harq->rb_alloc, - dlsch_harq->Qm, - dlsch_harq->Nl, - dlsch_harq->pdsch_start, - frame, - subframe, - dlsch_harq->mimo_mode==TM7?7:0), - dlsch_harq->nb_rb, - dlsch_harq->rb_alloc[0], - dlsch_harq->rb_alloc[1], - dlsch_harq->TBS, - pmi2hex_2Ar1(dlsch_harq->pmi_alloc), - dlsch_harq->rvidx, - dlsch_harq->round); - } + LOG_I (PHY, + "[eNB %" PRIu8 "][PDSCH %" PRIx16 "/%" PRIu8 "] Frame %d, subframe %d: Generating PDSCH/DLSCH with input size = %" PRIu16 ", pdsch_start %d, G %d, nb_rb %" PRIu16 ", rb0 %x, rb1 %x, TBS %" + PRIu16 ", pmi_alloc %" PRIx64 ", rv %" PRIu8 " (round %" PRIu8 ")\n", eNB->Mod_id, dlsch->rnti, harq_pid, frame, subframe, input_buffer_length, dlsch_harq->pdsch_start, get_G (fp, + dlsch_harq-> + nb_rb, + dlsch_harq-> + rb_alloc, + dlsch_harq-> + Qm, + dlsch_harq-> + Nl, + dlsch_harq-> + pdsch_start, + frame, + subframe, + dlsch_harq-> + mimo_mode == + TM7 ? 7 : 0), + dlsch_harq->nb_rb, dlsch_harq->rb_alloc[0], dlsch_harq->rb_alloc[1], dlsch_harq->TBS, pmi2hex_2Ar1 (dlsch_harq->pmi_alloc), dlsch_harq->rvidx, dlsch_harq->round); + } #if defined(MESSAGE_CHART_GENERATOR_PHY) - MSC_LOG_TX_MESSAGE( - MSC_PHY_ENB,MSC_PHY_UE, - NULL,0, - "%05u:%02u PDSCH/DLSCH input size = %"PRIu16", G %d, nb_rb %"PRIu16", TBS %"PRIu16", pmi_alloc %"PRIx16", rv %"PRIu8" (round %"PRIu8")", - frame, subframe, - input_buffer_length, - get_G(fp, - dlsch_harq->nb_rb, - dlsch_harq->rb_alloc, - dlsch_harq->Qm, - dlsch_harq->Nl, - dlsch_harq->pdsch_start, - frame, - subframe, - dlsch_harq->mimo_mode==TM7?7:0), - dlsch_harq->nb_rb, - dlsch_harq->TBS, - pmi2hex_2Ar1(dlsch_harq->pmi_alloc), - dlsch_harq->rvidx, - dlsch_harq->round); + MSC_LOG_TX_MESSAGE (MSC_PHY_ENB, MSC_PHY_UE, + NULL, 0, + "%05u:%02u PDSCH/DLSCH input size = %" PRIu16 ", G %d, nb_rb %" PRIu16 ", TBS %" PRIu16 ", pmi_alloc %" PRIx16 ", rv %" PRIu8 " (round %" PRIu8 ")", + frame, subframe, + input_buffer_length, + get_G (fp, + dlsch_harq->nb_rb, + dlsch_harq->rb_alloc, + dlsch_harq->Qm, + dlsch_harq->Nl, + dlsch_harq->pdsch_start, + frame, subframe, dlsch_harq->mimo_mode == TM7 ? 7 : 0), dlsch_harq->nb_rb, dlsch_harq->TBS, pmi2hex_2Ar1 (dlsch_harq->pmi_alloc), dlsch_harq->rvidx, dlsch_harq->round); #endif - - - if (ue_stats) ue_stats->dlsch_sliding_cnt++; - + + + if (ue_stats) + ue_stats->dlsch_sliding_cnt++; + if (dlsch_harq->round == 0) { if (ue_stats) ue_stats->dlsch_trials[harq_pid][0]++; @@ -326,1080 +256,868 @@ void pdsch_procedures(PHY_VARS_eNB *eNB, ue_stats->dlsch_trials[harq_pid][dlsch_harq->round]++; #ifdef DEBUG_PHY_PROC #ifdef DEBUG_DLSCH - LOG_D(PHY,"[eNB] This DLSCH is a retransmission\n"); + LOG_D (PHY, "[eNB] This DLSCH is a retransmission\n"); #endif #endif } - LOG_D(PHY,"Generating DLSCH/PDSCH %d\n",ra_flag); + LOG_D (PHY, "Generating DLSCH/PDSCH %d\n", ra_flag); // 36-212 - start_meas(&eNB->dlsch_encoding_stats); - AssertFatal(dlsch_harq->pdu!=NULL,"dlsch_harq->pdu == NULL (rnti %x)\n",dlsch->rnti); - eNB->te(eNB, - dlsch_harq->pdu, - dlsch_harq->pdsch_start, - dlsch, - frame,subframe, - &eNB->dlsch_rate_matching_stats, - &eNB->dlsch_turbo_encoding_stats, - &eNB->dlsch_interleaving_stats); - stop_meas(&eNB->dlsch_encoding_stats); + start_meas (&eNB->dlsch_encoding_stats); + AssertFatal (dlsch_harq->pdu != NULL, "dlsch_harq->pdu == NULL (rnti %x)\n", dlsch->rnti); + eNB->te (eNB, dlsch_harq->pdu, dlsch_harq->pdsch_start, dlsch, frame, subframe, &eNB->dlsch_rate_matching_stats, &eNB->dlsch_turbo_encoding_stats, &eNB->dlsch_interleaving_stats); + stop_meas (&eNB->dlsch_encoding_stats); // 36-211 - start_meas(&eNB->dlsch_scrambling_stats); - dlsch_scrambling(fp, - 0, - dlsch, - harq_pid, - get_G(fp, - dlsch_harq->nb_rb, - dlsch_harq->rb_alloc, - dlsch_harq->Qm, - dlsch_harq->Nl, - dlsch_harq->pdsch_start, - frame,subframe, - 0), - 0, - frame, - subframe<<1); - stop_meas(&eNB->dlsch_scrambling_stats); - - start_meas(&eNB->dlsch_modulation_stats); - - - dlsch_modulation(eNB, - eNB->common_vars.txdataF, - AMP, - subframe, - dlsch_harq->pdsch_start, - dlsch, - dlsch1); - - stop_meas(&eNB->dlsch_modulation_stats); + start_meas (&eNB->dlsch_scrambling_stats); + dlsch_scrambling (fp, 0, dlsch, harq_pid, get_G (fp, dlsch_harq->nb_rb, dlsch_harq->rb_alloc, dlsch_harq->Qm, dlsch_harq->Nl, dlsch_harq->pdsch_start, frame, subframe, 0), 0, frame, subframe << 1); + stop_meas (&eNB->dlsch_scrambling_stats); + + start_meas (&eNB->dlsch_modulation_stats); + + + dlsch_modulation (eNB, eNB->common_vars.txdataF, AMP, subframe, dlsch_harq->pdsch_start, dlsch, dlsch1); + + stop_meas (&eNB->dlsch_modulation_stats); dlsch->active = 0; dlsch_harq->round++; - if (dlsch->rnti == 0xFFFF) dlsch->harq_mask=0; + if (dlsch->rnti == 0xFFFF) + dlsch->harq_mask = 0; } -void phy_procedures_eNB_TX(PHY_VARS_eNB *eNB, - eNB_rxtx_proc_t *proc, - relaying_type_t r_type, - PHY_VARS_RN *rn, - int do_meas) +void +phy_procedures_eNB_TX (PHY_VARS_eNB * eNB, eNB_rxtx_proc_t * proc, relaying_type_t r_type, PHY_VARS_RN * rn, int do_meas) { - UNUSED(rn); - int frame=proc->frame_tx; - int subframe=proc->subframe_tx; - uint32_t i,aa; - uint8_t harq_pid; - int8_t UE_id=0; - uint8_t num_pdcch_symbols=0; - uint8_t num_dci=0; - uint8_t ul_subframe; - uint32_t ul_frame; - LTE_DL_FRAME_PARMS *fp=&eNB->frame_parms; + UNUSED (rn); + int frame = proc->frame_tx; + int subframe = proc->subframe_tx; + uint32_t i, aa; + uint8_t harq_pid; + int8_t UE_id = 0; + uint8_t num_pdcch_symbols = 0; + uint8_t num_dci = 0; + uint8_t ul_subframe; + uint32_t ul_frame; + LTE_DL_FRAME_PARMS *fp = &eNB->frame_parms; LTE_UL_eNB_HARQ_t *ulsch_harq; - int offset = eNB->CC_id;//proc == &eNB->proc.proc_rxtx[0] ? 0 : 1; + int offset = eNB->CC_id; //proc == &eNB->proc.proc_rxtx[0] ? 0 : 1; - if ((fp->frame_type == TDD) && (subframe_select(fp,subframe)==SF_UL)) return; + if ((fp->frame_type == TDD) && (subframe_select (fp, subframe) == SF_UL)) + return; - VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_ENB_TX+offset,1); - if (do_meas==1) start_meas(&eNB->phy_proc_tx); + VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME (VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_ENB_TX + offset, 1); + if (do_meas == 1) + start_meas (&eNB->phy_proc_tx); // clear the transmit data array for the current subframe - for (aa=0; aanb_antenna_ports_eNB; aa++) { - memset(&eNB->common_vars.txdataF[aa][subframe*fp->ofdm_symbol_size*(fp->symbols_per_tti)], - 0,fp->ofdm_symbol_size*(fp->symbols_per_tti)*sizeof(int32_t)); + for (aa = 0; aa < fp->nb_antenna_ports_eNB; aa++) { + memset (&eNB->common_vars.txdataF[aa][subframe * fp->ofdm_symbol_size * (fp->symbols_per_tti)], 0, fp->ofdm_symbol_size * (fp->symbols_per_tti) * sizeof (int32_t)); } - - if (is_pmch_subframe(frame,subframe,fp)) { - pmch_procedures(eNB,proc,rn,r_type); - } - else { + + if (is_pmch_subframe (frame, subframe, fp)) { + pmch_procedures (eNB, proc, rn, r_type); + } else { // this is not a pmch subframe, so generate PSS/SSS/PBCH - common_signal_procedures(eNB,proc); + common_signal_procedures (eNB, proc); } // clear existing ulsch dci allocations before applying info from MAC (this is table - ul_subframe = pdcch_alloc2ul_subframe(fp,subframe); - ul_frame = pdcch_alloc2ul_frame(fp,frame,subframe); + ul_subframe = pdcch_alloc2ul_subframe (fp, subframe); + ul_frame = pdcch_alloc2ul_frame (fp, frame, subframe); // clear previous allocation information for all UEs - for (i=0; idlsch[i][0]) eNB->dlsch[i][0]->subframe_tx[subframe] = 0; } /* save old HARQ information needed for PHICH generation */ - if (ul_subframe < 10) { // This means that there is a potential UL subframe that will be scheduled here - for (i=0; iulsch[i]) { - ulsch_harq = eNB->ulsch[i]->harq_processes[harq_pid]; - - /* Store first_rb and n_DMRS for correct PHICH generation below. - * For PHICH generation we need "old" values of last scheduling - * for this HARQ process. 'generate_eNB_dlsch_params' below will - * overwrite first_rb and n_DMRS and 'generate_phich_top', done - * after 'generate_eNB_dlsch_params', would use the "new" values - * instead of the "old" ones. - * - * This has been tested for FDD only, may be wrong for TDD. - * - * TODO: maybe we should restructure the code to be sure it - * is done correctly. The main concern is if the code - * changes and first_rb and n_DMRS are modified before - * we reach here, then the PHICH processing will be wrong, - * using wrong first_rb and n_DMRS values to compute - * ngroup_PHICH and nseq_PHICH. - * - * TODO: check if that works with TDD. - */ - ulsch_harq->previous_first_rb = ulsch_harq->first_rb; - ulsch_harq->previous_n_DMRS = ulsch_harq->n_DMRS; - + ulsch_harq = eNB->ulsch[i]->harq_processes[harq_pid]; + + /* Store first_rb and n_DMRS for correct PHICH generation below. + * For PHICH generation we need "old" values of last scheduling + * for this HARQ process. 'generate_eNB_dlsch_params' below will + * overwrite first_rb and n_DMRS and 'generate_phich_top', done + * after 'generate_eNB_dlsch_params', would use the "new" values + * instead of the "old" ones. + * + * This has been tested for FDD only, may be wrong for TDD. + * + * TODO: maybe we should restructure the code to be sure it + * is done correctly. The main concern is if the code + * changes and first_rb and n_DMRS are modified before + * we reach here, then the PHICH processing will be wrong, + * using wrong first_rb and n_DMRS values to compute + * ngroup_PHICH and nseq_PHICH. + * + * TODO: check if that works with TDD. + */ + ulsch_harq->previous_first_rb = ulsch_harq->first_rb; + ulsch_harq->previous_n_DMRS = ulsch_harq->n_DMRS; + } } } - // num_pdcch_symbols = DCI_pdu->num_pdcch_symbols; - num_pdcch_symbols = eNB->pdcch_vars[subframe&1].num_pdcch_symbols; - num_dci = eNB->pdcch_vars[subframe&1].num_dci; + num_pdcch_symbols = eNB->pdcch_vars[subframe & 1].num_pdcch_symbols; + num_dci = eNB->pdcch_vars[subframe & 1].num_dci; // LOG_D(PHY,"num_pdcch_symbols %"PRIu8",(dci common %"PRIu8", dci uespec %"PRIu8"\n",num_pdcch_symbols, // DCI_pdu->Num_common_dci,DCI_pdu->Num_ue_spec_dci); - LOG_D(PHY,"num_pdcch_symbols %"PRIu8",(number dci %"PRIu8"\n",num_pdcch_symbols, - num_dci); - VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_DCI_INFO,num_pdcch_symbols); + LOG_D (PHY, "num_pdcch_symbols %" PRIu8 ",(number dci %" PRIu8 "\n", num_pdcch_symbols, num_dci); + VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME (VCD_SIGNAL_DUMPER_VARIABLES_DCI_INFO, num_pdcch_symbols); - VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_DCI_INFO,(frame*10)+subframe); + VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME (VCD_SIGNAL_DUMPER_VARIABLES_DCI_INFO, (frame * 10) + subframe); if (num_dci > 0) - LOG_D(PHY,"[eNB %"PRIu8"] Frame %d, subframe %d: Calling generate_dci_top (pdcch) (num_dci %"PRIu8")\n",eNB->Mod_id,frame, subframe, - num_dci); + LOG_D (PHY, "[eNB %" PRIu8 "] Frame %d, subframe %d: Calling generate_dci_top (pdcch) (num_dci %" PRIu8 ")\n", eNB->Mod_id, frame, subframe, num_dci); - - generate_dci_top(num_pdcch_symbols, - num_dci, - &eNB->pdcch_vars[subframe&1].dci_alloc[0], - 0, - AMP, - fp, - eNB->common_vars.txdataF, - subframe); - - VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_ENB_PDCCH_TX,0); + generate_dci_top (num_pdcch_symbols, num_dci, &eNB->pdcch_vars[subframe & 1].dci_alloc[0], 0, AMP, fp, eNB->common_vars.txdataF, subframe); + + + VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME (VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_ENB_PDCCH_TX, 0); // Now scan UE specific DLSCH - LTE_eNB_DLSCH_t *dlsch0,*dlsch1; - for (UE_id=0; UE_iddlsch[(uint8_t)UE_id][0]; - dlsch1 = eNB->dlsch[(uint8_t)UE_id][1]; + LTE_eNB_DLSCH_t *dlsch0, *dlsch1; + for (UE_id = 0; UE_id < NUMBER_OF_UE_MAX; UE_id++) { + dlsch0 = eNB->dlsch[(uint8_t) UE_id][0]; + dlsch1 = eNB->dlsch[(uint8_t) UE_id][1]; - if ((dlsch0)&& - (dlsch0->rnti>0)&& - (dlsch0->active == 1)) { + if ((dlsch0) && (dlsch0->rnti > 0) && (dlsch0->active == 1)) { - // get harq_pid - harq_pid = dlsch0->harq_ids[subframe]; - AssertFatal(harq_pid>=0,"harq_pid is negative\n"); - // generate pdsch - pdsch_procedures(eNB, - proc, - harq_pid, - dlsch0, - dlsch1, - &eNB->UE_stats[(uint32_t)UE_id], - 0); + // get harq_pid + harq_pid = dlsch0->harq_ids[subframe]; + AssertFatal (harq_pid >= 0, "harq_pid is negative\n"); + // generate pdsch + if ((dlsch0->harq_processes[harq_pid]->status == ACTIVE) && (dlsch0->harq_processes[harq_pid]->frame == frame) && (dlsch0->harq_processes[harq_pid]->subframe == subframe)) + pdsch_procedures (eNB, proc, harq_pid, dlsch0, dlsch1, &eNB->UE_stats[(uint32_t) UE_id], 0); - } - - - else if ((dlsch0)&& - (dlsch0->rnti>0)&& - (dlsch0->active == 0)) { - - // clear subframe TX flag since UE is not scheduled for PDSCH in this subframe (so that we don't look for PUCCH later) - dlsch0->subframe_tx[subframe]=0; - } } + else if ((dlsch0) && (dlsch0->rnti > 0) && (dlsch0->active == 0)) { - generate_phich_top(eNB, - proc, - AMP); + // clear subframe TX flag since UE is not scheduled for PDSCH in this subframe (so that we don't look for PUCCH later) + dlsch0->subframe_tx[subframe] = 0; + } + } + + + + generate_phich_top (eNB, proc, AMP); + + VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME (VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_ENB_TX + offset, 0); + if (do_meas == 1) + stop_meas (&eNB->phy_proc_tx); - VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_ENB_TX+offset,0); - if (do_meas==1) stop_meas(&eNB->phy_proc_tx); - } -void prach_procedures(PHY_VARS_eNB *eNB, +void +prach_procedures (PHY_VARS_eNB * eNB, #ifdef Rel14 - int br_flag + int br_flag #endif - ) { - uint16_t max_preamble[4],max_preamble_energy[4],max_preamble_delay[4]; - uint16_t i; - int frame,subframe; + ) +{ + uint16_t max_preamble[4], max_preamble_energy[4], max_preamble_delay[4]; + uint16_t i; + int frame, subframe; #ifdef Rel14 - if (br_flag==1) { + if (br_flag == 1) { subframe = eNB->proc.subframe_prach_br; frame = eNB->proc.frame_prach_br; - pthread_mutex_lock(&eNB->UL_INFO_mutex); - eNB->UL_INFO.rach_ind_br.number_of_preambles=0; - pthread_mutex_unlock(&eNB->UL_INFO_mutex); - } - else + pthread_mutex_lock (&eNB->UL_INFO_mutex); + eNB->UL_INFO.rach_ind_br.number_of_preambles = 0; + pthread_mutex_unlock (&eNB->UL_INFO_mutex); + } else #endif - { - pthread_mutex_lock(&eNB->UL_INFO_mutex); - eNB->UL_INFO.rach_ind.number_of_preambles=0; - pthread_mutex_unlock(&eNB->UL_INFO_mutex); - subframe = eNB->proc.subframe_prach; - frame = eNB->proc.frame_prach; - } - RU_t *ru; - int aa=0; - int ru_aa; + { + pthread_mutex_lock (&eNB->UL_INFO_mutex); + eNB->UL_INFO.rach_ind.number_of_preambles = 0; + pthread_mutex_unlock (&eNB->UL_INFO_mutex); + subframe = eNB->proc.subframe_prach; + frame = eNB->proc.frame_prach; + } + RU_t *ru; + int aa = 0; + int ru_aa; - - VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_ENB_PRACH_RX,1); + + VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME (VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_ENB_PRACH_RX, 1); - for (i=0;inum_RU;i++) { - ru=eNB->RU_list[i]; - for (ru_aa=0,aa=0;ru_aanb_rx;ru_aa++,aa++) { + for (i = 0; i < eNB->num_RU; i++) { + ru = eNB->RU_list[i]; + for (ru_aa = 0, aa = 0; ru_aa < ru->nb_rx; ru_aa++, aa++) { eNB->prach_vars.rxsigF[0][aa] = eNB->RU_list[i]->prach_rxsigF[ru_aa]; #ifdef Rel14 - int ce_level; + int ce_level; - if (br_flag==1) - for (ce_level=0;ce_level<4;ce_level++) eNB->prach_vars_br.rxsigF[ce_level][aa] = eNB->RU_list[i]->prach_rxsigF_br[ce_level][ru_aa]; + if (br_flag == 1) + for (ce_level = 0; ce_level < 4; ce_level++) + eNB->prach_vars_br.rxsigF[ce_level][aa] = eNB->RU_list[i]->prach_rxsigF_br[ce_level][ru_aa]; #endif } } - rx_prach(eNB, - eNB->RU_list[0], - &max_preamble[0], - &max_preamble_energy[0], - &max_preamble_delay[0], - frame, - 0 + rx_prach (eNB, eNB->RU_list[0], &max_preamble[0], &max_preamble_energy[0], &max_preamble_delay[0], frame, 0 #ifdef Rel14 - ,br_flag + , br_flag #endif - ); + ); #ifdef DEBUG_PHY_PROC - LOG_I(PHY,"[RAPROC] Frame %d, subframe %d : Most likely preamble %d, energy %d dB delay %d\n", - frame,subframe, - max_preamble[0], - max_preamble_energy[0]/10, - max_preamble_delay[0]); + LOG_I (PHY, "[RAPROC] Frame %d, subframe %d : Most likely preamble %d, energy %d dB delay %d\n", frame, subframe, max_preamble[0], max_preamble_energy[0] / 10, max_preamble_delay[0]); #endif #ifdef Rel14 - if (br_flag==1) { - int prach_mask; - - prach_mask = is_prach_subframe(&eNB->frame_parms,eNB->proc.frame_prach_br,eNB->proc.subframe_prach_br); - - eNB->UL_INFO.rach_ind_br.preamble_list = eNB->preamble_list_br; - int ind=0; - int ce_level=0; + if (br_flag == 1) { + int prach_mask; + + prach_mask = is_prach_subframe (&eNB->frame_parms, eNB->proc.frame_prach_br, eNB->proc.subframe_prach_br); + + eNB->UL_INFO.rach_ind_br.preamble_list = eNB->preamble_list_br; + int ind = 0; + int ce_level = 0; /* Save for later, it doesn't work - for (int ind=0,ce_level=0;ce_level<4;ce_level++) { - - if ((eNB->frame_parms.prach_emtc_config_common.prach_ConfigInfo.prach_CElevel_enable[ce_level]==1)&& - (prach_mask&(1<<(1+ce_level)) > 0) && // prach is active and CE level has finished its repetitions - (eNB->prach_vars_br.repetition_number[ce_level]== - eNB->frame_parms.prach_emtc_config_common.prach_ConfigInfo.prach_numRepetitionPerPreambleAttempt[ce_level])) { + for (int ind=0,ce_level=0;ce_level<4;ce_level++) { - */ + if ((eNB->frame_parms.prach_emtc_config_common.prach_ConfigInfo.prach_CElevel_enable[ce_level]==1)&& + (prach_mask&(1<<(1+ce_level)) > 0) && // prach is active and CE level has finished its repetitions + (eNB->prach_vars_br.repetition_number[ce_level]== + eNB->frame_parms.prach_emtc_config_common.prach_ConfigInfo.prach_numRepetitionPerPreambleAttempt[ce_level])) { - if (eNB->frame_parms.prach_emtc_config_common.prach_ConfigInfo.prach_CElevel_enable[0]==1){ - if ((eNB->prach_energy_counter == 100) && - (max_preamble_energy[0] > eNB->measurements.prach_I0 + 200)) { - eNB->UL_INFO.rach_ind_br.number_of_preambles++; - - eNB->preamble_list_br[ind].preamble_rel8.timing_advance = max_preamble_delay[ind];// - eNB->preamble_list_br[ind].preamble_rel8.preamble = max_preamble[ind]; - // note: fid is implicitly 0 here, this is the rule for eMTC RA-RNTI from 36.321, Section 5.1.4 - eNB->preamble_list_br[ind].preamble_rel8.rnti = 1+subframe+(eNB->prach_vars_br.first_frame[ce_level]%40); - eNB->preamble_list_br[ind].instance_length = 0; //don't know exactly what this is - eNB->preamble_list_br[ind].preamble_rel13.rach_resource_type = 1+ce_level; // CE Level - LOG_D(PHY,"Filling NFAPI indication for RACH %d CELevel %d (mask %x) : TA %d, Preamble %d, rnti %x, rach_resource_type %d\n", - ind, - ce_level, - prach_mask, - eNB->preamble_list_br[ind].preamble_rel8.timing_advance, - eNB->preamble_list_br[ind].preamble_rel8.preamble, - eNB->preamble_list_br[ind].preamble_rel8.rnti, - eNB->preamble_list_br[ind].preamble_rel13.rach_resource_type); + */ + + if (eNB->frame_parms.prach_emtc_config_common.prach_ConfigInfo.prach_CElevel_enable[0] == 1) { + if ((eNB->prach_energy_counter == 100) && (max_preamble_energy[0] > eNB->measurements.prach_I0 + 200)) { + eNB->UL_INFO.rach_ind_br.number_of_preambles++; + + eNB->preamble_list_br[ind].preamble_rel8.timing_advance = max_preamble_delay[ind]; // + eNB->preamble_list_br[ind].preamble_rel8.preamble = max_preamble[ind]; + // note: fid is implicitly 0 here, this is the rule for eMTC RA-RNTI from 36.321, Section 5.1.4 + eNB->preamble_list_br[ind].preamble_rel8.rnti = 1 + subframe + (eNB->prach_vars_br.first_frame[ce_level] % 40); + eNB->preamble_list_br[ind].instance_length = 0; //don't know exactly what this is + eNB->preamble_list_br[ind].preamble_rel13.rach_resource_type = 1 + ce_level; // CE Level + LOG_D (PHY, "Filling NFAPI indication for RACH %d CELevel %d (mask %x) : TA %d, Preamble %d, rnti %x, rach_resource_type %d\n", + ind, + ce_level, + prach_mask, + eNB->preamble_list_br[ind].preamble_rel8.timing_advance, + eNB->preamble_list_br[ind].preamble_rel8.preamble, eNB->preamble_list_br[ind].preamble_rel8.rnti, eNB->preamble_list_br[ind].preamble_rel13.rach_resource_type); } /* - ind++; - } - } */// ce_level + ind++; + } + } */// ce_level } - } - else + } else #endif - { - if ((eNB->prach_energy_counter == 100) && - (max_preamble_energy[0] > eNB->measurements.prach_I0+200)) { + { + if ((eNB->prach_energy_counter == 100) && (max_preamble_energy[0] > eNB->measurements.prach_I0 + 200)) { - LOG_D(PHY,"[eNB %d/%d][RAPROC] Frame %d, subframe %d Initiating RA procedure with preamble %d, energy %d.%d dB, delay %d\n", - eNB->Mod_id, - eNB->CC_id, - frame, - subframe, - max_preamble[0], - max_preamble_energy[0]/10, - max_preamble_energy[0]%10, - max_preamble_delay[0]); - - T(T_ENB_PHY_INITIATE_RA_PROCEDURE, T_INT(eNB->Mod_id), T_INT(frame), T_INT(subframe), - T_INT(max_preamble[0]), T_INT(max_preamble_energy[0]), T_INT(max_preamble_delay[0])); - - pthread_mutex_lock(&eNB->UL_INFO_mutex); - - eNB->UL_INFO.rach_ind.number_of_preambles = 1; - eNB->UL_INFO.rach_ind.preamble_list = eNB->preamble_list; - - eNB->preamble_list[0].preamble_rel8.timing_advance = max_preamble_delay[0]; - eNB->preamble_list[0].preamble_rel8.preamble = max_preamble[0]; - eNB->preamble_list[0].preamble_rel8.rnti = 1+subframe; // note: fid is implicitly 0 here - eNB->preamble_list[0].preamble_rel13.rach_resource_type = 0; - eNB->preamble_list[0].instance_length = 0; //don't know exactly what this is - - LOG_D(PHY,"Filling NFAPI indication for RACH : TA %d, Preamble %d, rnti %x, rach_resource_type %d\n", - eNB->preamble_list[0].preamble_rel8.timing_advance, - eNB->preamble_list[0].preamble_rel8.preamble, - eNB->preamble_list[0].preamble_rel8.rnti, - eNB->preamble_list[0].preamble_rel13.rach_resource_type); - pthread_mutex_unlock(&eNB->UL_INFO_mutex); - - } // max_preamble_energy > prach_I0 + 100 - else { - eNB->measurements.prach_I0 = ((eNB->measurements.prach_I0*900)>>10) + ((max_preamble_energy[0]*124)>>10); - if (frame==0) LOG_I(PHY,"prach_I0 = %d.%d dB\n",eNB->measurements.prach_I0/10,eNB->measurements.prach_I0%10); - if (eNB->prach_energy_counter < 100) eNB->prach_energy_counter++; - } - } // else br_flag + LOG_D (PHY, "[eNB %d/%d][RAPROC] Frame %d, subframe %d Initiating RA procedure with preamble %d, energy %d.%d dB, delay %d\n", + eNB->Mod_id, eNB->CC_id, frame, subframe, max_preamble[0], max_preamble_energy[0] / 10, max_preamble_energy[0] % 10, max_preamble_delay[0]); - VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_ENB_PRACH_RX,0); + T (T_ENB_PHY_INITIATE_RA_PROCEDURE, T_INT (eNB->Mod_id), T_INT (frame), T_INT (subframe), T_INT (max_preamble[0]), T_INT (max_preamble_energy[0]), T_INT (max_preamble_delay[0])); + + pthread_mutex_lock (&eNB->UL_INFO_mutex); + + eNB->UL_INFO.rach_ind.number_of_preambles = 1; + eNB->UL_INFO.rach_ind.preamble_list = eNB->preamble_list; + + eNB->preamble_list[0].preamble_rel8.timing_advance = max_preamble_delay[0]; + eNB->preamble_list[0].preamble_rel8.preamble = max_preamble[0]; + eNB->preamble_list[0].preamble_rel8.rnti = 1 + subframe; // note: fid is implicitly 0 here + eNB->preamble_list[0].preamble_rel13.rach_resource_type = 0; + eNB->preamble_list[0].instance_length = 0; //don't know exactly what this is + + LOG_D (PHY, "Filling NFAPI indication for RACH : TA %d, Preamble %d, rnti %x, rach_resource_type %d\n", + eNB->preamble_list[0].preamble_rel8.timing_advance, + eNB->preamble_list[0].preamble_rel8.preamble, eNB->preamble_list[0].preamble_rel8.rnti, eNB->preamble_list[0].preamble_rel13.rach_resource_type); + pthread_mutex_unlock (&eNB->UL_INFO_mutex); + + } // max_preamble_energy > prach_I0 + 100 + else { + eNB->measurements.prach_I0 = ((eNB->measurements.prach_I0 * 900) >> 10) + ((max_preamble_energy[0] * 124) >> 10); + if (frame == 0) + LOG_I (PHY, "prach_I0 = %d.%d dB\n", eNB->measurements.prach_I0 / 10, eNB->measurements.prach_I0 % 10); + if (eNB->prach_energy_counter < 100) + eNB->prach_energy_counter++; + } + } // else br_flag + + VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME (VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_ENB_PRACH_RX, 0); } -void srs_procedures(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc) { +void +srs_procedures (PHY_VARS_eNB * eNB, eNB_rxtx_proc_t * proc) +{ LTE_DL_FRAME_PARMS *fp = &eNB->frame_parms; - const int subframe = proc->subframe_rx; - const int frame = proc->frame_rx; + const int subframe = proc->subframe_rx; + const int frame = proc->frame_rx; - int i; + int i; - if (is_srs_occasion_common(fp,frame,subframe)) { - - // Do SRS processing - // check if there is SRS and we have to use shortened format - // TODO: check for exceptions in transmission of SRS together with ACK/NACK - for (i=0;isoundingrs_ul_config_dedicated[i].active==1) { + // Do SRS processing + // check if there is SRS and we have to use shortened format + // TODO: check for exceptions in transmission of SRS together with ACK/NACK + for (i = 0; i < NUMBER_OF_UE_MAX; i++) { - - if (lte_srs_channel_estimation(fp, - &eNB->common_vars, - &eNB->srs_vars[i], - &eNB->soundingrs_ul_config_dedicated[i], - subframe, - 0/*eNB_id*/)) { - LOG_E(PHY,"problem processing SRS\n"); - } - eNB->soundingrs_ul_config_dedicated[i].active=0; + if (eNB->soundingrs_ul_config_dedicated[i].active == 1) { + + + if (lte_srs_channel_estimation (fp, &eNB->common_vars, &eNB->srs_vars[i], &eNB->soundingrs_ul_config_dedicated[i], subframe, 0 /*eNB_id */ )) { + LOG_E (PHY, "problem processing SRS\n"); + } + eNB->soundingrs_ul_config_dedicated[i].active = 0; } } } } -void fill_sr_indication(PHY_VARS_eNB *eNB,uint16_t rnti,int frame,int subframe,uint32_t stat) { - - pthread_mutex_lock(&eNB->UL_INFO_mutex); - nfapi_sr_indication_pdu_t *pdu = &eNB->UL_INFO.sr_ind.sr_pdu_list[eNB->UL_INFO.sr_ind.number_of_srs]; +void +fill_sr_indication (PHY_VARS_eNB * eNB, uint16_t rnti, int frame, int subframe, uint32_t stat) +{ - pdu->instance_length = 0; // don't know what to do with this + pthread_mutex_lock (&eNB->UL_INFO_mutex); + nfapi_sr_indication_pdu_t *pdu = &eNB->UL_INFO.sr_ind.sr_pdu_list[eNB->UL_INFO.sr_ind.number_of_srs]; + + pdu->instance_length = 0; // don't know what to do with this // pdu->rx_ue_information.handle = handle; - pdu->rx_ue_information.rnti = rnti; + pdu->rx_ue_information.rnti = rnti; - int SNRtimes10 = dB_fixed_times10(stat) - 10*max(eNB->measurements.n0_subband_power_tot_dB[0], - eNB->measurements.n0_subband_power_tot_dB[eNB->frame_parms.N_RB_UL-1]); + int SNRtimes10 = dB_fixed_times10 (stat) - 10 * max (eNB->measurements.n0_subband_power_tot_dB[0], + eNB->measurements.n0_subband_power_tot_dB[eNB->frame_parms.N_RB_UL - 1]); - if (SNRtimes10 < -640) pdu->ul_cqi_information.ul_cqi=0; - else if (SNRtimes10 > 635) pdu->ul_cqi_information.ul_cqi=255; - else pdu->ul_cqi_information.ul_cqi=(640+SNRtimes10)/5; + if (SNRtimes10 < -640) + pdu->ul_cqi_information.ul_cqi = 0; + else if (SNRtimes10 > 635) + pdu->ul_cqi_information.ul_cqi = 255; + else + pdu->ul_cqi_information.ul_cqi = (640 + SNRtimes10) / 5; pdu->ul_cqi_information.channel = 0; eNB->UL_INFO.sr_ind.number_of_srs++; - pthread_mutex_unlock(&eNB->UL_INFO_mutex); + pthread_mutex_unlock (&eNB->UL_INFO_mutex); } -void uci_procedures(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc) +void +uci_procedures (PHY_VARS_eNB * eNB, eNB_rxtx_proc_t * proc) { - LTE_DL_FRAME_PARMS *fp=&eNB->frame_parms; - uint8_t SR_payload = 0,pucch_b0b1[4][2]= {{0,0},{0,0},{0,0},{0,0}},harq_ack[4]={0,0,0,0}; - int32_t metric[4]={0,0,0,0},metric_SR=0,max_metric; - const int subframe = proc->subframe_rx; - const int frame = proc->frame_rx; - int i; - LTE_eNB_UCI *uci; - uint16_t tdd_multiplexing_mask=0; - int res; + LTE_DL_FRAME_PARMS *fp = &eNB->frame_parms; + uint8_t SR_payload = 0, pucch_b0b1[4][2] = { {0, 0}, {0, 0}, {0, 0}, {0, 0} }, harq_ack[4] = { + 0, 0, 0, 0}; + int32_t metric[4] = { 0, 0, 0, 0 }, metric_SR = 0, max_metric; + const int subframe = proc->subframe_rx; + const int frame = proc->frame_rx; + int i; + LTE_eNB_UCI *uci; + uint16_t tdd_multiplexing_mask = 0; + int res; - for (i=0;iuci_vars[i]; - if ((uci->active == 1) && - (uci->frame == frame) && - (uci->subframe == subframe)) { + if ((uci->active == 1) && (uci->frame == frame) && (uci->subframe == subframe)) { - LOG_D(PHY,"Frame %d, subframe %d: Running uci procedures (type %d) for %d \n",frame,subframe,uci->type,i); - uci->active=0; + LOG_D (PHY, "Frame %d, subframe %d: Running uci procedures (type %d) for %d \n", frame, subframe, uci->type, i); + uci->active = 0; // Null out PUCCH PRBs for noise measurement - switch(fp->N_RB_UL) { + switch (fp->N_RB_UL) { case 6: - eNB->rb_mask_ul[0] |= (0x1 | (1<<5)); //position 5 + eNB->rb_mask_ul[0] |= (0x1 | (1 << 5)); //position 5 break; case 15: - eNB->rb_mask_ul[0] |= (0x1 | (1<<14)); // position 14 + eNB->rb_mask_ul[0] |= (0x1 | (1 << 14)); // position 14 break; case 25: - eNB->rb_mask_ul[0] |= (0x1 | (1<<24)); // position 24 + eNB->rb_mask_ul[0] |= (0x1 | (1 << 24)); // position 24 break; case 50: eNB->rb_mask_ul[0] |= 0x1; - eNB->rb_mask_ul[1] |= (1<<17); // position 49 (49-32) + eNB->rb_mask_ul[1] |= (1 << 17); // position 49 (49-32) break; case 75: eNB->rb_mask_ul[0] |= 0x1; - eNB->rb_mask_ul[2] |= (1<<10); // position 74 (74-64) + eNB->rb_mask_ul[2] |= (1 << 10); // position 74 (74-64) break; case 100: eNB->rb_mask_ul[0] |= 0x1; - eNB->rb_mask_ul[3] |= (1<<3); // position 99 (99-96) + eNB->rb_mask_ul[3] |= (1 << 3); // position 99 (99-96) break; default: - LOG_E(PHY,"Unknown number for N_RB_UL %d\n",fp->N_RB_UL); + LOG_E (PHY, "Unknown number for N_RB_UL %d\n", fp->N_RB_UL); break; } switch (uci->type) { case SR: case HARQ_SR: - - metric_SR = rx_pucch(eNB, - uci->pucch_fmt, - i, - uci->n_pucch_1_0_sr[0], - 0, // n2_pucch - uci->srs_active, // shortened format - &SR_payload, - frame, - subframe, - PUCCH1_THRES); - LOG_D(PHY,"[eNB %d][SR %x] Frame %d subframe %d Checking SR is %d (SR n1pucch is %d)\n", - eNB->Mod_id, - uci->rnti, - frame, - subframe, - SR_payload, - uci->n_pucch_1_0_sr[0]); - if (uci->type == SR) { - if (SR_payload == 1) { - fill_sr_indication(eNB,uci->rnti,frame,subframe,metric_SR); - return; - } - else { - return; - } - } + + metric_SR = rx_pucch (eNB, uci->pucch_fmt, i, uci->n_pucch_1_0_sr[0], 0, // n2_pucch + uci->srs_active, // shortened format + &SR_payload, frame, subframe, PUCCH1_THRES); + LOG_D (PHY, "[eNB %d][SR %x] Frame %d subframe %d Checking SR is %d (SR n1pucch is %d)\n", eNB->Mod_id, uci->rnti, frame, subframe, SR_payload, uci->n_pucch_1_0_sr[0]); + if (uci->type == SR) { + if (SR_payload == 1) { + fill_sr_indication (eNB, uci->rnti, frame, subframe, metric_SR); + return; + } else { + return; + } + } case HARQ: - if (fp->frame_type == FDD) { - LOG_D(PHY,"Frame %d Subframe %d Demodulating PUCCH (UCI %d) for ACK/NAK (uci->pucch_fmt %d,uci->type %d.uci->frame %d, uci->subframe %d): n1_pucch0 %d SR_payload %d\n", - frame,subframe,i, - uci->pucch_fmt,uci->type, - uci->frame,uci->subframe,uci->n_pucch_1[0][0], - SR_payload); - - metric[0] = rx_pucch(eNB, - uci->pucch_fmt, - i, - uci->n_pucch_1[0][0], - 0, //n2_pucch - uci->srs_active, // shortened format - pucch_b0b1[0], - frame, - subframe, - PUCCH1a_THRES); - - - /* cancel SR detection if reception on n1_pucch0 is better than on SR PUCCH resource index, otherwise send it up to MAC */ - if (uci->type==HARQ_SR && metric[0] > metric_SR) SR_payload = 0; - else if (SR_payload == 1) fill_sr_indication(eNB,uci->rnti,frame,subframe,metric_SR); - - if (uci->type==HARQ_SR && metric[0] <= metric_SR) { - /* when transmitting ACK/NACK on SR PUCCH resource index, SR payload is always 1 */ - SR_payload = 1; - - metric[0]=rx_pucch(eNB, - uci->pucch_fmt, - i, - uci->n_pucch_1_0_sr[0], - 0, //n2_pucch - uci->srs_active, // shortened format - pucch_b0b1[0], - frame, - subframe, - PUCCH1a_THRES); - } - + if (fp->frame_type == FDD) { + LOG_D (PHY, "Frame %d Subframe %d Demodulating PUCCH (UCI %d) for ACK/NAK (uci->pucch_fmt %d,uci->type %d.uci->frame %d, uci->subframe %d): n1_pucch0 %d SR_payload %d\n", + frame, subframe, i, uci->pucch_fmt, uci->type, uci->frame, uci->subframe, uci->n_pucch_1[0][0], SR_payload); - LOG_D(PHY,"[eNB %d][PDSCH %x] Frame %d subframe %d pucch1a (FDD) payload %d (metric %d)\n", - eNB->Mod_id, - uci->rnti, - frame,subframe, - pucch_b0b1[0][0],metric[0]); - - uci->stat = metric[0]; - fill_uci_harq_indication(eNB,uci,frame,subframe,pucch_b0b1[0],0,0xffff); - - } - else { // frame_type == TDD + metric[0] = rx_pucch (eNB, uci->pucch_fmt, i, uci->n_pucch_1[0][0], 0, //n2_pucch + uci->srs_active, // shortened format + pucch_b0b1[0], frame, subframe, PUCCH1a_THRES); - // if SR was detected, use the n1_pucch from SR - if (SR_payload==1) { + /* cancel SR detection if reception on n1_pucch0 is better than on SR PUCCH resource index, otherwise send it up to MAC */ + if (uci->type == HARQ_SR && metric[0] > metric_SR) + SR_payload = 0; + else if (SR_payload == 1) + fill_sr_indication (eNB, uci->rnti, frame, subframe, metric_SR); + + if (uci->type == HARQ_SR && metric[0] <= metric_SR) { + /* when transmitting ACK/NACK on SR PUCCH resource index, SR payload is always 1 */ + SR_payload = 1; + + metric[0] = rx_pucch (eNB, uci->pucch_fmt, i, uci->n_pucch_1_0_sr[0], 0, //n2_pucch + uci->srs_active, // shortened format + pucch_b0b1[0], frame, subframe, PUCCH1a_THRES); + } + + + LOG_D (PHY, "[eNB %d][PDSCH %x] Frame %d subframe %d pucch1a (FDD) payload %d (metric %d)\n", eNB->Mod_id, uci->rnti, frame, subframe, pucch_b0b1[0][0], metric[0]); + + uci->stat = metric[0]; + fill_uci_harq_indication (eNB, uci, frame, subframe, pucch_b0b1[0], 0, 0xffff); + + } else { // frame_type == TDD + + + // if SR was detected, use the n1_pucch from SR + if (SR_payload == 1) { #ifdef DEBUG_PHY_PROC - LOG_D(PHY,"[eNB %d][PDSCH %x] Frame %d subframe %d Checking ACK/NAK (%d,%d,%d,%d) format %d with SR\n",eNB->Mod_id, - eNB->dlsch[UE_id][0]->rnti, - frame,subframe, - n1_pucch0,n1_pucch1,n1_pucch2,n1_pucch3,format); + LOG_D (PHY, "[eNB %d][PDSCH %x] Frame %d subframe %d Checking ACK/NAK (%d,%d,%d,%d) format %d with SR\n", eNB->Mod_id, + eNB->dlsch[UE_id][0]->rnti, frame, subframe, n1_pucch0, n1_pucch1, n1_pucch2, n1_pucch3, format); #endif - - metric[0] = rx_pucch(eNB, - pucch_format1b, - i, - uci->n_pucch_1_0_sr[0], - 0, //n2_pucch - uci->srs_active, // shortened format - pucch_b0b1[0], - frame, - subframe, - PUCCH1a_THRES); - } else { //using assigned pucch resources + + metric[0] = rx_pucch (eNB, pucch_format1b, i, uci->n_pucch_1_0_sr[0], 0, //n2_pucch + uci->srs_active, // shortened format + pucch_b0b1[0], frame, subframe, PUCCH1a_THRES); + } else { //using assigned pucch resources #ifdef DEBUG_PHY_PROC - LOG_D(PHY,"[eNB %d][PDSCH %x] Frame %d subframe %d Checking ACK/NAK M=%d (%d,%d,%d,%d) format %d\n",eNB->Mod_id, - eNB->dlsch[UE_id][0]->rnti, - frame,subframe, - uci->num_pucch_resources, - uci->n_pucch_1[res][0], - uci->n_pucch_1[res][1], - uci->n_pucch_1[res][2], - uci->n_pucch_1[res][3], - uci->pucch_fmt); + LOG_D (PHY, "[eNB %d][PDSCH %x] Frame %d subframe %d Checking ACK/NAK M=%d (%d,%d,%d,%d) format %d\n", eNB->Mod_id, + eNB->dlsch[UE_id][0]->rnti, + frame, subframe, uci->num_pucch_resources, uci->n_pucch_1[res][0], uci->n_pucch_1[res][1], uci->n_pucch_1[res][2], uci->n_pucch_1[res][3], uci->pucch_fmt); #endif - for (res=0;resnum_pucch_resources;res++) - metric[res] = rx_pucch(eNB, - uci->pucch_fmt, - i, - uci->n_pucch_1[res][0], - 0, // n2_pucch - uci->srs_active, // shortened format - pucch_b0b1[res], - frame, - subframe, - PUCCH1a_THRES); - - + for (res = 0; res < uci->num_pucch_resources; res++) + metric[res] = rx_pucch (eNB, uci->pucch_fmt, i, uci->n_pucch_1[res][0], 0, // n2_pucch + uci->srs_active, // shortened format + pucch_b0b1[res], frame, subframe, PUCCH1a_THRES); - } - - if (SR_payload == 1) { // this implements Table 7.3.1 from 36.213 - if (pucch_b0b1[0][0] == 4) { // there isn't a likely transmission - harq_ack[0] = 4; // DTX - } - else if (pucch_b0b1[1][0] == 1 && pucch_b0b1[1][1] == 1) { // 1/4/7 ACKs - harq_ack[0] = 1; - } - else if (pucch_b0b1[1][0] == 1 && pucch_b0b1[1][1] != 1) { // 2/5/8 ACKs - harq_ack[0] = 2; - } - else if (pucch_b0b1[1][0] != 1 && pucch_b0b1[1][1] == 1) { // 3/6/9 ACKs - harq_ack[0] = 3; - } - else if (pucch_b0b1[1][0] != 1 && pucch_b0b1[1][1] != 1) { // 0 ACKs, or at least one DL assignment missed - harq_ack[0] = 0; - } - uci->stat = metric[0]; - fill_uci_harq_indication(eNB,uci,frame,subframe,harq_ack,2,0xffff); // special_bundling mode - } - else if ((uci->tdd_bundling == 0) && (uci->num_pucch_resources==2)){ // multiplexing + no SR, implement Table 10.1.3-5 (Rel14) for multiplexing with M=2 - if (pucch_b0b1[0][0] == 4 || - pucch_b0b1[1][0] == 4) { // there isn't a likely transmission - harq_ack[0] = 4; // DTX - harq_ack[1] = 6; // NACK/DTX - } - else { - if (metric[1]>metric[0]) { - if (pucch_b0b1[1][0] == 1 && pucch_b0b1[1][1] != 1){ - harq_ack[0] = 1; // ACK - harq_ack[1] = 1; // ACK - tdd_multiplexing_mask = 0x3; - } - else if (pucch_b0b1[1][0] != 1 && pucch_b0b1[1][1] == 1){ - harq_ack[0] = 6; // NACK/DTX - harq_ack[1] = 1; // ACK - tdd_multiplexing_mask = 0x2; - } - else { - harq_ack[0] = 4; // DTX - harq_ack[1] = 4; // DTX - } - } - else { - if (pucch_b0b1[0][0] == 1 && pucch_b0b1[0][1] == 1){ - harq_ack[0] = 1; // ACK - harq_ack[1] = 6; // NACK/DTX - tdd_multiplexing_mask = 0x1; - } - else if (pucch_b0b1[0][0] != 1 && pucch_b0b1[0][1] != 1){ - harq_ack[0] = 2; // NACK - harq_ack[1] = 6; // NACK/DTX - } - else { - harq_ack[0] = 4; // DTX - harq_ack[1] = 4; // DTX - } - } - } - uci->stat = max(metric[0],metric[1]); - fill_uci_harq_indication(eNB,uci,frame,subframe,harq_ack,1,tdd_multiplexing_mask); // multiplexing mode - } //else if ((uci->tdd_bundling == 0) && (res==2)) - else if ((uci->tdd_bundling == 0) && (uci->num_pucch_resources==3)){ // multiplexing + no SR, implement Table 10.1.3-6 (Rel14) for multiplexing with M=3 - - if (harq_ack[0] == 4 || - harq_ack[1] == 4 || - harq_ack[2] == 4) { // there isn't a likely transmission - harq_ack[0] = 4; // DTX - harq_ack[1] = 6; // NACK/DTX - harq_ack[2] = 6; // NACK/DTX - - } - else { - - max_metric = max(metric[0],max(metric[1],metric[2])); - - if (metric[0]==max_metric) { - if (pucch_b0b1[0][0] == 1 && pucch_b0b1[0][1] == 1){ - harq_ack[0] = 1; // ACK - harq_ack[1] = 6; // NACK/DTX - harq_ack[2] = 6; // NACK/DTX - tdd_multiplexing_mask = 0x1; - } - else if (pucch_b0b1[0][0] != 1 && pucch_b0b1[0][1] != 1){ - harq_ack[0] = 2; // NACK - harq_ack[1] = 6; // NACK/DTX - harq_ack[2] = 6; // NACK/DTX - } - else { - harq_ack[0] = 4; // DTX - harq_ack[1] = 4; // DTX - harq_ack[2] = 4; // DTX - } - } // if (metric[0]==max_metric) { - else if (metric[1]==max_metric) { - - if (pucch_b0b1[1][0] == 1 && pucch_b0b1[1][1] != 1){ - harq_ack[0] = 1; // ACK - harq_ack[1] = 1; // ACK - harq_ack[2] = 6; // NACK/DTX - tdd_multiplexing_mask = 0x3; - } - else if (pucch_b0b1[1][0] != 1 && pucch_b0b1[1][1] == 1 ) { - harq_ack[0] = 6; // NACK/DTX - harq_ack[1] = 1; // ACK - harq_ack[2] = 6; // NACK/DTX - tdd_multiplexing_mask = 0x2; - } - else { - harq_ack[0] = 4; // DTX - harq_ack[1] = 4; // DTX - harq_ack[2] = 4; // DTX - } - } // if (metric[1]==max_metric) { - else { - if (pucch_b0b1[2][0] == 1 && pucch_b0b1[2][1] == 1){ - harq_ack[0] = 1; // ACK - harq_ack[1] = 1; // ACK - harq_ack[2] = 1; // ACK - tdd_multiplexing_mask = 0x7; - } - else if (pucch_b0b1[2][0] == 1 && pucch_b0b1[2][1] != 1 ) { - harq_ack[0] = 1; // ACK - harq_ack[1] = 6; // NACK/DTX - harq_ack[2] = 1; // ACK - tdd_multiplexing_mask = 0x5; - } - else if (pucch_b0b1[2][0] != 1 && pucch_b0b1[2][1] == 1 ) { - harq_ack[0] = 6; // NACK/DTX - harq_ack[1] = 1; // ACK - harq_ack[2] = 1; // ACK - tdd_multiplexing_mask = 0x6; - } - else if (pucch_b0b1[2][0] != 1 && pucch_b0b1[2][1] != 1 ) { - harq_ack[0] = 6; // NACK/DTX - harq_ack[1] = 6; // NACK/DTX - harq_ack[2] = 1; // ACK - tdd_multiplexing_mask = 0x4; - } - } + + } + + + if (SR_payload == 1) { // this implements Table 7.3.1 from 36.213 + if (pucch_b0b1[0][0] == 4) { // there isn't a likely transmission + harq_ack[0] = 4; // DTX + } else if (pucch_b0b1[1][0] == 1 && pucch_b0b1[1][1] == 1) { // 1/4/7 ACKs + harq_ack[0] = 1; + } else if (pucch_b0b1[1][0] == 1 && pucch_b0b1[1][1] != 1) { // 2/5/8 ACKs + harq_ack[0] = 2; + } else if (pucch_b0b1[1][0] != 1 && pucch_b0b1[1][1] == 1) { // 3/6/9 ACKs + harq_ack[0] = 3; + } else if (pucch_b0b1[1][0] != 1 && pucch_b0b1[1][1] != 1) { // 0 ACKs, or at least one DL assignment missed + harq_ack[0] = 0; + } + uci->stat = metric[0]; + fill_uci_harq_indication (eNB, uci, frame, subframe, harq_ack, 2, 0xffff); // special_bundling mode + } else if ((uci->tdd_bundling == 0) && (uci->num_pucch_resources == 2)) { // multiplexing + no SR, implement Table 10.1.3-5 (Rel14) for multiplexing with M=2 + if (pucch_b0b1[0][0] == 4 || pucch_b0b1[1][0] == 4) { // there isn't a likely transmission + harq_ack[0] = 4; // DTX + harq_ack[1] = 6; // NACK/DTX + } else { + if (metric[1] > metric[0]) { + if (pucch_b0b1[1][0] == 1 && pucch_b0b1[1][1] != 1) { + harq_ack[0] = 1; // ACK + harq_ack[1] = 1; // ACK + tdd_multiplexing_mask = 0x3; + } else if (pucch_b0b1[1][0] != 1 && pucch_b0b1[1][1] == 1) { + harq_ack[0] = 6; // NACK/DTX + harq_ack[1] = 1; // ACK + tdd_multiplexing_mask = 0x2; + } else { + harq_ack[0] = 4; // DTX + harq_ack[1] = 4; // DTX + } + } else { + if (pucch_b0b1[0][0] == 1 && pucch_b0b1[0][1] == 1) { + harq_ack[0] = 1; // ACK + harq_ack[1] = 6; // NACK/DTX + tdd_multiplexing_mask = 0x1; + } else if (pucch_b0b1[0][0] != 1 && pucch_b0b1[0][1] != 1) { + harq_ack[0] = 2; // NACK + harq_ack[1] = 6; // NACK/DTX + } else { + harq_ack[0] = 4; // DTX + harq_ack[1] = 4; // DTX + } + } + } + uci->stat = max (metric[0], metric[1]); + fill_uci_harq_indication (eNB, uci, frame, subframe, harq_ack, 1, tdd_multiplexing_mask); // multiplexing mode + } //else if ((uci->tdd_bundling == 0) && (res==2)) + else if ((uci->tdd_bundling == 0) && (uci->num_pucch_resources == 3)) { // multiplexing + no SR, implement Table 10.1.3-6 (Rel14) for multiplexing with M=3 + + if (harq_ack[0] == 4 || harq_ack[1] == 4 || harq_ack[2] == 4) { // there isn't a likely transmission + harq_ack[0] = 4; // DTX + harq_ack[1] = 6; // NACK/DTX + harq_ack[2] = 6; // NACK/DTX + + } else { + + max_metric = max (metric[0], max (metric[1], metric[2])); + + if (metric[0] == max_metric) { + if (pucch_b0b1[0][0] == 1 && pucch_b0b1[0][1] == 1) { + harq_ack[0] = 1; // ACK + harq_ack[1] = 6; // NACK/DTX + harq_ack[2] = 6; // NACK/DTX + tdd_multiplexing_mask = 0x1; + } else if (pucch_b0b1[0][0] != 1 && pucch_b0b1[0][1] != 1) { + harq_ack[0] = 2; // NACK + harq_ack[1] = 6; // NACK/DTX + harq_ack[2] = 6; // NACK/DTX + } else { + harq_ack[0] = 4; // DTX + harq_ack[1] = 4; // DTX + harq_ack[2] = 4; // DTX + } + } // if (metric[0]==max_metric) { + else if (metric[1] == max_metric) { + + if (pucch_b0b1[1][0] == 1 && pucch_b0b1[1][1] != 1) { + harq_ack[0] = 1; // ACK + harq_ack[1] = 1; // ACK + harq_ack[2] = 6; // NACK/DTX + tdd_multiplexing_mask = 0x3; + } else if (pucch_b0b1[1][0] != 1 && pucch_b0b1[1][1] == 1) { + harq_ack[0] = 6; // NACK/DTX + harq_ack[1] = 1; // ACK + harq_ack[2] = 6; // NACK/DTX + tdd_multiplexing_mask = 0x2; + } else { + harq_ack[0] = 4; // DTX + harq_ack[1] = 4; // DTX + harq_ack[2] = 4; // DTX + } + } // if (metric[1]==max_metric) { + else { + if (pucch_b0b1[2][0] == 1 && pucch_b0b1[2][1] == 1) { + harq_ack[0] = 1; // ACK + harq_ack[1] = 1; // ACK + harq_ack[2] = 1; // ACK + tdd_multiplexing_mask = 0x7; + } else if (pucch_b0b1[2][0] == 1 && pucch_b0b1[2][1] != 1) { + harq_ack[0] = 1; // ACK + harq_ack[1] = 6; // NACK/DTX + harq_ack[2] = 1; // ACK + tdd_multiplexing_mask = 0x5; + } else if (pucch_b0b1[2][0] != 1 && pucch_b0b1[2][1] == 1) { + harq_ack[0] = 6; // NACK/DTX + harq_ack[1] = 1; // ACK + harq_ack[2] = 1; // ACK + tdd_multiplexing_mask = 0x6; + } else if (pucch_b0b1[2][0] != 1 && pucch_b0b1[2][1] != 1) { + harq_ack[0] = 6; // NACK/DTX + harq_ack[1] = 6; // NACK/DTX + harq_ack[2] = 1; // ACK + tdd_multiplexing_mask = 0x4; + } + } + uci->stat = max_metric; + fill_uci_harq_indication (eNB, uci, frame, subframe, harq_ack, 1, tdd_multiplexing_mask); // multiplexing mode + } + } //else if ((uci->tdd_bundling == 0) && (res==3)) + else if ((uci->tdd_bundling == 0) && (uci->num_pucch_resources == 4)) { // multiplexing + no SR, implement Table 10.1.3-7 (Rel14) for multiplexing with M=4 + if (pucch_b0b1[0][0] == 4 || pucch_b0b1[1][0] == 4 || pucch_b0b1[2][0] == 4 || pucch_b0b1[3][0] == 4) { // there isn't a likely transmission + harq_ack[0] = 4; // DTX + harq_ack[1] = 6; // NACK/DTX + harq_ack[2] = 6; // NACK/DTX + harq_ack[3] = 6; // NACK/DTX + + } else { + + max_metric = max (metric[0], max (metric[1], max (metric[2], metric[3]))); + + if (metric[0] == max_metric) { + if (pucch_b0b1[0][0] == 1 && pucch_b0b1[0][1] != 1) { + harq_ack[0] = 2; // NACK + harq_ack[1] = 4; // DTX + harq_ack[2] = 4; // DTX + harq_ack[3] = 4; // DTX + } else if (pucch_b0b1[0][0] != 1 && pucch_b0b1[0][1] == 1) { + harq_ack[0] = 1; // ACK + harq_ack[1] = 6; // NACK/DTX + harq_ack[2] = 6; // NACK/DTX + harq_ack[3] = 1; // ACK + tdd_multiplexing_mask = 0x9; + } else if (pucch_b0b1[0][0] == 1 && pucch_b0b1[0][1] == 1) { + harq_ack[0] = 1; // ACK + harq_ack[1] = 6; // NACK/DTX + harq_ack[2] = 6; // NACK/DTX + harq_ack[3] = 6; // NACK/DTX + tdd_multiplexing_mask = 0x1; + } else if (pucch_b0b1[0][0] != 1 && pucch_b0b1[0][1] != 1) { + harq_ack[0] = 2; // NACK + harq_ack[1] = 6; // NACK/DTX + harq_ack[2] = 6; // NACK/DTX + harq_ack[3] = 6; // NACK/DTX + } + + } else if (metric[1] == max_metric) { + if (pucch_b0b1[1][0] == 1 && pucch_b0b1[1][1] == 1) { + harq_ack[0] = 1; // ACK + harq_ack[1] = 1; // ACK + harq_ack[2] = 1; // ACK + harq_ack[3] = 1; // ACK + tdd_multiplexing_mask = 0xF; + } else if (pucch_b0b1[1][0] == 1 && pucch_b0b1[1][1] != 1) { + harq_ack[0] = 1; // ACK + harq_ack[1] = 1; // ACK + harq_ack[2] = 6; // NACK/DTX + harq_ack[3] = 6; // NACK/DTX + tdd_multiplexing_mask = 0x3; + } else if (pucch_b0b1[1][0] != 1 && pucch_b0b1[1][1] != 1) { + harq_ack[0] = 6; // NACK/DTX + harq_ack[1] = 1; // ACK + harq_ack[2] = 1; // ACK + harq_ack[3] = 1; // ACK + tdd_multiplexing_mask = 0xE; + } else if (pucch_b0b1[1][0] != 1 && pucch_b0b1[1][1] == 1) { + harq_ack[0] = 6; // NACK/DTX + harq_ack[1] = 1; // ACK + harq_ack[2] = 6; // NACK/DTX + harq_ack[3] = 6; // NACK/DTX + tdd_multiplexing_mask = 0x2; + } + } else if (metric[2] == max_metric) { + if (pucch_b0b1[2][0] == 1 && pucch_b0b1[2][1] == 1) { + harq_ack[0] = 1; // ACK + harq_ack[1] = 1; // ACK + harq_ack[2] = 1; // ACK + harq_ack[3] = 6; // NACK/DTX + tdd_multiplexing_mask = 0x7; + } else if (pucch_b0b1[2][0] == 1 && pucch_b0b1[2][1] != 1) { + harq_ack[0] = 1; // ACK + harq_ack[1] = 6; // NACK/DTX + harq_ack[2] = 1; // ACK + harq_ack[3] = 6; // NACK/DTX + tdd_multiplexing_mask = 0x5; + } else if (pucch_b0b1[2][0] != 1 && pucch_b0b1[2][1] == 1) { + harq_ack[0] = 4; // NACK/DTX + harq_ack[1] = 1; // ACK + harq_ack[2] = 1; // ACK + harq_ack[3] = 4; // NACK/DTX + tdd_multiplexing_mask = 0x6; + } else if (pucch_b0b1[2][0] != 1 && pucch_b0b1[2][1] != 1) { + harq_ack[0] = 4; // NACK/DTX + harq_ack[1] = 4; // NACK/DTX + harq_ack[2] = 1; // ACK + harq_ack[3] = 4; // NACK/DTX + tdd_multiplexing_mask = 0x4; + } + } else { // max_metric[3]=max_metric + if (pucch_b0b1[2][0] == 1 && pucch_b0b1[2][1] == 1) { + harq_ack[0] = 1; // ACK + harq_ack[1] = 6; // NACK/DTX + harq_ack[2] = 1; // ACK + harq_ack[3] = 1; // ACK + tdd_multiplexing_mask = 0xD; + } else if (pucch_b0b1[2][0] == 1 && pucch_b0b1[2][1] != 1) { + harq_ack[0] = 6; // NACK/DTX + harq_ack[1] = 1; // ACK + harq_ack[2] = 6; // NACK/DTX + harq_ack[3] = 1; // ACK + tdd_multiplexing_mask = 0xA; + } else if (pucch_b0b1[2][0] != 1 && pucch_b0b1[2][1] == 1) { + harq_ack[0] = 6; // NACK/DTX + harq_ack[1] = 6; // NACK/DTX + harq_ack[2] = 1; // ACK + harq_ack[3] = 1; // ACK + tdd_multiplexing_mask = 0xC; + } else if (pucch_b0b1[2][0] != 1 && pucch_b0b1[2][1] != 1) { + harq_ack[0] = 6; // NACK/DTX + harq_ack[1] = 6; // NACK/DTX + harq_ack[2] = 6; // NACK/DTX + harq_ack[3] = 1; // ACK + tdd_multiplexing_mask = 0x8; + } + } + } uci->stat = max_metric; - fill_uci_harq_indication(eNB,uci,frame,subframe,harq_ack,1,tdd_multiplexing_mask); // multiplexing mode - } - } //else if ((uci->tdd_bundling == 0) && (res==3)) - else if ((uci->tdd_bundling == 0) && (uci->num_pucch_resources==4)){ // multiplexing + no SR, implement Table 10.1.3-7 (Rel14) for multiplexing with M=4 - if (pucch_b0b1[0][0] == 4 || - pucch_b0b1[1][0] == 4 || - pucch_b0b1[2][0] == 4 || - pucch_b0b1[3][0] == 4) { // there isn't a likely transmission - harq_ack[0] = 4; // DTX - harq_ack[1] = 6; // NACK/DTX - harq_ack[2] = 6; // NACK/DTX - harq_ack[3] = 6; // NACK/DTX - - } else { + fill_uci_harq_indication (eNB, uci, frame, subframe, harq_ack, 1, tdd_multiplexing_mask); // multiplexing mode + } // else if ((uci->tdd_bundling == 0) && (res==4)) + else { // bundling + harq_ack[0] = pucch_b0b1[0][0]; + harq_ack[1] = pucch_b0b1[0][1]; + uci->stat = metric[0]; + fill_uci_harq_indication (eNB, uci, frame, subframe, harq_ack, 0, 0xffff); // special_bundling mode + } - max_metric = max(metric[0],max(metric[1],max(metric[2],metric[3]))); - - if (metric[0]==max_metric) { - if (pucch_b0b1[0][0] == 1 && pucch_b0b1[0][1] != 1){ - harq_ack[0] = 2; // NACK - harq_ack[1] = 4; // DTX - harq_ack[2] = 4; // DTX - harq_ack[3] = 4; // DTX - } - else if (pucch_b0b1[0][0] != 1 && pucch_b0b1[0][1] == 1){ - harq_ack[0] = 1; // ACK - harq_ack[1] = 6; // NACK/DTX - harq_ack[2] = 6; // NACK/DTX - harq_ack[3] = 1; // ACK - tdd_multiplexing_mask = 0x9; - } - else if (pucch_b0b1[0][0] == 1 && pucch_b0b1[0][1] == 1){ - harq_ack[0] = 1; // ACK - harq_ack[1] = 6; // NACK/DTX - harq_ack[2] = 6; // NACK/DTX - harq_ack[3] = 6; // NACK/DTX - tdd_multiplexing_mask = 0x1; - } - else if (pucch_b0b1[0][0] != 1 && pucch_b0b1[0][1] != 1){ - harq_ack[0] = 2; // NACK - harq_ack[1] = 6; // NACK/DTX - harq_ack[2] = 6; // NACK/DTX - harq_ack[3] = 6; // NACK/DTX - } - - } - else if (metric[1]==max_metric) { - if (pucch_b0b1[1][0] == 1 && pucch_b0b1[1][1] == 1){ - harq_ack[0] = 1; // ACK - harq_ack[1] = 1; // ACK - harq_ack[2] = 1; // ACK - harq_ack[3] = 1; // ACK - tdd_multiplexing_mask = 0xF; - } - else if (pucch_b0b1[1][0] == 1 && pucch_b0b1[1][1] != 1 ) { - harq_ack[0] = 1; // ACK - harq_ack[1] = 1; // ACK - harq_ack[2] = 6; // NACK/DTX - harq_ack[3] = 6; // NACK/DTX - tdd_multiplexing_mask = 0x3; - } - else if (pucch_b0b1[1][0] != 1 && pucch_b0b1[1][1] != 1 ) { - harq_ack[0] = 6; // NACK/DTX - harq_ack[1] = 1; // ACK - harq_ack[2] = 1; // ACK - harq_ack[3] = 1; // ACK - tdd_multiplexing_mask = 0xE; - } - else if (pucch_b0b1[1][0] != 1 && pucch_b0b1[1][1] == 1 ) { - harq_ack[0] = 6; // NACK/DTX - harq_ack[1] = 1; // ACK - harq_ack[2] = 6; // NACK/DTX - harq_ack[3] = 6; // NACK/DTX - tdd_multiplexing_mask = 0x2; - } - } - else if (metric[2]==max_metric) { - if (pucch_b0b1[2][0] == 1 && pucch_b0b1[2][1] == 1){ - harq_ack[0] = 1; // ACK - harq_ack[1] = 1; // ACK - harq_ack[2] = 1; // ACK - harq_ack[3] = 6; // NACK/DTX - tdd_multiplexing_mask = 0x7; - } - else if (pucch_b0b1[2][0] == 1 && pucch_b0b1[2][1] != 1 ) { - harq_ack[0] = 1; // ACK - harq_ack[1] = 6; // NACK/DTX - harq_ack[2] = 1; // ACK - harq_ack[3] = 6; // NACK/DTX - tdd_multiplexing_mask = 0x5; - } - else if (pucch_b0b1[2][0] != 1 && pucch_b0b1[2][1] == 1 ) { - harq_ack[0] = 4; // NACK/DTX - harq_ack[1] = 1; // ACK - harq_ack[2] = 1; // ACK - harq_ack[3] = 4; // NACK/DTX - tdd_multiplexing_mask = 0x6; - } - else if (pucch_b0b1[2][0] != 1 && pucch_b0b1[2][1] != 1 ) { - harq_ack[0] = 4; // NACK/DTX - harq_ack[1] = 4; // NACK/DTX - harq_ack[2] = 1; // ACK - harq_ack[3] = 4; // NACK/DTX - tdd_multiplexing_mask = 0x4; - } - } - else { // max_metric[3]=max_metric - if (pucch_b0b1[2][0] == 1 && pucch_b0b1[2][1] == 1){ - harq_ack[0] = 1; // ACK - harq_ack[1] = 6; // NACK/DTX - harq_ack[2] = 1; // ACK - harq_ack[3] = 1; // ACK - tdd_multiplexing_mask = 0xD; - } - else if (pucch_b0b1[2][0] == 1 && pucch_b0b1[2][1] != 1 ) { - harq_ack[0] = 6; // NACK/DTX - harq_ack[1] = 1; // ACK - harq_ack[2] = 6; // NACK/DTX - harq_ack[3] = 1; // ACK - tdd_multiplexing_mask = 0xA; - } - else if (pucch_b0b1[2][0] != 1 && pucch_b0b1[2][1] == 1 ) { - harq_ack[0] = 6; // NACK/DTX - harq_ack[1] = 6; // NACK/DTX - harq_ack[2] = 1; // ACK - harq_ack[3] = 1; // ACK - tdd_multiplexing_mask = 0xC; - } - else if (pucch_b0b1[2][0] != 1 && pucch_b0b1[2][1] != 1 ) { - harq_ack[0] = 6; // NACK/DTX - harq_ack[1] = 6; // NACK/DTX - harq_ack[2] = 6; // NACK/DTX - harq_ack[3] = 1; // ACK - tdd_multiplexing_mask = 0x8; - } - } - } - uci->stat = max_metric; - fill_uci_harq_indication(eNB,uci,frame,subframe,harq_ack,1,tdd_multiplexing_mask); // multiplexing mode - } // else if ((uci->tdd_bundling == 0) && (res==4)) - else { // bundling - harq_ack[0] = pucch_b0b1[0][0]; - harq_ack[1] = pucch_b0b1[0][1]; - uci->stat = metric[0]; - fill_uci_harq_indication(eNB,uci,frame,subframe,harq_ack,0,0xffff); // special_bundling mode - } - #ifdef DEBUG_PHY_PROC - LOG_D(PHY,"[eNB %d][PDSCH %x] Frame %d subframe %d ACK/NAK metric 0 %d, metric 1 %d, (%d,%d)\n",eNB->Mod_id, - eNB->dlsch[UE_id][0]->rnti, - frame,subframe, - metric0,metric1,pucch_b0b1[0],pucch_b0b1[1]); + LOG_D (PHY, "[eNB %d][PDSCH %x] Frame %d subframe %d ACK/NAK metric 0 %d, metric 1 %d, (%d,%d)\n", eNB->Mod_id, + eNB->dlsch[UE_id][0]->rnti, frame, subframe, metric0, metric1, pucch_b0b1[0], pucch_b0b1[1]); #endif - } - break; + } + break; default: - AssertFatal(1==0,"Unsupported UCI type %d\n",uci->type); - break; + AssertFatal (1 == 0, "Unsupported UCI type %d\n", uci->type); + break; } - + if (SR_payload == 1) { - LOG_D(PHY,"[eNB %d][SR %x] Frame %d subframe %d Got SR for PUSCH, transmitting to MAC\n",eNB->Mod_id, - uci->rnti,frame,subframe); - - if (eNB->first_sr[i] == 1) { // this is the first request for uplink after Connection Setup, so clear HARQ process 0 use for Msg4 - eNB->first_sr[i] = 0; - eNB->dlsch[i][0]->harq_processes[0]->round=0; - eNB->dlsch[i][0]->harq_processes[0]->status=SCH_IDLE; - LOG_D(PHY,"[eNB %d][SR %x] Frame %d subframe %d First SR\n", - eNB->Mod_id, - eNB->ulsch[i]->rnti,frame,subframe); - } + LOG_D (PHY, "[eNB %d][SR %x] Frame %d subframe %d Got SR for PUSCH, transmitting to MAC\n", eNB->Mod_id, uci->rnti, frame, subframe); + + if (eNB->first_sr[i] == 1) { // this is the first request for uplink after Connection Setup, so clear HARQ process 0 use for Msg4 + eNB->first_sr[i] = 0; + eNB->dlsch[i][0]->harq_processes[0]->round = 0; + eNB->dlsch[i][0]->harq_processes[0]->status = SCH_IDLE; + LOG_D (PHY, "[eNB %d][SR %x] Frame %d subframe %d First SR\n", eNB->Mod_id, eNB->ulsch[i]->rnti, frame, subframe); + } } } } } -void pusch_procedures(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc) +void +pusch_procedures (PHY_VARS_eNB * eNB, eNB_rxtx_proc_t * proc) { - uint32_t ret=0,i; - uint32_t harq_pid; - uint8_t nPRS; - LTE_DL_FRAME_PARMS *fp=&eNB->frame_parms; + uint32_t ret = 0, i; + uint32_t harq_pid; + uint8_t nPRS; + LTE_DL_FRAME_PARMS *fp = &eNB->frame_parms; LTE_eNB_ULSCH_t *ulsch; LTE_UL_eNB_HARQ_t *ulsch_harq; - const int subframe = proc->subframe_rx; - const int frame = proc->frame_rx; + const int subframe = proc->subframe_rx; + const int frame = proc->frame_rx; - if (fp->frame_type == FDD) harq_pid = ((10*frame) + subframe)&7; - else harq_pid = subframe%10; + if (fp->frame_type == FDD) + harq_pid = ((10 * frame) + subframe) & 7; + else + harq_pid = subframe % 10; - for (i=0; iulsch[i]; ulsch_harq = ulsch->harq_processes[harq_pid]; - if (ulsch->rnti>0) LOG_D(PHY,"Frame %d, subframe %d: PUSCH procedures, harq_pid %d, UE %d/%x\n", - frame,subframe,harq_pid,i,ulsch->rnti); + if (ulsch->rnti > 0) + LOG_D (PHY, "Frame %d, subframe %d: PUSCH procedures, harq_pid %d, UE %d/%x\n", frame, subframe, harq_pid, i, ulsch->rnti); - if ((ulsch) && - (ulsch->rnti>0) && - (ulsch_harq->status == ACTIVE) && - (ulsch_harq->frame == frame) && - (ulsch_harq->subframe == subframe) && - (ulsch_harq->handled == 0)) { + if ((ulsch) && (ulsch->rnti > 0) && (ulsch_harq->status == ACTIVE) && (ulsch_harq->frame == frame) && (ulsch_harq->subframe == subframe) && (ulsch_harq->handled == 0)) { // UE has ULSCH scheduling - for (int rb=0; - rb<=ulsch_harq->nb_rb; - rb++) { - int rb2 = rb+ulsch_harq->first_rb; - eNB->rb_mask_ul[rb2>>5] |= (1<<(rb2&31)); + for (int rb = 0; rb <= ulsch_harq->nb_rb; rb++) { + int rb2 = rb + ulsch_harq->first_rb; + eNB->rb_mask_ul[rb2 >> 5] |= (1 << (rb2 & 31)); } - LOG_D(PHY,"[eNB %d] frame %d, subframe %d: Scheduling ULSCH Reception for UE %d \n", - eNB->Mod_id, - frame, - subframe, - i); + LOG_D (PHY, "[eNB %d] frame %d, subframe %d: Scheduling ULSCH Reception for UE %d \n", eNB->Mod_id, frame, subframe, i); - nPRS = fp->pusch_config_common.ul_ReferenceSignalsPUSCH.nPRS[subframe<<1]; + nPRS = fp->pusch_config_common.ul_ReferenceSignalsPUSCH.nPRS[subframe << 1]; - ulsch->cyclicShift = (ulsch_harq->n_DMRS2 + - fp->pusch_config_common.ul_ReferenceSignalsPUSCH.cyclicShift + - nPRS)%12; + ulsch->cyclicShift = (ulsch_harq->n_DMRS2 + fp->pusch_config_common.ul_ReferenceSignalsPUSCH.cyclicShift + nPRS) % 12; - LOG_D(PHY, - "[eNB %d][PUSCH %d] Frame %d Subframe %d Demodulating PUSCH: dci_alloc %d, rar_alloc %d, round %d, first_rb %d, nb_rb %d, Qm %d, TBS %d, rv %d, cyclic_shift %d (n_DMRS2 %d, cyclicShift_common %d, nprs %d), O_ACK %d, beta_cqi %d \n", - eNB->Mod_id,harq_pid,frame,subframe, - ulsch_harq->dci_alloc, - ulsch_harq->rar_alloc, - ulsch_harq->round, - ulsch_harq->first_rb, - ulsch_harq->nb_rb, - ulsch_harq->Qm, - ulsch_harq->TBS, - ulsch_harq->rvidx, - ulsch->cyclicShift, - ulsch_harq->n_DMRS2, - fp->pusch_config_common.ul_ReferenceSignalsPUSCH.cyclicShift, - nPRS, - ulsch_harq->O_ACK, - ulsch->beta_offset_cqi_times8); + LOG_D (PHY, + "[eNB %d][PUSCH %d] Frame %d Subframe %d Demodulating PUSCH: dci_alloc %d, rar_alloc %d, round %d, first_rb %d, nb_rb %d, Qm %d, TBS %d, rv %d, cyclic_shift %d (n_DMRS2 %d, cyclicShift_common %d, nprs %d), O_ACK %d, beta_cqi %d \n", + eNB->Mod_id, harq_pid, frame, subframe, + ulsch_harq->dci_alloc, + ulsch_harq->rar_alloc, + ulsch_harq->round, + ulsch_harq->first_rb, + ulsch_harq->nb_rb, + ulsch_harq->Qm, + ulsch_harq->TBS, + ulsch_harq->rvidx, ulsch->cyclicShift, ulsch_harq->n_DMRS2, fp->pusch_config_common.ul_ReferenceSignalsPUSCH.cyclicShift, nPRS, ulsch_harq->O_ACK, ulsch->beta_offset_cqi_times8); - start_meas(&eNB->ulsch_demodulation_stats); + start_meas (&eNB->ulsch_demodulation_stats); - rx_ulsch(eNB,proc, i); + rx_ulsch (eNB, proc, i); - stop_meas(&eNB->ulsch_demodulation_stats); + stop_meas (&eNB->ulsch_demodulation_stats); - start_meas(&eNB->ulsch_decoding_stats); + start_meas (&eNB->ulsch_decoding_stats); - ret = ulsch_decoding(eNB,proc, - i, - 0, // control_only_flag - ulsch_harq->V_UL_DAI, - ulsch_harq->nb_rb>20 ? 1 : 0); + ret = ulsch_decoding (eNB, proc, i, 0, // control_only_flag + ulsch_harq->V_UL_DAI, ulsch_harq->nb_rb > 20 ? 1 : 0); - stop_meas(&eNB->ulsch_decoding_stats); + stop_meas (&eNB->ulsch_decoding_stats); - LOG_D(PHY,"[eNB %d][PUSCH %d] frame %d subframe %d RNTI %x RX power (%d,%d) N0 (%d,%d) dB ACK (%d,%d), decoding iter %d\n", - eNB->Mod_id,harq_pid, - frame,subframe, - ulsch->rnti, - dB_fixed(eNB->pusch_vars[i]->ulsch_power[0]), - dB_fixed(eNB->pusch_vars[i]->ulsch_power[1]), - 20,//eNB->measurements.n0_power_dB[0], - 20,//eNB->measurements.n0_power_dB[1], - ulsch_harq->o_ACK[0], - ulsch_harq->o_ACK[1], - ret); + LOG_D (PHY, "[eNB %d][PUSCH %d] frame %d subframe %d RNTI %x RX power (%d,%d) N0 (%d,%d) dB ACK (%d,%d), decoding iter %d\n", eNB->Mod_id, harq_pid, frame, subframe, ulsch->rnti, dB_fixed (eNB->pusch_vars[i]->ulsch_power[0]), dB_fixed (eNB->pusch_vars[i]->ulsch_power[1]), 20, //eNB->measurements.n0_power_dB[0], + 20, //eNB->measurements.n0_power_dB[1], + ulsch_harq->o_ACK[0], ulsch_harq->o_ACK[1], ret); //compute the expected ULSCH RX power (for the stats) - ulsch_harq->delta_TF = get_hundred_times_delta_IF_eNB(eNB,i,harq_pid, 0); // 0 means bw_factor is not considered + ulsch_harq->delta_TF = get_hundred_times_delta_IF_eNB (eNB, i, harq_pid, 0); // 0 means bw_factor is not considered if (ulsch_harq->cqi_crc_status == 1) { #ifdef DEBUG_PHY_PROC //if (((frame%10) == 0) || (frame < 50)) - print_CQI(ulsch_harq->o,ulsch_harq->uci_format,0,fp->N_RB_DL); + print_CQI (ulsch_harq->o, ulsch_harq->uci_format, 0, fp->N_RB_DL); #endif - fill_ulsch_cqi_indication(eNB,frame,subframe, - ulsch_harq, - ulsch->rnti); + fill_ulsch_cqi_indication (eNB, frame, subframe, ulsch_harq, ulsch->rnti); } - if (ret == (1+MAX_TURBO_ITERATIONS)) { - T(T_ENB_PHY_ULSCH_UE_NACK, T_INT(eNB->Mod_id), T_INT(frame), T_INT(subframe), T_INT(ulsch->rnti), - T_INT(harq_pid)); + if (ret == (1 + MAX_TURBO_ITERATIONS)) { + T (T_ENB_PHY_ULSCH_UE_NACK, T_INT (eNB->Mod_id), T_INT (frame), T_INT (subframe), T_INT (ulsch->rnti), T_INT (harq_pid)); - fill_crc_indication(eNB,i,frame,subframe,1); // indicate NAK to MAC - fill_rx_indication(eNB,i,frame,subframe); // indicate SDU to MAC + fill_crc_indication (eNB, i, frame, subframe, 1); // indicate NAK to MAC + fill_rx_indication (eNB, i, frame, subframe); // indicate SDU to MAC - LOG_D(PHY,"[eNB %d][PUSCH %d] frame %d subframe %d UE %d Error receiving ULSCH, round %d/%d (ACK %d,%d)\n", - eNB->Mod_id,harq_pid, - frame,subframe, i, - ulsch_harq->round-1, - ulsch->Mlimit, - ulsch_harq->o_ACK[0], - ulsch_harq->o_ACK[1]); - if (ulsch_harq->round >= 3) { - ulsch_harq->status = SCH_IDLE; - ulsch_harq->handled = 0; - ulsch->harq_mask &= ~(1 << harq_pid); - ulsch_harq->round = 0; - } + LOG_D (PHY, "[eNB %d][PUSCH %d] frame %d subframe %d UE %d Error receiving ULSCH, round %d/%d (ACK %d,%d)\n", + eNB->Mod_id, harq_pid, frame, subframe, i, ulsch_harq->round - 1, ulsch->Mlimit, ulsch_harq->o_ACK[0], ulsch_harq->o_ACK[1]); + if (ulsch_harq->round >= 3) { + ulsch_harq->status = SCH_IDLE; + ulsch_harq->handled = 0; + ulsch->harq_mask &= ~(1 << harq_pid); + ulsch_harq->round = 0; + } #if defined(MESSAGE_CHART_GENERATOR_PHY) - MSC_LOG_RX_DISCARDED_MESSAGE( - MSC_PHY_ENB,MSC_PHY_UE, - NULL,0, - "%05u:%02u ULSCH received rnti %x harq id %u round %d", - frame,subframe, - ulsch->rnti,harq_pid, - ulsch_harq->round-1 - ); + MSC_LOG_RX_DISCARDED_MESSAGE (MSC_PHY_ENB, MSC_PHY_UE, NULL, 0, "%05u:%02u ULSCH received rnti %x harq id %u round %d", frame, subframe, ulsch->rnti, harq_pid, ulsch_harq->round - 1); #endif /* Mark the HARQ process to release it later if max transmission reached @@ -1408,579 +1126,580 @@ void pusch_procedures(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc) * locally in PHY. */ ulsch_harq->handled = 1; - } // ulsch in error + } // ulsch in error else { - fill_crc_indication(eNB,i,frame,subframe,0); // indicate ACK to MAC - fill_rx_indication(eNB,i,frame,subframe); // indicate SDU to MAC + fill_crc_indication (eNB, i, frame, subframe, 0); // indicate ACK to MAC + fill_rx_indication (eNB, i, frame, subframe); // indicate SDU to MAC ulsch_harq->status = SCH_IDLE; - ulsch->harq_mask &= ~(1 << harq_pid); + ulsch->harq_mask &= ~(1 << harq_pid); - T(T_ENB_PHY_ULSCH_UE_ACK, T_INT(eNB->Mod_id), T_INT(frame), T_INT(subframe), T_INT(ulsch->rnti), - T_INT(harq_pid)); + T (T_ENB_PHY_ULSCH_UE_ACK, T_INT (eNB->Mod_id), T_INT (frame), T_INT (subframe), T_INT (ulsch->rnti), T_INT (harq_pid)); #if defined(MESSAGE_CHART_GENERATOR_PHY) - MSC_LOG_RX_MESSAGE( - MSC_PHY_ENB,MSC_PHY_UE, - NULL,0, - "%05u:%02u ULSCH received rnti %x harq id %u", - frame,subframe, - ulsch->rnti,harq_pid - ); + MSC_LOG_RX_MESSAGE (MSC_PHY_ENB, MSC_PHY_UE, NULL, 0, "%05u:%02u ULSCH received rnti %x harq id %u", frame, subframe, ulsch->rnti, harq_pid); #endif #ifdef DEBUG_PHY_PROC #ifdef DEBUG_ULSCH - LOG_D(PHY,"[eNB] Frame %d, Subframe %d : ULSCH SDU (RX harq_pid %d) %d bytes:",frame,subframe, - harq_pid,ulsch_harq->TBS>>3); + LOG_D (PHY, "[eNB] Frame %d, Subframe %d : ULSCH SDU (RX harq_pid %d) %d bytes:", frame, subframe, harq_pid, ulsch_harq->TBS >> 3); - for (j=0; jTBS>>3; j++) - LOG_T(PHY,"%x.",ulsch->harq_processes[harq_pid]->b[j]); + for (j = 0; j < ulsch_harq->TBS >> 3; j++) + LOG_T (PHY, "%x.", ulsch->harq_processes[harq_pid]->b[j]); - LOG_T(PHY,"\n"); + LOG_T (PHY, "\n"); #endif #endif - } // ulsch not in error + } // ulsch not in error - if (ulsch_harq->O_ACK>0) fill_ulsch_harq_indication(eNB,ulsch_harq,ulsch->rnti,frame,subframe,ulsch->bundling); + if (ulsch_harq->O_ACK > 0) + fill_ulsch_harq_indication (eNB, ulsch_harq, ulsch->rnti, frame, subframe, ulsch->bundling); - LOG_D(PHY,"[eNB %d] Frame %d subframe %d: received ULSCH harq_pid %d for UE %d, ret = %d, CQI CRC Status %d, ACK %d,%d, ulsch_errors %d/%d\n", - eNB->Mod_id,frame,subframe, - harq_pid, - i, - ret, - ulsch_harq->cqi_crc_status, - ulsch_harq->o_ACK[0], - ulsch_harq->o_ACK[1], - eNB->UE_stats[i].ulsch_errors[harq_pid], - eNB->UE_stats[i].ulsch_decoding_attempts[harq_pid][0]); - } // if ((ulsch) && - // (ulsch->rnti>0) && - // (ulsch_harq->status == ACTIVE)) - else if ((ulsch) && - (ulsch->rnti>0) && - (ulsch_harq->status == ACTIVE) && - (ulsch_harq->frame == frame) && - (ulsch_harq->subframe == subframe) && - (ulsch_harq->handled == 1)) { + LOG_D (PHY, "[eNB %d] Frame %d subframe %d: received ULSCH harq_pid %d for UE %d, ret = %d, CQI CRC Status %d, ACK %d,%d, ulsch_errors %d/%d\n", + eNB->Mod_id, frame, subframe, + harq_pid, i, ret, ulsch_harq->cqi_crc_status, ulsch_harq->o_ACK[0], ulsch_harq->o_ACK[1], eNB->UE_stats[i].ulsch_errors[harq_pid], eNB->UE_stats[i].ulsch_decoding_attempts[harq_pid][0]); + } // if ((ulsch) && + // (ulsch->rnti>0) && + // (ulsch_harq->status == ACTIVE)) + else if ((ulsch) && (ulsch->rnti > 0) && (ulsch_harq->status == ACTIVE) && (ulsch_harq->frame == frame) && (ulsch_harq->subframe == subframe) && (ulsch_harq->handled == 1)) { // this harq process is stale, kill it, this 1024 frames later (10s), consider reducing that ulsch_harq->status = SCH_IDLE; ulsch_harq->handled = 0; - ulsch->harq_mask &= ~(1 << harq_pid); - LOG_W(PHY,"Removing stale ULSCH config for UE %x harq_pid %d (harq_mask is now 0x%2.2x)\n", - ulsch->rnti, harq_pid, ulsch->harq_mask); + ulsch->harq_mask &= ~(1 << harq_pid); + LOG_W (PHY, "Removing stale ULSCH config for UE %x harq_pid %d (harq_mask is now 0x%2.2x)\n", ulsch->rnti, harq_pid, ulsch->harq_mask); } - } // for (i=0; iproc; + eNB_proc_t *proc = &eNB->proc; proc->tdp.eNB = eNB; - proc->instance_cnt_td = -1; - - pthread_mutex_init( &proc->mutex_td, NULL); - pthread_cond_init( &proc->cond_td, NULL); + proc->instance_cnt_td = -1; - pthread_create(&proc->pthread_td, attr_td, td_thread, (void*)&proc->tdp); + pthread_mutex_init (&proc->mutex_td, NULL); + pthread_cond_init (&proc->cond_td, NULL); + + pthread_create (&proc->pthread_td, attr_td, td_thread, (void *) &proc->tdp); } -extern void *te_thread(void*); +extern void *te_thread (void *); -void init_te_thread(PHY_VARS_eNB *eNB,pthread_attr_t *attr_te) { +void +init_te_thread (PHY_VARS_eNB * eNB, pthread_attr_t * attr_te) +{ - eNB_proc_t *proc = &eNB->proc; + eNB_proc_t *proc = &eNB->proc; proc->tep.eNB = eNB; - proc->instance_cnt_te = -1; - - pthread_mutex_init( &proc->mutex_te, NULL); - pthread_cond_init( &proc->cond_te, NULL); + proc->instance_cnt_te = -1; - printf("Creating te_thread\n"); - pthread_create(&proc->pthread_te, attr_te, te_thread, (void*)&proc->tep); + pthread_mutex_init (&proc->mutex_te, NULL); + pthread_cond_init (&proc->cond_te, NULL); + + printf ("Creating te_thread\n"); + pthread_create (&proc->pthread_te, attr_te, te_thread, (void *) &proc->tep); } -void fill_rx_indication(PHY_VARS_eNB *eNB,int UE_id,int frame,int subframe) +void +fill_rx_indication (PHY_VARS_eNB * eNB, int UE_id, int frame, int subframe) { nfapi_rx_indication_pdu_t *pdu; - int timing_advance_update; - int sync_pos; + int timing_advance_update; + int sync_pos; - uint32_t harq_pid = subframe2harq_pid(&eNB->frame_parms, - frame,subframe); + uint32_t harq_pid = subframe2harq_pid (&eNB->frame_parms, + frame, subframe); - pthread_mutex_lock(&eNB->UL_INFO_mutex); - pdu = &eNB->UL_INFO.rx_ind.rx_pdu_list[eNB->UL_INFO.rx_ind.number_of_pdus]; + pthread_mutex_lock (&eNB->UL_INFO_mutex); + pdu = &eNB->UL_INFO.rx_ind.rx_pdu_list[eNB->UL_INFO.rx_ind.number_of_pdus]; // pdu->rx_ue_information.handle = eNB->ulsch[UE_id]->handle; - pdu->rx_ue_information.rnti = eNB->ulsch[UE_id]->rnti; - pdu->rx_indication_rel8.length = eNB->ulsch[UE_id]->harq_processes[harq_pid]->TBS>>3; - pdu->rx_indication_rel8.offset = 0; // filled in at the end of the UL_INFO formation - pdu->data = eNB->ulsch[UE_id]->harq_processes[harq_pid]->b; + pdu->rx_ue_information.rnti = eNB->ulsch[UE_id]->rnti; + pdu->rx_indication_rel8.length = eNB->ulsch[UE_id]->harq_processes[harq_pid]->TBS >> 3; + pdu->rx_indication_rel8.offset = 0; // filled in at the end of the UL_INFO formation + pdu->data = eNB->ulsch[UE_id]->harq_processes[harq_pid]->b; // estimate timing advance for MAC - sync_pos = lte_est_timing_advance_pusch(eNB,UE_id); - timing_advance_update = sync_pos - eNB->frame_parms.nb_prefix_samples/4; //to check + sync_pos = lte_est_timing_advance_pusch (eNB, UE_id); + timing_advance_update = sync_pos - eNB->frame_parms.nb_prefix_samples / 4; //to check // if (timing_advance_update > 10) { dump_ulsch(eNB,frame,subframe,UE_id); exit(-1);} // if (timing_advance_update < -10) { dump_ulsch(eNB,frame,subframe,UE_id); exit(-1);} switch (eNB->frame_parms.N_RB_DL) { - case 6: /* nothing to do */ break; - case 15: timing_advance_update /= 2; break; - case 25: timing_advance_update /= 4; break; - case 50: timing_advance_update /= 8; break; - case 75: timing_advance_update /= 12; break; - case 100: timing_advance_update /= 16; break; - default: abort(); + case 6: /* nothing to do */ + break; + case 15: + timing_advance_update /= 2; + break; + case 25: + timing_advance_update /= 4; + break; + case 50: + timing_advance_update /= 8; + break; + case 75: + timing_advance_update /= 12; + break; + case 100: + timing_advance_update /= 16; + break; + default: + abort (); } // put timing advance command in 0..63 range timing_advance_update += 31; - if (timing_advance_update < 0) timing_advance_update = 0; - if (timing_advance_update > 63) timing_advance_update = 63; + if (timing_advance_update < 0) + timing_advance_update = 0; + if (timing_advance_update > 63) + timing_advance_update = 63; pdu->rx_indication_rel8.timing_advance = timing_advance_update; // estimate UL_CQI for MAC (from antenna port 0 only) - int SNRtimes10 = dB_fixed_times10(eNB->pusch_vars[UE_id]->ulsch_power[0]) - - 10*max(eNB->measurements.n0_subband_power_tot_dB[0], - eNB->measurements.n0_subband_power_tot_dB[eNB->frame_parms.N_RB_UL-1]); + int SNRtimes10 = dB_fixed_times10 (eNB->pusch_vars[UE_id]->ulsch_power[0]) - 10 * max (eNB->measurements.n0_subband_power_tot_dB[0], + eNB->measurements.n0_subband_power_tot_dB[eNB->frame_parms.N_RB_UL - 1]); - if (SNRtimes10 < -640) pdu->rx_indication_rel8.ul_cqi=0; - else if (SNRtimes10 > 635) pdu->rx_indication_rel8.ul_cqi=255; - else pdu->rx_indication_rel8.ul_cqi=(640+SNRtimes10)/5; + if (SNRtimes10 < -640) + pdu->rx_indication_rel8.ul_cqi = 0; + else if (SNRtimes10 > 635) + pdu->rx_indication_rel8.ul_cqi = 255; + else + pdu->rx_indication_rel8.ul_cqi = (640 + SNRtimes10) / 5; - LOG_D(PHY,"[PUSCH %d] Filling RX_indication with SNR %d (%d), timing_advance %d (update %d)\n", - harq_pid,SNRtimes10,pdu->rx_indication_rel8.ul_cqi,pdu->rx_indication_rel8.timing_advance, - timing_advance_update); + LOG_D (PHY, "[PUSCH %d] Filling RX_indication with SNR %d (%d), timing_advance %d (update %d)\n", + harq_pid, SNRtimes10, pdu->rx_indication_rel8.ul_cqi, pdu->rx_indication_rel8.timing_advance, timing_advance_update); eNB->UL_INFO.rx_ind.number_of_pdus++; - pthread_mutex_unlock(&eNB->UL_INFO_mutex); + pthread_mutex_unlock (&eNB->UL_INFO_mutex); } -void release_harq(PHY_VARS_eNB *eNB,int UE_id,int tb,uint16_t frame,uint8_t subframe,uint16_t mask) { +void +release_harq (PHY_VARS_eNB * eNB, int UE_id, int tb, uint16_t frame, uint8_t subframe, uint16_t mask) +{ - LTE_eNB_DLSCH_t *dlsch0=NULL,*dlsch1=NULL; - LTE_DL_eNB_HARQ_t *dlsch0_harq=NULL,*dlsch1_harq=NULL; - int harq_pid; - int subframe_tx; - int M,m; + LTE_eNB_DLSCH_t *dlsch0 = NULL, *dlsch1 = NULL; + LTE_DL_eNB_HARQ_t *dlsch0_harq = NULL, *dlsch1_harq = NULL; + int harq_pid; + int subframe_tx; + int M, m; - AssertFatal(UE_id!=-1,"no existing dlsch context\n"); - AssertFatal(UE_id= %d(NUMBER_OF_UE_MAX)\n",UE_id,NUMBER_OF_UE_MAX); + AssertFatal (UE_id != -1, "no existing dlsch context\n"); + AssertFatal (UE_id < NUMBER_OF_UE_MAX, "returned UE_id %d >= %d(NUMBER_OF_UE_MAX)\n", UE_id, NUMBER_OF_UE_MAX); dlsch0 = eNB->dlsch[UE_id][0]; dlsch1 = eNB->dlsch[UE_id][1]; - if (eNB->frame_parms.frame_type == FDD) { - subframe_tx = (subframe+6)%10; + if (eNB->frame_parms.frame_type == FDD) { + subframe_tx = (subframe + 6) % 10; harq_pid = dlsch0->harq_ids[subframe_tx]; - AssertFatal((harq_pid>=0) && (harq_pid<10),"harq_pid %d not in 0...9\n",harq_pid); - dlsch0_harq = dlsch0->harq_processes[harq_pid]; - dlsch1_harq = dlsch1->harq_processes[harq_pid]; - AssertFatal(dlsch0_harq!=NULL,"dlsch0_harq is null\n"); + AssertFatal ((harq_pid >= 0) && (harq_pid < 10), "harq_pid %d not in 0...9\n", harq_pid); + dlsch0_harq = dlsch0->harq_processes[harq_pid]; + dlsch1_harq = dlsch1->harq_processes[harq_pid]; + AssertFatal (dlsch0_harq != NULL, "dlsch0_harq is null\n"); dlsch0_harq->status = SCH_IDLE; /*if ((dlsch1_harq == NULL)|| - ((dlsch1_harq!=NULL)&& - (dlsch1_harq->status == SCH_IDLE)))*/ - dlsch0->harq_mask &= ~(1<rnti); + ((dlsch1_harq!=NULL)&& + (dlsch1_harq->status == SCH_IDLE))) */ + dlsch0->harq_mask &= ~(1 << harq_pid); + LOG_D (PHY, "Frame %d, subframe %d: Releasing harq %d for UE %x\n", frame, subframe, harq_pid, dlsch0->rnti); - } - else { // release all processes in the bundle that was acked, based on mask - // This is at most 4 for multiplexing and 9 for bundling/special bundling - M=ul_ACK_subframe2_M(&eNB->frame_parms, - subframe); + } else { // release all processes in the bundle that was acked, based on mask + // This is at most 4 for multiplexing and 9 for bundling/special bundling + M = ul_ACK_subframe2_M (&eNB->frame_parms, subframe); - for (m=0; mframe_parms, - subframe, - m); - if (((1< 0) { - harq_pid = dlsch0->harq_ids[subframe_tx]; - if ((harq_pid>=0) && (harq_pid<10)) { - dlsch0_harq = dlsch0->harq_processes[harq_pid]; - dlsch1_harq = dlsch1->harq_processes[harq_pid]; - AssertFatal(dlsch0_harq!=NULL,"dlsch0_harq is null\n"); - - dlsch0_harq->status = SCH_IDLE; - if ((dlsch1_harq == NULL)|| - ((dlsch1_harq!=NULL)&& - (dlsch1_harq->status == SCH_IDLE))) - dlsch0->harq_mask &= ~(1<frame_parms, subframe, m); + if (((1 << m) & mask) > 0) { + harq_pid = dlsch0->harq_ids[subframe_tx]; + if ((harq_pid >= 0) && (harq_pid < 10)) { + dlsch0_harq = dlsch0->harq_processes[harq_pid]; + dlsch1_harq = dlsch1->harq_processes[harq_pid]; + AssertFatal (dlsch0_harq != NULL, "dlsch0_harq is null\n"); + + dlsch0_harq->status = SCH_IDLE; + if ((dlsch1_harq == NULL) || ((dlsch1_harq != NULL) && (dlsch1_harq->status == SCH_IDLE))) + dlsch0->harq_mask &= ~(1 << harq_pid); + } } } } } -int getM(PHY_VARS_eNB *eNB,int frame,int subframe) { +int +getM (PHY_VARS_eNB * eNB, int frame, int subframe) +{ - int M,Mtx=0; - LTE_eNB_DLSCH_t *dlsch0=NULL,*dlsch1=NULL; - LTE_DL_eNB_HARQ_t *dlsch0_harq=NULL,*dlsch1_harq=NULL; - int harq_pid; - int subframe_tx; - int m; + int M, Mtx = 0; + LTE_eNB_DLSCH_t *dlsch0 = NULL, *dlsch1 = NULL; + LTE_DL_eNB_HARQ_t *dlsch0_harq = NULL, *dlsch1_harq = NULL; + int harq_pid; + int subframe_tx; + int m; - M=ul_ACK_subframe2_M(&eNB->frame_parms, - subframe); - - for (m=0; mframe_parms, - subframe, - m); + M = ul_ACK_subframe2_M (&eNB->frame_parms, subframe); + + for (m = 0; m < M; m++) { + subframe_tx = ul_ACK_subframe2_dl_subframe (&eNB->frame_parms, subframe, m); harq_pid = dlsch0->harq_ids[subframe_tx]; - if (harq_pid>=0 && harq_pid<10) { - dlsch0_harq = dlsch0->harq_processes[harq_pid]; - dlsch1_harq = dlsch1->harq_processes[harq_pid]; - AssertFatal(dlsch0_harq!=NULL,"dlsch0_harq is null\n"); - if (dlsch0_harq->status == ACTIVE|| - (dlsch1_harq!=NULL && dlsch1_harq->status == ACTIVE)) Mtx ++; + if (harq_pid >= 0 && harq_pid < 10) { + dlsch0_harq = dlsch0->harq_processes[harq_pid]; + dlsch1_harq = dlsch1->harq_processes[harq_pid]; + AssertFatal (dlsch0_harq != NULL, "dlsch0_harq is null\n"); + if (dlsch0_harq->status == ACTIVE || (dlsch1_harq != NULL && dlsch1_harq->status == ACTIVE)) + Mtx++; } } - return(Mtx); + return (Mtx); } -void fill_ulsch_cqi_indication(PHY_VARS_eNB *eNB,uint16_t frame,uint8_t subframe,LTE_UL_eNB_HARQ_t *ulsch_harq,uint16_t rnti) { +void +fill_ulsch_cqi_indication (PHY_VARS_eNB * eNB, uint16_t frame, uint8_t subframe, LTE_UL_eNB_HARQ_t * ulsch_harq, uint16_t rnti) +{ - pthread_mutex_lock(&eNB->UL_INFO_mutex); - nfapi_cqi_indication_pdu_t *pdu = &eNB->UL_INFO.cqi_ind.cqi_pdu_list[eNB->UL_INFO.cqi_ind.number_of_cqis]; + pthread_mutex_lock (&eNB->UL_INFO_mutex); + nfapi_cqi_indication_pdu_t *pdu = &eNB->UL_INFO.cqi_ind.cqi_pdu_list[eNB->UL_INFO.cqi_ind.number_of_cqis]; nfapi_cqi_indication_raw_pdu_t *raw_pdu = &eNB->UL_INFO.cqi_ind.cqi_raw_pdu_list[eNB->UL_INFO.cqi_ind.number_of_cqis]; pdu->rx_ue_information.rnti = rnti; - if (ulsch_harq->cqi_crc_status != 1) pdu->cqi_indication_rel9.data_offset = 0; - else pdu->cqi_indication_rel9.data_offset = 1; // fill in after all cqi_indications have been generated when non-zero + if (ulsch_harq->cqi_crc_status != 1) + pdu->cqi_indication_rel9.data_offset = 0; + else + pdu->cqi_indication_rel9.data_offset = 1; // fill in after all cqi_indications have been generated when non-zero // by default set O to rank 1 value - pdu->cqi_indication_rel9.length = (ulsch_harq->Or1>>3) + ((ulsch_harq->Or1&7) > 0 ? 1 : 0); - pdu->cqi_indication_rel9.ri[0] = 0; + pdu->cqi_indication_rel9.length = (ulsch_harq->Or1 >> 3) + ((ulsch_harq->Or1 & 7) > 0 ? 1 : 0); + pdu->cqi_indication_rel9.ri[0] = 0; // if we have RI bits, set them and if rank2 overwrite O - if (ulsch_harq->O_RI>0) { + if (ulsch_harq->O_RI > 0) { pdu->cqi_indication_rel9.ri[0] = ulsch_harq->o_RI[0]; - if (ulsch_harq->o_RI[0] == 2) pdu->cqi_indication_rel9.length = (ulsch_harq->Or2>>3) + ((ulsch_harq->Or2&7) > 0 ? 1 : 0); + if (ulsch_harq->o_RI[0] == 2) + pdu->cqi_indication_rel9.length = (ulsch_harq->Or2 >> 3) + ((ulsch_harq->Or2 & 7) > 0 ? 1 : 0); pdu->cqi_indication_rel9.timing_advance = 0; } - + pdu->cqi_indication_rel9.number_of_cc_reported = 1; - pdu->ul_cqi_information.channel = 1; // PUSCH - memcpy((void*)raw_pdu->pdu,ulsch_harq->o,pdu->cqi_indication_rel9.length); + pdu->ul_cqi_information.channel = 1; // PUSCH + memcpy ((void *) raw_pdu->pdu, ulsch_harq->o, pdu->cqi_indication_rel9.length); eNB->UL_INFO.cqi_ind.number_of_cqis++; - pthread_mutex_unlock(&eNB->UL_INFO_mutex); + pthread_mutex_unlock (&eNB->UL_INFO_mutex); } -void fill_ulsch_harq_indication(PHY_VARS_eNB *eNB,LTE_UL_eNB_HARQ_t *ulsch_harq,uint16_t rnti, int frame,int subframe,int bundling) +void +fill_ulsch_harq_indication (PHY_VARS_eNB * eNB, LTE_UL_eNB_HARQ_t * ulsch_harq, uint16_t rnti, int frame, int subframe, int bundling) { - int UE_id = find_dlsch(rnti,eNB,SEARCH_EXIST); - AssertFatal(UE_id>=0,"UE_id doesn't exist\n"); + int UE_id = find_dlsch (rnti, eNB, SEARCH_EXIST); + AssertFatal (UE_id >= 0, "UE_id doesn't exist\n"); - pthread_mutex_lock(&eNB->UL_INFO_mutex); - nfapi_harq_indication_pdu_t *pdu = &eNB->UL_INFO.harq_ind.harq_pdu_list[eNB->UL_INFO.harq_ind.number_of_harqs]; - int M; - int i; + pthread_mutex_lock (&eNB->UL_INFO_mutex); + nfapi_harq_indication_pdu_t *pdu = &eNB->UL_INFO.harq_ind.harq_pdu_list[eNB->UL_INFO.harq_ind.number_of_harqs]; + int M; + int i; - pdu->instance_length = 0; // don't know what to do with this + pdu->instance_length = 0; // don't know what to do with this // pdu->rx_ue_information.handle = handle; - pdu->rx_ue_information.rnti = rnti; + pdu->rx_ue_information.rnti = rnti; if (eNB->frame_parms.frame_type == FDD) { pdu->harq_indication_fdd_rel13.mode = 0; pdu->harq_indication_fdd_rel13.number_of_ack_nack = ulsch_harq->O_ACK; - for (i=0;iO_ACK;i++) { - AssertFatal(ulsch_harq->o_ACK[i] == 0 || ulsch_harq->o_ACK[i] == 1, "harq_ack[%d] is %d, should be 1,2 or 4\n",i,ulsch_harq->o_ACK[i]); + for (i = 0; i < ulsch_harq->O_ACK; i++) { + AssertFatal (ulsch_harq->o_ACK[i] == 0 || ulsch_harq->o_ACK[i] == 1, "harq_ack[%d] is %d, should be 1,2 or 4\n", i, ulsch_harq->o_ACK[i]); - pdu->harq_indication_fdd_rel13.harq_tb_n[i] = 2-ulsch_harq->o_ACK[i]; + pdu->harq_indication_fdd_rel13.harq_tb_n[i] = 2 - ulsch_harq->o_ACK[i]; // release DLSCH if needed - if (ulsch_harq->o_ACK[i] == 1) release_harq(eNB,UE_id,i,frame,subframe,0xffff); + if (ulsch_harq->o_ACK[i] == 1) + release_harq (eNB, UE_id, i, frame, subframe, 0xffff); #if T_TRACER /* TODO: get correct harq pid */ if (ulsch_harq->o_ACK[i] != 1) - T(T_ENB_PHY_DLSCH_UE_NACK, T_INT(0), T_INT(frame), T_INT(subframe), - T_INT(rnti), T_INT(eNB->dlsch[UE_id][0]->harq_ids[(subframe+6)%10])); + T (T_ENB_PHY_DLSCH_UE_NACK, T_INT (0), T_INT (frame), T_INT (subframe), T_INT (rnti), T_INT (eNB->dlsch[UE_id][0]->harq_ids[(subframe + 6) % 10])); else - T(T_ENB_PHY_DLSCH_UE_ACK, T_INT(0), T_INT(frame), T_INT(subframe), - T_INT(rnti), T_INT(eNB->dlsch[UE_id][0]->harq_ids[(subframe+6)%10])); + T (T_ENB_PHY_DLSCH_UE_ACK, T_INT (0), T_INT (frame), T_INT (subframe), T_INT (rnti), T_INT (eNB->dlsch[UE_id][0]->harq_ids[(subframe + 6) % 10])); #endif } - } - else { // TDD - M=ul_ACK_subframe2_M(&eNB->frame_parms, - subframe); + } else { // TDD + M = ul_ACK_subframe2_M (&eNB->frame_parms, subframe); - pdu->harq_indication_fdd_rel13.mode = 1-bundling; + pdu->harq_indication_fdd_rel13.mode = 1 - bundling; pdu->harq_indication_fdd_rel13.number_of_ack_nack = ulsch_harq->O_ACK; - for (i=0;iO_ACK;i++) { - AssertFatal(ulsch_harq->o_ACK[i] == 0 || ulsch_harq->o_ACK[i] == 1, "harq_ack[%d] is %d, should be 1,2 or 4\n",i,ulsch_harq->o_ACK[i]); + for (i = 0; i < ulsch_harq->O_ACK; i++) { + AssertFatal (ulsch_harq->o_ACK[i] == 0 || ulsch_harq->o_ACK[i] == 1, "harq_ack[%d] is %d, should be 1,2 or 4\n", i, ulsch_harq->o_ACK[i]); - pdu->harq_indication_tdd_rel13.harq_data[0].multiplex.value_0 = 2-ulsch_harq->o_ACK[i]; + pdu->harq_indication_tdd_rel13.harq_data[0].multiplex.value_0 = 2 - ulsch_harq->o_ACK[i]; // release DLSCH if needed - if (ulsch_harq->o_ACK[i] == 1) release_harq(eNB,UE_id,i,frame,subframe,0xffff); - if (M==1 && ulsch_harq->O_ACK==1 && ulsch_harq->o_ACK[i] == 1) release_harq(eNB,UE_id,0,frame,subframe,0xffff); - else if (M==1 && ulsch_harq->O_ACK==2 && ulsch_harq->o_ACK[i] == 1) release_harq(eNB,UE_id,i,frame,subframe,0xffff); - else if (M>1 && ulsch_harq->o_ACK[i] == 1) { - // spatial bundling - release_harq(eNB,UE_id,0,frame,subframe,1<o_ACK[i] == 1) + release_harq (eNB, UE_id, i, frame, subframe, 0xffff); + if (M == 1 && ulsch_harq->O_ACK == 1 && ulsch_harq->o_ACK[i] == 1) + release_harq (eNB, UE_id, 0, frame, subframe, 0xffff); + else if (M == 1 && ulsch_harq->O_ACK == 2 && ulsch_harq->o_ACK[i] == 1) + release_harq (eNB, UE_id, i, frame, subframe, 0xffff); + else if (M > 1 && ulsch_harq->o_ACK[i] == 1) { + // spatial bundling + release_harq (eNB, UE_id, 0, frame, subframe, 1 << i); + release_harq (eNB, UE_id, 1, frame, subframe, 1 << i); } - } + } } eNB->UL_INFO.harq_ind.number_of_harqs++; - pthread_mutex_unlock(&eNB->UL_INFO_mutex); + pthread_mutex_unlock (&eNB->UL_INFO_mutex); } -void fill_uci_harq_indication(PHY_VARS_eNB *eNB, - LTE_eNB_UCI *uci, - int frame, - int subframe, - uint8_t *harq_ack, - uint8_t tdd_mapping_mode, - uint16_t tdd_multiplexing_mask) { +void +fill_uci_harq_indication (PHY_VARS_eNB * eNB, LTE_eNB_UCI * uci, int frame, int subframe, uint8_t * harq_ack, uint8_t tdd_mapping_mode, uint16_t tdd_multiplexing_mask) +{ - int UE_id=find_dlsch(uci->rnti,eNB,SEARCH_EXIST); - AssertFatal(UE_id>=0,"UE_id doesn't exist\n"); + int UE_id = find_dlsch (uci->rnti, eNB, SEARCH_EXIST); + AssertFatal (UE_id >= 0, "UE_id doesn't exist\n"); - pthread_mutex_lock(&eNB->UL_INFO_mutex); - nfapi_harq_indication_pdu_t *pdu = &eNB->UL_INFO.harq_ind.harq_pdu_list[eNB->UL_INFO.harq_ind.number_of_harqs]; + pthread_mutex_lock (&eNB->UL_INFO_mutex); + nfapi_harq_indication_pdu_t *pdu = &eNB->UL_INFO.harq_ind.harq_pdu_list[eNB->UL_INFO.harq_ind.number_of_harqs]; - pdu->instance_length = 0; // don't know what to do with this + pdu->instance_length = 0; // don't know what to do with this // pdu->rx_ue_information.handle = handle; - pdu->rx_ue_information.rnti = uci->rnti; + pdu->rx_ue_information.rnti = uci->rnti; // estimate UL_CQI for MAC (from antenna port 0 only) - int SNRtimes10 = dB_fixed_times10(uci->stat) - 10*max(eNB->measurements.n0_subband_power_tot_dB[0], - eNB->measurements.n0_subband_power_tot_dB[eNB->frame_parms.N_RB_UL-1]); + int SNRtimes10 = dB_fixed_times10 (uci->stat) - 10 * max (eNB->measurements.n0_subband_power_tot_dB[0], + eNB->measurements.n0_subband_power_tot_dB[eNB->frame_parms.N_RB_UL - 1]); - if (SNRtimes10 < -100) LOG_I(PHY,"uci->stat %d \n",uci->stat); + if (SNRtimes10 < -100) + LOG_I (PHY, "uci->stat %d \n", uci->stat); - if (SNRtimes10 < -640) pdu->ul_cqi_information.ul_cqi=0; - else if (SNRtimes10 > 635) pdu->ul_cqi_information.ul_cqi=255; - else pdu->ul_cqi_information.ul_cqi=(640+SNRtimes10)/5; + if (SNRtimes10 < -640) + pdu->ul_cqi_information.ul_cqi = 0; + else if (SNRtimes10 > 635) + pdu->ul_cqi_information.ul_cqi = 255; + else + pdu->ul_cqi_information.ul_cqi = (640 + SNRtimes10) / 5; pdu->ul_cqi_information.channel = 0; if (eNB->frame_parms.frame_type == FDD) { if (uci->pucch_fmt == pucch_format1a) { - pdu->harq_indication_fdd_rel13.mode = 0; + pdu->harq_indication_fdd_rel13.mode = 0; pdu->harq_indication_fdd_rel13.number_of_ack_nack = 1; - - AssertFatal(harq_ack[0] == 1 || harq_ack[0] == 2 || harq_ack[0] == 4, "harq_ack[0] is %d, should be 1,2 or 4\n",harq_ack[0]); + + AssertFatal (harq_ack[0] == 1 || harq_ack[0] == 2 || harq_ack[0] == 4, "harq_ack[0] is %d, should be 1,2 or 4\n", harq_ack[0]); pdu->harq_indication_fdd_rel13.harq_tb_n[0] = harq_ack[0]; // release DLSCH if needed - if (harq_ack[0] == 1) release_harq(eNB,UE_id,0,frame,subframe,0xffff); + if (harq_ack[0] == 1) + release_harq (eNB, UE_id, 0, frame, subframe, 0xffff); #if T_TRACER if (harq_ack[0] != 1) - T(T_ENB_PHY_DLSCH_UE_NACK, T_INT(0), T_INT(frame), T_INT(subframe), - T_INT(uci->rnti), T_INT(eNB->dlsch[UE_id][0]->harq_ids[(subframe+6)%10])); + T (T_ENB_PHY_DLSCH_UE_NACK, T_INT (0), T_INT (frame), T_INT (subframe), T_INT (uci->rnti), T_INT (eNB->dlsch[UE_id][0]->harq_ids[(subframe + 6) % 10])); else - T(T_ENB_PHY_DLSCH_UE_ACK, T_INT(0), T_INT(frame), T_INT(subframe), - T_INT(uci->rnti), T_INT(eNB->dlsch[UE_id][0]->harq_ids[(subframe+6)%10])); + T (T_ENB_PHY_DLSCH_UE_ACK, T_INT (0), T_INT (frame), T_INT (subframe), T_INT (uci->rnti), T_INT (eNB->dlsch[UE_id][0]->harq_ids[(subframe + 6) % 10])); #endif - } - else if (uci->pucch_fmt == pucch_format1b) { - pdu->harq_indication_fdd_rel13.mode = 0; + } else if (uci->pucch_fmt == pucch_format1b) { + pdu->harq_indication_fdd_rel13.mode = 0; pdu->harq_indication_fdd_rel13.number_of_ack_nack = 2; - AssertFatal(harq_ack[0] == 1 || harq_ack[0] == 2 || harq_ack[1] == 4, "harq_ack[0] is %d, should be 0,1 or 4\n",harq_ack[0]); - AssertFatal(harq_ack[1] == 1 || harq_ack[1] == 2 || harq_ack[1] == 4, "harq_ack[1] is %d, should be 0,1 or 4\n",harq_ack[1]); + AssertFatal (harq_ack[0] == 1 || harq_ack[0] == 2 || harq_ack[1] == 4, "harq_ack[0] is %d, should be 0,1 or 4\n", harq_ack[0]); + AssertFatal (harq_ack[1] == 1 || harq_ack[1] == 2 || harq_ack[1] == 4, "harq_ack[1] is %d, should be 0,1 or 4\n", harq_ack[1]); pdu->harq_indication_fdd_rel13.harq_tb_n[0] = harq_ack[0]; - pdu->harq_indication_fdd_rel13.harq_tb_n[1] = harq_ack[1]; + pdu->harq_indication_fdd_rel13.harq_tb_n[1] = harq_ack[1]; // release DLSCH if needed - if (harq_ack[0] == 1) release_harq(eNB,UE_id,0,frame,subframe,0xffff); - if (harq_ack[1] == 1) release_harq(eNB,UE_id,1,frame,subframe,0xffff); - } - else AssertFatal(1==0,"only format 1a/b for now, received %d\n",uci->pucch_fmt); - } - else { // TDD + if (harq_ack[0] == 1) + release_harq (eNB, UE_id, 0, frame, subframe, 0xffff); + if (harq_ack[1] == 1) + release_harq (eNB, UE_id, 1, frame, subframe, 0xffff); + } else + AssertFatal (1 == 0, "only format 1a/b for now, received %d\n", uci->pucch_fmt); + } else { // TDD - AssertFatal(tdd_mapping_mode==0 || tdd_mapping_mode==1 || tdd_mapping_mode==2, - "Illegal tdd_mapping_mode %d\n",tdd_mapping_mode); + AssertFatal (tdd_mapping_mode == 0 || tdd_mapping_mode == 1 || tdd_mapping_mode == 2, "Illegal tdd_mapping_mode %d\n", tdd_mapping_mode); - pdu->harq_indication_tdd_rel13.mode = tdd_mapping_mode; + pdu->harq_indication_tdd_rel13.mode = tdd_mapping_mode; switch (tdd_mapping_mode) { - case 0: // bundling + case 0: // bundling if (uci->pucch_fmt == pucch_format1a) { - pdu->harq_indication_tdd_rel13.number_of_ack_nack = 1; - AssertFatal(harq_ack[0] == 1 || harq_ack[0] == 2 || harq_ack[0] == 4, "harq_ack[0] is %d, should be 1,2 or 4\n",harq_ack[0]); - pdu->harq_indication_tdd_rel13.harq_data[0].bundling.value_0 = harq_ack[0]; - // release all bundled DLSCH if needed - if (harq_ack[0] == 1) release_harq(eNB,UE_id,0,frame,subframe,0xffff); - } - else if (uci->pucch_fmt == pucch_format1b) { - pdu->harq_indication_tdd_rel13.number_of_ack_nack = 2; - AssertFatal(harq_ack[0] == 1 || harq_ack[0] == 2 || harq_ack[1] == 4, "harq_ack[0] is %d, should be 0,1 or 4\n",harq_ack[0]); - AssertFatal(harq_ack[1] == 1 || harq_ack[1] == 2 || harq_ack[1] == 4, "harq_ack[1] is %d, should be 0,1 or 4\n",harq_ack[1]); - pdu->harq_indication_tdd_rel13.harq_data[0].bundling.value_0 = harq_ack[0]; - pdu->harq_indication_tdd_rel13.harq_data[1].bundling.value_0 = harq_ack[1]; - // release all DLSCH if needed - if (harq_ack[0] == 1) release_harq(eNB,UE_id,0,frame,subframe,0xffff); - if (harq_ack[1] == 1) release_harq(eNB,UE_id,1,frame,subframe,0xffff); + pdu->harq_indication_tdd_rel13.number_of_ack_nack = 1; + AssertFatal (harq_ack[0] == 1 || harq_ack[0] == 2 || harq_ack[0] == 4, "harq_ack[0] is %d, should be 1,2 or 4\n", harq_ack[0]); + pdu->harq_indication_tdd_rel13.harq_data[0].bundling.value_0 = harq_ack[0]; + // release all bundled DLSCH if needed + if (harq_ack[0] == 1) + release_harq (eNB, UE_id, 0, frame, subframe, 0xffff); + } else if (uci->pucch_fmt == pucch_format1b) { + pdu->harq_indication_tdd_rel13.number_of_ack_nack = 2; + AssertFatal (harq_ack[0] == 1 || harq_ack[0] == 2 || harq_ack[1] == 4, "harq_ack[0] is %d, should be 0,1 or 4\n", harq_ack[0]); + AssertFatal (harq_ack[1] == 1 || harq_ack[1] == 2 || harq_ack[1] == 4, "harq_ack[1] is %d, should be 0,1 or 4\n", harq_ack[1]); + pdu->harq_indication_tdd_rel13.harq_data[0].bundling.value_0 = harq_ack[0]; + pdu->harq_indication_tdd_rel13.harq_data[1].bundling.value_0 = harq_ack[1]; + // release all DLSCH if needed + if (harq_ack[0] == 1) + release_harq (eNB, UE_id, 0, frame, subframe, 0xffff); + if (harq_ack[1] == 1) + release_harq (eNB, UE_id, 1, frame, subframe, 0xffff); } break; - case 1: // multiplexing - AssertFatal(uci->pucch_fmt == pucch_format1b,"uci->pucch_format %d is not format1b\n",uci->pucch_fmt); - - if (uci->num_pucch_resources == 1 && uci->pucch_fmt == pucch_format1a) { - pdu->harq_indication_tdd_rel13.number_of_ack_nack = 1; - AssertFatal(harq_ack[0] == 1 || harq_ack[0] == 2 || harq_ack[0] == 4, "harq_ack[0] is %d, should be 1,2 or 4\n",harq_ack[0]); - pdu->harq_indication_tdd_rel13.harq_data[0].multiplex.value_0 = harq_ack[0]; - // release all DLSCH if needed - if (harq_ack[0] == 1) release_harq(eNB,UE_id,0,frame,subframe,0xffff); - } - else if (uci->num_pucch_resources == 1 && uci->pucch_fmt == pucch_format1b) { - pdu->harq_indication_tdd_rel13.number_of_ack_nack = 2; - AssertFatal(harq_ack[0] == 1 || harq_ack[0] == 2 || harq_ack[1] == 4, "harq_ack[0] is %d, should be 0,1 or 4\n",harq_ack[0]); - AssertFatal(harq_ack[1] == 1 || harq_ack[1] == 2 || harq_ack[1] == 4, "harq_ack[1] is %d, should be 0,1 or 4\n",harq_ack[1]); - pdu->harq_indication_tdd_rel13.harq_data[0].multiplex.value_0 = harq_ack[0]; - pdu->harq_indication_tdd_rel13.harq_data[1].multiplex.value_0 = harq_ack[1]; - // release all DLSCH if needed - if (harq_ack[0] == 1) release_harq(eNB,UE_id,0,frame,subframe,0xffff); - if (harq_ack[1] == 1) release_harq(eNB,UE_id,1,frame,subframe,0xffff); - } - else { // num_pucch_resources (M) > 1 - pdu->harq_indication_tdd_rel13.number_of_ack_nack = uci->num_pucch_resources; + case 1: // multiplexing + AssertFatal (uci->pucch_fmt == pucch_format1b, "uci->pucch_format %d is not format1b\n", uci->pucch_fmt); - pdu->harq_indication_tdd_rel13.harq_data[0].multiplex.value_0 = harq_ack[0]; - pdu->harq_indication_tdd_rel13.harq_data[1].multiplex.value_0 = harq_ack[1]; - if (uci->num_pucch_resources == 3) pdu->harq_indication_tdd_rel13.harq_data[2].multiplex.value_0 = harq_ack[2]; - if (uci->num_pucch_resources == 4) pdu->harq_indication_tdd_rel13.harq_data[3].multiplex.value_0 = harq_ack[3]; - // spatial-bundling in this case so release both HARQ if necessary - release_harq(eNB,UE_id,0,frame,subframe,tdd_multiplexing_mask); - release_harq(eNB,UE_id,1,frame,subframe,tdd_multiplexing_mask); + if (uci->num_pucch_resources == 1 && uci->pucch_fmt == pucch_format1a) { + pdu->harq_indication_tdd_rel13.number_of_ack_nack = 1; + AssertFatal (harq_ack[0] == 1 || harq_ack[0] == 2 || harq_ack[0] == 4, "harq_ack[0] is %d, should be 1,2 or 4\n", harq_ack[0]); + pdu->harq_indication_tdd_rel13.harq_data[0].multiplex.value_0 = harq_ack[0]; + // release all DLSCH if needed + if (harq_ack[0] == 1) + release_harq (eNB, UE_id, 0, frame, subframe, 0xffff); + } else if (uci->num_pucch_resources == 1 && uci->pucch_fmt == pucch_format1b) { + pdu->harq_indication_tdd_rel13.number_of_ack_nack = 2; + AssertFatal (harq_ack[0] == 1 || harq_ack[0] == 2 || harq_ack[1] == 4, "harq_ack[0] is %d, should be 0,1 or 4\n", harq_ack[0]); + AssertFatal (harq_ack[1] == 1 || harq_ack[1] == 2 || harq_ack[1] == 4, "harq_ack[1] is %d, should be 0,1 or 4\n", harq_ack[1]); + pdu->harq_indication_tdd_rel13.harq_data[0].multiplex.value_0 = harq_ack[0]; + pdu->harq_indication_tdd_rel13.harq_data[1].multiplex.value_0 = harq_ack[1]; + // release all DLSCH if needed + if (harq_ack[0] == 1) + release_harq (eNB, UE_id, 0, frame, subframe, 0xffff); + if (harq_ack[1] == 1) + release_harq (eNB, UE_id, 1, frame, subframe, 0xffff); + } else { // num_pucch_resources (M) > 1 + pdu->harq_indication_tdd_rel13.number_of_ack_nack = uci->num_pucch_resources; + + pdu->harq_indication_tdd_rel13.harq_data[0].multiplex.value_0 = harq_ack[0]; + pdu->harq_indication_tdd_rel13.harq_data[1].multiplex.value_0 = harq_ack[1]; + if (uci->num_pucch_resources == 3) + pdu->harq_indication_tdd_rel13.harq_data[2].multiplex.value_0 = harq_ack[2]; + if (uci->num_pucch_resources == 4) + pdu->harq_indication_tdd_rel13.harq_data[3].multiplex.value_0 = harq_ack[3]; + // spatial-bundling in this case so release both HARQ if necessary + release_harq (eNB, UE_id, 0, frame, subframe, tdd_multiplexing_mask); + release_harq (eNB, UE_id, 1, frame, subframe, tdd_multiplexing_mask); } break; - case 2: // special bundling (SR collision) + case 2: // special bundling (SR collision) pdu->harq_indication_tdd_rel13.number_of_ack_nack = 1; - int tdd_config5_sf2scheds=0; - if (eNB->frame_parms.tdd_config==5) tdd_config5_sf2scheds = getM(eNB,frame,subframe); - + int tdd_config5_sf2scheds = 0; + if (eNB->frame_parms.tdd_config == 5) + tdd_config5_sf2scheds = getM (eNB, frame, subframe); + switch (harq_ack[0]) { case 0: - break; - case 1: // check if M=1,4,7 - if (uci->num_pucch_resources == 1 || uci->num_pucch_resources == 4 || - tdd_config5_sf2scheds == 1 || tdd_config5_sf2scheds == 4 || tdd_config5_sf2scheds == 7) { - release_harq(eNB,UE_id,0,frame,subframe,0xffff); - release_harq(eNB,UE_id,1,frame,subframe,0xffff); - } - break; - case 2: // check if M=2,5,8 - if (uci->num_pucch_resources == 2 || tdd_config5_sf2scheds == 2 || - tdd_config5_sf2scheds == 5 || tdd_config5_sf2scheds == 8) { - release_harq(eNB,UE_id,0,frame,subframe,0xffff); - release_harq(eNB,UE_id,1,frame,subframe,0xffff); - } - break; - case 3: // check if M=3,6,9 - if (uci->num_pucch_resources == 3 || tdd_config5_sf2scheds == 3 || - tdd_config5_sf2scheds == 6 || tdd_config5_sf2scheds == 9) { - release_harq(eNB,UE_id,0,frame,subframe,0xffff); - release_harq(eNB,UE_id,1,frame,subframe,0xffff); - } - break; + break; + case 1: // check if M=1,4,7 + if (uci->num_pucch_resources == 1 || uci->num_pucch_resources == 4 || tdd_config5_sf2scheds == 1 || tdd_config5_sf2scheds == 4 || tdd_config5_sf2scheds == 7) { + release_harq (eNB, UE_id, 0, frame, subframe, 0xffff); + release_harq (eNB, UE_id, 1, frame, subframe, 0xffff); + } + break; + case 2: // check if M=2,5,8 + if (uci->num_pucch_resources == 2 || tdd_config5_sf2scheds == 2 || tdd_config5_sf2scheds == 5 || tdd_config5_sf2scheds == 8) { + release_harq (eNB, UE_id, 0, frame, subframe, 0xffff); + release_harq (eNB, UE_id, 1, frame, subframe, 0xffff); + } + break; + case 3: // check if M=3,6,9 + if (uci->num_pucch_resources == 3 || tdd_config5_sf2scheds == 3 || tdd_config5_sf2scheds == 6 || tdd_config5_sf2scheds == 9) { + release_harq (eNB, UE_id, 0, frame, subframe, 0xffff); + release_harq (eNB, UE_id, 1, frame, subframe, 0xffff); + } + break; } break; } - } //TDD + } //TDD eNB->UL_INFO.harq_ind.number_of_harqs++; - pthread_mutex_unlock(&eNB->UL_INFO_mutex); + pthread_mutex_unlock (&eNB->UL_INFO_mutex); } -void fill_crc_indication(PHY_VARS_eNB *eNB,int UE_id,int frame,int subframe,uint8_t crc_flag) { +void +fill_crc_indication (PHY_VARS_eNB * eNB, int UE_id, int frame, int subframe, uint8_t crc_flag) +{ - pthread_mutex_lock(&eNB->UL_INFO_mutex); - nfapi_crc_indication_pdu_t *pdu = &eNB->UL_INFO.crc_ind.crc_pdu_list[eNB->UL_INFO.crc_ind.number_of_crcs]; + pthread_mutex_lock (&eNB->UL_INFO_mutex); + nfapi_crc_indication_pdu_t *pdu = &eNB->UL_INFO.crc_ind.crc_pdu_list[eNB->UL_INFO.crc_ind.number_of_crcs]; - pdu->instance_length = 0; // don't know what to do with this + pdu->instance_length = 0; // don't know what to do with this // pdu->rx_ue_information.handle = handle; - pdu->rx_ue_information.rnti = eNB->ulsch[UE_id]->rnti; - pdu->crc_indication_rel8.crc_flag = crc_flag; + pdu->rx_ue_information.rnti = eNB->ulsch[UE_id]->rnti; + pdu->crc_indication_rel8.crc_flag = crc_flag; eNB->UL_INFO.crc_ind.number_of_crcs++; - pthread_mutex_unlock(&eNB->UL_INFO_mutex); + pthread_mutex_unlock (&eNB->UL_INFO_mutex); } -void phy_procedures_eNB_uespec_RX(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,const relaying_type_t r_type) +void +phy_procedures_eNB_uespec_RX (PHY_VARS_eNB * eNB, eNB_rxtx_proc_t * proc, const relaying_type_t r_type) { //RX processing for ue-specific resources (i - LTE_DL_FRAME_PARMS *fp=&eNB->frame_parms; - const int subframe = proc->subframe_rx; - const int frame = proc->frame_rx; + LTE_DL_FRAME_PARMS *fp = &eNB->frame_parms; + const int subframe = proc->subframe_rx; + const int frame = proc->frame_rx; - if ((fp->frame_type == TDD) && (subframe_select(fp,subframe)!=SF_UL)) return; + if ((fp->frame_type == TDD) && (subframe_select (fp, subframe) != SF_UL)) + return; - T(T_ENB_PHY_UL_TICK, T_INT(eNB->Mod_id), T_INT(frame), T_INT(subframe)); + T (T_ENB_PHY_UL_TICK, T_INT (eNB->Mod_id), T_INT (frame), T_INT (subframe)); /* TODO: use correct rxdata */ - T(T_ENB_PHY_INPUT_SIGNAL, T_INT(eNB->Mod_id), T_INT(frame), T_INT(subframe), T_INT(0), - T_BUFFER(&eNB->RU_list[0]->common.rxdata[0][subframe*eNB->frame_parms.samples_per_tti], - eNB->frame_parms.samples_per_tti * 4)); + T (T_ENB_PHY_INPUT_SIGNAL, T_INT (eNB->Mod_id), T_INT (frame), T_INT (subframe), T_INT (0), + T_BUFFER (&eNB->RU_list[0]->common.rxdata[0][subframe * eNB->frame_parms.samples_per_tti], eNB->frame_parms.samples_per_tti * 4)); - VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_ENB_RX_UESPEC, 1 ); + VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME (VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_ENB_RX_UESPEC, 1); - LOG_D(PHY,"[eNB %d] Frame %d: Doing phy_procedures_eNB_uespec_RX(%d)\n",eNB->Mod_id,frame, subframe); + LOG_D (PHY, "[eNB %d] Frame %d: Doing phy_procedures_eNB_uespec_RX(%d)\n", eNB->Mod_id, frame, subframe); - eNB->rb_mask_ul[0]=0; - eNB->rb_mask_ul[1]=0; - eNB->rb_mask_ul[2]=0; - eNB->rb_mask_ul[3]=0; + eNB->rb_mask_ul[0] = 0; + eNB->rb_mask_ul[1] = 0; + eNB->rb_mask_ul[2] = 0; + eNB->rb_mask_ul[3] = 0; // Fix me here, these should be locked - eNB->UL_INFO.rx_ind.number_of_pdus = 0; + eNB->UL_INFO.rx_ind.number_of_pdus = 0; eNB->UL_INFO.crc_ind.number_of_crcs = 0; // Call SRS first since all others depend on presence of SRS or lack thereof - srs_procedures(eNB,proc); + srs_procedures (eNB, proc); eNB->first_run_I0_measurements = 0; - uci_procedures(eNB,proc); + uci_procedures (eNB, proc); - pusch_procedures(eNB,proc); + pusch_procedures (eNB, proc); - lte_eNB_I0_measurements(eNB, - subframe, - 0, - eNB->first_run_I0_measurements); + lte_eNB_I0_measurements (eNB, subframe, 0, eNB->first_run_I0_measurements); - int min_I0=1000,max_I0=0; - if ((frame==0) && (subframe==2)) { - for (int i=0;iframe_parms.N_RB_UL;i++) { - if (i==(eNB->frame_parms.N_RB_UL>>1) - 1) i+=2; - - if (eNB->measurements.n0_subband_power_tot_dB[i]measurements.n0_subband_power_tot_dB[i]; - if (eNB->measurements.n0_subband_power_tot_dB[i]>max_I0) max_I0 = eNB->measurements.n0_subband_power_tot_dB[i]; + int min_I0 = 1000, max_I0 = 0; + if ((frame == 0) && (subframe == 2)) { + for (int i = 0; i < eNB->frame_parms.N_RB_UL; i++) { + if (i == (eNB->frame_parms.N_RB_UL >> 1) - 1) + i += 2; + + if (eNB->measurements.n0_subband_power_tot_dB[i] < min_I0) + min_I0 = eNB->measurements.n0_subband_power_tot_dB[i]; + if (eNB->measurements.n0_subband_power_tot_dB[i] > max_I0) + max_I0 = eNB->measurements.n0_subband_power_tot_dB[i]; } - LOG_I(PHY,"max_I0 %d, min_I0 %d\n",max_I0,min_I0); + LOG_I (PHY, "max_I0 %d, min_I0 %d\n", max_I0, min_I0); } - - VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_ENB_RX_UESPEC, 0 ); - stop_meas(&eNB->phy_proc_rx); + VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME (VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_ENB_RX_UESPEC, 0); + + stop_meas (&eNB->phy_proc_rx); } - - - - diff --git a/openair2/LAYER2/MAC/eNB_scheduler_RA.c b/openair2/LAYER2/MAC/eNB_scheduler_RA.c index 158d49bbbd..26df2ea9c9 100755 --- a/openair2/LAYER2/MAC/eNB_scheduler_RA.c +++ b/openair2/LAYER2/MAC/eNB_scheduler_RA.c @@ -55,180 +55,181 @@ #include "pdcp.h" #if defined(ENABLE_ITTI) -# include "intertask_interface.h" +#include "intertask_interface.h" #endif -#include "SIMULATION/TOOLS/defs.h" // for taus +#include "SIMULATION/TOOLS/defs.h" // for taus #include "T.h" -void add_msg3(module_id_t module_idP,int CC_id, RA_TEMPLATE *RA_template, frame_t frameP, sub_frame_t subframeP) { +void +add_msg3 (module_id_t module_idP, int CC_id, RA_TEMPLATE * RA_template, frame_t frameP, sub_frame_t subframeP) +{ - eNB_MAC_INST *eNB = RC.mac[module_idP]; - COMMON_channels_t *cc = &eNB->common_channels[CC_id]; - uint8_t j; - nfapi_ul_config_request_t *ul_req; - nfapi_ul_config_request_pdu_t *ul_config_pdu; + eNB_MAC_INST *eNB = RC.mac[module_idP]; + COMMON_channels_t *cc = &eNB->common_channels[CC_id]; + uint8_t j; + nfapi_ul_config_request_t *ul_req; + nfapi_ul_config_request_pdu_t *ul_config_pdu; nfapi_ul_config_request_body_t *ul_req_body; - nfapi_hi_dci0_request_body_t *hi_dci0_req; - nfapi_hi_dci0_request_pdu_t *hi_dci0_pdu; + nfapi_hi_dci0_request_body_t *hi_dci0_req; + nfapi_hi_dci0_request_pdu_t *hi_dci0_pdu; - uint8_t rvseq[4] = {0,2,3,1}; + uint8_t rvseq[4] = { 0, 2, 3, 1 }; - hi_dci0_req = &eNB->HI_DCI0_req[CC_id].hi_dci0_request_body; - ul_req = &eNB->UL_req_tmp[CC_id][RA_template->Msg3_subframe]; - ul_req_body = &ul_req->ul_config_request_body; - AssertFatal(RA_template->RA_active == TRUE,"RA is not active for RA %X\n",RA_template->rnti); + hi_dci0_req = &eNB->HI_DCI0_req[CC_id].hi_dci0_request_body; + ul_req = &eNB->UL_req_tmp[CC_id][RA_template->Msg3_subframe]; + ul_req_body = &ul_req->ul_config_request_body; + AssertFatal (RA_template->RA_active == TRUE, "RA is not active for RA %X\n", RA_template->rnti); #ifdef Rel14 - if (RA_template->rach_resource_type>0) { - LOG_D(MAC,"[eNB %d][RAPROC] Frame %d, Subframe %d : CC_id %d CE level %d is active, Msg3 in (%d,%d)\n", - module_idP,frameP,subframeP,CC_id,RA_template->rach_resource_type-1, - RA_template->Msg3_frame,RA_template->Msg3_subframe); - LOG_D(MAC,"Frame %d, Subframe %d Adding Msg3 UL Config Request for (%d,%d) : (%d,%d)\n", - frameP,subframeP,RA_template->Msg3_frame,RA_template->Msg3_subframe,RA_template->msg3_nb_rb,RA_template->msg3_round); + if (RA_template->rach_resource_type > 0) { + LOG_D (MAC, "[eNB %d][RAPROC] Frame %d, Subframe %d : CC_id %d CE level %d is active, Msg3 in (%d,%d)\n", + module_idP, frameP, subframeP, CC_id, RA_template->rach_resource_type - 1, RA_template->Msg3_frame, RA_template->Msg3_subframe); + LOG_D (MAC, "Frame %d, Subframe %d Adding Msg3 UL Config Request for (%d,%d) : (%d,%d)\n", + frameP, subframeP, RA_template->Msg3_frame, RA_template->Msg3_subframe, RA_template->msg3_nb_rb, RA_template->msg3_round); - ul_config_pdu = &ul_req_body->ul_config_pdu_list[ul_req_body->number_of_pdus]; - - memset((void*)ul_config_pdu,0,sizeof(nfapi_ul_config_request_pdu_t)); - ul_config_pdu->pdu_type = NFAPI_UL_CONFIG_ULSCH_PDU_TYPE; - ul_config_pdu->pdu_size = (uint8_t)(2+sizeof(nfapi_ul_config_ulsch_pdu)); - ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.handle = eNB->ul_handle++; - ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.rnti = RA_template->rnti; - ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.resource_block_start = narrowband_to_first_rb(cc,RA_template->msg34_narrowband)+RA_template->msg3_first_rb; - ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.number_of_resource_blocks = RA_template->msg3_nb_rb; - ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.modulation_type = 2; - ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.cyclic_shift_2_for_drms = 0; - ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.frequency_hopping_enabled_flag = 0; - ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.frequency_hopping_bits = 0; - ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.new_data_indication = 0; - ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.redundancy_version = rvseq[RA_template->msg3_round]; - ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.harq_process_number = ((10*RA_template->Msg3_frame)+RA_template->Msg3_subframe)&7; - ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.ul_tx_mode = 0; - ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.current_tx_nb = 0; - ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.n_srs = 1; - ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.size = get_TBS_UL(RA_template->msg3_mcs, - RA_template->msg3_nb_rb); + ul_config_pdu = &ul_req_body->ul_config_pdu_list[ul_req_body->number_of_pdus]; + + memset ((void *) ul_config_pdu, 0, sizeof (nfapi_ul_config_request_pdu_t)); + ul_config_pdu->pdu_type = NFAPI_UL_CONFIG_ULSCH_PDU_TYPE; + ul_config_pdu->pdu_size = (uint8_t) (2 + sizeof (nfapi_ul_config_ulsch_pdu)); + ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.handle = eNB->ul_handle++; + ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.rnti = RA_template->rnti; + ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.resource_block_start = narrowband_to_first_rb (cc, RA_template->msg34_narrowband) + RA_template->msg3_first_rb; + ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.number_of_resource_blocks = RA_template->msg3_nb_rb; + ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.modulation_type = 2; + ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.cyclic_shift_2_for_drms = 0; + ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.frequency_hopping_enabled_flag = 0; + ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.frequency_hopping_bits = 0; + ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.new_data_indication = 0; + ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.redundancy_version = rvseq[RA_template->msg3_round]; + ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.harq_process_number = ((10 * RA_template->Msg3_frame) + RA_template->Msg3_subframe) & 7; + ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.ul_tx_mode = 0; + ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.current_tx_nb = 0; + ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.n_srs = 1; + ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.size = get_TBS_UL (RA_template->msg3_mcs, RA_template->msg3_nb_rb); // Re13 fields - ul_config_pdu->ulsch_pdu.ulsch_pdu_rel13.ue_type = RA_template->rach_resource_type>2 ? 2 : 1; - ul_config_pdu->ulsch_pdu.ulsch_pdu_rel13.total_number_of_repetitions = 1; - ul_config_pdu->ulsch_pdu.ulsch_pdu_rel13.repetition_number = 1; - ul_config_pdu->ulsch_pdu.ulsch_pdu_rel13.initial_transmission_sf_io = (RA_template->Msg3_frame*10)+RA_template->Msg3_subframe; + ul_config_pdu->ulsch_pdu.ulsch_pdu_rel13.ue_type = RA_template->rach_resource_type > 2 ? 2 : 1; + ul_config_pdu->ulsch_pdu.ulsch_pdu_rel13.total_number_of_repetitions = 1; + ul_config_pdu->ulsch_pdu.ulsch_pdu_rel13.repetition_number = 1; + ul_config_pdu->ulsch_pdu.ulsch_pdu_rel13.initial_transmission_sf_io = (RA_template->Msg3_frame * 10) + RA_template->Msg3_subframe; ul_req_body->number_of_pdus++; - } // if (RA_template->rach_resource_type>0) { + } // if (RA_template->rach_resource_type>0) { else #endif - { - LOG_D(MAC,"[eNB %d][RAPROC] Frame %d, Subframe %d : CC_id %d RA is active, Msg3 in (%d,%d)\n", - module_idP,frameP,subframeP,CC_id,RA_template->Msg3_frame,RA_template->Msg3_subframe); - - LOG_D(MAC,"Frame %d, Subframe %d Adding Msg3 UL Config Request for (%d,%d) : (%d,%d,%d)\n", - frameP,subframeP,RA_template->Msg3_frame,RA_template->Msg3_subframe, - RA_template->msg3_nb_rb,RA_template->msg3_first_rb,RA_template->msg3_round); - - ul_config_pdu = &ul_req_body->ul_config_pdu_list[ul_req_body->number_of_pdus]; - - memset((void*)ul_config_pdu,0,sizeof(nfapi_ul_config_request_pdu_t)); - ul_config_pdu->pdu_type = NFAPI_UL_CONFIG_ULSCH_PDU_TYPE; - ul_config_pdu->pdu_size = (uint8_t)(2+sizeof(nfapi_ul_config_ulsch_pdu)); - ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.handle = eNB->ul_handle++; - ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.rnti = RA_template->rnti; - ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.resource_block_start = RA_template->msg3_first_rb; - AssertFatal(RA_template->msg3_nb_rb > 0, "nb_rb = 0\n"); - ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.number_of_resource_blocks = RA_template->msg3_nb_rb; - ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.modulation_type = 2; - ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.cyclic_shift_2_for_drms = 0; - ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.frequency_hopping_enabled_flag = 0; - ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.frequency_hopping_bits = 0; - ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.new_data_indication = 0; - ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.redundancy_version = rvseq[RA_template->msg3_round]; - ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.harq_process_number = subframe2harqpid(cc,RA_template->Msg3_frame,RA_template->Msg3_subframe); - ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.ul_tx_mode = 0; - ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.current_tx_nb = 0; - ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.n_srs = 1; - ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.size = get_TBS_UL(10,RA_template->msg3_nb_rb); - ul_req_body->number_of_pdus++; + { + LOG_D (MAC, "[eNB %d][RAPROC] Frame %d, Subframe %d : CC_id %d RA is active, Msg3 in (%d,%d)\n", module_idP, frameP, subframeP, CC_id, RA_template->Msg3_frame, RA_template->Msg3_subframe); + + LOG_D (MAC, "Frame %d, Subframe %d Adding Msg3 UL Config Request for (%d,%d) : (%d,%d,%d)\n", + frameP, subframeP, RA_template->Msg3_frame, RA_template->Msg3_subframe, RA_template->msg3_nb_rb, RA_template->msg3_first_rb, RA_template->msg3_round); + + ul_config_pdu = &ul_req_body->ul_config_pdu_list[ul_req_body->number_of_pdus]; + + memset ((void *) ul_config_pdu, 0, sizeof (nfapi_ul_config_request_pdu_t)); + ul_config_pdu->pdu_type = NFAPI_UL_CONFIG_ULSCH_PDU_TYPE; + ul_config_pdu->pdu_size = (uint8_t) (2 + sizeof (nfapi_ul_config_ulsch_pdu)); + ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.handle = eNB->ul_handle++; + ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.rnti = RA_template->rnti; + ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.resource_block_start = RA_template->msg3_first_rb; + AssertFatal (RA_template->msg3_nb_rb > 0, "nb_rb = 0\n"); + ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.number_of_resource_blocks = RA_template->msg3_nb_rb; + ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.modulation_type = 2; + ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.cyclic_shift_2_for_drms = 0; + ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.frequency_hopping_enabled_flag = 0; + ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.frequency_hopping_bits = 0; + ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.new_data_indication = 0; + ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.redundancy_version = rvseq[RA_template->msg3_round]; + ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.harq_process_number = subframe2harqpid (cc, RA_template->Msg3_frame, RA_template->Msg3_subframe); + ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.ul_tx_mode = 0; + ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.current_tx_nb = 0; + ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.n_srs = 1; + ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.size = get_TBS_UL (10, RA_template->msg3_nb_rb); + ul_req_body->number_of_pdus++; + // save UL scheduling information for preprocessor + for (j = 0; j < RA_template->msg3_nb_rb; j++) + cc->vrb_map_UL[RA_template->msg3_first_rb + j] = 1; + + + if (RA_template->msg3_round != 0) { // program HI too + hi_dci0_pdu = &hi_dci0_req->hi_dci0_pdu_list[hi_dci0_req->number_of_dci + hi_dci0_req->number_of_hi]; + memset ((void *) hi_dci0_pdu, 0, sizeof (nfapi_hi_dci0_request_pdu_t)); + hi_dci0_pdu->pdu_type = NFAPI_HI_DCI0_HI_PDU_TYPE; + hi_dci0_pdu->pdu_size = 2 + sizeof (nfapi_hi_dci0_hi_pdu); + hi_dci0_pdu->hi_pdu.hi_pdu_rel8.resource_block_start = RA_template->msg3_first_rb; + hi_dci0_pdu->hi_pdu.hi_pdu_rel8.cyclic_shift_2_for_drms = 0; + hi_dci0_pdu->hi_pdu.hi_pdu_rel8.hi_value = 0; + hi_dci0_req->number_of_hi++; // save UL scheduling information for preprocessor - for (j=0;jmsg3_nb_rb;j++) cc->vrb_map_UL[RA_template->msg3_first_rb+j]=1; - - - if (RA_template->msg3_round != 0) { // program HI too - hi_dci0_pdu = &hi_dci0_req->hi_dci0_pdu_list[hi_dci0_req->number_of_dci+hi_dci0_req->number_of_hi]; - memset((void*)hi_dci0_pdu,0,sizeof(nfapi_hi_dci0_request_pdu_t)); - hi_dci0_pdu->pdu_type = NFAPI_HI_DCI0_HI_PDU_TYPE; - hi_dci0_pdu->pdu_size = 2+sizeof(nfapi_hi_dci0_hi_pdu); - hi_dci0_pdu->hi_pdu.hi_pdu_rel8.resource_block_start = RA_template->msg3_first_rb; - hi_dci0_pdu->hi_pdu.hi_pdu_rel8.cyclic_shift_2_for_drms = 0; - hi_dci0_pdu->hi_pdu.hi_pdu_rel8.hi_value = 0; - hi_dci0_req->number_of_hi++; - // save UL scheduling information for preprocessor - for (j=0;jmsg3_nb_rb;j++) cc->vrb_map_UL[RA_template->msg3_first_rb+j]=1; - - LOG_D(MAC,"[eNB %d][PUSCH-RA %x] CC_id %d Frame %d subframeP %d Scheduled (PHICH) RA (mcs %d, first rb %d, nb_rb %d,round %d)\n", - module_idP,RA_template->rnti,CC_id,frameP,subframeP,10, - 1,1, - RA_template->msg3_round-1); - } // if (RA_template->msg3_round != 0) { // program HI too - } // non-BL/CE UE case + for (j = 0; j < RA_template->msg3_nb_rb; j++) + cc->vrb_map_UL[RA_template->msg3_first_rb + j] = 1; + + LOG_D (MAC, "[eNB %d][PUSCH-RA %x] CC_id %d Frame %d subframeP %d Scheduled (PHICH) RA (mcs %d, first rb %d, nb_rb %d,round %d)\n", + module_idP, RA_template->rnti, CC_id, frameP, subframeP, 10, 1, 1, RA_template->msg3_round - 1); + } // if (RA_template->msg3_round != 0) { // program HI too + } // non-BL/CE UE case } -void generate_Msg2(module_id_t module_idP,int CC_idP,frame_t frameP,sub_frame_t subframeP,RA_TEMPLATE *RA_template) { +void +generate_Msg2 (module_id_t module_idP, int CC_idP, frame_t frameP, sub_frame_t subframeP, RA_TEMPLATE * RA_template) +{ - eNB_MAC_INST *eNB = RC.mac[module_idP]; - COMMON_channels_t *cc = eNB->common_channels; - - uint8_t *vrb_map; - int first_rb; - int N_RB_DL; - nfapi_dl_config_request_pdu_t *dl_config_pdu; - nfapi_tx_request_pdu_t *TX_req; + eNB_MAC_INST *eNB = RC.mac[module_idP]; + COMMON_channels_t *cc = eNB->common_channels; + + uint8_t *vrb_map; + int first_rb; + int N_RB_DL; + nfapi_dl_config_request_pdu_t *dl_config_pdu; + nfapi_tx_request_pdu_t *TX_req; nfapi_dl_config_request_body_t *dl_req; - vrb_map = cc[CC_idP].vrb_map; - dl_req = &eNB->DL_req[CC_idP].dl_config_request_body; - dl_config_pdu = &dl_req->dl_config_pdu_list[dl_req->number_pdu]; - N_RB_DL = to_prb(cc[CC_idP].mib->message.dl_Bandwidth); + vrb_map = cc[CC_idP].vrb_map; + dl_req = &eNB->DL_req[CC_idP].dl_config_request_body; + dl_config_pdu = &dl_req->dl_config_pdu_list[dl_req->number_pdu]; + N_RB_DL = to_prb (cc[CC_idP].mib->message.dl_Bandwidth); #ifdef Rel14 - int rmax = 0; - int rep = 0; - int reps = 0; - int num_nb = 0; + int rmax = 0; + int rep = 0; + int reps = 0; + int num_nb = 0; - first_rb = 0; + first_rb = 0; struct PRACH_ConfigSIB_v1310 *ext4_prach; PRACH_ParametersListCE_r13_t *prach_ParametersListCE_r13; - PRACH_ParametersCE_r13_t *p[4]={NULL,NULL,NULL,NULL}; + PRACH_ParametersCE_r13_t *p[4] = { NULL, NULL, NULL, NULL }; - uint16_t absSF = (10*frameP)+subframeP; - uint16_t absSF_Msg2 = (10*RA_template->Msg2_frame)+RA_template->Msg2_subframe; + uint16_t absSF = (10 * frameP) + subframeP; + uint16_t absSF_Msg2 = (10 * RA_template->Msg2_frame) + RA_template->Msg2_subframe; + + if (absSF > absSF_Msg2) + return; // we're not ready yet, need to be to start == - if (absSF>absSF_Msg2) return; // we're not ready yet, need to be to start == - if (cc[CC_idP].radioResourceConfigCommon_BR) { - ext4_prach = cc[CC_idP].radioResourceConfigCommon_BR->ext4->prach_ConfigCommon_v1310; + ext4_prach = cc[CC_idP].radioResourceConfigCommon_BR->ext4->prach_ConfigCommon_v1310; prach_ParametersListCE_r13 = &ext4_prach->prach_ParametersListCE_r13; - + switch (prach_ParametersListCE_r13->list.count) { case 4: - p[3]=prach_ParametersListCE_r13->list.array[3]; + p[3] = prach_ParametersListCE_r13->list.array[3]; case 3: - p[2]=prach_ParametersListCE_r13->list.array[2]; + p[2] = prach_ParametersListCE_r13->list.array[2]; case 2: - p[1]=prach_ParametersListCE_r13->list.array[1]; + p[1] = prach_ParametersListCE_r13->list.array[1]; case 1: - p[0]=prach_ParametersListCE_r13->list.array[0]; + p[0] = prach_ParametersListCE_r13->list.array[0]; break; default: - AssertFatal(1==0,"Illegal count for prach_ParametersListCE_r13 %d\n",(int)prach_ParametersListCE_r13->list.count); + AssertFatal (1 == 0, "Illegal count for prach_ParametersListCE_r13 %d\n", (int) prach_ParametersListCE_r13->list.count); break; } } if (RA_template->rach_resource_type > 0) { - + // This uses an MPDCCH Type 2 common allocation according to Section 9.1.5 36-213 // Parameters: // p=2+4 PRB set (number of PRB pairs 3) @@ -236,365 +237,351 @@ void generate_Msg2(module_id_t module_idP,int CC_idP,frame_t frameP,sub_frame_t // if CELevel = 0,1 => Table 9.1.5-1b for MPDCCH candidates // if CELevel = 2,3 => Table 9.1.5-2b for MPDCCH candidates // distributed transmission - + // rmax from SIB2 information - AssertFatal(rmax<9,"rmax>8!\n"); - rmax = 1<rach_resource_type-1]->mpdcch_NumRepetition_RA_r13; + AssertFatal (rmax < 9, "rmax>8!\n"); + rmax = 1 << p[RA_template->rach_resource_type - 1]->mpdcch_NumRepetition_RA_r13; // choose r1 by default for RAR (Table 9.1.5-5) - rep = 0; + rep = 0; // get actual repetition count from Table 9.1.5-3 - reps = (rmax<=8)?(1<>(3-rep)); + reps = (rmax <= 8) ? (1 << rep) : (rmax >> (3 - rep)); // get narrowband according to higher-layer config - num_nb = p[RA_template->rach_resource_type-1]->mpdcch_NarrowbandsToMonitor_r13.list.count; - RA_template->msg2_narrowband = *p[RA_template->rach_resource_type-1]->mpdcch_NarrowbandsToMonitor_r13.list.array[RA_template->preamble_index%num_nb]; - first_rb = narrowband_to_first_rb(&cc[CC_idP],RA_template->msg2_narrowband); - - if ((RA_template->msg2_mpdcch_repetition_cnt == 0) && - (mpdcch_sf_condition(eNB,CC_idP,frameP,subframeP,rmax,TYPE2,-1)>0)){ + num_nb = p[RA_template->rach_resource_type - 1]->mpdcch_NarrowbandsToMonitor_r13.list.count; + RA_template->msg2_narrowband = *p[RA_template->rach_resource_type - 1]->mpdcch_NarrowbandsToMonitor_r13.list.array[RA_template->preamble_index % num_nb]; + first_rb = narrowband_to_first_rb (&cc[CC_idP], RA_template->msg2_narrowband); + + if ((RA_template->msg2_mpdcch_repetition_cnt == 0) && (mpdcch_sf_condition (eNB, CC_idP, frameP, subframeP, rmax, TYPE2, -1) > 0)) { // MPDCCH configuration for RAR - LOG_D(MAC,"[eNB %d][RAPROC] Frame %d, Subframe %d : In generate_Msg2, Programming MPDCCH %d repetitions\n", - module_idP,frameP,subframeP,reps); - - - memset((void*)dl_config_pdu,0,sizeof(nfapi_dl_config_request_pdu_t)); - dl_config_pdu->pdu_type = NFAPI_DL_CONFIG_MPDCCH_PDU_TYPE; - dl_config_pdu->pdu_size = (uint8_t)(2+sizeof(nfapi_dl_config_mpdcch_pdu)); - dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.dci_format = (RA_template->rach_resource_type > 1) ? 11 : 10; - dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.mpdcch_narrow_band = RA_template->msg2_narrowband; - dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.number_of_prb_pairs = 6; - dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.resource_block_assignment = 0; // Note: this can be dynamic - dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.mpdcch_tansmission_type = 1; // imposed (9.1.5 in 213) for Type 2 Common search space - AssertFatal(cc[CC_idP].sib1_v13ext->bandwidthReducedAccessRelatedInfo_r13!=NULL, - "cc[CC_id].sib1_v13ext->bandwidthReducedAccessRelatedInfo_r13 is null\n"); - dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.start_symbol = cc[CC_idP].sib1_v13ext->bandwidthReducedAccessRelatedInfo_r13->startSymbolBR_r13; - dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.ecce_index = 0; // Note: this should be dynamic - dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.aggregation_level = 16; // OK for CEModeA r1-3 (9.1.5-1b) or CEModeB r1-4 - dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.rnti_type = 2; // RA-RNTI - dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.rnti = RA_template->RA_rnti; - dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.ce_mode = (RA_template->rach_resource_type < 3) ? 1 : 2; - dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.drms_scrambling_init = cc[CC_idP].physCellId; - dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.initial_transmission_sf_io = (frameP*10)+subframeP; - dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.transmission_power = 6000; // 0dB - dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.resource_block_coding = getRIV(6,0,6); // Note: still to be checked if it should not be (getRIV(N_RB_DL,first_rb,6)) : Check nFAPI specifications and what is done L1 with this parameter - dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.mcs = 4; // adjust according to size of RAR, 208 bits with N1A_PRB=3 - dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.pdsch_reptition_levels = 4; // fix to 4 for now - dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.redundancy_version = 0; - dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.new_data_indicator = 0; - dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.harq_process = 0; - dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.tpmi_length = 0; - dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.tpmi = 0; - dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.pmi_flag = 0; - dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.pmi = 0; - dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.harq_resource_offset = 0; - dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.dci_subframe_repetition_number = rep; - dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.tpc = 1;// N1A_PRB=3 (36.212); => 208 bits for mcs=4, choose mcs according t message size TBD - dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.downlink_assignment_index_length = 0; - dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.downlink_assignment_index = 0; - dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.allocate_prach_flag = 0; - dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.preamble_index = 0; - dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.prach_mask_index = 0; - dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.starting_ce_level = 0; - dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.srs_request = 0; - dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.antenna_ports_and_scrambling_identity_flag = 0; - dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.antenna_ports_and_scrambling_identity = 0; - dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.frequency_hopping_enabled_flag = 0; + LOG_I (MAC, "[eNB %d][RAPROC] Frame %d, Subframe %d : In generate_Msg2, Programming MPDCCH %d repetitions\n", module_idP, frameP, subframeP, reps); + + + memset ((void *) dl_config_pdu, 0, sizeof (nfapi_dl_config_request_pdu_t)); + dl_config_pdu->pdu_type = NFAPI_DL_CONFIG_MPDCCH_PDU_TYPE; + dl_config_pdu->pdu_size = (uint8_t) (2 + sizeof (nfapi_dl_config_mpdcch_pdu)); + dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.dci_format = (RA_template->rach_resource_type > 1) ? 11 : 10; + dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.mpdcch_narrow_band = RA_template->msg2_narrowband; + dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.number_of_prb_pairs = 6; + dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.resource_block_assignment = 0; // Note: this can be dynamic + dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.mpdcch_tansmission_type = 1; // imposed (9.1.5 in 213) for Type 2 Common search space + AssertFatal (cc[CC_idP].sib1_v13ext->bandwidthReducedAccessRelatedInfo_r13 != NULL, "cc[CC_id].sib1_v13ext->bandwidthReducedAccessRelatedInfo_r13 is null\n"); + dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.start_symbol = cc[CC_idP].sib1_v13ext->bandwidthReducedAccessRelatedInfo_r13->startSymbolBR_r13; + dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.ecce_index = 0; // Note: this should be dynamic + dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.aggregation_level = 16; // OK for CEModeA r1-3 (9.1.5-1b) or CEModeB r1-4 + dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.rnti_type = 2; // RA-RNTI + dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.rnti = RA_template->RA_rnti; + dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.ce_mode = (RA_template->rach_resource_type < 3) ? 1 : 2; + dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.drms_scrambling_init = cc[CC_idP].physCellId; + dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.initial_transmission_sf_io = (frameP * 10) + subframeP; + dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.transmission_power = 6000; // 0dB + dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.resource_block_coding = getRIV (6, 0, 6); // Note: still to be checked if it should not be (getRIV(N_RB_DL,first_rb,6)) : Check nFAPI specifications and what is done L1 with this parameter + dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.mcs = 4; // adjust according to size of RAR, 208 bits with N1A_PRB=3 + dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.pdsch_reptition_levels = 4; // fix to 4 for now + dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.redundancy_version = 0; + dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.new_data_indicator = 0; + dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.harq_process = 0; + dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.tpmi_length = 0; + dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.tpmi = 0; + dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.pmi_flag = 0; + dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.pmi = 0; + dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.harq_resource_offset = 0; + dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.dci_subframe_repetition_number = rep; + dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.tpc = 1; // N1A_PRB=3 (36.212); => 208 bits for mcs=4, choose mcs according t message size TBD + dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.downlink_assignment_index_length = 0; + dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.downlink_assignment_index = 0; + dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.allocate_prach_flag = 0; + dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.preamble_index = 0; + dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.prach_mask_index = 0; + dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.starting_ce_level = 0; + dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.srs_request = 0; + dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.antenna_ports_and_scrambling_identity_flag = 0; + dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.antenna_ports_and_scrambling_identity = 0; + dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.frequency_hopping_enabled_flag = 0; dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.paging_direct_indication_differentiation_flag = 0; - dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.direct_indication = 0; - dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.total_dci_length_including_padding = 0; // this is not needed by OAI L1, but should be filled in - dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.number_of_tx_antenna_ports = 1; + dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.direct_indication = 0; + dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.total_dci_length_including_padding = 0; // this is not needed by OAI L1, but should be filled in + dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.number_of_tx_antenna_ports = 1; RA_template->msg2_mpdcch_repetition_cnt++; dl_req->number_pdu++; - } //repetition_count==0 && SF condition met - if (RA_template->msg2_mpdcch_repetition_cnt>0) { // we're in a stream of repetitions + RA_template->Msg2_subframe = (RA_template->Msg2_subframe + 9) % 10; - if (RA_template->msg2_mpdcch_repetition_cnt==reps) { // this is the last mpdcch repetition - if (cc[CC_idP].tdd_Config==NULL) { // FDD case - // wait 2 subframes for PDSCH transmission - if (subframeP>7) RA_template->Msg2_frame = (frameP+1)&1023; - else RA_template->Msg2_frame = frameP; - RA_template->Msg2_subframe = (subframeP+2)%10; // +2 is the "n+x" from Section 7.1.11 in 36.213 - LOG_I(MAC,"[eNB %d][RAPROC] SFN %d.%d : Set Msg2 in %d.%d\n",frameP,subframeP,RA_template->Msg2_frame,RA_template->Msg2_subframe); - } - else { - AssertFatal(1==0,"TDD case not done yet\n"); - } - }// mpdcch_repetition_count == reps + } //repetition_count==0 && SF condition met + if (RA_template->msg2_mpdcch_repetition_cnt > 0) { // we're in a stream of repetitions + + + if (RA_template->msg2_mpdcch_repetition_cnt == reps) { // this is the last mpdcch repetition + if (cc[CC_idP].tdd_Config == NULL) { // FDD case + // wait 2 subframes for PDSCH transmission + if (subframeP > 7) + RA_template->Msg2_frame = (frameP + 1) & 1023; + else + RA_template->Msg2_frame = frameP; + RA_template->Msg2_subframe = (subframeP + 2) % 10; // +2 is the "n+x" from Section 7.1.11 in 36.213 + LOG_I(MAC,"[eNB %d][RAPROC] Frame %d, Subframe %d : In generate_Msg2, programmed Msg2 for %d.%d\n", module_idP, frameP, subframeP, RA_template->Msg2_frame,RA_template->Msg2_subframe); + } else { + AssertFatal (1 == 0, "TDD case not done yet\n"); + } + } // mpdcch_repetition_count == reps else { - LOG_I(MAC,"[eNB %d][RAPROC] Frame %d, Subframe %d : In generate_Msg2, MPDCCH repetition %d\n", - module_idP,frameP,subframeP,RA_template->msg2_mpdcch_repetition_cnt); - RA_template->msg2_mpdcch_repetition_cnt++; + LOG_I (MAC, "[eNB %d][RAPROC] Frame %d, Subframe %d : In generate_Msg2, MPDCCH repetition %d\n", module_idP, frameP, subframeP, RA_template->msg2_mpdcch_repetition_cnt); + RA_template->msg2_mpdcch_repetition_cnt++; } if ((RA_template->Msg2_frame == frameP) && (RA_template->Msg2_subframe == subframeP)) { - // Program PDSCH - LOG_I(MAC,"[eNB %d][RAPROC] Frame %d, Subframe %d : In generate_Msg2, Programming PDSCH %d\n", - module_idP,frameP,subframeP); - RA_template->generate_rar = 0; - - dl_config_pdu = &dl_req->dl_config_pdu_list[dl_req->number_pdu]; - memset((void*)dl_config_pdu,0,sizeof(nfapi_dl_config_request_pdu_t)); - dl_config_pdu->pdu_type = NFAPI_DL_CONFIG_DLSCH_PDU_TYPE; - dl_config_pdu->pdu_size = (uint8_t)(2+sizeof(nfapi_dl_config_dlsch_pdu)); - dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.pdu_index = eNB->pdu_index[CC_idP]; - dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.rnti = RA_template->RA_rnti; - dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.resource_allocation_type = 2; - dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.virtual_resource_block_assignment_flag = 0; // localized - dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.resource_block_coding = getRIV(N_RB_DL,first_rb,6); - dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.modulation = 2; //QPSK - dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.redundancy_version = 0; - dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.transport_blocks = 1;// first block - dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.transport_block_to_codeword_swap_flag = 0; - dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.transmission_scheme = (cc->p_eNB==1 ) ? 0 : 1; - dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.number_of_layers = 1; - dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.number_of_subbands = 1; - // dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.codebook_index = ; - dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.ue_category_capacity = 1; - dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.pa = 4; // 0 dB - dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.delta_power_offset_index = 0; - dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.ngap = 0; - dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.nprb = get_subbandsize(cc->mib->message.dl_Bandwidth); // ignored - dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.transmission_mode = (cc->p_eNB==1 ) ? 1 : 2; - dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.num_bf_prb_per_subband = 1; - dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.num_bf_vector = 1; - // dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.bf_vector = ; + // Program PDSCH + LOG_I (MAC, "[eNB %d][RAPROC] Frame %d, Subframe %d : In generate_Msg2, Programming PDSCH %d\n", module_idP, frameP, subframeP); + RA_template->generate_rar = 0; - // Rel10 fields - dl_config_pdu->dlsch_pdu.dlsch_pdu_rel10.pdsch_start = cc[CC_idP].sib1_v13ext->bandwidthReducedAccessRelatedInfo_r13->startSymbolBR_r13; - // Rel13 fields - dl_config_pdu->dlsch_pdu.dlsch_pdu_rel13.ue_type = (RA_template->rach_resource_type < 3) ? 1 : 2;; - dl_config_pdu->dlsch_pdu.dlsch_pdu_rel13.pdsch_payload_type = 2; // not SI message - dl_config_pdu->dlsch_pdu.dlsch_pdu_rel13.initial_transmission_sf_io = (10*frameP)+subframeP; - dl_config_pdu->dlsch_pdu.dlsch_pdu_rel13.drms_table_flag = 0; - dl_req->number_pdu++; - - // Program UL processing for Msg3, same as regular LTE - get_Msg3alloc(&cc[CC_idP],subframeP,frameP,&RA_template->Msg3_frame,&RA_template->Msg3_subframe); - add_msg3(module_idP,CC_idP, RA_template,frameP,subframeP); - fill_rar_br(eNB,CC_idP,RA_template,frameP,subframeP,cc[CC_idP].RAR_pdu.payload,RA_template->rach_resource_type-1); - // DL request - eNB->TX_req[CC_idP].sfn_sf = (frameP<<4)+subframeP; - TX_req = &eNB->TX_req[CC_idP].tx_request_body.tx_pdu_list[eNB->TX_req[CC_idP].tx_request_body.number_of_pdus]; - TX_req->pdu_length = 7; // This should be changed if we have more than 1 preamble - TX_req->pdu_index = eNB->pdu_index[CC_idP]++; - TX_req->num_segments = 1; - TX_req->segments[0].segment_length = 7; - TX_req->segments[0].segment_data = cc[CC_idP].RAR_pdu.payload; - eNB->TX_req[CC_idP].tx_request_body.number_of_pdus++; + dl_config_pdu = &dl_req->dl_config_pdu_list[dl_req->number_pdu]; + memset ((void *) dl_config_pdu, 0, sizeof (nfapi_dl_config_request_pdu_t)); + dl_config_pdu->pdu_type = NFAPI_DL_CONFIG_DLSCH_PDU_TYPE; + dl_config_pdu->pdu_size = (uint8_t) (2 + sizeof (nfapi_dl_config_dlsch_pdu)); + dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.pdu_index = eNB->pdu_index[CC_idP]; + dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.rnti = RA_template->RA_rnti; + dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.resource_allocation_type = 2; + dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.virtual_resource_block_assignment_flag = 0; // localized + dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.resource_block_coding = getRIV (N_RB_DL, first_rb, 6); + dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.modulation = 2; //QPSK + dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.redundancy_version = 0; + dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.transport_blocks = 1; // first block + dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.transport_block_to_codeword_swap_flag = 0; + dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.transmission_scheme = (cc->p_eNB == 1) ? 0 : 1; + dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.number_of_layers = 1; + dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.number_of_subbands = 1; + // dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.codebook_index = ; + dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.ue_category_capacity = 1; + dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.pa = 4; // 0 dB + dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.delta_power_offset_index = 0; + dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.ngap = 0; + dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.nprb = get_subbandsize (cc->mib->message.dl_Bandwidth); // ignored + dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.transmission_mode = (cc->p_eNB == 1) ? 1 : 2; + dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.num_bf_prb_per_subband = 1; + dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.num_bf_vector = 1; + // dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.bf_vector = ; + + // Rel10 fields + dl_config_pdu->dlsch_pdu.dlsch_pdu_rel10.pdsch_start = cc[CC_idP].sib1_v13ext->bandwidthReducedAccessRelatedInfo_r13->startSymbolBR_r13; + // Rel13 fields + dl_config_pdu->dlsch_pdu.dlsch_pdu_rel13.ue_type = (RA_template->rach_resource_type < 3) ? 1 : 2;; + dl_config_pdu->dlsch_pdu.dlsch_pdu_rel13.pdsch_payload_type = 2; // not SI message + dl_config_pdu->dlsch_pdu.dlsch_pdu_rel13.initial_transmission_sf_io = (10 * frameP) + subframeP; + dl_config_pdu->dlsch_pdu.dlsch_pdu_rel13.drms_table_flag = 0; + dl_req->number_pdu++; + + // Program UL processing for Msg3, same as regular LTE + get_Msg3alloc (&cc[CC_idP], subframeP, frameP, &RA_template->Msg3_frame, &RA_template->Msg3_subframe); + add_msg3 (module_idP, CC_idP, RA_template, frameP, subframeP); + fill_rar_br (eNB, CC_idP, RA_template, frameP, subframeP, cc[CC_idP].RAR_pdu.payload, RA_template->rach_resource_type - 1); + // DL request + eNB->TX_req[CC_idP].sfn_sf = (frameP << 4) + subframeP; + TX_req = &eNB->TX_req[CC_idP].tx_request_body.tx_pdu_list[eNB->TX_req[CC_idP].tx_request_body.number_of_pdus]; + TX_req->pdu_length = 7; // This should be changed if we have more than 1 preamble + TX_req->pdu_index = eNB->pdu_index[CC_idP]++; + TX_req->num_segments = 1; + TX_req->segments[0].segment_length = 7; + TX_req->segments[0].segment_data = cc[CC_idP].RAR_pdu.payload; + eNB->TX_req[CC_idP].tx_request_body.number_of_pdus++; } - } - - } - else + } + + } else #endif - { + { - if ((RA_template->Msg2_frame == frameP) && (RA_template->Msg2_subframe == subframeP)) { - LOG_I(MAC,"[eNB %d] CC_id %d Frame %d, subframeP %d: Generating RAR DCI, RA_active %d format 1A (%d,%d))\n", - module_idP, CC_idP, frameP, subframeP, - RA_template->RA_active, - - RA_template->RA_dci_fmt1, - RA_template->RA_dci_size_bits1); + if ((RA_template->Msg2_frame == frameP) && (RA_template->Msg2_subframe == subframeP)) { + LOG_I (MAC, "[eNB %d] CC_id %d Frame %d, subframeP %d: Generating RAR DCI, RA_active %d format 1A (%d,%d))\n", + module_idP, CC_idP, frameP, subframeP, RA_template->RA_active, RA_template->RA_dci_fmt1, RA_template->RA_dci_size_bits1); - // Allocate 4 PRBS starting in RB 0 - first_rb = 0; - vrb_map[first_rb] = 1; - vrb_map[first_rb+1] = 1; - vrb_map[first_rb+2] = 1; - vrb_map[first_rb+3] = 1; - - memset((void*)dl_config_pdu,0,sizeof(nfapi_dl_config_request_pdu_t)); - dl_config_pdu->pdu_type = NFAPI_DL_CONFIG_DCI_DL_PDU_TYPE; - dl_config_pdu->pdu_size = (uint8_t)(2+sizeof(nfapi_dl_config_dci_dl_pdu)); - dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.dci_format = NFAPI_DL_DCI_FORMAT_1A; - dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.aggregation_level = 4; - dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.rnti = RA_template->RA_rnti; - dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.rnti_type = 2; // RA-RNTI : see Table 4-10 from SCF082 - nFAPI specifications - dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.transmission_power = 6000; // equal to RS power - - dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.harq_process = 0; - dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.tpc = 1; // no TPC - dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.new_data_indicator_1 = 1; - dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.mcs_1 = 0; - dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.redundancy_version_1 = 0; - dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.virtual_resource_block_assignment_flag = 0; - - dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.resource_block_coding = getRIV(N_RB_DL,first_rb,4); + // Allocate 4 PRBS starting in RB 0 + first_rb = 0; + vrb_map[first_rb] = 1; + vrb_map[first_rb + 1] = 1; + vrb_map[first_rb + 2] = 1; + vrb_map[first_rb + 3] = 1; - // This checks if the above DCI allocation is feasible in current subframe - if (!CCE_allocation_infeasible(module_idP,CC_idP,0,subframeP,dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.aggregation_level,RA_template->RA_rnti)) { - LOG_D(MAC,"Frame %d: Subframe %d : Adding common DCI for RA_RNTI %x\n", - frameP,subframeP,RA_template->RA_rnti); - dl_req->number_dci++; - dl_req->number_pdu++; - - dl_config_pdu = &dl_req->dl_config_pdu_list[dl_req->number_pdu]; - memset((void*)dl_config_pdu,0,sizeof(nfapi_dl_config_request_pdu_t)); - dl_config_pdu->pdu_type = NFAPI_DL_CONFIG_DLSCH_PDU_TYPE; - dl_config_pdu->pdu_size = (uint8_t)(2+sizeof(nfapi_dl_config_dlsch_pdu)); - dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.pdu_index = eNB->pdu_index[CC_idP]; - dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.rnti = RA_template->RA_rnti; - dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.resource_allocation_type = 2; // format 1A/1B/1D - dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.virtual_resource_block_assignment_flag = 0; // localized - dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.resource_block_coding = getRIV(N_RB_DL,first_rb,4); - dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.modulation = 2; //QPSK - dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.redundancy_version = 0; - dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.transport_blocks = 1;// first block - dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.transport_block_to_codeword_swap_flag = 0; - dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.transmission_scheme = (cc->p_eNB==1 ) ? 0 : 1; - dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.number_of_layers = 1; - dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.number_of_subbands = 1; - // dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.codebook_index = ; - dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.ue_category_capacity = 1; - dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.pa = 4; // 0 dB - dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.delta_power_offset_index = 0; - dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.ngap = 0; - dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.nprb = get_subbandsize(cc->mib->message.dl_Bandwidth); // ignored - dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.transmission_mode = (cc->p_eNB==1 ) ? 1 : 2; - dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.num_bf_prb_per_subband = 1; - dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.num_bf_vector = 1; - // dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.bf_vector = ; - dl_req->number_pdu++; - - // Program UL processing for Msg3 - get_Msg3alloc(&cc[CC_idP],subframeP,frameP,&RA_template->Msg3_frame,&RA_template->Msg3_subframe); - LOG_D(MAC,"Frame %d, Subframe %d: Setting Msg3 reception for Frame %d Subframe %d\n", - frameP,subframeP,RA_template->Msg3_frame,RA_template->Msg3_subframe); - - fill_rar(module_idP,CC_idP,frameP,cc[CC_idP].RAR_pdu.payload,N_RB_DL,7); - add_msg3(module_idP,CC_idP, RA_template,frameP,subframeP); + memset ((void *) dl_config_pdu, 0, sizeof (nfapi_dl_config_request_pdu_t)); + dl_config_pdu->pdu_type = NFAPI_DL_CONFIG_DCI_DL_PDU_TYPE; + dl_config_pdu->pdu_size = (uint8_t) (2 + sizeof (nfapi_dl_config_dci_dl_pdu)); + dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.dci_format = NFAPI_DL_DCI_FORMAT_1A; + dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.aggregation_level = 4; + dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.rnti = RA_template->RA_rnti; + dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.rnti_type = 2; // RA-RNTI : see Table 4-10 from SCF082 - nFAPI specifications + dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.transmission_power = 6000; // equal to RS power - // DL request - eNB->TX_req[CC_idP].sfn_sf = (frameP<<4)+subframeP; - TX_req = &eNB->TX_req[CC_idP].tx_request_body.tx_pdu_list[eNB->TX_req[CC_idP].tx_request_body.number_of_pdus]; - TX_req->pdu_length = 7; // This should be changed if we have more than 1 preamble - TX_req->pdu_index = eNB->pdu_index[CC_idP]++; - TX_req->num_segments = 1; - TX_req->segments[0].segment_length = 7; - TX_req->segments[0].segment_data = cc[CC_idP].RAR_pdu.payload; - eNB->TX_req[CC_idP].tx_request_body.number_of_pdus++; - } // PDCCH CCE allocation is feasible - } // Msg2 frame/subframe condition - } // else BL/CE + dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.harq_process = 0; + dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.tpc = 1; // no TPC + dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.new_data_indicator_1 = 1; + dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.mcs_1 = 0; + dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.redundancy_version_1 = 0; + dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.virtual_resource_block_assignment_flag = 0; + + dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.resource_block_coding = getRIV (N_RB_DL, first_rb, 4); + + // This checks if the above DCI allocation is feasible in current subframe + if (!CCE_allocation_infeasible (module_idP, CC_idP, 0, subframeP, dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.aggregation_level, RA_template->RA_rnti)) { + LOG_D (MAC, "Frame %d: Subframe %d : Adding common DCI for RA_RNTI %x\n", frameP, subframeP, RA_template->RA_rnti); + dl_req->number_dci++; + dl_req->number_pdu++; + + dl_config_pdu = &dl_req->dl_config_pdu_list[dl_req->number_pdu]; + memset ((void *) dl_config_pdu, 0, sizeof (nfapi_dl_config_request_pdu_t)); + dl_config_pdu->pdu_type = NFAPI_DL_CONFIG_DLSCH_PDU_TYPE; + dl_config_pdu->pdu_size = (uint8_t) (2 + sizeof (nfapi_dl_config_dlsch_pdu)); + dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.pdu_index = eNB->pdu_index[CC_idP]; + dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.rnti = RA_template->RA_rnti; + dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.resource_allocation_type = 2; // format 1A/1B/1D + dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.virtual_resource_block_assignment_flag = 0; // localized + dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.resource_block_coding = getRIV (N_RB_DL, first_rb, 4); + dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.modulation = 2; //QPSK + dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.redundancy_version = 0; + dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.transport_blocks = 1; // first block + dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.transport_block_to_codeword_swap_flag = 0; + dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.transmission_scheme = (cc->p_eNB == 1) ? 0 : 1; + dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.number_of_layers = 1; + dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.number_of_subbands = 1; + // dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.codebook_index = ; + dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.ue_category_capacity = 1; + dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.pa = 4; // 0 dB + dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.delta_power_offset_index = 0; + dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.ngap = 0; + dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.nprb = get_subbandsize (cc->mib->message.dl_Bandwidth); // ignored + dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.transmission_mode = (cc->p_eNB == 1) ? 1 : 2; + dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.num_bf_prb_per_subband = 1; + dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.num_bf_vector = 1; + // dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.bf_vector = ; + dl_req->number_pdu++; + + // Program UL processing for Msg3 + get_Msg3alloc (&cc[CC_idP], subframeP, frameP, &RA_template->Msg3_frame, &RA_template->Msg3_subframe); + LOG_D (MAC, "Frame %d, Subframe %d: Setting Msg3 reception for Frame %d Subframe %d\n", frameP, subframeP, RA_template->Msg3_frame, RA_template->Msg3_subframe); + + fill_rar (module_idP, CC_idP, frameP, cc[CC_idP].RAR_pdu.payload, N_RB_DL, 7); + add_msg3 (module_idP, CC_idP, RA_template, frameP, subframeP); + + // DL request + eNB->TX_req[CC_idP].sfn_sf = (frameP << 4) + subframeP; + TX_req = &eNB->TX_req[CC_idP].tx_request_body.tx_pdu_list[eNB->TX_req[CC_idP].tx_request_body.number_of_pdus]; + TX_req->pdu_length = 7; // This should be changed if we have more than 1 preamble + TX_req->pdu_index = eNB->pdu_index[CC_idP]++; + TX_req->num_segments = 1; + TX_req->segments[0].segment_length = 7; + TX_req->segments[0].segment_data = cc[CC_idP].RAR_pdu.payload; + eNB->TX_req[CC_idP].tx_request_body.number_of_pdus++; + } // PDCCH CCE allocation is feasible + } // Msg2 frame/subframe condition + } // else BL/CE } -void generate_Msg4(module_id_t module_idP,int CC_idP,frame_t frameP,sub_frame_t subframeP,RA_TEMPLATE *RA_template){ +void +generate_Msg4 (module_id_t module_idP, int CC_idP, frame_t frameP, sub_frame_t subframeP, RA_TEMPLATE * RA_template) +{ - eNB_MAC_INST *eNB = RC.mac[module_idP]; - COMMON_channels_t *cc = eNB->common_channels; - int16_t rrc_sdu_length; - int UE_id = -1; - uint16_t msg4_padding; - uint16_t msg4_post_padding; - uint16_t msg4_header; + eNB_MAC_INST *eNB = RC.mac[module_idP]; + COMMON_channels_t *cc = eNB->common_channels; + int16_t rrc_sdu_length; + int UE_id = -1; + uint16_t msg4_padding; + uint16_t msg4_post_padding; + uint16_t msg4_header; - uint8_t *vrb_map; - int first_rb; - int N_RB_DL; - nfapi_dl_config_request_pdu_t *dl_config_pdu; - nfapi_ul_config_request_pdu_t *ul_config_pdu; - nfapi_tx_request_pdu_t *TX_req; - UE_list_t *UE_list=&eNB->UE_list; + uint8_t *vrb_map; + int first_rb; + int N_RB_DL; + nfapi_dl_config_request_pdu_t *dl_config_pdu; + nfapi_ul_config_request_pdu_t *ul_config_pdu; + nfapi_tx_request_pdu_t *TX_req; + UE_list_t *UE_list = &eNB->UE_list; nfapi_dl_config_request_body_t *dl_req; nfapi_ul_config_request_body_t *ul_req; - uint8_t lcid; - uint8_t offset; + uint8_t lcid; + uint8_t offset; #ifdef Rel14 - int rmax = 0; - int rep = 0; - int reps = 0; + int rmax = 0; + int rep = 0; + int reps = 0; - first_rb = 0; + first_rb = 0; struct PRACH_ConfigSIB_v1310 *ext4_prach; struct PUCCH_ConfigCommon_v1310 *ext4_pucch; PRACH_ParametersListCE_r13_t *prach_ParametersListCE_r13; struct N1PUCCH_AN_InfoList_r13 *pucch_N1PUCCH_AN_InfoList_r13; - PRACH_ParametersCE_r13_t *p[4]={NULL,NULL,NULL,NULL}; - int pucchreps[4]={1,1,1,1}; - int n1pucchan[4]={0,0,0,0}; + PRACH_ParametersCE_r13_t *p[4] = { NULL, NULL, NULL, NULL }; + int pucchreps[4] = { 1, 1, 1, 1 }; + int n1pucchan[4] = { 0, 0, 0, 0 }; if (cc[CC_idP].radioResourceConfigCommon_BR) { - ext4_prach = cc[CC_idP].radioResourceConfigCommon_BR->ext4->prach_ConfigCommon_v1310; - ext4_pucch = cc[CC_idP].radioResourceConfigCommon_BR->ext4->pucch_ConfigCommon_v1310; - prach_ParametersListCE_r13 = &ext4_prach->prach_ParametersListCE_r13; + ext4_prach = cc[CC_idP].radioResourceConfigCommon_BR->ext4->prach_ConfigCommon_v1310; + ext4_pucch = cc[CC_idP].radioResourceConfigCommon_BR->ext4->pucch_ConfigCommon_v1310; + prach_ParametersListCE_r13 = &ext4_prach->prach_ParametersListCE_r13; pucch_N1PUCCH_AN_InfoList_r13 = ext4_pucch->n1PUCCH_AN_InfoList_r13; - AssertFatal(prach_ParametersListCE_r13!=NULL,"prach_ParametersListCE_r13 is null\n"); - AssertFatal(pucch_N1PUCCH_AN_InfoList_r13!=NULL,"pucch_N1PUCCH_AN_InfoList_r13 is null\n"); + AssertFatal (prach_ParametersListCE_r13 != NULL, "prach_ParametersListCE_r13 is null\n"); + AssertFatal (pucch_N1PUCCH_AN_InfoList_r13 != NULL, "pucch_N1PUCCH_AN_InfoList_r13 is null\n"); // check to verify CE-Level compatibility in SIB2_BR - AssertFatal(prach_ParametersListCE_r13->list.count == pucch_N1PUCCH_AN_InfoList_r13->list.count, - "prach_ParametersListCE_r13->list.count!= pucch_N1PUCCH_AN_InfoList_r13->list.count\n"); + AssertFatal (prach_ParametersListCE_r13->list.count == pucch_N1PUCCH_AN_InfoList_r13->list.count, "prach_ParametersListCE_r13->list.count!= pucch_N1PUCCH_AN_InfoList_r13->list.count\n"); switch (prach_ParametersListCE_r13->list.count) { case 4: - p[3] = prach_ParametersListCE_r13->list.array[3]; - n1pucchan[3] = *pucch_N1PUCCH_AN_InfoList_r13->list.array[3]; - AssertFatal(ext4_pucch->pucch_NumRepetitionCE_Msg4_Level3_r13!=NULL,"pucch_NumRepetitionCE_Msg4_Level3 shouldn't be NULL\n"); - pucchreps[3] = (int)(4<<*ext4_pucch->pucch_NumRepetitionCE_Msg4_Level3_r13); - + p[3] = prach_ParametersListCE_r13->list.array[3]; + n1pucchan[3] = *pucch_N1PUCCH_AN_InfoList_r13->list.array[3]; + AssertFatal (ext4_pucch->pucch_NumRepetitionCE_Msg4_Level3_r13 != NULL, "pucch_NumRepetitionCE_Msg4_Level3 shouldn't be NULL\n"); + pucchreps[3] = (int) (4 << *ext4_pucch->pucch_NumRepetitionCE_Msg4_Level3_r13); + case 3: - p[2] = prach_ParametersListCE_r13->list.array[2]; - n1pucchan[2] = *pucch_N1PUCCH_AN_InfoList_r13->list.array[2]; - AssertFatal(ext4_pucch->pucch_NumRepetitionCE_Msg4_Level2_r13!=NULL,"pucch_NumRepetitionCE_Msg4_Level2 shouldn't be NULL\n"); - pucchreps[2] = (int)(4<<*ext4_pucch->pucch_NumRepetitionCE_Msg4_Level2_r13); + p[2] = prach_ParametersListCE_r13->list.array[2]; + n1pucchan[2] = *pucch_N1PUCCH_AN_InfoList_r13->list.array[2]; + AssertFatal (ext4_pucch->pucch_NumRepetitionCE_Msg4_Level2_r13 != NULL, "pucch_NumRepetitionCE_Msg4_Level2 shouldn't be NULL\n"); + pucchreps[2] = (int) (4 << *ext4_pucch->pucch_NumRepetitionCE_Msg4_Level2_r13); case 2: - p[1] =prach_ParametersListCE_r13->list.array[1]; - n1pucchan[1] = *pucch_N1PUCCH_AN_InfoList_r13->list.array[1]; - AssertFatal(ext4_pucch->pucch_NumRepetitionCE_Msg4_Level2_r13!=NULL,"pucch_NumRepetitionCE_Msg4_Level1 shouldn't be NULL\n"); - pucchreps[1] = (int)(1<<*ext4_pucch->pucch_NumRepetitionCE_Msg4_Level1_r13); + p[1] = prach_ParametersListCE_r13->list.array[1]; + n1pucchan[1] = *pucch_N1PUCCH_AN_InfoList_r13->list.array[1]; + AssertFatal (ext4_pucch->pucch_NumRepetitionCE_Msg4_Level2_r13 != NULL, "pucch_NumRepetitionCE_Msg4_Level1 shouldn't be NULL\n"); + pucchreps[1] = (int) (1 << *ext4_pucch->pucch_NumRepetitionCE_Msg4_Level1_r13); case 1: - p[0] = prach_ParametersListCE_r13->list.array[0]; - n1pucchan[0] = *pucch_N1PUCCH_AN_InfoList_r13->list.array[0]; - AssertFatal(ext4_pucch->pucch_NumRepetitionCE_Msg4_Level2_r13!=NULL,"pucch_NumRepetitionCE_Msg4_Level0 shouldn't be NULL\n"); - pucchreps[0] = (int)(1<<*ext4_pucch->pucch_NumRepetitionCE_Msg4_Level0_r13); + p[0] = prach_ParametersListCE_r13->list.array[0]; + n1pucchan[0] = *pucch_N1PUCCH_AN_InfoList_r13->list.array[0]; + AssertFatal (ext4_pucch->pucch_NumRepetitionCE_Msg4_Level2_r13 != NULL, "pucch_NumRepetitionCE_Msg4_Level0 shouldn't be NULL\n"); + pucchreps[0] = (int) (1 << *ext4_pucch->pucch_NumRepetitionCE_Msg4_Level0_r13); default: - AssertFatal(1==0,"Illegal count for prach_ParametersListCE_r13 %d\n",prach_ParametersListCE_r13->list.count); + AssertFatal (1 == 0, "Illegal count for prach_ParametersListCE_r13 %d\n", prach_ParametersListCE_r13->list.count); } } #endif - vrb_map = cc[CC_idP].vrb_map; - - dl_req = &eNB->DL_req[CC_idP].dl_config_request_body; - dl_config_pdu = &dl_req->dl_config_pdu_list[dl_req->number_pdu]; - N_RB_DL = to_prb(cc[CC_idP].mib->message.dl_Bandwidth); + vrb_map = cc[CC_idP].vrb_map; + + dl_req = &eNB->DL_req[CC_idP].dl_config_request_body; + dl_config_pdu = &dl_req->dl_config_pdu_list[dl_req->number_pdu]; + N_RB_DL = to_prb (cc[CC_idP].mib->message.dl_Bandwidth); + + UE_id = find_UE_id (module_idP, RA_template->rnti); + AssertFatal (UE_id >= 0, "Can't find UE for t-crnti\n"); - UE_id = find_UE_id(module_idP,RA_template->rnti); - AssertFatal(UE_id>=0,"Can't find UE for t-crnti\n"); - // set HARQ process round to 0 for this UE - - if (cc->tdd_Config) RA_template->harq_pid = ((frameP*10)+subframeP)%10; - else RA_template->harq_pid = ((frameP*10)+subframeP)&7; - + if (cc->tdd_Config) + RA_template->harq_pid = ((frameP * 10) + subframeP) % 10; + else + RA_template->harq_pid = ((frameP * 10) + subframeP) & 7; + + // Get RRCConnectionSetup for Piggyback - rrc_sdu_length = mac_rrc_data_req(module_idP, - CC_idP, - frameP, - CCCH, - 1, // 1 transport block - &cc[CC_idP].CCCH_pdu.payload[0], - ENB_FLAG_YES, - module_idP, - 0); // not used in this case - - AssertFatal(rrc_sdu_length>0, - "[MAC][eNB Scheduler] CCCH not allocated\n"); - - - LOG_D(MAC,"[eNB %d][RAPROC] CC_id %d Frame %d, subframeP %d: UE_id %d, rrc_sdu_length %d\n", - module_idP, CC_idP, frameP, subframeP,UE_id, rrc_sdu_length); - - + rrc_sdu_length = mac_rrc_data_req (module_idP, CC_idP, frameP, CCCH, 1, // 1 transport block + &cc[CC_idP].CCCH_pdu.payload[0], ENB_FLAG_YES, module_idP, 0); // not used in this case + + AssertFatal (rrc_sdu_length > 0, "[MAC][eNB Scheduler] CCCH not allocated\n"); + + + LOG_D (MAC, "[eNB %d][RAPROC] CC_id %d Frame %d, subframeP %d: UE_id %d, rrc_sdu_length %d\n", module_idP, CC_idP, frameP, subframeP, UE_id, rrc_sdu_length); + + #ifdef Rel14 - if (RA_template->rach_resource_type>0) { - + if (RA_template->rach_resource_type > 0) { + // Generate DCI + repetitions first // This uses an MPDCCH Type 2 allocation according to Section 9.1.5 36-213, Type2 common allocation according to Table 7.1-8 (36-213) // Parameters: @@ -603,694 +590,647 @@ void generate_Msg4(module_id_t module_idP,int CC_idP,frame_t frameP,sub_frame_t // if CELevel = 0,1 => Table 9.1.5-1b for MPDCCH candidates // if CELevel = 2,3 => Table 9.1.5-2b for MPDCCH candidates // distributed transmission - + // rmax from SIB2 information - rmax = p[RA_template->rach_resource_type-1]->mpdcch_NumRepetition_RA_r13; - AssertFatal(rmax>=4,"choose rmax>=4 for enough repeititions, or reduce rep to 1 or 2\n"); + rmax = p[RA_template->rach_resource_type - 1]->mpdcch_NumRepetition_RA_r13; + AssertFatal (rmax >= 4, "choose rmax>=4 for enough repeititions, or reduce rep to 1 or 2\n"); // choose r3 by default for Msg4 (this is ok from table 9.1.5-3 for rmax = >=4, if we choose rmax <4 it has to be less - rep = 2; + rep = 2; // get actual repetition count from Table 9.1.5-3 - reps = (rmax<=8)?(1<>(3-rep)); + reps = (rmax <= 8) ? (1 << rep) : (rmax >> (3 - rep)); // get first narrowband - first_rb = narrowband_to_first_rb(&cc[CC_idP],RA_template->msg34_narrowband); + first_rb = narrowband_to_first_rb (&cc[CC_idP], RA_template->msg34_narrowband); - if ((RA_template->msg4_mpdcch_repetition_cnt == 0) && - (mpdcch_sf_condition(eNB,CC_idP,frameP,subframeP,rmax,TYPE2,-1)>0)){ + if ((RA_template->msg4_mpdcch_repetition_cnt == 0) && (mpdcch_sf_condition (eNB, CC_idP, frameP, subframeP, rmax, TYPE2, -1) > 0)) { // MPDCCH configuration for RAR - - memset((void*)dl_config_pdu,0,sizeof(nfapi_dl_config_request_pdu_t)); - dl_config_pdu->pdu_type = NFAPI_DL_CONFIG_MPDCCH_PDU_TYPE; - dl_config_pdu->pdu_size = (uint8_t)(2+sizeof(nfapi_dl_config_mpdcch_pdu)); - dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.dci_format = (RA_template->rach_resource_type > 1) ? 11 : 10; - dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.mpdcch_narrow_band = RA_template->msg34_narrowband; - dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.number_of_prb_pairs = 6; - dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.resource_block_assignment = 0; // Note: this can be dynamic - dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.mpdcch_tansmission_type = 1; - AssertFatal(cc[CC_idP].sib1_v13ext->bandwidthReducedAccessRelatedInfo_r13!=NULL, - "cc[CC_idP].sib1_v13ext->bandwidthReducedAccessRelatedInfo_r13 is null\n"); - dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.start_symbol = cc[CC_idP].sib1_v13ext->bandwidthReducedAccessRelatedInfo_r13->startSymbolBR_r13; - dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.ecce_index = 0; // Note: this should be dynamic - dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.aggregation_level = 16; // OK for CEModeA r1-3 (9.1.5-1b) or CEModeB r1-4 - dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.rnti_type = 0; // t-C-RNTI - dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.rnti = RA_template->RA_rnti; - dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.ce_mode = (RA_template->rach_resource_type < 3) ? 1 : 2; - dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.drms_scrambling_init = cc[CC_idP].physCellId; /// Check this is still N_id_cell for type2 common - dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.initial_transmission_sf_io = (frameP*10)+subframeP; - dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.transmission_power = 6000; // 0dB - dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.resource_block_coding = getRIV(6,0,6);// check if not getRIV(N_RB_DL,first_rb,6); - dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.mcs = 4; // adjust according to size of Msg4, 208 bits with N1A_PRB=3 - dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.pdsch_reptition_levels = 4; // fix to 4 for now - dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.redundancy_version = 0; - dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.new_data_indicator = 0; - dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.harq_process = RA_template->harq_pid; - dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.tpmi_length = 0; - dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.tpmi = 0; - dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.pmi_flag = 0; - dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.pmi = 0; - dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.harq_resource_offset = 0; - dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.dci_subframe_repetition_number = rep; - dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.tpc = 1;// N1A_PRB=3; => 208 bits - dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.downlink_assignment_index_length = 0; - dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.downlink_assignment_index = 0; - dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.allocate_prach_flag = 0; - dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.preamble_index = 0; - dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.prach_mask_index = 0; - dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.starting_ce_level = 0; - dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.srs_request = 0; - dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.antenna_ports_and_scrambling_identity_flag = 0; - dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.antenna_ports_and_scrambling_identity = 0; - dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.frequency_hopping_enabled_flag = 0; + + memset ((void *) dl_config_pdu, 0, sizeof (nfapi_dl_config_request_pdu_t)); + dl_config_pdu->pdu_type = NFAPI_DL_CONFIG_MPDCCH_PDU_TYPE; + dl_config_pdu->pdu_size = (uint8_t) (2 + sizeof (nfapi_dl_config_mpdcch_pdu)); + dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.dci_format = (RA_template->rach_resource_type > 1) ? 11 : 10; + dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.mpdcch_narrow_band = RA_template->msg34_narrowband; + dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.number_of_prb_pairs = 6; + dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.resource_block_assignment = 0; // Note: this can be dynamic + dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.mpdcch_tansmission_type = 1; + AssertFatal (cc[CC_idP].sib1_v13ext->bandwidthReducedAccessRelatedInfo_r13 != NULL, "cc[CC_idP].sib1_v13ext->bandwidthReducedAccessRelatedInfo_r13 is null\n"); + dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.start_symbol = cc[CC_idP].sib1_v13ext->bandwidthReducedAccessRelatedInfo_r13->startSymbolBR_r13; + dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.ecce_index = 0; // Note: this should be dynamic + dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.aggregation_level = 16; // OK for CEModeA r1-3 (9.1.5-1b) or CEModeB r1-4 + dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.rnti_type = 0; // t-C-RNTI + dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.rnti = RA_template->RA_rnti; + dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.ce_mode = (RA_template->rach_resource_type < 3) ? 1 : 2; + dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.drms_scrambling_init = cc[CC_idP].physCellId; /// Check this is still N_id_cell for type2 common + dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.initial_transmission_sf_io = (frameP * 10) + subframeP; + dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.transmission_power = 6000; // 0dB + dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.resource_block_coding = getRIV (6, 0, 6); // check if not getRIV(N_RB_DL,first_rb,6); + dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.mcs = 4; // adjust according to size of Msg4, 208 bits with N1A_PRB=3 + dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.pdsch_reptition_levels = 4; // fix to 4 for now + dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.redundancy_version = 0; + dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.new_data_indicator = 0; + dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.harq_process = RA_template->harq_pid; + dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.tpmi_length = 0; + dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.tpmi = 0; + dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.pmi_flag = 0; + dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.pmi = 0; + dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.harq_resource_offset = 0; + dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.dci_subframe_repetition_number = rep; + dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.tpc = 1; // N1A_PRB=3; => 208 bits + dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.downlink_assignment_index_length = 0; + dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.downlink_assignment_index = 0; + dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.allocate_prach_flag = 0; + dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.preamble_index = 0; + dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.prach_mask_index = 0; + dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.starting_ce_level = 0; + dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.srs_request = 0; + dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.antenna_ports_and_scrambling_identity_flag = 0; + dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.antenna_ports_and_scrambling_identity = 0; + dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.frequency_hopping_enabled_flag = 0; dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.paging_direct_indication_differentiation_flag = 0; - dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.direct_indication = 0; - dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.total_dci_length_including_padding = 0; // this is not needed by OAI L1, but should be filled in - dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.number_of_tx_antenna_ports = 1; + dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.direct_indication = 0; + dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.total_dci_length_including_padding = 0; // this is not needed by OAI L1, but should be filled in + dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.number_of_tx_antenna_ports = 1; RA_template->msg4_mpdcch_repetition_cnt++; dl_req->number_pdu++; - - } //repetition_count==0 && SF condition met - else if (RA_template->msg4_mpdcch_repetition_cnt>0) { // we're in a stream of repetitions - RA_template->msg4_mpdcch_repetition_cnt++; - if (RA_template->msg4_mpdcch_repetition_cnt==reps) { // this is the last mpdcch repetition - if (cc[CC_idP].tdd_Config==NULL) { // FDD case - // wait 2 subframes for PDSCH transmission - if (subframeP>7) RA_template->Msg4_frame = (frameP+1)&1023; - else RA_template->Msg4_frame = frameP; - RA_template->Msg4_subframe = (subframeP+2)%10; - } - else { - AssertFatal(1==0,"TDD case not done yet\n"); - } - } // mpdcch_repetition_count == reps + + } //repetition_count==0 && SF condition met + else if (RA_template->msg4_mpdcch_repetition_cnt > 0) { // we're in a stream of repetitions + RA_template->msg4_mpdcch_repetition_cnt++; + if (RA_template->msg4_mpdcch_repetition_cnt == reps) { // this is the last mpdcch repetition + if (cc[CC_idP].tdd_Config == NULL) { // FDD case + // wait 2 subframes for PDSCH transmission + if (subframeP > 7) + RA_template->Msg4_frame = (frameP + 1) & 1023; + else + RA_template->Msg4_frame = frameP; + RA_template->Msg4_subframe = (subframeP + 2) % 10; + } else { + AssertFatal (1 == 0, "TDD case not done yet\n"); + } + } // mpdcch_repetition_count == reps if ((RA_template->Msg4_frame == frameP) && (RA_template->Msg4_subframe == subframeP)) { - - // Program PDSCH - - LOG_D(MAC,"[eNB %d][RAPROC] CC_id %d Frame %d, subframeP %d: Generating Msg4 BR with RRC Piggyback (ce_level %d RNTI %x)\n", - module_idP, CC_idP, frameP, subframeP,RA_template->rach_resource_type-1,RA_template->rnti); - AssertFatal(1==0,"Msg4 generation not finished for BL/CE UE\n"); - dl_config_pdu = &dl_req->dl_config_pdu_list[dl_req->number_pdu]; - memset((void*)dl_config_pdu,0,sizeof(nfapi_dl_config_request_pdu_t)); - dl_config_pdu->pdu_type = NFAPI_DL_CONFIG_DLSCH_PDU_TYPE; - dl_config_pdu->pdu_size = (uint8_t)(2+sizeof(nfapi_dl_config_dlsch_pdu)); - dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.pdu_index = eNB->pdu_index[CC_idP]; - dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.rnti = RA_template->rnti; - dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.resource_allocation_type = 2; // format 1A/1B/1D - dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.virtual_resource_block_assignment_flag = 0; // localized - dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.resource_block_coding = getRIV(N_RB_DL,first_rb,6); // check that this isn't getRIV(6,0,6) - dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.modulation = 2; //QPSK - dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.redundancy_version = 0; - dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.transport_blocks = 1;// first block - dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.transport_block_to_codeword_swap_flag = 0; - dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.transmission_scheme = (cc->p_eNB==1 ) ? 0 : 1; - dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.number_of_layers = 1; - dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.number_of_subbands = 1; - // dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.codebook_index = ; - dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.ue_category_capacity = 1; - dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.pa = 4; // 0 dB - dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.delta_power_offset_index = 0; - dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.ngap = 0; - dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.nprb = get_subbandsize(cc->mib->message.dl_Bandwidth); // ignored - dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.transmission_mode = (cc->p_eNB==1 ) ? 1 : 2; - dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.num_bf_prb_per_subband = 1; - dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.num_bf_vector = 1; - // dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.bf_vector = ; + // Program PDSCH - dl_config_pdu->dlsch_pdu.dlsch_pdu_rel10.pdsch_start = cc[CC_idP].sib1_v13ext->bandwidthReducedAccessRelatedInfo_r13->startSymbolBR_r13; - - dl_config_pdu->dlsch_pdu.dlsch_pdu_rel13.ue_type = (RA_template->rach_resource_type < 3) ? 1 : 2; - dl_config_pdu->dlsch_pdu.dlsch_pdu_rel13.pdsch_payload_type = 2; // not SI message - dl_config_pdu->dlsch_pdu.dlsch_pdu_rel13.initial_transmission_sf_io = (10*frameP)+subframeP; - dl_config_pdu->dlsch_pdu.dlsch_pdu_rel13.drms_table_flag = 0; - dl_req->number_pdu++; - - RA_template->generate_Msg4=0; - RA_template->wait_ack_Msg4=1; + LOG_D (MAC, "[eNB %d][RAPROC] CC_id %d Frame %d, subframeP %d: Generating Msg4 BR with RRC Piggyback (ce_level %d RNTI %x)\n", + module_idP, CC_idP, frameP, subframeP, RA_template->rach_resource_type - 1, RA_template->rnti); - lcid=0; - - UE_list->UE_sched_ctrl[UE_id].round[CC_idP][RA_template->harq_pid] = 0; - msg4_header = 1+6+1; // CR header, CR CE, SDU header - - if ((RA_template->msg4_TBsize - rrc_sdu_length - msg4_header) <= 2) { - msg4_padding = RA_template->msg4_TBsize - rrc_sdu_length - msg4_header; - msg4_post_padding = 0; - } else { - msg4_padding = 0; - msg4_post_padding = RA_template->msg4_TBsize - rrc_sdu_length - msg4_header -1; - } - - LOG_D(MAC,"[eNB %d][RAPROC] CC_id %d Frame %d subframeP %d Msg4 : TBS %d, sdu_len %d, msg4_header %d, msg4_padding %d, msg4_post_padding %d\n", - module_idP,CC_idP,frameP,subframeP,RA_template->msg4_TBsize,rrc_sdu_length,msg4_header,msg4_padding,msg4_post_padding); - DevAssert( UE_id != UE_INDEX_INVALID ); // FIXME not sure how to gracefully return - // CHECK THIS: &cc[CC_idP].CCCH_pdu.payload[0] - offset = generate_dlsch_header((unsigned char*)eNB->UE_list.DLSCH_pdu[CC_idP][0][(unsigned char)UE_id].payload[0], - 1, //num_sdus - (unsigned short*)&rrc_sdu_length, // - &lcid, // sdu_lcid - 255, // no drx - 31, // no timing advance - RA_template->cont_res_id, // contention res id - msg4_padding, // no padding - msg4_post_padding); - - memcpy((void*)&eNB->UE_list.DLSCH_pdu[CC_idP][0][(unsigned char)UE_id].payload[0][(unsigned char)offset], - &cc[CC_idP].CCCH_pdu.payload[0], - rrc_sdu_length); - - // DL request - eNB->TX_req[CC_idP].sfn_sf = (frameP<<4)+subframeP; - TX_req = &eNB->TX_req[CC_idP].tx_request_body.tx_pdu_list[eNB->TX_req[CC_idP].tx_request_body.number_of_pdus]; - TX_req->pdu_length = rrc_sdu_length; - TX_req->pdu_index = eNB->pdu_index[CC_idP]++; - TX_req->num_segments = 1; - TX_req->segments[0].segment_length = rrc_sdu_length; - TX_req->segments[0].segment_data = eNB->UE_list.DLSCH_pdu[CC_idP][0][(unsigned char)UE_id].payload[0]; - eNB->TX_req[CC_idP].tx_request_body.number_of_pdus++; + AssertFatal (1 == 0, "Msg4 generation not finished for BL/CE UE\n"); + dl_config_pdu = &dl_req->dl_config_pdu_list[dl_req->number_pdu]; + memset ((void *) dl_config_pdu, 0, sizeof (nfapi_dl_config_request_pdu_t)); + dl_config_pdu->pdu_type = NFAPI_DL_CONFIG_DLSCH_PDU_TYPE; + dl_config_pdu->pdu_size = (uint8_t) (2 + sizeof (nfapi_dl_config_dlsch_pdu)); + dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.pdu_index = eNB->pdu_index[CC_idP]; + dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.rnti = RA_template->rnti; + dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.resource_allocation_type = 2; // format 1A/1B/1D + dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.virtual_resource_block_assignment_flag = 0; // localized + dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.resource_block_coding = getRIV (N_RB_DL, first_rb, 6); // check that this isn't getRIV(6,0,6) + dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.modulation = 2; //QPSK + dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.redundancy_version = 0; + dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.transport_blocks = 1; // first block + dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.transport_block_to_codeword_swap_flag = 0; + dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.transmission_scheme = (cc->p_eNB == 1) ? 0 : 1; + dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.number_of_layers = 1; + dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.number_of_subbands = 1; + // dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.codebook_index = ; + dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.ue_category_capacity = 1; + dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.pa = 4; // 0 dB + dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.delta_power_offset_index = 0; + dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.ngap = 0; + dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.nprb = get_subbandsize (cc->mib->message.dl_Bandwidth); // ignored + dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.transmission_mode = (cc->p_eNB == 1) ? 1 : 2; + dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.num_bf_prb_per_subband = 1; + dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.num_bf_vector = 1; + // dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.bf_vector = ; - // Program ACK/NAK for Msg4 PDSCH - int absSF = (RA_template->Msg3_frame*10)+RA_template->Msg3_subframe; - // see Section 10.2 from 36.213 - int ackNAK_absSF = absSF + reps + 4; - AssertFatal(reps>2,"Have to handle programming of ACK when PDSCH repetitions is > 2\n"); - ul_req = &eNB->UL_req_tmp[CC_idP][ackNAK_absSF%10].ul_config_request_body; - ul_config_pdu = &ul_req->ul_config_pdu_list[ul_req->number_of_pdus]; + dl_config_pdu->dlsch_pdu.dlsch_pdu_rel10.pdsch_start = cc[CC_idP].sib1_v13ext->bandwidthReducedAccessRelatedInfo_r13->startSymbolBR_r13; - ul_config_pdu->pdu_type = NFAPI_UL_CONFIG_UCI_HARQ_PDU_TYPE; - ul_config_pdu->pdu_size = (uint8_t)(2+sizeof(nfapi_ul_config_uci_harq_pdu)); - ul_config_pdu->uci_harq_pdu.ue_information.ue_information_rel8.handle = 0; // don't know how to use this - ul_config_pdu->uci_harq_pdu.ue_information.ue_information_rel8.rnti = RA_template->rnti; - ul_config_pdu->uci_harq_pdu.ue_information.ue_information_rel13.ue_type = (RA_template->rach_resource_type < 3) ? 1 : 2; - ul_config_pdu->uci_harq_pdu.ue_information.ue_information_rel13.empty_symbols = 0; - ul_config_pdu->uci_harq_pdu.ue_information.ue_information_rel13.total_number_of_repetitions = pucchreps[RA_template->rach_resource_type-1]; - ul_config_pdu->uci_harq_pdu.ue_information.ue_information_rel13.repetition_number = 0; - // Note need to keep sending this across reptitions!!!! Not really for PUCCH, to ask small-cell forum, we'll see for the other messages, maybe parameters change across repetitions and FAPI has to provide for that - if (cc[CC_idP].tdd_Config==NULL) { // FDD case - ul_config_pdu->uci_harq_pdu.harq_information.harq_information_rel8_fdd.n_pucch_1_0 = n1pucchan[RA_template->rach_resource_type-1]; - // NOTE: How to fill in the rest of the n_pucch_1_0 information 213 Section 10.1.2.1 in the general case - // = N_ECCE_q + Delta_ARO + n1pucchan[ce_level] - // higher in the MPDCCH configuration, N_ECCE_q is hard-coded to 0, and harq resource offset to 0 => - // Delta_ARO = 0 from Table 10.1.2.1-1 - ul_config_pdu->uci_harq_pdu.harq_information.harq_information_rel8_fdd.harq_size = 1; // 1-bit ACK/NAK - } - else { - AssertFatal(1==0,"PUCCH configuration for ACK/NAK not handled yet for TDD BL/CE case\n"); - } - ul_req->number_of_pdus++; - T(T_ENB_MAC_UE_DL_PDU_WITH_DATA, T_INT(module_idP), T_INT(CC_idP), T_INT(RA_template->rnti), T_INT(frameP), T_INT(subframeP), - T_INT(0 /*harq_pid always 0?*/), T_BUFFER(&eNB->UE_list.DLSCH_pdu[CC_idP][0][UE_id].payload[0], RA_template->msg4_TBsize)); - - if (opt_enabled==1) { - trace_pdu(1, (uint8_t *)eNB->UE_list.DLSCH_pdu[CC_idP][0][(unsigned char)UE_id].payload[0], - rrc_sdu_length, UE_id, 3, UE_RNTI(module_idP, UE_id), - eNB->frame, eNB->subframe,0,0); - LOG_D(OPT,"[eNB %d][DLSCH] CC_id %d Frame %d trace pdu for rnti %x with size %d\n", - module_idP, CC_idP, frameP, UE_RNTI(module_idP,UE_id), rrc_sdu_length); - } - } // Msg4 frame/subframe - } // msg4_mpdcch_repetition_count - } // rach_resource_type > 0 + dl_config_pdu->dlsch_pdu.dlsch_pdu_rel13.ue_type = (RA_template->rach_resource_type < 3) ? 1 : 2; + dl_config_pdu->dlsch_pdu.dlsch_pdu_rel13.pdsch_payload_type = 2; // not SI message + dl_config_pdu->dlsch_pdu.dlsch_pdu_rel13.initial_transmission_sf_io = (10 * frameP) + subframeP; + dl_config_pdu->dlsch_pdu.dlsch_pdu_rel13.drms_table_flag = 0; + dl_req->number_pdu++; + + RA_template->generate_Msg4 = 0; + RA_template->wait_ack_Msg4 = 1; + + lcid = 0; + + UE_list->UE_sched_ctrl[UE_id].round[CC_idP][RA_template->harq_pid] = 0; + msg4_header = 1 + 6 + 1; // CR header, CR CE, SDU header + + if ((RA_template->msg4_TBsize - rrc_sdu_length - msg4_header) <= 2) { + msg4_padding = RA_template->msg4_TBsize - rrc_sdu_length - msg4_header; + msg4_post_padding = 0; + } else { + msg4_padding = 0; + msg4_post_padding = RA_template->msg4_TBsize - rrc_sdu_length - msg4_header - 1; + } + + LOG_D (MAC, "[eNB %d][RAPROC] CC_id %d Frame %d subframeP %d Msg4 : TBS %d, sdu_len %d, msg4_header %d, msg4_padding %d, msg4_post_padding %d\n", + module_idP, CC_idP, frameP, subframeP, RA_template->msg4_TBsize, rrc_sdu_length, msg4_header, msg4_padding, msg4_post_padding); + DevAssert (UE_id != UE_INDEX_INVALID); // FIXME not sure how to gracefully return + // CHECK THIS: &cc[CC_idP].CCCH_pdu.payload[0] + offset = generate_dlsch_header ((unsigned char *) eNB->UE_list.DLSCH_pdu[CC_idP][0][(unsigned char) UE_id].payload[0], 1, //num_sdus + (unsigned short *) &rrc_sdu_length, // + &lcid, // sdu_lcid + 255, // no drx + 31, // no timing advance + RA_template->cont_res_id, // contention res id + msg4_padding, // no padding + msg4_post_padding); + + memcpy ((void *) &eNB->UE_list.DLSCH_pdu[CC_idP][0][(unsigned char) UE_id].payload[0][(unsigned char) offset], &cc[CC_idP].CCCH_pdu.payload[0], rrc_sdu_length); + + // DL request + eNB->TX_req[CC_idP].sfn_sf = (frameP << 4) + subframeP; + TX_req = &eNB->TX_req[CC_idP].tx_request_body.tx_pdu_list[eNB->TX_req[CC_idP].tx_request_body.number_of_pdus]; + TX_req->pdu_length = rrc_sdu_length; + TX_req->pdu_index = eNB->pdu_index[CC_idP]++; + TX_req->num_segments = 1; + TX_req->segments[0].segment_length = rrc_sdu_length; + TX_req->segments[0].segment_data = eNB->UE_list.DLSCH_pdu[CC_idP][0][(unsigned char) UE_id].payload[0]; + eNB->TX_req[CC_idP].tx_request_body.number_of_pdus++; + + // Program ACK/NAK for Msg4 PDSCH + int absSF = (RA_template->Msg3_frame * 10) + RA_template->Msg3_subframe; + // see Section 10.2 from 36.213 + int ackNAK_absSF = absSF + reps + 4; + AssertFatal (reps > 2, "Have to handle programming of ACK when PDSCH repetitions is > 2\n"); + ul_req = &eNB->UL_req_tmp[CC_idP][ackNAK_absSF % 10].ul_config_request_body; + ul_config_pdu = &ul_req->ul_config_pdu_list[ul_req->number_of_pdus]; + + ul_config_pdu->pdu_type = NFAPI_UL_CONFIG_UCI_HARQ_PDU_TYPE; + ul_config_pdu->pdu_size = (uint8_t) (2 + sizeof (nfapi_ul_config_uci_harq_pdu)); + ul_config_pdu->uci_harq_pdu.ue_information.ue_information_rel8.handle = 0; // don't know how to use this + ul_config_pdu->uci_harq_pdu.ue_information.ue_information_rel8.rnti = RA_template->rnti; + ul_config_pdu->uci_harq_pdu.ue_information.ue_information_rel13.ue_type = (RA_template->rach_resource_type < 3) ? 1 : 2; + ul_config_pdu->uci_harq_pdu.ue_information.ue_information_rel13.empty_symbols = 0; + ul_config_pdu->uci_harq_pdu.ue_information.ue_information_rel13.total_number_of_repetitions = pucchreps[RA_template->rach_resource_type - 1]; + ul_config_pdu->uci_harq_pdu.ue_information.ue_information_rel13.repetition_number = 0; + // Note need to keep sending this across reptitions!!!! Not really for PUCCH, to ask small-cell forum, we'll see for the other messages, maybe parameters change across repetitions and FAPI has to provide for that + if (cc[CC_idP].tdd_Config == NULL) { // FDD case + ul_config_pdu->uci_harq_pdu.harq_information.harq_information_rel8_fdd.n_pucch_1_0 = n1pucchan[RA_template->rach_resource_type - 1]; + // NOTE: How to fill in the rest of the n_pucch_1_0 information 213 Section 10.1.2.1 in the general case + // = N_ECCE_q + Delta_ARO + n1pucchan[ce_level] + // higher in the MPDCCH configuration, N_ECCE_q is hard-coded to 0, and harq resource offset to 0 => + // Delta_ARO = 0 from Table 10.1.2.1-1 + ul_config_pdu->uci_harq_pdu.harq_information.harq_information_rel8_fdd.harq_size = 1; // 1-bit ACK/NAK + } else { + AssertFatal (1 == 0, "PUCCH configuration for ACK/NAK not handled yet for TDD BL/CE case\n"); + } + ul_req->number_of_pdus++; + T (T_ENB_MAC_UE_DL_PDU_WITH_DATA, T_INT (module_idP), T_INT (CC_idP), T_INT (RA_template->rnti), T_INT (frameP), T_INT (subframeP), + T_INT (0 /*harq_pid always 0? */ ), T_BUFFER (&eNB->UE_list.DLSCH_pdu[CC_idP][0][UE_id].payload[0], RA_template->msg4_TBsize)); + + if (opt_enabled == 1) { + trace_pdu (1, (uint8_t *) eNB->UE_list.DLSCH_pdu[CC_idP][0][(unsigned char) UE_id].payload[0], rrc_sdu_length, UE_id, 3, UE_RNTI (module_idP, UE_id), eNB->frame, eNB->subframe, 0, 0); + LOG_D (OPT, "[eNB %d][DLSCH] CC_id %d Frame %d trace pdu for rnti %x with size %d\n", module_idP, CC_idP, frameP, UE_RNTI (module_idP, UE_id), rrc_sdu_length); + } + } // Msg4 frame/subframe + } // msg4_mpdcch_repetition_count + } // rach_resource_type > 0 else #endif - { // This is normal LTE case - if ((RA_template->Msg4_frame == frameP) && (RA_template->Msg4_subframe == subframeP)) { - LOG_D(MAC,"[eNB %d][RAPROC] CC_id %d Frame %d, subframeP %d: Generating Msg4 with RRC Piggyback (RNTI %x)\n", - module_idP, CC_idP, frameP, subframeP,RA_template->rnti); - - /// Choose first 4 RBs for Msg4, should really check that these are free! - first_rb=0; - - vrb_map[first_rb] = 1; - vrb_map[first_rb+1] = 1; - vrb_map[first_rb+2] = 1; - vrb_map[first_rb+3] = 1; - - - // Compute MCS/TBS for 3 PRB (coded on 4 vrb) - msg4_header = 1+6+1; // CR header, CR CE, SDU header - - if ((rrc_sdu_length+msg4_header) <= 22) { - RA_template->msg4_mcs = 4; - RA_template->msg4_TBsize = 22; - } else if ((rrc_sdu_length+msg4_header) <= 28) { - RA_template->msg4_mcs = 5; - RA_template->msg4_TBsize = 28; - } else if ((rrc_sdu_length+msg4_header) <= 32) { - RA_template->msg4_mcs = 6; - RA_template->msg4_TBsize = 32; - } else if ((rrc_sdu_length+msg4_header) <= 41) { - RA_template->msg4_mcs = 7; - RA_template->msg4_TBsize = 41; - } else if ((rrc_sdu_length+msg4_header) <= 49) { - RA_template->msg4_mcs = 8; - RA_template->msg4_TBsize = 49; - } else if ((rrc_sdu_length+msg4_header) <= 57) { - RA_template->msg4_mcs = 9; - RA_template->msg4_TBsize = 57; - } + { // This is normal LTE case + if ((RA_template->Msg4_frame == frameP) && (RA_template->Msg4_subframe == subframeP)) { + LOG_D (MAC, "[eNB %d][RAPROC] CC_id %d Frame %d, subframeP %d: Generating Msg4 with RRC Piggyback (RNTI %x)\n", module_idP, CC_idP, frameP, subframeP, RA_template->rnti); - fill_nfapi_dl_dci_1A(dl_config_pdu, - 4, // aggregation_level - RA_template->rnti, // rnti - 1, // rnti_type, CRNTI - RA_template->harq_pid, // harq_process - 1, // tpc, none - getRIV(N_RB_DL,first_rb,4), // resource_block_coding - RA_template->msg4_mcs, // mcs - 1, // ndi - 0, // rv - 0); // vrb_flag - LOG_D(MAC,"Frame %d, subframe %d: Msg4 DCI pdu_num %d (rnti %x,rnti_type %d,harq_pid %d, resource_block_coding (%p) %d\n", - frameP, - subframeP, - dl_req->number_pdu, - dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.rnti, - dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.rnti_type, - dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.harq_process, - &dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.resource_block_coding, - dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.resource_block_coding); - AssertFatal(dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.resource_block_coding < 8192, - "resource_block_coding %u < 8192\n", - dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.resource_block_coding); - if (!CCE_allocation_infeasible(module_idP,CC_idP,1, - subframeP,dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.aggregation_level, - RA_template->rnti)) { - dl_req->number_dci++; - dl_req->number_pdu++; - - RA_template->generate_Msg4=0; - RA_template->wait_ack_Msg4=1; - - // increment Absolute subframe by 8 for Msg4 retransmission - LOG_D(MAC,"Frame %d, Subframe %d: Preparing for Msg4 retransmission currently %d.%d\n", - frameP,subframeP,RA_template->Msg4_frame,RA_template->Msg4_subframe); - if (RA_template->Msg4_subframe > 1) RA_template->Msg4_frame++; - RA_template->Msg4_frame&=1023; - RA_template->Msg4_subframe = (RA_template->Msg4_subframe+8)%10; - LOG_D(MAC,"Frame %d, Subframe %d: Msg4 retransmission in %d.%d\n", - frameP,subframeP,RA_template->Msg4_frame,RA_template->Msg4_subframe); - lcid=0; - - // put HARQ process round to 0 - if (cc->tdd_Config) RA_template->harq_pid = ((frameP*10)+subframeP)%10; - else RA_template->harq_pid = ((frameP*10)+subframeP)&7; - UE_list->UE_sched_ctrl[UE_id].round[CC_idP][RA_template->harq_pid] = 0; - - if ((RA_template->msg4_TBsize - rrc_sdu_length - msg4_header) <= 2) { - msg4_padding = RA_template->msg4_TBsize - rrc_sdu_length - msg4_header; - msg4_post_padding = 0; - } else { - msg4_padding = 0; - msg4_post_padding = RA_template->msg4_TBsize - rrc_sdu_length - msg4_header -1; - } - - LOG_D(MAC,"[eNB %d][RAPROC] CC_idP %d Frame %d subframeP %d Msg4 : TBS %d, sdu_len %d, msg4_header %d, msg4_padding %d, msg4_post_padding %d\n", - module_idP,CC_idP,frameP,subframeP,RA_template->msg4_TBsize,rrc_sdu_length,msg4_header,msg4_padding,msg4_post_padding); - DevAssert( UE_id != UE_INDEX_INVALID ); // FIXME not sure how to gracefully return - // CHECK THIS: &cc[CC_idP].CCCH_pdu.payload[0] - offset = generate_dlsch_header((unsigned char*)eNB->UE_list.DLSCH_pdu[CC_idP][0][(unsigned char)UE_id].payload[0], - 1, //num_sdus - (unsigned short*)&rrc_sdu_length, // - &lcid, // sdu_lcid - 255, // no drx - 31, // no timing advance - RA_template->cont_res_id, // contention res id - msg4_padding, // no padding - msg4_post_padding); - - memcpy((void*)&eNB->UE_list.DLSCH_pdu[CC_idP][0][(unsigned char)UE_id].payload[0][(unsigned char)offset], - &cc[CC_idP].CCCH_pdu.payload[0], - rrc_sdu_length); - - // DLSCH Config - fill_nfapi_dlsch_config(eNB, - dl_req, - RA_template->msg4_TBsize, - eNB->pdu_index[CC_idP], - RA_template->rnti, - 2, // resource_allocation_type : format 1A/1B/1D - 0, // virtual_resource_block_assignment_flag : localized - getRIV(N_RB_DL,first_rb,4), // resource_block_coding : RIV, 4 PRB - 2, // modulation: QPSK - 0, // redundancy version - 1, // transport_blocks - 0, // transport_block_to_codeword_swap_flag (0) - (cc->p_eNB==1 ) ? 0 : 1, // transmission_scheme - 1, // number of layers - 1, // number of subbands - //0, // codebook index - 1, // ue_category_capacity - 4, // pa: 0 dB - 0, // delta_power_offset_index - 0, // ngap - 1, // NPRB = 3 like in DCI - (cc->p_eNB==1 ) ? 1 : 2, // transmission mode - 1, // num_bf_prb_per_subband - 1); // num_bf_vector - LOG_D(MAC,"Filled DLSCH config, pdu number %d, non-dci pdu_index %d\n",dl_req->number_pdu,eNB->pdu_index[CC_idP]); + /// Choose first 4 RBs for Msg4, should really check that these are free! + first_rb = 0; - // DL request - eNB->TX_req[CC_idP].sfn_sf = fill_nfapi_tx_req(&eNB->TX_req[CC_idP].tx_request_body, - (frameP*10)+subframeP, - rrc_sdu_length, - eNB->pdu_index[CC_idP], - eNB->UE_list.DLSCH_pdu[CC_idP][0][(unsigned char)UE_id].payload[0]); - eNB->pdu_index[CC_idP]++; + vrb_map[first_rb] = 1; + vrb_map[first_rb + 1] = 1; + vrb_map[first_rb + 2] = 1; + vrb_map[first_rb + 3] = 1; - LOG_D(MAC,"Filling UCI ACK/NAK information, cce_idx %d\n",dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.cce_idx); - // Program PUCCH1a for ACK/NAK - // Program ACK/NAK for Msg4 PDSCH - fill_nfapi_uci_acknak(module_idP, - CC_idP, - RA_template->rnti, - (frameP*10)+subframeP, - dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.cce_idx); - - T(T_ENB_MAC_UE_DL_PDU_WITH_DATA, T_INT(module_idP), T_INT(CC_idP), T_INT(RA_template->rnti), T_INT(frameP), T_INT(subframeP), - T_INT(0 /*harq_pid always 0?*/), T_BUFFER(&eNB->UE_list.DLSCH_pdu[CC_idP][0][UE_id].payload[0], RA_template->msg4_TBsize)); - - if (opt_enabled==1) { - trace_pdu(1, (uint8_t *)eNB->UE_list.DLSCH_pdu[CC_idP][0][(unsigned char)UE_id].payload[0], - rrc_sdu_length, UE_id, 3, UE_RNTI(module_idP, UE_id), - eNB->frame, eNB->subframe,0,0); - LOG_D(OPT,"[eNB %d][DLSCH] CC_id %d Frame %d trace pdu for rnti %x with size %d\n", - module_idP, CC_idP, frameP, UE_RNTI(module_idP,UE_id), rrc_sdu_length); - } - - } // CCE Allocation feasible - } // msg4 frame/subframe - } // else rach_resource_type + // Compute MCS/TBS for 3 PRB (coded on 4 vrb) + msg4_header = 1 + 6 + 1; // CR header, CR CE, SDU header + + if ((rrc_sdu_length + msg4_header) <= 22) { + RA_template->msg4_mcs = 4; + RA_template->msg4_TBsize = 22; + } else if ((rrc_sdu_length + msg4_header) <= 28) { + RA_template->msg4_mcs = 5; + RA_template->msg4_TBsize = 28; + } else if ((rrc_sdu_length + msg4_header) <= 32) { + RA_template->msg4_mcs = 6; + RA_template->msg4_TBsize = 32; + } else if ((rrc_sdu_length + msg4_header) <= 41) { + RA_template->msg4_mcs = 7; + RA_template->msg4_TBsize = 41; + } else if ((rrc_sdu_length + msg4_header) <= 49) { + RA_template->msg4_mcs = 8; + RA_template->msg4_TBsize = 49; + } else if ((rrc_sdu_length + msg4_header) <= 57) { + RA_template->msg4_mcs = 9; + RA_template->msg4_TBsize = 57; + } + + fill_nfapi_dl_dci_1A (dl_config_pdu, 4, // aggregation_level + RA_template->rnti, // rnti + 1, // rnti_type, CRNTI + RA_template->harq_pid, // harq_process + 1, // tpc, none + getRIV (N_RB_DL, first_rb, 4), // resource_block_coding + RA_template->msg4_mcs, // mcs + 1, // ndi + 0, // rv + 0); // vrb_flag + LOG_D (MAC, "Frame %d, subframe %d: Msg4 DCI pdu_num %d (rnti %x,rnti_type %d,harq_pid %d, resource_block_coding (%p) %d\n", + frameP, + subframeP, + dl_req->number_pdu, + dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.rnti, + dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.rnti_type, + dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.harq_process, &dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.resource_block_coding, dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.resource_block_coding); + AssertFatal (dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.resource_block_coding < 8192, "resource_block_coding %u < 8192\n", dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.resource_block_coding); + if (!CCE_allocation_infeasible (module_idP, CC_idP, 1, subframeP, dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.aggregation_level, RA_template->rnti)) { + dl_req->number_dci++; + dl_req->number_pdu++; + + RA_template->generate_Msg4 = 0; + RA_template->wait_ack_Msg4 = 1; + + // increment Absolute subframe by 8 for Msg4 retransmission + LOG_D (MAC, "Frame %d, Subframe %d: Preparing for Msg4 retransmission currently %d.%d\n", frameP, subframeP, RA_template->Msg4_frame, RA_template->Msg4_subframe); + if (RA_template->Msg4_subframe > 1) + RA_template->Msg4_frame++; + RA_template->Msg4_frame &= 1023; + RA_template->Msg4_subframe = (RA_template->Msg4_subframe + 8) % 10; + LOG_D (MAC, "Frame %d, Subframe %d: Msg4 retransmission in %d.%d\n", frameP, subframeP, RA_template->Msg4_frame, RA_template->Msg4_subframe); + lcid = 0; + + // put HARQ process round to 0 + if (cc->tdd_Config) + RA_template->harq_pid = ((frameP * 10) + subframeP) % 10; + else + RA_template->harq_pid = ((frameP * 10) + subframeP) & 7; + UE_list->UE_sched_ctrl[UE_id].round[CC_idP][RA_template->harq_pid] = 0; + + if ((RA_template->msg4_TBsize - rrc_sdu_length - msg4_header) <= 2) { + msg4_padding = RA_template->msg4_TBsize - rrc_sdu_length - msg4_header; + msg4_post_padding = 0; + } else { + msg4_padding = 0; + msg4_post_padding = RA_template->msg4_TBsize - rrc_sdu_length - msg4_header - 1; + } + + LOG_D (MAC, "[eNB %d][RAPROC] CC_idP %d Frame %d subframeP %d Msg4 : TBS %d, sdu_len %d, msg4_header %d, msg4_padding %d, msg4_post_padding %d\n", + module_idP, CC_idP, frameP, subframeP, RA_template->msg4_TBsize, rrc_sdu_length, msg4_header, msg4_padding, msg4_post_padding); + DevAssert (UE_id != UE_INDEX_INVALID); // FIXME not sure how to gracefully return + // CHECK THIS: &cc[CC_idP].CCCH_pdu.payload[0] + offset = generate_dlsch_header ((unsigned char *) eNB->UE_list.DLSCH_pdu[CC_idP][0][(unsigned char) UE_id].payload[0], 1, //num_sdus + (unsigned short *) &rrc_sdu_length, // + &lcid, // sdu_lcid + 255, // no drx + 31, // no timing advance + RA_template->cont_res_id, // contention res id + msg4_padding, // no padding + msg4_post_padding); + + memcpy ((void *) &eNB->UE_list.DLSCH_pdu[CC_idP][0][(unsigned char) UE_id].payload[0][(unsigned char) offset], &cc[CC_idP].CCCH_pdu.payload[0], rrc_sdu_length); + + // DLSCH Config + fill_nfapi_dlsch_config (eNB, dl_req, RA_template->msg4_TBsize, eNB->pdu_index[CC_idP], RA_template->rnti, 2, // resource_allocation_type : format 1A/1B/1D + 0, // virtual_resource_block_assignment_flag : localized + getRIV (N_RB_DL, first_rb, 4), // resource_block_coding : RIV, 4 PRB + 2, // modulation: QPSK + 0, // redundancy version + 1, // transport_blocks + 0, // transport_block_to_codeword_swap_flag (0) + (cc->p_eNB == 1) ? 0 : 1, // transmission_scheme + 1, // number of layers + 1, // number of subbands + //0, // codebook index + 1, // ue_category_capacity + 4, // pa: 0 dB + 0, // delta_power_offset_index + 0, // ngap + 1, // NPRB = 3 like in DCI + (cc->p_eNB == 1) ? 1 : 2, // transmission mode + 1, // num_bf_prb_per_subband + 1); // num_bf_vector + LOG_D (MAC, "Filled DLSCH config, pdu number %d, non-dci pdu_index %d\n", dl_req->number_pdu, eNB->pdu_index[CC_idP]); + + // DL request + eNB->TX_req[CC_idP].sfn_sf = fill_nfapi_tx_req (&eNB->TX_req[CC_idP].tx_request_body, + (frameP * 10) + subframeP, rrc_sdu_length, eNB->pdu_index[CC_idP], eNB->UE_list.DLSCH_pdu[CC_idP][0][(unsigned char) UE_id].payload[0]); + eNB->pdu_index[CC_idP]++; + + LOG_D (MAC, "Filling UCI ACK/NAK information, cce_idx %d\n", dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.cce_idx); + // Program PUCCH1a for ACK/NAK + // Program ACK/NAK for Msg4 PDSCH + fill_nfapi_uci_acknak (module_idP, CC_idP, RA_template->rnti, (frameP * 10) + subframeP, dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.cce_idx); + + + T (T_ENB_MAC_UE_DL_PDU_WITH_DATA, T_INT (module_idP), T_INT (CC_idP), T_INT (RA_template->rnti), T_INT (frameP), T_INT (subframeP), + T_INT (0 /*harq_pid always 0? */ ), T_BUFFER (&eNB->UE_list.DLSCH_pdu[CC_idP][0][UE_id].payload[0], RA_template->msg4_TBsize)); + + if (opt_enabled == 1) { + trace_pdu (1, (uint8_t *) eNB->UE_list.DLSCH_pdu[CC_idP][0][(unsigned char) UE_id].payload[0], rrc_sdu_length, UE_id, 3, UE_RNTI (module_idP, UE_id), eNB->frame, eNB->subframe, 0, 0); + LOG_D (OPT, "[eNB %d][DLSCH] CC_id %d Frame %d trace pdu for rnti %x with size %d\n", module_idP, CC_idP, frameP, UE_RNTI (module_idP, UE_id), rrc_sdu_length); + } + + } // CCE Allocation feasible + } // msg4 frame/subframe + } // else rach_resource_type } -void check_Msg4_retransmission(module_id_t module_idP,int CC_idP,frame_t frameP,sub_frame_t subframeP,RA_TEMPLATE *RA_template) { - - eNB_MAC_INST *eNB = RC.mac[module_idP]; - COMMON_channels_t *cc = eNB->common_channels; - int UE_id = -1; - uint8_t *vrb_map; - int first_rb; - int N_RB_DL; - nfapi_dl_config_request_pdu_t *dl_config_pdu; - UE_list_t *UE_list=&eNB->UE_list; +void +check_Msg4_retransmission (module_id_t module_idP, int CC_idP, frame_t frameP, sub_frame_t subframeP, RA_TEMPLATE * RA_template) +{ + + eNB_MAC_INST *eNB = RC.mac[module_idP]; + COMMON_channels_t *cc = eNB->common_channels; + int UE_id = -1; + uint8_t *vrb_map; + int first_rb; + int N_RB_DL; + nfapi_dl_config_request_pdu_t *dl_config_pdu; + UE_list_t *UE_list = &eNB->UE_list; nfapi_dl_config_request_body_t *dl_req; - int round; + int round; /* -#ifdef Rel14 - COMMON_channels_t *cc = eNB->common_channels; + #ifdef Rel14 + COMMON_channels_t *cc = eNB->common_channels; - int rmax = 0; - int rep = 0; - int reps = 0; + int rmax = 0; + int rep = 0; + int reps = 0; - first_rb = 0; - struct PRACH_ConfigSIB_v1310 *ext4_prach; - PRACH_ParametersListCE_r13_t *prach_ParametersListCE_r13; - PRACH_ParametersCE_r13_t *p[4]; + first_rb = 0; + struct PRACH_ConfigSIB_v1310 *ext4_prach; + PRACH_ParametersListCE_r13_t *prach_ParametersListCE_r13; + PRACH_ParametersCE_r13_t *p[4]; - if (cc[CC_idP].radioResourceConfigCommon_BR) { + if (cc[CC_idP].radioResourceConfigCommon_BR) { - ext4_prach = cc[CC_idP].radioResourceConfigCommon_BR->ext4->prach_ConfigCommon_v1310; - prach_ParametersListCE_r13 = &ext4_prach->prach_ParametersListCE_r13; - - switch (prach_ParametersListCE_r13->list.count) { - case 4: - p[3]=prach_ParametersListCE_r13->list.array[3]; - case 3: - p[2]=prach_ParametersListCE_r13->list.array[2]; - case 2: - p[1]=prach_ParametersListCE_r13->list.array[1]; - case 1: - p[0]=prach_ParametersListCE_r13->list.array[0]; - default: - AssertFatal(1==0,"Illegal count for prach_ParametersListCE_r13 %d\n",prach_ParametersListCE_r13->list.count); - } - } -#endif - */ + ext4_prach = cc[CC_idP].radioResourceConfigCommon_BR->ext4->prach_ConfigCommon_v1310; + prach_ParametersListCE_r13 = &ext4_prach->prach_ParametersListCE_r13; + + switch (prach_ParametersListCE_r13->list.count) { + case 4: + p[3]=prach_ParametersListCE_r13->list.array[3]; + case 3: + p[2]=prach_ParametersListCE_r13->list.array[2]; + case 2: + p[1]=prach_ParametersListCE_r13->list.array[1]; + case 1: + p[0]=prach_ParametersListCE_r13->list.array[0]; + default: + AssertFatal(1==0,"Illegal count for prach_ParametersListCE_r13 %d\n",prach_ParametersListCE_r13->list.count); + } + } + #endif + */ // check HARQ status and retransmit if necessary - - UE_id = find_UE_id(module_idP,RA_template->rnti); - AssertFatal(UE_id>=0,"Can't find UE for t-crnti\n"); + + UE_id = find_UE_id (module_idP, RA_template->rnti); + AssertFatal (UE_id >= 0, "Can't find UE for t-crnti\n"); round = UE_list->UE_sched_ctrl[UE_id].round[CC_idP][RA_template->harq_pid]; - vrb_map = cc[CC_idP].vrb_map; - - dl_req = &eNB->DL_req[CC_idP].dl_config_request_body; - dl_config_pdu = &dl_req->dl_config_pdu_list[dl_req->number_pdu]; - N_RB_DL = to_prb(cc[CC_idP].mib->message.dl_Bandwidth); - - LOG_D(MAC,"[eNB %d][RAPROC] CC_id %d Frame %d, subframeP %d: Checking if Msg4 for harq_pid %d was acknowledged (round %d)\n", - module_idP,CC_idP,frameP,subframeP,RA_template->harq_pid,round); + vrb_map = cc[CC_idP].vrb_map; + + dl_req = &eNB->DL_req[CC_idP].dl_config_request_body; + dl_config_pdu = &dl_req->dl_config_pdu_list[dl_req->number_pdu]; + N_RB_DL = to_prb (cc[CC_idP].mib->message.dl_Bandwidth); + + LOG_D (MAC, "[eNB %d][RAPROC] CC_id %d Frame %d, subframeP %d: Checking if Msg4 for harq_pid %d was acknowledged (round %d)\n", module_idP, CC_idP, frameP, subframeP, RA_template->harq_pid, round); + + if (round != 8) { - if (round!=8) { - #ifdef Rel14 - if (RA_template->rach_resource_type>0) { - AssertFatal(1==0,"Msg4 Retransmissions not handled yet for BL/CE UEs\n"); - } - else -#endif - { - if ( (RA_template->Msg4_frame == frameP) && (RA_template->Msg4_subframe == subframeP)) { - - //RA_template->wait_ack_Msg4++; - // we have to schedule a retransmission - - first_rb=0; - vrb_map[first_rb] = 1; - vrb_map[first_rb+1] = 1; - vrb_map[first_rb+2] = 1; - vrb_map[first_rb+3] = 1; - - fill_nfapi_dl_dci_1A(dl_config_pdu, - 4, // aggregation_level - RA_template->rnti, // rnti - 1, // rnti_type, CRNTI - RA_template->harq_pid, // harq_process - 1, // tpc, none - getRIV(N_RB_DL,first_rb,4), // resource_block_coding - RA_template->msg4_mcs, // mcs - 1, // ndi - round&3, // rv - 0); // vrb_flag - - if (!CCE_allocation_infeasible(module_idP,CC_idP,1,subframeP,dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.aggregation_level,RA_template->rnti)) { - dl_req->number_dci++; - dl_req->number_pdu++; - - LOG_D(MAC,"msg4 retransmission for rnti %x (round %d) fsf %d/%d\n", RA_template->rnti, round, frameP, subframeP); - // DLSCH Config - fill_nfapi_dlsch_config(eNB, - dl_req, - RA_template->msg4_TBsize, - -1 /* retransmission, no pdu_index */, - RA_template->rnti, - 2, // resource_allocation_type : format 1A/1B/1D - 0, // virtual_resource_block_assignment_flag : localized - getRIV(N_RB_DL,first_rb,4), // resource_block_coding : RIV, 4 PRB - 2, // modulation: QPSK - round&3, // redundancy version - 1, // transport_blocks - 0, // transport_block_to_codeword_swap_flag (0) - (cc->p_eNB==1 ) ? 0 : 1, // transmission_scheme - 1, // number of layers - 1, // number of subbands - //0, // codebook index - 1, // ue_category_capacity - 4, // pa: 0 dB - 0, // delta_power_offset_index - 0, // ngap - 1, // NPRB = 3 like in DCI - (cc->p_eNB==1 ) ? 1 : 2, // transmission mode - 1, // num_bf_prb_per_subband - 1); // num_bf_vector - } - else - LOG_D(MAC,"msg4 retransmission for rnti %x (round %d) fsf %d/%d CCE allocation failed!\n", RA_template->rnti, round, frameP, subframeP); - - - // Program PUCCH1a for ACK/NAK - + if (RA_template->rach_resource_type > 0) { + AssertFatal (1 == 0, "Msg4 Retransmissions not handled yet for BL/CE UEs\n"); + } else +#endif + { + if ((RA_template->Msg4_frame == frameP) && (RA_template->Msg4_subframe == subframeP)) { - fill_nfapi_uci_acknak(module_idP,CC_idP, - RA_template->rnti, - (frameP*10)+subframeP, - dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.cce_idx); - - // prepare frame for retransmission - if (RA_template->Msg4_subframe>1) RA_template->Msg4_frame++; - RA_template->Msg4_frame&=1023; - RA_template->Msg4_subframe=(RA_template->Msg4_subframe+8)%10; + //RA_template->wait_ack_Msg4++; + // we have to schedule a retransmission - LOG_W(MAC,"[eNB %d][RAPROC] CC_id %d Frame %d, subframeP %d: Msg4 not acknowledged, adding ue specific dci (rnti %x) for RA (Msg4 Retransmission round %d in %d.%d)\n", - module_idP,CC_idP,frameP,subframeP,RA_template->rnti,round,RA_template->Msg4_frame,RA_template->Msg4_subframe); + first_rb = 0; + vrb_map[first_rb] = 1; + vrb_map[first_rb + 1] = 1; + vrb_map[first_rb + 2] = 1; + vrb_map[first_rb + 3] = 1; - } // Msg4 frame/subframe - } // regular LTE case + fill_nfapi_dl_dci_1A (dl_config_pdu, 4, // aggregation_level + RA_template->rnti, // rnti + 1, // rnti_type, CRNTI + RA_template->harq_pid, // harq_process + 1, // tpc, none + getRIV (N_RB_DL, first_rb, 4), // resource_block_coding + RA_template->msg4_mcs, // mcs + 1, // ndi + round & 3, // rv + 0); // vrb_flag + + if (!CCE_allocation_infeasible (module_idP, CC_idP, 1, subframeP, dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.aggregation_level, RA_template->rnti)) { + dl_req->number_dci++; + dl_req->number_pdu++; + + LOG_D (MAC, "msg4 retransmission for rnti %x (round %d) fsf %d/%d\n", RA_template->rnti, round, frameP, subframeP); + // DLSCH Config + fill_nfapi_dlsch_config (eNB, dl_req, RA_template->msg4_TBsize, -1 /* retransmission, no pdu_index */ , + RA_template->rnti, 2, // resource_allocation_type : format 1A/1B/1D + 0, // virtual_resource_block_assignment_flag : localized + getRIV (N_RB_DL, first_rb, 4), // resource_block_coding : RIV, 4 PRB + 2, // modulation: QPSK + round & 3, // redundancy version + 1, // transport_blocks + 0, // transport_block_to_codeword_swap_flag (0) + (cc->p_eNB == 1) ? 0 : 1, // transmission_scheme + 1, // number of layers + 1, // number of subbands + //0, // codebook index + 1, // ue_category_capacity + 4, // pa: 0 dB + 0, // delta_power_offset_index + 0, // ngap + 1, // NPRB = 3 like in DCI + (cc->p_eNB == 1) ? 1 : 2, // transmission mode + 1, // num_bf_prb_per_subband + 1); // num_bf_vector + } else + LOG_D (MAC, "msg4 retransmission for rnti %x (round %d) fsf %d/%d CCE allocation failed!\n", RA_template->rnti, round, frameP, subframeP); + + + // Program PUCCH1a for ACK/NAK + + + fill_nfapi_uci_acknak (module_idP, CC_idP, RA_template->rnti, (frameP * 10) + subframeP, dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.cce_idx); + + // prepare frame for retransmission + if (RA_template->Msg4_subframe > 1) + RA_template->Msg4_frame++; + RA_template->Msg4_frame &= 1023; + RA_template->Msg4_subframe = (RA_template->Msg4_subframe + 8) % 10; + + LOG_W (MAC, "[eNB %d][RAPROC] CC_id %d Frame %d, subframeP %d: Msg4 not acknowledged, adding ue specific dci (rnti %x) for RA (Msg4 Retransmission round %d in %d.%d)\n", + module_idP, CC_idP, frameP, subframeP, RA_template->rnti, round, RA_template->Msg4_frame, RA_template->Msg4_subframe); + + } // Msg4 frame/subframe + } // regular LTE case } else { - LOG_D(MAC,"[eNB %d][RAPROC] CC_id %d Frame %d, subframeP %d : Msg4 acknowledged\n",module_idP,CC_idP,frameP,subframeP); - RA_template->wait_ack_Msg4=0; - RA_template->RA_active=FALSE; - UE_id = find_UE_id(module_idP,RA_template->rnti); - DevAssert( UE_id != -1 ); - eNB->UE_list.UE_template[UE_PCCID(module_idP,UE_id)][UE_id].configured=TRUE; + LOG_D (MAC, "[eNB %d][RAPROC] CC_id %d Frame %d, subframeP %d : Msg4 acknowledged\n", module_idP, CC_idP, frameP, subframeP); + RA_template->wait_ack_Msg4 = 0; + RA_template->RA_active = FALSE; + UE_id = find_UE_id (module_idP, RA_template->rnti); + DevAssert (UE_id != -1); + eNB->UE_list.UE_template[UE_PCCID (module_idP, UE_id)][UE_id].configured = TRUE; } -} +} -void schedule_RA(module_id_t module_idP,frame_t frameP, sub_frame_t subframeP) +void +schedule_RA (module_id_t module_idP, frame_t frameP, sub_frame_t subframeP) { - int CC_id; - eNB_MAC_INST *eNB = RC.mac[module_idP]; - COMMON_channels_t *cc = eNB->common_channels; - RA_TEMPLATE *RA_template; - uint8_t i; + int CC_id; + eNB_MAC_INST *eNB = RC.mac[module_idP]; + COMMON_channels_t *cc = eNB->common_channels; + RA_TEMPLATE *RA_template; + uint8_t i; - start_meas(&eNB->schedule_ra); + start_meas (&eNB->schedule_ra); - for (CC_id=0; CC_idRA_active == TRUE) { - LOG_I(MAC,"[eNB %d][RAPROC] Frame %d, Subframe %d : CC_id %d RA %d is active (generate RAR %d, generate_Msg4 %d, wait_ack_Msg4 %d, rnti %x)\n", - module_idP,frameP,subframeP,CC_id,i,RA_template->generate_rar,RA_template->generate_Msg4,RA_template->wait_ack_Msg4, RA_template->rnti); + LOG_I (MAC, "[eNB %d][RAPROC] Frame %d, Subframe %d : CC_id %d RA %d is active (generate RAR %d, generate_Msg4 %d, wait_ack_Msg4 %d, rnti %x)\n", + module_idP, frameP, subframeP, CC_id, i, RA_template->generate_rar, RA_template->generate_Msg4, RA_template->wait_ack_Msg4, RA_template->rnti); - if (RA_template->generate_rar == 1) generate_Msg2(module_idP,CC_id,frameP,subframeP,RA_template); - else if (RA_template->generate_Msg4 == 1) generate_Msg4(module_idP,CC_id,frameP,subframeP,RA_template); - else if (RA_template->wait_ack_Msg4==1) check_Msg4_retransmission(module_idP,CC_id,frameP,subframeP,RA_template); + if (RA_template->generate_rar == 1) + generate_Msg2 (module_idP, CC_id, frameP, subframeP, RA_template); + else if (RA_template->generate_Msg4 == 1) + generate_Msg4 (module_idP, CC_id, frameP, subframeP, RA_template); + else if (RA_template->wait_ack_Msg4 == 1) + check_Msg4_retransmission (module_idP, CC_id, frameP, subframeP, RA_template); - } // RA_active == TRUE - } // for i=0 .. N_RA_PROC-1 - } // CC_id - - stop_meas(&eNB->schedule_ra); + } // RA_active == TRUE + } // for i=0 .. N_RA_PROC-1 + } // CC_id + + stop_meas (&eNB->schedule_ra); } // handles the event of MSG1 reception -void initiate_ra_proc(module_id_t module_idP, - int CC_id, - frame_t frameP, - sub_frame_t subframeP, - uint16_t preamble_index, - int16_t timing_offset, - uint16_t ra_rnti +void +initiate_ra_proc (module_id_t module_idP, int CC_id, frame_t frameP, sub_frame_t subframeP, uint16_t preamble_index, int16_t timing_offset, uint16_t ra_rnti #ifdef Rel14 - , - uint8_t rach_resource_type + , uint8_t rach_resource_type #endif - ) + ) { - uint8_t i; + uint8_t i; - COMMON_channels_t *cc = &RC.mac[module_idP]->common_channels[CC_id]; - RA_TEMPLATE *RA_template = &cc->RA_template[0]; + COMMON_channels_t *cc = &RC.mac[module_idP]->common_channels[CC_id]; + RA_TEMPLATE *RA_template = &cc->RA_template[0]; struct PRACH_ConfigSIB_v1310 *ext4_prach = NULL; PRACH_ParametersListCE_r13_t *prach_ParametersListCE_r13 = NULL; if (cc->radioResourceConfigCommon_BR && cc->radioResourceConfigCommon_BR->ext4) { - ext4_prach=cc->radioResourceConfigCommon_BR->ext4->prach_ConfigCommon_v1310; - prach_ParametersListCE_r13= &ext4_prach->prach_ParametersListCE_r13; + ext4_prach = cc->radioResourceConfigCommon_BR->ext4->prach_ConfigCommon_v1310; + prach_ParametersListCE_r13 = &ext4_prach->prach_ParametersListCE_r13; } - LOG_I(MAC,"[eNB %d][RAPROC] CC_id %d Frame %d, Subframe %d Initiating RA procedure for preamble index %d\n",module_idP,CC_id,frameP,subframeP,preamble_index); + LOG_I (MAC, "[eNB %d][RAPROC] CC_id %d Frame %d, Subframe %d Initiating RA procedure for preamble index %d\n", module_idP, CC_id, frameP, subframeP, preamble_index); #ifdef Rel14 - LOG_D(MAC,"[eNB %d][RAPROC] CC_id %d Frame %d, Subframe %d PRACH resource type %d\n",module_idP,CC_id,frameP,subframeP,rach_resource_type); + LOG_D (MAC, "[eNB %d][RAPROC] CC_id %d Frame %d, Subframe %d PRACH resource type %d\n", module_idP, CC_id, frameP, subframeP, rach_resource_type); #endif - if (prach_ParametersListCE_r13 && - prach_ParametersListCE_r13->list.countlist.count); + if (prach_ParametersListCE_r13 && prach_ParametersListCE_r13->list.count < rach_resource_type) { + LOG_E (MAC, "[eNB %d][RAPROC] CC_id %d Received impossible PRACH resource type %d, only %d CE levels configured\n", + module_idP, CC_id, rach_resource_type, (int) prach_ParametersListCE_r13->list.count); return; } - VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_INITIATE_RA_PROC,1); - VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_INITIATE_RA_PROC,0); + VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME (VCD_SIGNAL_DUMPER_FUNCTIONS_INITIATE_RA_PROC, 1); + VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME (VCD_SIGNAL_DUMPER_FUNCTIONS_INITIATE_RA_PROC, 0); - for (i=0; i5)?1:0); - RA_template[i].Msg2_subframe = (subframeP+4)%10; + RA_template[i].Msg2_frame = frameP + ((subframeP > 5) ? 1 : 0); + RA_template[i].Msg2_subframe = (subframeP + 4) % 10; /* TODO: find better procedure to allocate RNTI */ do { - RA_template[i].rnti = taus(); + RA_template[i].rnti = taus (); loop++; } while (loop != 100 && /* TODO: this is not correct, the rnti may be in use without * being in the MAC yet. To be refined. */ - !(find_UE_id(module_idP, RA_template[i].rnti) == -1 && + !(find_UE_id (module_idP, RA_template[i].rnti) == -1 && /* 1024 and 60000 arbirarily chosen, not coming from standard */ RA_template[i].rnti >= 1024 && RA_template[i].rnti < 60000)); - if (loop == 100) { printf("%s:%d:%s: FATAL ERROR! contact the authors\n", __FILE__, __LINE__, __FUNCTION__); abort(); } - RA_template[i].RA_rnti = ra_rnti; + if (loop == 100) { + printf ("%s:%d:%s: FATAL ERROR! contact the authors\n", __FILE__, __LINE__, __FUNCTION__); + abort (); + } + RA_template[i].RA_rnti = ra_rnti; RA_template[i].preamble_index = preamble_index; - LOG_I(MAC,"[eNB %d][RAPROC] CC_id %d Frame %d Activating RAR generation in Frame %d, subframe %d for process %d, rnti %x, RA_active %d\n", - module_idP,CC_id,frameP, - RA_template[i].Msg2_frame, - RA_template[i].Msg2_subframe, - i,RA_template[i].rnti, - RA_template[i].RA_active); + LOG_I (MAC, "[eNB %d][RAPROC] CC_id %d Frame %d Activating RAR generation in Frame %d, subframe %d for process %d, rnti %x, RA_active %d\n", + module_idP, CC_id, frameP, RA_template[i].Msg2_frame, RA_template[i].Msg2_subframe, i, RA_template[i].rnti, RA_template[i].RA_active); return; } } - LOG_E(MAC,"[eNB %d][RAPROC] FAILURE: CC_id %d Frame %d Initiating RA procedure for preamble index %d\n",module_idP,CC_id,frameP,preamble_index); + LOG_E (MAC, "[eNB %d][RAPROC] FAILURE: CC_id %d Frame %d Initiating RA procedure for preamble index %d\n", module_idP, CC_id, frameP, preamble_index); } -void cancel_ra_proc(module_id_t module_idP, int CC_id, frame_t frameP, rnti_t rnti) +void +cancel_ra_proc (module_id_t module_idP, int CC_id, frame_t frameP, rnti_t rnti) { - unsigned char i; - RA_TEMPLATE *RA_template = (RA_TEMPLATE *)&RC.mac[module_idP]->common_channels[CC_id].RA_template[0]; + unsigned char i; + RA_TEMPLATE *RA_template = (RA_TEMPLATE *) & RC.mac[module_idP]->common_channels[CC_id].RA_template[0]; - MSC_LOG_EVENT(MSC_PHY_ENB, "RA Cancelling procedure ue %"PRIx16" ", rnti); - LOG_D(MAC,"[eNB %d][RAPROC] CC_id %d Frame %d Cancelling RA procedure for UE rnti %x\n",module_idP,CC_id,frameP,rnti); + MSC_LOG_EVENT (MSC_PHY_ENB, "RA Cancelling procedure ue %" PRIx16 " ", rnti); + LOG_D (MAC, "[eNB %d][RAPROC] CC_id %d Frame %d Cancelling RA procedure for UE rnti %x\n", module_idP, CC_id, frameP, rnti); - for (i=0; i