From e55e880b71210155089a05e439c240d748a10e8e Mon Sep 17 00:00:00 2001 From: francescomani Date: Sat, 24 Dec 2022 14:13:35 +0100 Subject: [PATCH] cleaning up of dci functions --- .../nfapi/public_inc/fapi_nr_ue_interface.h | 2 + openair1/PHY/NR_UE_TRANSPORT/dci_nr.c | 9 +- openair1/SIMULATION/NR_PHY/dlsim.c | 17 +- openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c | 65 ++++-- openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.h | 18 +- openair2/LAYER2/NR_MAC_UE/config_ue.c | 9 + openair2/LAYER2/NR_MAC_UE/mac_defs.h | 4 + openair2/LAYER2/NR_MAC_UE/mac_proto.h | 8 + .../NR_MAC_UE/nr_ue_dci_configuration.c | 203 +++++++++++------- openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c | 107 +++------ openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c | 28 +-- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c | 30 +-- .../LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c | 3 +- .../LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c | 5 +- .../LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c | 124 ----------- .../NR_MAC_gNB/gNB_scheduler_primitives.c | 69 +++++- .../LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c | 8 +- openair2/LAYER2/NR_MAC_gNB/mac_proto.h | 13 +- openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h | 4 + 19 files changed, 340 insertions(+), 386 deletions(-) diff --git a/nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_interface.h b/nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_interface.h index 21710940d6..ebfb2becb0 100644 --- a/nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_interface.h +++ b/nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_interface.h @@ -86,6 +86,7 @@ typedef struct { typedef struct { uint16_t rnti; uint8_t dci_format; + int ss_type; // n_CCE index of first CCE for PDCCH reception int n_CCE; // N_CCE is L, or number of CCEs for DCI @@ -413,6 +414,7 @@ typedef struct { uint8_t num_dci_options; // Num DCIs the UE actually needs to decode (1 or 2) uint8_t dci_length_options[2]; uint8_t dci_format_options[2]; + uint8_t dci_type_options[2]; } fapi_nr_dl_config_dci_dl_pdu_rel15_t; typedef struct { diff --git a/openair1/PHY/NR_UE_TRANSPORT/dci_nr.c b/openair1/PHY/NR_UE_TRANSPORT/dci_nr.c index 423140fc7a..658b440c21 100644 --- a/openair1/PHY/NR_UE_TRANSPORT/dci_nr.c +++ b/openair1/PHY/NR_UE_TRANSPORT/dci_nr.c @@ -931,10 +931,11 @@ uint8_t nr_dci_decoding_procedure(PHY_VARS_NR_UE *ue, else { dci_ind->SFN = proc->frame_rx; dci_ind->slot = proc->nr_slot_rx; - dci_ind->dci_list[dci_ind->number_of_dcis].rnti = n_rnti; - dci_ind->dci_list[dci_ind->number_of_dcis].n_CCE = CCEind; - dci_ind->dci_list[dci_ind->number_of_dcis].N_CCE = L; - dci_ind->dci_list[dci_ind->number_of_dcis].dci_format = rel15->dci_format_options[k]; + dci_ind->dci_list[dci_ind->number_of_dcis].rnti = n_rnti; + dci_ind->dci_list[dci_ind->number_of_dcis].n_CCE = CCEind; + dci_ind->dci_list[dci_ind->number_of_dcis].N_CCE = L; + dci_ind->dci_list[dci_ind->number_of_dcis].dci_format = rel15->dci_format_options[k]; + dci_ind->dci_list[dci_ind->number_of_dcis].ss_type = rel15->dci_type_options[k]; dci_ind->dci_list[dci_ind->number_of_dcis].payloadSize = dci_length; memcpy((void*)dci_ind->dci_list[dci_ind->number_of_dcis].payloadBits,(void*)dci_estimation,8); dci_ind->number_of_dcis++; diff --git a/openair1/SIMULATION/NR_PHY/dlsim.c b/openair1/SIMULATION/NR_PHY/dlsim.c index 671e613679..43ecec10d2 100644 --- a/openair1/SIMULATION/NR_PHY/dlsim.c +++ b/openair1/SIMULATION/NR_PHY/dlsim.c @@ -434,8 +434,6 @@ int main(int argc, char **argv) int loglvl=OAILOG_WARNING; //float target_error_rate = 0.01; - int css_flag=0; - cpuf = get_cpu_freq_GHz(); int8_t enable_ptrs = 0; int8_t modify_dmrs = 0; @@ -463,7 +461,7 @@ int main(int argc, char **argv) FILE *scg_fd=NULL; - while ((c = getopt(argc, argv, "f:hA:pf:g:i:n:s:S:t:v:x:y:z:M:N:F:GR:d:PI:L:Ea:b:e:m:w:T:U:q:X:Y")) != -1) { + while ((c = getopt(argc, argv, "f:hA:pf:g:i:n:s:S:t:v:x:y:z:M:N:F:GR:d:PI:L:a:b:e:m:w:T:U:q:X:Y")) != -1) { switch (c) { case 'f': scg_fd = fopen(optarg,"r"); @@ -622,12 +620,6 @@ int main(int argc, char **argv) loglvl = atoi(optarg); break; - - case 'E': - css_flag=1; - break; - - case 'a': g_rbStart = atoi(optarg); break; @@ -709,7 +701,6 @@ int main(int argc, char **argv) //printf("-C Generate Calibration information for Abstraction (effective SNR adjustment to remove Pe bias w.r.t. AWGN)\n"); printf("-f raw file containing RRC configuration (generated by gNB)\n"); printf("-F Input filename (.txt format) for RX conformance testing\n"); - printf("-E used CSS scheduler\n"); printf("-o CORESET offset\n"); printf("-a Start PRB for PDSCH\n"); printf("-b Number of PRB for PDSCH\n"); @@ -1122,11 +1113,7 @@ int main(int argc, char **argv) UE_info->UE_sched_ctrl.harq_processes[harq_pid].ndi = !(trial&1); UE_info->UE_sched_ctrl.harq_processes[harq_pid].round = round; - if (css_flag == 0) { - nr_schedule_ue_spec(0, frame, slot); - } else { - nr_schedule_css_dlsch_phytest(0,frame,slot); - } + nr_schedule_ue_spec(0, frame, slot); Sched_INFO.module_id = 0; Sched_INFO.CC_id = 0; Sched_INFO.frame = frame; diff --git a/openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c b/openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c index fb20092ed5..713679c4e3 100644 --- a/openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c +++ b/openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c @@ -3130,16 +3130,42 @@ uint8_t compute_precoding_information(NR_PUSCH_Config_t *pusch_Config, return nbits; } +uint16_t get_rb_bwp_dci(nr_dci_format_t format, + int ss_type, + uint16_t cset0_bwp_size, + uint16_t ul_bwp_size, + uint16_t dl_bwp_size, + uint16_t initial_ul_bwp_size, + uint16_t initial_dl_bwp_size) +{ + uint16_t N_RB; + if (format == NR_UL_DCI_FORMAT_0_0 || format == NR_UL_DCI_FORMAT_0_1) { + if(format == NR_UL_DCI_FORMAT_0_0 && ss_type == NR_SearchSpace__searchSpaceType_PR_common) + N_RB = initial_ul_bwp_size; + else + N_RB = ul_bwp_size; + } + else { + if(format == NR_DL_DCI_FORMAT_1_0 && ss_type == NR_SearchSpace__searchSpaceType_PR_common) { + N_RB = cset0_bwp_size ? cset0_bwp_size : initial_dl_bwp_size; + } + else + N_RB = dl_bwp_size; + } + return N_RB; +} + uint16_t nr_dci_size(const NR_BWP_DownlinkCommon_t *initialDownlinkBWP, const NR_BWP_UplinkCommon_t *initialUplinkBWP, const NR_CellGroupConfig_t *cg, dci_pdu_rel15_t *dci_pdu, nr_dci_format_t format, nr_rnti_type_t rnti_type, - uint16_t N_RB, + int controlResourceSetId, int bwp_id, - NR_ControlResourceSetId_t coreset_id, - uint16_t cset0_bwp_size) { + uint16_t N_RB, + uint16_t alt_size) +{ uint16_t size = 0; uint16_t numRBG = 0; @@ -3184,20 +3210,18 @@ uint16_t nr_dci_size(const NR_BWP_DownlinkCommon_t *initialDownlinkBWP, srs_config = (ubwpd && ubwpd->srs_Config) ? ubwpd->srs_Config->choice.setup: NULL; } - int n_ul_bwp=1,n_dl_bwp=1; + int n_ul_bwp = 1,n_dl_bwp = 1; switch(format) { - /*Only sizes for 0_0 and 1_0 are correct at the moment*/ case NR_UL_DCI_FORMAT_0_0: /// fixed: Format identifier 1, Hop flag 1, MCS 5, NDI 1, RV 2, HARQ PID 4, PUSCH TPC 2 Time Domain assgnmt 4 --20 size += 20; dci_pdu->frequency_domain_assignment.nbits = (uint8_t)ceil(log2((N_RB * (N_RB + 1)) >>1)); // Freq domain assignment -- hopping scenario to be updated size += dci_pdu->frequency_domain_assignment.nbits; - int dci_10_size = nr_dci_size(initialDownlinkBWP,initialUplinkBWP,cg,dci_pdu,NR_DL_DCI_FORMAT_1_0, rnti_type, N_RB, bwp_id, coreset_id, cset0_bwp_size); - if(dci_10_size >= size) - size += dci_10_size - size; // Padding to match 1_0 size + if(alt_size >= size) + size += alt_size - size; // Padding to match 1_0 size else { - dci_pdu->frequency_domain_assignment.nbits -= (size - dci_10_size); - size = dci_10_size; + dci_pdu->frequency_domain_assignment.nbits -= (size - alt_size); + size = alt_size; } // UL/SUL indicator assumed to be 0 break; @@ -3237,11 +3261,12 @@ uint16_t nr_dci_size(const NR_BWP_DownlinkCommon_t *initialDownlinkBWP, if (pusch_Config->resourceAllocation == 0) dci_pdu->frequency_domain_assignment.nbits = numRBG; else if (pusch_Config->resourceAllocation == 1) - dci_pdu->frequency_domain_assignment.nbits = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) ); + dci_pdu->frequency_domain_assignment.nbits = (int)ceil(log2((N_RB * (N_RB + 1)) >> 1)); else - dci_pdu->frequency_domain_assignment.nbits = ((int)ceil( log2( (N_RB*(N_RB+1))>>1 ) )>numRBG) ? (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) )+1 : numRBG+1; + dci_pdu->frequency_domain_assignment.nbits = ((int)ceil(log2((N_RB * (N_RB + 1)) >> 1)) > numRBG) ? (int)ceil(log2((N_RB * (N_RB + 1)) >> 1)) + 1 : numRBG + 1; } - else dci_pdu->frequency_domain_assignment.nbits = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) ); + else + dci_pdu->frequency_domain_assignment.nbits = (int)ceil(log2((N_RB * (N_RB + 1)) >> 1)); LOG_D(NR_MAC,"PUSCH Frequency Domain Assignment nbits %d, N_RB %d\n",dci_pdu->frequency_domain_assignment.nbits,N_RB); size += dci_pdu->frequency_domain_assignment.nbits; // Time domain assignment @@ -3357,14 +3382,10 @@ uint16_t nr_dci_size(const NR_BWP_DownlinkCommon_t *initialDownlinkBWP, // 3GPP TS 38.212 Section 7.3.1.0: DCI size alignment // Size of DCI format 1_0 is given by the size of CORESET 0 if CORESET 0 is configured for the cell and the size // of initial DL bandwidth part if CORESET 0 is not configured for the cell - if(cset0_bwp_size>0) { - N_RB = cset0_bwp_size; - } - size = 28; - size += (uint8_t)ceil( log2( (N_RB*(N_RB+1))>>1 ) ); // Freq domain assignment + size += (uint8_t)ceil(log2((N_RB * (N_RB + 1)) >> 1)); // Freq domain assignment - dci_pdu->frequency_domain_assignment.nbits = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) ); + dci_pdu->frequency_domain_assignment.nbits = (int)ceil(log2((N_RB * (N_RB + 1)) >> 1)); dci_pdu->time_domain_assignment.nbits = 4; dci_pdu->vrb_to_prb_mapping.nbits = 1; break; @@ -3399,9 +3420,9 @@ uint16_t nr_dci_size(const NR_BWP_DownlinkCommon_t *initialDownlinkBWP, if (pdsch_Config && pdsch_Config->resourceAllocation == 0) dci_pdu->frequency_domain_assignment.nbits = numRBG; else if (pdsch_Config == NULL || pdsch_Config->resourceAllocation == 1) - dci_pdu->frequency_domain_assignment.nbits = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) ); + dci_pdu->frequency_domain_assignment.nbits = (int)ceil(log2((N_RB * (N_RB + 1)) >> 1)); else - dci_pdu->frequency_domain_assignment.nbits = ((int)ceil( log2( (N_RB*(N_RB+1))>>1 ) )>numRBG) ? (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) )+1 : numRBG+1; + dci_pdu->frequency_domain_assignment.nbits = ((int)ceil(log2((N_RB * (N_RB + 1)) >> 1)) > numRBG) ? (int)ceil(log2((N_RB * (N_RB + 1)) >> 1)) + 1 : numRBG + 1; size += dci_pdu->frequency_domain_assignment.nbits; LOG_D(NR_MAC,"dci_pdu->frequency_domain_assignment.nbits %d (N_RB %d)\n",dci_pdu->frequency_domain_assignment.nbits,N_RB); // Time domain assignment (see table 5.1.2.1.1-1 in 38.214 @@ -3478,7 +3499,7 @@ uint16_t nr_dci_size(const NR_BWP_DownlinkCommon_t *initialDownlinkBWP, LOG_D(NR_MAC,"dci_pdu->antenna_ports.nbits %d\n",dci_pdu->antenna_ports.nbits); // Tx Config Indication for (int i = 0; i < pdcch_Config->controlResourceSetToAddModList->list.count; i++) { - if (pdcch_Config->controlResourceSetToAddModList->list.array[i]->controlResourceSetId == coreset_id) { + if (pdcch_Config->controlResourceSetToAddModList->list.array[i]->controlResourceSetId == controlResourceSetId) { long *isTciEnable = pdcch_Config->controlResourceSetToAddModList->list.array[i]->tci_PresentInDCI; if (isTciEnable != NULL) { dci_pdu->transmission_configuration_indication.nbits = 3; diff --git a/openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.h b/openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.h index 7f88216cbd..06251fefb7 100644 --- a/openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.h +++ b/openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.h @@ -75,16 +75,24 @@ uint8_t compute_precoding_information(NR_PUSCH_Config_t *pusch_Config, const uint8_t *nrOfLayers, uint32_t *val); -uint16_t nr_dci_size(const NR_BWP_DownlinkCommon_t *initialDLBWP, - const NR_BWP_UplinkCommon_t *initialULBWP, +uint16_t nr_dci_size(const NR_BWP_DownlinkCommon_t *initialDownlinkBWP, + const NR_BWP_UplinkCommon_t *initialUplinkBWP, const NR_CellGroupConfig_t *cg, dci_pdu_rel15_t *dci_pdu, nr_dci_format_t format, nr_rnti_type_t rnti_type, - uint16_t N_RB, + int controlResourceSetId, int bwp_id, - NR_ControlResourceSetId_t coreset_id, - uint16_t cset0_bwp_size); + uint16_t N_RB, + uint16_t alt_size); + +uint16_t get_rb_bwp_dci(nr_dci_format_t format, + int ss_type, + uint16_t cset0_bwp_size, + uint16_t ul_bwp_size, + uint16_t dl_bwp_size, + uint16_t initial_ul_bwp_size, + uint16_t initial_dl_bwp_size); void find_aggregation_candidates(uint8_t *aggregation_level, uint8_t *nr_of_candidates, diff --git a/openair2/LAYER2/NR_MAC_UE/config_ue.c b/openair2/LAYER2/NR_MAC_UE/config_ue.c index d465cbf2e7..4b4c92e406 100644 --- a/openair2/LAYER2/NR_MAC_UE/config_ue.c +++ b/openair2/LAYER2/NR_MAC_UE/config_ue.c @@ -615,6 +615,15 @@ void configure_current_BWP(NR_UE_MAC_INST_t *mac, UL_BWP->cyclicprefix = UL_BWP->genericParameters.cyclicPrefix; UL_BWP->BWPSize = NRRIV2BW(UL_BWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); UL_BWP->BWPStart = NRRIV2PRBOFFSET(UL_BWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); + + DL_BWP->initial_BWPSize = mac->scc ? NRRIV2BW(mac->scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE) : + NRRIV2BW(mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP.genericParameters.locationAndBandwidth, MAX_BWP_SIZE); + UL_BWP->initial_BWPSize = mac->scc ? NRRIV2BW(mac->scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE) : + NRRIV2BW(mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.genericParameters.locationAndBandwidth, MAX_BWP_SIZE); + DL_BWP->initial_BWPStart = mac->scc ? NRRIV2PRBOFFSET(mac->scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE) : + NRRIV2PRBOFFSET(mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP.genericParameters.locationAndBandwidth, MAX_BWP_SIZE); + UL_BWP->initial_BWPStart = mac->scc ? NRRIV2PRBOFFSET(mac->scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE) : + NRRIV2PRBOFFSET(mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.genericParameters.locationAndBandwidth, MAX_BWP_SIZE); } diff --git a/openair2/LAYER2/NR_MAC_UE/mac_defs.h b/openair2/LAYER2/NR_MAC_UE/mac_defs.h index 4eb3fdfe50..b3a3915993 100644 --- a/openair2/LAYER2/NR_MAC_UE/mac_defs.h +++ b/openair2/LAYER2/NR_MAC_UE/mac_defs.h @@ -377,6 +377,8 @@ typedef struct NR_DL_BWP { NR_BWP_t genericParameters; int scs; long *cyclicprefix; + uint16_t initial_BWPSize; + uint16_t initial_BWPStart; uint16_t BWPSize; uint16_t BWPStart; } NR_DL_BWP_t; @@ -386,6 +388,8 @@ typedef struct NR_UL_BWP { NR_BWP_t genericParameters; int scs; long *cyclicprefix; + uint16_t initial_BWPSize; + uint16_t initial_BWPStart; uint16_t BWPSize; uint16_t BWPStart; } NR_UL_BWP_t; diff --git a/openair2/LAYER2/NR_MAC_UE/mac_proto.h b/openair2/LAYER2/NR_MAC_UE/mac_proto.h index ac2881435f..bf6b89f71c 100644 --- a/openair2/LAYER2/NR_MAC_UE/mac_proto.h +++ b/openair2/LAYER2/NR_MAC_UE/mac_proto.h @@ -455,6 +455,14 @@ void configure_ss_coreset(NR_UE_MAC_INST_t *mac, NR_ServingCellConfig_t *scd, NR_BWP_Id_t dl_bwp_id); +static uint8_t nr_extract_dci_info(NR_UE_MAC_INST_t *mac, + uint8_t dci_format, + uint8_t dci_size, + uint16_t rnti, + int ss_type, + uint64_t *dci_pdu, + dci_pdu_rel15_t *dci_pdu_rel15); + fapi_nr_ul_config_request_t *get_ul_config_request(NR_UE_MAC_INST_t *mac, int slot); void fill_ul_config(fapi_nr_ul_config_request_t *ul_config, frame_t frame_tx, int slot_tx, uint8_t pdu_type); diff --git a/openair2/LAYER2/NR_MAC_UE/nr_ue_dci_configuration.c b/openair2/LAYER2/NR_MAC_UE/nr_ue_dci_configuration.c index b25b530176..0670c1cff0 100644 --- a/openair2/LAYER2/NR_MAC_UE/nr_ue_dci_configuration.c +++ b/openair2/LAYER2/NR_MAC_UE/nr_ue_dci_configuration.c @@ -87,7 +87,8 @@ void fill_dci_search_candidates(NR_SearchSpace_t *ss, } } -void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15, fapi_nr_dl_config_request_t *dl_config, int rnti_type, int ss_id){ +void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15, fapi_nr_dl_config_request_t *dl_config, int rnti_type, int ss_id) +{ uint16_t monitoringSymbolsWithinSlot = 0; int sps = 0; @@ -95,6 +96,7 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t AssertFatal(mac->scc == NULL || mac->scc_SIB == NULL, "both scc and scc_SIB cannot be non-null\n"); NR_DL_BWP_t *current_DL_BWP = &mac->current_DL_BWP; + NR_UL_BWP_t *current_UL_BWP = &mac->current_UL_BWP; NR_BWP_Id_t dl_bwp_id = current_DL_BWP->bwp_id; NR_ServingCellConfigCommon_t *scc = mac->scc; NR_ServingCellConfigCommonSIB_t *scc_SIB = mac->scc_SIB; @@ -122,7 +124,7 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t uint8_t coreset_id = *ss->controlResourceSetId; - if(coreset_id>0) { + if(coreset_id > 0) { coreset = mac->coreset[dl_bwp_id][coreset_id - 1]; rel15->coreset.CoreSetType = NFAPI_NR_CSET_CONFIG_PDCCH_CONFIG; } else { @@ -161,86 +163,131 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t rel15->coreset.pdcch_dmrs_scrambling_id = mac->physCellId; rel15->coreset.scrambling_rnti = 0; } - // loop over RNTI type and configure resource allocation for DCI - switch(rnti_type) { - case NR_RNTI_C: - // we use DL BWP dedicated - sps = current_DL_BWP->cyclicprefix ? 12 : 14; - // for SPS=14 8 MSBs in positions 13 down to 6 - monitoringSymbolsWithinSlot = (ss->monitoringSymbolsWithinSlot->buf[0]<<(sps-8)) | (ss->monitoringSymbolsWithinSlot->buf[1]>>(16-sps)); - rel15->rnti = mac->crnti; - rel15->BWPSize = current_DL_BWP->BWPSize; - rel15->BWPStart = current_DL_BWP->BWPStart; - rel15->SubcarrierSpacing = current_DL_BWP->scs; - for (int i = 0; i < rel15->num_dci_options; i++) { - rel15->dci_length_options[i] = nr_dci_size(initialDownlinkBWP,initialUplinkBWP, mac->cg, &mac->def_dci_pdu_rel15[rel15->dci_format_options[i]], rel15->dci_format_options[i], NR_RNTI_C, rel15->BWPSize, dl_bwp_id, coreset_id, mac->type0_PDCCH_CSS_config.num_rbs); - } - break; - case NR_RNTI_RA: - // we use the initial DL BWP - sps = current_DL_BWP->cyclicprefix == NULL ? 14 : 12; - monitoringSymbolsWithinSlot = (ss->monitoringSymbolsWithinSlot->buf[0]<<(sps-8)) | (ss->monitoringSymbolsWithinSlot->buf[1]>>(16-sps)); - rel15->rnti = mac->ra.ra_rnti; - if (get_softmodem_params()->sa) { - rel15->BWPSize = mac->type0_PDCCH_CSS_config.num_rbs; - rel15->BWPStart = mac->type0_PDCCH_CSS_config.cset_start_rb; - } else { // NSA mode is not using the Initial BWP - rel15->BWPSize = NRRIV2BW(initialDownlinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); - rel15->BWPStart = current_DL_BWP->BWPStart; - } - rel15->SubcarrierSpacing = current_DL_BWP->scs; - rel15->dci_length_options[0] = nr_dci_size(initialDownlinkBWP,initialUplinkBWP, mac->cg, &mac->def_dci_pdu_rel15[rel15->dci_format_options[0]], rel15->dci_format_options[0], NR_RNTI_RA, rel15->BWPSize, dl_bwp_id, coreset_id, mac->type0_PDCCH_CSS_config.num_rbs); - break; - case NR_RNTI_P: - break; - case NR_RNTI_CS: - break; - case NR_RNTI_TC: - // we use the initial DL BWP - sps = current_DL_BWP->cyclicprefix == NULL ? 14 : 12; - monitoringSymbolsWithinSlot = (ss->monitoringSymbolsWithinSlot->buf[0]<<(sps-8)) | (ss->monitoringSymbolsWithinSlot->buf[1]>>(16-sps)); - rel15->rnti = mac->ra.t_crnti; - rel15->BWPSize = mac->type0_PDCCH_CSS_config.num_rbs; - rel15->BWPStart = mac->type0_PDCCH_CSS_config.cset_start_rb; - rel15->SubcarrierSpacing = current_DL_BWP->scs; - for (int i = 0; i < rel15->num_dci_options; i++) { - rel15->dci_length_options[i] = nr_dci_size(initialDownlinkBWP,initialUplinkBWP, mac->cg, &mac->def_dci_pdu_rel15[rel15->dci_format_options[i]], rel15->dci_format_options[i], NR_RNTI_TC, rel15->BWPSize, dl_bwp_id, coreset_id, mac->type0_PDCCH_CSS_config.num_rbs); + int N_RB; + for (int i = 0; i < rel15->num_dci_options; i++) { + rel15->dci_type_options[i] = ss->searchSpaceType->present; + const int dci_format = rel15->dci_format_options[i]; + uint16_t alt_size = 0; + if(current_DL_BWP) { + N_RB = get_rb_bwp_dci(dci_format, + ss->searchSpaceType->present, + mac->type0_PDCCH_CSS_config.num_rbs, + current_UL_BWP->BWPSize, + current_DL_BWP->BWPSize, + current_UL_BWP->initial_BWPSize, + current_DL_BWP->initial_BWPSize); + + // computing alternative size for padding + uint16_t alt_rb; + dci_pdu_rel15_t temp_pdu; + if(dci_format == NR_DL_DCI_FORMAT_1_0) { + alt_rb = get_rb_bwp_dci(NR_UL_DCI_FORMAT_0_0, + ss->searchSpaceType->present, + mac->type0_PDCCH_CSS_config.num_rbs, + current_UL_BWP->BWPSize, + current_DL_BWP->BWPSize, + current_UL_BWP->initial_BWPSize, + current_DL_BWP->initial_BWPSize); + + alt_size = nr_dci_size(initialDownlinkBWP,initialUplinkBWP, mac->cg, &temp_pdu, + NR_UL_DCI_FORMAT_0_0, rnti_type, coreset_id, dl_bwp_id, alt_rb, 0); } - break; - case NR_RNTI_SP_CSI: - break; - case NR_RNTI_SI: - sps=14; + if(dci_format == NR_UL_DCI_FORMAT_0_0) { + alt_rb = get_rb_bwp_dci(NR_DL_DCI_FORMAT_1_0, + ss->searchSpaceType->present, + mac->type0_PDCCH_CSS_config.num_rbs, + current_UL_BWP->BWPSize, + current_DL_BWP->BWPSize, + current_UL_BWP->initial_BWPSize, + current_DL_BWP->initial_BWPSize); - // for SPS=14 8 MSBs in positions 13 down to 6 - monitoringSymbolsWithinSlot = (ss->monitoringSymbolsWithinSlot->buf[0]<<(sps-8)) | (ss->monitoringSymbolsWithinSlot->buf[1]>>(16-sps)); - - rel15->rnti = SI_RNTI; // SI-RNTI - 3GPP TS 38.321 Table 7.1-1: RNTI values - rel15->BWPSize = mac->type0_PDCCH_CSS_config.num_rbs; - rel15->BWPStart = mac->type0_PDCCH_CSS_config.cset_start_rb; - - if(mac->frequency_range == FR1) - rel15->SubcarrierSpacing = mac->mib->subCarrierSpacingCommon; - else - rel15->SubcarrierSpacing = mac->mib->subCarrierSpacingCommon + 2; - - for (int i = 0; i < rel15->num_dci_options; i++) { - rel15->dci_length_options[i] = nr_dci_size(initialDownlinkBWP,initialUplinkBWP, mac->cg, &mac->def_dci_pdu_rel15[rel15->dci_format_options[i]], rel15->dci_format_options[i], NR_RNTI_SI, rel15->BWPSize, 0, coreset_id, mac->type0_PDCCH_CSS_config.num_rbs); + alt_size = nr_dci_size(initialDownlinkBWP,initialUplinkBWP, mac->cg, &temp_pdu, + NR_DL_DCI_FORMAT_1_0, rnti_type, coreset_id, dl_bwp_id, alt_rb, 0); } - break; - case NR_RNTI_SFI: - break; - case NR_RNTI_INT: - break; - case NR_RNTI_TPC_PUSCH: - break; - case NR_RNTI_TPC_PUCCH: - break; - case NR_RNTI_TPC_SRS: - break; - default: - break; + } + else + N_RB = mac->type0_PDCCH_CSS_config.num_rbs; + switch(rnti_type) { + case NR_RNTI_C: + // we use DL BWP dedicated + sps = current_DL_BWP->cyclicprefix ? 12 : 14; + // for SPS=14 8 MSBs in positions 13 down to 6 + monitoringSymbolsWithinSlot = (ss->monitoringSymbolsWithinSlot->buf[0]<<(sps-8)) | (ss->monitoringSymbolsWithinSlot->buf[1]>>(16-sps)); + rel15->rnti = mac->crnti; + rel15->BWPSize = current_DL_BWP->BWPSize; + rel15->BWPStart = current_DL_BWP->BWPStart; + rel15->SubcarrierSpacing = current_DL_BWP->scs; + rel15->dci_length_options[i] = nr_dci_size(initialDownlinkBWP,initialUplinkBWP, mac->cg, + &mac->def_dci_pdu_rel15[dci_format], + dci_format, NR_RNTI_C, coreset_id, dl_bwp_id, N_RB, alt_size); + break; + case NR_RNTI_RA: + // we use the initial DL BWP + sps = current_DL_BWP->cyclicprefix == NULL ? 14 : 12; + monitoringSymbolsWithinSlot = (ss->monitoringSymbolsWithinSlot->buf[0]<<(sps-8)) | (ss->monitoringSymbolsWithinSlot->buf[1]>>(16-sps)); + rel15->rnti = mac->ra.ra_rnti; + if (get_softmodem_params()->sa) { + rel15->BWPSize = mac->type0_PDCCH_CSS_config.num_rbs; + rel15->BWPStart = mac->type0_PDCCH_CSS_config.cset_start_rb; + } else { // NSA mode is not using the Initial BWP + rel15->BWPSize = current_DL_BWP->initial_BWPSize; + rel15->BWPStart = current_DL_BWP->BWPStart; + } + rel15->SubcarrierSpacing = current_DL_BWP->scs; + rel15->dci_length_options[i] = nr_dci_size(initialDownlinkBWP,initialUplinkBWP, mac->cg, + &mac->def_dci_pdu_rel15[dci_format], + dci_format, NR_RNTI_RA, coreset_id, dl_bwp_id, N_RB, alt_size); + break; + case NR_RNTI_P: + break; + case NR_RNTI_CS: + break; + case NR_RNTI_TC: + // we use the initial DL BWP + sps = current_DL_BWP->cyclicprefix == NULL ? 14 : 12; + monitoringSymbolsWithinSlot = (ss->monitoringSymbolsWithinSlot->buf[0]<<(sps-8)) | (ss->monitoringSymbolsWithinSlot->buf[1]>>(16-sps)); + rel15->rnti = mac->ra.t_crnti; + rel15->BWPSize = mac->type0_PDCCH_CSS_config.num_rbs; + rel15->BWPStart = mac->type0_PDCCH_CSS_config.cset_start_rb; + rel15->SubcarrierSpacing = current_DL_BWP->scs; + rel15->dci_length_options[i] = nr_dci_size(initialDownlinkBWP,initialUplinkBWP, + mac->cg, &mac->def_dci_pdu_rel15[dci_format], + dci_format, NR_RNTI_TC, coreset_id, dl_bwp_id, N_RB, alt_size); + break; + case NR_RNTI_SP_CSI: + break; + case NR_RNTI_SI: + sps=14; + // for SPS=14 8 MSBs in positions 13 down to 6 + monitoringSymbolsWithinSlot = (ss->monitoringSymbolsWithinSlot->buf[0]<<(sps-8)) | (ss->monitoringSymbolsWithinSlot->buf[1]>>(16-sps)); + + rel15->rnti = SI_RNTI; // SI-RNTI - 3GPP TS 38.321 Table 7.1-1: RNTI values + rel15->BWPSize = mac->type0_PDCCH_CSS_config.num_rbs; + rel15->BWPStart = mac->type0_PDCCH_CSS_config.cset_start_rb; + + if(mac->frequency_range == FR1) + rel15->SubcarrierSpacing = mac->mib->subCarrierSpacingCommon; + else + rel15->SubcarrierSpacing = mac->mib->subCarrierSpacingCommon + 2; + + rel15->dci_length_options[i] = nr_dci_size(initialDownlinkBWP,initialUplinkBWP, mac->cg, + &mac->def_dci_pdu_rel15[dci_format], + dci_format, NR_RNTI_SI, coreset_id, 0, mac->type0_PDCCH_CSS_config.num_rbs, alt_size); + break; + case NR_RNTI_SFI: + break; + case NR_RNTI_INT: + break; + case NR_RNTI_TPC_PUSCH: + break; + case NR_RNTI_TPC_PUCCH: + break; + case NR_RNTI_TPC_SRS: + break; + default: + break; + } } for (int i = 0; i < sps; i++) { if ((monitoringSymbolsWithinSlot >> (sps - 1 - i)) & 1) { diff --git a/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c b/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c index e2ba12380e..3b3c483ec0 100644 --- a/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c +++ b/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c @@ -130,13 +130,6 @@ const initial_pucch_resource_t initial_pucch_resource[16] = { }; -static uint8_t nr_extract_dci_info(NR_UE_MAC_INST_t *mac, - uint8_t dci_format, - uint8_t dci_length, - uint16_t rnti, - uint64_t *dci_pdu, - dci_pdu_rel15_t *nr_pdci_info_extracted); - void nr_ue_init_mac(module_id_t module_idP) { int i; @@ -170,7 +163,7 @@ void nr_ue_init_mac(module_id_t module_idP) { for (i = 0; i < NR_MAX_NUM_LCID; i++) { LOG_D(NR_MAC, "[UE%d] Applying default logical channel config for LCGID %d\n", - module_idP, i); + module_idP, i); mac->scheduling_info.Bj[i] = -1; mac->scheduling_info.bucket_size[i] = -1; @@ -626,7 +619,7 @@ int nr_ue_process_dci_indication_pdu(module_id_t module_id,int cc_id, int gNB_in LOG_D(MAC,"Received dci indication (rnti %x,dci format %d,n_CCE %d,payloadSize %d,payload %llx)\n", dci->rnti,dci->dci_format,dci->n_CCE,dci->payloadSize,*(unsigned long long*)dci->payloadBits); - int8_t ret = nr_extract_dci_info(mac, dci->dci_format, dci->payloadSize, dci->rnti, (uint64_t *)dci->payloadBits, def_dci_pdu_rel15); + int8_t ret = nr_extract_dci_info(mac, dci->dci_format, dci->payloadSize, dci->rnti, dci->ss_type, (uint64_t *)dci->payloadBits, def_dci_pdu_rel15); if ((ret&1) == 1) return -1; else if (ret == 2) { dci->dci_format = NR_UL_DCI_FORMAT_0_0; @@ -960,12 +953,8 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr nb_rb_oh, 0, 1); int bw_tbslbrm; - if (mac->scc || mac->scc_SIB || mac->cg) { - NR_BWP_t genericParameters = mac->scc ? mac->scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters : - mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP.genericParameters; - int BWPSize = NRRIV2BW(genericParameters.locationAndBandwidth, MAX_BWP_SIZE); - bw_tbslbrm = get_dlbw_tbslbrm(BWPSize, mac->cg); - } + if (current_DL_BWP->initial_BWPSize > 0) + bw_tbslbrm = get_dlbw_tbslbrm(current_DL_BWP->initial_BWPSize, mac->cg); else bw_tbslbrm = dlsch_config_pdu_1_0->BWPSize; dlsch_config_pdu_1_0->tbslbrm = nr_compute_tbslbrm(dlsch_config_pdu_1_0->mcs_table, @@ -1397,8 +1386,7 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr long *maxMIMO_Layers = mac->cg->spCellConfig->spCellConfigDedicated->pdsch_ServingCellConfig->choice.setup->ext1->maxMIMO_Layers; AssertFatal (maxMIMO_Layers != NULL,"Option with max MIMO layers not configured is not supported\n"); int nl_tbslbrm = *maxMIMO_Layers < 4 ? *maxMIMO_Layers : 4; - int BWPSize = current_DL_BWP->BWPSize; - int bw_tbslbrm = get_dlbw_tbslbrm(BWPSize, mac->cg); + int bw_tbslbrm = get_dlbw_tbslbrm(current_DL_BWP->initial_BWPSize, mac->cg); dlsch_config_pdu_1_1->tbslbrm = nr_compute_tbslbrm(dlsch_config_pdu_1_1->mcs_table, bw_tbslbrm, nl_tbslbrm); @@ -2805,65 +2793,39 @@ void nr_ue_send_sdu(nr_downlink_indication_t *dl_info, NR_UL_TIME_ALIGNMENT_t *u } -// N_RB configuration according to 7.3.1.0 (DCI size alignment) of TS 38.212 -int get_n_rb(NR_UE_MAC_INST_t *mac, int rnti_type){ - - int N_RB = 0, start_RB; - NR_BWP_Id_t dl_bwp_id = mac->current_DL_BWP.bwp_id; - switch(rnti_type) { - case NR_RNTI_RA: - case NR_RNTI_TC: - case NR_RNTI_P: { - if (mac->DLbwp[dl_bwp_id-1]->bwp_Common->pdcch_ConfigCommon->choice.setup->controlResourceSetZero) { - uint8_t coreset_id = 0; // assuming controlResourceSetId is 0 for controlResourceSetZero - NR_ControlResourceSet_t *coreset = mac->coreset[dl_bwp_id][coreset_id]; - get_coreset_rballoc(coreset->frequencyDomainResources.buf,&N_RB,&start_RB); - } else { - N_RB = NRRIV2BW(mac->scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); - } - break; - } - case NR_RNTI_SI: - N_RB = mac->type0_PDCCH_CSS_config.num_rbs; - break; - case NR_RNTI_C: - N_RB = NRRIV2BW(mac->DLbwp[dl_bwp_id-1]->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); - break; - } - return N_RB; - -} - static uint8_t nr_extract_dci_info(NR_UE_MAC_INST_t *mac, - uint8_t dci_format, - uint8_t dci_size, - uint16_t rnti, - uint64_t *dci_pdu, - dci_pdu_rel15_t *dci_pdu_rel15) { + uint8_t dci_format, + uint8_t dci_size, + uint16_t rnti, + int ss_type, + uint64_t *dci_pdu, + dci_pdu_rel15_t *dci_pdu_rel15) +{ - int N_RB = 0; int pos = 0; int fsize = 0; - int rnti_type = get_rnti_type(mac, rnti); NR_DL_BWP_t *current_DL_BWP = &mac->current_DL_BWP; NR_UL_BWP_t *current_UL_BWP = &mac->current_UL_BWP; - NR_BWP_Id_t dl_bwp_id = current_DL_BWP->bwp_id; - int N_RB_UL = current_UL_BWP->BWPSize; - + int N_RB; + if(current_DL_BWP) + N_RB = get_rb_bwp_dci(dci_format, + ss_type, + mac->type0_PDCCH_CSS_config.num_rbs, + current_UL_BWP->BWPSize, + current_DL_BWP->BWPSize, + current_UL_BWP->initial_BWPSize, + current_DL_BWP->initial_BWPSize); + else + N_RB = mac->type0_PDCCH_CSS_config.num_rbs; LOG_D(MAC,"nr_extract_dci_info : dci_pdu %lx, size %d\n",*dci_pdu,dci_size); switch(dci_format) { case NR_DL_DCI_FORMAT_1_0: switch(rnti_type) { case NR_RNTI_RA: - if(mac->scc_SIB) { - N_RB = mac->type0_PDCCH_CSS_config.num_rbs; - } else { - N_RB = get_n_rb(mac, rnti_type); - } // Freq domain assignment - fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) ); + fsize = (int)ceil(log2((N_RB * (N_RB + 1)) >> 1)); pos=fsize; dci_pdu_rel15->frequency_domain_assignment.val = *dci_pdu>>(dci_size-pos)&((1<format_indicator == 0) { dci_pdu_rel15 = &mac->def_dci_pdu_rel15[NR_UL_DCI_FORMAT_0_0]; - return 2+nr_extract_dci_info(mac, NR_UL_DCI_FORMAT_0_0, dci_size, rnti, dci_pdu, dci_pdu_rel15); + return 2+nr_extract_dci_info(mac, NR_UL_DCI_FORMAT_0_0, dci_size, rnti, ss_type, dci_pdu, dci_pdu_rel15); } #ifdef DEBUG_EXTRACT_DCI LOG_D(MAC,"Format indicator %d (%d bits) N_RB_BWP %d => %d (0x%lx)\n",dci_pdu_rel15->format_indicator,1,N_RB,dci_size-pos,*dci_pdu); #endif - N_RB = current_DL_BWP->BWPSize; - // Freq domain assignment (275rb >> fsize = 16) - fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) ); + // Freq domain assignment (275rb >> fsize = 16) + fsize = (int)ceil(log2((N_RB * (N_RB + 1)) >> 1)); pos+=fsize; dci_pdu_rel15->frequency_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&((1<type0_PDCCH_CSS_config.num_rbs; // Freq domain assignment 0-16 bit - fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) ); + fsize = (int)ceil(log2((N_RB * (N_RB + 1)) >> 1)); pos+=fsize; dci_pdu_rel15->frequency_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&((1<0 && mac->DLbwp[dl_bwp_id-1]) N_RB=NRRIV2BW(mac->DLbwp[dl_bwp_id-1]->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); - else N_RB=mac->type0_PDCCH_CSS_config.num_rbs; - - // indicating a DL DCI format 1bit pos++; dci_pdu_rel15->format_indicator = (*dci_pdu>>(dci_size-pos))&1; @@ -3103,14 +3058,14 @@ static uint8_t nr_extract_dci_info(NR_UE_MAC_INST_t *mac, //switch to DCI_0_0 if (dci_pdu_rel15->format_indicator == 0) { dci_pdu_rel15 = &mac->def_dci_pdu_rel15[NR_UL_DCI_FORMAT_0_0]; - return 2+nr_extract_dci_info(mac, NR_UL_DCI_FORMAT_0_0, dci_size, rnti, dci_pdu, dci_pdu_rel15); + return 2+nr_extract_dci_info(mac, NR_UL_DCI_FORMAT_0_0, dci_size, rnti, ss_type, dci_pdu, dci_pdu_rel15); } if (dci_pdu_rel15->format_indicator == 0) return 1; // discard dci, format indicator not corresponding to dci_format // Freq domain assignment 0-16 bit - fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) ); + fsize = (int)ceil(log2((N_RB * (N_RB + 1)) >> 1)); pos+=fsize; dci_pdu_rel15->frequency_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&((1<bwp_indicator.val = (*dci_pdu>>(dci_size-pos))&((1<bwp_indicator.nbits)-1); // Freq domain assignment max 16 bit - fsize = (int)ceil( log2( (N_RB_UL*(N_RB_UL+1))>>1 ) ); + fsize = (int)ceil(log2((N_RB * (N_RB + 1)) >> 1)); pos+=fsize; dci_pdu_rel15->frequency_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&((1< 0 ? mac->ULbwp[ul_bwp_id - 1] : NULL; NR_BWP_UplinkDedicated_t *ibwp; - int scs,abwp_start,abwp_size,startSymbolAndLength,mappingtype; + int startSymbolAndLength,mappingtype; NR_PUSCH_Config_t *pusch_Config=NULL; if (mac->cg && ubwp && mac->cg->spCellConfig && @@ -587,22 +587,16 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac, startSymbolAndLength = ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[rar_grant->Msg3_t_alloc]->startSymbolAndLength; mappingtype = ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[rar_grant->Msg3_t_alloc]->mappingType; - // active BWP start - abwp_start = NRRIV2PRBOFFSET(ubwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); - abwp_size = NRRIV2BW(ubwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); - scs = ubwp->bwp_Common->genericParameters.subcarrierSpacing; } else { startSymbolAndLength = initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[rar_grant->Msg3_t_alloc]->startSymbolAndLength; mappingtype = initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[rar_grant->Msg3_t_alloc]->mappingType; - - // active BWP start - abwp_start = NRRIV2PRBOFFSET(initialUplinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); - abwp_size = NRRIV2BW(initialUplinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); - scs = initialUplinkBWP->genericParameters.subcarrierSpacing; } - int ibwp_start = NRRIV2PRBOFFSET(initialUplinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); - int ibwp_size = NRRIV2BW(initialUplinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); + int ibwp_start = current_UL_BWP->initial_BWPStart; + int ibwp_size = current_UL_BWP->initial_BWPSize; + int abwp_start = current_UL_BWP->BWPStart; + int abwp_size = current_UL_BWP->BWPSize; + int scs = current_UL_BWP->scs; // BWP start selection according to 8.3 of TS 38.213 if ((ibwp_start < abwp_start) || (ibwp_size > abwp_size)) { @@ -862,15 +856,7 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac, if (!maxMIMO_Layers) maxMIMO_Layers = pusch_Config ? pusch_Config->maxRank : NULL; AssertFatal (maxMIMO_Layers != NULL,"Option with max MIMO layers not configured is not supported\n"); - int bw_tbslbrm; - if (mac->scc || mac->scc_SIB || mac->cg) { - NR_BWP_t genericParameters = initialUplinkBWP->genericParameters; - int BWPSize = NRRIV2BW(genericParameters.locationAndBandwidth, MAX_BWP_SIZE); - bw_tbslbrm = get_ulbw_tbslbrm(BWPSize, mac->cg); - } - else { - bw_tbslbrm = pusch_config_pdu->bwp_size; - } + int bw_tbslbrm = get_ulbw_tbslbrm(current_UL_BWP->initial_BWPSize, mac->cg); pusch_config_pdu->tbslbrm = nr_compute_tbslbrm(pusch_config_pdu->mcs_table, bw_tbslbrm, *maxMIMO_Layers); diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c index 35850a1a2d..0d9bb25291 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c @@ -731,8 +731,8 @@ void nr_generate_Msg3_retransmission(module_id_t module_idP, int CC_id, frame_t uint16_t *vrb_map_UL = &RC.nrmac[module_idP]->common_channels[CC_id].vrb_map_UL[sched_slot * MAX_BWP_SIZE]; - const int BWPSize = NRRIV2BW(scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); - const int BWPStart = NRRIV2PRBOFFSET(scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); + const int BWPSize = ul_bwp->initial_BWPSize; + const int BWPStart = ul_bwp->initial_BWPStart; int rbStart = 0; for (int i = 0; (i < ra->msg3_nb_rb) && (rbStart <= (BWPSize - ra->msg3_nb_rb)); i++) { @@ -830,17 +830,18 @@ void nr_generate_Msg3_retransmission(module_id_t module_idP, int CC_id, frame_t ra->Msg3_tda_id, ra->msg3_TPC, 1, // Not toggling NDI in msg3 retransmissions - &ra->UL_BWP); + ul_bwp); fill_dci_pdu_rel15(scc, ra->CellGroup, &ra->DL_BWP, + ul_bwp, dci_pdu, &uldci_payload, NR_UL_DCI_FORMAT_0_0, NR_RNTI_TC, - pusch_pdu->bwp_size, ul_bwp->bwp_id, + ss, coreset, nr_mac->cset0_bwp_size); @@ -953,9 +954,8 @@ void nr_get_Msg3alloc(module_id_t module_id, uint16_t *vrb_map_UL = &RC.nrmac[module_id]->common_channels[CC_id].vrb_map_UL[ra->Msg3_slot * MAX_BWP_SIZE]; - int bwpSize = NRRIV2BW(scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); - int bwpStart = NRRIV2PRBOFFSET(scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); - + int bwpSize = ul_bwp->initial_BWPSize; + int bwpStart = ul_bwp->initial_BWPStart; if (bwpSize != ul_bwp->BWPSize || bwpStart != ul_bwp->BWPStart) { int act_bwp_start = ul_bwp->BWPStart; int act_bwp_size = ul_bwp->BWPSize; @@ -1104,7 +1104,7 @@ void nr_add_msg3(module_id_t module_idP, int CC_id, frame_t frameP, sub_frame_t nfapi_nr_pusch_pdu_t *pusch_pdu = &future_ul_tti_req->pdus_list[future_ul_tti_req->n_pdus].pusch_pdu; memset(pusch_pdu, 0, sizeof(nfapi_nr_pusch_pdu_t)); - const int ibwp_size = NRRIV2BW(scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); + const int ibwp_size = ul_bwp->initial_BWPSize; const int scs = ul_bwp->scs; const int fh = (ul_bwp->pusch_Config && ul_bwp->pusch_Config->frequencyHopping) ? 1 : 0; const int startSymbolAndLength = ul_bwp->tdaList->list.array[ra->Msg3_tda_id]->startSymbolAndLength; @@ -1153,7 +1153,7 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config = NULL; if(*ss->controlResourceSetId!=0) { BWPStart = dl_bwp->BWPStart; - BWPSize = NRRIV2BW(scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); + BWPSize = dl_bwp->initial_BWPSize; } else { type0_PDCCH_CSS_config = &nr_mac->type0_PDCCH_CSS_config[ra->beam_id]; BWPStart = type0_PDCCH_CSS_config->cset_start_rb; @@ -1290,8 +1290,7 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra pdsch_pdu_rel15->TBSize[0] = TBS; } - int scc_bwpsize = NRRIV2BW(scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); - int bw_tbslbrm = get_dlbw_tbslbrm(scc_bwpsize, ra->CellGroup); + int bw_tbslbrm = get_dlbw_tbslbrm(dl_bwp->initial_BWPSize, ra->CellGroup); pdsch_pdu_rel15->maintenance_parms_v3.tbSizeLbrmBytes = nr_compute_tbslbrm(mcsTableIdx, bw_tbslbrm, 1); @@ -1345,12 +1344,13 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra fill_dci_pdu_rel15(scc, ra->CellGroup, dl_bwp, + &ra->UL_BWP, &pdcch_pdu_rel15->dci_pdu[pdcch_pdu_rel15->numDlDci - 1], &dci_payload, NR_DL_DCI_FORMAT_1_0, NR_RNTI_RA, - BWPSize, dl_bwp->bwp_id, + ss, coreset, nr_mac->cset0_bwp_size); @@ -1676,8 +1676,7 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra int x_Overhead = 0; nr_get_tbs_dl(&dl_tti_pdsch_pdu->pdsch_pdu, x_Overhead, pdsch_pdu_rel15->numDmrsCdmGrpsNoData, tb_scaling); - int scc_bwpsize = NRRIV2BW(scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); - int bw_tbslbrm = get_dlbw_tbslbrm(scc_bwpsize, ra->CellGroup); + int bw_tbslbrm = get_dlbw_tbslbrm(dl_bwp->initial_BWPSize, ra->CellGroup); pdsch_pdu_rel15->maintenance_parms_v3.tbSizeLbrmBytes = nr_compute_tbslbrm(mcsTableIdx, bw_tbslbrm, 1); @@ -1744,12 +1743,13 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra fill_dci_pdu_rel15(scc, ra->CellGroup, dl_bwp, + &ra->UL_BWP, &pdcch_pdu_rel15->dci_pdu[pdcch_pdu_rel15->numDlDci - 1], &dci_payload, NR_DL_DCI_FORMAT_1_0, NR_RNTI_TC, - pdsch_pdu_rel15->BWPSize, dl_bwp->bwp_id, + ss, coreset, nr_mac->cset0_bwp_size); diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c index 0438070da3..dc2467e904 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c @@ -494,14 +494,15 @@ void nr_fill_nfapi_dl_sib1_pdu(int Mod_idP, int rnti_type = NR_RNTI_SI; fill_dci_pdu_rel15(scc, + NULL, NULL, NULL, &pdcch_pdu_rel15->dci_pdu[pdcch_pdu_rel15->numDlDci - 1], &dci_payload, dci_format, rnti_type, - pdsch_pdu_rel15->BWPSize, 0, + gNB_mac->sched_ctrlCommon->search_space, gNB_mac->sched_ctrlCommon->coreset, gNB_mac->cset0_bwp_size); diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c index c400a8ac13..d5b2b79036 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c @@ -1012,7 +1012,7 @@ void nr_schedule_ue_spec(module_id_t module_id, long maxMIMO_Layers = current_BWP->pdsch_servingcellconfig ? *current_BWP->pdsch_servingcellconfig->ext1->maxMIMO_Layers : 1; const int nl_tbslbrm = min(maxMIMO_Layers, 4); // Maximum number of PRBs across all configured DL BWPs - int scc_bwpsize = NRRIV2BW(scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); + int scc_bwpsize = current_BWP->initial_BWPSize; int bw_tbslbrm = get_dlbw_tbslbrm(scc_bwpsize, cg); pdsch_pdu->maintenance_parms_v3.tbSizeLbrmBytes = nr_compute_tbslbrm(current_BWP->mcsTableIdx, bw_tbslbrm, @@ -1110,12 +1110,13 @@ void nr_schedule_ue_spec(module_id_t module_id, fill_dci_pdu_rel15(scc, cg, current_BWP, + &UE->current_UL_BWP, dci_pdu, &dci_payload, current_BWP->dci_format, rnti_type, - pdsch_pdu->BWPSize, bwp_id, + sched_ctrl->search_space, sched_ctrl->coreset, gNB_mac->cset0_bwp_size); diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c index da84ccd18f..2ce7877eb7 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c @@ -55,130 +55,6 @@ extern RAN_CONTEXT_t RC; //#define ENABLE_MAC_PAYLOAD_DEBUG 1 -/*Scheduling of DLSCH with associated DCI in common search space - * current version has only a DCI for type 1 PDCCH for C_RNTI*/ -void nr_schedule_css_dlsch_phytest(module_id_t module_idP, - frame_t frameP, - sub_frame_t slotP) { - uint8_t CC_id; - gNB_MAC_INST *nr_mac = RC.nrmac[module_idP]; - NR_COMMON_channels_t *cc = &nr_mac->common_channels[0]; - nfapi_nr_dl_tti_request_body_t *dl_req; - nfapi_nr_dl_tti_request_pdu_t *dl_tti_pdcch_pdu; - nfapi_nr_dl_tti_request_pdu_t *dl_tti_pdsch_pdu; - nfapi_nr_pdu_t *TX_req; - - uint16_t rnti = 0x1234; - // int time_domain_assignment,k0; - - NR_ServingCellConfigCommon_t *scc=cc->ServingCellConfigCommon; - - int dlBWP_carrier_bandwidth = NRRIV2BW(scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); - - - /* - int scs = scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.subcarrierSpacing; - - int slots_per_frame = 10*(1<downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0] >= 257 ? nr_FR2 : nr_FR1; - */ - - for (CC_id=0; CC_iddownlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE)); - - - dl_req = &nr_mac->DL_req[CC_id].dl_tti_request_body; - dl_tti_pdcch_pdu = &dl_req->dl_tti_pdu_list[dl_req->nPDUs]; - memset((void*)dl_tti_pdcch_pdu,0,sizeof(nfapi_nr_dl_tti_request_pdu_t)); - dl_tti_pdcch_pdu->PDUType = NFAPI_NR_DL_TTI_PDCCH_PDU_TYPE; - dl_tti_pdcch_pdu->PDUSize = (uint8_t)(2+sizeof(nfapi_nr_dl_tti_pdcch_pdu)); - - dl_tti_pdsch_pdu = &nr_mac->DL_req[CC_id].dl_tti_request_body.dl_tti_pdu_list[nr_mac->DL_req[CC_id].dl_tti_request_body.nPDUs+1]; - memset((void *)dl_tti_pdsch_pdu,0,sizeof(nfapi_nr_dl_tti_request_pdu_t)); - dl_tti_pdsch_pdu->PDUType = NFAPI_NR_DL_TTI_PDSCH_PDU_TYPE; - dl_tti_pdsch_pdu->PDUSize = (uint8_t)(2+sizeof(nfapi_nr_dl_tti_pdsch_pdu)); - - - // nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15 = &dl_tti_pdcch_pdu->pdcch_pdu.pdcch_pdu_rel15; - nfapi_nr_dl_tti_pdsch_pdu_rel15_t *pdsch_pdu_rel15 = &dl_tti_pdsch_pdu->pdsch_pdu.pdsch_pdu_rel15; - - pdsch_pdu_rel15->pduBitmap = 0; - pdsch_pdu_rel15->rnti = rnti; - pdsch_pdu_rel15->pduIndex = 0; - - // BWP - pdsch_pdu_rel15->BWPSize = NRRIV2BW(scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); - pdsch_pdu_rel15->BWPStart = NRRIV2PRBOFFSET(scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); - pdsch_pdu_rel15->SubcarrierSpacing = scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.subcarrierSpacing; - pdsch_pdu_rel15->CyclicPrefix = 0; - pdsch_pdu_rel15->NrOfCodewords = 1; - int mcsIndex = 9; - pdsch_pdu_rel15->targetCodeRate[0] = nr_get_code_rate_dl(mcsIndex,0); - pdsch_pdu_rel15->qamModOrder[0] = 2; - pdsch_pdu_rel15->mcsIndex[0] = mcsIndex; - pdsch_pdu_rel15->mcsTable[0] = 0; - pdsch_pdu_rel15->rvIndex[0] = 0; - pdsch_pdu_rel15->dataScramblingId = *scc->physCellId; - pdsch_pdu_rel15->nrOfLayers = 1; - pdsch_pdu_rel15->transmissionScheme = 0; - pdsch_pdu_rel15->refPoint = 0; // Point A - - pdsch_pdu_rel15->dmrsConfigType = 0; // Type 1 by default for InitialBWP - pdsch_pdu_rel15->dlDmrsScramblingId = *scc->physCellId; - pdsch_pdu_rel15->SCID = 0; - pdsch_pdu_rel15->numDmrsCdmGrpsNoData = 1; - pdsch_pdu_rel15->dmrsPorts = 1; - pdsch_pdu_rel15->resourceAlloc = 1; - pdsch_pdu_rel15->rbStart = 0; - pdsch_pdu_rel15->rbSize = 6; - pdsch_pdu_rel15->VRBtoPRBMapping = 1; // non-interleaved, check if this is ok for initialBWP - // choose shortest PDSCH - int startSymbolAndLength=0; - int StartSymbolIndex=-1,NrOfSymbols=14; - int StartSymbolIndex_tmp,NrOfSymbols_tmp; - int mappingtype_tmp, mappingtype=0; - - for (int i=0; - idownlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.count; - i++) { - startSymbolAndLength = scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[i]->startSymbolAndLength; - SLIV2SL(startSymbolAndLength,&StartSymbolIndex_tmp,&NrOfSymbols_tmp); - mappingtype_tmp = scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[i]->mappingType; - if (NrOfSymbols_tmp < NrOfSymbols) { - NrOfSymbols = NrOfSymbols_tmp; - StartSymbolIndex = StartSymbolIndex_tmp; - mappingtype = mappingtype_tmp; - } - } - AssertFatal(StartSymbolIndex>=0,"StartSymbolIndex is negative\n"); - pdsch_pdu_rel15->StartSymbolIndex = StartSymbolIndex; - pdsch_pdu_rel15->NrOfSymbols = NrOfSymbols; - pdsch_pdu_rel15->dlDmrsSymbPos = fill_dmrs_mask(NULL, - scc->dmrs_TypeA_Position, - NrOfSymbols, - StartSymbolIndex, - mappingtype, - 1); - - nr_mac->DL_req[CC_id].dl_tti_request_body.nPDUs+=2; - - TX_req = &nr_mac->TX_req[CC_id].pdu_list[nr_mac->TX_req[CC_id].Number_of_PDUs]; - TX_req->PDU_length = 6; - TX_req->PDU_index = nr_mac->pdu_index[CC_id]++; - TX_req->num_TLV = 1; - TX_req->TLVs[0].length = 8; - // why do we copy from RAR_pdu here? Shouldn't we fill some more or less - // meaningful data, e.g., padding + random data? - //memcpy((void *)&TX_req->TLVs[0].value.direct[0], (void *)&cc[CC_id].RAR_pdu[0].payload[0], TX_req->TLVs[0].length); - nr_mac->TX_req[CC_id].Number_of_PDUs++; - nr_mac->TX_req[CC_id].SFN=frameP; - nr_mac->TX_req[CC_id].Slot=slotP; - } -} - uint32_t target_dl_mcs = 9; uint32_t target_dl_Nl = 1; uint32_t target_dl_bw = 50; diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c index 403ae15df7..5e8e0f3709 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c @@ -1384,28 +1384,71 @@ void prepare_dci(const NR_CellGroupConfig_t *CellGroup, void fill_dci_pdu_rel15(const NR_ServingCellConfigCommon_t *scc, const NR_CellGroupConfig_t *CellGroup, - const NR_UE_DL_BWP_t *current_BWP, + const NR_UE_DL_BWP_t *current_DL_BWP, + const NR_UE_UL_BWP_t *current_UL_BWP, nfapi_nr_dl_dci_pdu_t *pdcch_dci_pdu, dci_pdu_rel15_t *dci_pdu_rel15, int dci_format, int rnti_type, - int N_RB, int bwp_id, + NR_SearchSpace_t *ss, NR_ControlResourceSet_t *coreset, - uint16_t cset0_bwp_size) { - uint8_t fsize = 0, pos = 0; + uint16_t cset0_bwp_size) +{ + uint8_t fsize = 0, pos = 0; uint64_t *dci_pdu = (uint64_t *)pdcch_dci_pdu->Payload; - *dci_pdu=0; - NR_ControlResourceSetId_t coreset_id = coreset->controlResourceSetId; + *dci_pdu = 0; + uint16_t alt_size = 0; + uint16_t N_RB; + const int controlResourceSetId = *ss->controlResourceSetId; + if(current_DL_BWP) { + N_RB = get_rb_bwp_dci(dci_format, + ss->searchSpaceType->present, + cset0_bwp_size, + current_UL_BWP->BWPSize, + current_DL_BWP->BWPSize, + current_UL_BWP->initial_BWPSize, + current_DL_BWP->initial_BWPSize); + + // computing alternative size for padding + uint16_t alt_rb; + dci_pdu_rel15_t temp_pdu; + if(dci_format == NR_DL_DCI_FORMAT_1_0) { + alt_rb = get_rb_bwp_dci(NR_UL_DCI_FORMAT_0_0, + ss->searchSpaceType->present, + cset0_bwp_size, + current_UL_BWP->BWPSize, + current_DL_BWP->BWPSize, + current_UL_BWP->initial_BWPSize, + current_DL_BWP->initial_BWPSize); + alt_size = nr_dci_size(scc->downlinkConfigCommon->initialDownlinkBWP, + scc->uplinkConfigCommon->initialUplinkBWP, + CellGroup, &temp_pdu, NR_UL_DCI_FORMAT_0_0, rnti_type, controlResourceSetId, bwp_id, alt_rb, 0); + + } + if(dci_format == NR_UL_DCI_FORMAT_0_0) { + alt_rb = get_rb_bwp_dci(NR_DL_DCI_FORMAT_1_0, + ss->searchSpaceType->present, + cset0_bwp_size, + current_UL_BWP->BWPSize, + current_DL_BWP->BWPSize, + current_UL_BWP->initial_BWPSize, + current_DL_BWP->initial_BWPSize); + alt_size = nr_dci_size(scc->downlinkConfigCommon->initialDownlinkBWP, + scc->uplinkConfigCommon->initialUplinkBWP, + CellGroup, &temp_pdu, NR_DL_DCI_FORMAT_1_0, rnti_type, controlResourceSetId, bwp_id, alt_rb, 0); + } + } + else + N_RB = cset0_bwp_size; int dci_size = nr_dci_size(scc->downlinkConfigCommon->initialDownlinkBWP, scc->uplinkConfigCommon->initialUplinkBWP, - CellGroup, dci_pdu_rel15, dci_format, - rnti_type, N_RB, bwp_id, coreset_id, cset0_bwp_size); + CellGroup, dci_pdu_rel15, dci_format, rnti_type, controlResourceSetId, bwp_id, N_RB, alt_size); pdcch_dci_pdu->PayloadSizeBits = dci_size; AssertFatal(dci_size <= 64, "DCI sizes above 64 bits not yet supported"); if (dci_format == NR_DL_DCI_FORMAT_1_1 || dci_format == NR_UL_DCI_FORMAT_0_1) - prepare_dci(CellGroup, current_BWP, coreset, dci_pdu_rel15, dci_format); + prepare_dci(CellGroup, current_DL_BWP, coreset, dci_pdu_rel15, dci_format); /// Payload generation switch (dci_format) { @@ -2389,7 +2432,7 @@ void configure_UE_BWP(gNB_MAC_INST *nr_mac, UL_BWP->tdaList = scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList; // setting generic parameters - NR_BWP_t dl_genericParameters = (DL_BWP->bwp_id>0 && dl_bwp) ? + NR_BWP_t dl_genericParameters = (DL_BWP->bwp_id > 0 && dl_bwp) ? dl_bwp->bwp_Common->genericParameters: scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters; @@ -2397,8 +2440,10 @@ void configure_UE_BWP(gNB_MAC_INST *nr_mac, DL_BWP->cyclicprefix = dl_genericParameters.cyclicPrefix; DL_BWP->BWPSize = NRRIV2BW(dl_genericParameters.locationAndBandwidth, MAX_BWP_SIZE); DL_BWP->BWPStart = NRRIV2PRBOFFSET(dl_genericParameters.locationAndBandwidth, MAX_BWP_SIZE); + DL_BWP->initial_BWPSize = NRRIV2BW(scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); + DL_BWP->initial_BWPStart = NRRIV2PRBOFFSET(scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); - NR_BWP_t ul_genericParameters = (UL_BWP->bwp_id>0 && ul_bwp) ? + NR_BWP_t ul_genericParameters = (UL_BWP->bwp_id > 0 && ul_bwp) ? ul_bwp->bwp_Common->genericParameters: scc->uplinkConfigCommon->initialUplinkBWP->genericParameters; @@ -2406,6 +2451,8 @@ void configure_UE_BWP(gNB_MAC_INST *nr_mac, UL_BWP->cyclicprefix = ul_genericParameters.cyclicPrefix; UL_BWP->BWPSize = NRRIV2BW(ul_genericParameters.locationAndBandwidth, MAX_BWP_SIZE); UL_BWP->BWPStart = NRRIV2PRBOFFSET(ul_genericParameters.locationAndBandwidth, MAX_BWP_SIZE); + UL_BWP->initial_BWPSize = NRRIV2BW(scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); + UL_BWP->initial_BWPStart = NRRIV2PRBOFFSET(scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); // Set downlink MCS table if (DL_BWP->pdsch_Config && diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c index 0d25e160fa..e1c47559b8 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c @@ -263,7 +263,7 @@ int nr_process_mac_pdu(instance_t module_idP, // in sched_ctrl we set normalized PH wrt MCS and PRBs long *deltaMCS = ul_bwp->pusch_Config ? ul_bwp->pusch_Config->pusch_PowerControl->deltaMCS : NULL; sched_ctrl->ph = PH + - compute_ph_factor(sched_pusch->mu, + compute_ph_factor(ul_bwp->scs, sched_pusch->tb_size<<3, sched_pusch->rbSize, sched_pusch->nrOfLayers, @@ -1757,7 +1757,6 @@ void pf_ul(module_id_t module_id, /* Calculate the current scheduling bytes */ const int B = cmax(sched_ctrl->estimated_ul_buffer - sched_ctrl->sched_ul_bytes, 0); /* adjust rbSize and MCS according to PHR and BPRE */ - sched_pusch->mu = scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.subcarrierSpacing; if(sched_ctrl->pcmax!=0 || sched_ctrl->ph!=0) // verify if the PHR related parameter have been initialized nr_ue_max_mcs_min_rb(current_BWP->scs, sched_ctrl->ph, sched_pusch, current_BWP, min_rb, B, &max_rbSize, &sched_pusch->mcs); @@ -2162,7 +2161,7 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot) if (!maxMIMO_Layers) maxMIMO_Layers = current_BWP->pusch_Config->maxRank; AssertFatal (maxMIMO_Layers != NULL,"Option with max MIMO layers not configured is not supported\n"); - const int scc_bwpsize = NRRIV2BW(scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); + const int scc_bwpsize = current_BWP->initial_BWPSize; int bw_tbslbrm = get_ulbw_tbslbrm(scc_bwpsize, cg); pusch_pdu->maintenance_parms_v3.tbSizeLbrmBytes = nr_compute_tbslbrm(current_BWP->mcs_table, bw_tbslbrm, @@ -2260,12 +2259,13 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot) fill_dci_pdu_rel15(scc, cg, &UE->current_DL_BWP, + current_BWP, dci_pdu, &uldci_payload, current_BWP->dci_format, rnti_types[0], - pusch_pdu->bwp_size, current_BWP->bwp_id, + ss, coreset, nr_mac->cset0_bwp_size); diff --git a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h index fc569c4eee..93180a7937 100644 --- a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h +++ b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h @@ -171,10 +171,6 @@ void nr_preprocessor_phytest(module_id_t module_id, * fixed set of resources */ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_t slot); -void nr_schedule_css_dlsch_phytest(module_id_t module_idP, - frame_t frameP, - sub_frame_t subframeP); - void handle_nr_uci_pucch_0_1(module_id_t mod_id, frame_t frame, sub_frame_t slot, @@ -289,13 +285,14 @@ void fill_pdcch_vrb_map(gNB_MAC_INST *mac, void fill_dci_pdu_rel15(const NR_ServingCellConfigCommon_t *scc, const NR_CellGroupConfig_t *CellGroup, - const NR_UE_DL_BWP_t *dl_bwp, + const NR_UE_DL_BWP_t *current_DL_BWP, + const NR_UE_UL_BWP_t *current_UL_BWP, nfapi_nr_dl_dci_pdu_t *pdcch_dci_pdu, dci_pdu_rel15_t *dci_pdu_rel15, - int dci_formats, - int rnti_types, - int N_RB, + int dci_format, + int rnti_type, int bwp_id, + NR_SearchSpace_t *ss, NR_ControlResourceSet_t *coreset, uint16_t cset0_bwp_size); diff --git a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h index 27cf3fb1a2..7697d74808 100644 --- a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h +++ b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h @@ -99,6 +99,8 @@ typedef struct NR_UE_DL_BWP { long *cyclicprefix; uint16_t BWPSize; uint16_t BWPStart; + uint16_t initial_BWPSize; + uint16_t initial_BWPStart; NR_PDSCH_TimeDomainResourceAllocationList_t *tdaList; NR_PDSCH_Config_t *pdsch_Config; NR_PDSCH_ServingCellConfig_t *pdsch_servingcellconfig; @@ -113,6 +115,8 @@ typedef struct NR_UE_UL_BWP { long *cyclicprefix; uint16_t BWPSize; uint16_t BWPStart; + uint16_t initial_BWPSize; + uint16_t initial_BWPStart; NR_PUSCH_ServingCellConfig_t *pusch_servingcellconfig; NR_PUSCH_TimeDomainResourceAllocationList_t *tdaList; NR_PUSCH_Config_t *pusch_Config;