Merge remote-tracking branch 'origin/develop' into F1C_extensions_develop

This commit is contained in:
matzakos
2022-01-17 13:19:45 +01:00
488 changed files with 33221 additions and 22410 deletions
+32 -12
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@@ -24,12 +24,33 @@ loading `libldpc_cl.so` instead of `libldpc.so`:
`make ldpc_cl`
`cp ../../../openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_decoder_kernels_CL.cl`
This command creates the `libldpc_cl.so` shared library. To perform this build successfully, only the OpenCL header `(/usr/include/CL/opencl.h)` and library `(/usr/lib/x86_64-linux-gnu/libOpenCL.so)`are required, they implement OpenCL API support which is not hardware dependent.
```
Scanning dependencies of target nrLDPC_decoder_kernels_CL
Built target nrLDPC_decoder_kernels_CL
Scanning dependencies of target ldpc_cl
Building C object CMakeFiles/ldpc_cl.dir/usr/local/oai/oai-develop/openairinterface5g/openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_decoder_CL.c.o
In file included from /usr/include/CL/cl.h:32,
from /usr/include/CL/opencl.h:38,
from /usr/local/oai/oai-develop/openairinterface5g/openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_decoder_CL.c:49:
/usr/include/CL/cl_version.h:34:9: note: #pragma message: cl_version.h: CL_TARGET_OPENCL_VERSION is not defined. Defaulting to 220 (OpenCL 2.2)
#pragma message("cl_version.h: CL_TARGET_OPENCL_VERSION is not defined. Defaulting to 220 (OpenCL 2.2)")
^~~~~~~
Building C object CMakeFiles/ldpc_cl.dir/usr/local/oai/oai-develop/openairinterface5g/openair1/PHY/CODING/nrLDPC_encoder/ldpc_encoder_optim8segmulti.c.o
Linking C shared module libldpc_cl.so
Built target ldpc_cl
```
At runtime, to successfully use hardware acceleration via OpenCL, you need to install vendor specific packages which deliver the required drivers and tools to make use of their GPU (Nvidia, Intel...) , fpga (Xilinx, Intel) or CPU (Intel, AMD, ARM...) through OpenCL.
`./nr-softmodem -O libconfig:gnb.band78.sa.fr1.106PRB.usrpb210.conf:dbgl5 --rfsim --rfsimulator.serveraddr server --sa --log_config.gtpu_log_level info --loader.ldpc.shlibversion _cl`
``` [LOADER] library libldpc_cl.so successfully loaded
```
------------------------------------------------
[LOADER] library libldpc_cl.so successfully loaded
[HW] Platform 0, OpenCL profile FULL_PROFILE
[HW] Platform 0, OpenCL version OpenCL 2.1 LINUX
[HW] Device 0 is available
@@ -62,8 +83,9 @@ loading `libldpc_cl.so` instead of `libldpc.so`:
`./nr-uesoftmodem -r 106 --numerology 1 --band 78 -C 3619200000 --rfsim --sa -O libconfig:/usr/local/oai/conf/nrue_sim.conf:dbgl5 --nokrnmod --loader.ldpc.shlibversion _cl --log_config.hw_log_level info`
```[CONFIG] shlibversion set to _cl from command line
```
............................................................
[CONFIG] shlibversion set to _cl from command line
[CONFIG] loader.ldpc 1 options set from command line
[LOADER] library libldpc_cl.so successfully loaded
[HW] Platform 0, OpenCL profile FULL_PROFILE
@@ -94,7 +116,6 @@ loading `libldpc_cl.so` instead of `libldpc.so`:
[HW] Device 0, max Work Items size for dimension: 1 512
[HW] Device 0, max Work Items size for dimension: 2 512
------------------------------------------------------------
​```
```
A mechanism to select ldpc implementation is also available in the `ldpctest` phy simulator via the `-v`option, which can be used to specify the version of the ldpc shared library to be used.
@@ -103,7 +124,9 @@ A mechanism to select ldpc implementation is also available in the `ldpctest` ph
Loading libldpc_cuda.so, the cuda implementation of the ldpc decoder:
```$ ./ldpctest -v _cuda
```
$ ./ldpctest -v _cuda
ldpctest -v _cuda
Initializing random number generator, seed 0
block length 8448:
n_trials 1:
@@ -119,18 +142,16 @@ log init done
[CONFIG] loader.ldpc: 1/2 parameters successfully set
[LOADER] library libldpc_cuda.so successfully loaded
...................................
​```
```
Loading libldpc_cl.so, the opencl implementation of the ldpc decoder:
`make ldpc_cl`
`cp ../../../openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_decoder_kernels_CL.cl`
`./ldpctest -v _cl`
```$ ./ldpctest -v _cl
```
$ ./ldpctest -v _cl
Initializing random number generator, seed 0
block length 8448:
n_trials 1:
@@ -164,7 +185,6 @@ log init done
[HW] Device 0, max Work Items size for dimension: 1 512
[HW] Device 0, max Work Items size for dimension: 2 512
................................
​```
```
@@ -174,6 +194,6 @@ Libraries implementing the LDPC algorithms must be named `libldpc<_version>.so`,
`libldpc_cuda.so`has been tested with the `ldpctest` executable, usage from the softmodem's has to be tested.
`libldpc_cl`is under development.
`libldpc_cl.so`is under development.
[oai Wikis home](https://gitlab.eurecom.fr/oai/openairinterface5g/wikis/home)
+14 -4
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@@ -514,7 +514,7 @@ int main(int argc, char *argv[])
unsigned char qbits=8;
unsigned int decoded_errors[10000]; // initiate the size of matrix equivalent to size of SNR
int c,i=0, i1 = 0;
int loglvl=OAILOG_WARNING;
int n_trials = 1;
double SNR_step = 0.1;
@@ -525,8 +525,11 @@ int main(int argc, char *argv[])
n_iter_stats_t dec_iter[3];
short BG=0,Zc,Kb=0;
while ((c = getopt (argc, argv, "q:r:s:S:l:G:n:d:i:t:u:hv:")) != -1)
if ( load_configmodule(argc,argv,CONFIG_ENABLECMDLINEONLY) == 0) {
exit_fun(" Error, configuration module init failed\n");
} // must be done before specific options parsing to prevent errasing them
while ((c = getopt (argc, argv, "q:r:s:S:l:L:G:n:d:i:t:u:hv:")) != -1)
switch (c)
{
case 'q':
@@ -544,6 +547,10 @@ int main(int argc, char *argv[])
case 'l':
block_length = atoi(optarg);
break;
case 'L':
loglvl = atoi(optarg);
break;
case 'G':
ldpc_version="_cuda";
@@ -581,10 +588,11 @@ int main(int argc, char *argv[])
printf("BG1 (blocklength > 3840): 1/3, 2/3, 22/25 (8/9) \n");
printf("BG2 (blocklength <= 3840): 1/5, 1/3, 2/3 \n\n");
printf("-h This message\n");
printf("-L <log level, 0(errors), 1(warning), 2(info) 3(debug) 4 (trace)>\n");
printf("-q Quantization bits, Default: 8\n");
printf("-r Nominator rate, (1, 2, 22), Default: 1\n");
printf("-d Denominator rate, (3, 5, 25), Default: 1\n");
printf("-l Block length (l > 3840 -> BG1, rest BG2 ), Default: 8448\n");
printf("-l Block length (l > 3840 -> BG1, rest BG2 ), Default: 8448\n");
printf("-G give 1 to run cuda for LDPC, Default: 0\n");
printf("-n Number of simulation trials, Default: 1\n");
//printf("-M MCS2 for TB 2\n");
@@ -603,6 +611,8 @@ int main(int argc, char *argv[])
printf("n_trials %d: \n", n_trials);
printf("SNR0 %f: \n", SNR0);
logInit();
set_glog(loglvl);
if (ldpc_version != NULL)
load_nrLDPClib(ldpc_version);
+2
View File
@@ -44,6 +44,8 @@
#include "crcext.h"
#include "types.h"
#include <immintrin.h>
#include <wmmintrin.h>
/**
* PCLMULQDQ CRC computation context structure
+30 -20
View File
@@ -30,12 +30,15 @@
Modified in June, 2001, to include the length non multiple of 8
*/
#define USE_INTEL_CRC 1
#ifndef __SSE4_1__
#define USE_INTEL_CRC 0
#else
#define USE_INTEL_CRC __SSE4_1__
#endif
#include "coding_defs.h"
#include "assertions.h"
#ifdef USE_INTEL_CRC
#include "crc_intel.h"
#if USE_INTEL_CRC
#include "crc.h"
#endif
/*ref 36-212 v8.6.0 , pp 8-9 */
@@ -98,7 +101,7 @@ static unsigned short crc11Table[256];
static unsigned char crc8Table[256];
static unsigned char crc6Table[256];
#ifdef USE_INTEL_CRC
#if USE_INTEL_CRC
static DECLARE_ALIGNED(struct crc_pclmulqdq_ctx lte_crc24a_pclmulqdq, 16) = {
0x64e4d700, /**< k1 */
0x2c8c9d00, /**< k2 */
@@ -134,9 +137,9 @@ void crcTableInit (void)
crc8Table[c] = (unsigned char) (crcbit (&c, 1, poly8) >> 24);
crc6Table[c] = (unsigned char) (crcbit (&c, 1, poly6) >> 24);
} while (++c);
#ifdef USE_INTEL_CRC
crc_xmm_be_le_swap128 = _mm_setr_epi32(0x0c0d0e0f, 0x08090a0b,
0x04050607, 0x00010203);
#if USE_INTEL_CRC
crc_xmm_be_le_swap128 = _mm_setr_epi32(0x0c0d0e0f, 0x08090a0b,
0x04050607, 0x00010203);
#endif
}
@@ -151,12 +154,12 @@ can use SIMD optimized Intel CRC for LTE/NR 24a/24b variants
unsigned int crc24a (unsigned char * inptr,
int bitlen)
{
int octetlen = bitlen / 8; /* Change in octets */
int octetlen, resbit;
unsigned int crc = 0;
octetlen = bitlen / 8; /* Change in octets */
resbit = (bitlen % 8);
#ifndef USE_INTEL_CRC
if ( bitlen % 8 || !USE_INTEL_CRC ) {
unsigned int crc = 0;
int resbit= (bitlen % 8);
while (octetlen-- > 0) {
// printf("crc24a: in %x => crc %x\n",crc,*inptr);
crc = (crc << 8) ^ crc24aTable[(*inptr++) ^ (crc >> 24)];
@@ -165,14 +168,17 @@ unsigned int crc24a (unsigned char * inptr,
if (resbit > 0)
crc = (crc << resbit) ^ crc24aTable[((*inptr) >> (8 - resbit)) ^ (crc >> (32 - resbit))];
return crc;
#else
}
#if USE_INTEL_CRC
else {
return crc32_calc_pclmulqdq(inptr, octetlen, 0,
&lte_crc24a_pclmulqdq);
#endif
}
#endif
}
#ifdef USE_INTEL_CRC
#if USE_INTEL_CRC
static DECLARE_ALIGNED(struct crc_pclmulqdq_ctx lte_crc24b_pclmulqdq, 16) = {
0x80140500, /**< k1 */
0x42000100, /**< k2 */
@@ -185,11 +191,12 @@ static DECLARE_ALIGNED(struct crc_pclmulqdq_ctx lte_crc24b_pclmulqdq, 16) = {
unsigned int crc24b (unsigned char * inptr,
int bitlen)
{
int octetlen, resbit;
int octetlen = bitlen / 8; /* Change in octets */
if ( bitlen % 8 || !USE_INTEL_CRC ) {
unsigned int crc = 0;
octetlen = bitlen / 8; /* Change in octets */
resbit = (bitlen % 8);
#ifndef USE_INTEL_CRC
int resbit = (bitlen % 8);
while (octetlen-- > 0) {
// printf("crc24b: in %x => crc %x (%x)\n",crc,*inptr,crc24bTable[(*inptr) ^ (crc >> 24)]);
crc = (crc << 8) ^ crc24bTable[(*inptr++) ^ (crc >> 24)];
@@ -199,9 +206,12 @@ unsigned int crc24b (unsigned char * inptr,
crc = (crc << resbit) ^ crc24bTable[((*inptr) >> (8 - resbit)) ^ (crc >> (32 - resbit))];
return crc;
#else
}
#if USE_INTEL_CRC
else {
return crc32_calc_pclmulqdq(inptr, octetlen, 0,
&lte_crc24b_pclmulqdq);
}
#endif
}
-541
View File
@@ -1,541 +0,0 @@
/*******************************************************************************
Copyright (c) 2009-2018, Intel Corporation
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
* Redistributions of source code must retain the above copyright notice,
this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
* Neither the name of Intel Corporation nor the names of its contributors
may be used to endorse or promote products derived from this software
without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*******************************************************************************/
/**
* Header file for module with CRC computation methods
*
* PCLMULQDQ implementation is based on work by:
* Erdinc Ozturk
* Vinodh Gopal
* James Guilford
*
* "Fast CRC Computation for Generic Polynomials Using PCLMULQDQ Instruction"
* URL: http://download.intel.com/design/intarch/papers/323102.pdf
*/
#ifndef __CRC_H__
#define __CRC_H__
#include <x86intrin.h>
#include "crcext.h"
#include "types.h"
/**
* PCLMULQDQ CRC computation context structure
*/
struct crc_pclmulqdq_ctx {
/**
* K1 = reminder X^128 / P(X) : 0-63
* K2 = reminder X^192 / P(X) : 64-127
*/
uint64_t k1;
uint64_t k2;
/**
* K3 = reminder X^64 / P(X) : 0-63
* q = quotient X^64 / P(X) : 64-127
*/
uint64_t k3;
uint64_t q;
/**
* p = polynomial / P(X) : 0-63
* res = reserved : 64-127
*/
uint64_t p;
uint64_t res;
};
/**
* Functions and prototypes
*/
/**
* @brief Initializes look-up-table (LUT) for given 8 bit polynomial
*
* @param poly CRC polynomial
* @param lut pointer to look-up-table to be initialized
*/
void crc8_init_lut(const uint8_t poly, uint8_t *lut);
/**
* @brief Calculates 8 bit CRC using LUT method.
*
* @param crc CRC initial value
* @param data pointer to data block to calculate CRC for
* @param data_len size of data block
* @param lut 256x8bits look-up-table pointer
*
* @return New CRC value
*/
__forceinline
uint8_t crc8_calc_lut(const uint8_t *data,
uint32_t data_len,
uint8_t crc,
const uint8_t *lut)
{
if (unlikely(data == NULL || lut == NULL))
return crc;
while (data_len--)
crc = lut[*data++ ^ crc];
return crc;
}
/**
* @brief Initializes look-up-table (LUT) for given 16 bit polynomial
*
* @param poly CRC polynomial
* @param lut pointer to 256x16bits look-up-table to be initialized
*/
void crc16_init_lut(const uint16_t poly, uint16_t *lut);
/**
* @brief Calculates 16 bit CRC using LUT method.
*
* @param crc CRC initial value
* @param data pointer to data block to calculate CRC for
* @param data_len size of data block
* @param lut 256x16bits look-up-table pointer
*
* @return New CRC value
*/
__forceinline
uint16_t crc16_calc_lut(const uint8_t *data,
uint32_t data_len,
uint16_t crc,
const uint16_t *lut)
{
if (unlikely(data == NULL || lut == NULL))
return crc;
while (data_len--)
crc = lut[(crc >> 8) ^ *data++] ^ (crc << 8);
return crc;
}
/**
* @brief Initializes look-up-table (LUT) for given 32 bit polynomial
*
* @param poly CRC polynomial
* @param lut pointer to 256x32bits look-up-table to be initialized
*/
void crc32_init_lut(const uint32_t poly, uint32_t *lut);
/**
* @brief Calculates 32 bit CRC using LUT method.
*
* @param crc CRC initial value
* @param data pointer to data block to calculate CRC for
* @param data_len size of data block
* @param lut 256x32bits look-up-table pointer
*
* @return New CRC value
*/
__forceinline
uint32_t crc32_calc_lut(const uint8_t *data,
uint32_t data_len,
uint32_t crc,
const uint32_t *lut)
{
if (unlikely(data == NULL || lut == NULL))
return crc;
while (data_len--)
crc = lut[(crc >> 24) ^ *data++] ^ (crc << 8);
return crc;
}
/**
* @brief Initializes look up tables for slice-By-2 method.
*
* @param poly CRC polynomial
* @param slice1 slice-by-2 look-up-table 1
* @param slice2 slice-by-2 look-up-table 2
*
* @return New CRC value
*/
void crc16_init_slice2(const uint16_t poly,
uint16_t *slice1,
uint16_t *slice2);
/**
* @brief Calculates 16 bit CRC using Slice-By-2 method.
*
* @param crc CRC initial value
* @param data pointer to data block to calculate CRC for
* @param data_len size of data block
* @param slice1 256x16bits slice look-up-table 1
* @param slice2 256x16bits slice look-up-table 2
*
* @return New CRC value
*/
__forceinline
uint16_t crc16_calc_slice2(const uint8_t *data,
uint32_t data_len,
uint16_t crc,
const uint16_t *slice1,
const uint16_t *slice2)
{
uint_fast32_t i;
if (unlikely(data == NULL))
return crc;
if (unlikely(slice1 == NULL || slice2 == NULL))
return crc;
crc = bswap2(crc);
for (i = (data_len & (~1)), data += (data_len & (~1)); i != 0;
i -= sizeof(uint16_t)) {
crc ^= (*((const uint16_t *)(data - i)));
crc = slice2[(uint8_t)crc] ^ slice1[(uint8_t)(crc >> 8)];
}
crc = bswap2(crc);
if (data_len & 1)
crc = (crc << 8) ^ bswap2(slice1[(crc >> 8) ^ *data]);
return crc;
}
/**
* @brief Initializes look up tables for slice-By-4 method.
*
* @param poly CRC polynomial
* @param slice1 256x32bits slice look-up-table 1
* @param slice2 256x32bits slice look-up-table 2
* @param slice3 256x32bits slice look-up-table 3
* @param slice4 256x32bits slice look-up-table 4
*
* @return New CRC value
*/
void crc32_init_slice4(const uint32_t poly,
uint32_t *slice1, uint32_t *slice2,
uint32_t *slice3, uint32_t *slice4);
/**
* @brief Calculates 32 bit CRC using Slice-By-4 method.
*
* @param data pointer to data block to calculate CRC for
* @param data_len size of data block
* @param crc CRC initial value
* @param slice1 256x32bits slice look-up-table 1
* @param slice2 256x32bits slice look-up-table 2
* @param slice3 256x32bits slice look-up-table 3
* @param slice4 256x32bits slice look-up-table 4
*
* @return New CRC value
*/
__forceinline
uint32_t crc32_calc_slice4(const uint8_t *data,
uint32_t data_len, uint32_t crc,
const uint32_t *slice1, const uint32_t *slice2,
const uint32_t *slice3, const uint32_t *slice4)
{
uint_fast32_t i;
if (unlikely(data == NULL))
return crc;
if (unlikely(slice1 == NULL || slice2 == NULL ||
slice3 == NULL || slice4 == NULL))
return crc;
crc = bswap4(crc);
for (i = data_len & (~3), data += (data_len & (~3)); i != 0;
i -= sizeof(uint32_t)) {
crc ^= (*((const uint32_t *)(data - i)));
crc = slice4[(uint8_t)(crc)] ^
slice3[(uint8_t)(crc >> 8)] ^
slice2[(uint8_t)(crc >> 16)] ^
slice1[(uint8_t)(crc >> 24)];
}
crc = bswap4(crc);
for (i = data_len & 3, data += (data_len & 3); i != 0; i--)
crc = (crc << 8) ^
bswap4(slice1[(crc >> 24) ^ *(data - i)]);
return crc;
}
/**
* @brief Performs one folding round
*
* Logically function operates as follows:
* DATA = READ_NEXT_16BYTES();
* F1 = LSB8(FOLD)
* F2 = MSB8(FOLD)
* T1 = CLMUL( F1, K1 )
* T2 = CLMUL( F2, K2 )
* FOLD = XOR( T1, T2, DATA )
*
* @param data_block 16 byte data block
* @param k1_k2 k1 and k2 constanst enclosed in XMM register
* @param fold running 16 byte folded data
*
* @return New 16 byte folded data
*/
__forceinline
__m128i crc32_folding_round(const __m128i data_block,
const __m128i k1_k2,
const __m128i fold)
{
__m128i tmp = _mm_clmulepi64_si128(fold, k1_k2, 0x11);
return _mm_xor_si128(_mm_clmulepi64_si128(fold, k1_k2, 0x00),
_mm_xor_si128(data_block, tmp));
}
/**
* @brief Performs Barret's reduction from 128 bits to 64 bits
*
* @param data128 128 bits data to be reduced
* @param k3_q k3 and Q constants enclosed in XMM register
*
* @return data reduced to 64 bits
*/
__forceinline
__m128i crc32_reduce_128_to_64(__m128i data128, const __m128i k3_q)
{
__m128i tmp;
tmp = _mm_xor_si128(_mm_clmulepi64_si128(data128, k3_q, 0x01 /* k3 */),
data128);
data128 = _mm_xor_si128(_mm_clmulepi64_si128(tmp, k3_q, 0x01 /* k3 */),
data128);
return _mm_srli_si128(_mm_slli_si128(data128, 8), 8);
}
/**
* @brief Performs Barret's reduction from 64 bits to 32 bits
*
* @param data64 64 bits data to be reduced
* @param k3_q k3 and Q constants enclosed in XMM register
* @param p_res P constant enclosed in XMM register
*
* @return data reduced to 32 bits
*/
__forceinline
uint32_t
crc32_reduce_64_to_32(__m128i fold, const __m128i k3_q, const __m128i p_res)
{
__m128i temp;
temp = _mm_clmulepi64_si128(_mm_srli_si128(fold, 4),
k3_q, 0x10 /* Q */);
temp = _mm_srli_si128(_mm_xor_si128(temp, fold), 4);
temp = _mm_clmulepi64_si128(temp, p_res, 0 /* P */);
return _mm_extract_epi32(_mm_xor_si128(temp, fold), 0);
}
/**
* @brief Calculates 32 bit CRC for given \a data block by applying folding and
* reduction methods.
*
* Algorithm operates on 32 bit CRCs so polynomials and initial values may
* need to be promoted to 32 bits where required.
*
* @param crc initial CRC value (32 bit value)
* @param data pointer to data block
* @param data_len length of \a data block in bytes
* @param params pointer to PCLMULQDQ CRC calculation context
*
* @return CRC for given \a data block (32 bits wide).
*/
__forceinline
uint32_t
crc32_calc_pclmulqdq(const uint8_t *data,
uint32_t data_len, uint32_t crc,
const struct crc_pclmulqdq_ctx *params)
{
__m128i temp, fold, k, swap;
uint32_t n;
if (unlikely(data == NULL || data_len == 0 || params == NULL))
return crc;
#ifdef __KERNEL__
/**
* Preserve FPU context
*/
kernel_fpu_begin();
#endif
/**
* Add 4 bytes to data block size
* This is to secure the following:
* CRC32 = M(X)^32 mod P(X)
* M(X) - message to compute CRC on
* P(X) - CRC polynomial
*/
data_len += 4;
/**
* Load first 16 data bytes in \a fold and
* set \a swap BE<->LE 16 byte conversion variable
*/
fold = _mm_loadu_si128((__m128i *)data);
swap = crc_xmm_be_le_swap128;
/**
* -------------------------------------------------
* Folding all data into single 16 byte data block
* Assumes: \a fold holds first 16 bytes of data
*/
if (unlikely(data_len <= 16)) {
/**
* Data block fits into 16 byte block
* - adjust data block
* - 4 least significant bytes need to be zero
*/
fold = _mm_shuffle_epi8(fold, swap);
fold = _mm_slli_si128(xmm_shift_right(fold, 20 - data_len), 4);
/**
* Apply CRC init value
*/
temp = _mm_insert_epi32(_mm_setzero_si128(), bswap4(crc), 0);
temp = xmm_shift_left(temp, data_len - 4);
fold = _mm_xor_si128(fold, temp);
} else {
/**
* There are 2x16 data blocks or more
*/
__m128i next_data;
/**
* n = number of bytes required to align \a data_len
* to multiple of 16
*/
n = ((~data_len) + 1) & 15;
/**
* Apply CRC initial value and
* get \a fold to BE format
*/
fold = _mm_xor_si128(fold,
_mm_insert_epi32(_mm_setzero_si128(),
crc, 0));
fold = _mm_shuffle_epi8(fold, swap);
/**
* Load next 16 bytes of data and
* adjust \a fold & \a next_data as follows:
*
* CONCAT(fold,next_data) >> (n*8)
*/
next_data = _mm_loadu_si128((__m128i *)&data[16]);
next_data = _mm_shuffle_epi8(next_data, swap);
next_data = _mm_or_si128(xmm_shift_right(next_data, n),
xmm_shift_left(fold, 16 - n));
fold = xmm_shift_right(fold, n);
if (unlikely(data_len <= 32))
/**
* In such unlikely case clear 4 least significant bytes
*/
next_data =
_mm_slli_si128(_mm_srli_si128(next_data, 4), 4);
/**
* Do the initial folding round on 2 first 16 byte chunks
*/
k = _mm_load_si128((__m128i *)(&params->k1));
fold = crc32_folding_round(next_data, k, fold);
if (likely(data_len > 32)) {
/**
* \a data_block needs to be at least 48 bytes long
* in order to get here
*/
__m128i new_data;
/**
* Main folding loop
* - n is adjusted to point to next 16 data block
* to read
* (16+16) = 2x16; represents 2 first data blocks
* processed above
* (- n) is the number of zero bytes padded to
* the message in order to align it to 16 bytes
* - the last 16 bytes is processed separately
*/
for (n = 16 + 16 - n; n < (data_len - 16); n += 16) {
new_data = _mm_loadu_si128((__m128i *)&data[n]);
new_data = _mm_shuffle_epi8(new_data, swap);
fold = crc32_folding_round(new_data, k, fold);
}
/**
* The last folding round works always on 12 bytes
* (12 bytes of data and 4 zero bytes)
* Read from offset -4 is to avoid one
* shift right operation.
*/
new_data = _mm_loadu_si128((__m128i *)&data[n - 4]);
new_data = _mm_shuffle_epi8(new_data, swap);
new_data = _mm_slli_si128(new_data, 4);
fold = crc32_folding_round(new_data, k, fold);
} /* if (data_len > 32) */
}
/**
* -------------------------------------------------
* Reduction 128 -> 32
* Assumes: \a fold holds 128bit folded data
*/
/**
* REDUCTION 128 -> 64
*/
k = _mm_load_si128((__m128i *)(&params->k3));
fold = crc32_reduce_128_to_64(fold, k);
/**
* REDUCTION 64 -> 32
*/
n = crc32_reduce_64_to_32(fold, k,
_mm_load_si128((__m128i *)(&params->p)));
#ifdef __KERNEL__
/**
* - restore FPU context
*/
kernel_fpu_end();
#endif
return n;
}
#endif /* __CRC_H__ */
@@ -25,15 +25,7 @@
* \version 1.0
* \note initial implem - translation of cuda version
*/
/* uses HW component id for log messages ( --log_config.hw_log_level <warning| info|debug|trace>) */
#include <stdio.h>
#include <unistd.h>
#include <cuda_runtime.h>
#include <CL/opencl.h>
#include "PHY/CODING/nrLDPC_decoder/nrLDPC_types.h"
#include "PHY/CODING/nrLDPC_decoder/nrLDPCdecoder_defs.h"
#include "assertions.h"
#include "common/utils/LOG/log.h"
#define MAX_ITERATION 2
#define MC 1
@@ -41,16 +33,29 @@
#define MAX_OCLDEV 10
#define MAX_OCLRUNTIME 5
#define CLSETKERNELARG(A,B,C,D) \
rt=clSetKernelArg(A,B,C,D) ;\
AssertFatal(rt == CL_SUCCESS, "Error %d setting kernel argument index %d\n" , (int)rt, B);
typedef struct{
char x;
char y;
short value;
} h_element;
#ifdef NRLDPC_KERNEL_SOURCE
#include "nrLDPC_decoder_kernels_CL.c"
#else
/* uses HW component id for log messages ( --log_config.hw_log_level <warning| info|debug|trace>) */
#include <stdio.h>
#include <unistd.h>
#include <sys/stat.h>
#include <CL/opencl.h>
#include "PHY/CODING/nrLDPC_decoder/nrLDPC_types.h"
#include "PHY/CODING/nrLDPC_decoder/nrLDPCdecoder_defs.h"
#include "assertions.h"
#include "common/utils/LOG/log.h"
#define CLSETKERNELARG(A,B,C,D) \
rt=clSetKernelArg(A,B,C,D) ;\
AssertFatal(rt == CL_SUCCESS, "Error %d setting kernel argument index %d\n" , (int)rt, B);
#include "../nrLDPC_decoder_LYC/bgs/BG1_compact_in_C.h"
typedef struct{
@@ -213,20 +218,31 @@ void get_CompilErr(cl_program program, int pltf) {
}
size_t load_source(char **source_str) {
int MAX_SOURCE_SIZE=(500*132);
size_t load_source(char **source_str, char *filename) {
FILE *fp;
struct stat st ;
size_t source_size;
fp = fopen("nrLDPC_decoder_kernels_CL.cl", "r");
AssertFatal(fp,"failed to open cl source: %s\n",strerror(errno));
char *src= NULL;
*source_str = (char*)malloc(MAX_SOURCE_SIZE);
source_size = fread( *source_str, 1, MAX_SOURCE_SIZE, fp);
fclose( fp );
return source_size;
if (filename == NULL) {
src = "nrLDPC_decoder_kernels_CL.clc";
} else {
src = filename;
}
fp = fopen(src, "r");
AssertFatal(fp,"failed to open cl source %s: %s\n",src,strerror(errno));
fstat(fileno(fp), &st);
source_size = st.st_size;
*source_str = (char*)malloc(source_size);
source_size = fread( *source_str, 1, source_size, fp);
fclose( fp );
LOG_I(HW,"Loaded kernel sources from %s %u bytes\n", (filename==NULL)?"embedded cl code":src,(unsigned int)source_size );
return source_size;
}
/* from here: entry points in decoder shared lib */
int ldpc_autoinit(void) { // called by the library loader
cl_platform_id platforms[10];
@@ -284,11 +300,11 @@ int ldpc_autoinit(void) { // called by the library loader
ocl.runtime[i].dev_tmp = clCreateBuffer(ocl.runtime[i].context, CL_MEM_READ_ONLY|CL_MEM_HOST_WRITE_ONLY, 68*384, NULL, (cl_int *)&rt);
AssertFatal(rt == CL_SUCCESS, "Error %d creating buffer dev_tmp for platform %i \n" , (int)rt, i);
char *source_str;
size_t source_size=load_source(&source_str);
size_t source_size=load_source(&source_str,"nrLDPC_decoder_kernels_CL.clc");
cl_program program = clCreateProgramWithSource(ocl.runtime[i].context, 1,
(const char **)&source_str, (const size_t *)&source_size, (cl_int *)&rt);
AssertFatal(rt == CL_SUCCESS, "Error %d creating program for platform %i \n" , (int)rt, i);
rt = clBuildProgram(program, ocl.runtime[i].num_devices,ocl.runtime[i].devices, NULL, NULL, NULL);
rt = clBuildProgram(program, ocl.runtime[i].num_devices,ocl.runtime[i].devices, NULL /* compile options */, NULL, NULL);
if (rt == CL_BUILD_PROGRAM_FAILURE) {
get_CompilErr(program,i);
}
@@ -434,3 +450,4 @@ int32_t nrLDPC_decod(t_nrLDPC_dec_params* p_decParams, int8_t* p_llr, int8_t* p_
return MAX_ITERATION;
}
#endif //NRLDPC_KERNEL_SOURCE
@@ -29,16 +29,7 @@
* \note initial implem - translation of cuda version
* \warning
*/
#define define MAX_ITERATION 2
#define MC 1
#define INT32_MAX 2147483647
typedef struct{
char x;
char y;
short value;
} h_element;
//__global char dev_dt [46*68*384];
//__local char *dev_t;
@@ -46,7 +37,7 @@ typedef struct{
//__global unsigned char dev_tmp[68*384];
#define INT32_MAX 2147483647
//__constant h_element dev_h_compact1[46*19] = {}; // used in kernel 1
//__constant h_element dev_h_compact2[68*30] = {}; // used in kernel 2
@@ -299,4 +290,3 @@ __kernel void pack_decoded_bit(__global unsigned char * dev_llr, __global unsign
}
}
}
+10 -10
View File
@@ -38,12 +38,12 @@
*/
typedef struct {
unsigned int n_segments; // optim8seg
unsigned int macro_num; // optim8segmulti
unsigned char gen_code; //orig
time_stats_t *tinput;
time_stats_t *tprep;
time_stats_t *tparity;
time_stats_t *toutput;
unsigned int macro_num; // optim8segmulti
unsigned char gen_code; //orig
time_stats_t *tinput;
time_stats_t *tprep;
time_stats_t *tparity;
time_stats_t *toutput;
int Kr;
uint32_t Kb;
uint32_t *Zc;
@@ -58,10 +58,10 @@ typedef struct {
uint32_t F;
/// LDPC-code outputs
uint8_t *d[MAX_NUM_NR_DLSCH_SEGMENTS];
}encoder_implemparams_t;
} encoder_implemparams_t;
#define INIT0_LDPCIMPLEMPARAMS {0,0,0,NULL,NULL,NULL,NULL}
typedef void(*nrLDPC_initcallfunc_t)(t_nrLDPC_dec_params* p_decParams, int8_t* p_llr, int8_t* p_out);
typedef int(*nrLDPC_encoderfunc_t)(unsigned char **,unsigned char **,int,int,short, short, encoder_implemparams_t*);
typedef void(*nrLDPC_initcallfunc_t)(t_nrLDPC_dec_params *p_decParams, int8_t *p_llr, int8_t *p_out);
typedef int(*nrLDPC_encoderfunc_t)(unsigned char **,unsigned char **,int,int,short, short, encoder_implemparams_t *);
//============================================================================================================================
// decoder interface
/**
@@ -71,5 +71,5 @@ typedef int(*nrLDPC_encoderfunc_t)(unsigned char **,unsigned char **,int,int,sho
\param p_llrOut Output vector
\param p_profiler LDPC profiler statistics
*/
typedef int32_t(*nrLDPC_decoderfunc_t)(t_nrLDPC_dec_params* , int8_t*, int8_t* , t_nrLDPC_procBuf* , t_nrLDPC_time_stats* );
typedef int32_t(*nrLDPC_decoderfunc_t)(t_nrLDPC_dec_params *, int8_t *, int8_t *, t_nrLDPC_procBuf *, t_nrLDPC_time_stats * );
#endif
@@ -38,8 +38,6 @@
#include "common/utils/LOG/log.h"
//#define DEBUG_LDPC
#include "ldpc384_byte.c"
#include "ldpc352_byte.c"
#include "ldpc320_byte.c"
@@ -39,8 +39,6 @@
#include "PHY/TOOLS/time_meas.h"
#include "defs.h"
//#define DEBUG_LDPC
#include "ldpc384_byte.c"
#include "ldpc352_byte.c"
#include "ldpc320_byte.c"
@@ -40,9 +40,6 @@
#include "openair1/PHY/CODING/nrLDPC_defs.h"
#include "ldpc_encode_parity_check.c"
#include "ldpc_generate_coefficient.c"
//#define DEBUG_LDPC
@@ -50,7 +47,7 @@ int nrLDPC_encod(unsigned char **test_input,unsigned char **channel_input,int Zc
{
short nrows=0,ncols=0;
int i,i1,rate=3;
int rate=3;
int no_punctured_columns,removed_bit;
int simd_size;
@@ -96,7 +93,7 @@ int nrLDPC_encod(unsigned char **test_input,unsigned char **channel_input,int Zc
memset(d,0,sizeof(unsigned char) * nrows * Zc);
if(impp->tinput != NULL) start_meas(impp->tinput);
for (i=0; i<block_length; i++) {
for (int i=0; i<block_length; i++) {
c[i] = (test_input[0][i/8]&(128>>(i&7)))>>(7-(i&7));
//printf("c(%d,%d)=%d\n",j,i,temp);
}
@@ -38,7 +38,6 @@
#include "common/utils/LOG/log.h"
#include "PHY/TOOLS/time_meas.h"
#include "openair1/PHY/CODING/nrLDPC_defs.h"
//#define DEBUG_LDPC
#include "ldpc_encode_parity_check.c"
#include "ldpc_generate_coefficient.c"
@@ -38,7 +38,6 @@
#include "common/utils/LOG/log.h"
#include "PHY/TOOLS/time_meas.h"
#include "openair1/PHY/CODING/nrLDPC_defs.h"
//#define DEBUG_LDPC
#include "ldpc_encode_parity_check.c"
#include "ldpc_generate_coefficient.c"
+2 -2
View File
@@ -46,14 +46,14 @@ static loader_shlibfunc_t shlib_fdesc[3];
/* arguments used when called from phy simulators exec's which do not use the config module */
/* arg is used to initialize the config module so that the loader works as expected */
char *arg[64]={"ldpctest","-O","cmdlineonly::dbgl0",NULL,NULL};
char *arg[64]={"ldpctest",NULL};
int load_nrLDPClib(char *version) {
char *ptr = (char*)config_get_if();
char libname[64]="ldpc";
if ( ptr==NULL ) {// phy simulators, config module possibly not loaded
load_configmodule(0,(char **)NULL,CONFIG_ENABLECMDLINEONLY) ;
load_configmodule(1,arg,CONFIG_ENABLECMDLINEONLY) ;
logInit();
}
shlib_fdesc[0].fname = "nrLDPC_decod";
+19 -14
View File
@@ -388,7 +388,7 @@ int nr_rate_matching_ldpc(uint8_t Ilbrm,
uint32_t Ncb,ind,k=0,Nref,N;
if (C==0) {
printf("nr_rate_matching: invalid parameters (C %d\n",C);
LOG_E(PHY,"nr_rate_matching: invalid parameters (C %d\n",C);
return -1;
}
@@ -407,16 +407,15 @@ int nr_rate_matching_ldpc(uint8_t Ilbrm,
#ifdef RM_DEBUG
printf("nr_rate_matching_ldpc: E %d, F %d, Foffset %d, k0 %d, Ncb %d, rvidx %d\n", E, F, Foffset,ind, Ncb, rvidx);
#endif
AssertFatal(Foffset <= E,
"Foffset %d > E %d "
"(Ilbrm %d, Tbslbrm %d, Z %d, BG %d, C %d)\n",
Foffset, E,
Ilbrm, Tbslbrm, Z, BG, C);
AssertFatal(Foffset <= Ncb,
"Foffset %d > Ncb %d "
"(Ilbrm %d, Tbslbrm %d, Z %d, BG %d, C %d)\n",
Foffset, Ncb,
Ilbrm, Tbslbrm, Z, BG, C);
if (Foffset > E) {
LOG_E(PHY,"nr_rate_matching: invalid parameters (Foffset %d > E %d)\n",Foffset,E);
return -1;
}
if (Foffset > Ncb) {
LOG_E(PHY,"nr_rate_matching: invalid parameters (Foffset %d > Ncb %d)\n",Foffset,Ncb);
return -1;
}
if (ind >= Foffset && ind < (F+Foffset)) ind = F+Foffset;
@@ -478,7 +477,7 @@ int nr_rate_matching_ldpc_rx(uint8_t Ilbrm,
#endif
if (C==0) {
printf("nr_rate_matching: invalid parameters (C %d\n",C);
LOG_E(PHY,"nr_rate_matching: invalid parameters (C %d\n",C);
return -1;
}
@@ -493,8 +492,14 @@ int nr_rate_matching_ldpc_rx(uint8_t Ilbrm,
}
ind = (index_k0[BG-1][rvidx]*Ncb/N)*Z;
AssertFatal(Foffset <= E,"Foffset %d > E %d\n",Foffset,E);
AssertFatal(Foffset <= Ncb,"Foffset %d > Ncb %d\n",Foffset,Ncb);
if (Foffset > E) {
LOG_E(PHY,"nr_rate_matching: invalid parameters (Foffset %d > E %d)\n",Foffset,E);
return -1;
}
if (Foffset > Ncb) {
LOG_E(PHY,"nr_rate_matching: invalid parameters (Foffset %d > Ncb %d)\n",Foffset,Ncb);
return -1;
}
#ifdef RM_DEBUG
printf("nr_rate_matching_ldpc_rx: Clear %d, E %d, k0 %d, Ncb %d, rvidx %d\n", clear, E, ind, Ncb, rvidx);
+1 -1
View File
@@ -106,7 +106,7 @@ void phy_config_request(PHY_Config_t *phy_config) {
int Ncp = cfg->subframe_config.dl_cyclic_prefix_type.value;
int p_eNB = cfg->rf_config.tx_antenna_ports.value;
uint32_t dl_CarrierFreq = cfg->nfapi_config.earfcn.value;
LOG_I(PHY,"Configuring MIB for instance %d, CCid %d : (band %d,N_RB_DL %d, N_RB_UL %d, Nid_cell %d,eNB_tx_antenna_ports %d,Ncp %d,DL freq %u,phich_config.resource %d, phich_config.duration %d)\n",
LOG_A(PHY,"Configuring MIB for instance %d, CCid %d : (band %d,N_RB_DL %d, N_RB_UL %d, Nid_cell %d,eNB_tx_antenna_ports %d,Ncp %d,DL freq %u,phich_config.resource %d, phich_config.duration %d)\n",
Mod_id, CC_id, eutra_band, dl_Bandwidth, ul_Bandwidth, Nid_cell, p_eNB,Ncp,dl_CarrierFreq,
cfg->phich_config.phich_resource.value,
cfg->phich_config.phich_duration.value);
+1 -1
View File
@@ -548,7 +548,7 @@ void phy_config_dedicated_ue(module_id_t Mod_id,int CC_id,uint8_t eNB_id,
phy_vars_ue->decode_MIB = 0;
}
if(NFAPI_MODE!=NFAPI_UE_STUB_PNF) {
if(NFAPI_MODE!=NFAPI_UE_STUB_PNF && NFAPI_MODE!=NFAPI_MODE_STANDALONE_PNF) {
//phy_vars_ue->pdcch_vars[1][eNB_id]->crnti = phy_vars_ue->pdcch_vars[0][eNB_id]->crnti;
if(phy_vars_ue->pdcch_vars[0][eNB_id]->crnti == 0x1234)
phy_vars_ue->pdcch_vars[0][eNB_id]->crnti = phy_vars_ue->pdcch_vars[1][eNB_id]->crnti;
+1 -1
View File
@@ -487,7 +487,7 @@ void nr_phy_config_request(NR_PHY_Config_t *phy_config) {
LOG_I(PHY, "DL frequency %lu Hz, UL frequency %lu Hz: band %d, uldl offset %d Hz\n", fp->dl_CarrierFreq, fp->ul_CarrierFreq, fp->nr_band, dlul_offset);
fp->threequarter_fs = openair0_cfg[0].threequarter_fs;
LOG_I(PHY,"Configuring MIB for instance %d, : (Nid_cell %d,DL freq %llu, UL freq %llu)\n",
LOG_A(PHY,"Configuring MIB for instance %d, : (Nid_cell %d,DL freq %llu, UL freq %llu)\n",
Mod_id,
gNB_config->cell_config.phy_cell_id.value,
(unsigned long long)fp->dl_CarrierFreq,
+2 -1
View File
@@ -41,6 +41,7 @@
#include "PHY/NR_REFSIG/ul_ref_seq_nr.h"
#include "PHY/NR_REFSIG/refsig_defs_ue.h"
#include "PHY/NR_REFSIG/nr_refsig.h"
#include <openair1/PHY/MODULATION/nr_modulation.h>
#if 0
void phy_config_harq_ue(module_id_t Mod_id,
@@ -458,7 +459,7 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue,
ue->decode_SIB = 1;
init_nr_prach_tables(839);
init_symbol_rotation(fp);
return 0;
}
+3 -9
View File
@@ -209,7 +209,6 @@ uint32_t get_samples_per_slot(int slot, NR_DL_FRAME_PARMS* fp)
return samp_count;
}
uint32_t get_slot_from_timestamp(openair0_timestamp timestamp_rx, NR_DL_FRAME_PARMS* fp)
{
uint32_t slot_idx = 0;
@@ -251,11 +250,9 @@ int nr_init_frame_parms(nfapi_nr_config_request_scf_t* cfg,
int Ncp = NFAPI_CP_NORMAL;
int mu = cfg->ssb_config.scs_common.value;
#if DISABLE_LOG_X
printf("Initializing frame parms for mu %d, N_RB %d, Ncp %d\n",mu, fp->N_RB_DL, Ncp);
#else
LOG_I(PHY,"Initializing frame parms for mu %d, N_RB %d, Ncp %d\n",mu, fp->N_RB_DL, Ncp);
#endif
if (Ncp == NFAPI_CP_EXTENDED)
AssertFatal(mu == NR_MU_2,"Invalid cyclic prefix %d for numerology index %d\n", Ncp, mu);
@@ -344,11 +341,8 @@ int nr_init_frame_parms_ue(NR_DL_FRAME_PARMS *fp,
AssertFatal(fp->ul_CarrierFreq == (fp->dl_CarrierFreq + uplink_frequency_offset), "Disagreement in uplink frequency for band %d: ul_CarrierFreq = %lu Hz vs expected %lu Hz\n", fp->nr_band, fp->ul_CarrierFreq, fp->dl_CarrierFreq + uplink_frequency_offset);
#if DISABLE_LOG_X
printf("Initializing UE frame parms for mu %d, N_RB %d, Ncp %d\n",fp->numerology_index, fp->N_RB_DL, Ncp);
#else
LOG_I(PHY,"Initializing frame parms for mu %d, N_RB %d, Ncp %d\n",fp->numerology_index, fp->N_RB_DL, Ncp);
#endif
if (Ncp == NFAPI_CP_EXTENDED)
AssertFatal(fp->numerology_index == NR_MU_2,"Invalid cyclic prefix %d for numerology index %d\n", Ncp, fp->numerology_index);
+1 -2
View File
@@ -36,8 +36,7 @@
\param reset resets the generator
\return 32 bits of the gold sequence
*/
uint32_t lte_gold_generic(uint32_t *x1, uint32_t *x2, uint8_t reset);
#include <openair1/PHY/LTE_TRANSPORT/transport_proto.h>
/*!\brief This function generates the LTE Gold sequence (36-211, Sec 7.2), specifically for DL reference signals.
@param frame_parms LTE DL Frame parameters
@@ -42,7 +42,6 @@
#include "common/utils/LOG/log.h"
#include "targets/RT/USER/lte-softmodem.h"
#include <syscall.h>
#include "targets/RT/USER/rt_wrapper.h"
#include <common/utils/threadPool/thread-pool.h>
//#define DEBUG_DLSCH_CODING
@@ -2921,6 +2921,9 @@ int allocate_REs_in_RB_MCH_khz_1dot25(int32_t **txdataF,
uint8_t skip_dc,
LTE_DL_FRAME_PARMS *frame_parms)
{
if (!qam_table_s)
abort();
uint32_t tti_offset;
uint8_t re,offset;
uint8_t qam64_table_offset_re = 0;
@@ -1,75 +0,0 @@
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
#include "PHY/types.h"
/**
\brief Gold Sequence Generation defined in 3x.211
\param x1 x1 shift register
\param x2 x2 shift register / cinit if reset is set
\param reset Reset flag / reinitialize the generator
\return c 32 bits of gold output
*/
extern inline uint32_t lte_gold_generic(uint32_t *x1, uint32_t *x2, uint8_t reset)
{
int32_t n;
// 3GPP 3x.211
// Nc = 1600
// c(n) = [x1(n+Nc) + x2(n+Nc)]mod2
// x1(n+31) = [x1(n+3) + x1(n)]mod2
// x2(n+31) = [x2(n+3) + x2(n+2) + x2(n+1) + x2(n)]mod2
if (reset)
{
// Init value for x1: x1(0) = 1, x1(n) = 0, n=1,2,...,30
// x1(31) = [x1(3) + x1(0)]mod2 = 1
*x1 = 1 + (1U<<31);
// Init value for x2: cinit = sum_{i=0}^30 x2*2^i
// x2(31) = [x2(3) + x2(2) + x2(1) + x2(0)]mod2
// = (*x2>>3) ^ (*x2>>2) + (*x2>>1) + *x2
*x2 = *x2 ^ ((*x2 ^ (*x2>>1) ^ (*x2>>2) ^ (*x2>>3))<<31);
// x1 and x2 contain bits n = 0,1,...,31
// Nc = 1600 bits are skipped at the beginning
// i.e., 1600 / 32 = 50 32bit words
for (n = 1; n < 50; n++)
{
// Compute x1(0),...,x1(27)
*x1 = (*x1>>1) ^ (*x1>>4);
// Compute x1(28),..,x1(31) and xor
*x1 = *x1 ^ (*x1<<31) ^ (*x1<<28);
// Compute x2(0),...,x2(27)
*x2 = (*x2>>1) ^ (*x2>>2) ^ (*x2>>3) ^ (*x2>>4);
// Compute x2(28),..,x2(31) and xor
*x2 = *x2 ^ (*x2<<31) ^ (*x2<<30) ^ (*x2<<29) ^ (*x2<<28);
}
}
*x1 = (*x1>>1) ^ (*x1>>4);
*x1 = *x1 ^ (*x1<<31) ^ (*x1<<28);
*x2 = (*x2>>1) ^ (*x2>>2) ^ (*x2>>3) ^ (*x2>>4);
*x2 = *x2 ^ (*x2<<31) ^ (*x2<<30) ^ (*x2<<29) ^ (*x2<<28);
// c(n) = [x1(n+Nc) + x2(n+Nc)]mod2
return(*x1^*x2);
}
+11 -11
View File
@@ -147,10 +147,10 @@ uint32_t get_TBS_UL(uint8_t mcs, uint16_t nb_rb) {
}
}
int adjust_G2(LTE_DL_FRAME_PARMS *frame_parms, uint32_t *rb_alloc, uint8_t mod_order, uint8_t subframe, uint8_t symbol) {
int adjust_G2(int Ncp, int frame_type, int N_RB_DL, uint32_t *rb_alloc, uint8_t mod_order, uint8_t subframe, uint8_t symbol) {
int rb,re_pbch_sss=0;
int rb_alloc_ind,nsymb;
nsymb = (frame_parms->Ncp==NORMAL) ? 14 : 12;
nsymb = (Ncp==NORMAL) ? 14 : 12;
// printf("adjust_G2 : symbol %d, subframe %d\n",symbol,subframe);
if ((subframe!=0) && (subframe!=5) && (subframe!=6)) // if not PBCH/SSS or SSS
@@ -158,12 +158,12 @@ int adjust_G2(LTE_DL_FRAME_PARMS *frame_parms, uint32_t *rb_alloc, uint8_t mod_o
//first half of slot and TDD (no adjustments in first slot except for subframe 6 - PSS)
if ((symbol<(nsymb>>1))&&
(frame_parms->frame_type == TDD)&&
(frame_type == TDD)&&
(subframe!=6))
return(0);
// after PBCH
if (frame_parms->frame_type==TDD) { //TDD
if (frame_type==TDD) { //TDD
if ((symbol>((nsymb>>1)+3)) &&
(symbol!=(nsymb-1))) ///SSS
return(0);
@@ -185,9 +185,9 @@ int adjust_G2(LTE_DL_FRAME_PARMS *frame_parms, uint32_t *rb_alloc, uint8_t mod_o
return(0);
}
if ((frame_parms->N_RB_DL&1) == 1) { // ODD N_RB_DL
for (rb=((frame_parms->N_RB_DL>>1)-3);
rb<=((frame_parms->N_RB_DL>>1)+3);
if ((N_RB_DL&1) == 1) { // ODD N_RB_DL
for (rb=((N_RB_DL>>1)-3);
rb<=((N_RB_DL>>1)+3);
rb++) {
if (rb < 32)
rb_alloc_ind = (rb_alloc[0]>>rb) & 1;
@@ -201,16 +201,16 @@ int adjust_G2(LTE_DL_FRAME_PARMS *frame_parms, uint32_t *rb_alloc, uint8_t mod_o
rb_alloc_ind = 0;
if (rb_alloc_ind==1) {
if ((rb==(frame_parms->N_RB_DL>>1)-3) ||
(rb==((frame_parms->N_RB_DL>>1)+3))) {
if ((rb==(N_RB_DL>>1)-3) ||
(rb==((N_RB_DL>>1)+3))) {
re_pbch_sss += 6;
} else
re_pbch_sss += 12;
}
}
} else {
for (rb=((frame_parms->N_RB_DL>>1)-3);
rb<((frame_parms->N_RB_DL>>1)+3);
for (rb=((N_RB_DL>>1)-3);
rb<((N_RB_DL>>1)+3);
rb++) {
if (rb < 32)
rb_alloc_ind = (rb_alloc[0]>>rb) & 1;
+1 -1
View File
@@ -44,7 +44,7 @@ void pcfich_scrambling(LTE_DL_FRAME_PARMS *frame_parms,
{
uint32_t i;
uint8_t reset;
uint32_t x1, x2, s=0;
uint32_t x1=0, x2, s=0;
reset = 1;
// x1 is set in lte_gold_generic
+1 -1
View File
@@ -895,7 +895,7 @@ uint32_t rx_pucch(PHY_VARS_eNB *eNB,
int frame,
uint8_t subframe,
uint8_t pucch1_thres,
uint8_t br_flag
int br_flag
)
//-----------------------------------------------------------------------------
{
@@ -101,7 +101,7 @@ int get_G(LTE_DL_FRAME_PARMS *frame_parms,uint16_t nb_rb,uint32_t *rb_alloc,uint
int get_G_khz_1dot25(LTE_DL_FRAME_PARMS *frame_parms,uint16_t nb_rb,uint32_t *rb_alloc,uint8_t mod_order,uint8_t Nl,uint8_t num_pdcch_symbols,int frame,uint8_t subframe, uint8_t beamforming_mode);
int adjust_G(LTE_DL_FRAME_PARMS *frame_parms,uint32_t *rb_alloc,uint8_t mod_order,uint8_t subframe);
int adjust_G2(LTE_DL_FRAME_PARMS *frame_parms,uint32_t *rb_alloc,uint8_t mod_order,uint8_t subframe,uint8_t symbol);
int adjust_G2(int Ncp, int frame_type, int N_RB_DL, uint32_t *rb_alloc,uint8_t mod_order,uint8_t subframe,uint8_t symbol);
#ifndef modOrder
+45 -1
View File
@@ -700,7 +700,51 @@ int find_ulsch(uint16_t rnti, PHY_VARS_eNB *eNB,find_type_t type);
int find_uci(uint16_t rnti, int frame, int subframe, PHY_VARS_eNB *eNB,find_type_t type);
uint32_t lte_gold_generic(uint32_t *x1, uint32_t *x2, uint8_t reset);
static inline uint32_t lte_gold_generic(uint32_t *x1, uint32_t *x2, uint8_t reset)
{
int32_t n;
// 3GPP 3x.211
// Nc = 1600
// c(n) = [x1(n+Nc) + x2(n+Nc)]mod2
// x1(n+31) = [x1(n+3) + x1(n)]mod2
// x2(n+31) = [x2(n+3) + x2(n+2) + x2(n+1) + x2(n)]mod2
if (reset)
{
// Init value for x1: x1(0) = 1, x1(n) = 0, n=1,2,...,30
// x1(31) = [x1(3) + x1(0)]mod2 = 1
*x1 = 1 + (1U<<31);
// Init value for x2: cinit = sum_{i=0}^30 x2*2^i
// x2(31) = [x2(3) + x2(2) + x2(1) + x2(0)]mod2
// = (*x2>>3) ^ (*x2>>2) + (*x2>>1) + *x2
*x2 = *x2 ^ ((*x2 ^ (*x2>>1) ^ (*x2>>2) ^ (*x2>>3))<<31);
// x1 and x2 contain bits n = 0,1,...,31
// Nc = 1600 bits are skipped at the beginning
// i.e., 1600 / 32 = 50 32bit words
for (n = 1; n < 50; n++)
{
// Compute x1(0),...,x1(27)
*x1 = (*x1>>1) ^ (*x1>>4);
// Compute x1(28),..,x1(31) and xor
*x1 = *x1 ^ (*x1<<31) ^ (*x1<<28);
// Compute x2(0),...,x2(27)
*x2 = (*x2>>1) ^ (*x2>>2) ^ (*x2>>3) ^ (*x2>>4);
// Compute x2(28),..,x2(31) and xor
*x2 = *x2 ^ (*x2<<31) ^ (*x2<<30) ^ (*x2<<29) ^ (*x2<<28);
}
}
*x1 = (*x1>>1) ^ (*x1>>4);
*x1 = *x1 ^ (*x1<<31) ^ (*x1<<28);
*x2 = (*x2>>1) ^ (*x2>>2) ^ (*x2>>3) ^ (*x2>>4);
*x2 = *x2 ^ (*x2<<31) ^ (*x2<<30) ^ (*x2<<29) ^ (*x2<<28);
// c(n) = [x1(n+Nc) + x2(n+Nc)]mod2
return(*x1^*x2);
}
/**@}*/
+1 -1
View File
@@ -1293,7 +1293,7 @@ void compute_llr_offset(LTE_DL_FRAME_PARMS *frame_parms,
}
granted_re = nb_rb_alloc * (12-crs_re);
pbch_pss_sss_re = adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,dlsch0_harq->Qm,subframe,symbol);
pbch_pss_sss_re = adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,dlsch0_harq->Qm,subframe,symbol);
pbch_pss_sss_re = (double)pbch_pss_sss_re * ((double)(12-crs_re)/12);
data_re = granted_re - pbch_pss_sss_re;
llr_offset = data_re * dlsch0_harq->Qm * 2;
@@ -370,7 +370,7 @@ int rx_pdsch(PHY_VARS_UE *ue,
#if UE_TIMING_TRACE
stop_meas(&ue->generic_stat_bis[ue->current_thread_id[subframe]][slot]);
LOG_I(PHY, "[AbsSFN %d.%d] Slot%d Symbol %d Flag %d type %d: Pilot/Data extraction %5.2f \n",frame,subframe,slot,symbol,
LOG_D(PHY, "[AbsSFN %d.%d] Slot%d Symbol %d Flag %d type %d: Pilot/Data extraction %5.2f \n",frame,subframe,slot,symbol,
ue->high_speed_flag,type,ue->generic_stat_bis[ue->current_thread_id[subframe]][slot].p_time/(cpuf*1000.0));
#endif
#if UE_TIMING_TRACE
@@ -398,7 +398,7 @@ int rx_pdsch(PHY_VARS_UE *ue,
#if UE_TIMING_TRACE
stop_meas(&ue->generic_stat_bis[ue->current_thread_id[subframe]][slot]);
LOG_I(PHY, "[AbsSFN %d.%d] Slot%d Symbol %d: Channel Scale %5.2f \n",frame,subframe,slot,symbol,ue->generic_stat_bis[ue->current_thread_id[subframe]][slot].p_time/(cpuf*1000.0));
LOG_D(PHY, "[AbsSFN %d.%d] Slot%d Symbol %d: Channel Scale %5.2f \n",frame,subframe,slot,symbol,ue->generic_stat_bis[ue->current_thread_id[subframe]][slot].p_time/(cpuf*1000.0));
start_meas(&ue->generic_stat_bis[ue->current_thread_id[subframe]][slot]);
#endif
@@ -507,7 +507,7 @@ int rx_pdsch(PHY_VARS_UE *ue,
#endif
#if UE_TIMING_TRACE
stop_meas(&ue->generic_stat_bis[ue->current_thread_id[subframe]][slot]);
LOG_I(PHY, "[AbsSFN %d.%d] Slot%d Symbol %d first_symbol_flag %d: Channel Level %5.2f \n",frame,subframe,slot,symbol,first_symbol_flag,
LOG_D(PHY, "[AbsSFN %d.%d] Slot%d Symbol %d first_symbol_flag %d: Channel Level %5.2f \n",frame,subframe,slot,symbol,first_symbol_flag,
ue->generic_stat_bis[ue->current_thread_id[subframe]][slot].p_time/(cpuf*1000.0));
start_meas(&ue->generic_stat_bis[ue->current_thread_id[subframe]][slot]);
#endif
@@ -731,7 +731,7 @@ int rx_pdsch(PHY_VARS_UE *ue,
#if UE_TIMING_TRACE
stop_meas(&ue->generic_stat_bis[ue->current_thread_id[subframe]][slot]);
LOG_I(PHY, "[AbsSFN %d.%d] Slot%d Symbol %d log2_maxh %d Channel Comp %5.2f \n",frame,subframe,slot,symbol,pdsch_vars[eNB_id]->log2_maxh,
LOG_D(PHY, "[AbsSFN %d.%d] Slot%d Symbol %d log2_maxh %d Channel Comp %5.2f \n",frame,subframe,slot,symbol,pdsch_vars[eNB_id]->log2_maxh,
ue->generic_stat_bis[ue->current_thread_id[subframe]][slot].p_time/(cpuf*1000.0));
start_meas(&ue->generic_stat_bis[ue->current_thread_id[subframe]][slot]);
#endif
@@ -805,7 +805,7 @@ int rx_pdsch(PHY_VARS_UE *ue,
#if UE_TIMING_TRACE
stop_meas(&ue->generic_stat_bis[ue->current_thread_id[subframe]][slot]);
LOG_I(PHY, "[AbsSFN %d.%d] Slot%d Symbol %d: Channel Combine %5.2f \n",frame,subframe,slot,symbol,ue->generic_stat_bis[ue->current_thread_id[subframe]][slot].p_time/(cpuf*1000.0));
LOG_D(PHY, "[AbsSFN %d.%d] Slot%d Symbol %d: Channel Combine %5.2f \n",frame,subframe,slot,symbol,ue->generic_stat_bis[ue->current_thread_id[subframe]][slot].p_time/(cpuf*1000.0));
start_meas(&ue->generic_stat_bis[ue->current_thread_id[subframe]][slot]);
#endif
//printf("LLR dlsch0_harq->Qm %d rx_type %d cw0 %d cw1 %d symbol %d \n",dlsch0_harq->Qm,rx_type,codeword_TB0,codeword_TB1,symbol);
@@ -837,7 +837,7 @@ int rx_pdsch(PHY_VARS_UE *ue,
symbol,
first_symbol_flag,
nb_rb,
adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,2,subframe,symbol),
adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,2,subframe,symbol),
beamforming_mode);
} else if (codeword_TB0 == -1) {
dlsch_qpsk_llr(frame_parms,
@@ -846,7 +846,7 @@ int rx_pdsch(PHY_VARS_UE *ue,
symbol,
first_symbol_flag,
nb_rb,
adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,2,subframe,symbol),
adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,2,subframe,symbol),
beamforming_mode);
} else if (rx_type >= rx_IC_single_stream) {
if (dlsch1_harq->Qm == 2) {
@@ -856,7 +856,7 @@ int rx_pdsch(PHY_VARS_UE *ue,
pdsch_vars[eNB_id]->dl_ch_rho2_ext,
pdsch_vars[eNB_id]->llr[0],
symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,2,subframe,symbol),
adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,2,subframe,symbol),
pdsch_vars[eNB_id]->llr128);
if (rx_type==rx_IC_dual_stream) {
@@ -866,7 +866,7 @@ int rx_pdsch(PHY_VARS_UE *ue,
pdsch_vars[eNB_id]->dl_ch_rho_ext[harq_pid][round],
pdsch_vars[eNB_id]->llr[1],
symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch1_harq->rb_alloc_even,2,subframe,symbol),
adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch1_harq->rb_alloc_even,2,subframe,symbol),
pdsch_vars[eNB_id]->llr128_2ndstream);
}
} else if (dlsch1_harq->Qm == 4) {
@@ -877,7 +877,7 @@ int rx_pdsch(PHY_VARS_UE *ue,
pdsch_vars[eNB_id]->dl_ch_rho2_ext,
pdsch_vars[eNB_id]->llr[0],
symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,2,subframe,symbol),
adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,2,subframe,symbol),
pdsch_vars[eNB_id]->llr128);
if (rx_type==rx_IC_dual_stream) {
@@ -888,7 +888,7 @@ int rx_pdsch(PHY_VARS_UE *ue,
pdsch_vars[eNB_id]->dl_ch_rho_ext[harq_pid][round],
pdsch_vars[eNB_id]->llr[1],
symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch1_harq->rb_alloc_even,4,subframe,symbol),
adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch1_harq->rb_alloc_even,4,subframe,symbol),
pdsch_vars[eNB_id]->llr128_2ndstream);
}
} else {
@@ -899,7 +899,7 @@ int rx_pdsch(PHY_VARS_UE *ue,
pdsch_vars[eNB_id]->dl_ch_rho2_ext,
pdsch_vars[eNB_id]->llr[0],
symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,2,subframe,symbol),
adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,2,subframe,symbol),
pdsch_vars[eNB_id]->llr128);
if (rx_type==rx_IC_dual_stream) {
@@ -910,7 +910,7 @@ int rx_pdsch(PHY_VARS_UE *ue,
pdsch_vars[eNB_id]->dl_ch_rho_ext[harq_pid][round],
pdsch_vars[eNB_id]->llr[1],
symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch1_harq->rb_alloc_even,6,subframe,symbol),
adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch1_harq->rb_alloc_even,6,subframe,symbol),
pdsch_vars[eNB_id]->llr128_2ndstream);
}
}
@@ -925,7 +925,7 @@ int rx_pdsch(PHY_VARS_UE *ue,
pdsch_vars[eNB_id]->llr[0],
pdsch_vars[eNB_id]->dl_ch_mag0,
symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,4,subframe,symbol),
adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,4,subframe,symbol),
pdsch_vars[eNB_id]->llr128,
beamforming_mode);
} else if (codeword_TB0 == -1) {
@@ -934,7 +934,7 @@ int rx_pdsch(PHY_VARS_UE *ue,
pdsch_vars[eNB_id]->llr[1],
pdsch_vars[eNB_id]->dl_ch_mag0,
symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,4,subframe,symbol),
adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,4,subframe,symbol),
pdsch_vars[eNB_id]->llr128_2ndstream,
beamforming_mode);
} else if (rx_type >= rx_IC_single_stream) {
@@ -946,7 +946,7 @@ int rx_pdsch(PHY_VARS_UE *ue,
pdsch_vars[eNB_id]->dl_ch_rho2_ext,
pdsch_vars[eNB_id]->llr[0],
symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,4,subframe,symbol),
adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,4,subframe,symbol),
pdsch_vars[eNB_id]->llr128);
if (rx_type==rx_IC_dual_stream) {
@@ -957,7 +957,7 @@ int rx_pdsch(PHY_VARS_UE *ue,
pdsch_vars[eNB_id]->dl_ch_rho_ext[harq_pid][round],
pdsch_vars[eNB_id]->llr[1],
symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch1_harq->rb_alloc_even,2,subframe,symbol),
adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch1_harq->rb_alloc_even,2,subframe,symbol),
pdsch_vars[eNB_id]->llr128_2ndstream);
}
} else if (dlsch1_harq->Qm == 4) {
@@ -969,7 +969,7 @@ int rx_pdsch(PHY_VARS_UE *ue,
pdsch_vars[eNB_id]->dl_ch_rho2_ext,
pdsch_vars[eNB_id]->llr[0],
symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,4,subframe,symbol),
adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,4,subframe,symbol),
pdsch_vars[eNB_id]->llr128);
if (rx_type==rx_IC_dual_stream) {
@@ -981,7 +981,7 @@ int rx_pdsch(PHY_VARS_UE *ue,
pdsch_vars[eNB_id]->dl_ch_rho_ext[harq_pid][round],
pdsch_vars[eNB_id]->llr[1],
symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch1_harq->rb_alloc_even,4,subframe,symbol),
adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch1_harq->rb_alloc_even,4,subframe,symbol),
pdsch_vars[eNB_id]->llr128_2ndstream);
}
} else {
@@ -993,7 +993,7 @@ int rx_pdsch(PHY_VARS_UE *ue,
pdsch_vars[eNB_id]->dl_ch_rho2_ext,
pdsch_vars[eNB_id]->llr[0],
symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,4,subframe,symbol),
adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,4,subframe,symbol),
pdsch_vars[eNB_id]->llr128);
if (rx_type==rx_IC_dual_stream) {
@@ -1005,7 +1005,7 @@ int rx_pdsch(PHY_VARS_UE *ue,
pdsch_vars[eNB_id]->dl_ch_rho_ext[harq_pid][round],
pdsch_vars[eNB_id]->llr[1],
symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch1_harq->rb_alloc_even,6,subframe,symbol),
adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch1_harq->rb_alloc_even,6,subframe,symbol),
pdsch_vars[eNB_id]->llr128_2ndstream);
}
}
@@ -1021,7 +1021,7 @@ int rx_pdsch(PHY_VARS_UE *ue,
pdsch_vars[eNB_id]->dl_ch_mag0,
pdsch_vars[eNB_id]->dl_ch_magb0,
symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,6,subframe,symbol),
adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,6,subframe,symbol),
pdsch_vars[eNB_id]->llr_offset[symbol],
beamforming_mode);
} else if (codeword_TB0 == -1) {
@@ -1031,7 +1031,7 @@ int rx_pdsch(PHY_VARS_UE *ue,
pdsch_vars[eNB_id]->dl_ch_mag0,
pdsch_vars[eNB_id]->dl_ch_magb0,
symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,6,subframe,symbol),
adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,6,subframe,symbol),
pdsch_vars[eNB_id]->llr_offset[symbol],
beamforming_mode);
} else if (rx_type >= rx_IC_single_stream) {
@@ -1043,7 +1043,7 @@ int rx_pdsch(PHY_VARS_UE *ue,
pdsch_vars[eNB_id]->dl_ch_rho2_ext,
pdsch_vars[eNB_id]->llr[0],
symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,6,subframe,symbol),
adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,6,subframe,symbol),
pdsch_vars[eNB_id]->llr128);
if (rx_type==rx_IC_dual_stream) {
@@ -1054,7 +1054,7 @@ int rx_pdsch(PHY_VARS_UE *ue,
pdsch_vars[eNB_id]->dl_ch_rho_ext[harq_pid][round],
pdsch_vars[eNB_id]->llr[1],
symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch1_harq->rb_alloc_even,2,subframe,symbol),
adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch1_harq->rb_alloc_even,2,subframe,symbol),
pdsch_vars[eNB_id]->llr128_2ndstream);
}
} else if (dlsch1_harq->Qm == 4) {
@@ -1066,7 +1066,7 @@ int rx_pdsch(PHY_VARS_UE *ue,
pdsch_vars[eNB_id]->dl_ch_rho2_ext,
pdsch_vars[eNB_id]->llr[0],
symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,6,subframe,symbol),
adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,6,subframe,symbol),
pdsch_vars[eNB_id]->llr128);
if (rx_type==rx_IC_dual_stream) {
@@ -1078,7 +1078,7 @@ int rx_pdsch(PHY_VARS_UE *ue,
pdsch_vars[eNB_id]->dl_ch_rho_ext[harq_pid][round],
pdsch_vars[eNB_id]->llr[1],
symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch1_harq->rb_alloc_even,4,subframe,symbol),
adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch1_harq->rb_alloc_even,4,subframe,symbol),
pdsch_vars[eNB_id]->llr128_2ndstream);
}
} else {
@@ -1090,7 +1090,7 @@ int rx_pdsch(PHY_VARS_UE *ue,
pdsch_vars[eNB_id]->dl_ch_rho2_ext,
(int16_t *)pllr_symbol_cw0,
symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,6,subframe,symbol),
adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,6,subframe,symbol),
pdsch_vars[eNB_id]->llr_offset[symbol]);
if (rx_type==rx_IC_dual_stream) {
@@ -1102,7 +1102,7 @@ int rx_pdsch(PHY_VARS_UE *ue,
pdsch_vars[eNB_id]->dl_ch_rho_ext[harq_pid][round],
(int16_t *)pllr_symbol_cw1,
symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch1_harq->rb_alloc_even,6,subframe,symbol),
adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch1_harq->rb_alloc_even,6,subframe,symbol),
pdsch_vars[eNB_id]->llr_offset[symbol]);
}
}
@@ -1124,7 +1124,7 @@ int rx_pdsch(PHY_VARS_UE *ue,
pdsch_vars[eNB_id]->rxdataF_comp0,
(int16_t *)pllr_symbol_cw0,
symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,2,subframe,symbol),
adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,2,subframe,symbol),
beamforming_mode);
}
@@ -1137,7 +1137,7 @@ int rx_pdsch(PHY_VARS_UE *ue,
pdsch_vars[eNB_id]->llr[0],
pdsch_vars[eNB_id]->dl_ch_mag0,
symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,4,subframe,symbol),
adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,4,subframe,symbol),
pdsch_vars[eNB_id]->llr128,
beamforming_mode);
}
@@ -1152,7 +1152,7 @@ int rx_pdsch(PHY_VARS_UE *ue,
pdsch_vars[eNB_id]->dl_ch_mag0,
pdsch_vars[eNB_id]->dl_ch_magb0,
symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,6,subframe,symbol),
adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,dlsch0_harq->rb_alloc_even,6,subframe,symbol),
pdsch_vars[eNB_id]->llr_offset[symbol],
beamforming_mode);
}
@@ -746,7 +746,7 @@ int32_t dlsch_qpsk_llr_SIC(LTE_DL_FRAME_PARMS *frame_parms,
amp_tmp=amp_tmp<<1; // to compensate for >> 1 shift in modulation
pbch_pss_sss_adjust=adjust_G2(frame_parms,&rb_alloc,2,subframe,symbol);
pbch_pss_sss_adjust=adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL ,&rb_alloc,2,subframe,symbol);
if ((symbol_mod==0) || (symbol_mod==(4-frame_parms->Ncp))) {
if (frame_parms->nb_antenna_ports_eNB!=1)
@@ -981,7 +981,7 @@ void dlsch_16qam_llr_SIC (LTE_DL_FRAME_PARMS *frame_parms,
symbol_mod = (symbol>=(7-frame_parms->Ncp)) ? symbol-(7-frame_parms->Ncp) : symbol;
pbch_pss_sss_adjust=adjust_G2(frame_parms,&rb_alloc,4,subframe,symbol);
pbch_pss_sss_adjust=adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,&rb_alloc,4,subframe,symbol);
if ((symbol_mod==0) || (symbol_mod==(4-frame_parms->Ncp))) {
amp_tmp=0x1fff;//dlsch0->sqrt_rho_b; already taken into account
@@ -1281,7 +1281,7 @@ void dlsch_64qam_llr_SIC(LTE_DL_FRAME_PARMS *frame_parms,
symbol_mod = (symbol>=(7-frame_parms->Ncp)) ? symbol-(7-frame_parms->Ncp) : symbol;
pbch_pss_sss_adjust=adjust_G2(frame_parms,&rb_alloc,6,subframe,symbol);
pbch_pss_sss_adjust=adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,&rb_alloc,6,subframe,symbol);
if ((symbol_mod==0) || (symbol_mod==(4-frame_parms->Ncp))) {
amp_tmp = 0x1fff;//dlsch0->sqrt_rho_b; already taken into account
+1 -2
View File
@@ -46,10 +46,9 @@ void pcfich_unscrambling(LTE_DL_FRAME_PARMS *frame_parms,
uint32_t i;
uint8_t reset;
uint32_t x1, x2, s=0;
uint32_t x1=0, x2=0, s=0;
reset = 1;
// x1 is set in lte_gold_generic
x2 = ((((2*frame_parms->Nid_cell)+1)*(1+subframe))<<9) + frame_parms->Nid_cell; //this is c_init in 36.211 Sec 6.7.1
for (i=0; i<32; i++) {
+2 -2
View File
@@ -336,8 +336,8 @@ void generate_pucch1x(int32_t **txdataF,
inline void pucch2x_scrambling(LTE_DL_FRAME_PARMS *fp,int subframe,uint16_t rnti,uint32_t B,uint8_t *btilde) __attribute__((always_inline));
inline void pucch2x_scrambling(LTE_DL_FRAME_PARMS *fp,int subframe,uint16_t rnti,uint32_t B,uint8_t *btilde) {
static inline void pucch2x_scrambling(LTE_DL_FRAME_PARMS *fp,int subframe,uint16_t rnti,uint32_t B,uint8_t *btilde) __attribute__((always_inline));
static inline void pucch2x_scrambling(LTE_DL_FRAME_PARMS *fp,int subframe,uint16_t rnti,uint32_t B,uint8_t *btilde) {
uint32_t x1, x2, s=0;
int i;
@@ -1303,7 +1303,7 @@ uint32_t conv_nprb(uint8_t ra_header,uint32_t rb_alloc,int N_RB_DL);
int get_G(LTE_DL_FRAME_PARMS *frame_parms,uint16_t nb_rb,uint32_t *rb_alloc,uint8_t mod_order,uint8_t Nl,uint8_t num_pdcch_symbols,int frame,uint8_t subframe, uint8_t beamforming_mode);
int adjust_G(LTE_DL_FRAME_PARMS *frame_parms,uint32_t *rb_alloc,uint8_t mod_order,uint8_t subframe);
int adjust_G2(LTE_DL_FRAME_PARMS *frame_parms,uint32_t *rb_alloc,uint8_t mod_order,uint8_t subframe,uint8_t symbol);
#ifndef modOrder
+14 -5
View File
@@ -105,14 +105,19 @@ void set_ptrs_symb_idx(uint16_t *ptrs_symbols,
uint8_t L_ptrs,
uint16_t ul_dmrs_symb_pos) {
uint8_t i = 0, last_symbol, is_dmrs_symbol, l_ref;
int8_t l_counter;
uint i = 0, last_symbol, l_ref;
int l_counter;
l_ref = start_symbol;
last_symbol = start_symbol + duration_in_symbols - 1;
if (L_ptrs==0) {
LOG_E(PHY,"bug: impossible L_ptrs\n");
*ptrs_symbols = 0;
return;
}
while ( (l_ref + i*L_ptrs) <= last_symbol) {
is_dmrs_symbol = 0;
int is_dmrs_symbol = 0;
for(l_counter = l_ref + i*L_ptrs; l_counter >= max(l_ref + (i-1)*L_ptrs + 1, l_ref); l_counter--) {
@@ -259,9 +264,13 @@ void nr_ptrs_cpe_estimation(uint8_t K_ptrs,
uint16_t re_cnt = 0;
uint16_t cnt = 0;
unsigned short nb_re_pdsch = NR_NB_SC_PER_RB * nb_rb;
if (K_ptrs==0) {
LOG_E(PHY,"K_ptrs == 0\n");
return;
}
uint16_t sc_per_symbol = (nb_rb + K_ptrs - 1)/K_ptrs;
int16_t *ptrs_p = (int16_t *)malloc(sizeof(int32_t)*(sc_per_symbol));
int16_t *dmrs_comp_p = (int16_t *)malloc(sizeof(int32_t)*(sc_per_symbol));
int16_t *ptrs_p = (int16_t *)malloc(sizeof(int32_t)*((1 + sc_per_symbol/4)*4));
int16_t *dmrs_comp_p = (int16_t *)malloc(sizeof(int32_t)*((1 + sc_per_symbol/4)*4));
double abs = 0.0;
double real = 0.0;
double imag = 0.0;
+2 -2
View File
@@ -135,8 +135,8 @@ void nr_generate_dci(PHY_VARS_gNB *gNB,
dci_pdu->AggregationLevel,
0,NULL);
polar_encoder_fast((uint64_t*)dci_pdu->Payload, (void*)encoder_output, n_RNTI,1,currentPtr);
#if DEBUG_CHANNEL_CODING
printf("polar rnti %x,length %d, L %d\n",n_RNTI, dci_pdu->PayloadSizeBits,dci_pdu->AggregationLevel);
#ifdef DEBUG_CHANNEL_CODING
printf("polar rnti %x,length %d, L %d\n",n_RNTI, dci_pdu->PayloadSizeBits,pdcch_pdu_rel15->dci_pdu->AggregationLevel);
printf("DCI PDU: [0]->0x%lx \t [1]->0x%lx\n",
((uint64_t*)dci_pdu->Payload)[0], ((uint64_t*)dci_pdu->Payload)[1]);
printf("Encoded Payload (length:%d dwords):\n", encoded_length>>5);
+8 -9
View File
@@ -111,9 +111,9 @@ void nr_pdsch_codeword_scrambling_optim(uint8_t *in,
}
uint8_t nr_generate_pdsch(processingData_L1tx_t *msgTx,
int frame,
int slot) {
void nr_generate_pdsch(processingData_L1tx_t *msgTx,
int frame,
int slot) {
PHY_VARS_gNB *gNB = msgTx->gNB;
NR_gNB_DLSCH_t *dlsch;
@@ -351,6 +351,7 @@ uint8_t nr_generate_pdsch(processingData_L1tx_t *msgTx,
ptrs_symbol = is_ptrs_symbol(l,dlPtrsSymPos);
if(ptrs_symbol) {
/* PTRS QPSK Modulation for each OFDM symbol in a slot */
printf("Doing ptrs modulation for symbol %d, n_ptrs %d\n",l,n_ptrs);
nr_modulation(pdsch_dmrs[l][0], (n_ptrs<<1), DMRS_MOD_ORDER, mod_ptrs);
}
}
@@ -390,14 +391,14 @@ uint8_t nr_generate_pdsch(processingData_L1tx_t *msgTx,
txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)] = (beta_ptrs*amp*mod_ptrs[ptrs_idx<<1]) >> 15;
txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)] = (beta_ptrs*amp*mod_ptrs[(ptrs_idx<<1) + 1])>> 15;
#ifdef DEBUG_DLSCH_MAPPING
printf("ptrs_idx %d\t l %d \t k %d \t k_prime %d \t n %d \t txdataF: %d %d\n",
printf("ptrs_idx %d\t l %d \t k %d \t k_prime %d \t n %d \t txdataF: %d %d, mod_ptrs: %d %d\n",
ptrs_idx, l, k, k_prime, n, ((int16_t*)txdataF[ap])[((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)],
((int16_t*)txdataF[ap])[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)]);
((int16_t*)txdataF[ap])[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)],mod_ptrs[ptrs_idx<<1],mod_ptrs[(ptrs_idx<<1)+1]);
#endif
ptrs_idx++;
}
/* Map DATA Symbol */
else if( allowed_xlsch_re_in_dmrs_symbol(k,start_sc,frame_parms->ofdm_symbol_size,rel15->numDmrsCdmGrpsNoData,dmrs_Type)) {
else if( ptrs_symbol || allowed_xlsch_re_in_dmrs_symbol(k,start_sc,frame_parms->ofdm_symbol_size,rel15->numDmrsCdmGrpsNoData,dmrs_Type)) {
txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)] = (amp * tx_layers[ap][m<<1]) >> 15;
txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)] = (amp * tx_layers[ap][(m<<1) + 1]) >> 15;
#ifdef DEBUG_DLSCH_MAPPING
@@ -424,6 +425,7 @@ uint8_t nr_generate_pdsch(processingData_L1tx_t *msgTx,
remaining_re = upper_limit + start_sc - frame_parms->ofdm_symbol_size;
upper_limit = frame_parms->ofdm_symbol_size - start_sc;
}
// fix the alignment issues later, use 64-bit SIMD below instead of 128.
if (0/*(frame_parms->N_RB_DL&1)==0*/) {
__m128i *txF=(__m128i*)&txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size+start_sc+txdataF_offset)<<1)];
@@ -590,9 +592,6 @@ uint8_t nr_generate_pdsch(processingData_L1tx_t *msgTx,
LOG_D(PHY,"beam index for PDSCH allocation already taken\n");
}
}// dlsch loop
return 0;
}
void dump_pdsch_stats(FILE *fd,PHY_VARS_gNB *gNB) {
+3 -5
View File
@@ -43,8 +43,6 @@ void nr_check_time_alloc(uint8_t S, uint8_t L,nfapi_nr_dl_tti_pdsch_pdu_rel15_t
uint16_t get_RIV(uint16_t rb_start, uint16_t L, uint16_t N_RB);
uint16_t get_SLIV(uint8_t S, uint8_t L);
uint8_t nr_get_S(uint8_t row_idx, uint8_t CP, uint8_t time_alloc_type, uint8_t dmrs_typeA_position);
void nr_get_rbg_parms(NR_BWP_PARMS* bwp, uint8_t config_type);
@@ -67,9 +65,9 @@ void nr_fill_dlsch(processingData_L1tx_t *msgTx,
nfapi_nr_dl_tti_pdsch_pdu *pdsch_pdu,
unsigned char *sdu);
uint8_t nr_generate_pdsch(processingData_L1tx_t *msgTx,
int frame,
int slot);
void nr_generate_pdsch(processingData_L1tx_t *msgTx,
int frame,
int slot);
void free_gNB_dlsch(NR_gNB_DLSCH_t **dlschptr, uint16_t N_RB);
void clean_gNB_dlsch(NR_gNB_DLSCH_t *dlsch);
+1 -1
View File
@@ -213,7 +213,7 @@ void ldpc8blocks( void *p) {
for (int rr=impp->macro_num*8; rr < impp->n_segments && rr < (impp->macro_num+1)*8; rr++ ) {
if (impp->F>0) {
// writing into positions d[r][k-2Zc] as in clause 5.3.2 step 2) in 38.212
memset(&impp->d[rr][Kr-impp->F-2*(*impp->Zc)], impp->F, NR_NULL);
memset(&impp->d[rr][Kr-impp->F-2*(*impp->Zc)], NR_NULL, impp->F);
}
#ifdef DEBUG_DLSCH_CODING
+1 -5
View File
@@ -32,6 +32,7 @@
*/
#include "nr_dlsch.h"
#include "../../../nfapi/oai_integration/vendor_ext.h"
extern void set_taus_seed(unsigned int seed_type);
@@ -96,11 +97,6 @@ void nr_get_time_domain_allocation_type(nfapi_nr_config_request_t config,
}
}
uint16_t get_SLIV(uint8_t S, uint8_t L) {
return ( (uint16_t)(((L-1)<=7)? (14*(L-1)+S) : (14*(15-L)+(13-S))) );
}
static inline uint8_t get_K0(uint8_t row_idx, uint8_t time_alloc_type) {
return ( (time_alloc_type == NFAPI_NR_PDSCH_TIME_DOMAIN_ALLOC_TYPE_DEFAULT_A)||
(time_alloc_type == NFAPI_NR_PDSCH_TIME_DOMAIN_ALLOC_TYPE_DEFAULT_C)? 0 :
@@ -1174,7 +1174,7 @@ int nr_rx_pusch(PHY_VARS_gNB *gNB,
uint8_t aarx, aatx;
uint32_t nb_re_pusch, bwp_start_subcarrier;
int avgs;
int avgs = 0;
NR_DL_FRAME_PARMS *frame_parms = &gNB->frame_parms;
nfapi_nr_pusch_pdu_t *rel15_ul = &gNB->ulsch[ulsch_id][0]->harq_processes[harq_pid]->ulsch_pdu;
+11 -9
View File
@@ -47,6 +47,7 @@
#include "PHY/NR_REFSIG/nr_refsig.h"
#include "common/utils/LOG/log.h"
#include "common/utils/LOG/vcd_signal_dumper.h"
#include "nfapi/oai_integration/vendor_ext.h"
#include "nfapi/oai_integration/vendor_ext.h"
@@ -88,7 +89,8 @@ void nr_fill_pucch(PHY_VARS_gNB *gNB,
int frame,
int slot,
nfapi_nr_pucch_pdu_t *pucch_pdu) {
if (NFAPI_MODE == NFAPI_MODE_PNF)
gNB->pucch[0]->active = 0; //check if ture in monolithic mode
int id = nr_find_pucch(pucch_pdu->rnti,frame,slot,gNB);
AssertFatal( (id>=0) && (id<NUMBER_OF_NR_PUCCH_MAX),
"invalid id found for pucch !!! rnti %04x id %d\n",pucch_pdu->rnti,id);
@@ -300,7 +302,7 @@ void nr_decode_pucch0(PHY_VARS_gNB *gNB,
int32_t corr_re[1+frame_parms->nb_antennas_rx][2];
int32_t corr_im[1+frame_parms->nb_antennas_rx][2];
//int32_t no_corr = 0;
int seq_index;
int seq_index = 0;
int64_t temp;
for(i=0;i<nr_sequences;i++){
@@ -429,9 +431,9 @@ void nr_decode_pucch0(PHY_VARS_gNB *gNB,
uci_pdu->harq->num_harq = 1;
uci_pdu->harq->harq_confidence_level = no_conf ? 1 : 0;
uci_pdu->harq->harq_list = (nfapi_nr_harq_t*)malloc(1);
uci_pdu->harq->harq_list[0].harq_value = index&0x01;
LOG_D(NR_PHY, "[DLSCH/PDSCH/PUCCH] %d.%d HARQ value %d SR_flag %d with confidence level (0 is good, 1 is bad) %d xrt_mag %d xrt_mag_next %d n0 %d (%d,%d) pucch0_thres %d, cqi %d, SNRtimes10 %d, energy %f, sync_pos %d\n",
frame,slot,uci_pdu->harq->harq_list[0].harq_value,pucch_pdu->sr_flag,uci_pdu->harq->harq_confidence_level,xrtmag_dBtimes10,xrtmag_next_dBtimes10,max_n0,uci_stats->pucch0_n00,uci_stats->pucch0_n01,uci_stats->pucch0_thres,cqi,SNRtimes10,10*log10((double)sigenergy),gNB->ulsch_stats[0].sync_pos);
uci_pdu->harq->harq_list[0].harq_value = !(index&0x01);
LOG_D(PHY, "[DLSCH/PDSCH/PUCCH] %d.%d HARQ value %d (0 pass, 1 fail) with confidence level %d (0 is good, 1 is bad) xrt_mag %d xrt_mag_next %d n0 %d (%d,%d) pucch0_thres %d, cqi %d, SNRtimes10 %d, energy %f, sync_pos %d\n",
frame,slot,uci_pdu->harq->harq_list[0].harq_value,uci_pdu->harq->harq_confidence_level,xrtmag_dBtimes10,xrtmag_next_dBtimes10,max_n0,uci_stats->pucch0_n00,uci_stats->pucch0_n01,uci_stats->pucch0_thres,cqi,SNRtimes10,10*log10((double)sigenergy),gNB->ulsch_stats[0].sync_pos);
if (pucch_pdu->sr_flag == 1) {
uci_pdu->sr = calloc(1,sizeof(*uci_pdu->sr));
uci_pdu->sr->sr_indication = (index>1) ? 1 : 0;
@@ -445,10 +447,10 @@ void nr_decode_pucch0(PHY_VARS_gNB *gNB,
uci_pdu->harq->num_harq = 2;
uci_pdu->harq->harq_confidence_level = (no_conf) ? 1 : 0;
uci_pdu->harq->harq_list = (nfapi_nr_harq_t*)malloc(2);
uci_pdu->harq->harq_list[1].harq_value = index&0x01;
uci_pdu->harq->harq_list[0].harq_value = (index>>1)&0x01;
LOG_D(NR_PHY, "[DLSCH/PDSCH/PUCCH] %d.%d HARQ values %d and %d SR_flag %d with confidence level (0 is good, 1 is bad) %d, xrt_mag %d xrt_mag_next %d n0 %d (%d,%d) pucch0_thres %d, cqi %d, SNRtimes10 %d,sync_pos %d\n",
frame,slot,uci_pdu->harq->harq_list[1].harq_value,uci_pdu->harq->harq_list[0].harq_value,pucch_pdu->sr_flag,uci_pdu->harq->harq_confidence_level,xrtmag_dBtimes10,xrtmag_next_dBtimes10,max_n0,uci_stats->pucch0_n00,uci_stats->pucch0_n01,uci_stats->pucch0_thres,cqi,SNRtimes10,gNB->ulsch_stats[0].sync_pos);
uci_pdu->harq->harq_list[1].harq_value = !(index&0x01);
uci_pdu->harq->harq_list[0].harq_value = !((index>>1)&0x01);
LOG_D(PHY, "[DLSCH/PDSCH/PUCCH] %d.%d HARQ values %d (0 pass, 1 fail) and %d with confidence level %d (0 is good, 1 is bad), xrt_mag %d xrt_mag_next %d n0 %d (%d,%d) pucch0_thres %d, cqi %d, SNRtimes10 %d,sync_pos %d\n",
frame,slot,uci_pdu->harq->harq_list[1].harq_value,uci_pdu->harq->harq_list[0].harq_value,uci_pdu->harq->harq_confidence_level,xrtmag_dBtimes10,xrtmag_next_dBtimes10,max_n0,uci_stats->pucch0_n00,uci_stats->pucch0_n01,uci_stats->pucch0_thres,cqi,SNRtimes10,gNB->ulsch_stats[0].sync_pos);
if (pucch_pdu->sr_flag == 1) {
uci_pdu->sr = calloc(1,sizeof(*uci_pdu->sr));
uci_pdu->sr->sr_indication = (index>3) ? 1 : 0;
File diff suppressed because it is too large Load Diff
@@ -379,13 +379,10 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
len = (pilots==1)? ((config_type==NFAPI_NR_DMRS_TYPE1)?nb_rb*(12-6*dlsch0_harq->n_dmrs_cdm_groups): nb_rb*(12-4*dlsch0_harq->n_dmrs_cdm_groups)):(nb_rb*12);
stop_meas(&ue->generic_stat_bis[proc->thread_id][slot]);
#if DISABLE_LOG_X
printf("[AbsSFN %u.%d] Slot%d Symbol %d type %d: Pilot/Data extraction %5.2f \n",
frame,nr_slot_rx,slot,symbol,type,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0));
#else
LOG_D(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d type %d: Pilot/Data extraction %5.2f \n",
frame,nr_slot_rx,slot,symbol,type,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0));
#endif
if (cpumeas(CPUMEAS_GETSTATE))
LOG_D(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d type %d: Pilot/Data extraction %5.2f \n",
frame,nr_slot_rx,slot,symbol,type,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0));
start_meas(&ue->generic_stat_bis[proc->thread_id][slot]);
n_tx = dlsch0_harq->Nl;
@@ -402,11 +399,9 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
nb_rb_pdsch);
stop_meas(&ue->generic_stat_bis[proc->thread_id][slot]);
#if DISABLE_LOG_X
printf("[AbsSFN %u.%d] Slot%d Symbol %d: Channel Scale %5.2f \n",frame,nr_slot_rx,slot,symbol,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0));
#else
LOG_D(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d: Channel Scale %5.2f \n",frame,nr_slot_rx,slot,symbol,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0));
#endif
if (cpumeas(CPUMEAS_GETSTATE))
LOG_D(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d: Channel Scale %5.2f \n",frame,nr_slot_rx,slot,symbol,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0));
start_meas(&ue->generic_stat_bis[proc->thread_id][slot]);
if (first_symbol_flag==1) {
if (beamforming_mode==0){
@@ -463,11 +458,8 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
#endif
stop_meas(&ue->generic_stat_bis[proc->thread_id][slot]);
#if DISABLE_LOG_X
printf("[AbsSFN %u.%d] Slot%d Symbol %d first_symbol_flag %d: Channel Level %5.2f \n",frame,nr_slot_rx,slot,symbol,first_symbol_flag,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0));
#else
LOG_D(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d first_symbol_flag %d: Channel Level %5.2f \n",frame,nr_slot_rx,slot,symbol,first_symbol_flag,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0));
#endif
if (cpumeas(CPUMEAS_GETSTATE))
LOG_D(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d first_symbol_flag %d: Channel Level %5.2f \n",frame,nr_slot_rx,slot,symbol,first_symbol_flag,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0));
start_meas(&ue->generic_stat_bis[proc->thread_id][slot]);
// Now channel compensation
@@ -515,11 +507,9 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
}
stop_meas(&ue->generic_stat_bis[proc->thread_id][slot]);
#if DISABLE_LOG_X
printf("[AbsSFN %u.%d] Slot%d Symbol %d log2_maxh %d channel_level %d: Channel Comp %5.2f \n", frame, nr_slot_rx, slot, symbol, pdsch_vars[gNB_id]->log2_maxh, proc->channel_level, ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0));
#else
LOG_D(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d log2_maxh %d channel_level %d: Channel Comp %5.2f \n", frame, nr_slot_rx, slot, symbol, pdsch_vars[gNB_id]->log2_maxh, proc->channel_level, ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0));
#endif
if (cpumeas(CPUMEAS_GETSTATE))
LOG_D(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d log2_maxh %d channel_level %d: Channel Comp %5.2f \n", frame, nr_slot_rx, slot, symbol, pdsch_vars[gNB_id]->log2_maxh, proc->channel_level, ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0));
start_meas(&ue->generic_stat_bis[proc->thread_id][slot]);
if (frame_parms->nb_antennas_rx > 1) {
@@ -574,11 +564,9 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
}
stop_meas(&ue->generic_stat_bis[proc->thread_id][slot]);
#if DISABLE_LOG_X
printf("[AbsSFN %u.%d] Slot%d Symbol %d: Channel Combine %5.2f \n",frame,nr_slot_rx,slot,symbol,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0));
#else
LOG_D(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d: Channel Combine %5.2f \n",frame,nr_slot_rx,slot,symbol,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0));
#endif
if (cpumeas(CPUMEAS_GETSTATE))
LOG_D(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d: Channel Combine %5.2f \n",frame,nr_slot_rx,slot,symbol,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0));
start_meas(&ue->generic_stat_bis[proc->thread_id][slot]);
/* Store the valid DL RE's */
pdsch_vars[gNB_id]->dl_valid_re[symbol-1] = len;
@@ -657,11 +645,8 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
}
stop_meas(&ue->generic_stat_bis[proc->thread_id][slot]);
#if DISABLE_LOG_X
printf("[AbsSFN %u.%d] Slot%d Symbol %d: LLR Computation %5.2f \n",frame,nr_slot_rx,slot,symbol,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0));
#else
LOG_D(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d: LLR Computation %5.2f \n",frame,nr_slot_rx,slot,symbol,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0));
#endif
if (cpumeas(CPUMEAS_GETSTATE))
LOG_D(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d: LLR Computation %5.2f \n",frame,nr_slot_rx,slot,symbol,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0));
// Please keep it: useful for debugging
#ifdef DEBUG_PDSCH_RX
@@ -947,7 +947,7 @@ void nr_dlsch_64qam_llr_SIC(NR_DL_FRAME_PARMS *frame_parms,
symbol_mod = (symbol>=(7-frame_parms->Ncp)) ? symbol-(7-frame_parms->Ncp) : symbol;
pbch_pss_sss_adjust=adjust_G2(frame_parms,&rb_alloc,6,subframe,symbol);
pbch_pss_sss_adjust=adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,&rb_alloc,6,subframe,symbol);
if ((symbol_mod==0) || (symbol_mod==(4-frame_parms->Ncp))) {
amp_tmp = 0x1fff;//dlsch0->sqrt_rho_b; already taken into account
@@ -353,21 +353,15 @@ int nr_initial_sync(UE_nr_rxtx_proc_t *proc,
if( (abs(ue->common_vars.freq_offset) > 150) && (ret == 0) )
{
ret=-1;
#if DISABLE_LOG_X
printf("Ignore MIB with high freq offset [%d Hz] estimation \n",ue->common_vars.freq_offset);
#else
LOG_E(HW, "Ignore MIB with high freq offset [%d Hz] estimation \n",ue->common_vars.freq_offset);
#endif
}*/
if (ret==0) { // PBCH found so indicate sync to higher layers and configure frame parameters
//#ifdef DEBUG_INITIAL_SYNCH
#if DISABLE_LOG_X
printf("[UE%d] In synch, rx_offset %d samples\n",ue->Mod_id, ue->rx_offset);
#else
LOG_I(PHY, "[UE%d] In synch, rx_offset %d samples\n",ue->Mod_id, ue->rx_offset);
#endif
//#endif
if (ue->UE_scan_carrier == 0) {
+3 -3
View File
@@ -601,11 +601,11 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
#endif
nr_downlink_indication_t dl_indication;
fapi_nr_rx_indication_t rx_ind;
fapi_nr_rx_indication_t *rx_ind = calloc(1, sizeof(*rx_ind));
uint16_t number_pdus = 1;
nr_fill_dl_indication(&dl_indication, NULL, &rx_ind, proc, ue, gNB_id);
nr_fill_rx_indication(&rx_ind, FAPI_NR_RX_PDU_TYPE_SSB, gNB_id, ue, NULL, NULL, number_pdus, proc);
nr_fill_dl_indication(&dl_indication, NULL, rx_ind, proc, ue, gNB_id);
nr_fill_rx_indication(rx_ind, FAPI_NR_RX_PDU_TYPE_SSB, gNB_id, ue, NULL, NULL, number_pdus, proc);
if (ue->if_inst && ue->if_inst->dl_indication)
ue->if_inst->dl_indication(&dl_indication, NULL);
@@ -1087,22 +1087,6 @@ uint8_t nr_ue_pusch_common_procedures(PHY_VARS_NR_UE *UE,
NR_DL_FRAME_PARMS *frame_parms,
uint8_t Nl);
uint32_t nr_dlsch_decoding_mthread(PHY_VARS_NR_UE *phy_vars_ue,
UE_nr_rxtx_proc_t *proc,
int eNB_id,
short *dlsch_llr,
NR_DL_FRAME_PARMS *frame_parms,
NR_UE_DLSCH_t *dlsch,
NR_DL_UE_HARQ_t *harq_process,
uint32_t frame,
uint16_t nb_symb_sch,
uint8_t nr_slot_rx,
uint8_t harq_pid,
uint8_t is_crnti,
uint8_t llr8_flag);
void *nr_dlsch_decoding_2thread0(void *arg);
void *nr_dlsch_decoding_2thread1(void *arg);
@@ -1302,8 +1286,8 @@ uint8_t get_transmission_mode(module_id_t Mod_id, uint8_t CC_id, rnti_t rnti);
*/
uint32_t conv_nprb(uint8_t ra_header,uint32_t rb_alloc,int N_RB_DL);
int adjust_G(NR_DL_FRAME_PARMS *frame_parms,uint32_t *rb_alloc,uint8_t mod_order,uint8_t subframe);
int adjust_G2(NR_DL_FRAME_PARMS *frame_parms,uint32_t *rb_alloc,uint8_t mod_order,uint8_t subframe,uint8_t symbol);
//int adjust_G(NR_DL_FRAME_PARMS *frame_parms,uint32_t *rb_alloc,uint8_t mod_order,uint8_t subframe);
//int adjust_G2(NR_DL_FRAME_PARMS *frame_parms,uint32_t *rb_alloc,uint8_t mod_order,uint8_t subframe,uint8_t symbol);
#ifndef modOrder
@@ -1329,16 +1313,6 @@ uint8_t I_TBS2I_MCS(uint8_t I_TBS);
uint8_t SE2I_TBS(float SE,
uint8_t N_PRB,
uint8_t symbPerRB);
/** \brief This function generates the sounding reference symbol (SRS) for the uplink according to 36.211 v8.6.0. If IFFT_FPGA is defined, the SRS is quantized to a QPSK sequence.
@param frame_parms LTE DL Frame Parameters
@param soundingrs_ul_config_dedicated Dynamic configuration from RRC during Connection Establishment
@param txdataF pointer to the frequency domain TX signal
@returns 0 on success*/
int generate_srs(NR_DL_FRAME_PARMS *frame_parms,
SOUNDINGRS_UL_CONFIG_DEDICATED *soundingrs_ul_config_dedicated,
int *txdataF,
int16_t amp,
uint32_t subframe);
/*!
@@ -1368,12 +1342,6 @@ int32_t generate_drs_pusch(PHY_VARS_NR_UE *phy_vars_ue,
uint32_t nb_rb,
uint8_t ant);
/*!
\brief This function initializes the Group Hopping, Sequence Hopping and nPRS sequences for PUCCH/PUSCH according to 36.211 v8.6.0. It should be called after configuration of UE (reception of SIB2/3) and initial configuration of eNB (or after reconfiguration of cell-specific parameters).
@param frame_parms Pointer to a NR_DL_FRAME_PARMS structure (eNB or UE)*/
void init_ul_hopping(NR_DL_FRAME_PARMS *frame_parms);
/*!
\brief This function implements the initialization of paging parameters for UE (See Section 7, 36.304).It must be called after setting IMSImod1024 during UE startup and after receiving SIB2
@param ue Pointer to UE context
@@ -1438,8 +1406,6 @@ double sinr_eff_cqi_calc(PHY_VARS_NR_UE *phy_vars_ue,
uint8_t sinr2cqi(double sinr,uint8_t trans_mode);
int dump_dci(NR_DL_FRAME_PARMS *frame_parms, DCI_ALLOC_t *dci);
int dump_ue_stats(PHY_VARS_NR_UE *phy_vars_ue, UE_nr_rxtx_proc_t *proc, char* buffer, int length, runmode_t mode, int input_level_dBm);
void init_transport_channels(uint8_t);
@@ -1529,18 +1495,11 @@ int get_nCCE_offset_l1(int *CCE_table,
const unsigned short rnti,
const unsigned char subframe);
uint16_t get_nCCE(uint8_t num_pdcch_symbols,NR_DL_FRAME_PARMS *frame_parms,uint8_t mi);
uint16_t get_nquad(uint8_t num_pdcch_symbols,NR_DL_FRAME_PARMS *frame_parms,uint8_t mi);
uint8_t get_mi(NR_DL_FRAME_PARMS *frame,uint8_t subframe);
//uint8_t get_mi(NR_DL_FRAME_PARMS *frame,uint8_t subframe);
uint16_t get_nCCE_mac(uint8_t Mod_id,uint8_t CC_id,int num_pdcch_symbols,int subframe);
uint8_t get_num_pdcch_symbols(uint8_t num_dci,DCI_ALLOC_t *dci_alloc,NR_DL_FRAME_PARMS *frame_parms,uint8_t subframe);
void pdcch_interleaving(NR_DL_FRAME_PARMS *frame_parms,int32_t **z, int32_t **wbar,uint8_t n_symbols_pdcch,uint8_t mi);
void nr_pdcch_unscrambling(int16_t *z,
uint16_t scrambling_RNTI,
uint32_t length,
@@ -1555,7 +1514,6 @@ void dlsch_unscrambling(NR_DL_FRAME_PARMS *frame_parms,
uint8_t q,
uint8_t Ns);
void init_ncs_cell(NR_DL_FRAME_PARMS *frame_parms,uint8_t ncs_cell[20][7]);
void generate_pucch1x(int32_t **txdataF,
NR_DL_FRAME_PARMS *frame_parms,
@@ -1603,7 +1561,7 @@ void init_ulsch_power_LUT(void);
@param subframe subframe index to check
@returns 0 on success
*/
int is_prach_subframe(NR_DL_FRAME_PARMS *frame_parms,frame_t frame, uint8_t subframe);
//int is_prach_subframe(NR_DL_FRAME_PARMS *frame_parms,frame_t frame, uint8_t subframe);
/*!
\brief Generate PRACH waveform
@@ -1669,8 +1627,6 @@ void init_scrambling_lut(void);
@param frame_parms Pointer to frame parameters
@returns 1 if subframe is for MBSFN
*/
int is_pmch_subframe(frame_t frame, int subframe, NR_DL_FRAME_PARMS *frame_parms);
uint8_t is_not_pilot(uint8_t pilots, uint8_t re, uint8_t nushift, uint8_t use2ndpilots);
uint8_t is_not_UEspecRS(int8_t lprime, uint8_t re, uint8_t nushift, uint8_t Ncp, uint8_t beamforming_mode);
@@ -1707,8 +1663,7 @@ uint8_t get_prach_prb_offset(NR_DL_FRAME_PARMS *frame_parms,
uint8_t n_ra_prboffset,
uint8_t tdd_mapindex, uint16_t Nf);
uint32_t lte_gold_generic(uint32_t *x1, uint32_t *x2, uint8_t reset);
#include <openair1/PHY/LTE_TRANSPORT/transport_proto.h>
uint8_t nr_dci_decoding_procedure(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
@@ -1750,8 +1705,6 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
int32_t generate_nr_prach(PHY_VARS_NR_UE *ue, uint8_t gNB_id, uint8_t subframe);
void dump_nrdlsch(PHY_VARS_NR_UE *ue,uint8_t gNB_id,uint8_t nr_slot_rx,unsigned int *coded_bits_per_codeword,int round, unsigned char harq_pid);
void *dlsch_thread(void *arg);
/**@}*/
#endif
+14 -12
View File
@@ -273,7 +273,7 @@ int nr_ulsch_encoding(PHY_VARS_NR_UE *ue,
#ifdef DEBUG_ULSCH_CODING
printf("encoding thinks this is a new packet \n");
#endif
harq_process->first_tx = 0;
harq_process->first_tx = 0;
///////////////////////// a---->| add CRC |---->b /////////////////////////
///////////
/*
@@ -444,17 +444,19 @@ int nr_ulsch_encoding(PHY_VARS_NR_UE *ue,
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_NR_RATE_MATCHING_LDPC, VCD_FUNCTION_IN);
start_meas(&ue->ulsch_rate_matching_stats);
nr_rate_matching_ldpc(Ilbrm,
Tbslbrm,
harq_process->BG,
*pz,
harq_process->d[r],
harq_process->e+r_offset,
harq_process->C,
F,
Kr-F-2*(*pz),
harq_process->pusch_pdu.pusch_data.rv_index,
E);
if (nr_rate_matching_ldpc(Ilbrm,
Tbslbrm,
harq_process->BG,
*pz,
harq_process->d[r],
harq_process->e+r_offset,
harq_process->C,
F,
Kr-F-2*(*pz),
harq_process->pusch_pdu.pusch_data.rv_index,
E) == -1)
return -1;
stop_meas(&ue->ulsch_rate_matching_stats);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_NR_RATE_MATCHING_LDPC, VCD_FUNCTION_OUT);
+8 -3
View File
@@ -106,7 +106,8 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
uint32_t scrambled_output[NR_MAX_NB_CODEWORDS][NR_MAX_PDSCH_ENCODED_LENGTH>>5];
int16_t **tx_layers;
int32_t **txdataF;
int8_t Wf[2], Wt[2], l_prime[2], delta;
int8_t Wf[2], Wt[2];
int l_prime[2], delta;
uint8_t nb_dmrs_re_per_rb;
int ap, i;
int sample_offsetF, N_RE_prime;
@@ -162,11 +163,15 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
unsigned int G = nr_get_G(nb_rb, number_of_symbols,
nb_dmrs_re_per_rb, number_dmrs_symbols, mod_order, Nl);
trace_NRpdu(DIRECTION_UPLINK,
ulsch_ue->harq_processes[harq_pid]->a,
ulsch_ue->harq_processes[harq_pid]->pusch_pdu.pusch_data.tb_size,
0, WS_C_RNTI, rnti, frame, slot, 0, 0);
nr_ulsch_encoding(UE, ulsch_ue, frame_parms, harq_pid, G);
if (nr_ulsch_encoding(UE, ulsch_ue, frame_parms, harq_pid, G) == -1)
return;
///////////
////////////////////////////////////////////////////////////////////
@@ -414,7 +419,7 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
if (is_dmrs == 1) {
// if transform precoding is enabled
if (pusch_pdu->transform_precoding == 0) {
((int16_t*)txdataF[ap])[(sample_offsetF)<<1] = (Wt[l_prime[0]]*Wf[k_prime]*AMP*dmrs_seq[2*dmrs_idx]) >> 15;
((int16_t*)txdataF[ap])[((sample_offsetF)<<1) + 1] = (Wt[l_prime[0]]*Wf[k_prime]*AMP*dmrs_seq[(2*dmrs_idx) + 1]) >> 15;
+2 -2
View File
@@ -805,8 +805,8 @@ void nr_generate_pucch1_old(PHY_VARS_NR_UE *ue,
}
#endif //0
inline void nr_pucch2_3_4_scrambling(uint16_t M_bit,uint16_t rnti,uint16_t n_id,uint64_t *B64,uint8_t *btilde) __attribute__((always_inline));
inline void nr_pucch2_3_4_scrambling(uint16_t M_bit,uint16_t rnti,uint16_t n_id,uint64_t *B64,uint8_t *btilde) {
static inline void nr_pucch2_3_4_scrambling(uint16_t M_bit,uint16_t rnti,uint16_t n_id,uint64_t *B64,uint8_t *btilde) __attribute__((always_inline));
static inline void nr_pucch2_3_4_scrambling(uint16_t M_bit,uint16_t rnti,uint16_t n_id,uint64_t *B64,uint8_t *btilde) {
uint32_t x1, x2, s=0;
int i;
uint8_t c;
+1 -1
View File
@@ -42,7 +42,7 @@ int main(int argc, char **argv) {
get_common_options(SOFTMODEM_GNB_BIT );
config_process_cmdline( cmdline_params,sizeof(cmdline_params)/sizeof(paramdef_t),NULL);
CONFIG_CLEARRTFLAG(CONFIG_NOEXITONHELP);
configure_linux();
set_latency_target();
int N_RB=50;
+9 -5
View File
@@ -49,9 +49,15 @@ void reset_stats(FL_OBJECT *button, long arg) {
int i,j,k;
PHY_VARS_eNB *phy_vars_eNB = RC.eNB[0][0];
for (i=0; i<NUMBER_OF_UE_MAX; i++) {
for (k=0; k<8; k++) { //harq_processes
for (j=0; j<phy_vars_eNB->dlsch[i][0]->Mlimit; j++) {
printf("XXX %d %d %d\n",
sizeofArray(phy_vars_eNB->UE_stats),
sizeofArray( phy_vars_eNB->UE_stats[i].dlsch_NAK),
sizeofArray( *phy_vars_eNB->UE_stats[i].dlsch_NAK)
);
for (i=0; i<sizeofArray(phy_vars_eNB->UE_stats); i++) {
for (k=0; k<sizeofArray(phy_vars_eNB->UE_stats[i].dlsch_NAK); k++) { //harq_processes
for (j=0; j<sizeofArray(*phy_vars_eNB->UE_stats[i].dlsch_NAK); j++) {
phy_vars_eNB->UE_stats[i].dlsch_NAK[k][j]=0;
phy_vars_eNB->UE_stats[i].dlsch_ACK[k][j]=0;
phy_vars_eNB->UE_stats[i].dlsch_trials[k][j]=0;
@@ -67,7 +73,6 @@ void reset_stats(FL_OBJECT *button, long arg) {
}
}
static void *scope_thread_eNB(void *arg) {
struct sched_param sched_param;
int UE_id, CC_id;
@@ -75,7 +80,6 @@ static void *scope_thread_eNB(void *arg) {
sched_param.sched_priority = sched_get_priority_min(SCHED_FIFO)+1;
sched_setscheduler(0, SCHED_FIFO,&sched_param);
printf("Scope thread has priority %d\n",sched_param.sched_priority);
while (!oai_exit) {
ue_cnt=0;
+6 -1
View File
@@ -240,7 +240,7 @@ static void genericWaterFall (OAIgraph_t *graph, scopeSample_t *values, const in
for (int pix=0; pix<graph->w; pix++) {
scopeSample_t *end=values+(pix+1)*samplesPerPixel;
end-=2;
AssertFatal(end <= values+datasize,"diff : %ld", end-values+datasize);
AssertFatal(end <= values+datasize,"diff : %tu", end-values+datasize);
double val=0;
for (scopeSample_t *s=values+(pix)*samplesPerPixel;
@@ -449,6 +449,7 @@ static OAI_phy_scope_t *create_phy_scope_gnb(void) {
OAI_phy_scope_t *fdui = calloc(( sizeof *fdui ),1);
// Define form
fdui->phy_scope = fl_bgn_form( FL_NO_BOX, 800, 800 );
fl_set_form_dblbuffer(fdui->phy_scope, 1);
// This the whole UI box
obj = fl_add_box( FL_BORDER_BOX, 0, 0, 800, 800, "" );
fl_set_object_color( obj, FL_BLACK, FL_WHITE );
@@ -530,7 +531,10 @@ static void *scope_thread_gNB(void *arg) {
OAI_phy_scope_t *form_gnb = create_phy_scope_gnb();
while (!oai_exit) {
fl_freeze_form(form_gnb->phy_scope);
phy_scope_gNB(form_gnb, p, nb_ue);
fl_unfreeze_form(form_gnb->phy_scope);
fl_redraw_form(form_gnb->phy_scope);
usleep(99*1000);
}
@@ -801,6 +805,7 @@ static OAI_phy_scope_t *create_phy_scope_nrue( int ID ) {
OAI_phy_scope_t *fdui = calloc(( sizeof *fdui ),1);
// Define form
fdui->phy_scope = fl_bgn_form( FL_NO_BOX, 800, 900 );
fl_set_form_dblbuffer(fdui->phy_scope, 1);
// This the whole UI box
obj = fl_add_box( FL_BORDER_BOX, 0, 0, 800, 900, "" );
fl_set_object_color( obj, FL_BLACK, FL_BLACK );
+3 -25
View File
@@ -25,20 +25,17 @@
#include <unistd.h>
#include <string.h>
#include "assertions.h"
#ifndef PHYSIM
#include <pthread.h>
#include "common/config/config_userapi.h"
#endif
#include <pthread.h>
#include "common/config/config_userapi.h"
#include <common/utils/threadPool/thread-pool.h>
// global var for openair performance profiler
int opp_enabled = 0;
double cpu_freq_GHz __attribute__ ((aligned(32)));
double cpu_freq_GHz __attribute__ ((aligned(32)))=0.0;
#ifndef PHYSIM
static uint32_t max_cpumeasur;
static time_stats_t **measur_table;
notifiedFIFO_t measur_fifo;
#endif
double get_cpu_freq_GHz(void)
{
if (cpu_freq_GHz <1 ) {
@@ -54,24 +51,7 @@ double get_cpu_freq_GHz(void)
return cpu_freq_GHz;
}
int cpumeas(int action)
{
switch (action) {
case CPUMEAS_ENABLE:
opp_enabled = 1;
break;
case CPUMEAS_DISABLE:
opp_enabled = 0;
break;
case CPUMEAS_GETSTATE:
default:
break;
}
return opp_enabled;
}
void print_meas_now(time_stats_t *ts,
const char *name,
@@ -187,7 +167,6 @@ double get_time_meas_us(time_stats_t *ts)
return 0;
}
#ifndef PHYSIM
/* function for the asynchronous measurment module: cpu stat are sent to a dedicated thread
* which is in charge of computing the cpu time spent in a given function/algorithm...
*/
@@ -294,4 +273,3 @@ void end_meas(void) {
msg->msgid = TIMESTAT_MSGID_END ;
pushNotifiedFIFO(&measur_fifo, nfe);
}
#endif
+19 -8
View File
@@ -31,9 +31,7 @@
#include <pthread.h>
#include <linux/kernel.h>
#include <linux/types.h>
#ifndef PHYSIM
#include "common/utils/threadPool/thread-pool.h"
#endif
#include "common/utils/threadPool/thread-pool.h"
// global var to enable openair performance profiler
extern int opp_enabled;
extern double cpu_freq_GHz __attribute__ ((aligned(32)));;
@@ -72,10 +70,8 @@ typedef struct {
char *meas_name; /*!< \brief name to use when printing the measure (not used for PHY simulators)*/
int meas_index; /*!< \brief index of this measure in the measure array (not used for PHY simulators)*/
int meas_enabled; /*!< \brief per measure enablement flag. send_meas tests this flag, unused today in start_meas and stop_meas*/
#ifndef PHYSIM
notifiedFIFO_elt_t *tpoolmsg; /*!< \brief message pushed to the cpu measurment queue to report a measure START or STOP */
time_stats_msg_t *tstatptr; /*!< \brief pointer to the time_stats_msg_t data in the tpoolmsg, stored here for perf considerations*/
#endif
} time_stats_t;
#define MEASURE_ENABLED(X) (X->meas_enabled)
@@ -119,7 +115,24 @@ static inline uint32_t rdtsc_oai(void) {
#define CPUMEAS_DISABLE 0
#define CPUMEAS_ENABLE 1
#define CPUMEAS_GETSTATE 2
int cpumeas(int action);
static inline int cpumeas(int action) {
switch (action) {
case CPUMEAS_ENABLE:
opp_enabled = 1;
break;
case CPUMEAS_DISABLE:
opp_enabled = 0;
break;
case CPUMEAS_GETSTATE:
default:
break;
}
return opp_enabled;
}
static inline void start_meas(time_stats_t *ts) {
if (opp_enabled) {
if (ts->meas_flag==0) {
@@ -166,7 +179,6 @@ static inline void copy_meas(time_stats_t *dst_ts,time_stats_t *src_ts) {
}
}
#ifndef PHYSIM
extern notifiedFIFO_t measur_fifo;
#define CPUMEASUR_SECTION "cpumeasur"
@@ -188,5 +200,4 @@ extern notifiedFIFO_t measur_fifo;
}
void end_meas(void);
#endif //ifndef PHYSIM
#endif
+22
View File
@@ -1078,5 +1078,27 @@ typedef struct nr_rxtx_thread_data_s {
notifiedFIFO_t txFifo;
} nr_rxtx_thread_data_t;
typedef struct LDPCDecode_ue_s {
PHY_VARS_NR_UE *phy_vars_ue;
NR_DL_UE_HARQ_t *harq_process;
t_nrLDPC_dec_params decoderParms;
NR_UE_DLSCH_t *dlsch;
short* dlsch_llr;
int dlsch_id;
int harq_pid;
int rv_index;
int A;
int E;
int Kc;
int Qm;
int Kr_bytes;
int nbSegments;
int segment_r;
int r_offset;
int offset;
int Tbslbrm;
int decodeIterations;
} ldpcDecode_ue_t;
#include "SIMULATION/ETH_TRANSPORT/defs.h"
#endif
+1 -46
View File
@@ -107,11 +107,10 @@
* @}
*/
#include <common/utils/utils.h>
#include "defs_eNB.h"
#include "types.h"
/** @addtogroup _PHY_STRUCTURES_
* @{
*/
@@ -315,50 +314,6 @@ typedef struct {
#include "openairinterface5g_limits.h"
#include "assertions.h"
#define cmax(a,b) ((a>b) ? (a) : (b))
#define cmax3(a,b,c) ((cmax(a,b)>c) ? (cmax(a,b)) : (c))
#define cmin(a,b) ((a<b) ? (a) : (b))
#ifdef __cplusplus
#ifdef min
#undef min
#undef max
#endif
#else
#define max(a,b) cmax(a,b)
#define min(a,b) cmin(a,b)
#endif
#ifndef malloc16
# ifdef __AVX2__
# define malloc16(x) memalign(32,x+32)
# else
# define malloc16(x) memalign(16,x+16)
# endif
#endif
#define free16(y,x) free(y)
#define bigmalloc malloc
#define bigmalloc16 malloc16
#define openair_free(y,x) free((y))
#define PAGE_SIZE 4096
#define free_and_zero(PtR) do { \
if (PtR) { \
free(PtR); \
PtR = NULL; \
} \
} while (0)
static inline void* malloc16_clear( size_t size )
{
#ifdef __AVX2__
void* ptr = memalign(32, size+32);
#else
void* ptr = memalign(16, size+16);
#endif
DevAssert(ptr);
memset( ptr, 0, size );
return ptr;
}
#endif //__PHY_IMPLEMENTATION_DEFS_H__
/**@}
*/
+3 -1
View File
@@ -24,6 +24,7 @@
#include "PHY/types.h"
#include "PHY/defs_eNB.h"
#include "PHY/defs_gNB.h"
#include "PHY/defs_UE.h"
char* namepointer_chMag ;
@@ -42,6 +43,7 @@ char* namepointer_log2;
PHY_VARS_UE ***PHY_vars_UE_g;
UL_RCC_IND_t UL_RCC_INFO;
NR_UL_IND_t UL_INFO;
unsigned short rev[2048],rev_times4[8192],rev_half[1024];
unsigned short rev256[256],rev512[512],rev1024[1024],rev4096[4096],rev2048[2048],rev8192[8192];
@@ -81,7 +83,7 @@ const double sinr_to_cqi[4][16]= { {-2.5051, -2.5051, -1.7451, -0.3655, 1.0812,
};
//int cqi_to_mcs[16]={0, 0, 1, 3, 5, 7, 9, 13, 15, 16, 20, 23, 25, 27, 27, 27};
const int cqi_to_mcs[16]= {0, 0, 1, 2, 4, 6, 8, 11, 13, 16, 18, 20, 23, 25, 27, 28};
const int cqi_to_mcs[16]= {0, 0, 1, 2, 4, 6, 8, 11, 13, 16, 18, 20, 23, 25, 27, 27};
//for SNR to MI conversion 7 th order Polynomial coeff
const double q_qam16[8]= {3.21151853033897e-10,5.55435952230651e-09,-2.30760065362117e-07,-6.25587743817859e-06,4.62251036452795e-06,0.00224150813158937,0.0393723140344367,0.245486379182639};
+1 -1
View File
@@ -84,7 +84,7 @@ const double sinr_to_cqi[4][16]= { {-2.5051, -2.5051, -1.7451, -0.3655, 1.0812,
};
//int cqi_to_mcs[16]={0, 0, 1, 3, 5, 7, 9, 13, 15, 16, 20, 23, 25, 27, 27, 27};
const int cqi_to_mcs[16]= {0, 0, 1, 2, 4, 6, 8, 11, 13, 16, 18, 20, 23, 25, 27, 28};
const int cqi_to_mcs[16]= {0, 0, 1, 2, 4, 6, 8, 11, 13, 16, 18, 20, 23, 25, 27, 27};
//for SNR to MI conversion 7 th order Polynomial coeff
const double q_qam16[8]= {3.21151853033897e-10,5.55435952230651e-09,-2.30760065362117e-07,-6.25587743817859e-06,4.62251036452795e-06,0.00224150813158937,0.0393723140344367,0.245486379182639};
+1 -1
View File
@@ -73,7 +73,7 @@ const double sinr_to_cqi[4][16]= { {-2.5051, -2.5051, -1.7451, -0.3655, 1.0812,
};
//int cqi_to_mcs[16]={0, 0, 1, 3, 5, 7, 9, 13, 15, 16, 20, 23, 25, 27, 27, 27};
const int cqi_to_mcs[16]= {0, 0, 1, 2, 4, 6, 8, 11, 13, 16, 18, 20, 23, 25, 27, 28};
const int cqi_to_mcs[16]= {0, 0, 1, 2, 4, 6, 8, 11, 13, 16, 18, 20, 23, 25, 27, 27};
//for SNR to MI conversion 7 th order Polynomial coeff
const double q_qam16[8]= {3.21151853033897e-10,5.55435952230651e-09,-2.30760065362117e-07,-6.25587743817859e-06,4.62251036452795e-06,0.00224150813158937,0.0393723140344367,0.245486379182639};