diff --git a/openair2/LAYER2/NR_MAC_gNB/config.c b/openair2/LAYER2/NR_MAC_gNB/config.c index 95e868d13a..861c392a54 100644 --- a/openair2/LAYER2/NR_MAC_gNB/config.c +++ b/openair2/LAYER2/NR_MAC_gNB/config.c @@ -140,8 +140,8 @@ void process_CellGroup(NR_CellGroupConfig_t *CellGroup, NR_UE_sched_ctrl_t *sche } -void config_common(gNB_MAC_INST *nrmac, int pdsch_AntennaPorts, int pusch_AntennaPorts, NR_ServingCellConfigCommon_t *scc) { - +static void config_common(gNB_MAC_INST *nrmac, int pdsch_AntennaPorts, int pusch_AntennaPorts, NR_ServingCellConfigCommon_t *scc) +{ nfapi_nr_config_request_scf_t *cfg = &nrmac->config[0]; nrmac->common_channels[0].ServingCellConfigCommon = scc; diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c index 2461d9618d..3beaac6c6b 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c @@ -49,17 +49,32 @@ extern RAN_CONTEXT_t RC; extern const uint8_t nr_slots_per_frame[5]; extern uint16_t sl_ahead; +// forward declaration of functions used in this file +static void fill_msg3_pusch_pdu(nfapi_nr_pusch_pdu_t *pusch_pdu, + NR_ServingCellConfigCommon_t *scc, + int round, + int startSymbolAndLength, + rnti_t rnti, + int scs, + int bwp_size, + int bwp_start, + int mappingtype, + int fh, + int msg3_first_rb, + int msg3_nb_rb); +static void nr_fill_rar(uint8_t Mod_idP, NR_RA_t *ra, uint8_t *dlsch_buffer, nfapi_nr_pusch_pdu_t *pusch_pdu); + static const uint8_t DELTA[4] = {2, 3, 4, 6}; static const float ssb_per_rach_occasion[8] = {0.125, 0.25, 0.5, 1, 2, 4, 8}; -int16_t ssb_index_from_prach(module_id_t module_idP, - frame_t frameP, - sub_frame_t slotP, - uint16_t preamble_index, - uint8_t freq_index, - uint8_t symbol) { - +static int16_t ssb_index_from_prach(module_id_t module_idP, + frame_t frameP, + sub_frame_t slotP, + uint16_t preamble_index, + uint8_t freq_index, + uint8_t symbol) +{ gNB_MAC_INST *gNB = RC.nrmac[module_idP]; NR_COMMON_channels_t *cc = &gNB->common_channels[0]; NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon; @@ -399,15 +414,20 @@ void schedule_nr_prach(module_id_t module_idP, frame_t frameP, sub_frame_t slotP } } -void nr_schedule_msg2(uint16_t rach_frame, uint16_t rach_slot, - uint16_t *msg2_frame, uint16_t *msg2_slot, - int mu, NR_ServingCellConfigCommon_t *scc, - frame_type_t frame_type, - uint16_t monitoring_slot_period, - uint16_t monitoring_offset,uint8_t beam_index, - uint8_t num_active_ssb, - int16_t *tdd_beam_association, int sl_ahead){ - +static void nr_schedule_msg2(uint16_t rach_frame, + uint16_t rach_slot, + uint16_t *msg2_frame, + uint16_t *msg2_slot, + int mu, + NR_ServingCellConfigCommon_t *scc, + frame_type_t frame_type, + uint16_t monitoring_slot_period, + uint16_t monitoring_offset, + uint8_t beam_index, + uint8_t num_active_ssb, + int16_t *tdd_beam_association, + int sl_ahead) +{ // preferentially we schedule the msg2 in the mixed slot or in the last dl slot // if they are allowed by search space configuration uint8_t response_window = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.ra_ResponseWindow; @@ -662,50 +682,12 @@ void nr_initiate_ra_proc(module_id_t module_idP, VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_INITIATE_RA_PROC, 0); } -void nr_schedule_RA(module_id_t module_idP, - frame_t frameP, - sub_frame_t slotP, - nfapi_nr_ul_dci_request_t *ul_dci_req, - nfapi_nr_dl_tti_request_t *DL_req, - nfapi_nr_tx_data_request_t *TX_req) -{ - gNB_MAC_INST *mac = RC.nrmac[module_idP]; - - start_meas(&mac->schedule_ra); - for (int CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++) { - NR_COMMON_channels_t *cc = &mac->common_channels[CC_id]; - for (int i = 0; i < NR_NB_RA_PROC_MAX; i++) { - NR_RA_t *ra = &cc->ra[i]; - LOG_D(NR_MAC, "RA[state:%d]\n", ra->state); - switch (ra->state) { - case Msg2: - nr_generate_Msg2(module_idP, CC_id, frameP, slotP, ra, DL_req, TX_req); - break; - case Msg3_retransmission: - nr_generate_Msg3_retransmission(module_idP, CC_id, frameP, slotP, ra, ul_dci_req); - break; - case Msg3_dcch_dtch: - nr_generate_Msg3_dcch_dtch_response(module_idP, CC_id, frameP, slotP, ra, DL_req, TX_req); - case Msg4: - nr_generate_Msg4(module_idP, CC_id, frameP, slotP, ra, DL_req, TX_req); - break; - case WAIT_Msg4_ACK: - nr_check_Msg4_Ack(module_idP, CC_id, frameP, slotP, ra); - break; - default: - break; - } - } - } - stop_meas(&mac->schedule_ra); -} - -void nr_generate_Msg3_retransmission(module_id_t module_idP, - int CC_id, - frame_t frame, - sub_frame_t slot, - NR_RA_t *ra, - nfapi_nr_ul_dci_request_t *ul_dci_req) +static void nr_generate_Msg3_retransmission(module_id_t module_idP, + int CC_id, + frame_t frame, + sub_frame_t slot, + NR_RA_t *ra, + nfapi_nr_ul_dci_request_t *ul_dci_req) { gNB_MAC_INST *nr_mac = RC.nrmac[module_idP]; NR_COMMON_channels_t *cc = &nr_mac->common_channels[CC_id]; @@ -877,15 +859,14 @@ void nr_generate_Msg3_retransmission(module_id_t module_idP, } } -void nr_get_Msg3alloc(module_id_t module_id, - int CC_id, - NR_ServingCellConfigCommon_t *scc, - sub_frame_t current_slot, - frame_t current_frame, - NR_RA_t *ra, - int16_t *tdd_beam_association) +static void nr_get_Msg3alloc(module_id_t module_id, + int CC_id, + NR_ServingCellConfigCommon_t *scc, + sub_frame_t current_slot, + frame_t current_frame, + NR_RA_t *ra, + int16_t *tdd_beam_association) { - // msg3 is scheduled in mixed slot in the following TDD period uint16_t msg3_nb_rb = 8; // sdu has 6 or 8 bytes @@ -999,16 +980,19 @@ void nr_get_Msg3alloc(module_id_t module_id, ra->msg3_bwp_start = bwpStart; } - -void fill_msg3_pusch_pdu(nfapi_nr_pusch_pdu_t *pusch_pdu, - NR_ServingCellConfigCommon_t *scc, - int round, - int startSymbolAndLength, - rnti_t rnti, int scs, - int bwp_size, int bwp_start, - int mappingtype, int fh, - int msg3_first_rb, int msg3_nb_rb) { - +static void fill_msg3_pusch_pdu(nfapi_nr_pusch_pdu_t *pusch_pdu, + NR_ServingCellConfigCommon_t *scc, + int round, + int startSymbolAndLength, + rnti_t rnti, + int scs, + int bwp_size, + int bwp_start, + int mappingtype, + int fh, + int msg3_first_rb, + int msg3_nb_rb) +{ int start_symbol_index,nr_of_symbols; SLIV2SL(startSymbolAndLength, &start_symbol_index, &nr_of_symbols); @@ -1087,7 +1071,7 @@ void fill_msg3_pusch_pdu(nfapi_nr_pusch_pdu_t *pusch_pdu, } } -void nr_add_msg3(module_id_t module_idP, int CC_id, frame_t frameP, sub_frame_t slotP, NR_RA_t *ra, uint8_t *RAR_pdu) +static void nr_add_msg3(module_id_t module_idP, int CC_id, frame_t frameP, sub_frame_t slotP, NR_RA_t *ra, uint8_t *RAR_pdu) { gNB_MAC_INST *mac = RC.nrmac[module_idP]; NR_COMMON_channels_t *cc = &mac->common_channels[CC_id]; @@ -1155,13 +1139,14 @@ void nr_add_msg3(module_id_t module_idP, int CC_id, frame_t frameP, sub_frame_t nr_fill_rar(module_idP, ra, RAR_pdu, pusch_pdu); } -void nr_generate_Msg2(module_id_t module_idP, - int CC_id, - frame_t frameP, - sub_frame_t slotP, - NR_RA_t *ra, - nfapi_nr_dl_tti_request_t *DL_req, - nfapi_nr_tx_data_request_t *TX_req) + +static void nr_generate_Msg2(module_id_t module_idP, + int CC_id, + frame_t frameP, + sub_frame_t slotP, + NR_RA_t *ra, + nfapi_nr_dl_tti_request_t *DL_req, + nfapi_nr_tx_data_request_t *TX_req) { gNB_MAC_INST *nr_mac = RC.nrmac[module_idP]; NR_COMMON_channels_t *cc = &nr_mac->common_channels[CC_id]; @@ -1427,22 +1412,29 @@ void nr_generate_Msg2(module_id_t module_idP, } } -void prepare_dl_pdus(gNB_MAC_INST *nr_mac, - NR_RA_t *ra, - NR_UE_DL_BWP_t *dl_bwp, - nfapi_nr_dl_tti_request_body_t *dl_req, - NR_sched_pucch_t *pucch, - NR_pdsch_dmrs_t dmrs_info, - NR_tda_info_t tda, - int aggregation_level, - int CCEIndex, - int tb_size, int ndi, - int tpc, int delta_PRI, - int current_harq_pid, - int time_domain_assignment, - int CC_id, int rnti, int round, - int mcsIndex, int tb_scaling, - int pduindex, int rbStart, int rbSize) +static void prepare_dl_pdus(gNB_MAC_INST *nr_mac, + NR_RA_t *ra, + NR_UE_DL_BWP_t *dl_bwp, + nfapi_nr_dl_tti_request_body_t *dl_req, + NR_sched_pucch_t *pucch, + NR_pdsch_dmrs_t dmrs_info, + NR_tda_info_t tda, + int aggregation_level, + int CCEIndex, + int tb_size, + int ndi, + int tpc, + int delta_PRI, + int current_harq_pid, + int time_domain_assignment, + int CC_id, + int rnti, + int round, + int mcsIndex, + int tb_scaling, + int pduindex, + int rbStart, + int rbSize) { // look up the PDCCH PDU for this CC, BWP, and CORESET. If it does not exist, create it. This is especially // important if we have multiple RAs, and the DLSCH has to reuse them, so we need to mark them @@ -1613,13 +1605,13 @@ void prepare_dl_pdus(gNB_MAC_INST *nr_mac, LOG_D(NR_MAC,"numDlDci: %i\n", pdcch_pdu_rel15->numDlDci); } -void nr_generate_Msg3_dcch_dtch_response(module_id_t module_idP, - int CC_id, - frame_t frameP, - sub_frame_t slotP, - NR_RA_t *ra, - nfapi_nr_dl_tti_request_t *DL_req, - nfapi_nr_tx_data_request_t *TX_req) +static void nr_generate_Msg3_dcch_dtch_response(module_id_t module_idP, + int CC_id, + frame_t frameP, + sub_frame_t slotP, + NR_RA_t *ra, + nfapi_nr_dl_tti_request_t *DL_req, + nfapi_nr_tx_data_request_t *TX_req) { gNB_MAC_INST *nr_mac = RC.nrmac[module_idP]; @@ -1799,13 +1791,13 @@ void nr_generate_Msg3_dcch_dtch_response(module_id_t module_idP, sched_ctrl->ul_failure = 0; } -void nr_generate_Msg4(module_id_t module_idP, - int CC_id, - frame_t frameP, - sub_frame_t slotP, - NR_RA_t *ra, - nfapi_nr_dl_tti_request_t *DL_req, - nfapi_nr_tx_data_request_t *TX_req) +static void nr_generate_Msg4(module_id_t module_idP, + int CC_id, + frame_t frameP, + sub_frame_t slotP, + NR_RA_t *ra, + nfapi_nr_dl_tti_request_t *DL_req, + nfapi_nr_tx_data_request_t *TX_req) { gNB_MAC_INST *nr_mac = RC.nrmac[module_idP]; NR_COMMON_channels_t *cc = &nr_mac->common_channels[CC_id]; @@ -2056,8 +2048,8 @@ void nr_generate_Msg4(module_id_t module_idP, } } -void nr_check_Msg4_Ack(module_id_t module_id, int CC_id, frame_t frame, sub_frame_t slot, NR_RA_t *ra) { - +static void nr_check_Msg4_Ack(module_id_t module_id, int CC_id, frame_t frame, sub_frame_t slot, NR_RA_t *ra) +{ NR_UE_info_t *UE = find_nr_UE(&RC.nrmac[module_id]->UE_info, ra->rnti); const int current_harq_pid = ra->harq_pid; @@ -2141,11 +2133,8 @@ void nr_clear_ra_proc(module_id_t module_idP, int CC_id, frame_t frameP, NR_RA_t // - sending only 1 RAR subPDU // - UL Grant: hardcoded CSI, TPC, time alloc // - padding -void nr_fill_rar(uint8_t Mod_idP, - NR_RA_t * ra, - uint8_t * dlsch_buffer, - nfapi_nr_pusch_pdu_t *pusch_pdu){ - +static void nr_fill_rar(uint8_t Mod_idP, NR_RA_t *ra, uint8_t *dlsch_buffer, nfapi_nr_pusch_pdu_t *pusch_pdu) +{ LOG_D(NR_MAC, "[gNB] Generate RAR MAC PDU frame %d slot %d preamble index %u TA command %d \n", ra->Msg2_frame, ra-> Msg2_slot, ra->preamble_index, ra->timing_offset); NR_RA_HEADER_BI *rarbi = (NR_RA_HEADER_BI *) dlsch_buffer; NR_RA_HEADER_RAPID *rarh = (NR_RA_HEADER_RAPID *) (dlsch_buffer + 1); @@ -2239,3 +2228,41 @@ void nr_fill_rar(uint8_t Mod_idP, csi_req, t_crnti); } + +void nr_schedule_RA(module_id_t module_idP, + frame_t frameP, + sub_frame_t slotP, + nfapi_nr_ul_dci_request_t *ul_dci_req, + nfapi_nr_dl_tti_request_t *DL_req, + nfapi_nr_tx_data_request_t *TX_req) +{ + gNB_MAC_INST *mac = RC.nrmac[module_idP]; + + start_meas(&mac->schedule_ra); + for (int CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++) { + NR_COMMON_channels_t *cc = &mac->common_channels[CC_id]; + for (int i = 0; i < NR_NB_RA_PROC_MAX; i++) { + NR_RA_t *ra = &cc->ra[i]; + LOG_D(NR_MAC, "RA[state:%d]\n", ra->state); + switch (ra->state) { + case Msg2: + nr_generate_Msg2(module_idP, CC_id, frameP, slotP, ra, DL_req, TX_req); + break; + case Msg3_retransmission: + nr_generate_Msg3_retransmission(module_idP, CC_id, frameP, slotP, ra, ul_dci_req); + break; + case Msg3_dcch_dtch: + nr_generate_Msg3_dcch_dtch_response(module_idP, CC_id, frameP, slotP, ra, DL_req, TX_req); + case Msg4: + nr_generate_Msg4(module_idP, CC_id, frameP, slotP, ra, DL_req, TX_req); + break; + case WAIT_Msg4_ACK: + nr_check_Msg4_Ack(module_idP, CC_id, frameP, slotP, ra); + break; + default: + break; + } + } + } + stop_meas(&mac->schedule_ra); +} diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c index f6d1f83e35..bc5710e2ec 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c @@ -51,11 +51,15 @@ extern RAN_CONTEXT_t RC; -void schedule_ssb(frame_t frame, sub_frame_t slot, - NR_ServingCellConfigCommon_t *scc, - nfapi_nr_dl_tti_request_body_t *dl_req, - int i_ssb, uint8_t scoffset, uint16_t offset_pointa, uint32_t payload) { - +static void schedule_ssb(frame_t frame, + sub_frame_t slot, + NR_ServingCellConfigCommon_t *scc, + nfapi_nr_dl_tti_request_body_t *dl_req, + int i_ssb, + uint8_t scoffset, + uint16_t offset_pointa, + uint32_t payload) +{ uint8_t beam_index = 0; nfapi_nr_dl_tti_request_pdu_t *dl_config_pdu = &dl_req->dl_tti_pdu_list[dl_req->nPDUs]; memset((void *) dl_config_pdu, 0,sizeof(nfapi_nr_dl_tti_request_pdu_t)); @@ -86,7 +90,19 @@ void schedule_ssb(frame_t frame, sub_frame_t slot, dl_req->nPDUs++; LOG_D(MAC,"Scheduling ssb %d at frame %d and slot %d\n",i_ssb,frame,slot); +} +static void fill_ssb_vrb_map(NR_COMMON_channels_t *cc, int rbStart, int ssb_subcarrier_offset, uint16_t symStart, int CC_id) +{ + AssertFatal(*cc->ServingCellConfigCommon->ssbSubcarrierSpacing != + NR_SubcarrierSpacing_kHz240, + "240kHZ subcarrier won't work with current VRB map because a single SSB might be across 2 slots\n"); + + uint16_t *vrb_map = cc[CC_id].vrb_map; + + const int extra_prb = ssb_subcarrier_offset > 0; + for (int rb = 0; rb < 20+extra_prb; rb++) + vrb_map[rbStart + rb] = SL_to_bitmap(symStart, 4); } void schedule_nr_mib(module_id_t module_idP, frame_t frameP, sub_frame_t slotP, nfapi_nr_dl_tti_request_t *DL_req) @@ -254,33 +270,15 @@ void schedule_nr_mib(module_id_t module_idP, frame_t frameP, sub_frame_t slotP, } } -void schedule_nr_SI(module_id_t module_idP, frame_t frameP, sub_frame_t subframeP) { -//---------------------------------------- -} - -void fill_ssb_vrb_map (NR_COMMON_channels_t *cc, int rbStart, int ssb_subcarrier_offset, uint16_t symStart, int CC_id) { - - AssertFatal(*cc->ServingCellConfigCommon->ssbSubcarrierSpacing != - NR_SubcarrierSpacing_kHz240, - "240kHZ subcarrier won't work with current VRB map because a single SSB might be across 2 slots\n"); - - uint16_t *vrb_map = cc[CC_id].vrb_map; - - const int extra_prb = ssb_subcarrier_offset > 0; - for (int rb = 0; rb < 20+extra_prb; rb++) - vrb_map[rbStart + rb] = SL_to_bitmap(symStart, 4); - -} - -uint32_t schedule_control_sib1(module_id_t module_id, - int CC_id, - NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config, - int time_domain_allocation, - NR_pdsch_dmrs_t *dmrs_parms, - NR_tda_info_t *tda_info, - uint8_t candidate_idx, - uint16_t num_total_bytes) { - +static uint32_t schedule_control_sib1(module_id_t module_id, + int CC_id, + NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config, + int time_domain_allocation, + NR_pdsch_dmrs_t *dmrs_parms, + NR_tda_info_t *tda_info, + uint8_t candidate_idx, + uint16_t num_total_bytes) +{ gNB_MAC_INST *gNB_mac = RC.nrmac[module_id]; NR_COMMON_channels_t *cc = &gNB_mac->common_channels[CC_id]; NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon; @@ -377,14 +375,14 @@ uint32_t schedule_control_sib1(module_id_t module_id, return TBS; } -void nr_fill_nfapi_dl_sib1_pdu(int Mod_idP, - nfapi_nr_dl_tti_request_body_t *dl_req, - int pdu_index, - NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config, - uint32_t TBS, - int StartSymbolIndex, - int NrOfSymbols) { - +static void nr_fill_nfapi_dl_sib1_pdu(int Mod_idP, + nfapi_nr_dl_tti_request_body_t *dl_req, + int pdu_index, + NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config, + uint32_t TBS, + int StartSymbolIndex, + int NrOfSymbols) +{ gNB_MAC_INST *gNB_mac = RC.nrmac[Mod_idP]; NR_COMMON_channels_t *cc = gNB_mac->common_channels; NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon; diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c index 71b4499c55..846a7a35f0 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c @@ -311,10 +311,8 @@ int nr_write_ce_dlsch_pdu(module_id_t module_idP, return offset; } -void nr_store_dlsch_buffer(module_id_t module_id, - frame_t frame, - sub_frame_t slot) { - +static void nr_store_dlsch_buffer(module_id_t module_id, frame_t frame, sub_frame_t slot) +{ UE_iterator(RC.nrmac[module_id]->UE_info.list, UE) { NR_UE_sched_ctrl_t *sched_ctrl = &UE->UE_sched_ctrl; sched_ctrl->num_total_bytes = 0; @@ -375,13 +373,13 @@ void abort_nr_dl_harq(NR_UE_info_t* UE, int8_t harq_pid) { } -bool allocate_dl_retransmission(module_id_t module_id, - frame_t frame, - sub_frame_t slot, - uint16_t *rballoc_mask, - int *n_rb_sched, - NR_UE_info_t *UE, - int current_harq_pid) +static bool allocate_dl_retransmission(module_id_t module_id, + frame_t frame, + sub_frame_t slot, + uint16_t *rballoc_mask, + int *n_rb_sched, + NR_UE_info_t *UE, + int current_harq_pid) { int CC_id = 0; @@ -549,15 +547,14 @@ static int comparator(const void *p, const void *q) { return ((UEsched_t*)p)->coef < ((UEsched_t*)q)->coef; } -void pf_dl(module_id_t module_id, - frame_t frame, - sub_frame_t slot, - NR_UE_info_t **UE_list, - int max_num_ue, - int n_rb_sched, - uint16_t *rballoc_mask) +static void pf_dl(module_id_t module_id, + frame_t frame, + sub_frame_t slot, + NR_UE_info_t **UE_list, + int max_num_ue, + int n_rb_sched, + uint16_t *rballoc_mask) { - gNB_MAC_INST *mac = RC.nrmac[module_id]; NR_ServingCellConfigCommon_t *scc=mac->common_channels[0].ServingCellConfigCommon; // UEs that could be scheduled @@ -784,7 +781,7 @@ void pf_dl(module_id_t module_id, } } -void nr_fr1_dlsch_preprocessor(module_id_t module_id, frame_t frame, sub_frame_t slot) +static void nr_fr1_dlsch_preprocessor(module_id_t module_id, frame_t frame, sub_frame_t slot) { NR_UEs_t *UE_info = &RC.nrmac[module_id]->UE_info; diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c index 0deb86a5db..411a9609c1 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c @@ -509,7 +509,7 @@ void fill_pdcch_vrb_map(gNB_MAC_INST *mac, } } -bool multiple_2_3_5(int rb) +static bool multiple_2_3_5(int rb) { while (rb % 2 == 0) rb /= 2; diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_srs.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_srs.c index 8a85448c7f..fd11023387 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_srs.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_srs.c @@ -42,7 +42,8 @@ const uint16_t m_SRS[64] = { 4, 8, 12, 16, 16, 20, 24, 24, 28, 32, 36, 40, 48, 4 160, 160, 168, 176, 184, 192, 192, 192, 192, 208, 216, 224, 240, 240, 240, 240, 256, 256, 256, 264, 272, 272, 272 }; -uint32_t max4(uint32_t a, uint32_t b,uint32_t c,uint32_t d) { +static uint32_t max4(uint32_t a, uint32_t b, uint32_t c, uint32_t d) +{ int x = max(a, b); x = max(x, c); x = max(x, d); @@ -137,7 +138,14 @@ void nr_srs_ri_computation(const nfapi_nr_srs_normalized_channel_iq_matrix_t *nr } -void nr_configure_srs(nfapi_nr_srs_pdu_t *srs_pdu, int slot, int module_id, int CC_id, NR_UE_info_t *UE, NR_SRS_ResourceSet_t *srs_resource_set, NR_SRS_Resource_t *srs_resource, int buffer_index) +static void nr_configure_srs(nfapi_nr_srs_pdu_t *srs_pdu, + int slot, + int module_id, + int CC_id, + NR_UE_info_t *UE, + NR_SRS_ResourceSet_t *srs_resource_set, + NR_SRS_Resource_t *srs_resource, + int buffer_index) { NR_UE_UL_BWP_t *current_BWP = &UE->current_UL_BWP; @@ -196,7 +204,13 @@ void nr_configure_srs(nfapi_nr_srs_pdu_t *srs_pdu, int slot, int module_id, int vrb_map_UL[i + srs_pdu->bwp_start] |= mask; } -void nr_fill_nfapi_srs(int module_id, int CC_id, NR_UE_info_t* UE, int frame, int slot, NR_SRS_ResourceSet_t *srs_resource_set, NR_SRS_Resource_t *srs_resource) +static void nr_fill_nfapi_srs(int module_id, + int CC_id, + NR_UE_info_t *UE, + int frame, + int slot, + NR_SRS_ResourceSet_t *srs_resource_set, + NR_SRS_Resource_t *srs_resource) { int index = ul_buffer_index(frame, slot, UE->current_UL_BWP.scs, RC.nrmac[module_id]->UL_tti_req_ahead_size); diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c index bc1796a6dc..d7ff3c962b 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c @@ -144,7 +144,7 @@ static const int diff_rsrp_ssb_csi_meas_10_1_6_1_2[16] = { -30 // 10 - 15 }; -int get_pucch_index(int frame, int slot, int n_slots_frame, const NR_TDD_UL_DL_Pattern_t *tdd, int sched_pucch_size) +static int get_pucch_index(int frame, int slot, int n_slots_frame, const NR_TDD_UL_DL_Pattern_t *tdd, int sched_pucch_size) { // PUCCH structures are indexed by slot in the PUCCH period determined by sched_pucch_size number of UL slots // this functions return the index to the structure for slot passed to the function @@ -324,8 +324,8 @@ static void handle_dl_harq(NR_UE_info_t * UE, } } -int checkTargetSSBInFirst64TCIStates_pdschConfig(int ssb_index_t, NR_UE_info_t * UE) { - +static int checkTargetSSBInFirst64TCIStates_pdschConfig(int ssb_index_t, NR_UE_info_t *UE) +{ const NR_PDSCH_Config_t *pdsch_Config = UE->current_DL_BWP.pdsch_Config; int nb_tci_states = pdsch_Config ? pdsch_Config->tci_StatesToAddModList->list.count : 0; NR_TCI_State_t *tci =NULL; @@ -350,8 +350,8 @@ int checkTargetSSBInFirst64TCIStates_pdschConfig(int ssb_index_t, NR_UE_info_t * return -1; } -int checkTargetSSBInTCIStates_pdcchConfig(int ssb_index_t, NR_UE_info_t *UE) { - +static int checkTargetSSBInTCIStates_pdcchConfig(int ssb_index_t, NR_UE_info_t *UE) +{ NR_TCI_State_t *tci =NULL; NR_TCI_StateId_t *tci_id = NULL; NR_UE_sched_ctrl_t *sched_ctrl = &UE->UE_sched_ctrl; @@ -390,7 +390,8 @@ int checkTargetSSBInTCIStates_pdcchConfig(int ssb_index_t, NR_UE_info_t *UE) { } //returns the measured RSRP value (upper limit) -int get_measured_rsrp(uint8_t index) { +static int get_measured_rsrp(uint8_t index) +{ //if index is invalid returning minimum rsrp -140 if(index <= 15 || index >= 114) return MIN_RSRP_VALUE; @@ -399,7 +400,7 @@ int get_measured_rsrp(uint8_t index) { } //returns the differential RSRP value (upper limit) -int get_diff_rsrp(uint8_t index, int strongest_rsrp) { +static int get_diff_rsrp(uint8_t index, int strongest_rsrp) { if(strongest_rsrp != -1) { return strongest_rsrp + diff_rsrp_ssb_csi_meas_10_1_6_1_2[index]; } else @@ -409,8 +410,8 @@ int get_diff_rsrp(uint8_t index, int strongest_rsrp) { //identifies the target SSB Beam index //keeps the required date for PDCCH and PDSCH TCI state activation/deactivation CE consutruction globally //handles triggering of PDCCH and PDSCH MAC CEs -void tci_handling(NR_UE_info_t *UE, frame_t frame, slot_t slot) { - +static void tci_handling(NR_UE_info_t *UE, frame_t frame, slot_t slot) +{ int strongest_ssb_rsrp = 0; int cqi_idx = 0; int curr_ssb_beam_index = 0; //ToDo: yet to know how to identify the serving ssb beam index @@ -583,24 +584,23 @@ void tci_handling(NR_UE_info_t *UE, frame_t frame, slot_t slot) { } }//tci_presentInDCI }//is-triggering_beam_switch -}//tci handling +} // tci handling - -uint8_t pickandreverse_bits(uint8_t *payload, uint16_t bitlen, uint8_t start_bit) { +static uint8_t pickandreverse_bits(uint8_t *payload, uint16_t bitlen, uint8_t start_bit) +{ uint8_t rev_bits = 0; for (int i=0; i>((start_bit+i)%8))&0x01)<<(bitlen-i-1); return rev_bits; } - -void evaluate_rsrp_report(NR_UE_info_t *UE, - NR_UE_sched_ctrl_t *sched_ctrl, - uint8_t csi_report_id, - uint8_t *payload, - int *cumul_bits, - NR_CSI_ReportConfig__reportQuantity_PR reportQuantity_type){ - +static void evaluate_rsrp_report(NR_UE_info_t *UE, + NR_UE_sched_ctrl_t *sched_ctrl, + uint8_t csi_report_id, + uint8_t *payload, + int *cumul_bits, + NR_CSI_ReportConfig__reportQuantity_PR reportQuantity_type) +{ nr_csi_report_t *csi_report = &UE->csi_report_template[csi_report_id]; uint8_t cri_ssbri_bitlen = csi_report->CSI_report_bitlen.cri_ssbri_bitlen; uint16_t curr_payload; @@ -659,21 +659,18 @@ void evaluate_rsrp_report(NR_UE_info_t *UE, stats->num_rsrp_meas++; } -void evaluate_cri_report(uint8_t *payload, - uint8_t cri_bitlen, - int cumul_bits, - NR_UE_sched_ctrl_t *sched_ctrl){ - +static void evaluate_cri_report(uint8_t *payload, uint8_t cri_bitlen, int cumul_bits, NR_UE_sched_ctrl_t *sched_ctrl) +{ uint8_t temp_cri = pickandreverse_bits(payload, cri_bitlen, cumul_bits); sched_ctrl->CSI_report.cri_ri_li_pmi_cqi_report.cri = temp_cri; } -int evaluate_ri_report(uint8_t *payload, - uint8_t ri_bitlen, - uint8_t ri_restriction, - int cumul_bits, - NR_UE_sched_ctrl_t *sched_ctrl){ - +static int evaluate_ri_report(uint8_t *payload, + uint8_t ri_bitlen, + uint8_t ri_restriction, + int cumul_bits, + NR_UE_sched_ctrl_t *sched_ctrl) +{ uint8_t ri_index = pickandreverse_bits(payload, ri_bitlen, cumul_bits); int count=0; for (int i=0; i<8; i++) { @@ -689,13 +686,12 @@ int evaluate_ri_report(uint8_t *payload, AssertFatal(1==0, "Decoded ri %d does not correspond to any valid value in ri_restriction %d\n",ri_index,ri_restriction); } - -void evaluate_cqi_report(uint8_t *payload, - nr_csi_report_t *csi_report, - int cumul_bits, - uint8_t ri, - NR_UE_info_t *UE, - uint8_t cqi_Table) +static void evaluate_cqi_report(uint8_t *payload, + nr_csi_report_t *csi_report, + int cumul_bits, + uint8_t ri, + NR_UE_info_t *UE, + uint8_t cqi_Table) { NR_UE_sched_ctrl_t *sched_ctrl = &UE->UE_sched_ctrl; @@ -723,13 +719,12 @@ void evaluate_cqi_report(uint8_t *payload, sched_ctrl->dl_max_mcs = get_mcs_from_cqi(mcs_table, cqi_Table, cqi_idx); } - -uint8_t evaluate_pmi_report(uint8_t *payload, - nr_csi_report_t *csi_report, - int cumul_bits, - uint8_t ri, - NR_UE_sched_ctrl_t *sched_ctrl){ - +static uint8_t evaluate_pmi_report(uint8_t *payload, + nr_csi_report_t *csi_report, + int cumul_bits, + uint8_t ri, + NR_UE_sched_ctrl_t *sched_ctrl) +{ int x1_bitlen = csi_report->csi_meas_bitlen.pmi_x1_bitlen[ri]; int x2_bitlen = csi_report->csi_meas_bitlen.pmi_x2_bitlen[ri]; int tot_bitlen = x1_bitlen + x2_bitlen; @@ -744,16 +739,14 @@ uint8_t evaluate_pmi_report(uint8_t *payload, sched_ctrl->CSI_report.cri_ri_li_pmi_cqi_report.pmi_x2); return tot_bitlen; - } - -int evaluate_li_report(uint8_t *payload, - nr_csi_report_t *csi_report, - int cumul_bits, - uint8_t ri, - NR_UE_sched_ctrl_t *sched_ctrl){ - +static int evaluate_li_report(uint8_t *payload, + nr_csi_report_t *csi_report, + int cumul_bits, + uint8_t ri, + NR_UE_sched_ctrl_t *sched_ctrl) +{ int li_bitlen = csi_report->csi_meas_bitlen.li_bitlen[ri]; if (li_bitlen>0) { @@ -762,14 +755,10 @@ int evaluate_li_report(uint8_t *payload, sched_ctrl->CSI_report.cri_ri_li_pmi_cqi_report.li = temp_li; } return li_bitlen; - } -void skip_zero_padding(int *cumul_bits, - nr_csi_report_t *csi_report, - uint8_t ri, - uint16_t max_bitlen) { - +static void skip_zero_padding(int *cumul_bits, nr_csi_report_t *csi_report, uint8_t ri, uint16_t max_bitlen) +{ // actual number of reported bits depends on the reported rank // zero padding bits are added to have a predetermined max bit length to decode @@ -783,13 +772,12 @@ void skip_zero_padding(int *cumul_bits, *cumul_bits+=(max_bitlen-reported_bitlen); } - -void extract_pucch_csi_report(NR_CSI_MeasConfig_t *csi_MeasConfig, - const nfapi_nr_uci_pucch_pdu_format_2_3_4_t *uci_pdu, - frame_t frame, - slot_t slot, - NR_UE_info_t *UE, - NR_ServingCellConfigCommon_t *scc) +static void extract_pucch_csi_report(NR_CSI_MeasConfig_t *csi_MeasConfig, + const nfapi_nr_uci_pucch_pdu_format_2_3_4_t *uci_pdu, + frame_t frame, + slot_t slot, + NR_UE_info_t *UE, + NR_ServingCellConfigCommon_t *scc) { /** From Table 6.3.1.1.2-3: RI, LI, CQI, and CRI of codebookType=typeI-SinglePanel */ uint8_t *payload = uci_pdu->csi_part1.csi_part1_payload; @@ -1031,7 +1019,7 @@ void handle_nr_uci_pucch_2_3_4(module_id_t mod_id, } } -void set_pucch_allocation(const NR_UE_UL_BWP_t *ul_bwp, const int r_pucch, const int bwp_size, NR_sched_pucch_t *pucch) +static void set_pucch_allocation(const NR_UE_UL_BWP_t *ul_bwp, const int r_pucch, const int bwp_size, NR_sched_pucch_t *pucch) { if(r_pucch<0){ const NR_PUCCH_Resource_t *resource = ul_bwp->pucch_Config->resourceToAddModList->list.array[0]; @@ -1053,11 +1041,8 @@ void set_pucch_allocation(const NR_UE_UL_BWP_t *ul_bwp, const int r_pucch, const } } -bool test_pucch0_vrb_occupation(const NR_sched_pucch_t *pucch, - uint16_t *vrb_map_UL, - const int bwp_start, - const int bwp_size) { - +static bool test_pucch0_vrb_occupation(const NR_sched_pucch_t *pucch, uint16_t *vrb_map_UL, const int bwp_start, const int bwp_size) +{ // We assume initial cyclic shift is always 0 so different pucch resources can't overlap // verifying occupation of PRBs for ACK/NACK on dedicated pucch @@ -1076,9 +1061,7 @@ bool test_pucch0_vrb_occupation(const NR_sched_pucch_t *pucch, return true; } -void set_pucch0_vrb_occupation(const NR_sched_pucch_t *pucch, - uint16_t *vrb_map_UL, - const int bwp_start) +static void set_pucch0_vrb_occupation(const NR_sched_pucch_t *pucch, uint16_t *vrb_map_UL, const int bwp_start) { for (int l=0; lnr_of_symb; l++) { uint16_t symb = SL_to_bitmap(pucch->start_symb+l, 1); diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c index e1a4e716ef..a7ed11e8f6 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c @@ -61,14 +61,8 @@ const int get_ul_tda(gNB_MAC_INST *nrmac, const NR_ServingCellConfigCommon_t *sc return 0; // if FDD or not mixed slot in TDD, for now use default TDA (TODO handle CSI-RS slots) } -int compute_ph_factor(int mu, - int tbs_bits, - int rb, - int n_layers, - int n_symbols, - int n_dmrs, - long *deltaMCS) { - +static int compute_ph_factor(int mu, int tbs_bits, int rb, int n_layers, int n_symbols, int n_dmrs, long *deltaMCS) +{ // 38.213 7.1.1 // if the PUSCH transmission is over more than one layer delta_tf = 0 int delta_tf = 0; @@ -109,14 +103,14 @@ int compute_ph_factor(int mu, // F: length of L is 0:8 or 1:16 bits wide // R: Reserved bit, set to zero. -int nr_process_mac_pdu(instance_t module_idP, - NR_UE_info_t* UE, - uint8_t CC_id, - frame_t frameP, - sub_frame_t slot, - uint8_t *pduP, - int pdu_len, - const int8_t harq_pid) +static int nr_process_mac_pdu(instance_t module_idP, + NR_UE_info_t *UE, + uint8_t CC_id, + frame_t frameP, + sub_frame_t slot, + uint8_t *pduP, + int pdu_len, + const int8_t harq_pid) { uint8_t done = 0; @@ -462,7 +456,7 @@ int nr_process_mac_pdu(instance_t module_idP, return 0; } -void abort_nr_ul_harq(NR_UE_info_t *UE, int8_t harq_pid) +static void abort_nr_ul_harq(NR_UE_info_t *UE, int8_t harq_pid) { NR_UE_sched_ctrl_t *sched_ctrl = &UE->UE_sched_ctrl; NR_UE_ul_harq_t *harq = &sched_ctrl->ul_harq_processes[harq_pid]; @@ -479,7 +473,7 @@ void abort_nr_ul_harq(NR_UE_info_t *UE, int8_t harq_pid) sched_ctrl->sched_ul_bytes = 0; } -bool get_UE_waiting_CFRA_msg3(const gNB_MAC_INST *gNB_mac, const int CC_id, const frame_t frame, const sub_frame_t slot) +static bool get_UE_waiting_CFRA_msg3(const gNB_MAC_INST *gNB_mac, const int CC_id, const frame_t frame, const sub_frame_t slot) { bool UE_waiting_CFRA_msg3 = false; for (int i = 0; i < NR_NB_RA_PROC_MAX; i++) { @@ -841,8 +835,8 @@ void nr_rx_sdu(const module_id_t gnb_mod_idP, } } -uint32_t calc_power_complex(const int16_t *x, const int16_t *y, const uint32_t size) { - +static uint32_t calc_power_complex(const int16_t *x, const int16_t *y, const uint32_t size) +{ // Real part value int64_t sum_x = 0; int64_t sum_x2 = 0; @@ -864,7 +858,8 @@ uint32_t calc_power_complex(const int16_t *x, const int16_t *y, const uint32_t s return power_re+power_im; } -c16_t nr_h_times_w(c16_t h, char w) { +static c16_t nr_h_times_w(c16_t h, char w) +{ c16_t output; switch (w) { case '0': // 0 @@ -893,11 +888,11 @@ c16_t nr_h_times_w(c16_t h, char w) { return output; } -uint8_t get_max_tpmi(const NR_PUSCH_Config_t *pusch_Config, - const uint16_t num_ue_srs_ports, - const uint8_t *nrOfLayers, - int *additional_max_tpmi) { - +static uint8_t get_max_tpmi(const NR_PUSCH_Config_t *pusch_Config, + const uint16_t num_ue_srs_ports, + const uint8_t *nrOfLayers, + int *additional_max_tpmi) +{ uint8_t max_tpmi = 0; if ((pusch_Config && pusch_Config->txConfig != NULL && *pusch_Config->txConfig == NR_PUSCH_Config__txConfig_nonCodebook) || @@ -1056,13 +1051,13 @@ uint8_t get_max_tpmi(const NR_PUSCH_Config_t *pusch_Config, return max_tpmi; } -void get_precoder_matrix_coef(char *w, - const uint8_t ul_ri, - const uint16_t num_ue_srs_ports, - const long transform_precoding, - const uint8_t tpmi, - const uint8_t uI, - int layer_idx) +static void get_precoder_matrix_coef(char *w, + const uint8_t ul_ri, + const uint16_t num_ue_srs_ports, + const long transform_precoding, + const uint8_t tpmi, + const uint8_t uI, + int layer_idx) { if (ul_ri == 0) { if (num_ue_srs_ports == 2) { @@ -1085,15 +1080,16 @@ void get_precoder_matrix_coef(char *w, } } -int nr_srs_tpmi_estimation(const NR_PUSCH_Config_t *pusch_Config, - const long transform_precoding, - const uint8_t *channel_matrix, - const uint8_t normalized_iq_representation, - const uint16_t num_gnb_antenna_elements, - const uint16_t num_ue_srs_ports, - const uint16_t prg_size, - const uint16_t num_prgs, - const uint8_t ul_ri) { +static int nr_srs_tpmi_estimation(const NR_PUSCH_Config_t *pusch_Config, + const long transform_precoding, + const uint8_t *channel_matrix, + const uint8_t normalized_iq_representation, + const uint16_t num_gnb_antenna_elements, + const uint16_t num_ue_srs_ports, + const uint16_t prg_size, + const uint16_t num_prgs, + const uint8_t ul_ri) +{ if (ul_ri > 1) { LOG_D(NR_MAC, "TPMI computation for ul_ri %i is not implemented yet!\n", ul_ri); return 0; @@ -1363,7 +1359,7 @@ static bool nr_UE_is_to_be_scheduled(const NR_ServingCellConfigCommon_t *scc, in return has_data || sched_ctrl->SR || high_inactivity; } -void update_ul_ue_R_Qm(int mcs, int mcs_table, const NR_PUSCH_Config_t *pusch_Config, uint16_t *R, uint8_t *Qm) +static void update_ul_ue_R_Qm(int mcs, int mcs_table, const NR_PUSCH_Config_t *pusch_Config, uint16_t *R, uint8_t *Qm) { *R = nr_get_code_rate_ul(mcs, mcs_table); *Qm = nr_get_Qm_ul(mcs, mcs_table); @@ -1374,7 +1370,14 @@ void update_ul_ue_R_Qm(int mcs, int mcs_table, const NR_PUSCH_Config_t *pusch_Co } } -void nr_ue_max_mcs_min_rb(int mu, int ph_limit, NR_sched_pusch_t *sched_pusch, NR_UE_UL_BWP_t *ul_bwp, uint16_t minRb, uint32_t tbs, uint16_t *Rb, uint8_t *mcs) +static void nr_ue_max_mcs_min_rb(int mu, + int ph_limit, + NR_sched_pusch_t *sched_pusch, + NR_UE_UL_BWP_t *ul_bwp, + uint16_t minRb, + uint32_t tbs, + uint16_t *Rb, + uint8_t *mcs) { AssertFatal(*Rb >= minRb, "illegal Rb %d < minRb %d\n", *Rb, minRb); AssertFatal(*mcs >= 0 && *mcs <= 28, "illegal MCS %d\n", *mcs); @@ -1577,13 +1580,13 @@ static int comparator(const void *p, const void *q) { return ((UEsched_t*)p)->coef < ((UEsched_t*)q)->coef; } -void pf_ul(module_id_t module_id, - frame_t frame, - sub_frame_t slot, - NR_UE_info_t *UE_list[], - int max_num_ue, - int n_rb_sched, - uint16_t *rballoc_mask) +static void pf_ul(module_id_t module_id, + frame_t frame, + sub_frame_t slot, + NR_UE_info_t *UE_list[], + int max_num_ue, + int n_rb_sched, + uint16_t *rballoc_mask) { const int CC_id = 0; @@ -1870,7 +1873,7 @@ void pf_ul(module_id_t module_id, } } -bool nr_fr1_ulsch_preprocessor(module_id_t module_id, frame_t frame, sub_frame_t slot) +static bool nr_fr1_ulsch_preprocessor(module_id_t module_id, frame_t frame, sub_frame_t slot) { gNB_MAC_INST *nr_mac = RC.nrmac[module_id]; NR_COMMON_channels_t *cc = nr_mac->common_channels; diff --git a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h index a700c5c652..01036ea82b 100644 --- a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h +++ b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h @@ -40,8 +40,6 @@ void set_cset_offset(uint16_t); void mac_top_init_gNB(ngran_node_t node_type); -void config_common(gNB_MAC_INST *nrmac, int pdsch_AntennaPorts, int pusch_AntennaPorts, NR_ServingCellConfigCommon_t *scc); - int nr_mac_enable_ue_rrc_processing_timer(module_id_t Mod_idP, rnti_t rnti, NR_SubcarrierSpacing_t subcarrierSpacing, @@ -87,15 +85,6 @@ void nr_schedule_ue_spec(module_id_t module_id, nfapi_nr_dl_tti_request_t *DL_req, nfapi_nr_tx_data_request_t *TX_req); -uint32_t schedule_control_sib1(module_id_t module_id, - int CC_id, - NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config, - int time_domain_allocation, - NR_pdsch_dmrs_t *dmrs_parms, - NR_tda_info_t *tda_info, - uint8_t candidate_idx, - uint16_t num_total_bytes); - /* \brief default FR1 DL preprocessor init routine, returns preprocessor to call */ nr_pp_impl_dl nr_init_fr1_dlsch_preprocessor(int CC_id); @@ -139,41 +128,6 @@ void nr_clear_ra_proc(module_id_t module_idP, int CC_id, frame_t frameP, NR_RA_t int nr_allocate_CCEs(int module_idP, int CC_idP, frame_t frameP, sub_frame_t slotP, int test_only); -void nr_get_Msg3alloc(module_id_t module_id, - int CC_id, - NR_ServingCellConfigCommon_t *scc, - sub_frame_t current_subframe, - frame_t current_frame, - NR_RA_t *ra, - int16_t *tdd_beam_association); - -void nr_generate_Msg3_retransmission(module_id_t module_idP, - int CC_id, - frame_t frameP, - sub_frame_t slotP, - NR_RA_t *ra, - nfapi_nr_ul_dci_request_t *ul_dci_req); - -/* \brief Function in gNB to fill RAR pdu when requested by PHY. -@param ra Instance of RA resources of gNB -@param dlsch_buffer Pointer to RAR input buffer -@param N_RB_UL Number of UL resource blocks -*/ -void nr_fill_rar(uint8_t Mod_idP, - NR_RA_t * ra, - uint8_t * dlsch_buffer, - nfapi_nr_pusch_pdu_t *pusch_pdu); - -void fill_msg3_pusch_pdu(nfapi_nr_pusch_pdu_t *pusch_pdu, - NR_ServingCellConfigCommon_t *scc, - int round, - int startSymbolAndLength, - rnti_t rnti, int scs, - int bwp_size, int bwp_start, - int mappingtype, int fh, - int msg3_first_rb, int msg3_nb_rb); - - void schedule_nr_prach(module_id_t module_idP, frame_t frameP, sub_frame_t slotP); uint16_t nr_mac_compute_RIV(uint16_t N_RB_DL, uint16_t RBstart, uint16_t Lcrbs); @@ -380,39 +334,10 @@ int nr_write_ce_dlsch_pdu(module_id_t module_idP, unsigned char drx_cmd, unsigned char *ue_cont_res_id); -void nr_generate_Msg2(module_id_t module_idP, - int CC_id, - frame_t frameP, - sub_frame_t slotP, - NR_RA_t *ra, - nfapi_nr_dl_tti_request_t *dl_req, - nfapi_nr_tx_data_request_t *TX_req); - -void nr_generate_Msg4(module_id_t module_idP, - int CC_id, - frame_t frameP, - sub_frame_t slotP, - NR_RA_t *ra, - nfapi_nr_dl_tti_request_t *DL_req, - nfapi_nr_tx_data_request_t *TX_req); - -void nr_check_Msg4_Ack(module_id_t module_id, int CC_id, frame_t frame, sub_frame_t slot, NR_RA_t *ra); - -void nr_generate_Msg3_dcch_dtch_response(module_id_t module_idP, - int CC_id, - frame_t frameP, - sub_frame_t slotP, - NR_RA_t *ra, - nfapi_nr_dl_tti_request_t *DL_req, - nfapi_nr_tx_data_request_t *TX_req); - int binomial(int n, int k); bool is_xlsch_in_slot(uint64_t bitmap, sub_frame_t slot); -void fill_ssb_vrb_map (NR_COMMON_channels_t *cc, int rbStart, int ssb_subcarrier_offset, uint16_t symStart, int CC_id); - - /* \brief Function to indicate a received SDU on ULSCH. @param Mod_id Instance ID of gNB @param CC_id Component carrier index @@ -451,13 +376,6 @@ void handle_nr_srs_measurements(const module_id_t module_id, const sub_frame_t slot, nfapi_nr_srs_indication_pdu_t *srs_ind); -int16_t ssb_index_from_prach(module_id_t module_idP, - frame_t frameP, - sub_frame_t slotP, - uint16_t preamble_index, - uint8_t freq_index, - uint8_t symbol); - void find_SSB_and_RO_available(gNB_MAC_INST *nrmac); NR_pdsch_dmrs_t get_dl_dmrs_params(const NR_ServingCellConfigCommon_t *scc,