diff --git a/openair2/GNB_APP/gnb_config.c b/openair2/GNB_APP/gnb_config.c index bcce5a367a..a2e418245a 100644 --- a/openair2/GNB_APP/gnb_config.c +++ b/openair2/GNB_APP/gnb_config.c @@ -1735,9 +1735,43 @@ int RCconfig_NR_DU_F1(MessageDef *msg_p, uint32_t i) { f1Setup->measurement_timing_information[k] = "0"; f1Setup->ranac[k] = 0; f1Setup->mib[k] = rrc->carrier.MIB; - f1Setup->sib1[k] = rrc->carrier.SIB1; f1Setup->mib_length[k] = rrc->carrier.sizeof_MIB; - f1Setup->sib1_length[k] = rrc->carrier.sizeof_SIB1; + if(1){ + f1Setup->sib1[k] = rrc->carrier.SIB1; + f1Setup->sib1_length[k] = rrc->carrier.sizeof_SIB1; + } + else{ + NR_BCCH_DL_SCH_Message_t *bcch_message = NULL; + + asn_dec_rval_t dec_rval = uper_decode_complete( NULL, + &asn_DEF_NR_BCCH_DL_SCH_Message, + (void **)&bcch_message, + (const void *)rrc->carrier.SIB1, + rrc->carrier.sizeof_SIB1); + + if ((dec_rval.code != RC_OK) && (dec_rval.consumed == 0)) { + LOG_E(RRC,"SIB1 decode error\n"); + // free the memory + SEQUENCE_free( &asn_DEF_NR_BCCH_DL_SCH_Message, bcch_message, 1 ); + exit(1); + } + + NR_SIB1_t *bcch_SIB1 = bcch_message->message.choice.c1->choice.systemInformationBlockType1; + f1Setup->sib1[k] = calloc(1,rrc->carrier.sizeof_SIB1); + asn_enc_rval_t enc_rval = uper_encode_to_buffer(&asn_DEF_NR_SIB1, + NULL, + (void *)bcch_SIB1, + f1Setup->sib1[k], + NR_MAX_SIB_LENGTH/8); + AssertFatal (enc_rval.encoded > 0, "ASN1 message encoding failed (%s, %lu)!\n", + enc_rval.failed_type->name, enc_rval.encoded); + + //if ( LOG_DEBUGFLAG(DEBUG_ASN1) ) { + LOG_I(NR_RRC, "SIB1 container to be integrated in F1 Setup request:\n"); + xer_fprint(stdout, &asn_DEF_NR_SIB1,(void *)bcch_message->message.choice.c1->choice.systemInformationBlockType1 ); + //} + f1Setup->sib1_length[k] = (enc_rval.encoded+7)/8; + } break; } } diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c index 606da48575..dc4d187842 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c @@ -1463,7 +1463,7 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra int r_pucch = ((CCEIndex<<1)/N_cce)+(delta_PRI<<1); int alloc = nr_acknack_scheduling(module_idP, UE_id, frameP, slotP, r_pucch); - AssertFatal(alloc>=0,"Couldn't find a pucch allocation for ack nack (msg4)\n"); + AssertFatal(alloc>=0,"%d.%d Couldn't find a pucch allocation for ack nack (msg4), r_pucch %d (CCEindex%d,N_cce%d\n",frameP,slotP,r_pucch,CCEIndex,N_cce); NR_sched_pucch_t *pucch = &sched_ctrl->sched_pucch[alloc]; harq->feedback_slot = pucch->ul_slot; harq->feedback_frame = pucch->frame; diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c index 0f828b8e81..6fcc3fe5c1 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c @@ -1355,7 +1355,7 @@ int nr_acknack_scheduling(int mod_id, * for initialCyclicShift 0 (we assume it always has that one), so other * initialCyclicShifts can overlap with ICS 0!*/ if (pucch_Config==NULL) - return -1; + return 0; const NR_PUCCH_Resource_t *resource = pucch_Config->resourceToAddModList->list.array[pucch->resource_indicator]; DevAssert(resource->format.present == NR_PUCCH_Resource__format_PR_format0); if (resource->format.choice.format0->initialCyclicShift == 0) {