phy_simulators working again

This commit is contained in:
yilmazt
2019-07-20 17:52:32 +02:00
54 changed files with 1660 additions and 1056 deletions
@@ -1,39 +0,0 @@
#include <stdio.h>
#include <stdlib.h>
#include <math.h>
#include "nr_polar_defs.h"
#include "nr_polar_pucch_defs.h"
void PUCCH_encoder(uint8_t a[], uint8_t A, uint8_t G, uint16_t* E_r, uint8_t** f);
int main()
{
uint16_t E_r;
uint8_t* f;
uint8_t A=32; //16, 32, 64, 128, 256, 512, 1024 Payload length
uint8_t G = 54; //, 108, 216, 432, 864, 1728, 3456, 6912, 13824}; encoded block length
uint8_t j;
uint8_t* a = (uint8_t *)malloc(sizeof(uint8_t)*A);
if (a == NULL)
{
fprintf(stderr, "malloc failed\n");
exit(-1);
}
printf("DEBUG: Send ");
for (j=0; j<A; j++) //create the message to encode
{
//a[j]=rand()%2;
a[j]=1; // ONLY ONES FOR TEST, otherwise random
printf("%i", a[j]);
}
printf("\n");
PUCCH_encoder(a, A, G, &E_r, &f);
return 0;
}
@@ -1,310 +0,0 @@
#include <stdio.h>
#include <stdlib.h>
#include <math.h>
#include "nr_polar_defs.h"
#include "nr_polar_pucch_defs.h"
void PUCCH_encoder(uint8_t a[], uint8_t A, uint8_t G, uint16_t* E_r, uint8_t** f)
{
// PUCCH_ENCODER Polar encoder for the Physical Uplink Control Channel (PUCCH) and the
// Physical Uplink Shared Channel (PUSCH) of 3GPP New Radio, as defined in
// Section 6.3 of TS38.212. Implements the code block segmentation and
// Cyclic Redudancy Check (CRC) attachment of Sections 6.3.1.2.1 and 6.3.2.2.1,
// the channel coding of Sections 6.3.1.3.1 and 6.3.2.3.2, the rate matching of
// Sections 6.3.1.4.1 and 6.3.2.4.1, as well as the code block concatenation of
// Sections 6.3.1.5.1 and 6.3.2.5.1. Note that this code does not implement the
// UCI bit sequence generation of Sections 6.3.1.1 and 6.3.2.1, the
// determination of the encoded block length E_UCI of Sections 6.3.1.4.1 and
// 6.3.2.4.1, or the multiplexing of Sections 6.3.1.6 and 6.3.2.6. Also, this
// code does not implement the small block lengths, which are detailed in
// Sections 6.3.1.2.2, 6.3.1.3.2, 6.3.1.4.2, 6.3.2.2.2, 6.3.2.3.2 and 6.3.2.4.2.
uint8_t C=0;
uint8_t i;
uint8_t crc_polynomial_pattern_length;
uint8_t P[32] = {0, 1, 2, 4, 3, 5, 6, 7, 8, 16, 9, 17, 10, 18, 11, 19, 12, 20, 13, 21, 14, 22, 15, 23, 24, 25, 26, 28, 27, 29, 30, 31};
uint8_t* crc_polynomial_pattern;
if (A < 12) {
fprintf(stderr, "A should be no less than 12.");
exit(-1);
} else if (A > 1706) {
fprintf(stderr, "A should be no greater than 1706.");
exit(-1);
}
else if (A <= 19) //Use PCCA-polar
{
// The CRC polynomial used with PCCA-polar in 3GPP PUCCH channel is D^6 + D^5 + 1
crc_polynomial_pattern_length = 7;
crc_polynomial_pattern = (uint8_t *)malloc(sizeof(uint8_t)*crc_polynomial_pattern_length);
crc_polynomial_pattern[0] = 1;
crc_polynomial_pattern[1] = 1;
crc_polynomial_pattern[2] = 0;
crc_polynomial_pattern[3] = 0;
crc_polynomial_pattern[4] = 0;
crc_polynomial_pattern[5] = 0;
crc_polynomial_pattern[6] = 1;
C = 1; // Use one segment
}
else // Use CA-polar
{
crc_polynomial_pattern_length = 12;
crc_polynomial_pattern = (uint8_t *)malloc(sizeof(uint8_t)*crc_polynomial_pattern_length);
crc_polynomial_pattern[0] = 1;
crc_polynomial_pattern[1] = 1;
crc_polynomial_pattern[2] = 1;
crc_polynomial_pattern[3] = 0;
crc_polynomial_pattern[4] = 0;
crc_polynomial_pattern[5] = 0;
crc_polynomial_pattern[6] = 1;
crc_polynomial_pattern[7] = 0;
crc_polynomial_pattern[8] = 0;
crc_polynomial_pattern[9] = 0;
crc_polynomial_pattern[10] = 0;
crc_polynomial_pattern[11] = 1;
if (A >= 360 && G >= 1088 )
C = 2; // Use two segments
else
C = 1; // Use one segment
}
// Determine the number of information and CRC bits.
uint16_t K = ceil(A/C)+crc_polynomial_pattern_length-1;
*E_r = floor((double)G/C);
if(*E_r > 8192) {
fprintf(stderr, "G is too long.");
exit(-1);
}
//Determine the number of bits used at the input and output of the polar encoder kernal.
uint16_t N = nr_polar_coding_output_length(K, *E_r, NR_POLAR_PUCCH_N_MAX);
uint8_t n = log2(N);
//int N = get_3GPP_N(K,*E_r,10); //n_max = 10 is used in PUCCH channels
printf("DEBUG: The number of bits used at I/O of encoder kernal is %i\n", (int)N);
// Get a rate matching pattern
uint16_t* rate_matching_pattern = (uint16_t*)malloc(sizeof(uint16_t) * (*E_r));
uint16_t *J = malloc(sizeof(uint16_t) * N);
nr_polar_coding_rate_matching_pattern(rate_matching_pattern, J, P, K, N, *E_r);
printf("DEBUG: The rate matching pattern is ");
for (i=0; i<*E_r; i++) {
printf("%i ", (int)rate_matching_pattern[i]);
}
printf("\n");
// Get a sequence pattern
uint16_t *Q_0_Nminus1 = nr_polar_coding_sequence_pattern(n);
printf("DEBUG: The sequence pattern is ");
for (i=0; i<N; i++) {
printf("%i ", Q_0_Nminus1[i]);
}
printf("\n");
// Get the channel interleaving pattern
uint16_t *channel_interleaver_pattern = malloc(sizeof(uint16_t) * *E_r);
nr_polar_coding_channel_interleaver_pattern(channel_interleaver_pattern, 1, *E_r);
printf("DEBUG: The channel interleaver pattern is " );
for (i=0; i<*E_r; i++) {
printf("%i ", (int)channel_interleaver_pattern[i]);
}
printf("\n");
uint16_t n_PC; //PC bits
uint8_t* info_bit_pattern;
uint8_t** G_P;
uint8_t* b;
uint8_t* u;
uint8_t* d;
uint8_t* e;
if (A <= 19) // Use PCCA-polar
{
n_PC = 3; // 3 PC bits
// Get an information bit pattern.
get_3GPP_info_bit_pattern(K, n_PC, N, *E_r, P, Q_0_Nminus1, &info_bit_pattern); // -> info_bit_pattern
printf("DEBUG: The information bit pattern is " );
for (i=0; i<N; i++) {
printf("%i", (int)info_bit_pattern[i] );
}
printf("\n");
//Get a PC bit pattern.
uint8_t* PC_bit_pattern;
if (G-K+3 > 192)
get_PC_bit_pattern(N, n_PC, 1, Q_0_Nminus1, info_bit_pattern, &PC_bit_pattern); // -> PC_bit_pattern
else
get_PC_bit_pattern(N, n_PC, 0, Q_0_Nminus1, info_bit_pattern, &PC_bit_pattern); // -> PC_bit_pattern
printf("DEBUG: The PC bit pattern is " );
for (i=0; i<N; i++) {
printf("%i", PC_bit_pattern[i] );
}
printf("\n");
/// ------------------
//Attach CRC to the Transport Block. (a to b)
get_crc_generator_matrix(A, crc_polynomial_pattern_length-1, crc_polynomial_pattern, &G_P); // -> G_P
nr_polar_crc(a, A, crc_polynomial_pattern_length-1, G_P, &b); //-> b
//Bit insertion
u = (uint8_t*) malloc(sizeof(uint8_t)*N);
if (u == NULL) {
fprintf(stderr, "malloc failed\n");
exit(-1);
}
nr_polar_bit_insertion_2(u, b, info_bit_pattern, PC_bit_pattern, N); // -> u
free(b);
//encoding
d = malloc(sizeof(uint8_t) * N);
if (d == NULL) {
fprintf(stderr, "malloc failed\n");
exit(-1);
}
nr_polar_kernel_operation(u, d, N); // -> d
free(u);
//rate matching
e = malloc(sizeof(uint8_t) * N);
if (e == NULL) {
fprintf(stderr, "malloc failed\n");
exit(-1);
}
nr_polar_coding_rate_matcher(d, e, rate_matching_pattern, (*E_r));
free(d);
printf("\ne = ");
for(i=0;i<(*E_r);i++)
{
printf("%i ", e[i]);
}
// Perform channel interleaving.
*f = (uint8_t*) malloc(sizeof(uint8_t)*(*E_r));
nr_polar_coding_interleaver(e, *f, channel_interleaver_pattern, (uint16_t)(*E_r));
free(e);
printf("\nf = ");
for(i=0;i<(*E_r);i++)
{
printf("%i ", (*f)[i]);
}
printf("\n\n\n ");
} else //Use CA-polar
{
n_PC = 0;
// Get an information bit pattern.
get_3GPP_info_bit_pattern(K, n_PC, N, *E_r, P, Q_0_Nminus1, &info_bit_pattern); // -> info_bit_pattern
printf("DEBUG: The information bit pattern is " );
for (i=0; i<N; i++) {
printf("%i", (int)info_bit_pattern[i] );
}
printf("\n");
if (C == 2)
{
//info_bit_pattern2 = info_bit_pattern;
uint8_t* info_bit_pattern2;
if(A%2) // Prepend a zero to the first segment during encoding (Treat the first information bit as a frozen bit)
{
info_bit_pattern2 = (uint8_t*)malloc(sizeof(uint8_t)*(1+N));
info_bit_pattern2[0] =0;
for (i=0; i<1+N; i++)
{
info_bit_pattern2[i+1] = info_bit_pattern[i];
}
} else
{
info_bit_pattern2 = (uint8_t*)malloc(sizeof(uint8_t)*N);
for (i=0; i<N; i++)
{
info_bit_pattern2[i] = info_bit_pattern[i];
}
}
//Attach CRC to the Transport Block. (a to b)
get_crc_generator_matrix(A/C, crc_polynomial_pattern_length-1, crc_polynomial_pattern, &G_P); // -> G_P
nr_polar_crc(a, A/C, crc_polynomial_pattern_length-1, G_P, &b); //-> b
} else
{
//Attach CRC to the Transport Block. (a to b)
get_crc_generator_matrix(A, crc_polynomial_pattern_length-1, crc_polynomial_pattern, &G_P); // -> G_P
nr_polar_crc(a, A, crc_polynomial_pattern_length-1, G_P, &b); //-> b
}
//Bit insertion
u = (uint8_t*) malloc(sizeof(uint8_t)*N);
if (u == NULL) {
fprintf(stderr, "malloc failed\n");
exit(-1);
}
int j=0;
printf("\nu = ");
for(i=0; i<N; i++)
{
if(info_bit_pattern[i])
{
u[i]=b[j];
j++;
}
else
u[i]=0;
printf("%i ", u[i]);
}
free(b);
//encoding
d = malloc(sizeof(uint8_t) * N);
if (d == NULL) {
fprintf(stderr, "malloc failed\n");
exit(-1);
}
nr_polar_kernel_operation(u, d, N); // -> d
free(u);
//rate matching
e = malloc(sizeof(uint8_t) * N);
if (e == NULL) {
fprintf(stderr, "malloc failed\n");
exit(-1);
}
nr_polar_coding_rate_matcher(d, e, rate_matching_pattern, (*E_r));
free(d);
printf("\ne = ");
for(i=0;i<(*E_r);i++)
{
printf("%i ", e[i]);
}
// Perform channel interleaving.
*f = (uint8_t*) malloc(sizeof(uint8_t)*(*E_r));
nr_polar_coding_interleaver(e, *f, channel_interleaver_pattern, (uint16_t)(*E_r));
free(e);
printf("\nf = ");
for(i=0;i<(*E_r);i++)
{
printf("%i ", (*f)[i]);
}
printf("\n\n\n ");
}
//
// free(crc_polynomial_pattern);
// //free others...
}
+4 -4
View File
@@ -34,8 +34,9 @@
void init_7_5KHz(void);
int phy_init_RU(RU_t *ru) {
LTE_DL_FRAME_PARMS *fp = &ru->frame_parms;
int phy_init_RU(RU_t *ru)
{
LTE_DL_FRAME_PARMS *fp = ru->frame_parms;
RU_CALIBRATION *calibration = &ru->calibration;
int i,j,p,re;
@@ -184,8 +185,7 @@ int phy_init_RU(RU_t *ru) {
void phy_free_RU(RU_t *ru)
{
int i,j;
int p;
int i,j,p;
RU_CALIBRATION *calibration = &ru->calibration;
LOG_I(PHY, "Feeing RU signal buffers (if_south %s) nb_tx %d\n", ru_if_types[ru->if_south], ru->nb_tx);
+16 -17
View File
@@ -596,7 +596,8 @@ void phy_config_dedicated_ue(uint8_t Mod_id,int CC_id,uint8_t eNB_id,
* \param[in] frame_parms LTE_DL_FRAME_PARMS structure.
* \note This function is optimistic in that it expects malloc() to succeed.
*/
void phy_init_nr_ue__PDSCH( NR_UE_PDSCH* const pdsch, const NR_DL_FRAME_PARMS* const fp )
void phy_init_nr_ue__PDSCH(NR_UE_PDSCH* const pdsch,
const NR_DL_FRAME_PARMS* const fp)
{
AssertFatal( pdsch, "pdsch==0" );
@@ -646,22 +647,20 @@ void phy_init_nr_ue__PDSCH( NR_UE_PDSCH* const pdsch, const NR_DL_FRAME_PARMS* c
}
}
void phy_init_nr_ue_PUSCH( NR_UE_PUSCH* const pusch, const NR_DL_FRAME_PARMS* const fp )
void phy_init_nr_ue_PUSCH(NR_UE_PUSCH* const pusch,
const NR_DL_FRAME_PARMS* const fp)
{
int i;
AssertFatal( pusch, "pusch==0" );
for (i=0; i<NR_MAX_NB_LAYERS; i++){
for (int i=0; i<NR_MAX_NB_LAYERS; i++){
pusch->txdataF_layers[i] = (int32_t *)malloc16_clear((NR_MAX_PUSCH_ENCODED_LENGTH)*sizeof(int32_t*));
}
}
int init_nr_ue_signal(PHY_VARS_NR_UE *ue,
int nb_connected_eNB,
uint8_t abstraction_flag)
int nb_connected_eNB,
uint8_t abstraction_flag)
{
// create shortcuts
NR_DL_FRAME_PARMS* const fp = &ue->frame_parms;
@@ -986,13 +985,12 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue,
}
void init_nr_ue_transport(PHY_VARS_NR_UE *ue,int abstraction_flag) {
int i,j,k;
for (i=0; i<NUMBER_OF_CONNECTED_eNB_MAX; i++) {
for (j=0; j<2; j++) {
for (k=0; k<RX_NB_TH_MAX; k++) {
void init_nr_ue_transport(PHY_VARS_NR_UE *ue,
int abstraction_flag)
{
for (int i=0; i<NUMBER_OF_CONNECTED_eNB_MAX; i++) {
for (int j=0; j<2; j++) {
for (int k=0; k<RX_NB_TH_MAX; k++) {
AssertFatal((ue->dlsch[k][i][j] = new_nr_ue_dlsch(1,NUMBER_OF_HARQ_PID_MAX,NSOFT,MAX_LDPC_ITERATIONS,ue->frame_parms.N_RB_DL, abstraction_flag))!=NULL,"Can't get ue dlsch structures\n");
LOG_D(PHY,"dlsch[%d][%d][%d] => %p\n",k,i,j,ue->dlsch[k][i][j]);
@@ -1043,8 +1041,9 @@ void phy_init_nr_top(PHY_VARS_NR_UE *ue)
}
void set_default_frame_parms_single(nfapi_nr_config_request_t *config, NR_DL_FRAME_PARMS *frame_parms) {
void set_default_frame_parms_single(nfapi_nr_config_request_t *config,
NR_DL_FRAME_PARMS *frame_parms)
{
//int CC_id;
//for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
@@ -112,14 +112,15 @@ int lte_est_timing_advance(LTE_DL_FRAME_PARMS *frame_parms,
}
int lte_est_timing_advance_pusch(PHY_VARS_eNB *eNB,module_id_t UE_id)
int lte_est_timing_advance_pusch(PHY_VARS_eNB *eNB,
module_id_t UE_id)
{
int temp, i, aa, max_pos=0, max_val=0;
short Re,Im;
RU_t *ru;
ru = RC.ru[UE_id];
LTE_DL_FRAME_PARMS *frame_parms = (eNB==NULL) ? &ru->frame_parms : &eNB->frame_parms;
LTE_DL_FRAME_PARMS *frame_parms = (eNB==NULL) ? ru->frame_parms : &eNB->frame_parms;
LTE_eNB_PUSCH *eNB_pusch_vars = (eNB!=NULL) ? eNB->pusch_vars[UE_id] : (LTE_eNB_PUSCH*)NULL;
RU_CALIBRATION *calibration = &ru->calibration;
int32_t **ul_ch_estimates_time = (eNB==NULL) ? calibration->drs_ch_estimates_time : eNB_pusch_vars->drs_ch_estimates_time;
@@ -153,4 +154,3 @@ int lte_est_timing_advance_pusch(PHY_VARS_eNB *eNB,module_id_t UE_id)
return max_pos - sync_pos;
}
+33 -46
View File
@@ -26,15 +26,13 @@
*/
//#include <string.h>
#include <math.h>
#include "LAYER2/MAC/mac.h"
#include "PHY/defs_UE.h"
#include "PHY/phy_extern_ue.h"
#include <math.h>
#include "LAYER2/MAC/mac.h"
#include "RRC/LTE/rrc_extern.h"
#include "PHY_INTERFACE/phy_interface.h"
#include "PHY/LTE_REFSIG/lte_refsig.h"
#include "RRC/LTE/rrc_extern.h"
// Note: this is for prototype of generate_drs_pusch (OTA synchronization of RRUs)
#include "PHY/LTE_UE_TRANSPORT/transport_proto_ue.h"
@@ -46,10 +44,8 @@ int sync_tmp[2048*4] __attribute__((aligned(32)));
short syncF_tmp[2048*2] __attribute__((aligned(32)));
int lte_sync_time_init(LTE_DL_FRAME_PARMS *frame_parms ) // LTE_UE_COMMON *common_vars
{
int i,k;
sync_corr_ue0 = (int *)malloc16(LTE_NUMBER_OF_SUBFRAMES_PER_FRAME*sizeof(int)*frame_parms->samples_per_tti);
@@ -275,8 +271,6 @@ int lte_sync_time_init(LTE_DL_FRAME_PARMS *frame_parms ) // LTE_UE_COMMON *com
((int32_t*)primary_synch2_time)[i] = sync_tmp[i];
if ( LOG_DUMPFLAG(DEBUG_LTEESTIM)){
LOG_M("primary_sync0.m","psync0",primary_synch0_time,frame_parms->ofdm_symbol_size,1,1);
LOG_M("primary_sync1.m","psync1",primary_synch1_time,frame_parms->ofdm_symbol_size,1,1);
@@ -288,8 +282,6 @@ int lte_sync_time_init(LTE_DL_FRAME_PARMS *frame_parms ) // LTE_UE_COMMON *com
void lte_sync_time_free(void)
{
if (sync_corr_ue0) {
LOG_D(PHY,"Freeing sync_corr_ue (%p)...\n",sync_corr_ue0);
free(sync_corr_ue0);
@@ -328,19 +320,20 @@ void lte_sync_time_free(void)
primary_synch2_time = NULL;
}
static inline int abs32(int x)
{
return (((int)((short*)&x)[0])*((int)((short*)&x)[0]) + ((int)((short*)&x)[1])*((int)((short*)&x)[1]));
}
#define SHIFT 17
int lte_sync_time(int **rxdata, ///rx data in time domain
LTE_DL_FRAME_PARMS *frame_parms,
int *eNB_id)
{
// perform a time domain correlation using the oversampled sync sequence
unsigned int n, ar, s, peak_pos, peak_val, sync_source;
@@ -465,77 +458,74 @@ int lte_sync_time(int **rxdata, ///rx data in time domain
} else {
debug_cnt++;
}
}
return(peak_pos);
}
return(peak_pos);
}
int ru_sync_time_init(RU_t *ru) // LTE_UE_COMMON *common_vars
{
/*
int16_t dmrs[2048];
int16_t *dmrsp[2] = {dmrs,NULL};
*/
int32_t dmrs[ru->frame_parms.ofdm_symbol_size*14] __attribute__((aligned(32)));
// int32_t *dmrsp[2] = {&dmrs[(3-ru->frame_parms.Ncp)*ru->frame_parms.ofdm_symbol_size],NULL};
int32_t dmrs[ru->frame_parms->ofdm_symbol_size*14] __attribute__((aligned(32)));
//int32_t *dmrsp[2] = {&dmrs[(3-ru->frame_parms->Ncp)*ru->frame_parms->ofdm_symbol_size],NULL};
int32_t *dmrsp[2] = {&dmrs[0],NULL};
generate_ul_ref_sigs();
ru->dmrssync = (int16_t*)malloc16_clear(ru->frame_parms.ofdm_symbol_size*2*sizeof(int16_t));
ru->dmrs_corr = (uint64_t*)malloc16_clear(ru->frame_parms.samples_per_tti*10*sizeof(uint64_t));
ru->dmrssync = (int16_t*)malloc16_clear(ru->frame_parms->ofdm_symbol_size*2*sizeof(int16_t));
ru->dmrs_corr = (uint64_t*)malloc16_clear(ru->frame_parms->samples_per_tti*10*sizeof(uint64_t));
generate_drs_pusch(NULL,NULL,
&ru->frame_parms,
dmrsp,
0,
AMP,
0,
0,
ru->frame_parms.N_RB_DL,
0);
generate_drs_pusch(NULL,
NULL,
ru->frame_parms,
dmrsp,
0,
AMP,
0,
0,
ru->frame_parms->N_RB_DL,
0);
switch (ru->frame_parms.N_RB_DL) {
switch (ru->frame_parms->N_RB_DL) {
case 6:
idft128((int16_t*)(&dmrsp[0][3*ru->frame_parms.ofdm_symbol_size]),
idft128((int16_t*)(&dmrsp[0][3*ru->frame_parms->ofdm_symbol_size]),
ru->dmrssync, /// complex output
1);
break;
case 25:
idft512((int16_t*)(&dmrsp[0][3*ru->frame_parms.ofdm_symbol_size]),
idft512((int16_t*)(&dmrsp[0][3*ru->frame_parms->ofdm_symbol_size]),
ru->dmrssync, /// complex output
1);
break;
case 50:
idft1024((int16_t*)(&dmrsp[0][3*ru->frame_parms.ofdm_symbol_size]),
idft1024((int16_t*)(&dmrsp[0][3*ru->frame_parms->ofdm_symbol_size]),
ru->dmrssync, /// complex output
1);
break;
case 75:
idft1536((int16_t*)(&dmrsp[0][3*ru->frame_parms.ofdm_symbol_size]),
idft1536((int16_t*)(&dmrsp[0][3*ru->frame_parms->ofdm_symbol_size]),
ru->dmrssync,
1); /// complex output
break;
case 100:
idft2048((int16_t*)(&dmrsp[0][3*ru->frame_parms.ofdm_symbol_size]),
idft2048((int16_t*)(&dmrsp[0][3*ru->frame_parms->ofdm_symbol_size]),
ru->dmrssync, /// complex output
1);
break;
default:
AssertFatal(1==0,"Unsupported N_RB_DL %d\n",ru->frame_parms.N_RB_DL);
AssertFatal(1==0,"Unsupported N_RB_DL %d\n",ru->frame_parms->N_RB_DL);
break;
}
return(0);
}
void ru_sync_time_free(RU_t *ru) {
AssertFatal(ru->dmrssync!=NULL,"ru->dmrssync is NULL\n");
@@ -551,7 +541,6 @@ int lte_sync_time_eNB(int32_t **rxdata, ///rx data in time domain
uint32_t *peak_val_out,
uint32_t *sync_corr_eNB)
{
// perform a time domain correlation using the oversampled sync sequence
unsigned int n, ar, peak_val, peak_pos;
@@ -634,17 +623,19 @@ int lte_sync_time_eNB(int32_t **rxdata, ///rx data in time domain
}
static inline int64_t abs64(int64_t x)
{
return (((int64_t)((int32_t*)&x)[0])*((int64_t)((int32_t*)&x)[0]) + ((int64_t)
((int32_t*)&x)[1])*((int64_t)((int32_t*)&x)[1]));
}
int ru_sync_time(RU_t *ru,
int64_t *lev,
int64_t *avg)
{
LTE_DL_FRAME_PARMS *frame_parms = &ru->frame_parms;
LTE_DL_FRAME_PARMS *frame_parms = ru->frame_parms;
RU_CALIBRATION *calibration = &ru->calibration;
// perform a time domain correlation using the oversampled sync sequence
@@ -713,8 +704,4 @@ int ru_sync_time(RU_t *ru,
if ((int64_t)maxlev0 > (10*avg0)) {*lev = maxlev0; *avg=avg0; return((length+maxpos0-dmrsoffset)%length);}
return(-1);
}
@@ -35,13 +35,14 @@ static int16_t ru_90c[2*128] = {32767, 0,32766, -402,32758, -804,32746, -1206,32
#define SCALE 0x3FFF
int32_t lte_ul_channel_estimation(PHY_VARS_eNB *eNB,
L1_rxtx_proc_t *proc,
L1_rxtx_proc_t *proc,
module_id_t UE_id,
unsigned char l,
unsigned char Ns) {
unsigned char Ns)
{
RU_t *ru;
ru = RC.ru[UE_id];
LTE_DL_FRAME_PARMS *frame_parms = (eNB!=NULL) ? &eNB->frame_parms : &ru->frame_parms;
LTE_DL_FRAME_PARMS *frame_parms = (eNB!=NULL) ? &eNB->frame_parms : ru->frame_parms;
LTE_eNB_PUSCH *pusch_vars = (eNB!=NULL) ? eNB->pusch_vars[UE_id] : NULL;
RU_CALIBRATION *calibration = &ru->calibration;
int32_t **ul_ch_estimates = (eNB!=NULL) ? pusch_vars->drs_ch_estimates : calibration->drs_ch_estimates;
@@ -54,7 +55,7 @@ int32_t lte_ul_channel_estimation(PHY_VARS_eNB *eNB,
int32_t **rxdataF_ext = (eNB!=NULL) ? pusch_vars->rxdataF_ext : calibration->rxdataF_ext;
int subframe = (eNB!=NULL) ? proc->subframe_rx : ru->proc.subframe_rx;
int subframe = (eNB!=NULL) ? proc->subframe_rx : ru->proc.tti_rx;
uint8_t harq_pid;
int16_t delta_phase = 0;
+2 -18
View File
@@ -291,24 +291,8 @@ uint8_t generate_dci_top(uint8_t num_pdcch_symbols,
y[0] = &yseq0[0];
y[1] = &yseq1[0];
if (IS_SOFTMODEM_BASICSIM) {
/* this should be the normal case
* but it has to be validated for all the various cases
* so let's just do it for the basic simulator
*/
// memset(e, 2, DCI_BITS_MAX);
} else {
// reset all bits to <NIL>, here we set <NIL> elements as 2
// memset(e, 2, DCI_BITS_MAX);
// here we interpret NIL as a random QPSK sequence. That makes power estimation easier.
for (i=0; i<DCI_BITS_MAX; i++)
e[i]=taus()&1;
/* clear all bits, the above code may generate too much false detections
* (not sure about this, to be checked somehow)
*/
//memset(e, 0, DCI_BITS_MAX);
}/* BASIC_SIMULATOR */
/* reset all bits to <NIL>, here we set <NIL> elements as 2 */
memset(e, 2, DCI_BITS_MAX);
e_ptr = e;
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_GENERATE_DCI0,1);
+6 -13
View File
@@ -575,7 +575,6 @@ int16_t dB_fixed_times10(uint32_t x)
{
int16_t dB_power=0;
if (x==0) {
dB_power = 0;
} else if ( (x&0xff000000) != 0 ) {
@@ -597,18 +596,11 @@ int16_t dB_fixed_times10(uint32_t x)
return dB_power;
}
uint8_t dB_fixed64(uint64_t x) {
if ((x<(((uint64_t)1)<<32))) return(dB_fixed((uint32_t)x));
else return(4*dB_table[255]+dB_fixed((uint32_t)(x>>32)));
}
int8_t dB_fixed(uint32_t x)
{
int8_t dB_power=0;
if (x==0) {
dB_power = 0;
} else if ( (x&0xff000000) != 0 ) {
@@ -630,15 +622,16 @@ int8_t dB_fixed(uint32_t x)
return dB_power;
}
uint8_t dB_fixed64(uint64_t x)
{
if (x<(((uint64_t)1)<<32)) return(dB_fixed((uint32_t)x));
else return(4*dB_table[255] + dB_fixed(x>>32));
if ((x<(((uint64_t)1)<<32))) return(dB_fixed((uint32_t)x));
else return(4*dB_table[255]+dB_fixed((uint32_t)(x>>32)));
}
int8_t dB_fixed2(uint32_t x, uint32_t y)
int8_t dB_fixed2(uint32_t x,
uint32_t y)
{
if ((x>0) && (y>0) )
+30 -3
View File
@@ -37,6 +37,7 @@
#include "common_lib.h"
#include "openairinterface5g_limits.h"
#include "PHY/TOOLS/time_meas.h"
#include "openair1/PHY/defs_common.h"
#define MAX_BANDS_PER_RRU 4
@@ -46,7 +47,18 @@
#ifdef OCP_FRAMEWORK
#include <enums.h>
#else
typedef enum {normal_txrx=0,rx_calib_ue=1,rx_calib_ue_med=2,rx_calib_ue_byp=3,debug_prach=4,no_L2_connect=5,calib_prach_tx=6,rx_dump_frame=7,loop_through_memory=8} runmode_t;
typedef enum {
normal_txrx=0,
rx_calib_ue=1,
rx_calib_ue_med=2,
rx_calib_ue_byp=3,
debug_prach=4,
no_L2_connect=5,
calib_prach_tx=6,
rx_dump_frame=7,
loop_through_memory=8
} runmode_t;
/*! \brief Extension Type */
typedef enum {
@@ -64,7 +76,7 @@ enum transmission_access_mode {
SCHEDULED_ACCESS,
CBA_ACCESS};
typedef enum {
typedef enum {
eNodeB_3GPP=0, // classical eNodeB function
NGFI_RAU_IF5, // RAU with NGFI IF5
NGFI_RAU_IF4p5, // RAU with NFGI IF4p5
@@ -75,7 +87,6 @@ typedef enum {
} node_function_t;
typedef enum {
synch_to_ext_device=0, // synch to RF or Ethernet device
synch_to_other, // synch to another source_(timer, other RU)
synch_to_mobipass_standalone // special case for mobipass in standalone mode
@@ -119,6 +130,22 @@ typedef struct {
} RU_COMMON;
typedef struct {
/// \brief Received frequency-domain signal after extraction.
/// - first index: ? [0..7] (hard coded) FIXME! accessed via \c nb_antennas_rx
/// - second index: ? [0..168*N_RB_DL[
int32_t **rxdataF_ext;
/// \brief Hold the channel estimates in time domain based on DRS.
/// - first index: rx antenna id [0..nb_antennas_rx[
/// - second index: ? [0..4*ofdm_symbol_size[
int32_t **drs_ch_estimates_time;
/// \brief Hold the channel estimates in frequency domain based on DRS.
/// - first index: rx antenna id [0..nb_antennas_rx[
/// - second index: ? [0..12*N_RB_UL*frame_parms->symbols_per_tti[
int32_t **drs_ch_estimates;
} RU_CALIBRATION;
typedef struct RU_proc_t_s {
/// Pointer to associated RU descriptor
struct RU_t_s *ru;
+62 -64
View File
@@ -145,7 +145,6 @@ typedef struct {
} PRACH_CONFIG_INFO;
/// PRACH-ConfigSIB or PRACH-Config from 36.331 RRC spec
typedef struct {
/// Parameter: RACH_ROOT_SEQUENCE, see TS 36.211 (5.7.1). \vr{[0..837]}
@@ -157,12 +156,11 @@ typedef struct {
} PRACH_CONFIG_COMMON;
#if (LTE_RRC_VERSION >= MAKE_VERSION(14, 0, 0))
/// PRACH-eMTC-Config from 36.331 RRC spec
typedef struct {
/// Parameter: High-speed-flag, see TS 36.211 (5.7.2). \vr{[0..1]} 1 corresponds to Restricted set and 0 to Unrestricted set.
uint8_t highSpeedFlag;
/// Parameter: \f$N_\text{CS}\f$, see TS 36.211 (5.7.2). \vr{[0..15]}\n Refer to table 5.7.2-2 for preamble format 0..3 and to table 5.7.2-3 for preamble format 4.
/// Parameter: \f$N_\text{CS}\f$, see TS 36.211 (5.7.2). \vr{[0..15]}\n Refer to table 5.7.2-2 for preamble format 0..3 and to table 5.7.2-3 for preamble format 4.
uint8_t zeroCorrelationZoneConfig;
/// Parameter: prach-FrequencyOffset, see TS 36.211 (5.7.1). \vr{[0..94]}\n For TDD the value range is dependent on the value of \ref prach_ConfigIndex.
@@ -586,7 +584,7 @@ typedef struct {
#endif
typedef struct {
typedef struct LTE_DL_FRAME_PARMS {
/// Number of resource blocks (RB) in DL
uint8_t N_RB_DL;
/// Number of resource blocks (RB) in UL
@@ -751,28 +749,29 @@ typedef enum {
MMSE=2
} PRECODE_TYPE_t;
typedef enum {format0,
format1,
format1A,
format1B,
format1C,
format1D,
format1E_2A_M10PRB,
format2,
format2A,
format2B,
format2C,
format2D,
format3,
format3A,
format4,
format5,
format6_0A,
format6_0B,
format6_1A,
format6_1B,
format6_2
} DCI_format_t;
typedef enum {
format0,
format1,
format1A,
format1B,
format1C,
format1D,
format1E_2A_M10PRB,
format2,
format2A,
format2B,
format2C,
format2D,
format3,
format3A,
format4,
format5,
format6_0A,
format6_0B,
format6_1A,
format6_1B,
format6_2
} DCI_format_t;
typedef struct {
/// Length of DCI in bits
@@ -1025,7 +1024,8 @@ typedef uint8_t(encoder_if_t)(uint8_t *input,
uint8_t F);
static inline void wait_sync(char *thread_name) {
static inline void wait_sync(char *thread_name)
{
int rc;
printf( "waiting for sync (%s,%d/%p,%p,%p)\n",thread_name,sync_var,&sync_var,&sync_cond,&sync_mutex);
@@ -1044,7 +1044,14 @@ static inline void wait_sync(char *thread_name) {
fflush(stderr);
}
static inline int wakeup_thread(pthread_mutex_t *mutex,pthread_cond_t *cond,int *instance_cnt,char *name, int sleeptime,int sleep_cnt_max) {
static inline int wakeup_thread(pthread_mutex_t *mutex,
pthread_cond_t *cond,
int *instance_cnt,
char *name,
int sleeptime,
int sleep_cnt_max)
{
int rc;
int sleep_cnt=0;
@@ -1074,18 +1081,24 @@ static inline int wakeup_thread(pthread_mutex_t *mutex,pthread_cond_t *cond,int
return(0);
}
static inline int timedwait_on_condition(pthread_mutex_t *mutex,pthread_cond_t *cond,int *instance_cnt,char *name,uint32_t time_ns) {
static inline int timedwait_on_condition(pthread_mutex_t *mutex,
pthread_cond_t *cond,
int *instance_cnt,
char *name,
uint32_t time_ns)
{
int rc;
int waitret=0;
struct timespec now,abstime;
struct timespec now, abstime;
AssertFatal((rc = pthread_mutex_lock(mutex))==0,"[SCHED][eNB] timedwait_on_condition(): error locking mutex for %s (%d %s, %p)\n", name, rc, strerror(rc), (void *)mutex);
clock_gettime(CLOCK_REALTIME,&now);
while (*instance_cnt < 0) {
clock_gettime(CLOCK_REALTIME, &now);
// most of the time the thread is waiting here
// proc->instance_cnt_rxtx is -1
abstime.tv_sec=now.tv_sec;
abstime.tv_sec = now.tv_sec;
abstime.tv_nsec = now.tv_nsec + time_ns;
if (abstime.tv_nsec >= 1000*1000*1000)
{
@@ -1097,10 +1110,15 @@ static inline int timedwait_on_condition(pthread_mutex_t *mutex,pthread_cond_t *
AssertFatal((rc = pthread_mutex_unlock(mutex)) == 0,"[SCHED][eNB] timedwait_on_condition(): error unlocking mutex return %d for %s\n", rc, name);
return(0);
return(waitret);
}
static inline int wait_on_condition(pthread_mutex_t *mutex,pthread_cond_t *cond,int *instance_cnt,char *name) {
static inline int wait_on_condition(pthread_mutex_t *mutex,
pthread_cond_t *cond,
int *instance_cnt,
char *name)
{
int rc;
AssertFatal((rc = pthread_mutex_lock(mutex))==0,"[SCHED][eNB] wait_on_condition(): error locking mutex for %s (%d %s, %p)\n", name, rc, strerror(rc), (void *)mutex);
@@ -1116,36 +1134,12 @@ static inline int wait_on_condition(pthread_mutex_t *mutex,pthread_cond_t *cond,
return(0);
}
static inline int timedwait_on_condition(pthread_mutex_t *mutex,pthread_cond_t *cond,int *instance_cnt,char *name,uint32_t time_ns) {
int rc;
int waitret=0;
if ((rc = pthread_mutex_lock(mutex)) != 0) {
LOG_E(PHY, "[SCHED][eNB] wait_on_condition(): error locking mutex for %s (%d %s, %p)\n",
name, rc, strerror(rc), (void *)mutex);
exit_fun("nothing to add");
return(-1);
}
struct timespec now,abstime;
while (*instance_cnt < 0) {
clock_gettime(CLOCK_REALTIME,&now);
// most of the time the thread is waiting here
// proc->instance_cnt_rxtx is -1
abstime.tv_sec=now.tv_sec;
abstime.tv_nsec = now.tv_nsec + time_ns;
if ((waitret = pthread_cond_timedwait(cond,mutex,&abstime))==ETIMEDOUT) break; // this unlocks mutex_rxtx while waiting and then locks it again
}
if (pthread_mutex_unlock(mutex) != 0) {
LOG_E(PHY,"[SCHED][eNB] error unlocking mutex for %s\n",name);
exit_fun("nothing to add");
return(-1);
}
return(waitret);
}
static inline int wait_on_busy_condition(pthread_mutex_t *mutex,pthread_cond_t *cond,int *instance_cnt,char *name) {
static inline int wait_on_busy_condition(pthread_mutex_t *mutex,
pthread_cond_t *cond,
int *instance_cnt,
char *name)
{
int rc;
AssertFatal((rc = pthread_mutex_lock(mutex))==0,"[SCHED][eNB] wait_on_busy_condition(): error locking mutex for %s (%d %s, %p)\n", name, rc, strerror(rc), (void *)mutex);
@@ -1160,7 +1154,11 @@ static inline int wait_on_busy_condition(pthread_mutex_t *mutex,pthread_cond_t *
return(0);
}
static inline int release_thread(pthread_mutex_t *mutex,int *instance_cnt,char *name) {
static inline int release_thread(pthread_mutex_t *mutex,
int *instance_cnt,
char *name)
{
int rc;
AssertFatal((rc = pthread_mutex_lock(mutex))==0,"[SCHED][eNB] release_thread(): error locking mutex for %s (%d %s, %p)\n", name, rc, strerror(rc), (void *)mutex);
+64 -68
View File
@@ -231,13 +231,11 @@ void common_signal_procedures (PHY_VARS_eNB *eNB,int frame, int subframe) {
void pdsch_procedures(PHY_VARS_eNB *eNB,
bool dlsch_procedures(PHY_VARS_eNB *eNB,
L1_rxtx_proc_t *proc,
int harq_pid,
LTE_eNB_DLSCH_t *dlsch,
LTE_eNB_DLSCH_t *dlsch1,
LTE_eNB_UE_stats *ue_stats,
int ra_flag) {
LTE_eNB_UE_stats *ue_stats) {
int frame=proc->frame_tx;
int subframe=proc->subframe_tx;
LTE_DL_eNB_HARQ_t *dlsch_harq=dlsch->harq_processes[harq_pid];
@@ -266,27 +264,6 @@ void pdsch_procedures(PHY_VARS_eNB *eNB,
dlsch_harq->round);
}
MSC_LOG_TX_MESSAGE(
MSC_PHY_ENB,MSC_PHY_UE,
NULL,0,
"%05u:%02u PDSCH/DLSCH input size = %"PRIu16", G %d, nb_rb %"PRIu16", TBS %"PRIu16", pmi_alloc %"PRIx16", rv %"PRIu8" (round %"PRIu8")",
frame, subframe,
dlsch_harq->TBS/8,
get_G(fp,
dlsch_harq->nb_rb,
dlsch_harq->rb_alloc,
dlsch_harq->Qm,
dlsch_harq->Nl,
dlsch_harq->pdsch_start,
frame,
subframe,
dlsch_harq->mimo_mode==TM7?7:0),
dlsch_harq->nb_rb,
dlsch_harq->TBS,
pmi2hex_2Ar1(dlsch_harq->pmi_alloc),
dlsch_harq->rvidx,
dlsch_harq->round);
if (ue_stats) ue_stats->dlsch_sliding_cnt++;
if (dlsch_harq->round == 0) {
@@ -301,15 +278,17 @@ void pdsch_procedures(PHY_VARS_eNB *eNB,
#endif
}
if (dlsch->rnti!=0xffff) LOG_D(PHY,"Generating DLSCH/PDSCH pdu:%p pdsch_start:%d frame:%d subframe:%d nb_rb:%d rb_alloc:%d Qm:%d Nl:%d round:%d\n",
dlsch_harq->pdu,dlsch_harq->pdsch_start,frame,subframe,dlsch_harq->nb_rb,dlsch_harq->rb_alloc[0],dlsch_harq->Qm,dlsch_harq->Nl,dlsch_harq->round);
if (dlsch->rnti!=0xffff)
LOG_D(PHY,"Generating DLSCH/PDSCH pdu:%p pdsch_start:%d frame:%d subframe:%d nb_rb:%d rb_alloc:%d Qm:%d Nl:%d round:%d\n",
dlsch_harq->pdu,dlsch_harq->pdsch_start,frame,subframe,dlsch_harq->nb_rb,dlsch_harq->rb_alloc[0],
dlsch_harq->Qm,dlsch_harq->Nl,dlsch_harq->round);
// 36-212
if (NFAPI_MODE==NFAPI_MONOLITHIC || NFAPI_MODE==NFAPI_MODE_PNF) { // monolthic OR PNF - do not need turbo encoding on VNF
if (dlsch_harq->pdu==NULL) {
LOG_E(PHY,"dlsch_harq->pdu == NULL SFN/SF:%04d%d dlsch[rnti:%x] dlsch_harq[pdu:%p pdsch_start:%d Qm:%d Nl:%d round:%d nb_rb:%d rb_alloc[0]:%d]\n", frame,subframe,dlsch->rnti, dlsch_harq->pdu,
dlsch_harq->pdsch_start,dlsch_harq->Qm,dlsch_harq->Nl,dlsch_harq->round,dlsch_harq->nb_rb,dlsch_harq->rb_alloc[0]);
return;
return false;
}
start_meas(&eNB->dlsch_encoding_stats);
@@ -331,44 +310,57 @@ void pdsch_procedures(PHY_VARS_eNB *eNB,
if(eNB->dlsch_encoding_stats.p_time>500*3000 && opp_enabled == 1) {
print_meas_now(&eNB->dlsch_encoding_stats,"total coding",stderr);
}
// 36-211
start_meas(&eNB->dlsch_scrambling_stats);
dlsch_scrambling(fp,
0,
dlsch,
harq_pid,
get_G(fp,
dlsch_harq->nb_rb,
dlsch_harq->rb_alloc,
dlsch_harq->Qm,
dlsch_harq->Nl,
dlsch_harq->pdsch_start,
frame,subframe,
0),
0,
frame,
subframe<<1);
stop_meas(&eNB->dlsch_scrambling_stats);
start_meas(&eNB->dlsch_modulation_stats);
dlsch_modulation(eNB,
eNB->common_vars.txdataF,
AMP,
frame,
subframe,
dlsch_harq->pdsch_start,
dlsch,
dlsch->ue_type==0 ? dlsch1 : (LTE_eNB_DLSCH_t *)NULL);
stop_meas(&eNB->dlsch_modulation_stats);
}
#ifdef PHY_TX_THREAD
dlsch->active[subframe] = 0;
dlsch->active[subframe] = 0;
#else
dlsch->active = 0;
dlsch->active = 0;
#endif
dlsch_harq->round++;
LOG_D(PHY,"Generating DLSCH/PDSCH dlsch_harq[round:%d]\n",dlsch_harq->round);
dlsch_harq->round++;
LOG_D(PHY,"Generated DLSCH dlsch_harq[round:%d]\n",dlsch_harq->round);
return true;
}
return false;
}
void pdsch_procedures(PHY_VARS_eNB *eNB,
L1_rxtx_proc_t *proc,
int harq_pid,
LTE_eNB_DLSCH_t *dlsch,
LTE_eNB_DLSCH_t *dlsch1) {
int frame=proc->frame_tx;
int subframe=proc->subframe_tx;
LTE_DL_eNB_HARQ_t *dlsch_harq=dlsch->harq_processes[harq_pid];
LTE_DL_FRAME_PARMS *fp=&eNB->frame_parms;
// 36-211
start_meas(&eNB->dlsch_scrambling_stats);
dlsch_scrambling(fp,
0,
dlsch,
harq_pid,
get_G(fp,
dlsch_harq->nb_rb,
dlsch_harq->rb_alloc,
dlsch_harq->Qm,
dlsch_harq->Nl,
dlsch_harq->pdsch_start,
frame,subframe,
0),
0,
frame,
subframe<<1);
stop_meas(&eNB->dlsch_scrambling_stats);
start_meas(&eNB->dlsch_modulation_stats);
dlsch_modulation(eNB,
eNB->common_vars.txdataF,
AMP,
frame,
subframe,
dlsch_harq->pdsch_start,
dlsch,
dlsch->ue_type==0 ? dlsch1 : (LTE_eNB_DLSCH_t *)NULL);
stop_meas(&eNB->dlsch_modulation_stats);
LOG_D(PHY,"Generated PDSCH dlsch_harq[round:%d]\n",dlsch_harq->round);
}
@@ -532,14 +524,18 @@ void phy_procedures_eNB_TX(PHY_VARS_eNB *eNB,
dlsch0->harq_ids[frame%2][6],
dlsch0->harq_ids[frame%2][7]);
} else {
// generate pdsch
pdsch_procedures(eNB,
if (dlsch_procedures(eNB,
proc,
harq_pid,
dlsch0,
dlsch1,
&eNB->UE_stats[(uint32_t)UE_id],
0);
&eNB->UE_stats[(uint32_t)UE_id])) {
// if we generate dlsch, we must generate pdsch
pdsch_procedures(eNB,
proc,
harq_pid,
dlsch0,
dlsch1);
}
}
} else if ((dlsch0)&&(dlsch0->rnti>0)&&
#ifdef PHY_TX_THREAD
+32 -6
View File
@@ -72,12 +72,13 @@ void feptx0(RU_t *ru,
LTE_DL_FRAME_PARMS *fp = ru->frame_parms;
//int dummy_tx_b[7680*2] __attribute__((aligned(32)));
unsigned int aa,slot_offset;
unsigned int aa, slot_offset;
int slot_sizeF = (fp->ofdm_symbol_size) * ((fp->Ncp==1) ? 6 : 7);
int subframe = ru->proc.tti_tx;
//VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_OFDM+slot , 1 );
slot_offset = slot*(fp->samples_per_tti>>1);
slot_offset = slot*(fp->samples_per_tti>>1); //slot_offset = subframe*fp->samples_per_tti + (slot*(fp->samples_per_tti>>1));
//LOG_D(PHY,"SFN/SF:RU:TX:%d/%d Generating slot %d\n",ru->proc.frame_tx, ru->proc.subframe_tx,slot);
@@ -88,10 +89,35 @@ void feptx0(RU_t *ru,
6,
fp->nb_prefix_samples,
CYCLIC_PREFIX);
else normal_prefix_mod(&ru->common.txdataF_BF[aa][(slot&1)*slot_sizeF],
(int*)&ru->common.txdata[aa][slot_offset],
7,
fp);
else {
/* AssertFatal(ru->generate_dmrs_sync==1 && (fp->frame_type != TDD || ru->is_slave == 1),
"ru->generate_dmrs_sync should not be set, frame_type %d, is_slave %d\n",
fp->frame_type,ru->is_slave);
*/
int num_symb = 7;
if (subframe_select(fp,subframe) == SF_S) num_symb=fp->dl_symbols_in_S_subframe+1;
if (ru->generate_dmrs_sync == 1 && slot == 0 && subframe == 1 && aa==0) {
//int32_t dmrs[ru->frame_parms.ofdm_symbol_size*14] __attribute__((aligned(32)));
//int32_t *dmrsp[2] ={dmrs,NULL}; //{&dmrs[(3-ru->frame_parms.Ncp)*ru->frame_parms.ofdm_symbol_size],NULL};
generate_drs_pusch((PHY_VARS_UE *)NULL,
(UE_rxtx_proc_t*)NULL,
fp,
ru->common.txdataF_BF,
0,
AMP,
0,
0,
fp->N_RB_DL,
aa);
}
normal_prefix_mod(&ru->common.txdataF_BF[aa][(slot&1)*slot_sizeF],
(int*)&ru->common.txdata[aa][slot_offset],
num_symb,
fp);
}
/*
len = fp->samples_per_tti>>1;
+1 -1
View File
@@ -2468,7 +2468,7 @@ void phy_procedures_nrUE_TX(PHY_VARS_NR_UE *ue,
uint8_t gNB_id,
uint8_t thread_id)
{
NR_DL_FRAME_PARMS *frame_parms=&ue->frame_parms;
//NR_DL_FRAME_PARMS *frame_parms=&ue->frame_parms;
NR_UE_ULSCH_t *ulsch_ue;
NR_UL_UE_HARQ_t *harq_process_ul_ue;
//int32_t ulsch_start=0;
+1 -2
View File
@@ -917,8 +917,7 @@ int main(int argc, char **argv) {
if (transmission_mode>1) pa=dBm3;
printf("dlsim: tmode %d, pa %d\n",transmission_mode,pa);
AssertFatal(load_configmodule(argc,argv, CONFIG_ENABLECMDLINEONLY) != NULL,
"cannot load configuration module, exiting\n");
AssertFatal(load_configmodule(argc,argv, CONFIG_ENABLECMDLINEONLY) != NULL, "Cannot load configuration module, exiting\n");
logInit();
set_glog_onlinelog(true);
// enable these lines if you need debug info
+1 -2
View File
@@ -393,8 +393,7 @@ int main(int argc, char **argv) {
cpuf = cpu_freq_GHz;
set_parallel_conf("PARALLEL_SINGLE_THREAD");
printf("Detected cpu_freq %f GHz\n",cpu_freq_GHz);
AssertFatal(load_configmodule(argc,argv,CONFIG_ENABLECMDLINEONLY) != NULL,
"cannot load configuration module, exiting\n");
AssertFatal(load_configmodule(argc,argv,CONFIG_ENABLECMDLINEONLY) != NULL, "Cannot load configuration module, exiting\n");
logInit();
set_glog(OAILOG_WARNING);
T_stdout = 1;
+1 -1
View File
@@ -170,7 +170,7 @@ int main(int argc, char **argv) {
cpuf = get_cpu_freq_GHz();
if (load_configmodule(argc, argv, CONFIG_ENABLECMDLINEONLY) == 0) {
exit_fun("[SOFTMODEM] Error, configuration module init failed\n");
exit_fun("[NR_DLSCHSIM] Error, configuration module init failed\n");
}
//logInit();
+1 -1
View File
@@ -196,7 +196,7 @@ int main(int argc, char **argv)
cpuf = get_cpu_freq_GHz();
if ( load_configmodule(argc,argv,CONFIG_ENABLECMDLINEONLY) == 0) {
exit_fun("[SOFTMODEM] Error, configuration module init failed\n");
exit_fun("[NR_DLSIM] Error, configuration module init failed\n");
}
randominit(0);
+1 -1
View File
@@ -146,7 +146,7 @@ int main(int argc, char **argv)
cpuf = get_cpu_freq_GHz();
if ( load_configmodule(argc,argv,CONFIG_ENABLECMDLINEONLY) == 0) {
exit_fun("[SOFTMODEM] Error, configuration module init failed\n");
exit_fun("[NR_PBCHSIM] Error, configuration module init failed\n");
}
randominit(0);
+18 -18
View File
@@ -104,7 +104,7 @@ int main(int argc, char **argv)
uint64_t SSB_positions=0x01;
channel_desc_t *gNB2UE;
int format=0;
uint8_t extended_prefix_flag=0;
//uint8_t extended_prefix_flag=0;
FILE *input_fd=NULL;
uint8_t nacktoack_flag=0;
int16_t amp=0x7FFF;
@@ -121,20 +121,22 @@ int main(int argc, char **argv)
int N_RB_DL=273,mu=1;
float target_error_rate=0.01;
int frame_length_complex_samples;
int frame_length_complex_samples_no_prefix;
//int frame_length_complex_samples_no_prefix;
NR_DL_FRAME_PARMS *frame_parms;
unsigned char frame_type = 0;
//unsigned char frame_type = 0;
int loglvl=OAILOG_WARNING;
cpuf = get_cpu_freq_GHz();
if ( load_configmodule(argc,argv) == 0) {
exit_fun("[SOFTMODEM] Error, configuration module init failed\n");
if ( load_configmodule(argc,argv,CONFIG_ENABLECMDLINEONLY) == 0) {
exit_fun("[NR_PUCCHSIM] Error, configuration module init failed\n");
}
randominit(0);
logInit();
set_glog(loglvl);
while ((c = getopt (argc, argv, "f:hA:pf:g:i:P:b:T:n:o:s:S:t:x:y:z:N:F:GR:d:IL")) != -1) {
while ((c = getopt (argc, argv, "f:hA:f:g:i:P:b:T:n:o:s:S:x:y:z:N:F:GR:IL")) != -1) {
switch (c) {
case 'f':
//write_output_file=1;
@@ -146,9 +148,7 @@ int main(int argc, char **argv)
}
break;
case 'd':
frame_type = 1;
break;
case 'g':
switch((char)*optarg) {
@@ -207,16 +207,19 @@ int main(int argc, char **argv)
break;
/*
case 't':
case 't':
Td= atof(optarg);
break;
*/
case 'p':
extended_prefix_flag=1;
break;
/*
case 'r':
case 'd':
frame_type = 1;
break;
case 'r':
ricean_factor = pow(10,-.1*atof(optarg));
if (ricean_factor>1) {
printf("Ricean factor must be between 0 and 1\n");
@@ -317,10 +320,7 @@ int main(int argc, char **argv)
exit (-1);
break;
}
}
logInit();
set_glog(loglvl);
T_stdout = 1;
}
if (snr1set==0) snr1 = snr0+10;
@@ -386,7 +386,7 @@ int main(int argc, char **argv)
}
frame_length_complex_samples = frame_parms->samples_per_subframe*NR_NUMBER_OF_SUBFRAMES_PER_FRAME;
frame_length_complex_samples_no_prefix = frame_parms->samples_per_subframe_wCP;
//frame_length_complex_samples_no_prefix = frame_parms->samples_per_subframe_wCP;
s_re = malloc(2*sizeof(double*));
s_im = malloc(2*sizeof(double*));
+1 -1
View File
@@ -135,7 +135,7 @@ int main(int argc, char **argv) {
cpuf = get_cpu_freq_GHz();
if (load_configmodule(argc, argv, CONFIG_ENABLECMDLINEONLY) == 0) {
exit_fun("[SOFTMODEM] Error, configuration module init failed\n");
exit_fun("[NR_ULSCHSIM] Error, configuration module init failed\n");
}
//logInit();
+3 -3
View File
@@ -188,7 +188,7 @@ int main(int argc, char **argv) {
if ( load_configmodule(argc,argv,CONFIG_ENABLECMDLINEONLY) == 0 ) {
exit_fun("[SOFTMODEM] Error, configuration module init failed\n");
exit_fun("[NR_ULSIM] Error, configuration module init failed\n");
}
//logInit();
@@ -477,17 +477,17 @@ int main(int argc, char **argv) {
rel15_ul->ulsch_pdu_rel15.n_layers = precod_nbr_layers;
///////////////////////////////////////////////////
nr_scheduled_response_t scheduled_response;
fapi_nr_ul_config_request_t ul_config;
//fapi_nr_tx_request_t tx_request;
/*nr_scheduled_response_t scheduled_response;
scheduled_response.module_id = 0;
scheduled_response.CC_id = 0;
scheduled_response.frame = frame;
scheduled_response.slot = slot;
scheduled_response.dl_config = NULL;
scheduled_response.ul_config = &ul_config;
scheduled_response.dl_config = NULL;
scheduled_response.dl_config = NULL;*/
ul_config.sfn_slot = slot;
+13 -21
View File
@@ -40,7 +40,6 @@
#include "PHY_INTERFACE/phy_interface_extern.h"
#include "UTIL/OCG/OCG.h"
#include "UTIL/OPT/opt.h" // to test OPT
#include "UTIL/FIFO/types.h"
#define RF
@@ -48,19 +47,16 @@
//#define DEBUG_SIM 1
void do_DL_sig(sim_t *sim,
uint16_t subframe,
uint32_t offset,
uint32_t length,
uint8_t abstraction_flag,LTE_DL_FRAME_PARMS *ue_frame_parms,
uint8_t UE_id,
int CC_id)
uint16_t subframe,
uint32_t offset,
uint32_t length,
uint8_t abstraction_flag,
LTE_DL_FRAME_PARMS *ue_frame_parms,
uint8_t UE_id,
int CC_id)
{
int32_t **txdata,**rxdata;
uint32_t ru_id=0;
double tx_pwr;
double rx_pwr;
@@ -301,13 +297,14 @@ void do_DL_sig(sim_t *sim,
}
void do_UL_sig(sim_t *sim,
uint16_t subframe,uint8_t abstraction_flag,LTE_DL_FRAME_PARMS *frame_parms,
uint32_t frame,int ru_id,uint8_t CC_id)
uint16_t subframe,
uint8_t abstraction_flag,
LTE_DL_FRAME_PARMS *frame_parms,
uint32_t frame,
int ru_id,
uint8_t CC_id)
{
int32_t **txdata,**rxdata;
uint8_t UE_id=0;
@@ -477,9 +474,4 @@ void do_UL_sig(sim_t *sim,
UNUSED_VARIABLE(rx_pwr);
UNUSED_VARIABLE(rx_pwr2);
#endif
}
@@ -1204,6 +1204,10 @@ channel_desc_t *new_channel_desc_scm(uint8_t nb_tx,
return(chan_desc);
}
void free_channel_desc_scm(channel_desc_t * ch) {
// Must be made cleanly, a lot of leaks...
free(ch);
}
int random_channel(channel_desc_t *desc, uint8_t abstraction_flag) {