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This commit is contained in:
laurent
2022-09-28 10:35:47 +02:00
parent e87c3758ef a1de5e3d11
commit e8be155c08
210 changed files with 9084 additions and 4465 deletions
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openair2/ENB_APP/NB_IoT_config.c
+1 -1
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@@ -39,7 +39,7 @@
#include "SystemInformationBlockType2.h"
#include "PHY/phy_extern.h"
#include "targets/ARCH/ETHERNET/USERSPACE/LIB/ethernet_lib.h"
#include "sdr/ETHERNET/USERSPACE/LIB/ethernet_lib.h"
#include "common/config/config_userapi.h"
#include "RRC_config_tools.h"
#include "RRC_paramsvalues.h"
openair2/ENB_APP/enb_config.c
+1 -1
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@@ -46,7 +46,7 @@
#include "LAYER2/MAC/mac_proto.h"
#include "PHY/phy_extern.h"
#include "PHY/INIT/phy_init.h"
#include "targets/ARCH/ETHERNET/USERSPACE/LIB/ethernet_lib.h"
#include "sdr/ETHERNET/USERSPACE/LIB/ethernet_lib.h"
#include "nfapi_vnf.h"
#include "nfapi_pnf.h"
#include "targets/RT/USER/lte-softmodem.h"
openair2/ENB_APP/enb_paramdef.h
+24
View File
@@ -105,11 +105,23 @@ typedef enum {
#define CONFIG_STRING_RU_NR_SCS_FOR_RASTER "nr_scs_for_raster"
#define CONFIG_STRING_RU_TX_SUBDEV "tx_subdev"
#define CONFIG_STRING_RU_RX_SUBDEV "rx_subdev"
#define CONFIG_STRING_RU_RXFH_CORE_ID "rxfh_core_id"
#define CONFIG_STRING_RU_TXFH_CORE_ID "txfh_core_id"
#define CONFIG_STRING_RU_TP_CORES "tp_cores"
#define CONFIG_STRING_RU_NUM_TP_CORES "num_tp_cores"
#define CONFIG_STRING_RU_NUM_INTERFACES "num_interfaces"
#define CONFIG_STRING_RU_HALF_SLOT_PARALLELIZATION "half_slot_parallelization"
#define HLP_RU_SF_AHEAD "LTE TX processing advance"
#define HLP_RU_SL_AHEAD "NR TX processing advance"
#define HLP_RU_NR_FLAG "Use NR numerology (for AW2SORI)"
#define HLP_RU_NR_SCS_FOR_RASTER "NR SCS for raster (for AW2SORI)"
#define HLP_RU_RXFH_CORE_ID "Core ID for RX Fronthaul thread (ECPRI IF5)"
#define HLP_RU_TXFH_CORE_ID "Core ID for TX Fronthaul thread (ECPRI IF5)"
#define HLP_RU_TP_CORES "List of cores for RU ThreadPool"
#define HLP_RU_NUM_TP_CORES "Number of cores for RU ThreadPool"
#define HLP_RU_NUM_INTERFACES "Number of network interfaces for RU"
#define HLP_RU_HALF_SLOT_PARALLELIZATION "run half slots in parallel in RU FEP"
#define RU_LOCAL_IF_NAME_IDX 0
#define RU_LOCAL_ADDRESS_IDX 1
@@ -146,6 +158,12 @@ typedef enum {
#define RU_NR_SCS_FOR_RASTER 32
#define RU_TX_SUBDEV 33
#define RU_RX_SUBDEV 34
#define RU_RXFH_CORE_ID 33
#define RU_TXFH_CORE_ID 34
#define RU_TP_CORES 35
#define RU_NUM_TP_CORES 36
#define RU_NUM_INTERFACES 37
#define RU_HALF_SLOT_PARALLELIZATION 38
/*-----------------------------------------------------------------------------------------------------------------------------------------*/
/* RU configuration parameters */
/* optname helpstr paramflags XXXptr defXXXval type numelt */
@@ -186,6 +204,12 @@ typedef enum {
{CONFIG_STRING_RU_NR_SCS_FOR_RASTER, HLP_RU_NR_SCS_FOR_RASTER, 0, iptr:NULL, defintval:1, TYPE_INT, 0}, \
{CONFIG_STRING_RU_TX_SUBDEV, NULL, 0, strptr:NULL, defstrval:"", TYPE_STRING, 0}, \
{CONFIG_STRING_RU_RX_SUBDEV, NULL, 0, strptr:NULL, defstrval:"", TYPE_STRING, 0}, \
{CONFIG_STRING_RU_RXFH_CORE_ID, HLP_RU_RXFH_CORE_ID, 0, uptr:NULL, defintval:0, TYPE_UINT, 0}, \
{CONFIG_STRING_RU_TXFH_CORE_ID, HLP_RU_TXFH_CORE_ID, 0, uptr:NULL, defintval:0, TYPE_UINT, 0}, \
{CONFIG_STRING_RU_TP_CORES, HLP_RU_TP_CORES, 0, uptr:NULL, defintarrayval:DEFRUTPCORES, TYPE_INTARRAY, 8}, \
{CONFIG_STRING_RU_NUM_TP_CORES, HLP_RU_NUM_TP_CORES, 0, uptr:NULL, defintval:2, TYPE_UINT, 0}, \
{CONFIG_STRING_RU_NUM_INTERFACES, HLP_RU_NUM_INTERFACES, 0, uptr:NULL, defintval:1, TYPE_UINT, 0}, \
{CONFIG_STRING_RU_HALF_SLOT_PARALLELIZATION, HLP_RU_HALF_SLOT_PARALLELIZATION, 0, uptr:NULL, defintval:1, TYPE_UINT, 0}, \
}
/*---------------------------------------------------------------------------------------------------------------------------------------*/