Merge branch 'develop' into feature-merge-merge-f68
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@@ -1640,9 +1640,11 @@ assign_max_mcs_min_rb(module_id_t module_idP, int slice_id, int frameP,
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to_prb(RC.mac[module_idP]->common_channels[CC_id].
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ul_Bandwidth);
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// if this UE has UL traffic
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if (UE_template->ul_total_buffer > 0) {
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int bytes_to_schedule = UE_template->estimated_ul_buffer - UE_template->scheduled_ul_bytes;
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if (bytes_to_schedule < 0) bytes_to_schedule = 0;
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int bits_to_schedule = bytes_to_schedule * 8;
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if (bits_to_schedule > 0) {
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tbs = get_TBS_UL(mcs, 3) << 3; // 1 or 2 PRB with cqi enabled does not work well!
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rb_table_index = 2;
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@@ -1652,7 +1654,7 @@ assign_max_mcs_min_rb(module_id_t module_idP, int slice_id, int frameP,
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Ncp, 0);
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while ((((UE_template->phr_info - tx_power) < 0)
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|| (tbs > UE_template->ul_total_buffer))
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|| (tbs > bits_to_schedule))
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&& (mcs > 3)) {
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// LOG_I(MAC,"UE_template->phr_info %d tx_power %d mcs %d\n", UE_template->phr_info,tx_power, mcs);
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mcs--;
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@@ -1660,7 +1662,7 @@ assign_max_mcs_min_rb(module_id_t module_idP, int slice_id, int frameP,
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tx_power = estimate_ue_tx_power(tbs, rb_table[rb_table_index], 0, Ncp, 0); // fixme: set use_srs
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}
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while ((tbs < UE_template->ul_total_buffer) &&
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while ((tbs < bits_to_schedule) &&
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(rb_table[rb_table_index] <
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(N_RB_UL - first_rb[CC_id]))
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&& ((UE_template->phr_info - tx_power) > 0)
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@@ -1750,11 +1752,14 @@ static int ue_ul_compare(const void *_a, const void *_b, void *_params)
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UE_list->UE_template[pCCid2][UE_id2].ul_buffer_info[LCGID0])
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return 1;
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if (UE_list->UE_template[pCCid1][UE_id1].ul_total_buffer >
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UE_list->UE_template[pCCid2][UE_id2].ul_total_buffer)
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int bytes_to_schedule1 = UE_list->UE_template[pCCid1][UE_id1].estimated_ul_buffer - UE_list->UE_template[pCCid1][UE_id1].scheduled_ul_bytes;
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if (bytes_to_schedule1 < 0) bytes_to_schedule1 = 0;
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int bytes_to_schedule2 = UE_list->UE_template[pCCid2][UE_id2].estimated_ul_buffer - UE_list->UE_template[pCCid2][UE_id2].scheduled_ul_bytes;
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if (bytes_to_schedule2 < 0) bytes_to_schedule2 = 0;
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if (bytes_to_schedule1 > bytes_to_schedule2)
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return -1;
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if (UE_list->UE_template[pCCid1][UE_id1].ul_total_buffer <
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UE_list->UE_template[pCCid2][UE_id2].ul_total_buffer)
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if (bytes_to_schedule1 < bytes_to_schedule2)
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return 1;
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if (UE_list->UE_template[pCCid1][UE_id1].pre_assigned_mcs_ul >
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