improving also pusch dmrs init
This commit is contained in:
@@ -179,9 +179,10 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
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}
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}
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}
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uint32_t Nid_pusch[2] = {cfg->cell_config.phy_cell_id.value,cfg->cell_config.phy_cell_id.value};
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for (int nscid=0; nscid<2; nscid++) {
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LOG_D(PHY,"Initializing PUSCH DMRS Gold sequence with (%x,%x)\n",Nid_pusch[0],Nid_pusch[1]);
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gNB->pusch_gold_init[nscid] = cfg->cell_config.phy_cell_id.value;
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nr_gold_pusch(gNB, &Nid_pusch[0]);
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nr_gold_pusch(gNB, nscid, gNB->pusch_gold_init[nscid]);
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}
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//CSI RS init
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//CSI RS init
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gNB->nr_gold_csi_rs = (uint32_t ***)malloc16(fp->slots_per_frame*sizeof(uint32_t **));
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gNB->nr_gold_csi_rs = (uint32_t ***)malloc16(fp->slots_per_frame*sizeof(uint32_t **));
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@@ -165,6 +165,11 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
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//------------------generate DMRS------------------//
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//------------------generate DMRS------------------//
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if(pusch_pdu->ul_dmrs_scrambling_id != gNB->pusch_gold_init[pusch_pdu->scid]) {
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gNB->pusch_gold_init[pusch_pdu->scid] = pusch_pdu->ul_dmrs_scrambling_id;
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nr_gold_pusch(gNB, pusch_pdu->scid, pusch_pdu->ul_dmrs_scrambling_id);
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}
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// transform precoding = 1 means disabled
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// transform precoding = 1 means disabled
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if (pusch_pdu->transform_precoding == 1) {
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if (pusch_pdu->transform_precoding == 1) {
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nr_pusch_dmrs_rx(gNB, Ns, gNB->nr_gold_pusch_dmrs[pusch_pdu->scid][Ns][symbol], &pilot[0], 1000, 0, nb_rb_pusch,
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nr_pusch_dmrs_rx(gNB, Ns, gNB->nr_gold_pusch_dmrs[pusch_pdu->scid][Ns][symbol], &pilot[0], 1000, 0, nb_rb_pusch,
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@@ -1247,4 +1252,4 @@ int nr_srs_channel_estimation(PHY_VARS_gNB *gNB,
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#endif
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#endif
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return 0;
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return 0;
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}
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}
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@@ -100,27 +100,23 @@ void nr_init_pdsch_dmrs(PHY_VARS_gNB* gNB, uint8_t nscid, uint32_t Nid)
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}
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}
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void nr_gold_pusch(PHY_VARS_gNB* gNB, uint32_t *Nid) {
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void nr_gold_pusch(PHY_VARS_gNB* gNB, int nscid, uint32_t nid) {
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unsigned char ns;
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unsigned char ns;
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unsigned int n,x1,x2;
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unsigned int n,x1,x2;
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int nscid, reset;
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int reset;
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unsigned int nid;
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NR_DL_FRAME_PARMS *fp = &gNB->frame_parms;
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NR_DL_FRAME_PARMS *fp = &gNB->frame_parms;
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unsigned short l;
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unsigned short l;
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for (nscid=0; nscid<2; nscid++) {
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for (ns=0; ns<fp->slots_per_frame; ns++) {
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nid = Nid[nscid];
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for (l=0; l<fp->symbols_per_slot; l++) {
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for (ns=0; ns<fp->slots_per_frame; ns++) {
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reset = 1;
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for (l=0; l<fp->symbols_per_slot; l++) {
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x2 = ((1<<17) * (fp->symbols_per_slot*ns+l+1) * ((nid<<1)+1) +((nid<<1)+nscid));
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reset = 1;
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LOG_D(PHY,"DMRS slot %d, symb %d x2 %x\n",ns,l,x2);
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x2 = ((1<<17) * (fp->symbols_per_slot*ns+l+1) * ((nid<<1)+1) +((nid<<1)+nscid));
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LOG_D(PHY,"DMRS slot %d, symb %d x2 %x\n",ns,l,x2);
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for (n=0; n<NR_MAX_PUSCH_DMRS_INIT_LENGTH_DWORD; n++) {
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for (n=0; n<NR_MAX_PUSCH_DMRS_INIT_LENGTH_DWORD; n++) {
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gNB->nr_gold_pusch_dmrs[nscid][ns][l][n] = lte_gold_generic(&x1, &x2, reset);
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gNB->nr_gold_pusch_dmrs[nscid][ns][l][n] = lte_gold_generic(&x1, &x2, reset);
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reset = 0;
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reset = 0;
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}
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}
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}
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}
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}
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}
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}
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@@ -40,7 +40,7 @@ void nr_init_pdcch_dmrs(PHY_VARS_gNB* gNB, uint32_t Nid);
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void nr_init_pdsch_dmrs(PHY_VARS_gNB* gNB, uint8_t nscid, uint32_t Nid);
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void nr_init_pdsch_dmrs(PHY_VARS_gNB* gNB, uint8_t nscid, uint32_t Nid);
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void nr_init_csi_rs(PHY_VARS_gNB* gNB, uint32_t Nid);
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void nr_init_csi_rs(PHY_VARS_gNB* gNB, uint32_t Nid);
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void nr_gold_pusch(PHY_VARS_gNB* gNB, uint32_t *Nid);
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void nr_gold_pusch(PHY_VARS_gNB* gNB, int nscid, uint32_t nid);
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int nr_pusch_dmrs_rx(PHY_VARS_gNB *gNB,
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int nr_pusch_dmrs_rx(PHY_VARS_gNB *gNB,
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unsigned int Ns,
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unsigned int Ns,
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@@ -850,6 +850,7 @@ typedef struct PHY_VARS_gNB_s {
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int csi_gold_init;
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int csi_gold_init;
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int pdcch_gold_init;
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int pdcch_gold_init;
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int pdsch_gold_init[2];
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int pdsch_gold_init[2];
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int pusch_gold_init[2];
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int pucch0_thres;
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int pucch0_thres;
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int pusch_thres;
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int pusch_thres;
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