rework the ul_config_request data structure: put the mutex in correct place and encapsulate the struct management in access API, remove internal storage visibility
This commit is contained in:
Laurent THOMAS
@@ -104,192 +104,182 @@ int8_t nr_ue_scheduled_response_stub(nr_scheduled_response_t *scheduled_response
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NR_UE_MAC_INST_t *mac = get_mac_inst(0);
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if(scheduled_response != NULL) {
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if (scheduled_response->ul_config != NULL) {
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int frame = scheduled_response->ul_config->frame;
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int slot = scheduled_response->ul_config->slot;
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fapi_nr_ul_config_request_t *ul_config = scheduled_response->ul_config;
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AssertFatal(ul_config->number_pdus < sizeof(ul_config->ul_config_list) / sizeof(ul_config->ul_config_list[0]),
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"Too many ul_config pdus %d", ul_config->number_pdus);
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for (int i = 0; i < ul_config->number_pdus; ++i) {
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LOG_D(NR_PHY, "In %s: processing type %d PDU of %d total UL PDUs (ul_config %p) \n",
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__FUNCTION__, ul_config->ul_config_list[i].pdu_type, ul_config->number_pdus, ul_config);
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if (scheduled_response && scheduled_response->ul_config) {
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int frame = scheduled_response->ul_config->frame;
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int slot = scheduled_response->ul_config->slot;
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fapi_nr_ul_config_request_pdu_t *it = fapiLockIterator(scheduled_response->ul_config, frame, slot);
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while (it->pdu_type != FAPI_NR_END) {
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switch (it->pdu_type) {
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case FAPI_NR_UL_CONFIG_TYPE_PRACH: {
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fapi_nr_ul_config_prach_pdu *prach_pdu = &it->prach_config_pdu;
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nfapi_nr_rach_indication_t *rach_ind = CALLOC(1, sizeof(*rach_ind));
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rach_ind->sfn = frame;
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rach_ind->slot = slot;
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rach_ind->header.message_id = NFAPI_NR_PHY_MSG_TYPE_RACH_INDICATION;
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uint8_t pdu_index = 0;
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rach_ind->pdu_list = CALLOC(1, sizeof(*rach_ind->pdu_list));
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rach_ind->number_of_pdus = 1;
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rach_ind->pdu_list[pdu_index].phy_cell_id = prach_pdu->phys_cell_id;
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rach_ind->pdu_list[pdu_index].symbol_index = prach_pdu->prach_start_symbol;
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rach_ind->pdu_list[pdu_index].slot_index = prach_pdu->prach_slot;
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rach_ind->pdu_list[pdu_index].freq_index = prach_pdu->num_ra;
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rach_ind->pdu_list[pdu_index].avg_rssi = 128;
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rach_ind->pdu_list[pdu_index].avg_snr = 0xff; // invalid for now
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rach_ind->pdu_list[pdu_index].num_preamble = 1;
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const int num_p = rach_ind->pdu_list[pdu_index].num_preamble;
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rach_ind->pdu_list[pdu_index].preamble_list = calloc(num_p, sizeof(nfapi_nr_prach_indication_preamble_t));
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rach_ind->pdu_list[pdu_index].preamble_list[0].preamble_index = prach_pdu->ra_PreambleIndex;
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rach_ind->pdu_list[pdu_index].preamble_list[0].timing_advance = 0;
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rach_ind->pdu_list[pdu_index].preamble_list[0].preamble_pwr = 0xffffffff;
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uint8_t pdu_type = ul_config->ul_config_list[i].pdu_type;
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switch (pdu_type) {
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case FAPI_NR_UL_CONFIG_TYPE_PRACH: {
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fapi_nr_ul_config_prach_pdu *prach_pdu = &ul_config->ul_config_list[i].prach_config_pdu;
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nfapi_nr_rach_indication_t *rach_ind = CALLOC(1, sizeof(*rach_ind));
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rach_ind->sfn = frame;
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rach_ind->slot = slot;
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rach_ind->header.message_id = NFAPI_NR_PHY_MSG_TYPE_RACH_INDICATION;
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uint8_t pdu_index = 0;
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rach_ind->pdu_list = CALLOC(1, sizeof(*rach_ind->pdu_list));
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rach_ind->number_of_pdus = 1;
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rach_ind->pdu_list[pdu_index].phy_cell_id = prach_pdu->phys_cell_id;
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rach_ind->pdu_list[pdu_index].symbol_index = prach_pdu->prach_start_symbol;
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rach_ind->pdu_list[pdu_index].slot_index = prach_pdu->prach_slot;
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rach_ind->pdu_list[pdu_index].freq_index = prach_pdu->num_ra;
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rach_ind->pdu_list[pdu_index].avg_rssi = 128;
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rach_ind->pdu_list[pdu_index].avg_snr = 0xff; // invalid for now
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rach_ind->pdu_list[pdu_index].num_preamble = 1;
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const int num_p = rach_ind->pdu_list[pdu_index].num_preamble;
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rach_ind->pdu_list[pdu_index].preamble_list = calloc(num_p, sizeof(nfapi_nr_prach_indication_preamble_t));
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rach_ind->pdu_list[pdu_index].preamble_list[0].preamble_index = prach_pdu->ra_PreambleIndex;
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rach_ind->pdu_list[pdu_index].preamble_list[0].timing_advance = 0;
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rach_ind->pdu_list[pdu_index].preamble_list[0].preamble_pwr = 0xffffffff;
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if (!put_queue(&nr_rach_ind_queue, rach_ind)) {
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for (int pdu_index = 0; pdu_index < rach_ind->number_of_pdus; pdu_index++)
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free(rach_ind->pdu_list[pdu_index].preamble_list);
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free(rach_ind->pdu_list);
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free(rach_ind);
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}
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LOG_D(NR_MAC, "We have successfully filled the rach_ind queue with the recently filled rach ind\n");
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break;
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if (!put_queue(&nr_rach_ind_queue, rach_ind)) {
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for (int pdu_index = 0; pdu_index < rach_ind->number_of_pdus; pdu_index++)
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free(rach_ind->pdu_list[pdu_index].preamble_list);
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free(rach_ind->pdu_list);
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free(rach_ind);
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}
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case (FAPI_NR_UL_CONFIG_TYPE_PUSCH): {
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nfapi_nr_rx_data_indication_t *rx_ind = CALLOC(1, sizeof(*rx_ind));
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nfapi_nr_crc_indication_t *crc_ind = CALLOC(1, sizeof(*crc_ind));
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nfapi_nr_ue_pusch_pdu_t *pusch_config_pdu = &ul_config->ul_config_list[i].pusch_config_pdu;
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if (pusch_config_pdu->tx_request_body.pdu) {
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rx_ind->header.message_id = NFAPI_NR_PHY_MSG_TYPE_RX_DATA_INDICATION;
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rx_ind->sfn = frame;
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rx_ind->slot = slot;
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rx_ind->number_of_pdus = 1; // scheduled_response->tx_request->number_of_pdus;
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rx_ind->pdu_list = CALLOC(rx_ind->number_of_pdus, sizeof(*rx_ind->pdu_list));
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for (int j = 0; j < rx_ind->number_of_pdus; j++) {
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fapi_nr_tx_request_body_t *tx_req_body = &pusch_config_pdu->tx_request_body;
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rx_ind->pdu_list[j].handle = pusch_config_pdu->handle;
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rx_ind->pdu_list[j].harq_id = pusch_config_pdu->pusch_data.harq_process_id;
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rx_ind->pdu_list[j].pdu_length = tx_req_body->pdu_length;
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rx_ind->pdu_list[j].pdu = CALLOC(tx_req_body->pdu_length, sizeof(*rx_ind->pdu_list[j].pdu));
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memcpy(rx_ind->pdu_list[j].pdu, tx_req_body->pdu, tx_req_body->pdu_length * sizeof(*rx_ind->pdu_list[j].pdu));
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rx_ind->pdu_list[j].rnti = pusch_config_pdu->rnti;
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/* TODO: Implement channel modeling to abstract TA and CQI. For now,
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we hard code the values below since they are set in L1 and we are
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abstracting L1. */
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rx_ind->pdu_list[j].timing_advance = 31;
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rx_ind->pdu_list[j].ul_cqi = 255;
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}
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crc_ind->header.message_id = NFAPI_NR_PHY_MSG_TYPE_CRC_INDICATION;
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crc_ind->number_crcs = scheduled_response->ul_config->number_pdus;
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crc_ind->sfn = frame;
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crc_ind->slot = slot;
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crc_ind->crc_list = CALLOC(crc_ind->number_crcs, sizeof(*crc_ind->crc_list));
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for (int j = 0; j < crc_ind->number_crcs; j++) {
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crc_ind->crc_list[j].handle = pusch_config_pdu->handle;
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crc_ind->crc_list[j].harq_id = pusch_config_pdu->pusch_data.harq_process_id;
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LOG_D(NR_MAC, "This is the harq pid %d for crc_list[%d]\n", crc_ind->crc_list[j].harq_id, j);
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LOG_D(NR_MAC, "This is sched sfn/sl [%d %d] and crc sfn/sl [%d %d]\n", frame, slot, crc_ind->sfn, crc_ind->slot);
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crc_ind->crc_list[j].num_cb = pusch_config_pdu->pusch_data.num_cb;
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crc_ind->crc_list[j].rnti = pusch_config_pdu->rnti;
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crc_ind->crc_list[j].tb_crc_status = 0;
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crc_ind->crc_list[j].timing_advance = 31;
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crc_ind->crc_list[j].ul_cqi = 255;
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AssertFatal(mac->nr_ue_emul_l1.harq[crc_ind->crc_list[j].harq_id].active_ul_harq_sfn_slot == -1,
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"We did not send an active CRC when we should have!\n");
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mac->nr_ue_emul_l1.harq[crc_ind->crc_list[j].harq_id].active_ul_harq_sfn_slot =
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NFAPI_SFNSLOT2HEX(crc_ind->sfn, crc_ind->slot);
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LOG_D(NR_MAC,
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"This is sched sfn/sl [%d %d] and crc sfn/sl [%d %d] with mcs_index in ul_cqi -> %d\n",
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frame,
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slot,
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crc_ind->sfn,
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crc_ind->slot,
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pusch_config_pdu->mcs_index);
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}
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if (!put_queue(&nr_rx_ind_queue, rx_ind)) {
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LOG_E(NR_MAC, "Put_queue failed for rx_ind\n");
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for (int i = 0; i < rx_ind->number_of_pdus; i++) {
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free(rx_ind->pdu_list[i].pdu);
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rx_ind->pdu_list[i].pdu = NULL;
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}
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free(rx_ind->pdu_list);
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rx_ind->pdu_list = NULL;
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free(rx_ind);
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rx_ind = NULL;
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}
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if (!put_queue(&nr_crc_ind_queue, crc_ind)) {
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LOG_E(NR_MAC, "Put_queue failed for crc_ind\n");
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free(crc_ind->crc_list);
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crc_ind->crc_list = NULL;
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free(crc_ind);
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crc_ind = NULL;
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}
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LOG_D(PHY, "In %s: Filled queue rx/crc_ind which was filled by ulconfig. \n", __FUNCTION__);
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}
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break;
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}
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case FAPI_NR_UL_CONFIG_TYPE_PUCCH: {
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nfapi_nr_uci_indication_t *uci_ind = CALLOC(1, sizeof(*uci_ind));
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uci_ind->header.message_id = NFAPI_NR_PHY_MSG_TYPE_UCI_INDICATION;
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uci_ind->sfn = frame;
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uci_ind->slot = slot;
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uci_ind->num_ucis = 1;
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uci_ind->uci_list = CALLOC(uci_ind->num_ucis, sizeof(*uci_ind->uci_list));
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for (int j = 0; j < uci_ind->num_ucis; j++) {
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LOG_D(NR_MAC, "ul_config->ul_config_list[%d].pucch_config_pdu.n_bit = %d\n", i, ul_config->ul_config_list[i].pucch_config_pdu.n_bit);
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if (ul_config->ul_config_list[i].pucch_config_pdu.n_bit > 3 && mac->nr_ue_emul_l1.num_csi_reports > 0) {
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uci_ind->uci_list[j].pdu_type = NFAPI_NR_UCI_FORMAT_2_3_4_PDU_TYPE;
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uci_ind->uci_list[j].pdu_size = sizeof(nfapi_nr_uci_pucch_pdu_format_2_3_4_t);
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nfapi_nr_uci_pucch_pdu_format_2_3_4_t *pdu_2_3_4 = &uci_ind->uci_list[j].pucch_pdu_format_2_3_4;
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fill_uci_2_3_4(pdu_2_3_4, &ul_config->ul_config_list[i].pucch_config_pdu);
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}
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else {
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nfapi_nr_uci_pucch_pdu_format_0_1_t *pdu_0_1 = &uci_ind->uci_list[j].pucch_pdu_format_0_1;
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uci_ind->uci_list[j].pdu_type = NFAPI_NR_UCI_FORMAT_0_1_PDU_TYPE;
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uci_ind->uci_list[j].pdu_size = sizeof(nfapi_nr_uci_pucch_pdu_format_0_1_t);
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memset(pdu_0_1, 0, sizeof(*pdu_0_1));
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pdu_0_1->handle = 0;
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pdu_0_1->rnti = ul_config->ul_config_list[i].pucch_config_pdu.rnti;
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pdu_0_1->pucch_format = 1;
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pdu_0_1->ul_cqi = 255;
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pdu_0_1->timing_advance = 0;
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pdu_0_1->rssi = 0;
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if (mac->nr_ue_emul_l1.num_harqs > 0) {
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int harq_index = 0;
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pdu_0_1->pduBitmap = 2; // (value->pduBitmap >> 1) & 0x01) == HARQ and (value->pduBitmap) & 0x01) == SR
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pdu_0_1->harq.num_harq = mac->nr_ue_emul_l1.num_harqs;
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pdu_0_1->harq.harq_confidence_level = 0;
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int harq_pid = -1;
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for (int k = 0; k < NR_MAX_HARQ_PROCESSES; k++) {
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if (mac->nr_ue_emul_l1.harq[k].active &&
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mac->nr_ue_emul_l1.harq[k].active_dl_harq_sfn == uci_ind->sfn &&
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mac->nr_ue_emul_l1.harq[k].active_dl_harq_slot == uci_ind->slot) {
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mac->nr_ue_emul_l1.harq[k].active = false;
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harq_pid = k;
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AssertFatal(harq_index < pdu_0_1->harq.num_harq, "Invalid harq_index %d\n", harq_index);
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pdu_0_1->harq.harq_list[harq_index].harq_value = !mac->dl_harq_info[k].ack;
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harq_index++;
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}
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}
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AssertFatal(harq_pid != -1, "No active harq_pid, sfn_slot = %u.%u", uci_ind->sfn, uci_ind->slot);
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}
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}
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}
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LOG_D(NR_PHY, "Sending UCI with %d PDUs in sfn.slot %d/%d\n",
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uci_ind->num_ucis, uci_ind->sfn, uci_ind->slot);
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NR_UL_IND_t ul_info = {
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.uci_ind = *uci_ind,
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};
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send_nsa_standalone_msg(&ul_info, uci_ind->header.message_id);
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free_uci_inds(uci_ind);
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break;
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}
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default:
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LOG_W(NR_MAC, "Unknown ul_config->pdu_type %d\n", pdu_type);
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LOG_D(NR_MAC, "We have successfully filled the rach_ind queue with the recently filled rach ind\n");
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break;
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}
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case (FAPI_NR_UL_CONFIG_TYPE_PUSCH): {
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nfapi_nr_rx_data_indication_t *rx_ind = CALLOC(1, sizeof(*rx_ind));
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nfapi_nr_crc_indication_t *crc_ind = CALLOC(1, sizeof(*crc_ind));
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nfapi_nr_ue_pusch_pdu_t *pusch_config_pdu = &it->pusch_config_pdu;
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if (pusch_config_pdu->tx_request_body.pdu) {
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rx_ind->header.message_id = NFAPI_NR_PHY_MSG_TYPE_RX_DATA_INDICATION;
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rx_ind->sfn = frame;
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rx_ind->slot = slot;
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rx_ind->number_of_pdus = 1;
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rx_ind->pdu_list = CALLOC(rx_ind->number_of_pdus, sizeof(*rx_ind->pdu_list));
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for (int j = 0; j < rx_ind->number_of_pdus; j++) {
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fapi_nr_tx_request_body_t *tx_req_body = &pusch_config_pdu->tx_request_body;
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rx_ind->pdu_list[j].handle = pusch_config_pdu->handle;
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rx_ind->pdu_list[j].harq_id = pusch_config_pdu->pusch_data.harq_process_id;
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rx_ind->pdu_list[j].pdu_length = tx_req_body->pdu_length;
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rx_ind->pdu_list[j].pdu = CALLOC(tx_req_body->pdu_length, sizeof(*rx_ind->pdu_list[j].pdu));
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memcpy(rx_ind->pdu_list[j].pdu, tx_req_body->pdu, tx_req_body->pdu_length * sizeof(*rx_ind->pdu_list[j].pdu));
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rx_ind->pdu_list[j].rnti = pusch_config_pdu->rnti;
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/* TODO: Implement channel modeling to abstract TA and CQI. For now,
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we hard code the values below since they are set in L1 and we are
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abstracting L1. */
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rx_ind->pdu_list[j].timing_advance = 31;
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rx_ind->pdu_list[j].ul_cqi = 255;
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}
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crc_ind->header.message_id = NFAPI_NR_PHY_MSG_TYPE_CRC_INDICATION;
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crc_ind->number_crcs = rx_ind->number_of_pdus;
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crc_ind->sfn = frame;
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crc_ind->slot = slot;
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crc_ind->crc_list = CALLOC(crc_ind->number_crcs, sizeof(*crc_ind->crc_list));
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for (int j = 0; j < crc_ind->number_crcs; j++) {
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crc_ind->crc_list[j].handle = pusch_config_pdu->handle;
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crc_ind->crc_list[j].harq_id = pusch_config_pdu->pusch_data.harq_process_id;
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LOG_D(NR_MAC, "This is the harq pid %d for crc_list[%d]\n", crc_ind->crc_list[j].harq_id, j);
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LOG_D(NR_MAC, "This is sched sfn/sl [%d %d] and crc sfn/sl [%d %d]\n", frame, slot, crc_ind->sfn, crc_ind->slot);
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crc_ind->crc_list[j].num_cb = pusch_config_pdu->pusch_data.num_cb;
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crc_ind->crc_list[j].rnti = pusch_config_pdu->rnti;
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crc_ind->crc_list[j].tb_crc_status = 0;
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crc_ind->crc_list[j].timing_advance = 31;
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crc_ind->crc_list[j].ul_cqi = 255;
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AssertFatal(mac->nr_ue_emul_l1.harq[crc_ind->crc_list[j].harq_id].active_ul_harq_sfn_slot == -1,
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"We did not send an active CRC when we should have!\n");
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mac->nr_ue_emul_l1.harq[crc_ind->crc_list[j].harq_id].active_ul_harq_sfn_slot =
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NFAPI_SFNSLOT2HEX(crc_ind->sfn, crc_ind->slot);
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LOG_D(NR_MAC,
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"This is sched sfn/sl [%d %d] and crc sfn/sl [%d %d] with mcs_index in ul_cqi -> %d\n",
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frame,
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slot,
|
||||
crc_ind->sfn,
|
||||
crc_ind->slot,
|
||||
pusch_config_pdu->mcs_index);
|
||||
}
|
||||
|
||||
if (!put_queue(&nr_rx_ind_queue, rx_ind)) {
|
||||
LOG_E(NR_MAC, "Put_queue failed for rx_ind\n");
|
||||
for (int i = 0; i < rx_ind->number_of_pdus; i++) {
|
||||
free(rx_ind->pdu_list[i].pdu);
|
||||
rx_ind->pdu_list[i].pdu = NULL;
|
||||
}
|
||||
|
||||
free(rx_ind->pdu_list);
|
||||
rx_ind->pdu_list = NULL;
|
||||
free(rx_ind);
|
||||
rx_ind = NULL;
|
||||
}
|
||||
if (!put_queue(&nr_crc_ind_queue, crc_ind)) {
|
||||
LOG_E(NR_MAC, "Put_queue failed for crc_ind\n");
|
||||
free(crc_ind->crc_list);
|
||||
crc_ind->crc_list = NULL;
|
||||
free(crc_ind);
|
||||
crc_ind = NULL;
|
||||
}
|
||||
|
||||
LOG_D(PHY, "In %s: Filled queue rx/crc_ind which was filled by ulconfig. \n", __FUNCTION__);
|
||||
}
|
||||
break;
|
||||
}
|
||||
case FAPI_NR_UL_CONFIG_TYPE_PUCCH: {
|
||||
nfapi_nr_uci_indication_t *uci_ind = CALLOC(1, sizeof(*uci_ind));
|
||||
uci_ind->header.message_id = NFAPI_NR_PHY_MSG_TYPE_UCI_INDICATION;
|
||||
uci_ind->sfn = frame;
|
||||
uci_ind->slot = slot;
|
||||
uci_ind->num_ucis = 1;
|
||||
uci_ind->uci_list = CALLOC(uci_ind->num_ucis, sizeof(*uci_ind->uci_list));
|
||||
for (int j = 0; j < uci_ind->num_ucis; j++) {
|
||||
LOG_D(NR_MAC, "pucch_config_pdu.n_bit = %d\n", it->pucch_config_pdu.n_bit);
|
||||
if (it->pucch_config_pdu.n_bit > 3 && mac->nr_ue_emul_l1.num_csi_reports > 0) {
|
||||
uci_ind->uci_list[j].pdu_type = NFAPI_NR_UCI_FORMAT_2_3_4_PDU_TYPE;
|
||||
uci_ind->uci_list[j].pdu_size = sizeof(nfapi_nr_uci_pucch_pdu_format_2_3_4_t);
|
||||
nfapi_nr_uci_pucch_pdu_format_2_3_4_t *pdu_2_3_4 = &uci_ind->uci_list[j].pucch_pdu_format_2_3_4;
|
||||
fill_uci_2_3_4(pdu_2_3_4, &it->pucch_config_pdu);
|
||||
} else {
|
||||
nfapi_nr_uci_pucch_pdu_format_0_1_t *pdu_0_1 = &uci_ind->uci_list[j].pucch_pdu_format_0_1;
|
||||
uci_ind->uci_list[j].pdu_type = NFAPI_NR_UCI_FORMAT_0_1_PDU_TYPE;
|
||||
uci_ind->uci_list[j].pdu_size = sizeof(nfapi_nr_uci_pucch_pdu_format_0_1_t);
|
||||
memset(pdu_0_1, 0, sizeof(*pdu_0_1));
|
||||
pdu_0_1->handle = 0;
|
||||
pdu_0_1->rnti = it->pucch_config_pdu.rnti;
|
||||
pdu_0_1->pucch_format = 1;
|
||||
pdu_0_1->ul_cqi = 255;
|
||||
pdu_0_1->timing_advance = 0;
|
||||
pdu_0_1->rssi = 0;
|
||||
if (mac->nr_ue_emul_l1.num_harqs > 0) {
|
||||
int harq_index = 0;
|
||||
pdu_0_1->pduBitmap = 2; // (value->pduBitmap >> 1) & 0x01) == HARQ and (value->pduBitmap) & 0x01) == SR
|
||||
pdu_0_1->harq.num_harq = mac->nr_ue_emul_l1.num_harqs;
|
||||
pdu_0_1->harq.harq_confidence_level = 0;
|
||||
int harq_pid = -1;
|
||||
for (int k = 0; k < NR_MAX_HARQ_PROCESSES; k++) {
|
||||
if (mac->nr_ue_emul_l1.harq[k].active && mac->nr_ue_emul_l1.harq[k].active_dl_harq_sfn == uci_ind->sfn
|
||||
&& mac->nr_ue_emul_l1.harq[k].active_dl_harq_slot == uci_ind->slot) {
|
||||
mac->nr_ue_emul_l1.harq[k].active = false;
|
||||
harq_pid = k;
|
||||
AssertFatal(harq_index < pdu_0_1->harq.num_harq, "Invalid harq_index %d\n", harq_index);
|
||||
pdu_0_1->harq.harq_list[harq_index].harq_value = !mac->dl_harq_info[k].ack;
|
||||
harq_index++;
|
||||
}
|
||||
}
|
||||
AssertFatal(harq_pid != -1, "No active harq_pid, sfn_slot = %u.%u", uci_ind->sfn, uci_ind->slot);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
LOG_D(NR_PHY, "Sending UCI with %d PDUs in sfn.slot %d/%d\n", uci_ind->num_ucis, uci_ind->sfn, uci_ind->slot);
|
||||
NR_UL_IND_t ul_info = {
|
||||
.uci_ind = *uci_ind,
|
||||
};
|
||||
send_nsa_standalone_msg(&ul_info, uci_ind->header.message_id);
|
||||
free_uci_inds(uci_ind);
|
||||
break;
|
||||
}
|
||||
|
||||
default:
|
||||
LOG_W(NR_MAC, "Unknown ul_config->pdu_type %d\n", it->pdu_type);
|
||||
break;
|
||||
}
|
||||
scheduled_response->ul_config->number_pdus = 0;
|
||||
it++;
|
||||
}
|
||||
release_ul_config(it, true);
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
@@ -440,114 +430,52 @@ static void nr_ue_scheduled_response_dl(NR_UE_MAC_INST_t *mac,
|
||||
dl_config->number_pdus = 0;
|
||||
}
|
||||
|
||||
static void nr_ue_scheduled_response_ul(PHY_VARS_NR_UE *phy,
|
||||
fapi_nr_ul_config_request_t *ul_config,
|
||||
nr_phy_data_tx_t *phy_data,
|
||||
int module_id,
|
||||
int cc_id)
|
||||
static void nr_ue_scheduled_response_ul(PHY_VARS_NR_UE *phy, fapi_nr_ul_config_request_t *ul_config, nr_phy_data_tx_t *phy_data)
|
||||
{
|
||||
int slot = ul_config->slot;
|
||||
int pdu_done = 0;
|
||||
pthread_mutex_lock(&ul_config->mutex_ul_config);
|
||||
fapi_nr_ul_config_request_pdu_t *pdu = fapiLockIterator(ul_config, ul_config->frame, ul_config->slot);
|
||||
if (!pdu) {
|
||||
LOG_E(NR_MAC, "Error in locking ul scheduler dtata\n");
|
||||
return;
|
||||
}
|
||||
|
||||
LOG_D(PHY,
|
||||
"%d.%d ul S ul_config %p pdu_done %d number_pdus %d\n",
|
||||
ul_config->frame,
|
||||
slot,
|
||||
ul_config,
|
||||
pdu_done,
|
||||
ul_config->number_pdus);
|
||||
for (int i = 0; i < ul_config->number_pdus; ++i) {
|
||||
AssertFatal(ul_config->ul_config_list[i].pdu_type <= FAPI_NR_UL_CONFIG_TYPES,
|
||||
"pdu_type %d out of bounds\n",
|
||||
ul_config->ul_config_list[i].pdu_type);
|
||||
LOG_D(PHY,
|
||||
"[%d.%d] i %d: processing %s PDU of %d total UL PDUs (ul_config %p) \n",
|
||||
ul_config->frame,
|
||||
slot,
|
||||
i,
|
||||
ul_pdu_type[ul_config->ul_config_list[i].pdu_type - 1],
|
||||
ul_config->number_pdus,
|
||||
ul_config);
|
||||
|
||||
uint8_t pdu_type = ul_config->ul_config_list[i].pdu_type, current_harq_pid, gNB_id = 0;
|
||||
/* PRACH */
|
||||
fapi_nr_ul_config_prach_pdu *prach_config_pdu;
|
||||
/* PUSCH */
|
||||
nfapi_nr_ue_pusch_pdu_t *pusch_config_pdu;
|
||||
/* PUCCH */
|
||||
fapi_nr_ul_config_pucch_pdu *pucch_config_pdu;
|
||||
LOG_D(PHY,
|
||||
"%d.%d ul B ul_config %p t %d pdu_done %d number_pdus %d\n",
|
||||
ul_config->frame,
|
||||
slot,
|
||||
ul_config,
|
||||
pdu_type,
|
||||
pdu_done,
|
||||
ul_config->number_pdus);
|
||||
/* SRS */
|
||||
fapi_nr_ul_config_srs_pdu *srs_config_pdu;
|
||||
|
||||
switch (pdu_type) {
|
||||
while (pdu->pdu_type != FAPI_NR_END) {
|
||||
switch (pdu->pdu_type) {
|
||||
case FAPI_NR_UL_CONFIG_TYPE_PUSCH: {
|
||||
// pusch config pdu
|
||||
pusch_config_pdu = &ul_config->ul_config_list[i].pusch_config_pdu;
|
||||
current_harq_pid = pusch_config_pdu->pusch_data.harq_process_id;
|
||||
NR_UL_UE_HARQ_t *harq_process_ul_ue = &PHY_vars_UE_g[module_id][cc_id]->ul_harq_processes[current_harq_pid];
|
||||
NR_UE_ULSCH_t *ulsch = &phy_data->ulsch;
|
||||
nfapi_nr_ue_pusch_pdu_t *pusch_pdu = &ulsch->pusch_pdu;
|
||||
|
||||
int current_harq_pid = pdu->pusch_config_pdu.pusch_data.harq_process_id;
|
||||
NR_UL_UE_HARQ_t *harq_process_ul_ue = &phy->ul_harq_processes[current_harq_pid];
|
||||
nfapi_nr_ue_pusch_pdu_t *pusch_pdu = &phy_data->ulsch.pusch_pdu;
|
||||
LOG_D(PHY,
|
||||
"In %s i %d: copy pusch_config_pdu nrOfLayers:%d, num_dmrs_cdm_grps_no_data:%d \n",
|
||||
__FUNCTION__,
|
||||
i,
|
||||
pusch_config_pdu->nrOfLayers,
|
||||
pusch_config_pdu->num_dmrs_cdm_grps_no_data);
|
||||
"copy pusch_config_pdu nrOfLayers:%d, num_dmrs_cdm_grps_no_data:%d \n",
|
||||
pdu->pusch_config_pdu.nrOfLayers,
|
||||
pdu->pusch_config_pdu.num_dmrs_cdm_grps_no_data);
|
||||
|
||||
memcpy(pusch_pdu, pusch_config_pdu, sizeof(nfapi_nr_ue_pusch_pdu_t));
|
||||
if (pusch_config_pdu->tx_request_body.pdu) {
|
||||
memcpy(pusch_pdu, &pdu->pusch_config_pdu, sizeof(*pusch_pdu));
|
||||
if (pdu->pusch_config_pdu.tx_request_body.pdu) {
|
||||
LOG_D(PHY,
|
||||
"%d.%d Copying %d bytes to harq_process_ul_ue->a (harq_pid %d)\n",
|
||||
ul_config->frame,
|
||||
slot,
|
||||
pusch_config_pdu->tx_request_body.pdu_length,
|
||||
ul_config->slot,
|
||||
pdu->pusch_config_pdu.tx_request_body.pdu_length,
|
||||
current_harq_pid);
|
||||
memcpy(harq_process_ul_ue->a, pusch_config_pdu->tx_request_body.pdu, pusch_config_pdu->tx_request_body.pdu_length);
|
||||
memcpy(harq_process_ul_ue->a,
|
||||
pdu->pusch_config_pdu.tx_request_body.pdu,
|
||||
pdu->pusch_config_pdu.tx_request_body.pdu_length);
|
||||
}
|
||||
|
||||
harq_process_ul_ue->status = ACTIVE;
|
||||
ul_config->ul_config_list[i].pdu_type = FAPI_NR_UL_CONFIG_TYPE_DONE; // not handle it any more
|
||||
pdu_done++;
|
||||
LOG_D(PHY,
|
||||
"%d.%d ul A ul_config %p t %d pdu_done %d number_pdus %d\n",
|
||||
ul_config->frame,
|
||||
slot,
|
||||
ul_config,
|
||||
pdu_type,
|
||||
pdu_done,
|
||||
ul_config->number_pdus);
|
||||
pdu->pdu_type = FAPI_NR_UL_CONFIG_TYPE_DONE; // not handle it any more
|
||||
} break;
|
||||
|
||||
case FAPI_NR_UL_CONFIG_TYPE_PUCCH: {
|
||||
NR_UE_PUCCH *pucch_vars = &phy_data->pucch_vars;
|
||||
int found = false;
|
||||
pucch_config_pdu = &ul_config->ul_config_list[i].pucch_config_pdu;
|
||||
bool found = false;
|
||||
for (int j = 0; j < 2; j++) {
|
||||
if (pucch_vars->active[j] == false) {
|
||||
LOG_D(PHY, "%d.%d Copying pucch pdu to UE PHY\n", ul_config->frame, slot);
|
||||
memcpy((void *)&(pucch_vars->pucch_pdu[j]), (void *)pucch_config_pdu, sizeof(fapi_nr_ul_config_pucch_pdu));
|
||||
pucch_vars->active[j] = true;
|
||||
if (phy_data->pucch_vars.active[j] == false) {
|
||||
LOG_D(PHY, "Copying pucch pdu to UE PHY\n");
|
||||
phy_data->pucch_vars.pucch_pdu[j] = pdu->pucch_config_pdu;
|
||||
phy_data->pucch_vars.active[j] = true;
|
||||
found = true;
|
||||
ul_config->ul_config_list[i].pdu_type = FAPI_NR_UL_CONFIG_TYPE_DONE; // not handle it any more
|
||||
pdu_done++;
|
||||
LOG_D(PHY,
|
||||
"%d.%d ul A ul_config %p t %d pdu_done %d number_pdus %d\n",
|
||||
ul_config->frame,
|
||||
slot,
|
||||
ul_config,
|
||||
pdu_type,
|
||||
pdu_done,
|
||||
ul_config->number_pdus);
|
||||
pdu->pdu_type = FAPI_NR_UL_CONFIG_TYPE_DONE; // not handle it any more
|
||||
break;
|
||||
}
|
||||
}
|
||||
@@ -555,72 +483,31 @@ static void nr_ue_scheduled_response_ul(PHY_VARS_NR_UE *phy,
|
||||
LOG_E(PHY, "Couldn't find allocation for PUCCH PDU in PUCCH VARS\n");
|
||||
} break;
|
||||
|
||||
case FAPI_NR_UL_CONFIG_TYPE_PRACH:
|
||||
// prach config pdu
|
||||
prach_config_pdu = &ul_config->ul_config_list[i].prach_config_pdu;
|
||||
memcpy((void *)&(PHY_vars_UE_g[module_id][cc_id]->prach_vars[gNB_id]->prach_pdu),
|
||||
(void *)prach_config_pdu,
|
||||
sizeof(fapi_nr_ul_config_prach_pdu));
|
||||
PHY_vars_UE_g[module_id][cc_id]->prach_vars[gNB_id]->active = true;
|
||||
ul_config->ul_config_list[i].pdu_type = FAPI_NR_UL_CONFIG_TYPE_DONE; // not handle it any more
|
||||
pdu_done++;
|
||||
LOG_D(PHY,
|
||||
"%d.%d ul A ul_config %p t %d pdu_done %d number_pdus %d\n",
|
||||
ul_config->frame,
|
||||
slot,
|
||||
ul_config,
|
||||
pdu_type,
|
||||
pdu_done,
|
||||
ul_config->number_pdus);
|
||||
break;
|
||||
case FAPI_NR_UL_CONFIG_TYPE_PRACH: {
|
||||
phy->prach_vars[0]->prach_pdu = pdu->prach_config_pdu;
|
||||
phy->prach_vars[0]->active = true;
|
||||
pdu->pdu_type = FAPI_NR_UL_CONFIG_TYPE_DONE; // not handle it any more
|
||||
} break;
|
||||
|
||||
case FAPI_NR_UL_CONFIG_TYPE_DONE:
|
||||
pdu_done++; // count the no of pdu processed
|
||||
LOG_D(PHY,
|
||||
"%d.%d ul A ul_config %p t %d pdu_done %d number_pdus %d\n",
|
||||
ul_config->frame,
|
||||
slot,
|
||||
ul_config,
|
||||
pdu_type,
|
||||
pdu_done,
|
||||
ul_config->number_pdus);
|
||||
break;
|
||||
|
||||
case FAPI_NR_UL_CONFIG_TYPE_SRS:
|
||||
// srs config pdu
|
||||
srs_config_pdu = &ul_config->ul_config_list[i].srs_config_pdu;
|
||||
memcpy((void *)&(PHY_vars_UE_g[module_id][cc_id]->srs_vars[gNB_id]->srs_config_pdu),
|
||||
(void *)srs_config_pdu,
|
||||
sizeof(fapi_nr_ul_config_srs_pdu));
|
||||
PHY_vars_UE_g[module_id][cc_id]->srs_vars[gNB_id]->active = true;
|
||||
ul_config->ul_config_list[i].pdu_type = FAPI_NR_UL_CONFIG_TYPE_DONE; // not handle it any more
|
||||
pdu_done++;
|
||||
phy->srs_vars[0]->srs_config_pdu = pdu->srs_config_pdu;
|
||||
phy->srs_vars[0]->active = true;
|
||||
pdu->pdu_type = FAPI_NR_UL_CONFIG_TYPE_DONE; // not handle it any more
|
||||
break;
|
||||
|
||||
default:
|
||||
ul_config->ul_config_list[i].pdu_type = FAPI_NR_UL_CONFIG_TYPE_DONE; // not handle it any more
|
||||
pdu_done++; // count the no of pdu processed
|
||||
LOG_D(PHY,
|
||||
"%d.%d ul A ul_config %p t %d pdu_done %d number_pdus %d\n",
|
||||
ul_config->frame,
|
||||
slot,
|
||||
ul_config,
|
||||
pdu_type,
|
||||
pdu_done,
|
||||
ul_config->number_pdus);
|
||||
LOG_W(PHY, "unhandled ul pdu type %d \n", pdu->pdu_type);
|
||||
break;
|
||||
}
|
||||
pdu++;
|
||||
}
|
||||
|
||||
// Clear the fields when all the config pdu are done
|
||||
if (pdu_done == ul_config->number_pdus) {
|
||||
ul_config->frame = 0;
|
||||
ul_config->slot = 0;
|
||||
ul_config->number_pdus = 0;
|
||||
LOG_D(PHY, "%d.%d clear ul_config %p\n", ul_config->frame, slot, ul_config);
|
||||
memset(ul_config->ul_config_list, 0, sizeof(ul_config->ul_config_list));
|
||||
}
|
||||
pthread_mutex_unlock(&ul_config->mutex_ul_config);
|
||||
LOG_D(PHY, "clear ul_config\n");
|
||||
release_ul_config(pdu, true);
|
||||
}
|
||||
|
||||
int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response)
|
||||
@@ -635,11 +522,7 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response)
|
||||
scheduled_response->dl_config,
|
||||
(nr_phy_data_t *)scheduled_response->phy_data);
|
||||
if (scheduled_response->ul_config)
|
||||
nr_ue_scheduled_response_ul(phy,
|
||||
scheduled_response->ul_config,
|
||||
(nr_phy_data_tx_t *)scheduled_response->phy_data,
|
||||
scheduled_response->module_id,
|
||||
scheduled_response->CC_id);
|
||||
nr_ue_scheduled_response_ul(phy, scheduled_response->ul_config, (nr_phy_data_tx_t *)scheduled_response->phy_data);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
Reference in New Issue
Block a user