handling MAC-CellGroupConfig at MAC UE
This commit is contained in:
@@ -942,6 +942,59 @@ void configure_physicalcellgroup(NR_UE_MAC_INST_t *mac,
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*p_UE_FR1 : *p_NR_FR1);
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*p_UE_FR1 : *p_NR_FR1);
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}
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}
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void configure_maccellgroup(NR_UE_MAC_INST_t *mac, const NR_MAC_CellGroupConfig_t *mcg)
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{
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NR_UE_SCHEDULING_INFO *si = &mac->scheduling_info;
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if (mcg->drx_Config)
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LOG_E(NR_MAC, "DRX not implemented! Configuration not handled!\n");
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if (mcg->schedulingRequestConfig) {
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const NR_SchedulingRequestConfig_t *src = mcg->schedulingRequestConfig;
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if (src->schedulingRequestToReleaseList) {
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for (int i = 0; i < src->schedulingRequestToReleaseList->list.count; i++) {
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if (*src->schedulingRequestToReleaseList->list.array[i] == si->sr_id) {
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si->SR_COUNTER = 0;
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si->sr_ProhibitTimer = 0;
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si->sr_ProhibitTimer_Running = 0;
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si->sr_id = -1; // invalid init value
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}
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else
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LOG_E(NR_MAC, "Cannot release SchedulingRequestConfig. Not configured.\n");
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}
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}
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if (src->schedulingRequestToAddModList) {
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for (int i = 0; i < src->schedulingRequestToAddModList->list.count; i++) {
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NR_SchedulingRequestToAddMod_t *sr = src->schedulingRequestToAddModList->list.array[i];
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AssertFatal(si->sr_id == -1 ||
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si->sr_id == sr->schedulingRequestId,
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"Current implementation cannot handle more than 1 SR configuration\n");
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si->sr_id = sr->schedulingRequestId;
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si->sr_TransMax = sr->sr_TransMax;
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if (sr->sr_ProhibitTimer)
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LOG_E(NR_MAC, "SR prohibit timer not properly implemented\n");
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}
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}
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}
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if (mcg->bsr_Config) {
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si->periodicBSR_Timer = mcg->bsr_Config->periodicBSR_Timer;
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si->retxBSR_Timer = mcg->bsr_Config->retxBSR_Timer;
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if (mcg->bsr_Config->logicalChannelSR_DelayTimer)
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LOG_E(NR_MAC, "Handling of logicalChannelSR_DelayTimer not implemented\n");
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}
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if (mcg->tag_Config) {
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// TODO TAG not handled
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if(mcg->tag_Config->tag_ToAddModList) {
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for (int i = 0; i < mcg->tag_Config->tag_ToAddModList->list.count; i++) {
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if (mcg->tag_Config->tag_ToAddModList->list.array[i]->timeAlignmentTimer !=
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NR_TimeAlignmentTimer_infinity)
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LOG_E(NR_MAC, "TimeAlignmentTimer not handled\n");
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}
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}
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}
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if (mcg->phr_Config) {
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// TODO configuration when PHR is implemented
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}
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}
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void nr_rrc_mac_config_req_cg(module_id_t module_id,
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void nr_rrc_mac_config_req_cg(module_id_t module_id,
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int cc_idP,
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int cc_idP,
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NR_CellGroupConfig_t *cell_group_config)
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NR_CellGroupConfig_t *cell_group_config)
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@@ -950,9 +1003,8 @@ void nr_rrc_mac_config_req_cg(module_id_t module_id,
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AssertFatal(cell_group_config, "CellGroupConfig should not be NULL\n");
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AssertFatal(cell_group_config, "CellGroupConfig should not be NULL\n");
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NR_UE_MAC_INST_t *mac = get_mac_inst(module_id);
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NR_UE_MAC_INST_t *mac = get_mac_inst(module_id);
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if (cell_group_config->mac_CellGroupConfig) {
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if (cell_group_config->mac_CellGroupConfig)
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// TODO handle MAC-CellGroupConfig
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configure_maccellgroup(mac, cell_group_config->mac_CellGroupConfig);
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}
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if (cell_group_config->physicalCellGroupConfig)
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if (cell_group_config->physicalCellGroupConfig)
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configure_physicalcellgroup(mac, cell_group_config->physicalCellGroupConfig);
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configure_physicalcellgroup(mac, cell_group_config->physicalCellGroupConfig);
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@@ -196,8 +196,6 @@ typedef struct {
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NR_LC_SCHEDULING_INFO lc_sched_info[NR_MAX_NUM_LCID];
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NR_LC_SCHEDULING_INFO lc_sched_info[NR_MAX_NUM_LCID];
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// lcg scheduling info
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// lcg scheduling info
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NR_LCG_SCHEDULING_INFO lcg_sched_info[NR_MAX_NUM_LCGID];
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NR_LCG_SCHEDULING_INFO lcg_sched_info[NR_MAX_NUM_LCGID];
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/// sum of all lcid buffer size
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uint16_t All_lcid_buffer_size_lastTTI;
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/// SR pending as defined in 38.321
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/// SR pending as defined in 38.321
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uint8_t SR_pending;
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uint8_t SR_pending;
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/// SR_COUNTER as defined in 38.321
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/// SR_COUNTER as defined in 38.321
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@@ -214,14 +212,9 @@ typedef struct {
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uint16_t sr_ProhibitTimer;
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uint16_t sr_ProhibitTimer;
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/// sr ProhibitTime running
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/// sr ProhibitTime running
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uint8_t sr_ProhibitTimer_Running;
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uint8_t sr_ProhibitTimer_Running;
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/// default value to n5
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// Maximum number of SR transmissions
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uint16_t maxHARQ_Tx;
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uint32_t sr_TransMax;
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/// default value is false
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int sr_id;
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uint16_t ttiBundling;
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/// default value is release
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struct DRX_Config *drx_config;
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/// default value is release
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struct MAC_MainConfig__phr_Config *phr_config;
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///timer before triggering a periodic PHR
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///timer before triggering a periodic PHR
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uint16_t periodicPHR_Timer;
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uint16_t periodicPHR_Timer;
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///timer before triggering a prohibit PHR
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///timer before triggering a prohibit PHR
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@@ -234,7 +227,6 @@ typedef struct {
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int16_t prohibitPHR_SF;
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int16_t prohibitPHR_SF;
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///DL Pathloss Change in db
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///DL Pathloss Change in db
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uint16_t PathlossChange_db;
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uint16_t PathlossChange_db;
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/// default value is false
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/// default value is false
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uint16_t extendedBSR_Sizes_r10;
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uint16_t extendedBSR_Sizes_r10;
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/// default value is false
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/// default value is false
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@@ -182,6 +182,7 @@ void nr_ue_mac_default_configs(NR_UE_MAC_INST_t *mac)
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mac->scheduling_info.SR_COUNTER = 0;
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mac->scheduling_info.SR_COUNTER = 0;
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mac->scheduling_info.sr_ProhibitTimer = 0;
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mac->scheduling_info.sr_ProhibitTimer = 0;
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mac->scheduling_info.sr_ProhibitTimer_Running = 0;
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mac->scheduling_info.sr_ProhibitTimer_Running = 0;
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mac->scheduling_info.sr_id = -1; // invalid init value
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// set init value 0xFFFF, make sure periodic timer and retx time counters are NOT active, after bsr transmission set the value
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// set init value 0xFFFF, make sure periodic timer and retx time counters are NOT active, after bsr transmission set the value
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// configured by the NW.
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// configured by the NW.
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@@ -2424,32 +2425,34 @@ bool trigger_periodic_scheduling_request(NR_UE_MAC_INST_t *mac, PUCCH_sched_t *p
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return sr_count > 0 ? true : false;
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return sr_count > 0 ? true : false;
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}
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}
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int8_t nr_ue_get_SR(module_id_t module_idP, frame_t frameP, slot_t slot){
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int8_t nr_ue_get_SR(module_id_t module_idP, frame_t frameP, slot_t slot)
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{
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// no UL-SCH resources available for this tti && UE has a valid PUCCH resources for SR configuration for this tti
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// no UL-SCH resources available for this tti && UE has a valid PUCCH resources for SR configuration for this tti
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DevCheck(module_idP < NB_NR_UE_MAC_INST, module_idP, NB_NR_UE_MAC_INST, 0);
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DevCheck(module_idP < NB_NR_UE_MAC_INST, module_idP, NB_NR_UE_MAC_INST, 0);
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NR_UE_MAC_INST_t *mac = get_mac_inst(module_idP);
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NR_UE_MAC_INST_t *mac = get_mac_inst(module_idP);
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DSR_TRANSMAX_t dsr_TransMax = sr_n64; // todo
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NR_UE_SCHEDULING_INFO *si = &mac->scheduling_info;
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LOG_D(NR_MAC, "[UE %d] Frame %d slot %d send SR indication (SR_COUNTER/dsr_TransMax %d/%d), SR_pending %d\n",
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int max_sr_transmissions = (1 << (2 + si->sr_TransMax));
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LOG_D(NR_MAC, "[UE %d] Frame %d slot %d send SR indication (SR_COUNTER/sr_TransMax %d/%d), SR_pending %d\n",
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module_idP, frameP, slot,
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module_idP, frameP, slot,
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mac->scheduling_info.SR_COUNTER,
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si->SR_COUNTER,
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(1 << (2 + dsr_TransMax)),
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max_sr_transmissions,
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mac->scheduling_info.SR_pending); // todo
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si->SR_pending); // todo
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if ((mac->scheduling_info.SR_pending == 1) &&
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if ((si->SR_pending == 1) &&
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(mac->scheduling_info.SR_COUNTER < (1 << (2 + dsr_TransMax)))) {
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(si->SR_COUNTER < max_sr_transmissions)) {
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LOG_D(NR_MAC, "[UE %d] Frame %d slot %d PHY asks for SR (SR_COUNTER/dsr_TransMax %d/%d), SR_pending %d, increment SR_COUNTER\n",
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LOG_D(NR_MAC, "[UE %d] Frame %d slot %d PHY asks for SR (SR_COUNTER/sr_TransMax %d/%d), SR_pending %d, increment SR_COUNTER\n",
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module_idP, frameP, slot,
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module_idP, frameP, slot,
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mac->scheduling_info.SR_COUNTER,
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si->SR_COUNTER,
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(1 << (2 + dsr_TransMax)),
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max_sr_transmissions,
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mac->scheduling_info.SR_pending); // todo
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si->SR_pending); // todo
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mac->scheduling_info.SR_COUNTER++;
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si->SR_COUNTER++;
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// start the sr-prohibittimer : rel 9 and above
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// start the sr-prohibittimer : rel 9 and above
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if (mac->scheduling_info.sr_ProhibitTimer > 0) { // timer configured
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if (si->sr_ProhibitTimer > 0) { // timer configured
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mac->scheduling_info.sr_ProhibitTimer--;
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si->sr_ProhibitTimer--;
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mac->scheduling_info.sr_ProhibitTimer_Running = 1;
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si->sr_ProhibitTimer_Running = 1;
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} else {
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} else {
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mac->scheduling_info.sr_ProhibitTimer_Running = 0;
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si->sr_ProhibitTimer_Running = 0;
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}
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}
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//mac->ul_active =1;
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//mac->ul_active =1;
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return (1); //instruct phy to signal SR
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return (1); //instruct phy to signal SR
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@@ -2457,7 +2460,7 @@ int8_t nr_ue_get_SR(module_id_t module_idP, frame_t frameP, slot_t slot){
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// notify RRC to relase PUCCH/SRS
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// notify RRC to relase PUCCH/SRS
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// clear any configured dl/ul
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// clear any configured dl/ul
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// initiate RA
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// initiate RA
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if (mac->scheduling_info.SR_pending) {
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if (si->SR_pending) {
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// release all pucch resource
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// release all pucch resource
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//mac->physicalConfigDedicated = NULL; // todo
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//mac->physicalConfigDedicated = NULL; // todo
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//mac->ul_active = 0; // todo
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//mac->ul_active = 0; // todo
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@@ -2465,9 +2468,8 @@ int8_t nr_ue_get_SR(module_id_t module_idP, frame_t frameP, slot_t slot){
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NR_BSR_TRIGGER_NONE;
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NR_BSR_TRIGGER_NONE;
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LOG_I(NR_MAC, "[UE %d] Release all SRs \n", module_idP);
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LOG_I(NR_MAC, "[UE %d] Release all SRs \n", module_idP);
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}
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}
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si->SR_pending = 0;
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mac->scheduling_info.SR_pending = 0;
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si->SR_COUNTER = 0;
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mac->scheduling_info.SR_COUNTER = 0;
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return (0);
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return (0);
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}
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}
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}
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}
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