added DTX detection in PUCCH 2 receiver. This is detected by MAC already
which will drop PUCCH 2 indications that are detected as DTX. For the moment this uses the same pucch0_dtx_threshold value indicated in L1 section of the configuration file.
This commit is contained in:
@@ -1087,6 +1087,7 @@ void nr_decode_pucch2(PHY_VARS_gNB *gNB,
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pucch2_lev += signal_energy_nodc(rp[aa][symb], nb_re_pucch);
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pucch2_lev += signal_energy_nodc(rp[aa][symb], nb_re_pucch);
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}
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}
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}
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}
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int decoderState=2;
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pucch2_lev /= Prx * Prx * pucch_pdu->nr_of_symbols;
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pucch2_lev /= Prx * Prx * pucch_pdu->nr_of_symbols;
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int pucch2_levdB = dB_fixed(pucch2_lev);
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int pucch2_levdB = dB_fixed(pucch2_lev);
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int scaling = 0;
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int scaling = 0;
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@@ -1099,8 +1100,10 @@ void nr_decode_pucch2(PHY_VARS_gNB *gNB,
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else if (pucch2_levdB > 54)
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else if (pucch2_levdB > 54)
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scaling = 1;
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scaling = 1;
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if (pucch2_levdB < gNB->measurements.n0_subband_power_avg_dB + (gNB->pucch0_thres/10))
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decoderState=1;
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LOG_D(PHY,
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LOG_D(PHY,
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"%d.%d Decoding pucch2 for %d symbols, %d PRB, nb_harq %d, nb_sr %d, nb_csi %d/%d, pucch2_lev %d dB (scaling %d)\n",
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"%d.%d Decoding pucch2 for %d symbols, %d PRB, nb_harq %d, nb_sr %d, nb_csi %d/%d, pucch2_lev %d dB (scaling %d), n0+thres %d decoderState %d\n",
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frame,
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frame,
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slot,
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slot,
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pucch_pdu->nr_of_symbols,
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pucch_pdu->nr_of_symbols,
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@@ -1110,7 +1113,9 @@ void nr_decode_pucch2(PHY_VARS_gNB *gNB,
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pucch_pdu->bit_len_csi_part1,
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pucch_pdu->bit_len_csi_part1,
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pucch_pdu->bit_len_csi_part2,
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pucch_pdu->bit_len_csi_part2,
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pucch2_levdB,
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pucch2_levdB,
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scaling);
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scaling,
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gNB->measurements.n0_subband_power_avg_dB+(gNB->pucch0_thres/10),
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decoderState);
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int nc_group_size=1; // 2 PRB
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int nc_group_size=1; // 2 PRB
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int ngroup = prb_size_ext/nc_group_size/2;
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int ngroup = prb_size_ext/nc_group_size/2;
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@@ -1365,7 +1370,6 @@ void nr_decode_pucch2(PHY_VARS_gNB *gNB,
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uint64_t decodedPayload[2];
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uint64_t decodedPayload[2];
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uint8_t corr_dB;
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uint8_t corr_dB;
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int decoderState=2;
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if (nb_bit < 12) { // short blocklength case
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if (nb_bit < 12) { // short blocklength case
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simde__m256i *rp_re[Prx2][2];
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simde__m256i *rp_re[Prx2][2];
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simde__m256i *rp2_re[Prx2][2];
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simde__m256i *rp2_re[Prx2][2];
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