diff --git a/openair1/PHY/NR_TRANSPORT/nr_dci.c b/openair1/PHY/NR_TRANSPORT/nr_dci.c index 2812b65d96..219a1afd19 100644 --- a/openair1/PHY/NR_TRANSPORT/nr_dci.c +++ b/openair1/PHY/NR_TRANSPORT/nr_dci.c @@ -83,7 +83,7 @@ void nr_generate_dci(PHY_VARS_gNB *gNB, int n_rb; // compute rb_offset and n_prb based on frequency allocation nr_cce_t cce_list[MAX_DCI_CORESET][NR_MAX_PDCCH_AGG_LEVEL]; - nr_fill_cce_list(cce_list,0,pdcch_pdu_rel15); + nr_fill_cce_list(cce_list, pdcch_pdu_rel15); get_coreset_rballoc(pdcch_pdu_rel15->FreqDomainResource,&n_rb,&rb_offset); cset_start_sc = frame_parms->first_carrier_offset + (pdcch_pdu_rel15->BWPStart + rb_offset) * NR_NB_SC_PER_RB; @@ -177,8 +177,10 @@ void nr_generate_dci(PHY_VARS_gNB *gNB, // Get cce_list indices by reg_idx in ascending order int reg_list_index = 0; + int N_regs = n_rb*pdcch_pdu_rel15->DurationSymbols; // nb of REGs per coreset + int N_cces = N_regs / NR_NB_REG_PER_CCE; // nb of cces in coreset int reg_list_order[NR_MAX_PDCCH_AGG_LEVEL] = {}; - for (int p = 0; p < NR_MAX_PDCCH_AGG_LEVEL; p++) { + for (int p = 0; p < N_cces; p++) { for(int p2 = 0; p2 < dci_pdu->AggregationLevel; p2++) { if(cce_list[d][p2].reg_list[0].reg_idx == p * NR_NB_REG_PER_CCE) { reg_list_order[reg_list_index] = p2; @@ -197,7 +199,7 @@ void nr_generate_dci(PHY_VARS_gNB *gNB, for (int reg_in_cce_idx = 0; reg_in_cce_idx < NR_NB_REG_PER_CCE; reg_in_cce_idx++) { k = cset_start_sc + cce_list[d][cce_idx].reg_list[reg_in_cce_idx].start_sc_idx; - + LOG_D(PHY,"CCE %d REG %d k %d\n",cce_idx,reg_in_cce_idx,k); if (k >= frame_parms->ofdm_symbol_size) k -= frame_parms->ofdm_symbol_size; diff --git a/openair1/PHY/NR_TRANSPORT/nr_dci.h b/openair1/PHY/NR_TRANSPORT/nr_dci.h index 490a8b5286..0bf6932bb5 100644 --- a/openair1/PHY/NR_TRANSPORT/nr_dci.h +++ b/openair1/PHY/NR_TRANSPORT/nr_dci.h @@ -55,6 +55,6 @@ void nr_fill_ul_dci(PHY_VARS_gNB *gNB, int slot, nfapi_nr_ul_dci_request_pdus_t *pdcch_pdu); -void nr_fill_cce_list(nr_cce_t cce_list[MAX_DCI_CORESET][NR_MAX_PDCCH_AGG_LEVEL], uint8_t m,nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15); +void nr_fill_cce_list(nr_cce_t cce_list[MAX_DCI_CORESET][NR_MAX_PDCCH_AGG_LEVEL], nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15); #endif //__PHY_NR_TRANSPORT_DCI__H diff --git a/openair1/PHY/NR_TRANSPORT/nr_dci_tools.c b/openair1/PHY/NR_TRANSPORT/nr_dci_tools.c index 8d5eb4a660..a30d28489a 100644 --- a/openair1/PHY/NR_TRANSPORT/nr_dci_tools.c +++ b/openair1/PHY/NR_TRANSPORT/nr_dci_tools.c @@ -37,89 +37,8 @@ #include "nr_dlsch.h" -/* - Original version to keep code for Y that needs to be moved to MAC -void nr_fill_cce_list(PHY_VARS_gNB *gNB, uint16_t n_shift, uint8_t m) { - - nr_cce_t* cce; - nr_reg_t* reg; - nfapi_nr_dl_config_pdcch_pdu_rel15_t* pdcch_pdu = gNB->pdcch_pdu.pdcch; - - uint8_t L = dci_alloc->L; - uint8_t bsize = pdcch_params->reg_bundle_size; - uint8_t R = pdcch_params->interleaver_size; - uint16_t N_reg = pdcch_params->n_rb * pdcch_params->n_symb; - uint16_t Y, N_cce, M_s_max, n_CI=0, tmp, C=0; - uint16_t n_RNTI = (pdcch_params->search_space_type == NFAPI_NR_SEARCH_SPACE_TYPE_UE_SPECIFIC)? pdcch_params->rnti:0; - uint32_t A[3]={39827,39829,39839}; - - if (pdcch_params->config_type == NFAPI_NR_CSET_CONFIG_MIB_SIB1) - AssertFatal(L>=4, "Invalid aggregation level for SIB1 configured PDCCH %d\n", L); - - N_cce = N_reg / NR_NB_REG_PER_CCE; - //Max number of candidates per aggregation level -- SIB1 configured search space only - M_s_max = (L==4)?4:(L==8)?2:1; - - if (pdcch_params->search_space_type == NFAPI_NR_SEARCH_SPACE_TYPE_COMMON) - Y = 0; - else { //NFAPI_NR_SEARCH_SPACE_TYPE_UE_SPECIFIC - Y = (A[0]*n_RNTI)%65537; // Candidate 0, antenna port 0 - } - - if (pdcch_params->cr_mapping_type == NFAPI_NR_CCE_REG_MAPPING_INTERLEAVED) { - uint16_t assertFatalCond = (N_reg%(bsize*R)); - AssertFatal(assertFatalCond == 0,"CCE to REG interleaving: Invalid configuration leading to non integer C (N_reg %us, bsize %d R %d)\n",N_reg, bsize, R); - C = N_reg/(bsize*R); - } - - tmp = L * (( Y + (m*N_cce)/(L*M_s_max) + n_CI ) % CEILIDIV(N_cce,L)); - - LOG_D(PHY, "CCE list generation for candidate %d: bundle size %d ilv size %d tmp %d\n", m, bsize, R, tmp); - for (uint8_t cce_idx=0; cce_idxcce_list[cce_idx]; - cce->cce_idx = tmp + cce_idx; - LOG_D(PHY, "cce_idx %d\n", cce->cce_idx); - - if (pdcch_params->cr_mapping_type == NFAPI_NR_CCE_REG_MAPPING_INTERLEAVED) { - LOG_D(PHY, "Interleaved CCE to REG mapping\n"); - uint8_t j = cce->cce_idx, j_prime; - uint8_t r,c,idx; - - for (uint8_t bundle_idx=0; bundle_idxreg_list[reg_idx]; - reg->reg_idx = bsize*idx + reg_idx; - reg->start_sc_idx = (reg->reg_idx/pdcch_params->n_symb) * NR_NB_SC_PER_RB; - reg->symb_idx = reg->reg_idx % pdcch_params->n_symb; - LOG_D(PHY, "reg %d symbol %d start subcarrier %d\n", reg->reg_idx, reg->symb_idx, reg->start_sc_idx); - } - } - } - else { // NFAPI_NR_CCE_REG_MAPPING_NON_INTERLEAVED - LOG_D(PHY, "Non interleaved CCE to REG mapping\n"); - for (uint8_t reg_idx=0; reg_idxreg_list[reg_idx]; - reg->reg_idx = cce->cce_idx*NR_NB_REG_PER_CCE + reg_idx; - reg->start_sc_idx = (reg->reg_idx/pdcch_params->n_symb) * NR_NB_SC_PER_RB; - reg->symb_idx = reg->reg_idx % pdcch_params->n_symb; - LOG_D(PHY, "reg %d symbol %d start subcarrier %d\n", reg->reg_idx, reg->symb_idx, reg->start_sc_idx); - } - - } - - } -} - -*/ - -void nr_fill_cce_list(nr_cce_t cce_list[MAX_DCI_CORESET][NR_MAX_PDCCH_AGG_LEVEL], uint8_t m, nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15) { +void nr_fill_cce_list(nr_cce_t cce_list[MAX_DCI_CORESET][NR_MAX_PDCCH_AGG_LEVEL], nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15) { nr_cce_t* cce; nr_reg_t* reg; @@ -154,7 +73,7 @@ void nr_fill_cce_list(nr_cce_t cce_list[MAX_DCI_CORESET][NR_MAX_PDCCH_AGG_LEVEL] C = N_reg/(bsize*R); } - if (pdcch_pdu_rel15->dci_pdu[d].RNTI != 0xFFFF) LOG_D(PHY, "CCE list generation for candidate %d: bundle size %d ilv size %d CceIndex %d\n", m, bsize, R, pdcch_pdu_rel15->dci_pdu[d].CceIndex); + if (pdcch_pdu_rel15->dci_pdu[d].RNTI != 0xFFFF) LOG_D(PHY, "CCE list generation for candidate %d: bundle size %d ilv size %d CceIndex %d\n", d, bsize, R, pdcch_pdu_rel15->dci_pdu[d].CceIndex); for (uint8_t cce_idx=0; cce_idxcce_idx = pdcch_pdu_rel15->dci_pdu[d].CceIndex + cce_idx; diff --git a/openair1/PHY/NR_UE_TRANSPORT/dci_nr.c b/openair1/PHY/NR_UE_TRANSPORT/dci_nr.c index 76dd8c1104..6af5b4a880 100644 --- a/openair1/PHY/NR_UE_TRANSPORT/dci_nr.c +++ b/openair1/PHY/NR_UE_TRANSPORT/dci_nr.c @@ -360,10 +360,7 @@ void nr_pdcch_extract_rbs_single(int32_t **rxdataF, * According to this equations, DM-RS PDCCH are mapped on k where k%12==1 || k%12==5 || k%12==9 * */ - // the bitmap coreset_frq_domain contains 45 bits -#define CORESET_FREQ_DOMAIN_BITMAP_SIZE 45 - // each bit is associated to 6 RBs -#define BIT_TO_NBR_RB_CORESET_FREQ_DOMAIN 6 + #define NBR_RE_PER_RB_WITH_DMRS 12 // after removing the 3 DMRS RE, the RB contains 9 RE with PDCCH #define NBR_RE_PER_RB_WITHOUT_DMRS 9 diff --git a/openair1/SIMULATION/NR_PHY/dlsim.c b/openair1/SIMULATION/NR_PHY/dlsim.c index f39629e592..e1d8706600 100644 --- a/openair1/SIMULATION/NR_PHY/dlsim.c +++ b/openair1/SIMULATION/NR_PHY/dlsim.c @@ -261,18 +261,17 @@ void update_ptrs_config(NR_CellGroupConfig_t *secondaryCellGroup, uint16_t *rbSi void update_dmrs_config(NR_CellGroupConfig_t *scg, int8_t* dmrs_arg); extern void fix_scd(NR_ServingCellConfig_t *scd);// forward declaration -/* specific dlsim DL preprocessor: uses rbStart/rbSize/mcs/nrOfLayers from command line of - dlsim, does not search for CCE/PUCCH occasion but simply sets to 0 */ +/* specific dlsim DL preprocessor: uses rbStart/rbSize/mcs/nrOfLayers from command line of dlsim */ int g_mcsIndex = -1, g_mcsTableIdx = 0, g_rbStart = -1, g_rbSize = -1, g_nrOfLayers = 1; void nr_dlsim_preprocessor(module_id_t module_id, frame_t frame, sub_frame_t slot) { + NR_UE_info_t *UE_info = &RC.nrmac[module_id]->UE_info; AssertFatal(UE_info->num_UEs == 1, "can have only a single UE\n"); NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[0]; NR_ServingCellConfigCommon_t *scc = RC.nrmac[0]->common_channels[0].ServingCellConfigCommon; - /* manually set free CCE to 0 */ const int target_ss = NR_SearchSpace__searchSpaceType_PR_ue_Specific; sched_ctrl->search_space = get_searchspace(NULL, scc, sched_ctrl->active_bwp ? sched_ctrl->active_bwp->bwp_Dedicated : NULL, target_ss); uint8_t nr_of_candidates; @@ -280,7 +279,16 @@ void nr_dlsim_preprocessor(module_id_t module_id, &nr_of_candidates, sched_ctrl->search_space,4); sched_ctrl->coreset = get_coreset(module_id, scc, sched_ctrl->active_bwp->bwp_Dedicated, sched_ctrl->search_space, target_ss); - sched_ctrl->cce_index = 0; + int Y = get_Y((*sched_ctrl->search_space->controlResourceSetId)%3, slot, UE_info->rnti[0]); + int CCEIndex = find_pdcch_candidate(RC.nrmac[module_id], + /* CC_id = */ 0, + sched_ctrl->aggregation_level, + nr_of_candidates, + &sched_ctrl->sched_pdcch, + sched_ctrl->coreset, + Y); + AssertFatal(CCEIndex>=0, "%4d.%2d could not find CCE for DL DCI UE %d/RNTI %04x\n", frame, slot, 0, UE_info->rnti[0]); + sched_ctrl->cce_index = CCEIndex; NR_pdsch_semi_static_t *ps = &sched_ctrl->pdsch_semi_static; @@ -1098,9 +1106,8 @@ int main(int argc, char **argv) UE_info->UE_sched_ctrl[0].harq_processes[harq_pid].ndi = !(trial&1); - UE_info->UE_sched_ctrl[0].harq_processes[harq_pid].round = round; - + if (css_flag == 0) { nr_schedule_ue_spec(0, frame, slot); } else { diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c index f3b5ec1cf1..ec5132bbcf 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c @@ -1052,7 +1052,7 @@ void nr_configure_pdcch(nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu, for (int i=0;i<6;i++) pdcch_pdu->FreqDomainResource[i] = coreset->frequencyDomainResources.buf[i]; - LOG_D(MAC,"Coreset : BWPstart %d, BWPsize %d, SCS %d, freq %x, , duration %d, \n", + LOG_D(MAC,"Coreset : BWPstart %d, BWPsize %d, SCS %d, freq %x, , duration %d\n", pdcch_pdu->BWPStart,pdcch_pdu->BWPSize,(int)pdcch_pdu->SubcarrierSpacing,(int)coreset->frequencyDomainResources.buf[0],(int)coreset->duration); pdcch_pdu->CceRegMappingType = pdcch->CceRegMappingType;