maki/openairinterface5g
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

commit before merge

Browse Source
This commit is contained in:
Raymond Knopp
2021-08-31 22:12:12 +02:00
parent 3243f881b7
commit ee301a5acb
7 changed files with 22 additions and 19 deletions
Download Patch File Download Diff File Expand all files Collapse all files
openair1/PHY/INIT/nr_init.c
+1
View File
@@ -124,6 +124,7 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
for (int symb=0; symb<fp->symbols_per_slot; symb++) { for (int symb=0; symb<fp->symbols_per_slot; symb++) {
pdcch_dmrs[slot][symb] = (uint32_t *)malloc16(NR_MAX_PDCCH_DMRS_INIT_LENGTH_DWORD*sizeof(uint32_t)); pdcch_dmrs[slot][symb] = (uint32_t *)malloc16(NR_MAX_PDCCH_DMRS_INIT_LENGTH_DWORD*sizeof(uint32_t));
LOG_I(PHY,"pdcch_dmrs[%d][%d] %p\n",slot,symb,pdcch_dmrs[slot][symb]);
AssertFatal(pdcch_dmrs[slot][symb]!=NULL, "NR init: pdcch_dmrs for slot %d symbol %d - malloc failed\n", slot, symb); AssertFatal(pdcch_dmrs[slot][symb]!=NULL, "NR init: pdcch_dmrs for slot %d symbol %d - malloc failed\n", slot, symb);
} }
} }
openair1/PHY/NR_REFSIG/nr_gold.c
+2 -2
View File
@@ -66,7 +66,7 @@ void nr_init_pdcch_dmrs(PHY_VARS_gNB* gNB, uint32_t Nid)
reset = 1; reset = 1;
x2 = ((1<<17) * (fp->symbols_per_slot*slot+symb+1) * ((Nid<<1)+1) + (Nid<<1)); x2 = ((1<<17) * (fp->symbols_per_slot*slot+symb+1) * ((Nid<<1)+1) + (Nid<<1));
LOG_I(PHY,"PDCCH DMRS slot %d, symb %d, Nid %d, x2 %x\n",slot,symb,Nid,x2);
for (uint32_t n=0; n<NR_MAX_PDCCH_DMRS_INIT_LENGTH_DWORD; n++) { for (uint32_t n=0; n<NR_MAX_PDCCH_DMRS_INIT_LENGTH_DWORD; n++) {
pdcch_dmrs[slot][symb][n] = lte_gold_generic(&x1, &x2, reset); pdcch_dmrs[slot][symb][n] = lte_gold_generic(&x1, &x2, reset);
reset = 0; reset = 0;
@@ -92,7 +92,7 @@ void nr_init_pdsch_dmrs(PHY_VARS_gNB* gNB, uint32_t Nid)
for (uint8_t symb=0; symb<fp->symbols_per_slot; symb++) { for (uint8_t symb=0; symb<fp->symbols_per_slot; symb++) {
reset = 1; reset = 1;
x2 = ((1<<17) * (fp->symbols_per_slot*slot+symb+1) * ((N_n_scid[n_scid]<<1)+1) +((N_n_scid[n_scid]<<1)+n_scid)); x2 = ((1<<17) * (fp->symbols_per_slot*slot+symb+1) * ((N_n_scid[n_scid]<<1)+1) +((N_n_scid[n_scid]<<1)+n_scid));
LOG_D(PHY,"DMRS slot %d, symb %d x2 %x\n",slot,symb,x2); LOG_I(PHY,"PDSCH DMRS slot %d, symb %d x2 %x, N_n_scid %d,n_scid %d\n",slot,symb,x2,N_n_scid[n_scid],n_scid);
for (uint32_t n=0; n<NR_MAX_PDSCH_DMRS_INIT_LENGTH_DWORD; n++) { for (uint32_t n=0; n<NR_MAX_PDSCH_DMRS_INIT_LENGTH_DWORD; n++) {
pdsch_dmrs[slot][symb][0][n] = lte_gold_generic(&x1, &x2, reset); pdsch_dmrs[slot][symb][0][n] = lte_gold_generic(&x1, &x2, reset);
reset = 0; reset = 0;
openair1/PHY/NR_TRANSPORT/nr_dci.c
+8 -8
View File
@@ -81,7 +81,7 @@ void nr_generate_dci(PHY_VARS_gNB *gNB,
int rb_offset; int rb_offset;
int n_rb; int n_rb;
// compute rb_offset and n_prb based on frequency allocation // compute rb_offset and n_prb based on frequency allocation
nr_fill_cce_list(gNB,0,pdcch_pdu_rel15); nr_fill_cce_list(gNB,0,pdcch_pdu_rel15);
get_coreset_rballoc(pdcch_pdu_rel15->FreqDomainResource,&n_rb,&rb_offset); get_coreset_rballoc(pdcch_pdu_rel15->FreqDomainResource,&n_rb,&rb_offset);
@@ -102,8 +102,8 @@ void nr_generate_dci(PHY_VARS_gNB *gNB,
// DMRS length is per OFDM symbol // DMRS length is per OFDM symbol
uint32_t dmrs_length = n_rb*6; //2(QPSK)*3(per RB)*6(REG per CCE) uint32_t dmrs_length = n_rb*6; //2(QPSK)*3(per RB)*6(REG per CCE)
uint32_t encoded_length = dci_pdu->AggregationLevel*108; //2(QPSK)*9(per RB)*6(REG per CCE) uint32_t encoded_length = dci_pdu->AggregationLevel*108; //2(QPSK)*9(per RB)*6(REG per CCE)
LOG_D(PHY, "DL_DCI : DMRS length per symbol %d\t DCI encoded length %d (precoder_granularity %d,reg_mapping %d),Scrambling_Id %d,ScramblingRNTI %x,PayloadSizeBits %d\n", /*if (dci_pdu->RNTI!=0xFFFF)*/ LOG_I(PHY, "DL_DCI : rb_offset %d, nb_rb %d, DMRS length per symbol %d\t DCI encoded length %d (precoder_granularity %d,reg_mapping %d),Scrambling_Id %d,ScramblingRNTI %x,PayloadSizeBits %d\n",
dmrs_length, encoded_length,pdcch_pdu_rel15->precoderGranularity,pdcch_pdu_rel15->CceRegMappingType, rb_offset, n_rb,dmrs_length, encoded_length,pdcch_pdu_rel15->precoderGranularity,pdcch_pdu_rel15->CceRegMappingType,
dci_pdu->ScramblingId,dci_pdu->ScramblingRNTI,dci_pdu->PayloadSizeBits); dci_pdu->ScramblingId,dci_pdu->ScramblingRNTI,dci_pdu->PayloadSizeBits);
dmrs_length += rb_offset*6; // To accommodate more DMRS symbols in case of rb offset dmrs_length += rb_offset*6; // To accommodate more DMRS symbols in case of rb offset
@@ -113,11 +113,11 @@ void nr_generate_dci(PHY_VARS_gNB *gNB,
nr_modulation(gold_pdcch_dmrs[symb], dmrs_length, DMRS_MOD_ORDER, mod_dmrs[symb]); //Qm = 2 as DMRS is QPSK modulated nr_modulation(gold_pdcch_dmrs[symb], dmrs_length, DMRS_MOD_ORDER, mod_dmrs[symb]); //Qm = 2 as DMRS is QPSK modulated
#ifdef DEBUG_PDCCH_DMRS #ifdef DEBUG_PDCCH_DMRS
if(dci_pdu->RNTI!=0xFFFF) {
for (int i=0; i<dmrs_length>>1; i++) for (int i=0; i<dmrs_length>>1; i++)
printf("symb %d i %d gold seq 0x%08x mod_dmrs %d %d\n", symb, i, printf("symb %d i %d %p gold seq 0x%08x mod_dmrs %d %d\n", symb, i,
gold_pdcch_dmrs[symb][i>>5], mod_dmrs[symb][i<<1], mod_dmrs[symb][(i<<1)+1] ); &gold_pdcch_dmrs[symb][i>>5],gold_pdcch_dmrs[symb][i>>5], mod_dmrs[symb][i<<1], mod_dmrs[symb][(i<<1)+1] );
}
#endif #endif
} }
@@ -213,7 +213,7 @@ void nr_generate_dci(PHY_VARS_gNB *gNB,
(amp * mod_dmrs[l][(dmrs_idx << 1) + 1]) >> 15; (amp * mod_dmrs[l][(dmrs_idx << 1) + 1]) >> 15;
#ifdef DEBUG_PDCCH_DMRS #ifdef DEBUG_PDCCH_DMRS
if (dci_pdu->RNTI!=0xFFFF) LOG_I(PHY,"PDCCH DMRS: l %d position %d => (%d,%d)\n",l,k,((int16_t *)txdataF)[(l*frame_parms->ofdm_symbol_size + k)<<1], if (dci_pdu->RNTI!=0xFFFF) LOG_I(PHY,"PDCCH DMRS %d: l %d position %d => (%d,%d)\n",dmrs_idx,l,k,((int16_t *)txdataF)[(l*frame_parms->ofdm_symbol_size + k)<<1],
((int16_t *)txdataF)[((l*frame_parms->ofdm_symbol_size + k)<<1)+1]); ((int16_t *)txdataF)[((l*frame_parms->ofdm_symbol_size + k)<<1)+1]);
#endif #endif
openair1/SCHED_NR/phy_procedures_nr_gNB.c
+1 -1
View File
@@ -164,7 +164,7 @@ void phy_procedures_gNB_TX(PHY_VARS_gNB *gNB,
gNB->Mod_id,frame,slot,pdcch_pdu_id,ul_pdcch_pdu_id); gNB->Mod_id,frame,slot,pdcch_pdu_id,ul_pdcch_pdu_id);
if (pdcch_pdu_id >= 0 || ul_pdcch_pdu_id >= 0) { if (pdcch_pdu_id >= 0 || ul_pdcch_pdu_id >= 0) {
LOG_D(PHY, "[gNB %d] Frame %d slot %d Calling nr_generate_dci_top (number of UL/DL DCI %d/%d)\n", LOG_I(PHY, "[gNB %d] Frame %d slot %d Calling nr_generate_dci_top (number of UL/DL DCI %d/%d)\n",
gNB->Mod_id, frame, slot, gNB->Mod_id, frame, slot,
gNB->ul_pdcch_pdu[ul_pdcch_pdu_id].pdcch_pdu.pdcch_pdu.pdcch_pdu_rel15.numDlDci, gNB->ul_pdcch_pdu[ul_pdcch_pdu_id].pdcch_pdu.pdcch_pdu.pdcch_pdu_rel15.numDlDci,
gNB->pdcch_pdu[pdcch_pdu_id].pdcch_pdu.pdcch_pdu_rel15.numDlDci); gNB->pdcch_pdu[pdcch_pdu_id].pdcch_pdu.pdcch_pdu_rel15.numDlDci);
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
+4 -7
View File
@@ -1111,6 +1111,7 @@ void fill_dci_pdu_rel15(const NR_ServingCellConfigCommon_t *scc,
uint8_t fsize = 0, pos = 0; uint8_t fsize = 0, pos = 0;
uint64_t *dci_pdu = (uint64_t *)pdcch_dci_pdu->Payload; uint64_t *dci_pdu = (uint64_t *)pdcch_dci_pdu->Payload;
*dci_pdu=0;
int dci_size = nr_dci_size(scc->downlinkConfigCommon->initialDownlinkBWP,scc->uplinkConfigCommon->initialUplinkBWP, CellGroup, dci_pdu_rel15, dci_format, rnti_type, N_RB, bwp_id); int dci_size = nr_dci_size(scc->downlinkConfigCommon->initialDownlinkBWP,scc->uplinkConfigCommon->initialUplinkBWP, CellGroup, dci_pdu_rel15, dci_format, rnti_type, N_RB, bwp_id);
pdcch_dci_pdu->PayloadSizeBits = dci_size; pdcch_dci_pdu->PayloadSizeBits = dci_size;
AssertFatal(dci_size <= 64, "DCI sizes above 64 bits not yet supported"); AssertFatal(dci_size <= 64, "DCI sizes above 64 bits not yet supported");
@@ -1136,15 +1137,15 @@ void fill_dci_pdu_rel15(const NR_ServingCellConfigCommon_t *scc,
// Time domain assignment // Time domain assignment
pos += 4; pos += 4;
*dci_pdu |= (((uint64_t)dci_pdu_rel15->time_domain_assignment.val & 0xf) << (dci_size - pos)); *dci_pdu |= (((uint64_t)dci_pdu_rel15->time_domain_assignment.val & 0xf) << (dci_size - pos));
LOG_D(NR_MAC, LOG_I(NR_MAC,
"time-domain assignment %d (3 bits)=> %d (0x%lx)\n", "time-domain assignment %d (4 bits)=> %d (0x%lx)\n",
dci_pdu_rel15->time_domain_assignment.val, dci_pdu_rel15->time_domain_assignment.val,
dci_size - pos, dci_size - pos,
*dci_pdu); *dci_pdu);
// VRB to PRB mapping // VRB to PRB mapping
pos++; pos++;
*dci_pdu |= ((uint64_t)dci_pdu_rel15->vrb_to_prb_mapping.val & 0x1) << (dci_size - pos); *dci_pdu |= ((uint64_t)dci_pdu_rel15->vrb_to_prb_mapping.val & 0x1) << (dci_size - pos);
LOG_D(NR_MAC, LOG_I(NR_MAC,
"vrb to prb mapping %d (1 bits)=> %d (0x%lx)\n", "vrb to prb mapping %d (1 bits)=> %d (0x%lx)\n",
dci_pdu_rel15->vrb_to_prb_mapping.val, dci_pdu_rel15->vrb_to_prb_mapping.val,
dci_size - pos, dci_size - pos,
@@ -1152,15 +1153,11 @@ void fill_dci_pdu_rel15(const NR_ServingCellConfigCommon_t *scc,
// MCS // MCS
pos += 5; pos += 5;
*dci_pdu |= ((uint64_t)dci_pdu_rel15->mcs & 0x1f) << (dci_size - pos); *dci_pdu |= ((uint64_t)dci_pdu_rel15->mcs & 0x1f) << (dci_size - pos);
#ifdef DEBUG_FILL_DCI
LOG_I(NR_MAC, "mcs %d (5 bits)=> %d (0x%lx)\n", dci_pdu_rel15->mcs, dci_size - pos, *dci_pdu); LOG_I(NR_MAC, "mcs %d (5 bits)=> %d (0x%lx)\n", dci_pdu_rel15->mcs, dci_size - pos, *dci_pdu);
#endif
// TB scaling // TB scaling
pos += 2; pos += 2;
*dci_pdu |= ((uint64_t)dci_pdu_rel15->tb_scaling & 0x3) << (dci_size - pos); *dci_pdu |= ((uint64_t)dci_pdu_rel15->tb_scaling & 0x3) << (dci_size - pos);
#ifdef DEBUG_FILL_DCI
LOG_I(NR_MAC, "tb_scaling %d (2 bits)=> %d (0x%lx)\n", dci_pdu_rel15->tb_scaling, dci_size - pos, *dci_pdu); LOG_I(NR_MAC, "tb_scaling %d (2 bits)=> %d (0x%lx)\n", dci_pdu_rel15->tb_scaling, dci_size - pos, *dci_pdu);
#endif
break; break;
case NR_RNTI_C: case NR_RNTI_C:
openair2/RRC/NR/MESSAGES/asn1_msg.c
+5
View File
@@ -434,6 +434,11 @@ uint8_t do_SIB1_NR(rrc_gNB_carrier_data_t *carrier,
sib1->servingCellConfigCommon->downlinkConfigCommon.frequencyInfoDL.offsetToPointA = scs_scaling2 * (absolute_diff/(12*scs_scaling) - 10); sib1->servingCellConfigCommon->downlinkConfigCommon.frequencyInfoDL.offsetToPointA = scs_scaling2 * (absolute_diff/(12*scs_scaling) - 10);
LOG_I(NR_RRC,"SIB1 freq: absoluteFrequencySSB %ld, absoluteFrequencyPointA %ld\n",
*configuration->scc->downlinkConfigCommon->frequencyInfoDL->absoluteFrequencySSB,
configuration->scc->downlinkConfigCommon->frequencyInfoDL->absoluteFrequencyPointA);
LOG_I(NR_RRC,"SIB1 freq: absolute_diff %d, %d*(absolute_diff/(12*%d) - 10) %d\n",absolute_diff,scs_scaling2,scs_scaling,sib1->servingCellConfigCommon->downlinkConfigCommon.frequencyInfoDL.offsetToPointA);
for(int i = 0; i< configuration->scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.count; i++) { for(int i = 0; i< configuration->scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.count; i++) {
ASN_SEQUENCE_ADD(&sib1->servingCellConfigCommon->downlinkConfigCommon.frequencyInfoDL.scs_SpecificCarrierList.list,configuration->scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[i]); ASN_SEQUENCE_ADD(&sib1->servingCellConfigCommon->downlinkConfigCommon.frequencyInfoDL.scs_SpecificCarrierList.list,configuration->scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[i]);
} }
targets/ARCH/USRP/USERSPACE/LIB/usrp_lib.cpp
+1 -1
View File
@@ -940,7 +940,7 @@ extern "C" {
LOG_I(HW, "openair0_cfg[0].sdr_addrs == '%s'\n", openair0_cfg[0].sdr_addrs); LOG_I(HW, "openair0_cfg[0].sdr_addrs == '%s'\n", openair0_cfg[0].sdr_addrs);
LOG_I(HW, "openair0_cfg[0].clock_source == '%d' (internal = %d, external = %d)\n", openair0_cfg[0].clock_source,internal,external); LOG_I(HW, "openair0_cfg[0].clock_source == '%d' (internal = %d, external = %d)\n", openair0_cfg[0].clock_source,internal,external);
usrp_state_t *s ; usrp_state_t *s ;
int choffset = 1; int choffset = 0;
if ( device->priv == NULL) { if ( device->priv == NULL) {
s=(usrp_state_t *)calloc(sizeof(usrp_state_t),1); s=(usrp_state_t *)calloc(sizeof(usrp_state_t),1);