Merge remote-tracking branch 'origin/develop' into oairu
This commit is contained in:
Raymond Knopp
@@ -399,8 +399,8 @@ typedef struct NbIoTRrcConfigurationReq_s {
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// gNB: GNB_APP -> RRC messages
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typedef struct NRRrcConfigurationReq_s {
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uint32_t cell_identity;
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uint16_t tac;
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uint64_t cell_identity;
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uint32_t tac;
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uint16_t mcc[PLMN_LIST_MAX_SIZE];
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uint16_t mnc[PLMN_LIST_MAX_SIZE];
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uint8_t mnc_digit_length[PLMN_LIST_MAX_SIZE];
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@@ -39,6 +39,7 @@
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/* cell configuration section name */
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#define GNB_CONFIG_STRING_GNB_LIST "gNBs"
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#define GNB_CONFIG_STRING_PDCCH_CONFIGSIB1 "pdcch_ConfigSIB1"
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#define GNB_CONFIG_STRING_SERVINGCELLCONFIGCOMMON "servingCellConfigCommon"
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#define GNB_CONFIG_STRING_PHYSCELLID "physCellId"
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#define GNB_CONFIG_STRING_NTIMINGADVANCEOFFSET "n_TimingAdvanceOffset"
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@@ -210,6 +211,21 @@
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#define CARRIERBANDWIDTH_OKVALUES {11,18,24,25,31,32,38,51,52,65,66,78,79,93,106,107,121,132,133,135,160,162,189,216,217,245,264,270,273}
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/*--------------------------------------------------------------------------------------------------------------------*/
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/* pdcch_ConfigSIB1 parameters */
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/*--------------------------------------------------------------------------------------------------------------------*/
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#define CONTROL_RESOURCE_SET_ZERO "controlResourceSetZero"
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#define SEARCH_SPACE_ZERO "searchSpaceZero"
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#define PDCCH_CONFIGSIB1PARAMS_DESC(pdcch_ConfigSIB1) { \
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{CONTROL_RESOURCE_SET_ZERO, NULL, 0, i64ptr:&pdcch_ConfigSIB1->controlResourceSetZero, defintval:0, TYPE_INT64, 0}, \
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{SEARCH_SPACE_ZERO, NULL, 0, i64ptr:&pdcch_ConfigSIB1->searchSpaceZero, defintval:0, TYPE_INT64, 0} \
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}
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#define CONTROL_RESOURCE_SET_ZERO_IDX 0
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#define SEARCH_SPACE_ZERO_IDX 1
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/*--------------------------------------------------------------------------------------------------------------------*/
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/*-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/
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/* Serving Cell Config Common configuration parameters */
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/* optname helpstr paramflags XXXptr defXXXval type numelt */
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@@ -575,6 +575,17 @@ void RCconfig_NRRRC(MessageDef *msg_p, uint32_t i, gNB_RRC_INST *rrc) {
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gnb_id = *(GNBParamList.paramarray[i][GNB_GNB_ID_IDX].uptr);
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}
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// pdcch_ConfigSIB1
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rrc->carrier.pdcch_ConfigSIB1 = calloc(1,sizeof(NR_PDCCH_ConfigSIB1_t));
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paramdef_t pdcch_ConfigSIB1[] = PDCCH_CONFIGSIB1PARAMS_DESC(rrc->carrier.pdcch_ConfigSIB1);
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paramlist_def_t pdcch_ConfigSIB1ParamList = {GNB_CONFIG_STRING_PDCCH_CONFIGSIB1, NULL, 0};
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sprintf(aprefix, "%s.[%i]", GNB_CONFIG_STRING_GNB_LIST, 0);
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config_getlist(&pdcch_ConfigSIB1ParamList, NULL, 0, aprefix);
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if (pdcch_ConfigSIB1ParamList.numelt > 0) {
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sprintf(aprefix, "%s.[%i].%s.[%i]", GNB_CONFIG_STRING_GNB_LIST,0,GNB_CONFIG_STRING_PDCCH_CONFIGSIB1, 0);
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config_get(pdcch_ConfigSIB1,sizeof(pdcch_ConfigSIB1)/sizeof(paramdef_t),aprefix);
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}
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sprintf(aprefix, "%s.[%i]", GNB_CONFIG_STRING_GNB_LIST, 0);
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config_getlist(&SCCsParamList, NULL, 0, aprefix);
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@@ -1010,7 +1021,7 @@ void NRRCConfig(void) {
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paramdef_t GNBSParams[] = GNBSPARAMS_DESC;
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/* get global parameters, defined outside any section in the config file */
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LOG_I(GNB_APP, "Getting GNBSParams\n");
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config_get( GNBSParams,sizeof(GNBSParams)/sizeof(paramdef_t),NULL);
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@@ -78,7 +78,6 @@ typedef enum {
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#define GNB_CONFIG_STRING_ASN1_VERBOSITY_NONE "none"
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#define GNB_CONFIG_STRING_ASN1_VERBOSITY_ANNOYING "annoying"
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#define GNB_CONFIG_STRING_ASN1_VERBOSITY_INFO "info"
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/* global parameters, not under a specific section */
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#define GNB_CONFIG_STRING_ASN1_VERBOSITY "Asn1_verbosity"
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@@ -33,6 +33,8 @@
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#include "LAYER2/NR_MAC_gNB/mac_proto.h"
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#include <limits.h>
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#define reserved 0xffff
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const uint8_t nr_slots_per_frame[5] = {10, 20, 40, 80, 160};
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// Table 6.3.3.1-5 (38.211) NCS for preamble formats with delta_f_RA = 1.25 KHz
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@@ -48,6 +50,73 @@ uint16_t NCS_restricted_TypeB_delta_f_RA_5[14] = {36,57,60,63,65,68,71,77,81,8
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// Table 6.3.3.1-7 (38.211) NCS for preamble formats with delta_f_RA = 15 * 2mu KHz where mu = {0,1,2,3}
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uint16_t NCS_unrestricted_delta_f_RA_15[16] = {0,2,4,6,8,10,12,13,15,17,19,23,27,34,46,69};
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// specification mapping talbe, table_38$x_$y_$z_c$a
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// - $x: specification
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// - $y: subclause-major
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// - $z: subclause-minor
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// - $a: ($a)th of column in table, start from zero
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const int32_t table_38213_13_1_c1[16] = {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, reserved}; // index 15 reserved
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const int32_t table_38213_13_1_c2[16] = {24, 24, 24, 24, 24, 24, 48, 48, 48, 48, 48, 48, 96, 96, 96, reserved}; // index 15 reserved
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const int32_t table_38213_13_1_c3[16] = { 2, 2, 2, 3, 3, 3, 1, 1, 2, 2, 3, 3, 1, 2, 3, reserved}; // index 15 reserved
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const int32_t table_38213_13_1_c4[16] = { 0, 2, 4, 0, 2, 4, 12, 16, 12, 16, 12, 16, 38, 38, 38, reserved}; // index 15 reserved
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const int32_t table_38213_13_2_c1[16] = {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, reserved, reserved}; // index 14-15 reserved
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const int32_t table_38213_13_2_c2[16] = {24, 24, 24, 24, 24, 24, 24, 24, 48, 48, 48, 48, 48, 48, reserved, reserved}; // index 14-15 reserved
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const int32_t table_38213_13_2_c3[16] = { 2, 2, 2, 2, 3, 3, 3, 3, 1, 1, 2, 2, 3, 3, reserved, reserved}; // index 14-15 reserved
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const int32_t table_38213_13_2_c4[16] = { 5, 6, 7, 8, 5, 6, 7, 8, 18, 20, 18, 20, 18, 20, reserved, reserved}; // index 14-15 reserved
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const int32_t table_38213_13_3_c1[16] = {1, 1, 1, 1, 1, 1, 1, 1, 1, reserved, reserved, reserved, reserved, reserved, reserved, reserved}; // index 09-15 reserved
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const int32_t table_38213_13_3_c2[16] = {48, 48, 48, 48, 48, 48, 96, 96, 96, reserved, reserved, reserved, reserved, reserved, reserved, reserved}; // index 09-15 reserved
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const int32_t table_38213_13_3_c3[16] = { 1, 1, 2, 2, 3, 3, 1, 2, 3, reserved, reserved, reserved, reserved, reserved, reserved, reserved}; // index 09-15 reserved
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const int32_t table_38213_13_3_c4[16] = { 2, 6, 2, 6, 2, 6, 28, 28, 28, reserved, reserved, reserved, reserved, reserved, reserved, reserved}; // index 09-15 reserved
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const int32_t table_38213_13_4_c1[16] = {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1};
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const int32_t table_38213_13_4_c2[16] = {24, 24, 24, 24, 24, 24, 24, 24, 24, 24, 48, 48, 48, 48, 48, 48};
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const int32_t table_38213_13_4_c3[16] = { 2, 2, 2, 2, 2, 3, 3, 3, 3, 3, 1, 1, 1, 2, 2, 2};
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const int32_t table_38213_13_4_c4[16] = { 0, 1, 2, 3, 4, 0, 1, 2, 3, 4, 12, 14, 16, 12, 14, 16};
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const int32_t table_38213_13_5_c1[16] = {1, 1, 1, 1, 1, 1, 1, 1, 1, reserved, reserved, reserved, reserved, reserved, reserved, reserved}; // index 09-15 reserved
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const int32_t table_38213_13_5_c2[16] = {48, 48, 48, 96, 96, 96, 96, 96, 96, reserved, reserved, reserved, reserved, reserved, reserved, reserved}; // index 09-15 reserved
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const int32_t table_38213_13_5_c3[16] = { 1, 2, 3, 1, 1, 2, 2, 3, 3, reserved, reserved, reserved, reserved, reserved, reserved, reserved}; // index 09-15 reserved
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const int32_t table_38213_13_5_c4[16] = { 4, 4, 4, 0, 56, 0, 56, 0, 56, reserved, reserved, reserved, reserved, reserved, reserved, reserved}; // index 09-15 reserved
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const int32_t table_38213_13_6_c1[16] = {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, reserved, reserved, reserved, reserved, reserved, reserved}; // index 10-15 reserved
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const int32_t table_38213_13_6_c2[16] = {24, 24, 24, 24, 48, 48, 48, 48, 48, 48, reserved, reserved, reserved, reserved, reserved, reserved}; // index 10-15 reserved
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const int32_t table_38213_13_6_c3[16] = { 2, 2, 3, 3, 1, 1, 2, 2, 3, 3, reserved, reserved, reserved, reserved, reserved, reserved}; // index 10-15 reserved
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const int32_t table_38213_13_6_c4[16] = { 0, 4, 0, 4, 0, 28, 0, 28, 0, 28, reserved, reserved, reserved, reserved, reserved, reserved}; // index 10-15 reserved
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const int32_t table_38213_13_7_c1[16] = {1, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, 2, reserved, reserved, reserved, reserved}; // index 12-15 reserved
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const int32_t table_38213_13_7_c2[16] = {48, 48, 48, 48, 48, 48, 96, 96, 48, 48, 96, 96, reserved, reserved, reserved, reserved}; // index 12-15 reserved
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const int32_t table_38213_13_7_c3[16] = { 1, 1, 2, 2, 3, 3, 1, 2, 1, 1, 1, 1, reserved, reserved, reserved, reserved}; // index 12-15 reserved
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const int32_t table_38213_13_7_c4[16] = { 0, 8, 0, 8, 0, 8, 28, 28,-41, 49,-41, 97, reserved, reserved, reserved, reserved}; // index 12-15 reserved, condition A as default
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const int32_t table_38213_13_8_c1[16] = { 1, 1, 1, 1, 3, 3, 3, 3, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved}; // index 15 reserved
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const int32_t table_38213_13_8_c2[16] = {24, 24, 48, 48, 24, 24, 48, 48, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved}; // index 15 reserved
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const int32_t table_38213_13_8_c3[16] = { 2, 2, 1, 2, 2, 2, 2, 2, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved}; // index 15 reserved
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const int32_t table_38213_13_8_c4[16] = { 0, 4, 14, 14,-20, 24,-20, 48, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved}; // index 15 reserved, condition A as default
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const int32_t table_38213_13_9_c1[16] = {1, 1, 1, 1, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved}; // index 04-15 reserved
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const int32_t table_38213_13_9_c2[16] = {96, 96, 96, 96, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved}; // index 04-15 reserved
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const int32_t table_38213_13_9_c3[16] = { 1, 1, 2, 2, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved}; // index 04-15 reserved
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const int32_t table_38213_13_9_c4[16] = { 0, 16, 0, 16, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved}; // index 04-15 reserved
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const int32_t table_38213_13_10_c1[16] = {1, 1, 1, 1, 2, 2, 2, 2, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved}; // index 08-15 reserved
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const int32_t table_38213_13_10_c2[16] = {48, 48, 48, 48, 24, 24, 48, 48, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved}; // index 08-15 reserved
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const int32_t table_38213_13_10_c3[16] = { 1, 1, 2, 2, 1, 1, 1, 1, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved}; // index 08-15 reserved
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const int32_t table_38213_13_10_c4[16] = { 0, 8, 0, 8,-41, 25,-41, 49, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved}; // index 08-15 reserved, condition A as default
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const float table_38213_13_11_c1[16] = { 0, 0, 2, 2, 5, 5, 7, 7, 0, 5, 0, 0, 2, 2, 5, 5}; // O
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const int32_t table_38213_13_11_c2[16] = { 1, 2, 1, 2, 1, 2, 1, 2, 1, 1, 1, 1, 1, 1, 1, 1};
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const float table_38213_13_11_c3[16] = { 1, 0.5f, 1, 0.5f, 1, 0.5f, 1, 0.5f, 1, 1, 1, 1, 1, 1, 1, 1}; // M
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const int32_t table_38213_13_11_c4[16] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 1, 2, 1, 2}; // i is even as default
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const float table_38213_13_12_c1[16] = { 0, 0, 2.5f, 2.5f, 5, 5, 0, 2.5f, 5, 7.5f, 7.5f, 7.5f, 0, 5, reserved, reserved}; // O, index 14-15 reserved
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const int32_t table_38213_13_12_c2[16] = { 1, 2, 1, 2, 1, 2, 2, 2, 2, 1, 2, 2, 1, 1, reserved, reserved}; // index 14-15 reserved
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const float table_38213_13_12_c3[16] = { 1, 0.5f, 1, 0.5f, 1, 0.5f, 0.5f, 0.5f, 0.5f, 1, 0.5f, 0.5f, 1, 1, reserved, reserved}; // M, index 14-15 reserved
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const int32_t table_38213_10_1_1_c2[5] = { 0, 0, 4, 2, 1 };
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const char *prachfmt[]={"0","1","2","3", "A1","A2","A3","B1","B4","C0","C2","A1/B1","A2/B2","A3/B3"};
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const char *duplex_mode[]={"FDD","TDD"};
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@@ -974,6 +1043,33 @@ int64_t *get_prach_config_info(uint32_t pointa,
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return prach_config_info_p;
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}
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void find_aggregation_candidates(uint8_t *aggregation_level,
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uint8_t *nr_of_candidates,
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NR_SearchSpace_t *ss) {
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if (ss->nrofCandidates->aggregationLevel1 != NR_SearchSpace__nrofCandidates__aggregationLevel1_n0) {
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*aggregation_level = 1;
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*nr_of_candidates = ss->nrofCandidates->aggregationLevel1;
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}
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if (ss->nrofCandidates->aggregationLevel2 != NR_SearchSpace__nrofCandidates__aggregationLevel2_n0) {
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*aggregation_level = 2;
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*nr_of_candidates = ss->nrofCandidates->aggregationLevel2;
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}
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if (ss->nrofCandidates->aggregationLevel4 != NR_SearchSpace__nrofCandidates__aggregationLevel4_n0) {
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*aggregation_level = 4;
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*nr_of_candidates = ss->nrofCandidates->aggregationLevel4;
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}
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if (ss->nrofCandidates->aggregationLevel8 != NR_SearchSpace__nrofCandidates__aggregationLevel8_n0) {
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*aggregation_level = 8;
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*nr_of_candidates = ss->nrofCandidates->aggregationLevel8;
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}
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if (ss->nrofCandidates->aggregationLevel16 != NR_SearchSpace__nrofCandidates__aggregationLevel16_n0) {
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*aggregation_level = 16;
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*nr_of_candidates = ss->nrofCandidates->aggregationLevel16;
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}
|
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}
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|
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|
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void find_monitoring_periodicity_offset_common(NR_SearchSpace_t *ss,
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uint16_t *slot_period,
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uint16_t *offset) {
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@@ -2297,11 +2393,19 @@ uint16_t nr_dci_size(NR_ServingCellConfigCommon_t *scc,
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long rbg_size_config;
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int num_entries = 0;
|
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int pusch_antenna_ports = 1; // TODO hardcoded number of antenna ports for pusch
|
||||
NR_BWP_Downlink_t *bwp=secondaryCellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.array[bwp_id-1];
|
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NR_BWP_Uplink_t *ubwp=secondaryCellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig->uplinkBWP_ToAddModList->list.array[bwp_id-1];
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||||
NR_PDSCH_Config_t *pdsch_config = bwp->bwp_Dedicated->pdsch_Config->choice.setup;
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||||
NR_PUSCH_Config_t *pusch_Config = ubwp->bwp_Dedicated->pusch_Config->choice.setup;
|
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NR_SRS_Config_t *srs_config = ubwp->bwp_Dedicated->srs_Config->choice.setup;
|
||||
|
||||
NR_BWP_Downlink_t *bwp = NULL;
|
||||
NR_BWP_Uplink_t *ubwp = NULL;
|
||||
NR_PDSCH_Config_t *pdsch_config = NULL;
|
||||
NR_PUSCH_Config_t *pusch_Config = NULL;
|
||||
NR_SRS_Config_t *srs_config = NULL;
|
||||
if(bwp_id > 0) {
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bwp=secondaryCellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.array[bwp_id-1];
|
||||
ubwp=secondaryCellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig->uplinkBWP_ToAddModList->list.array[bwp_id-1];
|
||||
pdsch_config = bwp->bwp_Dedicated->pdsch_Config->choice.setup;
|
||||
pusch_Config = ubwp->bwp_Dedicated->pusch_Config->choice.setup;
|
||||
srs_config = ubwp->bwp_Dedicated->srs_Config->choice.setup;
|
||||
}
|
||||
|
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switch(format) {
|
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/*Only sizes for 0_0 and 1_0 are correct at the moment*/
|
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@@ -2506,8 +2610,13 @@ uint16_t nr_dci_size(NR_ServingCellConfigCommon_t *scc,
|
||||
|
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case NR_DL_DCI_FORMAT_1_0:
|
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/// fixed: Format identifier 1, VRB2PRB 1, MCS 5, NDI 1, RV 2, HARQ PID 4, DAI 2, PUCCH TPC 2, PUCCH RInd 3, PDSCH to HARQ TInd 3 Time Domain assgnmt 4 -- 28
|
||||
size += 28;
|
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size = 28;
|
||||
size += (uint8_t)ceil( log2( (N_RB*(N_RB+1))>>1 ) ); // Freq domain assignment
|
||||
|
||||
dci_pdu->frequency_domain_assignment.nbits = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) );
|
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dci_pdu->time_domain_assignment.nbits = 4;
|
||||
dci_pdu->vrb_to_prb_mapping.nbits = 1;
|
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|
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break;
|
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|
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case NR_DL_DCI_FORMAT_1_1:
|
||||
@@ -2757,8 +2866,7 @@ int16_t fill_dmrs_mask(NR_PDSCH_Config_t *pdsch_Config,int dmrs_TypeA_Position,i
|
||||
case 5 :
|
||||
case 6 :
|
||||
case 7 :
|
||||
AssertFatal(1==0,"Incoompatible NrOfSymbols %d and dmrs_Additional_Position %d\n",
|
||||
NrOfSymbols,(int)*dmrs_config->dmrs_AdditionalPosition);
|
||||
return(1<<l0);
|
||||
break;
|
||||
case 8 :
|
||||
case 9:
|
||||
@@ -2766,26 +2874,26 @@ int16_t fill_dmrs_mask(NR_PDSCH_Config_t *pdsch_Config,int dmrs_TypeA_Position,i
|
||||
break;
|
||||
case 10:
|
||||
case 11:
|
||||
if (*dmrs_config->dmrs_AdditionalPosition==NR_DMRS_DownlinkConfig__dmrs_AdditionalPosition_pos1)
|
||||
if (dmrs_config->dmrs_AdditionalPosition && *dmrs_config->dmrs_AdditionalPosition==NR_DMRS_DownlinkConfig__dmrs_AdditionalPosition_pos1)
|
||||
return(1<<l0 | 1<<9);
|
||||
else
|
||||
return(1<<l0 | 1<<6 | 1<<9);
|
||||
break;
|
||||
case 12:
|
||||
if (*dmrs_config->dmrs_AdditionalPosition==NR_DMRS_DownlinkConfig__dmrs_AdditionalPosition_pos1)
|
||||
if (dmrs_config->dmrs_AdditionalPosition && *dmrs_config->dmrs_AdditionalPosition==NR_DMRS_DownlinkConfig__dmrs_AdditionalPosition_pos1)
|
||||
return(1<<l0 | 1<<9);
|
||||
else if (pos2==1)
|
||||
return(1<<l0 | 1<<6 | 1<<9);
|
||||
else if (*dmrs_config->dmrs_AdditionalPosition==NR_DMRS_DownlinkConfig__dmrs_AdditionalPosition_pos3)
|
||||
else if (dmrs_config->dmrs_AdditionalPosition && *dmrs_config->dmrs_AdditionalPosition==NR_DMRS_DownlinkConfig__dmrs_AdditionalPosition_pos3)
|
||||
return(1<<l0 | 1<<5 | 1<<8 | 1<<11);
|
||||
break;
|
||||
case 13:
|
||||
case 14:
|
||||
if (*dmrs_config->dmrs_AdditionalPosition==NR_DMRS_DownlinkConfig__dmrs_AdditionalPosition_pos1)
|
||||
if (dmrs_config->dmrs_AdditionalPosition && *dmrs_config->dmrs_AdditionalPosition==NR_DMRS_DownlinkConfig__dmrs_AdditionalPosition_pos1)
|
||||
return(1<<l0 | 1<<11);
|
||||
else if (pos2==1)
|
||||
return(1<<l0 | 1<<7 | 1<<11);
|
||||
else if (*dmrs_config->dmrs_AdditionalPosition==NR_DMRS_DownlinkConfig__dmrs_AdditionalPosition_pos3)
|
||||
else if (dmrs_config->dmrs_AdditionalPosition && *dmrs_config->dmrs_AdditionalPosition==NR_DMRS_DownlinkConfig__dmrs_AdditionalPosition_pos3)
|
||||
return(1<<l0 | 1<<5 | 1<<8 | 1<<11);
|
||||
break;
|
||||
}
|
||||
@@ -2931,3 +3039,373 @@ bool set_dl_ptrs_values(NR_PTRS_DownlinkConfig_t *ptrs_config,
|
||||
//printf("[MAC] PTRS is set K= %u L= %u\n", *K_ptrs,1<<*L_ptrs);
|
||||
return valid;
|
||||
}
|
||||
uint32_t get_ssb_slot(uint32_t ssb_index){
|
||||
// this function now only support f <= 3GHz
|
||||
return ssb_index & 0x3 ;
|
||||
|
||||
// return first_symbol(case, freq, ssb_index) / 14
|
||||
}
|
||||
|
||||
int get_type0_PDCCH_CSS_config_parameters(NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config,
|
||||
NR_MIB_t *mib,
|
||||
uint8_t extra_bits,
|
||||
uint32_t ssb_length,
|
||||
uint32_t ssb_index,
|
||||
uint32_t ssb_offset_point_a) {
|
||||
|
||||
// deafult for testing
|
||||
subcarrier_spacing_t scs_ssb = scs_30kHz;
|
||||
channel_bandwidth_t min_channel_bw = bw_10MHz;
|
||||
frequency_range_t frequency_range = FR1;
|
||||
const uint32_t num_slot_per_frame = 20;
|
||||
|
||||
type0_PDCCH_CSS_config->ssb_length = ssb_length;
|
||||
type0_PDCCH_CSS_config->ssb_index = ssb_index;
|
||||
type0_PDCCH_CSS_config->frame = (mib->systemFrameNumber.buf[0] >> mib->systemFrameNumber.bits_unused);
|
||||
|
||||
uint16_t frame_number_4lsb = 0;
|
||||
for (int i=0; i<4; i++) {
|
||||
frame_number_4lsb |= ((extra_bits>>i)&1)<<(3-i);
|
||||
}
|
||||
|
||||
uint8_t ssb_subcarrier_offset_msb = ( extra_bits >> 5 ) & 0x1; // extra bits[5]
|
||||
uint8_t ssb_subcarrier_offset = (uint8_t)mib->ssb_SubcarrierOffset;
|
||||
|
||||
type0_PDCCH_CSS_config->frame = type0_PDCCH_CSS_config->frame << 4;
|
||||
type0_PDCCH_CSS_config->frame = type0_PDCCH_CSS_config->frame | frame_number_4lsb;
|
||||
|
||||
if(type0_PDCCH_CSS_config->ssb_length == 64){
|
||||
type0_PDCCH_CSS_config->ssb_index = type0_PDCCH_CSS_config->ssb_index & (( extra_bits >> 2 ) & 0x1C ); // { extra_bits[5:7], ssb_index[2:0] }
|
||||
}else{
|
||||
if(ssb_subcarrier_offset_msb){
|
||||
ssb_subcarrier_offset = ssb_subcarrier_offset | 0x10;
|
||||
}
|
||||
}
|
||||
|
||||
// assume carrier frequency < 6GHz
|
||||
subcarrier_spacing_t scs_pdcch;
|
||||
if(mib->subCarrierSpacingCommon == NR_MIB__subCarrierSpacingCommon_scs15or60){
|
||||
scs_pdcch = scs_15kHz;
|
||||
}else{ //NR_MIB__subCarrierSpacingCommon_scs30or120
|
||||
scs_pdcch = scs_30kHz;
|
||||
}
|
||||
|
||||
uint32_t is_condition_A = (ssb_subcarrier_offset == 0); // 38.213 ch.13
|
||||
uint32_t index_4msb = (mib->pdcch_ConfigSIB1.controlResourceSetZero);
|
||||
uint32_t index_4lsb = (mib->pdcch_ConfigSIB1.searchSpaceZero);
|
||||
|
||||
type0_PDCCH_CSS_config->num_rbs = -1;
|
||||
type0_PDCCH_CSS_config->num_symbols = -1;
|
||||
type0_PDCCH_CSS_config->rb_offset = -1;
|
||||
|
||||
// type0-pdcch coreset
|
||||
switch( (scs_ssb << 5) | scs_pdcch ){
|
||||
case (scs_15kHz << 5) | scs_15kHz :
|
||||
AssertFatal(index_4msb < 15, "38.213 Table 13-1 4 MSB out of range\n");
|
||||
type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern = 1;
|
||||
type0_PDCCH_CSS_config->num_rbs = table_38213_13_1_c2[index_4msb];
|
||||
type0_PDCCH_CSS_config->num_symbols = table_38213_13_1_c3[index_4msb];
|
||||
type0_PDCCH_CSS_config->rb_offset = table_38213_13_1_c4[index_4msb];
|
||||
break;
|
||||
|
||||
case (scs_15kHz << 5) | scs_30kHz:
|
||||
AssertFatal(index_4msb < 14, "38.213 Table 13-2 4 MSB out of range\n");
|
||||
type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern = 1;
|
||||
type0_PDCCH_CSS_config->num_rbs = table_38213_13_2_c2[index_4msb];
|
||||
type0_PDCCH_CSS_config->num_symbols = table_38213_13_2_c3[index_4msb];
|
||||
type0_PDCCH_CSS_config->rb_offset = table_38213_13_2_c4[index_4msb];
|
||||
break;
|
||||
|
||||
case (scs_30kHz << 5) | scs_15kHz:
|
||||
if((min_channel_bw & bw_5MHz) | (min_channel_bw & bw_10MHz)){
|
||||
AssertFatal(index_4msb < 9, "38.213 Table 13-3 4 MSB out of range\n");
|
||||
type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern = 1;
|
||||
type0_PDCCH_CSS_config->num_rbs = table_38213_13_3_c2[index_4msb];
|
||||
type0_PDCCH_CSS_config->num_symbols = table_38213_13_3_c3[index_4msb];
|
||||
type0_PDCCH_CSS_config->rb_offset = table_38213_13_3_c4[index_4msb];
|
||||
}else if(min_channel_bw & bw_40MHz){
|
||||
AssertFatal(index_4msb < 9, "38.213 Table 13-5 4 MSB out of range\n");
|
||||
type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern = 1;
|
||||
type0_PDCCH_CSS_config->num_rbs = table_38213_13_5_c2[index_4msb];
|
||||
type0_PDCCH_CSS_config->num_symbols = table_38213_13_5_c3[index_4msb];
|
||||
type0_PDCCH_CSS_config->rb_offset = table_38213_13_5_c4[index_4msb];
|
||||
}else{ ; }
|
||||
|
||||
break;
|
||||
|
||||
case (scs_30kHz << 5) | scs_30kHz:
|
||||
if((min_channel_bw & bw_5MHz) | (min_channel_bw & bw_10MHz)){
|
||||
type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern = 1;
|
||||
type0_PDCCH_CSS_config->num_rbs = table_38213_13_4_c2[index_4msb];
|
||||
type0_PDCCH_CSS_config->num_symbols = table_38213_13_4_c3[index_4msb];
|
||||
type0_PDCCH_CSS_config->rb_offset = table_38213_13_4_c4[index_4msb];
|
||||
|
||||
}else if(min_channel_bw & bw_40MHz){
|
||||
AssertFatal(index_4msb < 10, "38.213 Table 13-6 4 MSB out of range\n");
|
||||
type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern = 1;
|
||||
type0_PDCCH_CSS_config->num_rbs = table_38213_13_6_c2[index_4msb];
|
||||
type0_PDCCH_CSS_config->num_symbols = table_38213_13_6_c3[index_4msb];
|
||||
type0_PDCCH_CSS_config->rb_offset = table_38213_13_6_c4[index_4msb];
|
||||
}else{ ; }
|
||||
break;
|
||||
|
||||
case (scs_120kHz << 5) | scs_60kHz:
|
||||
AssertFatal(index_4msb < 12, "38.213 Table 13-7 4 MSB out of range\n");
|
||||
if(index_4msb & 0x7){
|
||||
type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern = 1;
|
||||
}else if(index_4msb & 0x18){
|
||||
type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern = 2;
|
||||
}else{ ; }
|
||||
|
||||
type0_PDCCH_CSS_config->num_rbs = table_38213_13_7_c2[index_4msb];
|
||||
type0_PDCCH_CSS_config->num_symbols = table_38213_13_7_c3[index_4msb];
|
||||
if(!is_condition_A && (index_4msb == 8 || index_4msb == 10)){
|
||||
type0_PDCCH_CSS_config->rb_offset = table_38213_13_7_c4[index_4msb] - 1;
|
||||
}else{
|
||||
type0_PDCCH_CSS_config->rb_offset = table_38213_13_7_c4[index_4msb];
|
||||
}
|
||||
break;
|
||||
|
||||
case (scs_120kHz << 5) | scs_120kHz:
|
||||
AssertFatal(index_4msb < 8, "38.213 Table 13-8 4 MSB out of range\n");
|
||||
if(index_4msb & 0x3){
|
||||
type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern = 1;
|
||||
}else if(index_4msb & 0x0c){
|
||||
type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern = 3;
|
||||
}
|
||||
|
||||
type0_PDCCH_CSS_config->num_rbs = table_38213_13_8_c2[index_4msb];
|
||||
type0_PDCCH_CSS_config->num_symbols = table_38213_13_8_c3[index_4msb];
|
||||
if(!is_condition_A && (index_4msb == 4 || index_4msb == 6)){
|
||||
type0_PDCCH_CSS_config->rb_offset = table_38213_13_8_c4[index_4msb] - 1;
|
||||
}else{
|
||||
type0_PDCCH_CSS_config->rb_offset = table_38213_13_8_c4[index_4msb];
|
||||
}
|
||||
break;
|
||||
|
||||
case (scs_240kHz << 5) | scs_60kHz:
|
||||
AssertFatal(index_4msb < 4, "38.213 Table 13-9 4 MSB out of range\n");
|
||||
type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern = 1;
|
||||
type0_PDCCH_CSS_config->num_rbs = table_38213_13_9_c2[index_4msb];
|
||||
type0_PDCCH_CSS_config->num_symbols = table_38213_13_9_c3[index_4msb];
|
||||
type0_PDCCH_CSS_config->rb_offset = table_38213_13_9_c4[index_4msb];
|
||||
break;
|
||||
|
||||
case (scs_240kHz << 5) | scs_120kHz:
|
||||
AssertFatal(index_4msb < 8, "38.213 Table 13-10 4 MSB out of range\n");
|
||||
if(index_4msb & 0x3){
|
||||
type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern = 1;
|
||||
}else if(index_4msb & 0x0c){
|
||||
type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern = 2;
|
||||
}
|
||||
type0_PDCCH_CSS_config->num_rbs = table_38213_13_10_c2[index_4msb];
|
||||
type0_PDCCH_CSS_config->num_symbols = table_38213_13_10_c3[index_4msb];
|
||||
if(!is_condition_A && (index_4msb == 4 || index_4msb == 6)){
|
||||
type0_PDCCH_CSS_config->rb_offset = table_38213_13_10_c4[index_4msb]-1;
|
||||
}else{
|
||||
type0_PDCCH_CSS_config->rb_offset = table_38213_13_10_c4[index_4msb];
|
||||
}
|
||||
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
LOG_D(MAC,"Coreset0: index_4msb=%d, num_rbs=%d, num_symb=%d, rb_offset=%d\n",
|
||||
index_4msb,type0_PDCCH_CSS_config->num_rbs,type0_PDCCH_CSS_config->num_symbols,type0_PDCCH_CSS_config->rb_offset );
|
||||
|
||||
AssertFatal(type0_PDCCH_CSS_config->num_rbs != -1, "Type0 PDCCH coreset num_rbs undefined");
|
||||
AssertFatal(type0_PDCCH_CSS_config->num_symbols != -1, "Type0 PDCCH coreset num_symbols undefined");
|
||||
AssertFatal(type0_PDCCH_CSS_config->rb_offset != -1, "Type0 PDCCH coreset rb_offset undefined");
|
||||
|
||||
|
||||
//uint32_t cell_id = 0; // obtain from L1 later
|
||||
|
||||
//mac->type0_pdcch_dci_config.coreset.rb_start = rb_offset;
|
||||
//mac->type0_pdcch_dci_config.coreset.rb_end = rb_offset + num_rbs - 1;
|
||||
|
||||
// uint64_t mask = 0x0;
|
||||
// uint8_t i;
|
||||
// for(i=0; i<(type0_PDCCH_CSS_config->num_rbs/6); ++i){ // 38.331 Each bit corresponds a group of 6 RBs
|
||||
// mask = mask >> 1;
|
||||
// mask = mask | 0x100000000000;
|
||||
// }
|
||||
|
||||
//LOG_I(MAC,">>>>>>>>mask %x num_rbs %d rb_offset %d\n", mask, num_rbs, rb_offset);
|
||||
|
||||
// mac->type0_pdcch_dci_config.coreset.frequency_domain_resource = mask;
|
||||
// mac->type0_pdcch_dci_config.coreset.rb_offset = rb_offset; // additional parameter other than coreset
|
||||
//
|
||||
// //mac->type0_pdcch_dci_config.type0_pdcch_coreset.duration = num_symbols;
|
||||
// mac->type0_pdcch_dci_config.coreset.cce_reg_mapping_type = CCE_REG_MAPPING_TYPE_INTERLEAVED;
|
||||
// mac->type0_pdcch_dci_config.coreset.cce_reg_interleaved_reg_bundle_size = 6; // L 38.211 7.3.2.2
|
||||
// mac->type0_pdcch_dci_config.coreset.cce_reg_interleaved_interleaver_size = 2; // R 38.211 7.3.2.2
|
||||
// mac->type0_pdcch_dci_config.coreset.cce_reg_interleaved_shift_index = cell_id;
|
||||
// mac->type0_pdcch_dci_config.coreset.precoder_granularity = PRECODER_GRANULARITY_SAME_AS_REG_BUNDLE;
|
||||
// mac->type0_pdcch_dci_config.coreset.pdcch_dmrs_scrambling_id = cell_id;
|
||||
|
||||
|
||||
// type0-pdcch search space
|
||||
float big_o = 0.0f;
|
||||
float big_m = 0.0f;
|
||||
type0_PDCCH_CSS_config->sfn_c = SFN_C_IMPOSSIBLE; // only valid for mux=1
|
||||
type0_PDCCH_CSS_config->n_c = UINT_MAX;
|
||||
type0_PDCCH_CSS_config->number_of_search_space_per_slot = UINT_MAX;
|
||||
type0_PDCCH_CSS_config->first_symbol_index = UINT_MAX;
|
||||
type0_PDCCH_CSS_config->search_space_duration = 0; // element of search space
|
||||
// 38.213 table 10.1-1
|
||||
|
||||
/// MUX PATTERN 1
|
||||
if(type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern == 1 && frequency_range == FR1){
|
||||
big_o = table_38213_13_11_c1[index_4lsb];
|
||||
type0_PDCCH_CSS_config->number_of_search_space_per_slot = table_38213_13_11_c2[index_4lsb];
|
||||
big_m = table_38213_13_11_c3[index_4lsb];
|
||||
|
||||
uint32_t temp = (uint32_t)(big_o*scs_pdcch) + (uint32_t)(type0_PDCCH_CSS_config->ssb_index*big_m);
|
||||
type0_PDCCH_CSS_config->n_c = temp / num_slot_per_frame;
|
||||
if((temp/num_slot_per_frame) & 0x1){
|
||||
type0_PDCCH_CSS_config->sfn_c = SFN_C_MOD_2_EQ_1;
|
||||
}else{
|
||||
type0_PDCCH_CSS_config->sfn_c = SFN_C_MOD_2_EQ_0;
|
||||
}
|
||||
|
||||
if((index_4lsb == 1 || index_4lsb == 3 || index_4lsb == 5 || index_4lsb == 7) && (type0_PDCCH_CSS_config->ssb_index&1)){
|
||||
type0_PDCCH_CSS_config->first_symbol_index = type0_PDCCH_CSS_config->num_symbols;
|
||||
}else{
|
||||
type0_PDCCH_CSS_config->first_symbol_index = table_38213_13_11_c4[index_4lsb];
|
||||
}
|
||||
// 38.213 chapter 13: over two consecutive slots
|
||||
type0_PDCCH_CSS_config->search_space_duration = 2;
|
||||
}
|
||||
|
||||
if(type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern == 1 && frequency_range == FR2){
|
||||
big_o = table_38213_13_12_c1[index_4lsb];
|
||||
type0_PDCCH_CSS_config->number_of_search_space_per_slot = table_38213_13_11_c2[index_4lsb];
|
||||
big_m = table_38213_13_12_c3[index_4lsb];
|
||||
|
||||
if((index_4lsb == 1 || index_4lsb == 3 || index_4lsb == 5 || index_4lsb == 10) && (type0_PDCCH_CSS_config->ssb_index&1)){
|
||||
type0_PDCCH_CSS_config->first_symbol_index = 7;
|
||||
}else if((index_4lsb == 6 || index_4lsb == 7 || index_4lsb == 8 || index_4lsb == 11) && (type0_PDCCH_CSS_config->ssb_index&1)){
|
||||
type0_PDCCH_CSS_config->first_symbol_index = type0_PDCCH_CSS_config->num_symbols;
|
||||
}else{
|
||||
type0_PDCCH_CSS_config->first_symbol_index = 0;
|
||||
}
|
||||
// 38.213 chapter 13: over two consecutive slots
|
||||
type0_PDCCH_CSS_config->search_space_duration = 2;
|
||||
}
|
||||
|
||||
/// MUX PATTERN 2
|
||||
if(type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern == 2){
|
||||
|
||||
if((scs_ssb == scs_120kHz) && (scs_pdcch == scs_60kHz)){
|
||||
// 38.213 Table 13-13
|
||||
AssertFatal(index_4lsb == 0, "38.213 Table 13-13 4 LSB out of range\n");
|
||||
// PDCCH monitoring occasions (SFN and slot number) same as SSB frame-slot
|
||||
// sfn_c = SFN_C_EQ_SFN_SSB;
|
||||
type0_PDCCH_CSS_config->n_c = get_ssb_slot(type0_PDCCH_CSS_config->ssb_index);
|
||||
switch(type0_PDCCH_CSS_config->ssb_index & 0x3){ // ssb_index(i) mod 4
|
||||
case 0:
|
||||
type0_PDCCH_CSS_config->first_symbol_index = 0;
|
||||
break;
|
||||
case 1:
|
||||
type0_PDCCH_CSS_config->first_symbol_index = 1;
|
||||
break;
|
||||
case 2:
|
||||
type0_PDCCH_CSS_config->first_symbol_index = 6;
|
||||
break;
|
||||
case 3:
|
||||
type0_PDCCH_CSS_config->first_symbol_index = 7;
|
||||
break;
|
||||
default: break;
|
||||
}
|
||||
|
||||
}else if((scs_ssb == scs_240kHz) && (scs_pdcch == scs_120kHz)){
|
||||
// 38.213 Table 13-14
|
||||
AssertFatal(index_4lsb == 0, "38.213 Table 13-14 4 LSB out of range\n");
|
||||
// PDCCH monitoring occasions (SFN and slot number) same as SSB frame-slot
|
||||
// sfn_c = SFN_C_EQ_SFN_SSB;
|
||||
type0_PDCCH_CSS_config->n_c = get_ssb_slot(type0_PDCCH_CSS_config->ssb_index);
|
||||
switch(type0_PDCCH_CSS_config->ssb_index & 0x7){ // ssb_index(i) mod 8
|
||||
case 0:
|
||||
type0_PDCCH_CSS_config->first_symbol_index = 0;
|
||||
break;
|
||||
case 1:
|
||||
type0_PDCCH_CSS_config->first_symbol_index = 1;
|
||||
break;
|
||||
case 2:
|
||||
type0_PDCCH_CSS_config->first_symbol_index = 2;
|
||||
break;
|
||||
case 3:
|
||||
type0_PDCCH_CSS_config->first_symbol_index = 3;
|
||||
break;
|
||||
case 4:
|
||||
type0_PDCCH_CSS_config->first_symbol_index = 12;
|
||||
type0_PDCCH_CSS_config->n_c = get_ssb_slot(type0_PDCCH_CSS_config->ssb_index) - 1;
|
||||
break;
|
||||
case 5:
|
||||
type0_PDCCH_CSS_config->first_symbol_index = 13;
|
||||
type0_PDCCH_CSS_config->n_c = get_ssb_slot(type0_PDCCH_CSS_config->ssb_index) - 1;
|
||||
break;
|
||||
case 6:
|
||||
type0_PDCCH_CSS_config->first_symbol_index = 0;
|
||||
break;
|
||||
case 7:
|
||||
type0_PDCCH_CSS_config->first_symbol_index = 1;
|
||||
break;
|
||||
default: break;
|
||||
}
|
||||
}else{ ; }
|
||||
// 38.213 chapter 13: over one slot
|
||||
type0_PDCCH_CSS_config->search_space_duration = 1;
|
||||
}
|
||||
|
||||
/// MUX PATTERN 3
|
||||
if(type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern == 3){
|
||||
if((scs_ssb == scs_120kHz) && (scs_pdcch == scs_120kHz)){
|
||||
// 38.213 Table 13-15
|
||||
AssertFatal(index_4lsb == 0, "38.213 Table 13-15 4 LSB out of range\n");
|
||||
// PDCCH monitoring occasions (SFN and slot number) same as SSB frame-slot
|
||||
// sfn_c = SFN_C_EQ_SFN_SSB;
|
||||
type0_PDCCH_CSS_config->n_c = get_ssb_slot(type0_PDCCH_CSS_config->ssb_index);
|
||||
switch(type0_PDCCH_CSS_config->ssb_index & 0x3){ // ssb_index(i) mod 4
|
||||
case 0:
|
||||
type0_PDCCH_CSS_config->first_symbol_index = 4;
|
||||
break;
|
||||
case 1:
|
||||
type0_PDCCH_CSS_config->first_symbol_index = 8;
|
||||
break;
|
||||
case 2:
|
||||
type0_PDCCH_CSS_config->first_symbol_index = 2;
|
||||
break;
|
||||
case 3:
|
||||
type0_PDCCH_CSS_config->first_symbol_index = 6;
|
||||
break;
|
||||
default: break;
|
||||
}
|
||||
}else{ ; }
|
||||
// 38.213 chapter 13: over one slot
|
||||
type0_PDCCH_CSS_config->search_space_duration = 1;
|
||||
}
|
||||
|
||||
AssertFatal(type0_PDCCH_CSS_config->number_of_search_space_per_slot!=UINT_MAX,"");
|
||||
|
||||
// uint32_t coreset_duration = num_symbols * number_of_search_space_per_slot;
|
||||
// mac->type0_pdcch_dci_config.number_of_candidates[0] = table_38213_10_1_1_c2[0];
|
||||
// mac->type0_pdcch_dci_config.number_of_candidates[1] = table_38213_10_1_1_c2[1];
|
||||
// mac->type0_pdcch_dci_config.number_of_candidates[2] = table_38213_10_1_1_c2[2]; // CCE aggregation level = 4
|
||||
// mac->type0_pdcch_dci_config.number_of_candidates[3] = table_38213_10_1_1_c2[3]; // CCE aggregation level = 8
|
||||
// mac->type0_pdcch_dci_config.number_of_candidates[4] = table_38213_10_1_1_c2[4]; // CCE aggregation level = 16
|
||||
// mac->type0_pdcch_dci_config.duration = search_space_duration;
|
||||
// mac->type0_pdcch_dci_config.coreset.duration = coreset_duration; // coreset
|
||||
// AssertFatal(first_symbol_index!=UINT_MAX,"");
|
||||
// mac->type0_pdcch_dci_config.monitoring_symbols_within_slot = (0x3fff << first_symbol_index) & (0x3fff >> (14-coreset_duration-first_symbol_index)) & 0x3fff;
|
||||
|
||||
AssertFatal(type0_PDCCH_CSS_config->sfn_c!=SFN_C_IMPOSSIBLE,"");
|
||||
AssertFatal(type0_PDCCH_CSS_config->n_c!=UINT_MAX,"");
|
||||
|
||||
type0_PDCCH_CSS_config->n_0 = ((uint32_t)(big_o*scs_pdcch) + (uint32_t)(type0_PDCCH_CSS_config->ssb_index*big_m))%num_slot_per_frame;
|
||||
type0_PDCCH_CSS_config->cset_start_rb = ssb_offset_point_a - type0_PDCCH_CSS_config->rb_offset;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
@@ -32,9 +32,24 @@
|
||||
#ifndef __LAYER2_NR_MAC_COMMON_H__
|
||||
#define __LAYER2_NR_MAC_COMMON_H__
|
||||
|
||||
#include "NR_MIB.h"
|
||||
#include "NR_PDSCH-Config.h"
|
||||
#include "NR_CellGroupConfig.h"
|
||||
#include "nr_mac.h"
|
||||
#include "openair1/PHY/impl_defs_nr.h"
|
||||
|
||||
#define TABLE_38213_13_1_NUM_INDEXES 15
|
||||
#define TABLE_38213_13_2_NUM_INDEXES 14
|
||||
#define TABLE_38213_13_3_NUM_INDEXES 9
|
||||
#define TABLE_38213_13_4_NUM_INDEXES 16
|
||||
#define TABLE_38213_13_5_NUM_INDEXES 9
|
||||
#define TABLE_38213_13_6_NUM_INDEXES 10
|
||||
#define TABLE_38213_13_7_NUM_INDEXES 12
|
||||
#define TABLE_38213_13_8_NUM_INDEXES 8
|
||||
#define TABLE_38213_13_9_NUM_INDEXES 4
|
||||
#define TABLE_38213_13_10_NUM_INDEXES 8
|
||||
#define TABLE_38213_13_11_NUM_INDEXES 16
|
||||
#define TABLE_38213_13_12_NUM_INDEXES 14
|
||||
|
||||
|
||||
// ===============================================
|
||||
@@ -45,8 +60,8 @@
|
||||
#define MAX_FDM (8) // Maximum nb of PRACH occasions FDMed in a slot
|
||||
|
||||
typedef enum frequency_range_e {
|
||||
FR1 = 0,
|
||||
FR2
|
||||
FR1 = 0,
|
||||
FR2
|
||||
} frequency_range_t;
|
||||
|
||||
// PRACH occasion details
|
||||
@@ -99,6 +114,52 @@ typedef enum {
|
||||
NR_RNTI_MCS_C,
|
||||
} nr_rnti_type_t;
|
||||
|
||||
typedef enum subcarrier_spacing_e {
|
||||
scs_15kHz = 0x1,
|
||||
scs_30kHz = 0x2,
|
||||
scs_60kHz = 0x4,
|
||||
scs_120kHz = 0x8,
|
||||
scs_240kHz = 0x16
|
||||
} subcarrier_spacing_t;
|
||||
|
||||
typedef enum channel_bandwidth_e {
|
||||
bw_5MHz = 0x1,
|
||||
bw_10MHz = 0x2,
|
||||
bw_20MHz = 0x4,
|
||||
bw_40MHz = 0x8,
|
||||
bw_80MHz = 0x16,
|
||||
bw_100MHz = 0x32
|
||||
} channel_bandwidth_t;
|
||||
|
||||
typedef enum nr_ssb_and_cset_mux_pattern_type_e {
|
||||
NR_SSB_AND_CSET_MUX_PATTERN_TYPE1=1,
|
||||
NR_SSB_AND_CSET_MUX_PATTERN_TYPE2,
|
||||
NR_SSB_AND_CSET_MUX_PATTERN_TYPE3
|
||||
} nr_ssb_and_cset_mux_pattern_type_t;
|
||||
|
||||
typedef enum {
|
||||
SFN_C_MOD_2_EQ_0,
|
||||
SFN_C_MOD_2_EQ_1,
|
||||
SFN_C_IMPOSSIBLE
|
||||
} SFN_C_TYPE;
|
||||
|
||||
typedef struct Type0_PDCCH_CSS_config_s {
|
||||
int32_t num_rbs;
|
||||
int32_t num_symbols;
|
||||
int32_t rb_offset; // Offset from SSB RB0
|
||||
uint32_t type0_pdcch_ss_mux_pattern;
|
||||
uint16_t frame;
|
||||
SFN_C_TYPE sfn_c;
|
||||
uint32_t n_c;
|
||||
uint32_t n_0;
|
||||
uint32_t number_of_search_space_per_slot;
|
||||
uint32_t first_symbol_index;
|
||||
uint32_t search_space_duration;
|
||||
uint32_t ssb_length;
|
||||
uint32_t ssb_index;
|
||||
uint32_t cset_start_rb;
|
||||
} NR_Type0_PDCCH_CSS_config_t;
|
||||
|
||||
uint16_t config_bandwidth(int mu, int nb_rb, int nr_band);
|
||||
|
||||
void get_frame_type(uint16_t nr_bandP, uint8_t scs_index, lte_frame_type_t *current_type);
|
||||
@@ -123,6 +184,10 @@ uint16_t nr_dci_size(NR_ServingCellConfigCommon_t *scc,
|
||||
uint16_t N_RB,
|
||||
int bwp_id);
|
||||
|
||||
void find_aggregation_candidates(uint8_t *aggregation_level,
|
||||
uint8_t *nr_of_candidates,
|
||||
NR_SearchSpace_t *ss);
|
||||
|
||||
void find_monitoring_periodicity_offset_common(NR_SearchSpace_t *ss,
|
||||
uint16_t *slot_period,
|
||||
uint16_t *offset);
|
||||
@@ -184,6 +249,13 @@ int32_t get_l_prime(uint8_t duration_in_symbols, uint8_t mapping_type, pusch_dmr
|
||||
uint8_t get_L_ptrs(uint8_t mcs1, uint8_t mcs2, uint8_t mcs3, uint8_t I_mcs, uint8_t mcs_table);
|
||||
uint8_t get_K_ptrs(uint16_t nrb0, uint16_t nrb1, uint16_t N_RB);
|
||||
|
||||
int get_type0_PDCCH_CSS_config_parameters(NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config,
|
||||
NR_MIB_t *mib,
|
||||
uint8_t extra_bits,
|
||||
uint32_t ssb_length,
|
||||
uint32_t ssb_index,
|
||||
uint32_t ssb_offset_point_a);
|
||||
|
||||
int16_t get_N_RA_RB (int delta_f_RA_PRACH,int delta_f_PUSCH);
|
||||
|
||||
bool set_dl_ptrs_values(NR_PTRS_DownlinkConfig_t *ptrs_config,
|
||||
|
||||
@@ -77,5 +77,66 @@ extern boolean_t pre_scd_activeUE[NUMBER_OF_UE_MAX];
|
||||
extern eNB_UE_STATS pre_scd_eNB_UE_stats[MAX_NUM_CCs][NUMBER_OF_UE_MAX];
|
||||
#endif*/
|
||||
|
||||
// Type0-PDCCH search space
|
||||
extern const int32_t table_38213_13_1_c1[16];
|
||||
extern const int32_t table_38213_13_1_c2[16];
|
||||
extern const int32_t table_38213_13_1_c3[16];
|
||||
extern const int32_t table_38213_13_1_c4[16];
|
||||
|
||||
extern const int32_t table_38213_13_2_c1[16];
|
||||
extern const int32_t table_38213_13_2_c2[16];
|
||||
extern const int32_t table_38213_13_2_c3[16];
|
||||
extern const int32_t table_38213_13_2_c4[16];
|
||||
|
||||
extern const int32_t table_38213_13_3_c1[16];
|
||||
extern const int32_t table_38213_13_3_c2[16];
|
||||
extern const int32_t table_38213_13_3_c3[16];
|
||||
extern const int32_t table_38213_13_3_c4[16];
|
||||
|
||||
extern const int32_t table_38213_13_4_c1[16];
|
||||
extern const int32_t table_38213_13_4_c2[16];
|
||||
extern const int32_t table_38213_13_4_c3[16];
|
||||
extern const int32_t table_38213_13_4_c4[16];
|
||||
|
||||
extern const int32_t table_38213_13_5_c1[16];
|
||||
extern const int32_t table_38213_13_5_c2[16];
|
||||
extern const int32_t table_38213_13_5_c3[16];
|
||||
extern const int32_t table_38213_13_5_c4[16];
|
||||
|
||||
extern const int32_t table_38213_13_6_c1[16];
|
||||
extern const int32_t table_38213_13_6_c2[16];
|
||||
extern const int32_t table_38213_13_6_c3[16];
|
||||
extern const int32_t table_38213_13_6_c4[16];
|
||||
|
||||
extern const int32_t table_38213_13_7_c1[16];
|
||||
extern const int32_t table_38213_13_7_c2[16];
|
||||
extern const int32_t table_38213_13_7_c3[16];
|
||||
extern const int32_t table_38213_13_7_c4[16];
|
||||
|
||||
extern const int32_t table_38213_13_8_c1[16];
|
||||
extern const int32_t table_38213_13_8_c2[16];
|
||||
extern const int32_t table_38213_13_8_c3[16];
|
||||
extern const int32_t table_38213_13_8_c4[16];
|
||||
|
||||
extern const int32_t table_38213_13_9_c1[16];
|
||||
extern const int32_t table_38213_13_9_c2[16];
|
||||
extern const int32_t table_38213_13_9_c3[16];
|
||||
extern const int32_t table_38213_13_9_c4[16];
|
||||
|
||||
extern const int32_t table_38213_13_10_c1[16];
|
||||
extern const int32_t table_38213_13_10_c2[16];
|
||||
extern const int32_t table_38213_13_10_c3[16];
|
||||
extern const int32_t table_38213_13_10_c4[16];
|
||||
|
||||
extern const float table_38213_13_11_c1[16];
|
||||
extern const int32_t table_38213_13_11_c2[16];
|
||||
extern const float table_38213_13_11_c3[16];
|
||||
extern const int32_t table_38213_13_11_c4[16];
|
||||
|
||||
extern const float table_38213_13_12_c1[16];
|
||||
extern const int32_t table_38213_13_12_c2[16];
|
||||
extern const float table_38213_13_12_c3[16];
|
||||
|
||||
extern const int32_t table_38213_10_1_1_c2[5];
|
||||
|
||||
#endif //DEF_H
|
||||
|
||||
@@ -390,13 +390,71 @@ void config_control_ue(NR_UE_MAC_INST_t *mac){
|
||||
NR_SearchSpace_t *css = commonSearchSpaceList->list.array[css_id];
|
||||
AssertFatal(css->controlResourceSetId != NULL, "ss->controlResourceSetId is null\n");
|
||||
AssertFatal(*css->controlResourceSetId == mac->coreset[bwp_id - 1][coreset_id - 1]->controlResourceSetId, "ss->controlResourceSetId is unknown\n");
|
||||
AssertFatal(css->searchSpaceId != 0, "css->searchSpaceId is 0\n");
|
||||
AssertFatal(css->searchSpaceType != NULL, "css->searchSpaceType is null\n");
|
||||
AssertFatal(css->monitoringSymbolsWithinSlot != NULL, "css->monitoringSymbolsWithinSlot is null\n");
|
||||
AssertFatal(css->monitoringSymbolsWithinSlot->buf != NULL, "css->monitoringSymbolsWithinSlot->buf is null\n");
|
||||
mac->SSpace[0][0][ss_id] = css;
|
||||
ss_id++;
|
||||
}
|
||||
|
||||
// TODO: Merge this code in a single function as fill_default_searchSpaceZero() in rrc_gNB_reconfig.c
|
||||
// Search space zero
|
||||
if(mac->search_space_zero == NULL) mac->search_space_zero=calloc(1,sizeof(*mac->search_space_zero));
|
||||
if(mac->search_space_zero->controlResourceSetId == NULL) mac->search_space_zero->controlResourceSetId=calloc(1,sizeof(*mac->search_space_zero->controlResourceSetId));
|
||||
if(mac->search_space_zero->monitoringSymbolsWithinSlot == NULL) mac->search_space_zero->monitoringSymbolsWithinSlot = calloc(1,sizeof(*mac->search_space_zero->monitoringSymbolsWithinSlot));
|
||||
if(mac->search_space_zero->monitoringSymbolsWithinSlot->buf == NULL) mac->search_space_zero->monitoringSymbolsWithinSlot->buf = calloc(1,2);
|
||||
if(mac->search_space_zero->nrofCandidates == NULL) mac->search_space_zero->nrofCandidates = calloc(1,sizeof(*mac->search_space_zero->nrofCandidates));
|
||||
if(mac->search_space_zero->searchSpaceType == NULL) mac->search_space_zero->searchSpaceType = calloc(1,sizeof(*mac->search_space_zero->searchSpaceType));
|
||||
if(mac->search_space_zero->searchSpaceType->choice.common == NULL) mac->search_space_zero->searchSpaceType->choice.common=calloc(1,sizeof(*mac->search_space_zero->searchSpaceType->choice.common));
|
||||
if(mac->search_space_zero->searchSpaceType->choice.common->dci_Format0_0_AndFormat1_0 == NULL) mac->search_space_zero->searchSpaceType->choice.common->dci_Format0_0_AndFormat1_0 = calloc(1,sizeof(*mac->search_space_zero->searchSpaceType->choice.common->dci_Format0_0_AndFormat1_0));
|
||||
mac->search_space_zero->searchSpaceId = 0;
|
||||
*mac->search_space_zero->controlResourceSetId = 0;
|
||||
mac->search_space_zero->monitoringSlotPeriodicityAndOffset = calloc(1,sizeof(*mac->search_space_zero->monitoringSlotPeriodicityAndOffset));
|
||||
mac->search_space_zero->monitoringSlotPeriodicityAndOffset->present = NR_SearchSpace__monitoringSlotPeriodicityAndOffset_PR_sl1;
|
||||
mac->search_space_zero->duration=NULL;
|
||||
// should be '1100 0000 0000 00'B (LSB first!), first two symbols in slot, adjust if needed
|
||||
mac->search_space_zero->monitoringSymbolsWithinSlot->buf[1] = 0;
|
||||
mac->search_space_zero->monitoringSymbolsWithinSlot->buf[0] = (1<<7) | (1<<6);
|
||||
mac->search_space_zero->monitoringSymbolsWithinSlot->size = 2;
|
||||
mac->search_space_zero->monitoringSymbolsWithinSlot->bits_unused = 2;
|
||||
|
||||
// FIXME: update values from TS38.213 Section 10.1 Table 10.1-1: CCE aggregation levels and maximum number of PDCCH candidates per CCE aggregation level for CSS sets configured by searchSpaceSIB1
|
||||
mac->search_space_zero->nrofCandidates->aggregationLevel1 = NR_SearchSpace__nrofCandidates__aggregationLevel1_n0;
|
||||
mac->search_space_zero->nrofCandidates->aggregationLevel2 = NR_SearchSpace__nrofCandidates__aggregationLevel2_n0;
|
||||
mac->search_space_zero->nrofCandidates->aggregationLevel4 = NR_SearchSpace__nrofCandidates__aggregationLevel4_n0;
|
||||
mac->search_space_zero->nrofCandidates->aggregationLevel8 = NR_SearchSpace__nrofCandidates__aggregationLevel8_n1;
|
||||
mac->search_space_zero->nrofCandidates->aggregationLevel16 = NR_SearchSpace__nrofCandidates__aggregationLevel16_n0;
|
||||
mac->search_space_zero->searchSpaceType->present = NR_SearchSpace__searchSpaceType_PR_common;
|
||||
|
||||
// Coreset0
|
||||
if(mac->coreset0 == NULL) mac->coreset0 = calloc(1,sizeof(*mac->coreset0));
|
||||
mac->coreset0->controlResourceSetId = 0;
|
||||
// frequencyDomainResources '11111111 00000000 00000000 00000000 00000000 00000'B,
|
||||
if(mac->coreset0->frequencyDomainResources.buf == NULL) mac->coreset0->frequencyDomainResources.buf = calloc(1,6);
|
||||
mac->coreset0->frequencyDomainResources.buf[0] = 0xff;
|
||||
mac->coreset0->frequencyDomainResources.buf[1] = 0;
|
||||
mac->coreset0->frequencyDomainResources.buf[2] = 0;
|
||||
mac->coreset0->frequencyDomainResources.buf[3] = 0;
|
||||
mac->coreset0->frequencyDomainResources.buf[4] = 0;
|
||||
mac->coreset0->frequencyDomainResources.buf[5] = 0;
|
||||
mac->coreset0->frequencyDomainResources.size = 6;
|
||||
mac->coreset0->frequencyDomainResources.bits_unused = 3;
|
||||
mac->coreset0->duration = 1;
|
||||
mac->coreset0->cce_REG_MappingType.choice.interleaved=calloc(1,sizeof(*mac->coreset0->cce_REG_MappingType.choice.interleaved));
|
||||
mac->coreset0->cce_REG_MappingType.choice.interleaved->interleaverSize = NR_ControlResourceSet__cce_REG_MappingType__interleaved__interleaverSize_n2;
|
||||
mac->coreset0->cce_REG_MappingType.choice.interleaved->shiftIndex = NULL;
|
||||
mac->coreset0->precoderGranularity = NR_ControlResourceSet__precoderGranularity_sameAsREG_bundle;
|
||||
if(mac->coreset0->tci_StatesPDCCH_ToAddList == NULL) mac->coreset0->tci_StatesPDCCH_ToAddList = calloc(1,sizeof(*mac->coreset0->tci_StatesPDCCH_ToAddList));
|
||||
NR_TCI_StateId_t *tci[8];
|
||||
for (int i=0;i<8;i++) {
|
||||
tci[i]=calloc(1,sizeof(*tci[i]));
|
||||
*tci[i] = i;
|
||||
ASN_SEQUENCE_ADD(&mac->coreset0->tci_StatesPDCCH_ToAddList->list,tci[i]);
|
||||
}
|
||||
mac->coreset0->tci_StatesPDCCH_ToReleaseList = NULL;
|
||||
mac->coreset0->tci_PresentInDCI = NULL;
|
||||
mac->coreset0->pdcch_DMRS_ScramblingID = NULL;
|
||||
|
||||
}
|
||||
|
||||
int nr_rrc_mac_config_req_ue(
|
||||
@@ -421,6 +479,8 @@ int nr_rrc_mac_config_req_ue(
|
||||
mac->scg = cell_group_config;
|
||||
mac->servCellIndex = *cell_group_config->spCellConfig->servCellIndex;
|
||||
config_control_ue(mac);
|
||||
mac->msg3_frame = -1; // initialize to an invalid value
|
||||
mac->msg3_slot = -1;
|
||||
if (cell_group_config->spCellConfig->reconfigurationWithSync) {
|
||||
mac->rach_ConfigDedicated = cell_group_config->spCellConfig->reconfigurationWithSync->rach_ConfigDedicated->choice.uplink;
|
||||
mac->scc = cell_group_config->spCellConfig->reconfigurationWithSync->spCellConfigCommon;
|
||||
|
||||
@@ -76,13 +76,6 @@
|
||||
/*!\brief value for indicating BSR Timer is not running */
|
||||
#define NR_MAC_UE_BSR_TIMER_NOT_RUNNING (0xFFFF)
|
||||
|
||||
|
||||
typedef enum {
|
||||
SFN_C_MOD_2_EQ_0,
|
||||
SFN_C_MOD_2_EQ_1,
|
||||
SFN_C_IMPOSSIBLE
|
||||
} SFN_C_TYPE;
|
||||
|
||||
// LTE structure, might need to be adapted for NR
|
||||
typedef struct {
|
||||
/// buffer status for each lcgid
|
||||
@@ -227,9 +220,9 @@ typedef struct {
|
||||
/// Random-access variable for window calculation (subframe of last change in window counter)
|
||||
uint8_t RA_tx_subframe;
|
||||
/// Scheduled TX frame for RA Msg3
|
||||
frame_t msg3_frame;
|
||||
int16_t msg3_frame;
|
||||
/// Scheduled TX slot for RA Msg3
|
||||
slot_t msg3_slot;
|
||||
int16_t msg3_slot;
|
||||
/// Random-access variable for backoff (frame of last change in backoff counter)
|
||||
uint32_t RA_backoff_frame;
|
||||
/// Random-access variable for backoff (subframe of last change in backoff counter)
|
||||
@@ -250,6 +243,8 @@ typedef struct {
|
||||
uint8_t RA_BI_found;
|
||||
/// Flag for the Msg1 generation: enabled at every occurrence of nr prach slot
|
||||
uint8_t generate_nr_prach;
|
||||
/// SSB index from MIB decoding
|
||||
uint8_t mib_ssb;
|
||||
|
||||
//// FAPI-like interface message
|
||||
fapi_nr_ul_config_request_t *ul_config_request;
|
||||
@@ -265,6 +260,11 @@ typedef struct {
|
||||
|
||||
/// PHR
|
||||
uint8_t PHR_reporting_active;
|
||||
|
||||
NR_Type0_PDCCH_CSS_config_t type0_PDCCH_CSS_config;
|
||||
NR_SearchSpace_t *search_space_zero;
|
||||
NR_ControlResourceSet_t *coreset0;
|
||||
|
||||
} NR_UE_MAC_INST_t;
|
||||
|
||||
typedef enum seach_space_mask_e {
|
||||
@@ -275,24 +275,6 @@ typedef enum seach_space_mask_e {
|
||||
type3_pdcch = 0x10
|
||||
} search_space_mask_t;
|
||||
|
||||
typedef enum subcarrier_spacing_e {
|
||||
scs_15kHz = 0x1,
|
||||
scs_30kHz = 0x2,
|
||||
scs_60kHz = 0x4,
|
||||
scs_120kHz = 0x8,
|
||||
scs_240kHz = 0x16
|
||||
} subcarrier_spacing_t;
|
||||
|
||||
typedef enum channel_bandwidth_e {
|
||||
bw_5MHz = 0x1,
|
||||
bw_10MHz = 0x2,
|
||||
bw_20MHz = 0x4,
|
||||
bw_40MHz = 0x8,
|
||||
bw_80MHz = 0x16,
|
||||
bw_100MHz = 0x32
|
||||
} channel_bandwidth_t;
|
||||
|
||||
|
||||
typedef struct {
|
||||
uint8_t identifier_dci_formats ; // 0 IDENTIFIER_DCI_FORMATS:
|
||||
uint8_t carrier_ind ; // 1 CARRIER_IND: 0 or 3 bits, as defined in Subclause x.x of [5, TS38.213]
|
||||
|
||||
@@ -34,58 +34,6 @@
|
||||
|
||||
//extern NR_UE_MAC_INST_t *UE_mac_inst;
|
||||
|
||||
// Type0-PDCCH search space
|
||||
extern const int32_t table_38213_13_1_c2[16];
|
||||
extern const int32_t table_38213_13_1_c3[16];
|
||||
extern const int32_t table_38213_13_1_c4[16];
|
||||
|
||||
extern const int32_t table_38213_13_2_c2[16];
|
||||
extern const int32_t table_38213_13_2_c3[16];
|
||||
extern const int32_t table_38213_13_2_c4[16];
|
||||
|
||||
extern const int32_t table_38213_13_3_c2[16];
|
||||
extern const int32_t table_38213_13_3_c3[16];
|
||||
extern const int32_t table_38213_13_3_c4[16];
|
||||
|
||||
extern const int32_t table_38213_13_4_c2[16];
|
||||
extern const int32_t table_38213_13_4_c3[16];
|
||||
extern const int32_t table_38213_13_4_c4[16];
|
||||
|
||||
extern const int32_t table_38213_13_5_c2[16];
|
||||
extern const int32_t table_38213_13_5_c3[16];
|
||||
extern const int32_t table_38213_13_5_c4[16];
|
||||
|
||||
extern const int32_t table_38213_13_6_c2[16];
|
||||
extern const int32_t table_38213_13_6_c3[16];
|
||||
extern const int32_t table_38213_13_6_c4[16];
|
||||
|
||||
extern const int32_t table_38213_13_7_c2[16];
|
||||
extern const int32_t table_38213_13_7_c3[16];
|
||||
extern const int32_t table_38213_13_7_c4[16];
|
||||
|
||||
extern const int32_t table_38213_13_8_c2[16];
|
||||
extern const int32_t table_38213_13_8_c3[16];
|
||||
extern const int32_t table_38213_13_8_c4[16];
|
||||
|
||||
extern const int32_t table_38213_13_9_c2[16];
|
||||
extern const int32_t table_38213_13_9_c3[16];
|
||||
extern const int32_t table_38213_13_9_c4[16];
|
||||
|
||||
extern const int32_t table_38213_13_10_c2[16];
|
||||
extern const int32_t table_38213_13_10_c3[16];
|
||||
extern const int32_t table_38213_13_10_c4[16];
|
||||
|
||||
extern const float table_38213_13_11_c1[16];
|
||||
extern const int32_t table_38213_13_11_c2[16];
|
||||
extern const float table_38213_13_11_c3[16];
|
||||
extern const int32_t table_38213_13_11_c4[16];
|
||||
|
||||
extern const float table_38213_13_12_c1[16];
|
||||
extern const int32_t table_38213_13_12_c2[16];
|
||||
extern const float table_38213_13_12_c3[16];
|
||||
|
||||
extern const int32_t table_38213_10_1_1_c2[5];
|
||||
|
||||
// DCI extraction
|
||||
// for PUSCH from TS 38.214 subclause 6.1.2.1.1
|
||||
extern uint8_t table_6_1_2_1_1_2_time_dom_res_alloc_A[16][3];
|
||||
|
||||
@@ -58,6 +58,19 @@ int8_t nr_ue_decode_mib(
|
||||
void *pduP,
|
||||
uint16_t cell_id );
|
||||
|
||||
/**\brief decode sib1 pdu in NR_UE, from if_module dl_ind
|
||||
\param module_id module id
|
||||
\param cc_id component carrier id
|
||||
\param gNB_index gNB index
|
||||
\param sibs_mask sibs mask
|
||||
\param pduP pointer to pdu
|
||||
\param pdu_length length of pdu */
|
||||
int8_t nr_ue_decode_sib1(module_id_t module_id,
|
||||
int cc_id,
|
||||
unsigned int gNB_index,
|
||||
uint32_t sibs_mask,
|
||||
uint8_t *pduP,
|
||||
uint32_t pdu_len);
|
||||
|
||||
/**\brief primitive from RRC layer to MAC layer for configuration L1/L2, now supported 4 rrc messages: MIB, cell_group_config for MAC/PHY, spcell_config(serving cell config)
|
||||
\param module_id module id
|
||||
@@ -125,8 +138,6 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
|
||||
int nr_ue_process_dci_indication_pdu(module_id_t module_id, int cc_id, int gNB_index, frame_t frame, int slot, fapi_nr_dci_indication_pdu_t *dci);
|
||||
|
||||
uint32_t get_ssb_frame(uint32_t test);
|
||||
uint32_t get_ssb_slot(uint32_t ssb_index);
|
||||
|
||||
|
||||
uint32_t mr_ue_get_SR(module_id_t module_idP, int CC_id, frame_t frameP, uint8_t eNB_id, uint16_t rnti, sub_frame_t subframe);
|
||||
|
||||
|
||||
@@ -32,64 +32,6 @@
|
||||
|
||||
#include "mac_defs.h"
|
||||
|
||||
#define reserved 0xffff
|
||||
|
||||
// specification mapping talbe, table_38$x_$y_$z_c$a
|
||||
// - $x: specification
|
||||
// - $y: subclause-major
|
||||
// - $z: subclause-minor
|
||||
// - $a: ($a)th of column in table, start from zero
|
||||
const int32_t table_38213_13_1_c2[16] = {24, 24, 24, 24, 24, 24, 48, 48, 48, 48, 48, 48, 96, 96, 96, reserved}; // index 15 reserved
|
||||
const int32_t table_38213_13_1_c3[16] = { 2, 2, 2, 3, 3, 3, 1, 1, 2, 2, 3, 3, 1, 2, 3, reserved}; // index 15 reserved
|
||||
const int32_t table_38213_13_1_c4[16] = { 0, 2, 4, 0, 2, 4, 12, 16, 12, 16, 12, 16, 38, 38, 38, reserved}; // index 15 reserved
|
||||
|
||||
const int32_t table_38213_13_2_c2[16] = {24, 24, 24, 24, 24, 24, 24, 24, 48, 48, 48, 48, 48, 48, reserved, reserved}; // index 14-15 reserved
|
||||
const int32_t table_38213_13_2_c3[16] = { 2, 2, 2, 2, 3, 3, 3, 3, 1, 1, 2, 2, 3, 3, reserved, reserved}; // index 14-15 reserved
|
||||
const int32_t table_38213_13_2_c4[16] = { 5, 6, 7, 8, 5, 6, 7, 8, 18, 20, 18, 20, 18, 20, reserved, reserved}; // index 14-15 reserved
|
||||
|
||||
const int32_t table_38213_13_3_c2[16] = {48, 48, 48, 48, 48, 48, 96, 96, 96, reserved, reserved, reserved, reserved, reserved, reserved, reserved}; // index 09-15 reserved
|
||||
const int32_t table_38213_13_3_c3[16] = { 1, 1, 2, 2, 3, 3, 1, 2, 3, reserved, reserved, reserved, reserved, reserved, reserved, reserved}; // index 09-15 reserved
|
||||
const int32_t table_38213_13_3_c4[16] = { 2, 6, 2, 6, 2, 6, 28, 28, 28, reserved, reserved, reserved, reserved, reserved, reserved, reserved}; // index 09-15 reserved
|
||||
|
||||
const int32_t table_38213_13_4_c2[16] = {24, 24, 24, 24, 24, 24, 24, 24, 24, 24, 48, 48, 48, 48, 48, 48};
|
||||
const int32_t table_38213_13_4_c3[16] = { 2, 2, 2, 2, 2, 3, 3, 3, 3, 3, 1, 1, 1, 2, 2, 2};
|
||||
const int32_t table_38213_13_4_c4[16] = { 0, 1, 2, 3, 4, 0, 1, 2, 3, 4, 12, 14, 16, 12, 14, 16};
|
||||
|
||||
const int32_t table_38213_13_5_c2[16] = {48, 48, 48, 96, 96, 96, 96, 96, 96, reserved, reserved, reserved, reserved, reserved, reserved, reserved}; // index 09-15 reserved
|
||||
const int32_t table_38213_13_5_c3[16] = { 1, 2, 3, 1, 1, 2, 2, 3, 3, reserved, reserved, reserved, reserved, reserved, reserved, reserved}; // index 09-15 reserved
|
||||
const int32_t table_38213_13_5_c4[16] = { 4, 4, 4, 0, 56, 0, 56, 0, 56, reserved, reserved, reserved, reserved, reserved, reserved, reserved}; // index 09-15 reserved
|
||||
|
||||
const int32_t table_38213_13_6_c2[16] = {24, 24, 24, 24, 48, 48, 48, 48, 48, 48, reserved, reserved, reserved, reserved, reserved, reserved}; // index 10-15 reserved
|
||||
const int32_t table_38213_13_6_c3[16] = { 2, 2, 3, 3, 1, 1, 2, 2, 3, 3, reserved, reserved, reserved, reserved, reserved, reserved}; // index 10-15 reserved
|
||||
const int32_t table_38213_13_6_c4[16] = { 0, 4, 0, 4, 0, 28, 0, 28, 0, 28, reserved, reserved, reserved, reserved, reserved, reserved}; // index 10-15 reserved
|
||||
|
||||
const int32_t table_38213_13_7_c2[16] = {48, 48, 48, 48, 48, 48, 96, 96, 48, 48, 96, 96, reserved, reserved, reserved, reserved}; // index 12-15 reserved
|
||||
const int32_t table_38213_13_7_c3[16] = { 1, 1, 2, 2, 3, 3, 1, 2, 1, 1, 1, 1, reserved, reserved, reserved, reserved}; // index 12-15 reserved
|
||||
const int32_t table_38213_13_7_c4[16] = { 0, 8, 0, 8, 0, 8, 28, 28,-41, 49,-41, 97, reserved, reserved, reserved, reserved}; // index 12-15 reserved, condition A as default
|
||||
|
||||
const int32_t table_38213_13_8_c2[16] = { 1, 1, 1, 1, 3, 3, 3, 3, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved}; // index 15 reserved
|
||||
const int32_t table_38213_13_8_c3[16] = {24, 24, 48, 48, 24, 24, 48, 48, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved}; // index 15 reserved
|
||||
const int32_t table_38213_13_8_c4[16] = { 0, 4, 14, 14,-20, 24,-20, 48, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved}; // index 15 reserved, condition A as default
|
||||
|
||||
const int32_t table_38213_13_9_c2[16] = {96, 96, 96, 96, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved}; // index 04-15 reserved
|
||||
const int32_t table_38213_13_9_c3[16] = { 1, 1, 2, 2, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved}; // index 04-15 reserved
|
||||
const int32_t table_38213_13_9_c4[16] = { 0, 16, 0, 16, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved}; // index 04-15 reserved
|
||||
|
||||
const int32_t table_38213_13_10_c2[16] = {48, 48, 48, 48, 24, 24, 48, 48, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved}; // index 08-15 reserved
|
||||
const int32_t table_38213_13_10_c3[16] = { 1, 1, 2, 2, 1, 1, 1, 1, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved}; // index 08-15 reserved
|
||||
const int32_t table_38213_13_10_c4[16] = { 0, 8, 0, 8,-41, 25,-41, 49, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved}; // index 08-15 reserved, condition A as default
|
||||
|
||||
const float table_38213_13_11_c1[16] = { 0, 0, 2, 2, 5, 5, 7, 7, 0, 5, 0, 0, 2, 2, 5, 5}; // O
|
||||
const int32_t table_38213_13_11_c2[16] = { 1, 2, 1, 2, 1, 2, 1, 2, 1, 1, 1, 1, 1, 1, 1, 1};
|
||||
const float table_38213_13_11_c3[16] = { 1, 0.5f, 1, 0.5f, 1, 0.5f, 1, 0.5f, 1, 1, 1, 1, 1, 1, 1, 1}; // M
|
||||
const int32_t table_38213_13_11_c4[16] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 1, 2, 1, 2}; // i is even as default
|
||||
|
||||
const float table_38213_13_12_c1[16] = { 0, 0, 2.5f, 2.5f, 5, 5, 0, 2.5f, 5, 7.5f, 7.5f, 7.5f, 0, 5, reserved, reserved}; // O, index 14-15 reserved
|
||||
const int32_t table_38213_13_12_c2[16] = { 1, 2, 1, 2, 1, 2, 2, 2, 2, 1, 2, 2, 1, 1, reserved, reserved}; // index 14-15 reserved
|
||||
const float table_38213_13_12_c3[16] = { 1, 0.5f, 1, 0.5f, 1, 0.5f, 0.5f, 0.5f, 0.5f, 1, 0.5f, 0.5f, 1, 1, reserved, reserved}; // M, index 14-15 reserved
|
||||
|
||||
const int32_t table_38213_10_1_1_c2[5] = { 0, 0, 4, 2, 1 };
|
||||
|
||||
/*
|
||||
#define mu_pusch 1
|
||||
// definition table j Table 6.1.2.1.1-4
|
||||
|
||||
@@ -52,7 +52,6 @@ NR_UE_MAC_INST_t * nr_l2_init_ue(NR_UE_RRC_INST_t* rrc_inst)
|
||||
nr_ue_mac_inst = (NR_UE_MAC_INST_t *)calloc(sizeof(NR_UE_MAC_INST_t),NB_NR_UE_MAC_INST);
|
||||
if (rrc_inst) {
|
||||
nr_rrc_mac_config_req_ue(0,0,0,NULL,rrc_inst->cell_group_config);
|
||||
|
||||
if (IS_SOFTMODEM_NOS1){
|
||||
AssertFatal(rlc_module_init(0) == 0, "%s: Could not initialize RLC layer\n", __FUNCTION__);
|
||||
pdcp_layer_init();
|
||||
|
||||
@@ -559,7 +559,7 @@ uint8_t nr_ue_get_rach(NR_PRACH_RESOURCES_t *prach_resources,
|
||||
mac->RA_window_cnt = -1;
|
||||
mac->ra_state = RA_SUCCEEDED;
|
||||
mac->generate_nr_prach = 2;
|
||||
LOG_I(MAC, "[MAC][UE %d][RAPROC]: RAR successfully received \n", mod_id);
|
||||
LOG_I(MAC, "[MAC][UE %d][RAPROC]: frame %d slot %d RAR successfully received\n", mod_id, frame, nr_slot_tx);
|
||||
|
||||
} else if (mac->RA_window_cnt == 0 && !mac->RA_RAPID_found) {
|
||||
|
||||
|
||||
@@ -38,6 +38,7 @@
|
||||
#include "common/utils/nr/nr_common.h"
|
||||
#include "executables/softmodem-common.h"
|
||||
#include <stdio.h>
|
||||
#include "nfapi_nr_interface.h"
|
||||
|
||||
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
|
||||
#define LOG_DCI_D(a...) printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) ->" a)
|
||||
@@ -53,17 +54,33 @@ dci_pdu_rel15_t *def_dci_pdu_rel15;
|
||||
void fill_dci_search_candidates(NR_SearchSpace_t *ss,fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15) {
|
||||
|
||||
LOG_D(MAC,"Filling search candidates for DCI\n");
|
||||
|
||||
rel15->number_of_candidates=4;
|
||||
rel15->CCE[0]=0;
|
||||
rel15->L[0]=4;
|
||||
rel15->CCE[1]=4;
|
||||
rel15->L[1]=4;
|
||||
rel15->CCE[2]=8;
|
||||
rel15->L[2]=4;
|
||||
rel15->CCE[3]=12;
|
||||
rel15->L[3]=4;
|
||||
|
||||
if(ss->searchSpaceId == 0) {
|
||||
// TODO: Update the maximum number of PDCCH candidates accordingly with Aggregation Level
|
||||
rel15->number_of_candidates=1;
|
||||
rel15->CCE[0]=0;
|
||||
rel15->L[0]=6;
|
||||
} else {
|
||||
rel15->number_of_candidates=4;
|
||||
rel15->CCE[0]=0;
|
||||
rel15->L[0]=4;
|
||||
rel15->CCE[1]=4;
|
||||
rel15->L[1]=4;
|
||||
rel15->CCE[2]=8;
|
||||
rel15->L[2]=4;
|
||||
rel15->CCE[3]=12;
|
||||
rel15->L[3]=4;
|
||||
}
|
||||
|
||||
uint8_t aggregation;
|
||||
find_aggregation_candidates(&aggregation,
|
||||
&rel15->number_of_candidates,
|
||||
ss);
|
||||
|
||||
for (int i=0; i<rel15->number_of_candidates; i++) {
|
||||
rel15->CCE[i] = i*aggregation;
|
||||
rel15->L[i] = aggregation;
|
||||
}
|
||||
}
|
||||
|
||||
void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15, fapi_nr_dl_config_request_t *dl_config, int rnti_type, int ss_id){
|
||||
@@ -76,11 +93,21 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t
|
||||
NR_ServingCellConfigCommon_t *scc = mac->scc;
|
||||
NR_BWP_DownlinkCommon_t *bwp_Common = mac->DLbwp[bwp_id - 1]->bwp_Common;
|
||||
NR_BWP_DownlinkCommon_t *initialDownlinkBWP = scc->downlinkConfigCommon->initialDownlinkBWP;
|
||||
NR_SearchSpace_t *ss = mac->SSpace[bwp_id - 1][coreset_id - 1][ss_id];
|
||||
|
||||
// CORESET configuration
|
||||
NR_ControlResourceSet_t *coreset = mac->coreset[bwp_id - 1][coreset_id - 1];
|
||||
NR_SearchSpace_t *ss;
|
||||
NR_ControlResourceSet_t *coreset;
|
||||
if(ss_id>=0) {
|
||||
ss = mac->SSpace[bwp_id - 1][coreset_id - 1][ss_id];
|
||||
coreset = mac->coreset[bwp_id - 1][coreset_id - 1];
|
||||
rel15->coreset.CoreSetType = NFAPI_NR_CSET_CONFIG_PDCCH_CONFIG;
|
||||
} else {
|
||||
ss = mac->search_space_zero;
|
||||
coreset = mac->coreset0;
|
||||
rel15->coreset.CoreSetType = NFAPI_NR_CSET_CONFIG_MIB_SIB1;
|
||||
}
|
||||
|
||||
rel15->coreset.duration = coreset->duration;
|
||||
|
||||
for (int i = 0; i < 6; i++)
|
||||
rel15->coreset.frequency_domain_resource[i] = coreset->frequencyDomainResources.buf[i];
|
||||
rel15->coreset.CceRegMappingType = coreset->cce_REG_MappingType.present == NR_ControlResourceSet__cce_REG_MappingType_PR_interleaved ? FAPI_NR_CCE_REG_MAPPING_TYPE_INTERLEAVED : FAPI_NR_CCE_REG_MAPPING_TYPE_NON_INTERLEAVED;
|
||||
@@ -95,7 +122,7 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t
|
||||
rel15->coreset.InterleaverSize = 0;
|
||||
rel15->coreset.ShiftIndex = 0;
|
||||
}
|
||||
rel15->coreset.CoreSetType = 1;
|
||||
|
||||
rel15->coreset.precoder_granularity = coreset->precoderGranularity;
|
||||
|
||||
// Scrambling RNTI
|
||||
@@ -145,6 +172,20 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t
|
||||
case NR_RNTI_SP_CSI:
|
||||
break;
|
||||
case NR_RNTI_SI:
|
||||
// we use DL BWP dedicated
|
||||
sps = bwp_Common->genericParameters.cyclicPrefix == NULL ? 14 : 12;
|
||||
|
||||
// for SPS=14 8 MSBs in positions 13 down to 6
|
||||
monitoringSymbolsWithinSlot = (ss->monitoringSymbolsWithinSlot->buf[0]<<(sps-8)) | (ss->monitoringSymbolsWithinSlot->buf[1]>>(16-sps));
|
||||
|
||||
rel15->rnti = SI_RNTI; // SI-RNTI - 3GPP TS 38.321 Table 7.1-1: RNTI values
|
||||
rel15->BWPSize = mac->type0_PDCCH_CSS_config.num_rbs;
|
||||
rel15->BWPStart = mac->type0_PDCCH_CSS_config.cset_start_rb;
|
||||
rel15->SubcarrierSpacing = mac->mib->subCarrierSpacingCommon;
|
||||
|
||||
for (int i = 0; i < rel15->num_dci_options; i++) {
|
||||
rel15->dci_length_options[i] = nr_dci_size(scc, mac->scg, def_dci_pdu_rel15, rel15->dci_format_options[i], NR_RNTI_SI, rel15->BWPSize, 0);
|
||||
}
|
||||
break;
|
||||
case NR_RNTI_SFI:
|
||||
break;
|
||||
@@ -206,8 +247,11 @@ void ue_dci_configuration(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_request_t *dl
|
||||
// Fetch configuration for searchSpaceZero
|
||||
// note: The search space with the SearchSpaceId = 0 identifies the search space configured via PBCH (MIB) and in ServingCellConfigCommon (searchSpaceZero).
|
||||
if (pdcch_ConfigCommon->choice.setup->searchSpaceZero){
|
||||
if (pdcch_ConfigCommon->choice.setup->searchSpaceSIB1 == NULL){
|
||||
pdcch_ConfigCommon->choice.setup->searchSpaceSIB1=calloc(1,sizeof(*pdcch_ConfigCommon->choice.setup->searchSpaceSIB1));
|
||||
}
|
||||
*pdcch_ConfigCommon->choice.setup->searchSpaceSIB1 = 0;
|
||||
LOG_D(MAC, "[DCI_CONFIG] Configure SearchSpace#0 of the initial BWP\n");
|
||||
LOG_W(MAC, "[DCI_CONFIG] This should not be available yet...");
|
||||
}
|
||||
if (ss->searchSpaceType->choice.common->dci_Format0_0_AndFormat1_0){
|
||||
// check available SS IDs
|
||||
@@ -327,4 +371,25 @@ void ue_dci_configuration(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_request_t *dl
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
// Search space 0, CORESET ID 0
|
||||
|
||||
NR_BWP_DownlinkCommon_t *bwp_Common = bwp->bwp_Common;
|
||||
NR_SetupRelease_PDCCH_ConfigCommon_t *pdcch_ConfigCommon = bwp_Common->pdcch_ConfigCommon;
|
||||
|
||||
if (pdcch_ConfigCommon->choice.setup->searchSpaceSIB1){
|
||||
|
||||
NR_SearchSpace_t *ss0 = mac->search_space_zero;
|
||||
fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15 = &dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15;
|
||||
|
||||
if (ss0->searchSpaceId == *pdcch_ConfigCommon->choice.setup->searchSpaceSIB1){
|
||||
if( (frame%2 == mac->type0_PDCCH_CSS_config.sfn_c) && (slot == mac->type0_PDCCH_CSS_config.n_0) ){
|
||||
rel15->num_dci_options = 1;
|
||||
rel15->dci_format_options[0] = NR_DL_DCI_FORMAT_1_0;
|
||||
config_dci_pdu(mac, rel15, dl_config, NR_RNTI_SI, -1);
|
||||
fill_dci_search_candidates(ss0, rel15);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
@@ -49,6 +49,7 @@
|
||||
#include "NR_MAC_COMMON/nr_mac.h"
|
||||
#include "NR_MAC_UE/mac_proto.h"
|
||||
#include "NR_MAC_UE/mac_extern.h"
|
||||
#include "NR_MAC_COMMON/nr_mac_extern.h"
|
||||
#include "common/utils/nr/nr_common.h"
|
||||
|
||||
/* PHY */
|
||||
@@ -787,13 +788,6 @@ void fill_scheduled_response(nr_scheduled_response_t *scheduled_response,
|
||||
scheduled_response->thread_id = thread_id;
|
||||
}
|
||||
|
||||
uint32_t get_ssb_slot(uint32_t ssb_index){
|
||||
// this function now only support f <= 3GHz
|
||||
return ssb_index & 0x3 ;
|
||||
|
||||
// return first_symbol(case, freq, ssb_index) / 14
|
||||
}
|
||||
|
||||
uint8_t table_9_2_2_1[16][8]={
|
||||
{0,12,2, 0, 0,3,0,0},
|
||||
{0,12,2, 0, 0,4,8,0},
|
||||
@@ -993,348 +987,34 @@ int8_t nr_ue_decode_mib(module_id_t module_id,
|
||||
LOG_D(MAC,"cell barred (0=barred,1=notBarred): %d\n", (int)mac->mib->cellBarred);
|
||||
LOG_D(MAC,"intra frequency reselection (0=allowed,1=notAllowed): %d\n", (int)mac->mib->intraFreqReselection);
|
||||
LOG_D(MAC,"half frame bit(extra bits): %d\n", (int)half_frame_bit);
|
||||
LOG_D(MAC,"ssb index(extra bits): %d\n", (int)ssb_index);
|
||||
LOG_I(MAC,"ssb index(extra bits): %d\n", (int)ssb_index);
|
||||
|
||||
subcarrier_spacing_t scs_ssb = scs_30kHz; // default for
|
||||
//const uint32_t scs_index = 0;
|
||||
const uint32_t num_slot_per_frame = 20;
|
||||
subcarrier_spacing_t scs_pdcch;
|
||||
//storing ssb index in the mac structure
|
||||
mac->mib_ssb = ssb_index;
|
||||
|
||||
// assume carrier frequency < 6GHz
|
||||
if(mac->mib->subCarrierSpacingCommon == NR_MIB__subCarrierSpacingCommon_scs15or60){
|
||||
scs_pdcch = scs_15kHz;
|
||||
}else{ //NR_MIB__subCarrierSpacingCommon_scs30or120
|
||||
scs_pdcch = scs_30kHz;
|
||||
}
|
||||
get_type0_PDCCH_CSS_config_parameters(&mac->type0_PDCCH_CSS_config, mac->mib, extra_bits, ssb_length, ssb_index,
|
||||
mac->phy_config.config_req.ssb_table.ssb_offset_point_a);
|
||||
|
||||
channel_bandwidth_t min_channel_bw = bw_10MHz; // deafult for testing
|
||||
|
||||
uint32_t is_condition_A = (ssb_subcarrier_offset == 0); // 38.213 ch.13
|
||||
frequency_range_t frequency_range = FR1;
|
||||
uint32_t index_4msb = (mac->mib->pdcch_ConfigSIB1.controlResourceSetZero);
|
||||
uint32_t index_4lsb = (mac->mib->pdcch_ConfigSIB1.searchSpaceZero);
|
||||
int32_t num_rbs = -1;
|
||||
int32_t num_symbols = -1;
|
||||
int32_t rb_offset = -1;
|
||||
LOG_D(MAC,"<<<<<<<<<configSIB1: controlResourceSetZero %d searchSpaceZero %d scs_ssb %d scs_pdcch %d switch %d ",
|
||||
index_4msb,index_4lsb,scs_ssb,scs_pdcch, (scs_ssb << 5)|scs_pdcch);
|
||||
ssb_index = mac->type0_PDCCH_CSS_config.ssb_index; // TODO: ssb_index should obtain from L1 in case Lssb != 64
|
||||
mac->type0_pdcch_ss_mux_pattern = mac->type0_PDCCH_CSS_config.type0_pdcch_ss_mux_pattern;
|
||||
mac->type0_pdcch_ss_sfn_c = mac->type0_PDCCH_CSS_config.sfn_c;
|
||||
mac->type0_pdcch_ss_n_c = mac->type0_PDCCH_CSS_config.n_c;
|
||||
mac->dl_config_request.sfn = mac->type0_PDCCH_CSS_config.frame;
|
||||
mac->dl_config_request.slot = (ssb_index>>1) + ((ssb_index>>4)<<1); // not valid for 240kHz SCS
|
||||
|
||||
// type0-pdcch coreset
|
||||
switch( (scs_ssb << 5)|scs_pdcch ){
|
||||
case (scs_15kHz << 5) | scs_15kHz :
|
||||
AssertFatal(index_4msb < 15, "38.213 Table 13-1 4 MSB out of range\n");
|
||||
mac->type0_pdcch_ss_mux_pattern = 1;
|
||||
num_rbs = table_38213_13_1_c2[index_4msb];
|
||||
num_symbols = table_38213_13_1_c3[index_4msb];
|
||||
rb_offset = table_38213_13_1_c4[index_4msb];
|
||||
break;
|
||||
|
||||
case (scs_15kHz << 5) | scs_30kHz:
|
||||
AssertFatal(index_4msb < 14, "38.213 Table 13-2 4 MSB out of range\n");
|
||||
mac->type0_pdcch_ss_mux_pattern = 1;
|
||||
num_rbs = table_38213_13_2_c2[index_4msb];
|
||||
num_symbols = table_38213_13_2_c3[index_4msb];
|
||||
rb_offset = table_38213_13_2_c4[index_4msb];
|
||||
break;
|
||||
|
||||
case (scs_30kHz << 5) | scs_15kHz:
|
||||
if((min_channel_bw & bw_5MHz) | (min_channel_bw & bw_10MHz)){
|
||||
AssertFatal(index_4msb < 9, "38.213 Table 13-3 4 MSB out of range\n");
|
||||
mac->type0_pdcch_ss_mux_pattern = 1;
|
||||
num_rbs = table_38213_13_3_c2[index_4msb];
|
||||
num_symbols = table_38213_13_3_c3[index_4msb];
|
||||
rb_offset = table_38213_13_3_c4[index_4msb];
|
||||
}else if(min_channel_bw & bw_40MHz){
|
||||
AssertFatal(index_4msb < 9, "38.213 Table 13-5 4 MSB out of range\n");
|
||||
mac->type0_pdcch_ss_mux_pattern = 1;
|
||||
num_rbs = table_38213_13_5_c2[index_4msb];
|
||||
num_symbols = table_38213_13_5_c3[index_4msb];
|
||||
rb_offset = table_38213_13_5_c4[index_4msb];
|
||||
}else{ ; }
|
||||
|
||||
break;
|
||||
|
||||
case (scs_30kHz << 5) | scs_30kHz:
|
||||
if((min_channel_bw & bw_5MHz) | (min_channel_bw & bw_10MHz)){
|
||||
mac->type0_pdcch_ss_mux_pattern = 1;
|
||||
num_rbs = table_38213_13_4_c2[index_4msb];
|
||||
num_symbols = table_38213_13_4_c3[index_4msb];
|
||||
rb_offset = table_38213_13_4_c4[index_4msb];
|
||||
LOG_D(MAC,"<<<<<<<<<index_4msb %d num_rbs %d num_symb %d rb_offset %d\n",index_4msb,num_rbs,num_symbols,rb_offset );
|
||||
}else if(min_channel_bw & bw_40MHz){
|
||||
AssertFatal(index_4msb < 10, "38.213 Table 13-6 4 MSB out of range\n");
|
||||
mac->type0_pdcch_ss_mux_pattern = 1;
|
||||
num_rbs = table_38213_13_6_c2[index_4msb];
|
||||
num_symbols = table_38213_13_6_c3[index_4msb];
|
||||
rb_offset = table_38213_13_6_c4[index_4msb];
|
||||
}else{ ; }
|
||||
break;
|
||||
|
||||
case (scs_120kHz << 5) | scs_60kHz:
|
||||
AssertFatal(index_4msb < 12, "38.213 Table 13-7 4 MSB out of range\n");
|
||||
if(index_4msb & 0x7){
|
||||
mac->type0_pdcch_ss_mux_pattern = 1;
|
||||
}else if(index_4msb & 0x18){
|
||||
mac->type0_pdcch_ss_mux_pattern = 2;
|
||||
}else{ ; }
|
||||
|
||||
num_rbs = table_38213_13_7_c2[index_4msb];
|
||||
num_symbols = table_38213_13_7_c3[index_4msb];
|
||||
if(!is_condition_A && (index_4msb == 8 || index_4msb == 10)){
|
||||
rb_offset = table_38213_13_7_c4[index_4msb] - 1;
|
||||
}else{
|
||||
rb_offset = table_38213_13_7_c4[index_4msb];
|
||||
}
|
||||
break;
|
||||
|
||||
case (scs_120kHz << 5) | scs_120kHz:
|
||||
AssertFatal(index_4msb < 8, "38.213 Table 13-8 4 MSB out of range\n");
|
||||
if(index_4msb & 0x3){
|
||||
mac->type0_pdcch_ss_mux_pattern = 1;
|
||||
}else if(index_4msb & 0x0c){
|
||||
mac->type0_pdcch_ss_mux_pattern = 3;
|
||||
}
|
||||
|
||||
num_rbs = table_38213_13_8_c2[index_4msb];
|
||||
num_symbols = table_38213_13_8_c3[index_4msb];
|
||||
if(!is_condition_A && (index_4msb == 4 || index_4msb == 6)){
|
||||
rb_offset = table_38213_13_8_c4[index_4msb] - 1;
|
||||
}else{
|
||||
rb_offset = table_38213_13_8_c4[index_4msb];
|
||||
}
|
||||
break;
|
||||
|
||||
case (scs_240kHz << 5) | scs_60kHz:
|
||||
AssertFatal(index_4msb < 4, "38.213 Table 13-9 4 MSB out of range\n");
|
||||
mac->type0_pdcch_ss_mux_pattern = 1;
|
||||
num_rbs = table_38213_13_9_c2[index_4msb];
|
||||
num_symbols = table_38213_13_9_c3[index_4msb];
|
||||
rb_offset = table_38213_13_9_c4[index_4msb];
|
||||
break;
|
||||
|
||||
case (scs_240kHz << 5) | scs_120kHz:
|
||||
AssertFatal(index_4msb < 8, "38.213 Table 13-10 4 MSB out of range\n");
|
||||
if(index_4msb & 0x3){
|
||||
mac->type0_pdcch_ss_mux_pattern = 1;
|
||||
}else if(index_4msb & 0x0c){
|
||||
mac->type0_pdcch_ss_mux_pattern = 2;
|
||||
}
|
||||
num_rbs = table_38213_13_10_c2[index_4msb];
|
||||
num_symbols = table_38213_13_10_c3[index_4msb];
|
||||
if(!is_condition_A && (index_4msb == 4 || index_4msb == 6)){
|
||||
rb_offset = table_38213_13_10_c4[index_4msb]-1;
|
||||
}else{
|
||||
rb_offset = table_38213_13_10_c4[index_4msb];
|
||||
}
|
||||
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
AssertFatal(num_rbs != -1, "Type0 PDCCH coreset num_rbs undefined");
|
||||
AssertFatal(num_symbols != -1, "Type0 PDCCH coreset num_symbols undefined");
|
||||
AssertFatal(rb_offset != -1, "Type0 PDCCH coreset rb_offset undefined");
|
||||
|
||||
//uint32_t cell_id = 0; // obtain from L1 later
|
||||
|
||||
//mac->type0_pdcch_dci_config.coreset.rb_start = rb_offset;
|
||||
//mac->type0_pdcch_dci_config.coreset.rb_end = rb_offset + num_rbs - 1;
|
||||
uint64_t mask = 0x0;
|
||||
uint8_t i;
|
||||
for(i=0; i<(num_rbs/6); ++i){ // 38.331 Each bit corresponds a group of 6 RBs
|
||||
mask = mask >> 1;
|
||||
mask = mask | 0x100000000000;
|
||||
}
|
||||
//LOG_I(MAC,">>>>>>>>mask %x num_rbs %d rb_offset %d\n", mask, num_rbs, rb_offset);
|
||||
/*
|
||||
mac->type0_pdcch_dci_config.coreset.frequency_domain_resource = mask;
|
||||
mac->type0_pdcch_dci_config.coreset.rb_offset = rb_offset; // additional parameter other than coreset
|
||||
|
||||
//mac->type0_pdcch_dci_config.type0_pdcch_coreset.duration = num_symbols;
|
||||
mac->type0_pdcch_dci_config.coreset.cce_reg_mapping_type = CCE_REG_MAPPING_TYPE_INTERLEAVED;
|
||||
mac->type0_pdcch_dci_config.coreset.cce_reg_interleaved_reg_bundle_size = 6; // L 38.211 7.3.2.2
|
||||
mac->type0_pdcch_dci_config.coreset.cce_reg_interleaved_interleaver_size = 2; // R 38.211 7.3.2.2
|
||||
mac->type0_pdcch_dci_config.coreset.cce_reg_interleaved_shift_index = cell_id;
|
||||
mac->type0_pdcch_dci_config.coreset.precoder_granularity = PRECODER_GRANULARITY_SAME_AS_REG_BUNDLE;
|
||||
mac->type0_pdcch_dci_config.coreset.pdcch_dmrs_scrambling_id = cell_id;
|
||||
*/
|
||||
|
||||
|
||||
// type0-pdcch search space
|
||||
float big_o;
|
||||
float big_m;
|
||||
uint32_t temp;
|
||||
SFN_C_TYPE sfn_c=SFN_C_IMPOSSIBLE; // only valid for mux=1
|
||||
uint32_t n_c=UINT_MAX;
|
||||
uint32_t number_of_search_space_per_slot=UINT_MAX;
|
||||
// uint32_t first_symbol_index=UINT_MAX;
|
||||
// uint32_t search_space_duration; // element of search space
|
||||
// 38.213 table 10.1-1
|
||||
|
||||
/// MUX PATTERN 1
|
||||
if(mac->type0_pdcch_ss_mux_pattern == 1 && frequency_range == FR1){
|
||||
big_o = table_38213_13_11_c1[index_4lsb];
|
||||
number_of_search_space_per_slot = table_38213_13_11_c2[index_4lsb];
|
||||
big_m = table_38213_13_11_c3[index_4lsb];
|
||||
|
||||
temp = (uint32_t)(big_o*pow(2, scs_pdcch)) + (uint32_t)(ssb_index*big_m);
|
||||
n_c = temp / num_slot_per_frame;
|
||||
if((temp/num_slot_per_frame) & 0x1){
|
||||
sfn_c = SFN_C_MOD_2_EQ_1;
|
||||
}else{
|
||||
sfn_c = SFN_C_MOD_2_EQ_0;
|
||||
}
|
||||
|
||||
// if((index_4lsb == 1 || index_4lsb == 3 || index_4lsb == 5 || index_4lsb == 7) && (ssb_index&1)){
|
||||
// first_symbol_index = num_symbols;
|
||||
// }else{
|
||||
// first_symbol_index = table_38213_13_11_c4[index_4lsb];
|
||||
// }
|
||||
// 38.213 chapter 13: over two consecutive slots
|
||||
// search_space_duration = 2;
|
||||
}
|
||||
|
||||
if(mac->type0_pdcch_ss_mux_pattern == 1 && frequency_range == FR2){
|
||||
big_o = table_38213_13_12_c1[index_4lsb];
|
||||
number_of_search_space_per_slot = table_38213_13_11_c2[index_4lsb];
|
||||
big_m = table_38213_13_12_c3[index_4lsb];
|
||||
|
||||
// if((index_4lsb == 1 || index_4lsb == 3 || index_4lsb == 5 || index_4lsb == 10) && (ssb_index&1)){
|
||||
// first_symbol_index = 7;
|
||||
// }else if((index_4lsb == 6 || index_4lsb == 7 || index_4lsb == 8 || index_4lsb == 11) && (ssb_index&1)){
|
||||
// first_symbol_index = num_symbols;
|
||||
// }else{
|
||||
// first_symbol_index = 0;
|
||||
// }
|
||||
// 38.213 chapter 13: over two consecutive slots
|
||||
//search_space_duration = 2;
|
||||
}
|
||||
|
||||
/// MUX PATTERN 2
|
||||
if(mac->type0_pdcch_ss_mux_pattern == 2){
|
||||
|
||||
if((scs_ssb == scs_120kHz) && (scs_pdcch == scs_60kHz)){
|
||||
// 38.213 Table 13-13
|
||||
AssertFatal(index_4lsb == 0, "38.213 Table 13-13 4 LSB out of range\n");
|
||||
// PDCCH monitoring occasions (SFN and slot number) same as SSB frame-slot
|
||||
// sfn_c = SFN_C_EQ_SFN_SSB;
|
||||
n_c = get_ssb_slot(ssb_index);
|
||||
// switch(ssb_index & 0x3){ // ssb_index(i) mod 4
|
||||
// case 0:
|
||||
// first_symbol_index = 0;
|
||||
// break;
|
||||
// case 1:
|
||||
// first_symbol_index = 1;
|
||||
// break;
|
||||
// case 2:
|
||||
// first_symbol_index = 6;
|
||||
// break;
|
||||
// case 3:
|
||||
// first_symbol_index = 7;
|
||||
// break;
|
||||
// default: break;
|
||||
// }
|
||||
|
||||
}else if((scs_ssb == scs_240kHz) && (scs_pdcch == scs_120kHz)){
|
||||
// 38.213 Table 13-14
|
||||
AssertFatal(index_4lsb == 0, "38.213 Table 13-14 4 LSB out of range\n");
|
||||
// PDCCH monitoring occasions (SFN and slot number) same as SSB frame-slot
|
||||
// sfn_c = SFN_C_EQ_SFN_SSB;
|
||||
n_c = get_ssb_slot(ssb_index);
|
||||
switch(ssb_index & 0x7){ // ssb_index(i) mod 8
|
||||
case 0:
|
||||
// first_symbol_index = 0;
|
||||
break;
|
||||
case 1:
|
||||
// first_symbol_index = 1;
|
||||
break;
|
||||
case 2:
|
||||
// first_symbol_index = 2;
|
||||
break;
|
||||
case 3:
|
||||
// first_symbol_index = 3;
|
||||
break;
|
||||
case 4:
|
||||
// first_symbol_index = 12;
|
||||
n_c = get_ssb_slot(ssb_index) - 1;
|
||||
break;
|
||||
case 5:
|
||||
// first_symbol_index = 13;
|
||||
n_c = get_ssb_slot(ssb_index) - 1;
|
||||
break;
|
||||
case 6:
|
||||
// first_symbol_index = 0;
|
||||
break;
|
||||
case 7:
|
||||
// first_symbol_index = 1;
|
||||
break;
|
||||
default: break;
|
||||
}
|
||||
}else{ ; }
|
||||
// 38.213 chapter 13: over one slot
|
||||
// search_space_duration = 1;
|
||||
}
|
||||
|
||||
/// MUX PATTERN 3
|
||||
if(mac->type0_pdcch_ss_mux_pattern == 3){
|
||||
if((scs_ssb == scs_120kHz) && (scs_pdcch == scs_120kHz)){
|
||||
// 38.213 Table 13-15
|
||||
AssertFatal(index_4lsb == 0, "38.213 Table 13-15 4 LSB out of range\n");
|
||||
// PDCCH monitoring occasions (SFN and slot number) same as SSB frame-slot
|
||||
// sfn_c = SFN_C_EQ_SFN_SSB;
|
||||
n_c = get_ssb_slot(ssb_index);
|
||||
// switch(ssb_index & 0x3){ // ssb_index(i) mod 4
|
||||
// case 0:
|
||||
// first_symbol_index = 4;
|
||||
// break;
|
||||
// case 1:
|
||||
// first_symbol_index = 8;
|
||||
// break;
|
||||
// case 2:
|
||||
// first_symbol_index = 2;
|
||||
// break;
|
||||
// case 3:
|
||||
// first_symbol_index = 6;
|
||||
// break;
|
||||
// default: break;
|
||||
// }
|
||||
}else{ ; }
|
||||
// 38.213 chapter 13: over one slot
|
||||
// search_space_duration = 1;
|
||||
}
|
||||
|
||||
AssertFatal(number_of_search_space_per_slot!=UINT_MAX,"");
|
||||
/*
|
||||
uint32_t coreset_duration = num_symbols * number_of_search_space_per_slot;
|
||||
mac->type0_pdcch_dci_config.number_of_candidates[0] = table_38213_10_1_1_c2[0];
|
||||
mac->type0_pdcch_dci_config.number_of_candidates[1] = table_38213_10_1_1_c2[1];
|
||||
mac->type0_pdcch_dci_config.number_of_candidates[2] = table_38213_10_1_1_c2[2]; // CCE aggregation level = 4
|
||||
mac->type0_pdcch_dci_config.number_of_candidates[3] = table_38213_10_1_1_c2[3]; // CCE aggregation level = 8
|
||||
mac->type0_pdcch_dci_config.number_of_candidates[4] = table_38213_10_1_1_c2[4]; // CCE aggregation level = 16
|
||||
mac->type0_pdcch_dci_config.duration = search_space_duration;
|
||||
mac->type0_pdcch_dci_config.coreset.duration = coreset_duration; // coreset
|
||||
AssertFatal(first_symbol_index!=UINT_MAX,"");
|
||||
mac->type0_pdcch_dci_config.monitoring_symbols_within_slot = (0x3fff << first_symbol_index) & (0x3fff >> (14-coreset_duration-first_symbol_index)) & 0x3fff;
|
||||
*/
|
||||
AssertFatal(sfn_c!=SFN_C_IMPOSSIBLE,"");
|
||||
AssertFatal(n_c!=UINT_MAX,"");
|
||||
mac->type0_pdcch_ss_sfn_c = sfn_c;
|
||||
mac->type0_pdcch_ss_n_c = n_c;
|
||||
|
||||
// fill in the elements in config request inside P5 message
|
||||
mac->phy_config.Mod_id = module_id;
|
||||
mac->phy_config.CC_id = cc_id;
|
||||
|
||||
mac->dl_config_request.sfn = frame;
|
||||
mac->dl_config_request.slot = (ssb_index>>1) + ((ssb_index>>4)<<1); // not valid for 240kHz SCS
|
||||
|
||||
//}
|
||||
return 0;
|
||||
|
||||
}
|
||||
|
||||
int8_t nr_ue_decode_sib1(module_id_t module_id,
|
||||
int cc_id,
|
||||
unsigned int gNB_index,
|
||||
uint32_t sibs_mask,
|
||||
uint8_t *pduP,
|
||||
uint32_t pdu_len) {
|
||||
LOG_D(MAC, "Decode sib1\n");
|
||||
nr_mac_rrc_data_ind_ue(module_id, cc_id, gNB_index, NR_BCCH_DL_SCH, (uint8_t *) pduP, pdu_len);
|
||||
return 0;
|
||||
}
|
||||
|
||||
// TODO: change to UE parameter, scs: 15KHz, slot duration: 1ms
|
||||
uint32_t get_ssb_frame(uint32_t test){
|
||||
@@ -1661,7 +1341,7 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in
|
||||
|
||||
NR_UE_MAC_INST_t *mac = get_mac_inst(ul_info->module_id);
|
||||
|
||||
if (mac->RA_active && ul_info->slot_tx == mac->msg3_slot && ul_info->frame_tx == mac->msg3_frame){
|
||||
if (ul_info->slot_tx == mac->msg3_slot && ul_info->frame_tx == mac->msg3_frame){
|
||||
|
||||
uint8_t ulsch_input_buffer[MAX_ULSCH_PAYLOAD_BYTES];
|
||||
nr_scheduled_response_t scheduled_response;
|
||||
@@ -1698,7 +1378,7 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in
|
||||
}
|
||||
//}
|
||||
|
||||
LOG_D(MAC, "[UE %d] Frame %d, Subframe %d Adding Msg3 UL Config Request for rnti: %x\n",
|
||||
LOG_I(MAC, "[UE %d] Frame %d, Subframe %d Adding Msg3 UL Config Request for rnti: %x\n",
|
||||
ul_info->module_id,
|
||||
ul_info->frame_tx,
|
||||
ul_info->slot_tx,
|
||||
@@ -1718,6 +1398,8 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in
|
||||
if(mac->if_module != NULL && mac->if_module->scheduled_response != NULL){
|
||||
mac->if_module->scheduled_response(&scheduled_response);
|
||||
}
|
||||
mac->msg3_frame = -1; // re-initialize to an invalid value after scheduling
|
||||
mac->msg3_slot = -1;
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -1760,9 +1442,7 @@ void nr_ue_msg3_scheduler(NR_UE_MAC_INST_t *mac,
|
||||
else
|
||||
mac->msg3_frame = current_frame;
|
||||
|
||||
#ifdef DEBUG_MSG3
|
||||
LOG_D(MAC, "[DEBUG_MSG3] current_slot %d k2 %d delta %d temp_slot %d mac->msg3_frame %d mac->msg3_slot %d \n", current_slot, k2, delta, current_slot + k2 + delta, mac->msg3_frame, mac->msg3_slot);
|
||||
#endif
|
||||
}
|
||||
|
||||
// This function schedules the PRACH according to prach_ConfigurationIndex and TS 38.211, tables 6.3.3.2.x
|
||||
@@ -1793,9 +1473,7 @@ void nr_ue_prach_scheduler(module_id_t module_idP, frame_t frameP, sub_frame_t s
|
||||
|
||||
if (is_nr_UL_slot(scc, slotP)) {
|
||||
|
||||
// WIP Need to get the proper selected ssb_idx
|
||||
// Initial beam selection functionality is not available yet
|
||||
uint8_t selected_gnb_ssb_idx = 0;
|
||||
uint8_t selected_gnb_ssb_idx = mac->mib_ssb;
|
||||
|
||||
// Get any valid PRACH occasion in the current slot for the selected SSB index
|
||||
is_nr_prach_slot = get_nr_prach_info_from_ssb_index(selected_gnb_ssb_idx,
|
||||
@@ -2898,6 +2576,11 @@ int8_t nr_ue_process_dci_freq_dom_resource_assignment(nfapi_nr_ue_pusch_pdu_t *p
|
||||
return -1;
|
||||
}
|
||||
|
||||
LOG_D(MAC,"riv = %i\n", riv);
|
||||
LOG_D(MAC,"n_RB_DLBWP = %i\n", n_RB_DLBWP);
|
||||
LOG_D(MAC,"number_rbs = %i\n", dlsch_config_pdu->number_rbs);
|
||||
LOG_D(MAC,"start_rb = %i\n", dlsch_config_pdu->start_rb);
|
||||
|
||||
}
|
||||
if(pusch_config_pdu != NULL){
|
||||
/*
|
||||
@@ -3069,6 +2752,11 @@ int8_t nr_ue_process_dci_time_dom_resource_assignment(NR_UE_MAC_INST_t *mac,
|
||||
SLIV2SL(startSymbolAndLength,&S,&L);
|
||||
dlsch_config_pdu->start_symbol=S;
|
||||
dlsch_config_pdu->number_symbols=L;
|
||||
|
||||
LOG_D(MAC,"SLIV = %i\n", startSymbolAndLength);
|
||||
LOG_D(MAC,"start_symbol = %i\n", dlsch_config_pdu->start_symbol);
|
||||
LOG_D(MAC,"number_symbols = %i\n", dlsch_config_pdu->number_symbols);
|
||||
|
||||
}
|
||||
else {// Default configuration from tables
|
||||
// k_offset = table_5_1_2_1_1_2_time_dom_res_alloc_A[time_domain_ind-1][0];
|
||||
@@ -3223,14 +2911,14 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
|
||||
pusch_config_pdu_0_0->transform_precoding = 1;
|
||||
else
|
||||
pusch_config_pdu_0_0->transform_precoding = 0;
|
||||
|
||||
if (pusch_config_pdu_0_0->transform_precoding == transform_precoder_disabled)
|
||||
|
||||
if (pusch_config_pdu_0_0->transform_precoding == transform_precoder_disabled)
|
||||
pusch_config_pdu_0_0->mcs_table = get_pusch_mcs_table(pusch_config->mcs_Table, 0,
|
||||
dci_format, NR_RNTI_TC, NR_SearchSpace__searchSpaceType_PR_common, false);
|
||||
else
|
||||
pusch_config_pdu_0_0->mcs_table = get_pusch_mcs_table(pusch_config->mcs_TableTransformPrecoder, 1,
|
||||
dci_format, NR_RNTI_TC, NR_SearchSpace__searchSpaceType_PR_common, false);
|
||||
|
||||
|
||||
pusch_config_pdu_0_0->target_code_rate = nr_get_code_rate_ul(pusch_config_pdu_0_0->mcs_index, pusch_config_pdu_0_0->mcs_table);
|
||||
pusch_config_pdu_0_0->qam_mod_order = nr_get_Qm_ul(pusch_config_pdu_0_0->mcs_index, pusch_config_pdu_0_0->mcs_table);
|
||||
if (pusch_config_pdu_0_0->target_code_rate == 0 || pusch_config_pdu_0_0->qam_mod_order == 0) {
|
||||
@@ -3678,14 +3366,31 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
|
||||
*/
|
||||
|
||||
dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.rnti = rnti;
|
||||
//fapi_nr_dl_config_dlsch_pdu_rel15_t dlsch_config_pdu_1_0 = dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.dlsch_config_rel15;
|
||||
fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu_1_0 = &dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.dlsch_config_rel15;
|
||||
dlsch_config_pdu_1_0->BWPSize = NRRIV2BW(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth,275);
|
||||
dlsch_config_pdu_1_0->BWPStart = NRRIV2PRBOFFSET(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth,275);
|
||||
dlsch_config_pdu_1_0->SubcarrierSpacing = mac->DLbwp[0]->bwp_Common->genericParameters.subcarrierSpacing;
|
||||
uint16_t BWPSize = 0;
|
||||
|
||||
if(rnti == SI_RNTI) {
|
||||
dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_SI_DLSCH;
|
||||
dlsch_config_pdu_1_0->BWPSize = mac->type0_PDCCH_CSS_config.num_rbs;
|
||||
dlsch_config_pdu_1_0->BWPStart = mac->type0_PDCCH_CSS_config.cset_start_rb;
|
||||
dlsch_config_pdu_1_0->SubcarrierSpacing = mac->mib->subCarrierSpacingCommon;
|
||||
pdsch_config->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_AdditionalPosition = NULL; // For PDSCH with mapping type A, the UE shall assume dmrs-AdditionalPosition='pos2'
|
||||
BWPSize = dlsch_config_pdu_1_0->BWPSize;
|
||||
} else {
|
||||
if (mac->RA_window_cnt >= 0 && rnti == mac->ra_rnti){
|
||||
dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_RA_DLSCH;
|
||||
} else {
|
||||
dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_DLSCH;
|
||||
}
|
||||
dlsch_config_pdu_1_0->BWPSize = NRRIV2BW(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth,275);
|
||||
dlsch_config_pdu_1_0->BWPStart = NRRIV2PRBOFFSET(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth,275);
|
||||
dlsch_config_pdu_1_0->SubcarrierSpacing = mac->DLbwp[0]->bwp_Common->genericParameters.subcarrierSpacing;
|
||||
BWPSize = n_RB_DLBWP;
|
||||
}
|
||||
|
||||
/* IDENTIFIER_DCI_FORMATS */
|
||||
/* FREQ_DOM_RESOURCE_ASSIGNMENT_DL */
|
||||
if (nr_ue_process_dci_freq_dom_resource_assignment(NULL,dlsch_config_pdu_1_0,0,n_RB_DLBWP,dci->frequency_domain_assignment.val) < 0)
|
||||
if (nr_ue_process_dci_freq_dom_resource_assignment(NULL,dlsch_config_pdu_1_0,0,BWPSize,dci->frequency_domain_assignment.val) < 0)
|
||||
return -1;
|
||||
/* TIME_DOM_RESOURCE_ASSIGNMENT */
|
||||
if (nr_ue_process_dci_time_dom_resource_assignment(mac,NULL,dlsch_config_pdu_1_0,dci->time_domain_assignment.val) < 0)
|
||||
@@ -3693,7 +3398,7 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
|
||||
/* dmrs symbol positions*/
|
||||
dlsch_config_pdu_1_0->dlDmrsSymbPos = fill_dmrs_mask(pdsch_config,
|
||||
mac->scc->dmrs_TypeA_Position,
|
||||
dlsch_config_pdu_1_0->number_symbols);
|
||||
dlsch_config_pdu_1_0->start_symbol+dlsch_config_pdu_1_0->number_symbols);
|
||||
dlsch_config_pdu_1_0->dmrsConfigType = mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type == NULL ? 0 : 1;
|
||||
/* number of DM-RS CDM groups without data according to subclause 5.1.6.2 of 3GPP TS 38.214 version 15.9.0 Release 15 */
|
||||
if (dlsch_config_pdu_1_0->number_symbols == 2)
|
||||
@@ -3781,12 +3486,6 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
|
||||
dlsch_config_pdu_1_0->pucch_resource_id,
|
||||
dlsch_config_pdu_1_0->pdsch_to_harq_feedback_time_ind);
|
||||
|
||||
if (mac->RA_window_cnt >= 0 && rnti == mac->ra_rnti){
|
||||
dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_RA_DLSCH;
|
||||
} else {
|
||||
dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_DLSCH;
|
||||
}
|
||||
|
||||
// dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15.N_RB_BWP = n_RB_DLBWP;
|
||||
|
||||
LOG_D(MAC,"(nr_ue_procedures.c) pdu_type=%d\n\n",dl_config->dl_config_list[dl_config->number_pdus].pdu_type);
|
||||
@@ -4109,7 +3808,6 @@ int get_n_rb(NR_UE_MAC_INST_t *mac, int rnti_type){
|
||||
case NR_RNTI_RA:
|
||||
case NR_RNTI_TC:
|
||||
case NR_RNTI_P:
|
||||
case NR_RNTI_SI:
|
||||
if (mac->DLbwp[0]->bwp_Common->pdcch_ConfigCommon->choice.setup->controlResourceSetZero) {
|
||||
uint8_t bwp_id = 1;
|
||||
uint8_t coreset_id = 0; // assuming controlResourceSetId is 0 for controlResourceSetZero
|
||||
@@ -4119,8 +3817,11 @@ int get_n_rb(NR_UE_MAC_INST_t *mac, int rnti_type){
|
||||
N_RB = NRRIV2BW(mac->scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth, 275);
|
||||
}
|
||||
break;
|
||||
case NR_RNTI_SI:
|
||||
N_RB = mac->type0_PDCCH_CSS_config.num_rbs;
|
||||
break;
|
||||
case NR_RNTI_C:
|
||||
N_RB = NRRIV2BW(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth, 275);
|
||||
N_RB = NRRIV2BW(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth, 275);
|
||||
break;
|
||||
}
|
||||
return N_RB;
|
||||
@@ -4358,23 +4059,42 @@ int nr_extract_dci_info(NR_UE_MAC_INST_t *mac,
|
||||
break;
|
||||
|
||||
case NR_RNTI_SI:
|
||||
/*
|
||||
// Freq domain assignment 0-16 bit
|
||||
fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) );
|
||||
for (int i=0; i<fsize; i++)
|
||||
*dci_pdu |= ((dci_pdu_rel15->frequency_domain_assignment>>(fsize-i-1))&1)<<(dci_size-pos++);
|
||||
// Time domain assignment 4 bit
|
||||
for (int i=0; i<4; i++)
|
||||
*dci_pdu |= (((uint64_t)dci_pdu_rel15->time_domain_assignment>>(3-i))&1)<<(dci_size-pos++);
|
||||
// VRB to PRB mapping 1 bit
|
||||
*dci_pdu |= ((uint64_t)dci_pdu_rel15->vrb_to_prb_mapping.val&1)<<(dci_size-pos++);
|
||||
// MCS 5bit //bit over 32, so dci_pdu ++
|
||||
for (int i=0; i<5; i++)
|
||||
*dci_pdu |= (((uint64_t)dci_pdu_rel15->mcs>>(4-i))&1)<<(dci_size-pos++);
|
||||
// Redundancy version 2bit
|
||||
for (int i=0; i<2; i++)
|
||||
*dci_pdu |= (((uint64_t)dci_pdu_rel15->rv>>(1-i))&1)<<(dci_size-pos++);
|
||||
*/
|
||||
|
||||
// Freq domain assignment 0-16 bit
|
||||
fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) );
|
||||
pos+=fsize;
|
||||
dci_pdu_rel15->frequency_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&((1<<fsize)-1);
|
||||
|
||||
// Time domain assignment 4 bit
|
||||
pos+=4;
|
||||
dci_pdu_rel15->time_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&0xf;
|
||||
|
||||
// VRB to PRB mapping 1 bit
|
||||
pos++;
|
||||
dci_pdu_rel15->vrb_to_prb_mapping.val = (*dci_pdu>>(dci_size-pos))&0x1;
|
||||
|
||||
// MCS 5bit //bit over 32, so dci_pdu ++
|
||||
pos+=5;
|
||||
dci_pdu_rel15->mcs = (*dci_pdu>>(dci_size-pos))&0x1f;
|
||||
|
||||
// Redundancy version 2 bit
|
||||
pos+=2;
|
||||
dci_pdu_rel15->rv = (*dci_pdu>>(dci_size-pos))&3;
|
||||
|
||||
// System information indicator 1 bit
|
||||
pos++;
|
||||
dci_pdu_rel15->system_info_indicator = (*dci_pdu>>(dci_size-pos))&0x1;
|
||||
|
||||
LOG_D(MAC,"N_RB = %i\n", N_RB);
|
||||
LOG_D(MAC,"dci_size = %i\n", dci_size);
|
||||
LOG_D(MAC,"fsize = %i\n", fsize);
|
||||
LOG_D(MAC,"dci_pdu_rel15->frequency_domain_assignment.val = %i\n", dci_pdu_rel15->frequency_domain_assignment.val);
|
||||
LOG_D(MAC,"dci_pdu_rel15->time_domain_assignment.val = %i\n", dci_pdu_rel15->time_domain_assignment.val);
|
||||
LOG_D(MAC,"dci_pdu_rel15->vrb_to_prb_mapping.val = %i\n", dci_pdu_rel15->vrb_to_prb_mapping.val);
|
||||
LOG_D(MAC,"dci_pdu_rel15->mcs = %i\n", dci_pdu_rel15->mcs);
|
||||
LOG_D(MAC,"dci_pdu_rel15->rv = %i\n", dci_pdu_rel15->rv);
|
||||
LOG_D(MAC,"dci_pdu_rel15->system_info_indicator = %i\n", dci_pdu_rel15->system_info_indicator);
|
||||
|
||||
break;
|
||||
|
||||
case NR_RNTI_TC:
|
||||
|
||||
@@ -116,6 +116,7 @@ void nr_config_Msg3_pdu(NR_UE_MAC_INST_t *mac,
|
||||
mask = (1 << ((int) ceil(log2((ibwp_size*(ibwp_size+1))>>1)))) - 1;
|
||||
else
|
||||
mask = (1 << (28 - (int)(ceil(log2((ibwp_size*(ibwp_size+1))>>1))))) - 1;
|
||||
|
||||
f_alloc = Msg3_f_alloc & mask;
|
||||
nr_ue_process_dci_freq_dom_resource_assignment(pusch_config_pdu, NULL, ibwp_size, 0, f_alloc);
|
||||
|
||||
@@ -273,7 +274,8 @@ uint16_t nr_ue_process_rar(module_id_t mod_id,
|
||||
|
||||
if (ue_mac->RA_RAPID_found) {
|
||||
|
||||
uint8_t freq_hopping, mcs, Msg3_t_alloc, Msg3_f_alloc;
|
||||
uint8_t freq_hopping, mcs, Msg3_t_alloc;
|
||||
uint16_t Msg3_f_alloc;
|
||||
unsigned char tpc_command;
|
||||
#ifdef DEBUG_RAR
|
||||
unsigned char csi_req;
|
||||
|
||||
@@ -385,6 +385,8 @@ int rrc_mac_config_req_gNB(module_id_t Mod_idP,
|
||||
|
||||
if (secondaryCellGroup) {
|
||||
|
||||
RC.nrmac[Mod_idP]->secondaryCellGroupCommon = secondaryCellGroup;
|
||||
|
||||
NR_UE_info_t *UE_info = &RC.nrmac[Mod_idP]->UE_info;
|
||||
if (add_ue == 1 && get_softmodem_params()->phy_test) {
|
||||
const int UE_id = add_new_nr_ue(Mod_idP,rnti);
|
||||
|
||||
@@ -360,7 +360,7 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
|
||||
nr_rrc_trigger(&ctxt, 0 /*CC_id*/, frame, slot >> *scc->ssbSubcarrierSpacing);
|
||||
}
|
||||
|
||||
const uint64_t dlsch_in_slot_bitmap = (1 << 1) | (1 << 2);
|
||||
const uint64_t dlsch_in_slot_bitmap = (1 << 1) | (1 << 3);
|
||||
const uint64_t ulsch_in_slot_bitmap = (1 << 8);
|
||||
|
||||
memset(RC.nrmac[module_idP]->cce_list[bwp_id][0],0,MAX_NUM_CCE*sizeof(int)); // coreset0
|
||||
@@ -388,6 +388,11 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
|
||||
// This schedules MIB
|
||||
schedule_nr_mib(module_idP, frame, slot, nr_slots_per_frame[*scc->ssbSubcarrierSpacing]);
|
||||
|
||||
// This schedules SIB1
|
||||
if ( get_softmodem_params()->sa == 1 )
|
||||
schedule_nr_sib1(module_idP, frame, slot);
|
||||
|
||||
|
||||
// This schedule PRACH if we are not in phy_test mode
|
||||
if (get_softmodem_params()->phy_test == 0) {
|
||||
/* we need to make sure that resources for PRACH are free. To avoid that
|
||||
|
||||
@@ -30,6 +30,7 @@
|
||||
|
||||
*/
|
||||
|
||||
#include "GNB_APP/RRC_nr_paramsvalues.h"
|
||||
#include "assertions.h"
|
||||
#include "NR_MAC_gNB/nr_mac_gNB.h"
|
||||
#include "NR_MAC_gNB/mac_proto.h"
|
||||
@@ -38,21 +39,19 @@
|
||||
#include "common/utils/LOG/vcd_signal_dumper.h"
|
||||
#include "UTIL/OPT/opt.h"
|
||||
#include "OCG.h"
|
||||
#include "OCG_extern.h"
|
||||
|
||||
#include "RRC/NR/nr_rrc_extern.h"
|
||||
#include "common/utils/nr/nr_common.h"
|
||||
|
||||
|
||||
//#include "LAYER2/MAC/pre_processor.c"
|
||||
#include "pdcp.h"
|
||||
|
||||
#include "intertask_interface.h"
|
||||
|
||||
#define ENABLE_MAC_PAYLOAD_DEBUG
|
||||
#define DEBUG_eNB_SCHEDULER 1
|
||||
|
||||
#include "common/ran_context.h"
|
||||
|
||||
#include "executables/softmodem-common.h"
|
||||
|
||||
extern RAN_CONTEXT_t RC;
|
||||
extern uint8_t SSB_Table[38];
|
||||
|
||||
@@ -153,6 +152,17 @@ void schedule_nr_mib(module_id_t module_idP, frame_t frameP, sub_frame_t slotP,
|
||||
dl_config_pdu->ssb_pdu.ssb_pdu_rel15.bchPayload = (*(uint32_t*)cc->MIB_pdu.payload) & ((1<<24)-1);
|
||||
dl_req->nPDUs++;
|
||||
}
|
||||
|
||||
// Get type0_PDCCH_CSS_config parameters
|
||||
NR_DL_FRAME_PARMS *frame_parms = &RC.gNB[module_idP]->frame_parms;
|
||||
NR_MIB_t *mib = RC.nrrrc[module_idP]->carrier.mib.message.choice.mib;
|
||||
uint8_t gNB_xtra_byte = 0;
|
||||
for (int i = 0; i < 8; i++) {
|
||||
gNB_xtra_byte |= ((RC.gNB[module_idP]->pbch.pbch_a >> (31 - i)) & 1) << (7 - i);
|
||||
}
|
||||
get_type0_PDCCH_CSS_config_parameters(&gNB->type0_PDCCH_CSS_config, mib, gNB_xtra_byte, frame_parms->Lmax,
|
||||
frame_parms->ssb_index, frame_parms->ssb_start_subcarrier/NR_NB_SC_PER_RB);
|
||||
|
||||
}
|
||||
|
||||
// checking if there is any SSB in slot
|
||||
@@ -214,3 +224,284 @@ void fill_ssb_vrb_map (NR_COMMON_channels_t *cc, int rbStart, int CC_id) {
|
||||
for (int rb = 0; rb < 20; rb++)
|
||||
vrb_map[rbStart + rb] = 1;
|
||||
}
|
||||
|
||||
void schedule_control_sib1(module_id_t module_id,
|
||||
int CC_id,
|
||||
int time_domain_allocation,
|
||||
uint8_t mcsTableIdx,
|
||||
uint8_t mcs,
|
||||
int num_total_bytes) {
|
||||
|
||||
gNB_MAC_INST *gNB_mac = RC.nrmac[module_id];
|
||||
NR_ServingCellConfigCommon_t *servingcellconfigcommon = gNB_mac->common_channels[CC_id].ServingCellConfigCommon;
|
||||
uint16_t *vrb_map = RC.nrmac[module_id]->common_channels[CC_id].vrb_map;
|
||||
|
||||
if (gNB_mac->sched_ctrlCommon == NULL){
|
||||
gNB_mac->sched_ctrlCommon = calloc(1,sizeof(*gNB_mac->sched_ctrlCommon));
|
||||
gNB_mac->sched_ctrlCommon->search_space = calloc(1,sizeof(*gNB_mac->sched_ctrlCommon->search_space));
|
||||
gNB_mac->sched_ctrlCommon->active_bwp = calloc(1,sizeof(*gNB_mac->sched_ctrlCommon->active_bwp));
|
||||
gNB_mac->sched_ctrlCommon->coreset = calloc(1,sizeof(*gNB_mac->sched_ctrlCommon->coreset));
|
||||
gNB_mac->sched_ctrlCommon->active_bwp = calloc(1,sizeof(*gNB_mac->sched_ctrlCommon->active_bwp));
|
||||
fill_default_searchSpaceZero(gNB_mac->sched_ctrlCommon->search_space);
|
||||
fill_default_coresetZero(gNB_mac->sched_ctrlCommon->coreset,servingcellconfigcommon);
|
||||
fill_default_initialDownlinkBWP(gNB_mac->sched_ctrlCommon->active_bwp,servingcellconfigcommon);
|
||||
}
|
||||
gNB_mac->sched_ctrlCommon->active_bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_AdditionalPosition = NULL;
|
||||
|
||||
gNB_mac->sched_ctrlCommon->time_domain_allocation = time_domain_allocation;
|
||||
gNB_mac->sched_ctrlCommon->mcsTableIdx = mcsTableIdx;
|
||||
gNB_mac->sched_ctrlCommon->mcs = mcs;
|
||||
gNB_mac->sched_ctrlCommon->num_total_bytes = num_total_bytes;
|
||||
|
||||
uint8_t nr_of_candidates;
|
||||
find_aggregation_candidates(&gNB_mac->sched_ctrlCommon->aggregation_level, &nr_of_candidates, gNB_mac->sched_ctrlCommon->search_space);
|
||||
|
||||
gNB_mac->sched_ctrlCommon->cce_index = allocate_nr_CCEs(RC.nrmac[module_id],
|
||||
gNB_mac->sched_ctrlCommon->active_bwp,
|
||||
gNB_mac->sched_ctrlCommon->coreset,
|
||||
gNB_mac->sched_ctrlCommon->aggregation_level,
|
||||
0,
|
||||
0,
|
||||
nr_of_candidates);
|
||||
|
||||
if (gNB_mac->sched_ctrlCommon->cce_index < 0) {
|
||||
LOG_E(MAC, "%s(): could not find CCE for coreset0\n", __func__);
|
||||
return;
|
||||
}
|
||||
|
||||
const uint16_t bwpSize = gNB_mac->type0_PDCCH_CSS_config.num_rbs;
|
||||
int rbStart = gNB_mac->type0_PDCCH_CSS_config.cset_start_rb;
|
||||
|
||||
// Calculate number of symbols
|
||||
struct NR_PDSCH_TimeDomainResourceAllocationList *tdaList = gNB_mac->sched_ctrlCommon->active_bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList;
|
||||
const int startSymbolAndLength = tdaList->list.array[gNB_mac->sched_ctrlCommon->time_domain_allocation]->startSymbolAndLength;
|
||||
int startSymbolIndex, nrOfSymbols;
|
||||
SLIV2SL(startSymbolAndLength, &startSymbolIndex, &nrOfSymbols);
|
||||
|
||||
if (nrOfSymbols == 2) {
|
||||
gNB_mac->sched_ctrlCommon->numDmrsCdmGrpsNoData = 1;
|
||||
} else {
|
||||
gNB_mac->sched_ctrlCommon->numDmrsCdmGrpsNoData = 2;
|
||||
}
|
||||
|
||||
// Calculate number of PRB_DMRS
|
||||
uint8_t N_PRB_DMRS = gNB_mac->sched_ctrlCommon->numDmrsCdmGrpsNoData * 6;
|
||||
uint16_t dlDmrsSymbPos = fill_dmrs_mask(gNB_mac->sched_ctrlCommon->active_bwp->bwp_Dedicated->pdsch_Config->choice.setup, gNB_mac->common_channels->ServingCellConfigCommon->dmrs_TypeA_Position, startSymbolIndex+nrOfSymbols);
|
||||
uint16_t dmrs_length = get_num_dmrs(dlDmrsSymbPos);
|
||||
|
||||
int rbSize = 0;
|
||||
uint32_t TBS = 0;
|
||||
do {
|
||||
rbSize++;
|
||||
TBS = nr_compute_tbs(nr_get_Qm_dl(gNB_mac->sched_ctrlCommon->mcs, gNB_mac->sched_ctrlCommon->mcsTableIdx),
|
||||
nr_get_code_rate_dl(gNB_mac->sched_ctrlCommon->mcs, gNB_mac->sched_ctrlCommon->mcsTableIdx),
|
||||
rbSize, nrOfSymbols, N_PRB_DMRS * dmrs_length,0, 0,1) >> 3;
|
||||
|
||||
// FIXME: Something is not working in nr_modulation() for TBS = 84, so we need to skip it
|
||||
} while ( (rbStart + rbSize < bwpSize && !vrb_map[rbStart + rbSize] && TBS < gNB_mac->sched_ctrlCommon->num_total_bytes) || (TBS==84) );
|
||||
|
||||
gNB_mac->sched_ctrlCommon->rbSize = rbSize;
|
||||
gNB_mac->sched_ctrlCommon->rbStart = 0;
|
||||
|
||||
LOG_D(MAC,"SLIV = %i\n", startSymbolAndLength);
|
||||
LOG_D(MAC,"startSymbolIndex = %i\n", startSymbolIndex);
|
||||
LOG_D(MAC,"nrOfSymbols = %i\n", nrOfSymbols);
|
||||
LOG_D(MAC,"rbSize = %i\n", gNB_mac->sched_ctrlCommon->rbSize);
|
||||
LOG_D(MAC,"TBS = %i\n", TBS);
|
||||
|
||||
// Mark the corresponding RBs as used
|
||||
for (int rb = 0; rb < gNB_mac->sched_ctrlCommon->rbSize; rb++) {
|
||||
vrb_map[rb + rbStart] = 1;
|
||||
}
|
||||
}
|
||||
|
||||
void nr_fill_nfapi_dl_sib1_pdu(int Mod_idP,
|
||||
nfapi_nr_dl_tti_request_body_t *dl_req,
|
||||
uint32_t TBS,
|
||||
int StartSymbolIndex,
|
||||
int NrOfSymbols) {
|
||||
|
||||
gNB_MAC_INST *gNB_mac = RC.nrmac[Mod_idP];
|
||||
NR_COMMON_channels_t *cc = gNB_mac->common_channels;
|
||||
NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon;
|
||||
NR_CellGroupConfig_t *secondaryCellGroup = gNB_mac->secondaryCellGroupCommon;
|
||||
NR_BWP_Downlink_t *bwp = gNB_mac->sched_ctrlCommon->active_bwp;
|
||||
|
||||
nfapi_nr_dl_tti_request_pdu_t *dl_tti_pdcch_pdu = &dl_req->dl_tti_pdu_list[dl_req->nPDUs];
|
||||
memset((void*)dl_tti_pdcch_pdu,0,sizeof(nfapi_nr_dl_tti_request_pdu_t));
|
||||
dl_tti_pdcch_pdu->PDUType = NFAPI_NR_DL_TTI_PDCCH_PDU_TYPE;
|
||||
dl_tti_pdcch_pdu->PDUSize = (uint8_t)(2+sizeof(nfapi_nr_dl_tti_pdcch_pdu));
|
||||
|
||||
nfapi_nr_dl_tti_request_pdu_t *dl_tti_pdsch_pdu = &dl_req->dl_tti_pdu_list[dl_req->nPDUs+1];
|
||||
memset((void*)dl_tti_pdsch_pdu,0,sizeof(nfapi_nr_dl_tti_request_pdu_t));
|
||||
dl_tti_pdsch_pdu->PDUType = NFAPI_NR_DL_TTI_PDSCH_PDU_TYPE;
|
||||
dl_tti_pdsch_pdu->PDUSize = (uint8_t)(2+sizeof(nfapi_nr_dl_tti_pdsch_pdu));
|
||||
|
||||
nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15 = &dl_tti_pdcch_pdu->pdcch_pdu.pdcch_pdu_rel15;
|
||||
nfapi_nr_dl_tti_pdsch_pdu_rel15_t *pdsch_pdu_rel15 = &dl_tti_pdsch_pdu->pdsch_pdu.pdsch_pdu_rel15;
|
||||
|
||||
pdcch_pdu_rel15->CoreSetType = NFAPI_NR_CSET_CONFIG_MIB_SIB1;
|
||||
|
||||
pdsch_pdu_rel15->pduBitmap = 0;
|
||||
pdsch_pdu_rel15->rnti = SI_RNTI;
|
||||
pdsch_pdu_rel15->pduIndex = gNB_mac->pdu_index[0]++;
|
||||
|
||||
pdsch_pdu_rel15->BWPSize = gNB_mac->type0_PDCCH_CSS_config.num_rbs;
|
||||
pdsch_pdu_rel15->BWPStart = gNB_mac->type0_PDCCH_CSS_config.cset_start_rb;
|
||||
|
||||
pdsch_pdu_rel15->SubcarrierSpacing = bwp->bwp_Common->genericParameters.subcarrierSpacing;
|
||||
if (bwp->bwp_Common->genericParameters.cyclicPrefix) {
|
||||
pdsch_pdu_rel15->CyclicPrefix = *bwp->bwp_Common->genericParameters.cyclicPrefix;
|
||||
} else {
|
||||
pdsch_pdu_rel15->CyclicPrefix = 0;
|
||||
}
|
||||
|
||||
pdsch_pdu_rel15->NrOfCodewords = 1;
|
||||
pdsch_pdu_rel15->targetCodeRate[0] = nr_get_code_rate_dl(gNB_mac->sched_ctrlCommon->mcs,0);
|
||||
pdsch_pdu_rel15->qamModOrder[0] = 2;
|
||||
pdsch_pdu_rel15->mcsIndex[0] = gNB_mac->sched_ctrlCommon->mcs;
|
||||
pdsch_pdu_rel15->mcsTable[0] = 0;
|
||||
pdsch_pdu_rel15->rvIndex[0] = nr_rv_round_map[0];
|
||||
pdsch_pdu_rel15->dataScramblingId = *scc->physCellId;
|
||||
pdsch_pdu_rel15->nrOfLayers = 1;
|
||||
pdsch_pdu_rel15->transmissionScheme = 0;
|
||||
pdsch_pdu_rel15->refPoint = 1;
|
||||
pdsch_pdu_rel15->dmrsConfigType = gNB_mac->sched_ctrlCommon->active_bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type == NULL ? 0 : 1;
|
||||
pdsch_pdu_rel15->dlDmrsScramblingId = *scc->physCellId;
|
||||
pdsch_pdu_rel15->SCID = 0;
|
||||
pdsch_pdu_rel15->numDmrsCdmGrpsNoData = gNB_mac->sched_ctrlCommon->numDmrsCdmGrpsNoData;
|
||||
pdsch_pdu_rel15->dmrsPorts = 1;
|
||||
pdsch_pdu_rel15->resourceAlloc = 1;
|
||||
pdsch_pdu_rel15->rbStart = gNB_mac->sched_ctrlCommon->rbStart;
|
||||
pdsch_pdu_rel15->rbSize = gNB_mac->sched_ctrlCommon->rbSize;
|
||||
pdsch_pdu_rel15->VRBtoPRBMapping = 0;
|
||||
pdsch_pdu_rel15->qamModOrder[0] = nr_get_Qm_dl(gNB_mac->sched_ctrlCommon->mcs, gNB_mac->sched_ctrlCommon->mcsTableIdx);
|
||||
pdsch_pdu_rel15->TBSize[0] = TBS;
|
||||
pdsch_pdu_rel15->mcsTable[0] = gNB_mac->sched_ctrlCommon->mcsTableIdx;
|
||||
pdsch_pdu_rel15->StartSymbolIndex = StartSymbolIndex;
|
||||
pdsch_pdu_rel15->NrOfSymbols = NrOfSymbols;
|
||||
|
||||
pdsch_pdu_rel15->dlDmrsSymbPos = fill_dmrs_mask(bwp->bwp_Dedicated->pdsch_Config->choice.setup, scc->dmrs_TypeA_Position, pdsch_pdu_rel15->StartSymbolIndex+pdsch_pdu_rel15->NrOfSymbols);
|
||||
|
||||
LOG_D(MAC,"dlDmrsSymbPos = 0x%x\n", pdsch_pdu_rel15->dlDmrsSymbPos);
|
||||
|
||||
dci_pdu_rel15_t dci_pdu_rel15[MAX_DCI_CORESET];
|
||||
memset(dci_pdu_rel15, 0, sizeof(dci_pdu_rel15_t) * MAX_DCI_CORESET);
|
||||
|
||||
dci_pdu_rel15[0].bwp_indicator.val = gNB_mac->sched_ctrlCommon->active_bwp->bwp_Id;
|
||||
|
||||
// frequency domain assignment
|
||||
dci_pdu_rel15[0].frequency_domain_assignment.val =
|
||||
PRBalloc_to_locationandbandwidth0(pdsch_pdu_rel15->rbSize,
|
||||
pdsch_pdu_rel15->rbStart,
|
||||
gNB_mac->type0_PDCCH_CSS_config.num_rbs);
|
||||
|
||||
dci_pdu_rel15[0].time_domain_assignment.val = gNB_mac->sched_ctrlCommon->time_domain_allocation;
|
||||
dci_pdu_rel15[0].mcs = gNB_mac->sched_ctrlCommon->mcs;
|
||||
dci_pdu_rel15[0].rv = pdsch_pdu_rel15->rvIndex[0];
|
||||
dci_pdu_rel15[0].harq_pid = 0;
|
||||
dci_pdu_rel15[0].ndi = 0;
|
||||
dci_pdu_rel15[0].dai[0].val = 0;
|
||||
dci_pdu_rel15[0].tpc = 0; // table 7.2.1-1 in 38.213
|
||||
dci_pdu_rel15[0].pucch_resource_indicator = 0;
|
||||
dci_pdu_rel15[0].pdsch_to_harq_feedback_timing_indicator.val = 0;
|
||||
dci_pdu_rel15[0].antenna_ports.val = 0;
|
||||
dci_pdu_rel15[0].dmrs_sequence_initialization.val = pdsch_pdu_rel15->SCID;
|
||||
|
||||
nr_configure_pdcch(gNB_mac,
|
||||
pdcch_pdu_rel15,
|
||||
SI_RNTI,
|
||||
gNB_mac->sched_ctrlCommon->search_space,
|
||||
gNB_mac->sched_ctrlCommon->coreset,
|
||||
scc,
|
||||
bwp,
|
||||
gNB_mac->sched_ctrlCommon->aggregation_level,
|
||||
gNB_mac->sched_ctrlCommon->cce_index);
|
||||
|
||||
int dci_formats[2];
|
||||
int rnti_types[2];
|
||||
|
||||
dci_formats[0] = NR_DL_DCI_FORMAT_1_0;
|
||||
rnti_types[0] = NR_RNTI_SI;
|
||||
|
||||
fill_dci_pdu_rel15(scc,secondaryCellGroup,pdcch_pdu_rel15,dci_pdu_rel15,dci_formats,rnti_types,pdsch_pdu_rel15->BWPSize,gNB_mac->sched_ctrlCommon->active_bwp->bwp_Id);
|
||||
|
||||
dl_req->nPDUs += 2;
|
||||
|
||||
LOG_D(MAC,"BWPSize: %i\n", pdcch_pdu_rel15->BWPSize);
|
||||
LOG_D(MAC,"BWPStart: %i\n", pdcch_pdu_rel15->BWPStart);
|
||||
LOG_D(MAC,"SubcarrierSpacing: %i\n", pdcch_pdu_rel15->SubcarrierSpacing);
|
||||
LOG_D(MAC,"CyclicPrefix: %i\n", pdcch_pdu_rel15->CyclicPrefix);
|
||||
LOG_D(MAC,"StartSymbolIndex: %i\n", pdcch_pdu_rel15->StartSymbolIndex);
|
||||
LOG_D(MAC,"DurationSymbols: %i\n", pdcch_pdu_rel15->DurationSymbols);
|
||||
for(int n=0;n<6;n++) LOG_D(MAC,"FreqDomainResource[%i]: %x\n",n, pdcch_pdu_rel15->FreqDomainResource[n]);
|
||||
LOG_D(MAC,"CceRegMappingType: %i\n", pdcch_pdu_rel15->CceRegMappingType);
|
||||
LOG_D(MAC,"RegBundleSize: %i\n", pdcch_pdu_rel15->RegBundleSize);
|
||||
LOG_D(MAC,"InterleaverSize: %i\n", pdcch_pdu_rel15->InterleaverSize);
|
||||
LOG_D(MAC,"CoreSetType: %i\n", pdcch_pdu_rel15->CoreSetType);
|
||||
LOG_D(MAC,"ShiftIndex: %i\n", pdcch_pdu_rel15->ShiftIndex);
|
||||
LOG_D(MAC,"precoderGranularity: %i\n", pdcch_pdu_rel15->precoderGranularity);
|
||||
LOG_D(MAC,"numDlDci: %i\n", pdcch_pdu_rel15->numDlDci);
|
||||
|
||||
}
|
||||
|
||||
void schedule_nr_sib1(module_id_t module_idP, frame_t frameP, sub_frame_t slotP) {
|
||||
|
||||
LOG_D(MAC,"Schedule_nr_sib1: frameP = %i, slotP = %i\n", frameP, slotP);
|
||||
|
||||
// TODO: Get these values from RRC
|
||||
const int CC_id = 0;
|
||||
int time_domain_allocation = 0;
|
||||
uint8_t mcsTableIdx = 0;
|
||||
uint8_t mcs = 6;
|
||||
|
||||
gNB_MAC_INST *gNB_mac = RC.nrmac[module_idP];
|
||||
|
||||
if( (frameP%2 == gNB_mac->type0_PDCCH_CSS_config.sfn_c) && (slotP == gNB_mac->type0_PDCCH_CSS_config.n_0) && (gNB_mac->type0_PDCCH_CSS_config.num_rbs > 0) ) {
|
||||
|
||||
LOG_D(MAC,"> SIB1 transmission\n");
|
||||
|
||||
// Get SIB1
|
||||
uint8_t sib1_payload[NR_MAX_SIB_LENGTH/8];
|
||||
uint8_t sib1_sdu_length = mac_rrc_nr_data_req(module_idP, CC_id, frameP, BCCH, 1, sib1_payload);
|
||||
LOG_D(MAC,"sib1_sdu_length = %i\n", sib1_sdu_length);
|
||||
LOG_D(MAC,"SIB1: \n");
|
||||
for (int i=0;i<sib1_sdu_length;i++) LOG_D(MAC,"byte %d : %x\n",i,((uint8_t*)sib1_payload)[i]);
|
||||
|
||||
// Configure sched_ctrlCommon for SIB1
|
||||
schedule_control_sib1(module_idP, CC_id, time_domain_allocation, mcsTableIdx, mcs, sib1_sdu_length);
|
||||
|
||||
// Calculate number of symbols
|
||||
int startSymbolIndex, nrOfSymbols;
|
||||
struct NR_PDSCH_TimeDomainResourceAllocationList *tdaList = gNB_mac->sched_ctrlCommon->active_bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList;
|
||||
const int startSymbolAndLength = tdaList->list.array[gNB_mac->sched_ctrlCommon->time_domain_allocation]->startSymbolAndLength;
|
||||
SLIV2SL(startSymbolAndLength, &startSymbolIndex, &nrOfSymbols);
|
||||
|
||||
// Calculate number of PRB_DMRS
|
||||
uint8_t N_PRB_DMRS = gNB_mac->sched_ctrlCommon->numDmrsCdmGrpsNoData * 6;
|
||||
uint16_t dlDmrsSymbPos = fill_dmrs_mask(gNB_mac->sched_ctrlCommon->active_bwp->bwp_Dedicated->pdsch_Config->choice.setup, gNB_mac->common_channels->ServingCellConfigCommon->dmrs_TypeA_Position, startSymbolIndex+nrOfSymbols);
|
||||
uint16_t dmrs_length = get_num_dmrs(dlDmrsSymbPos);
|
||||
|
||||
const uint32_t TBS = nr_compute_tbs(nr_get_Qm_dl(gNB_mac->sched_ctrlCommon->mcs, gNB_mac->sched_ctrlCommon->mcsTableIdx),
|
||||
nr_get_code_rate_dl(gNB_mac->sched_ctrlCommon->mcs, gNB_mac->sched_ctrlCommon->mcsTableIdx),
|
||||
gNB_mac->sched_ctrlCommon->rbSize, nrOfSymbols, N_PRB_DMRS * dmrs_length,0 ,0 ,1 ) >> 3;
|
||||
|
||||
nfapi_nr_dl_tti_request_body_t *dl_req = &gNB_mac->DL_req[CC_id].dl_tti_request_body;
|
||||
nr_fill_nfapi_dl_sib1_pdu(module_idP, dl_req, TBS, startSymbolIndex, nrOfSymbols);
|
||||
|
||||
const int ntx_req = gNB_mac->TX_req[CC_id].Number_of_PDUs;
|
||||
nfapi_nr_pdu_t *tx_req = &gNB_mac->TX_req[CC_id].pdu_list[ntx_req];
|
||||
|
||||
// Data to be transmitted
|
||||
bzero(tx_req->TLVs[0].value.direct,MAX_NR_DLSCH_PAYLOAD_BYTES);
|
||||
memcpy(tx_req->TLVs[0].value.direct, sib1_payload, sib1_sdu_length);
|
||||
|
||||
tx_req->PDU_length = TBS;
|
||||
tx_req->PDU_index = gNB_mac->pdu_index[0]++;
|
||||
tx_req->num_TLV = 1;
|
||||
tx_req->TLVs[0].length = TBS + 2;
|
||||
gNB_mac->TX_req[CC_id].Number_of_PDUs++;
|
||||
gNB_mac->TX_req[CC_id].SFN = frameP;
|
||||
gNB_mac->TX_req[CC_id].Slot = slotP;
|
||||
}
|
||||
}
|
||||
@@ -424,8 +424,7 @@ void nr_simple_dlsch_preprocessor(module_id_t module_id,
|
||||
find_aggregation_candidates(&sched_ctrl->aggregation_level,
|
||||
&nr_of_candidates,
|
||||
sched_ctrl->search_space);
|
||||
sched_ctrl->coreset = get_coreset(
|
||||
sched_ctrl->active_bwp, sched_ctrl->search_space, 1 /* dedicated */);
|
||||
sched_ctrl->coreset = get_coreset(sched_ctrl->active_bwp, sched_ctrl->search_space, 1 /*dedicated*/);
|
||||
int cid = sched_ctrl->coreset->controlResourceSetId;
|
||||
const uint16_t Y = UE_info->Y[UE_id][cid][slot];
|
||||
const int m = UE_info->num_pdcch_cand[UE_id][cid];
|
||||
|
||||
@@ -395,8 +395,12 @@ void nr_ul_preprocessor_phytest(module_id_t module_id,
|
||||
if (!(is_xlsch_in_slot(ulsch_in_slot_bitmap, sched_slot) && sched_slot == 8))
|
||||
return;
|
||||
|
||||
const uint16_t rbStart = 0;
|
||||
const uint16_t rbSize = 50; /* due to OAI UE limitations */
|
||||
const int bw = NRRIV2BW(sched_ctrl->active_ubwp->bwp_Common->genericParameters.locationAndBandwidth, 275);
|
||||
uint16_t rbStart = 0;
|
||||
uint16_t rbSize = 50; /* due to OAI UE limitations */
|
||||
if (rbSize>bw)
|
||||
rbSize = bw;
|
||||
|
||||
uint16_t *vrb_map_UL =
|
||||
&RC.nrmac[module_id]->common_channels[CC_id].vrb_map_UL[sched_slot * 275];
|
||||
for (int i = rbStart; i < rbStart + rbSize; ++i) {
|
||||
|
||||
@@ -176,7 +176,13 @@ int allocate_nr_CCEs(gNB_MAC_INST *nr_mac,
|
||||
// NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon;
|
||||
|
||||
int coreset_id = coreset->controlResourceSetId;
|
||||
int *cce_list = nr_mac->cce_list[bwp->bwp_Id][coreset_id];
|
||||
|
||||
int *cce_list;
|
||||
if(bwp->bwp_Id == 0) {
|
||||
cce_list = nr_mac->cce_list[1][0];
|
||||
} else {
|
||||
cce_list = nr_mac->cce_list[bwp->bwp_Id][coreset_id];
|
||||
}
|
||||
|
||||
int n_rb=0;
|
||||
for (int i=0;i<6;i++)
|
||||
@@ -191,12 +197,9 @@ int allocate_nr_CCEs(gNB_MAC_INST *nr_mac,
|
||||
const uint16_t N_cce = N_reg / NR_NB_REG_PER_CCE;
|
||||
const uint16_t M_s_max = nr_of_candidates;
|
||||
|
||||
AssertFatal(m < nr_of_candidates,
|
||||
"PDCCH candidate index %d in CORESET %d exceeds the maximum "
|
||||
"number of PDCCH candidates (%d)\n",
|
||||
m,
|
||||
coreset_id,
|
||||
nr_of_candidates);
|
||||
//PDCCH candidate index m in CORESET exceeds the maximum number of PDCCH candidates
|
||||
if(m >= nr_of_candidates)
|
||||
return -1;
|
||||
|
||||
int first_cce = aggregation * (( Y + CEILIDIV((m*N_cce),(aggregation*M_s_max)) + n_CI ) % CEILIDIV(N_cce,aggregation));
|
||||
|
||||
@@ -833,8 +836,12 @@ void nr_configure_pdcch(gNB_MAC_INST *nr_mac,
|
||||
pdcch_pdu->ShiftIndex = 0;
|
||||
}
|
||||
|
||||
pdcch_pdu->CoreSetType = 1;
|
||||
|
||||
if(coreset->controlResourceSetId == 0) {
|
||||
pdcch_pdu->CoreSetType = NFAPI_NR_CSET_CONFIG_MIB_SIB1;
|
||||
} else{
|
||||
pdcch_pdu->CoreSetType = NFAPI_NR_CSET_CONFIG_PDCCH_CONFIG;
|
||||
}
|
||||
|
||||
//precoderGranularity
|
||||
pdcch_pdu->precoderGranularity = coreset->precoderGranularity;
|
||||
|
||||
@@ -1329,22 +1336,42 @@ void fill_dci_pdu_rel15(NR_ServingCellConfigCommon_t *scc,
|
||||
break;
|
||||
|
||||
case NR_RNTI_SI:
|
||||
// Freq domain assignment 0-16 bit
|
||||
fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) );
|
||||
for (int i=0; i<fsize; i++)
|
||||
*dci_pdu |= ((dci_pdu_rel15->frequency_domain_assignment.val>>(fsize-i-1))&1)<<(dci_size-pos++);
|
||||
// Time domain assignment 4 bit
|
||||
for (int i=0; i<4; i++)
|
||||
*dci_pdu |= (((uint64_t)dci_pdu_rel15->time_domain_assignment.val>>(3-i))&1)<<(dci_size-pos++);
|
||||
// VRB to PRB mapping 1 bit
|
||||
*dci_pdu |= ((uint64_t)dci_pdu_rel15->vrb_to_prb_mapping.val&1)<<(dci_size-pos++);
|
||||
// MCS 5bit //bit over 32, so dci_pdu ++
|
||||
for (int i=0; i<5; i++)
|
||||
*dci_pdu |= (((uint64_t)dci_pdu_rel15->mcs>>(4-i))&1)<<(dci_size-pos++);
|
||||
// Redundancy version 2bit
|
||||
for (int i=0; i<2; i++)
|
||||
*dci_pdu |= (((uint64_t)dci_pdu_rel15->rv>>(1-i))&1)<<(dci_size-pos++);
|
||||
|
||||
pos=1;
|
||||
|
||||
// Freq domain assignment 0-16 bit
|
||||
fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) );
|
||||
for (int i=0; i<fsize; i++)
|
||||
*dci_pdu |= (((uint64_t)dci_pdu_rel15->frequency_domain_assignment.val>>(fsize-1-i))&1)<<(dci_size-pos++);
|
||||
|
||||
// Time domain assignment 4 bit
|
||||
for (int i=0; i<4; i++)
|
||||
*dci_pdu |= (((uint64_t)dci_pdu_rel15->time_domain_assignment.val>>(3-i))&1)<<(dci_size-pos++);
|
||||
|
||||
// VRB to PRB mapping 1 bit
|
||||
*dci_pdu |= ((uint64_t)dci_pdu_rel15->vrb_to_prb_mapping.val&1)<<(dci_size-pos++);
|
||||
|
||||
// MCS 5bit //bit over 32, so dci_pdu ++
|
||||
for (int i=0; i<5; i++)
|
||||
*dci_pdu |= (((uint64_t)dci_pdu_rel15->mcs>>(4-i))&1)<<(dci_size-pos++);
|
||||
|
||||
// Redundancy version 2 bit
|
||||
for (int i=0; i<2; i++)
|
||||
*dci_pdu |= (((uint64_t)dci_pdu_rel15->rv>>(1-i))&1)<<(dci_size-pos++);
|
||||
|
||||
// System information indicator 1bit
|
||||
*dci_pdu |= ((uint64_t)dci_pdu_rel15->system_info_indicator&1)<<(dci_size-pos++);
|
||||
|
||||
// reserved 15 bits
|
||||
|
||||
LOG_D(PHY,"dci_size = %i\n", dci_size);
|
||||
LOG_D(PHY,"fsize = %i\n", fsize);
|
||||
LOG_D(PHY,"dci_pdu_rel15->frequency_domain_assignment.val = %i\n", dci_pdu_rel15->frequency_domain_assignment.val);
|
||||
LOG_D(PHY,"dci_pdu_rel15->time_domain_assignment.val = %i\n", dci_pdu_rel15->time_domain_assignment.val);
|
||||
LOG_D(PHY,"dci_pdu_rel15->vrb_to_prb_mapping.val = %i\n", dci_pdu_rel15->vrb_to_prb_mapping.val);
|
||||
LOG_D(PHY,"dci_pdu_rel15->mcs = %i\n", dci_pdu_rel15->mcs);
|
||||
LOG_D(PHY,"dci_pdu_rel15->rv = %i\n", dci_pdu_rel15->rv);
|
||||
LOG_D(PHY,"dci_pdu_rel15->system_info_indicator = %i\n", dci_pdu_rel15->system_info_indicator);
|
||||
|
||||
break;
|
||||
|
||||
case NR_RNTI_TC:
|
||||
@@ -1994,32 +2021,6 @@ void get_pdsch_to_harq_feedback(int Mod_idP,
|
||||
}
|
||||
|
||||
|
||||
void find_aggregation_candidates(uint8_t *aggregation_level,
|
||||
uint8_t *nr_of_candidates,
|
||||
NR_SearchSpace_t *ss) {
|
||||
|
||||
if (ss->nrofCandidates->aggregationLevel1 != NR_SearchSpace__nrofCandidates__aggregationLevel1_n0) {
|
||||
*aggregation_level = 1;
|
||||
*nr_of_candidates = ss->nrofCandidates->aggregationLevel1;
|
||||
}
|
||||
if (ss->nrofCandidates->aggregationLevel2 != NR_SearchSpace__nrofCandidates__aggregationLevel2_n0) {
|
||||
*aggregation_level = 2;
|
||||
*nr_of_candidates = ss->nrofCandidates->aggregationLevel2;
|
||||
}
|
||||
if (ss->nrofCandidates->aggregationLevel4 != NR_SearchSpace__nrofCandidates__aggregationLevel4_n0) {
|
||||
*aggregation_level = 4;
|
||||
*nr_of_candidates = ss->nrofCandidates->aggregationLevel4;
|
||||
}
|
||||
if (ss->nrofCandidates->aggregationLevel8 != NR_SearchSpace__nrofCandidates__aggregationLevel8_n0) {
|
||||
*aggregation_level = 8;
|
||||
*nr_of_candidates = ss->nrofCandidates->aggregationLevel8;
|
||||
}
|
||||
if (ss->nrofCandidates->aggregationLevel16 != NR_SearchSpace__nrofCandidates__aggregationLevel16_n0) {
|
||||
*aggregation_level = 16;
|
||||
*nr_of_candidates = ss->nrofCandidates->aggregationLevel16;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/*void fill_nfapi_coresets_and_searchspaces(NR_CellGroupConfig_t *cg,
|
||||
nfapi_nr_coreset_t *coreset,
|
||||
|
||||
@@ -80,6 +80,15 @@ void nr_schedule_ue_spec(module_id_t module_id,
|
||||
sub_frame_t slot,
|
||||
int num_slots_per_tdd);
|
||||
|
||||
void schedule_control_sib1(module_id_t module_id,
|
||||
int CC_id,
|
||||
int time_domain_allocation,
|
||||
uint8_t mcsTableIdx,
|
||||
uint8_t mcs,
|
||||
int num_total_bytes);
|
||||
|
||||
void schedule_nr_sib1(module_id_t module_idP, frame_t frameP, sub_frame_t subframeP);
|
||||
|
||||
/* \brief default preprocessor */
|
||||
void nr_simple_dlsch_preprocessor(module_id_t module_id,
|
||||
frame_t frame,
|
||||
@@ -296,9 +305,6 @@ NR_SearchSpace_t *get_searchspace(
|
||||
NR_BWP_Downlink_t *bwp,
|
||||
NR_SearchSpace__searchSpaceType_PR target_ss);
|
||||
|
||||
void find_aggregation_candidates(uint8_t *aggregation_level,
|
||||
uint8_t *nr_of_candidates,
|
||||
NR_SearchSpace_t *ss);
|
||||
|
||||
long get_K2(NR_BWP_Uplink_t *ubwp, int time_domain_assignment, int mu);
|
||||
|
||||
|
||||
@@ -62,6 +62,8 @@
|
||||
#include "NR_PHY_INTERFACE/NR_IF_Module.h"
|
||||
|
||||
/* MAC */
|
||||
#include "LAYER2/MAC/mac.h"
|
||||
#include "LAYER2/MAC/mac_proto.h"
|
||||
#include "LAYER2/NR_MAC_COMMON/nr_mac_extern.h"
|
||||
#include "LAYER2/NR_MAC_COMMON/nr_mac_common.h"
|
||||
#include "NR_TAG.h"
|
||||
@@ -552,6 +554,11 @@ typedef struct gNB_MAC_INST_s {
|
||||
nr_pp_impl_dl pre_processor_dl;
|
||||
/// UL preprocessor for differentiated scheduling
|
||||
nr_pp_impl_ul pre_processor_ul;
|
||||
|
||||
NR_UE_sched_ctrl_t *sched_ctrlCommon;
|
||||
NR_CellGroupConfig_t *secondaryCellGroupCommon;
|
||||
NR_Type0_PDCCH_CSS_config_t type0_PDCCH_CSS_config;
|
||||
|
||||
} gNB_MAC_INST;
|
||||
|
||||
#endif /*__LAYER2_NR_MAC_GNB_H__ */
|
||||
|
||||
@@ -13,6 +13,3 @@ RLC AM
|
||||
- 36.322 5.1.3.2.3 Actions when a RLC data PDU is placed in the reception
|
||||
buffer
|
||||
[...] and in-sequence byte segments of the AMD PDU with SN = VR(R) [...]
|
||||
|
||||
- use SOstart/SOend in NACK reporting, do not NACK full PDU if
|
||||
parts of it have been received
|
||||
|
||||
@@ -898,6 +898,64 @@ static tx_pdu_size_t compute_new_pdu_size(rlc_entity_am_t *entity, int maxsize)
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* return number of missing parts of a sn
|
||||
* if everything is missing (nothing received), return 0
|
||||
*/
|
||||
static int count_nack_missing_parts(rlc_entity_am_t *entity, int sn)
|
||||
{
|
||||
rlc_rx_pdu_segment_t *l = entity->rx_list;
|
||||
int last_byte;
|
||||
int new_last_byte;
|
||||
int count;
|
||||
|
||||
while (l != NULL) {
|
||||
if (l->sn == sn)
|
||||
break;
|
||||
l = l->next;
|
||||
}
|
||||
/* nothing received, everything is missing, return 0 */
|
||||
if (l == NULL)
|
||||
return 0;
|
||||
|
||||
last_byte = -1;
|
||||
count = 0;
|
||||
while (l != NULL && l->sn == sn) {
|
||||
if (l->so > last_byte + 1)
|
||||
/* missing part detected */
|
||||
count++;
|
||||
if (l->is_last)
|
||||
/* end of PDU reached - no more missing part to add */
|
||||
return count;
|
||||
new_last_byte = l->so + l->size - l->data_offset - 1;
|
||||
if (new_last_byte > last_byte)
|
||||
last_byte = new_last_byte;
|
||||
l = l->next;
|
||||
}
|
||||
/* at this point: end of PDU not received, one more missing part */
|
||||
count++;
|
||||
|
||||
return count;
|
||||
}
|
||||
|
||||
/* return size of nack reporting for sn, in bits */
|
||||
static int segment_nack_size(rlc_entity_am_t *entity, int sn)
|
||||
{
|
||||
/* nack + e1 + e2 = 12 bits
|
||||
* SOstart + SOend = 30 bits
|
||||
*/
|
||||
int count;
|
||||
|
||||
count = count_nack_missing_parts(entity, sn);
|
||||
|
||||
/* count_nack_missing_parts returns 0 when everything is missing
|
||||
* in which case we don't have SOstart/SOend, so only 12 bits
|
||||
*/
|
||||
if (count == 0)
|
||||
return 12;
|
||||
|
||||
return count * (12 + 30);
|
||||
}
|
||||
|
||||
static int status_size(rlc_entity_am_t *entity, int maxsize)
|
||||
{
|
||||
/* let's count bits */
|
||||
@@ -912,11 +970,16 @@ static int status_size(rlc_entity_am_t *entity, int maxsize)
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* each NACK adds 12 bits */
|
||||
/* add size of NACKs */
|
||||
sn = entity->vr_r;
|
||||
while (bits + 12 <= maxsize && sn_compare_rx(entity, sn, entity->vr_ms) < 0) {
|
||||
if (!(rlc_am_segment_full(entity, sn)))
|
||||
bits += 12;
|
||||
while (sn_compare_rx(entity, sn, entity->vr_ms) < 0) {
|
||||
if (!(rlc_am_segment_full(entity, sn))) {
|
||||
int nack_size = segment_nack_size(entity, sn);
|
||||
/* stop there if not enough room */
|
||||
if (bits + nack_size > maxsize)
|
||||
break;
|
||||
bits += nack_size;
|
||||
}
|
||||
sn = (sn + 1) % 1024;
|
||||
}
|
||||
|
||||
@@ -929,7 +992,8 @@ static int generate_status(rlc_entity_am_t *entity, char *buffer, int size)
|
||||
int bits = 15; /* minimum size is 15 (header+ack_sn+e1) */
|
||||
int sn;
|
||||
rlc_pdu_encoder_t encoder;
|
||||
int has_nack = 0;
|
||||
rlc_pdu_encoder_t encoder_ack;
|
||||
rlc_pdu_encoder_t previous_e1;
|
||||
int ack;
|
||||
|
||||
rlc_pdu_encoder_init(&encoder, buffer, size);
|
||||
@@ -947,24 +1011,68 @@ static int generate_status(rlc_entity_am_t *entity, char *buffer, int size)
|
||||
rlc_pdu_encoder_put_bits(&encoder, 0, 3); /* CPT */
|
||||
|
||||
/* reserve room for ACK (it will be set after putting the NACKs) */
|
||||
encoder_ack = encoder;
|
||||
rlc_pdu_encoder_put_bits(&encoder, 0, 10);
|
||||
/* put 0 for e1, will be set to 1 later in the code if needed */
|
||||
previous_e1 = encoder;
|
||||
rlc_pdu_encoder_put_bits(&encoder, 0, 1);
|
||||
|
||||
/* at this point, ACK is VR(R) */
|
||||
ack = entity->vr_r;
|
||||
|
||||
/* each NACK adds 12 bits */
|
||||
sn = entity->vr_r;
|
||||
while (bits + 12 <= size && sn_compare_rx(entity, sn, entity->vr_ms) < 0) {
|
||||
while (sn_compare_rx(entity, sn, entity->vr_ms) < 0) {
|
||||
if (!(rlc_am_segment_full(entity, sn))) {
|
||||
/* put previous e1 (is 1) */
|
||||
rlc_pdu_encoder_put_bits(&encoder, 1, 1);
|
||||
/* if previous was NACK, put previous e2 (0, we don't do 'so' thing) */
|
||||
if (has_nack)
|
||||
rlc_pdu_encoder_put_bits(&encoder, 0, 1);
|
||||
/* put NACKed sn */
|
||||
rlc_pdu_encoder_put_bits(&encoder, sn, 10);
|
||||
has_nack = 1;
|
||||
bits += 12;
|
||||
rlc_rx_pdu_segment_t *l;
|
||||
int i;
|
||||
int count = count_nack_missing_parts(entity, sn);
|
||||
int nack_bits = count == 0 ? 12 : count * (12 + 30);
|
||||
int last_byte;
|
||||
int new_last_byte;
|
||||
int so_start;
|
||||
int so_end;
|
||||
/* if not enough room, stop putting NACKs */
|
||||
if (bits + nack_bits > size)
|
||||
break;
|
||||
/* set previous e1 to 1 */
|
||||
rlc_pdu_encoder_put_bits(&previous_e1, 1, 1);
|
||||
|
||||
if (count == 0) {
|
||||
/* simply NACK, no SOstart/SOend */
|
||||
rlc_pdu_encoder_put_bits(&encoder, sn, 10); /* nack */
|
||||
previous_e1 = encoder;
|
||||
rlc_pdu_encoder_put_bits(&encoder, 0, 2); /* e1, e2 */
|
||||
} else {
|
||||
/* count is not 0, so we have 'count' NACK+e1+e2+SOstart+SOend */
|
||||
l = entity->rx_list;
|
||||
last_byte = -1;
|
||||
while (l->sn != sn) l = l->next;
|
||||
for (i = 0; i < count; i++) {
|
||||
rlc_pdu_encoder_put_bits(&encoder, sn, 10); /* nack */
|
||||
previous_e1 = encoder;
|
||||
/* all NACKs but the last have a following NACK, set e1 for them */
|
||||
rlc_pdu_encoder_put_bits(&encoder, i != count - 1, 1); /* e1 */
|
||||
rlc_pdu_encoder_put_bits(&encoder, 1, 1); /* e2 */
|
||||
/* look for the next segment with missing data before it */
|
||||
while (l != NULL && l->sn == sn && !(l->so > last_byte + 1)) {
|
||||
new_last_byte = l->so + l->size - l->data_offset - 1;
|
||||
if (new_last_byte > last_byte)
|
||||
last_byte = new_last_byte;
|
||||
l = l->next;
|
||||
}
|
||||
so_start = last_byte + 1;
|
||||
if (l == NULL)
|
||||
so_end = 0x7fff;
|
||||
else
|
||||
so_end = l->so - 1;
|
||||
rlc_pdu_encoder_put_bits(&encoder, so_start, 15);
|
||||
rlc_pdu_encoder_put_bits(&encoder, so_end, 15);
|
||||
if (l != NULL)
|
||||
last_byte = l->so + l->size - l->data_offset - 1;
|
||||
}
|
||||
}
|
||||
|
||||
bits += nack_bits;
|
||||
} else {
|
||||
/* this sn is full and we put all NACKs before it, use it for ACK */
|
||||
ack = (sn + 1) % 1024;
|
||||
@@ -972,24 +1080,10 @@ static int generate_status(rlc_entity_am_t *entity, char *buffer, int size)
|
||||
sn = (sn + 1) % 1024;
|
||||
}
|
||||
|
||||
/* go to highest full sn+1 for ACK, VR(MS) is the limit */
|
||||
while (sn_compare_rx(entity, sn, entity->vr_ms) < 0 &&
|
||||
rlc_am_segment_full(entity, sn)) {
|
||||
ack = (sn + 1) % 1024;
|
||||
sn = (sn + 1) % 1024;
|
||||
}
|
||||
|
||||
/* at this point, if last put was NACK then put 2 bits else put 1 bit */
|
||||
if (has_nack)
|
||||
rlc_pdu_encoder_put_bits(&encoder, 0, 2);
|
||||
else
|
||||
rlc_pdu_encoder_put_bits(&encoder, 0, 1);
|
||||
|
||||
rlc_pdu_encoder_align(&encoder);
|
||||
|
||||
/* let's put the ACK */
|
||||
buffer[0] |= ack >> 6;
|
||||
buffer[1] |= (ack & 0x3f) << 2;
|
||||
rlc_pdu_encoder_put_bits(&encoder_ack, ack, 10);
|
||||
|
||||
/* reset the trigger */
|
||||
entity->status_triggered = 0;
|
||||
|
||||
@@ -233,9 +233,10 @@ static void put_bit(rlc_pdu_encoder_t *encoder, int bit)
|
||||
exit(1);
|
||||
}
|
||||
|
||||
encoder->buffer[encoder->byte] <<= 1;
|
||||
if (bit)
|
||||
encoder->buffer[encoder->byte] |= 1;
|
||||
encoder->buffer[encoder->byte] |= 1 << (7 - encoder->bit);
|
||||
else
|
||||
encoder->buffer[encoder->byte] &= ~(1 << (7 - encoder->bit));
|
||||
|
||||
encoder->bit++;
|
||||
if (encoder->bit == 8) {
|
||||
|
||||
@@ -1,6 +1,6 @@
|
||||
#!/bin/sh
|
||||
|
||||
test_count=45
|
||||
test_count=49
|
||||
|
||||
for i in `seq $test_count`
|
||||
do
|
||||
|
||||
Binary file not shown.
Binary file not shown.
@@ -0,0 +1,49 @@
|
||||
/*
|
||||
* rlc am test ack/nack reporting with segmented SDUs
|
||||
* eNB sends SDU in big PDU, not received
|
||||
* eNB retx with smaller PDUs, not received except a few
|
||||
* after some time, RX works again, UE should NACK with SOstart/SOend
|
||||
*
|
||||
* this test was written because in the past we didn't generate NACKs with
|
||||
* SOstart/SOend, potentially leading to infinite retransmissions, even with
|
||||
* good radio conditions (well, there will be max ReTX reached at some point).
|
||||
* The scenario is as follows:
|
||||
* the eNB transmits many many PDUs segments and asks for status
|
||||
* report at some point (but before sending all the segments). The UE then
|
||||
* generates a (wrong) NACK without SOstart/SOend, and then the eNB has to
|
||||
* resend everything from start (all bytes of the PDU have been NACKed because
|
||||
* there is no SOstart/SOend). Then the eNB will again ask for status report
|
||||
* before sending everything and the process repeats all over again.
|
||||
*/
|
||||
TIME, 1,
|
||||
ENB_AM, 100000, 100000, 35, 0, 45, -1, -1, 4,
|
||||
UE_AM, 100000, 100000, 35, 0, 45, -1, -1, 4,
|
||||
UE_RECV_FAILS, 1,
|
||||
ENB_RECV_FAILS, 1,
|
||||
ENB_SDU, 0, 300,
|
||||
ENB_PDU_SIZE, 500,
|
||||
UE_PDU_SIZE, 1000,
|
||||
TIME, 2,
|
||||
ENB_PDU_SIZE, 7,
|
||||
TIME, 50,
|
||||
UE_RECV_FAILS, 0,
|
||||
TIME, 51,
|
||||
UE_RECV_FAILS, 1,
|
||||
TIME, 60,
|
||||
UE_RECV_FAILS, 0,
|
||||
TIME, 61,
|
||||
UE_RECV_FAILS, 1,
|
||||
TIME, 70,
|
||||
UE_RECV_FAILS, 0,
|
||||
TIME, 71,
|
||||
UE_RECV_FAILS, 1,
|
||||
TIME, 80,
|
||||
UE_RECV_FAILS, 0,
|
||||
TIME, 81,
|
||||
UE_RECV_FAILS, 1,
|
||||
TIME, 140,
|
||||
UE_RECV_FAILS, 0,
|
||||
ENB_RECV_FAILS, 0,
|
||||
TIME, 150,
|
||||
ENB_PDU_SIZE, 200,
|
||||
TIME, -1
|
||||
Binary file not shown.
@@ -0,0 +1,27 @@
|
||||
/*
|
||||
* am: test function segment_nack_size, case "if (count == 0) return 12;"
|
||||
* The eNB sends 5 PDUs, only first and last received by the UE. Then we
|
||||
* ask for the UE's buffer status to trigger the case.
|
||||
*/
|
||||
TIME, 1,
|
||||
ENB_AM, 100000, 100000, 35, 0, 45, -1, -1, 4,
|
||||
UE_AM, 100000, 100000, 35, 0, 45, -1, -1, 4,
|
||||
ENB_RECV_FAILS, 1,
|
||||
ENB_PDU_SIZE, 100,
|
||||
UE_PDU_SIZE, 100,
|
||||
TIME, 2,
|
||||
ENB_SDU, 0, 10,
|
||||
TIME, 3,
|
||||
UE_RECV_FAILS, 1,
|
||||
ENB_SDU, 1, 10,
|
||||
TIME, 4,
|
||||
ENB_SDU, 2, 10,
|
||||
TIME, 5,
|
||||
ENB_SDU, 3, 10,
|
||||
TIME, 6,
|
||||
UE_RECV_FAILS, 0,
|
||||
ENB_RECV_FAILS, 0,
|
||||
ENB_SDU, 4, 10,
|
||||
TIME, 42,
|
||||
UE_BUFFER_STATUS,
|
||||
TIME, -1
|
||||
Binary file not shown.
@@ -0,0 +1,29 @@
|
||||
/*
|
||||
* am: test case "if (bits + nack_size > maxsize)" in functions status_size
|
||||
* and generate_status.
|
||||
* The eNB sends 5 PDUs, only first and last received by the UE. Then we
|
||||
* ask for the UE's buffer status to trigger the case. UE PDU size is
|
||||
* limited to 6 to trigger the case.
|
||||
*/
|
||||
TIME, 1,
|
||||
ENB_AM, 100000, 100000, 35, 0, 45, -1, -1, 4,
|
||||
UE_AM, 100000, 100000, 35, 0, 45, -1, -1, 4,
|
||||
ENB_RECV_FAILS, 1,
|
||||
ENB_PDU_SIZE, 100,
|
||||
UE_PDU_SIZE, 6,
|
||||
TIME, 2,
|
||||
ENB_SDU, 0, 10,
|
||||
TIME, 3,
|
||||
UE_RECV_FAILS, 1,
|
||||
ENB_SDU, 1, 10,
|
||||
TIME, 4,
|
||||
ENB_SDU, 2, 10,
|
||||
TIME, 5,
|
||||
ENB_SDU, 3, 10,
|
||||
TIME, 6,
|
||||
UE_RECV_FAILS, 0,
|
||||
ENB_RECV_FAILS, 0,
|
||||
ENB_SDU, 4, 10,
|
||||
TIME, 42,
|
||||
UE_BUFFER_STATUS,
|
||||
TIME, -1
|
||||
Binary file not shown.
@@ -0,0 +1,27 @@
|
||||
/*
|
||||
* rlc am test ack/nack reporting with segmented SDUs
|
||||
*
|
||||
* 5 SDUs put into 6 PDUs, all PDUs received expect the 3rd. Then
|
||||
* retransmission happens with smaller PDU size.
|
||||
*/
|
||||
TIME, 1,
|
||||
ENB_AM, 100000, 100000, 35, 0, 45, -1, -1, 4,
|
||||
UE_AM, 100000, 100000, 35, 0, 45, -1, -1, 4,
|
||||
ENB_SDU, 0, 60,
|
||||
ENB_SDU, 1, 160,
|
||||
ENB_SDU, 2, 130,
|
||||
ENB_SDU, 3, 120,
|
||||
ENB_SDU, 4, 100,
|
||||
ENB_PDU_SIZE, 100,
|
||||
UE_PDU_SIZE, 1000,
|
||||
TIME, 3,
|
||||
UE_RECV_FAILS, 1,
|
||||
TIME, 4,
|
||||
UE_RECV_FAILS, 0,
|
||||
TIME, 7,
|
||||
ENB_PDU_SIZE, 40,
|
||||
TIME, 42,
|
||||
UE_RECV_FAILS, 1,
|
||||
TIME, 80,
|
||||
UE_RECV_FAILS, 0,
|
||||
TIME, -1
|
||||
Binary file not shown.
@@ -5,9 +5,6 @@
|
||||
* [1..600] is received but ACK/NACK not
|
||||
* eNB retx with still smaller PDUs [1..400] [401..600] [601..900]
|
||||
* all is received, ACKs/NACKs go through
|
||||
*
|
||||
* this test will fail if NACK mechanism uses SOstart/SOend
|
||||
* (not implemented for the moment)
|
||||
*/
|
||||
TIME, 1,
|
||||
ENB_AM, 100000, 100000, 35, 0, 45, -1, -1, 4,
|
||||
|
||||
Binary file not shown.
@@ -6,9 +6,6 @@
|
||||
* eNB retx with still smaller PDUs [1..400] [401..600] [601..900]
|
||||
* [401..600] received, ACK goes through
|
||||
* link clean, all goes through
|
||||
*
|
||||
* this test will fail if NACK mechanism uses SOstart/SOend
|
||||
* (not implemented for the moment)
|
||||
*/
|
||||
TIME, 1,
|
||||
ENB_AM, 100000, 100000, 35, 0, 45, -1, -1, 4,
|
||||
|
||||
Binary file not shown.
@@ -11,9 +11,6 @@
|
||||
* In the current RLC implementation, this is impossible. If we send [12..21]
|
||||
* it means [1..21] has been split and so we won't sent it later on.
|
||||
* Maybe with HARQ retransmissions in PHY/MAC in bad radio conditions?
|
||||
*
|
||||
* this test will fail if NACK mechanism uses SOstart/SOend
|
||||
* (not implemented for the moment)
|
||||
*/
|
||||
TIME, 1,
|
||||
ENB_AM, 100000, 100000, 35, 0, 45, -1, -1, 4,
|
||||
|
||||
Binary file not shown.
@@ -60,9 +60,9 @@ int handle_bcch_bch(module_id_t module_id, int cc_id, unsigned int gNB_index, ui
|
||||
|
||||
// L2 Abstraction Layer
|
||||
int handle_bcch_dlsch(module_id_t module_id, int cc_id, unsigned int gNB_index, uint32_t sibs_mask, uint8_t *pduP, uint32_t pdu_len){
|
||||
|
||||
return 0;
|
||||
return nr_ue_decode_sib1(module_id, cc_id, gNB_index, sibs_mask, pduP, pdu_len);
|
||||
}
|
||||
|
||||
// L2 Abstraction Layer
|
||||
int handle_dci(module_id_t module_id, int cc_id, unsigned int gNB_index, frame_t frame, int slot, fapi_nr_dci_indication_pdu_t *dci){
|
||||
|
||||
|
||||
@@ -35,6 +35,8 @@
|
||||
#include "pdcp.h"
|
||||
#include "msc.h"
|
||||
#include "common/ran_context.h"
|
||||
#include "LAYER2/NR_MAC_COMMON/nr_mac_common.h"
|
||||
#include "LAYER2/NR_MAC_COMMON/nr_mac_extern.h"
|
||||
|
||||
#include "intertask_interface.h"
|
||||
|
||||
@@ -43,6 +45,103 @@
|
||||
|
||||
extern RAN_CONTEXT_t RC;
|
||||
|
||||
int generate_pdcch_ConfigSIB1(NR_PDCCH_ConfigSIB1_t *pdcch_ConfigSIB1,
|
||||
long ssbSubcarrierSpacing,
|
||||
long subCarrierSpacingCommon,
|
||||
channel_bandwidth_t min_channel_bw) {
|
||||
|
||||
nr_ssb_and_cset_mux_pattern_type_t mux_pattern = 0;
|
||||
|
||||
switch (ssbSubcarrierSpacing) {
|
||||
|
||||
case NR_SubcarrierSpacing_kHz15:
|
||||
if (subCarrierSpacingCommon == NR_SubcarrierSpacing_kHz15) {
|
||||
pdcch_ConfigSIB1->controlResourceSetZero = rand() % TABLE_38213_13_1_NUM_INDEXES;
|
||||
mux_pattern = table_38213_13_1_c1[pdcch_ConfigSIB1->controlResourceSetZero];
|
||||
} else if (subCarrierSpacingCommon == NR_SubcarrierSpacing_kHz30) {
|
||||
pdcch_ConfigSIB1->controlResourceSetZero = rand() % TABLE_38213_13_2_NUM_INDEXES;
|
||||
mux_pattern = table_38213_13_2_c1[pdcch_ConfigSIB1->controlResourceSetZero];
|
||||
} else {
|
||||
AssertFatal(true,"Invalid subCarrierSpacingCommon\n");
|
||||
}
|
||||
break;
|
||||
|
||||
case NR_SubcarrierSpacing_kHz30:
|
||||
if (subCarrierSpacingCommon == NR_SubcarrierSpacing_kHz15) {
|
||||
|
||||
if ( (min_channel_bw == bw_5MHz) || (min_channel_bw == bw_10MHz) ) {
|
||||
pdcch_ConfigSIB1->controlResourceSetZero = rand() % TABLE_38213_13_3_NUM_INDEXES;
|
||||
mux_pattern = table_38213_13_3_c1[pdcch_ConfigSIB1->controlResourceSetZero];
|
||||
} else if (min_channel_bw == bw_40MHz) {
|
||||
pdcch_ConfigSIB1->controlResourceSetZero = rand() % TABLE_38213_13_5_NUM_INDEXES;
|
||||
mux_pattern = table_38213_13_5_c1[pdcch_ConfigSIB1->controlResourceSetZero];
|
||||
} else {
|
||||
AssertFatal(true,"Invalid min_bandwidth\n");
|
||||
}
|
||||
|
||||
} else if (subCarrierSpacingCommon == NR_SubcarrierSpacing_kHz30) {
|
||||
|
||||
if ( (min_channel_bw == bw_5MHz) || (min_channel_bw == bw_10MHz) ) {
|
||||
pdcch_ConfigSIB1->controlResourceSetZero = rand() % TABLE_38213_13_4_NUM_INDEXES;
|
||||
mux_pattern = table_38213_13_4_c1[pdcch_ConfigSIB1->controlResourceSetZero];
|
||||
} else if (min_channel_bw == bw_40MHz) {
|
||||
pdcch_ConfigSIB1->controlResourceSetZero = rand() % TABLE_38213_13_6_NUM_INDEXES;
|
||||
mux_pattern = table_38213_13_6_c1[pdcch_ConfigSIB1->controlResourceSetZero];
|
||||
} else {
|
||||
AssertFatal(true,"Invalid min_bandwidth\n");
|
||||
}
|
||||
|
||||
} else {
|
||||
AssertFatal(true,"Invalid subCarrierSpacingCommon\n");
|
||||
}
|
||||
break;
|
||||
|
||||
case NR_SubcarrierSpacing_kHz120:
|
||||
if (subCarrierSpacingCommon == NR_SubcarrierSpacing_kHz60) {
|
||||
pdcch_ConfigSIB1->controlResourceSetZero = rand() % TABLE_38213_13_7_NUM_INDEXES;
|
||||
mux_pattern = table_38213_13_7_c1[pdcch_ConfigSIB1->controlResourceSetZero];
|
||||
} else if (subCarrierSpacingCommon == NR_SubcarrierSpacing_kHz120) {
|
||||
pdcch_ConfigSIB1->controlResourceSetZero = rand() % TABLE_38213_13_8_NUM_INDEXES;
|
||||
mux_pattern = table_38213_13_8_c1[pdcch_ConfigSIB1->controlResourceSetZero];
|
||||
} else {
|
||||
AssertFatal(true,"Invalid subCarrierSpacingCommon\n");
|
||||
}
|
||||
break;
|
||||
|
||||
case NR_SubcarrierSpacing_kHz240:
|
||||
if (subCarrierSpacingCommon == NR_SubcarrierSpacing_kHz60) {
|
||||
pdcch_ConfigSIB1->controlResourceSetZero = rand() % TABLE_38213_13_9_NUM_INDEXES;
|
||||
mux_pattern = table_38213_13_9_c1[pdcch_ConfigSIB1->controlResourceSetZero];
|
||||
} else if (subCarrierSpacingCommon == NR_SubcarrierSpacing_kHz120) {
|
||||
pdcch_ConfigSIB1->controlResourceSetZero = rand() % TABLE_38213_13_10_NUM_INDEXES;
|
||||
mux_pattern = table_38213_13_10_c1[pdcch_ConfigSIB1->controlResourceSetZero];
|
||||
} else {
|
||||
AssertFatal(true,"Invalid subCarrierSpacingCommon\n");
|
||||
}
|
||||
break;
|
||||
|
||||
default:
|
||||
AssertFatal(true,"Invalid ssbSubcarrierSpacing\n");
|
||||
break;
|
||||
}
|
||||
|
||||
|
||||
frequency_range_t frequency_range = FR1;
|
||||
if(ssbSubcarrierSpacing>=60) {
|
||||
frequency_range = FR2;
|
||||
}
|
||||
|
||||
pdcch_ConfigSIB1->searchSpaceZero = 0;
|
||||
if(mux_pattern == NR_SSB_AND_CSET_MUX_PATTERN_TYPE1 && frequency_range == FR1){
|
||||
pdcch_ConfigSIB1->searchSpaceZero = rand() % TABLE_38213_13_11_NUM_INDEXES;
|
||||
}
|
||||
if(mux_pattern == NR_SSB_AND_CSET_MUX_PATTERN_TYPE1 && frequency_range == FR2){
|
||||
pdcch_ConfigSIB1->searchSpaceZero = rand() % TABLE_38213_13_12_NUM_INDEXES;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int
|
||||
nr_rrc_mac_remove_ue(module_id_t mod_idP,
|
||||
rnti_t rntiP){
|
||||
@@ -129,41 +228,54 @@ int8_t mac_rrc_nr_data_req(const module_id_t Mod_idP,
|
||||
LOG_D(RRC,"[eNB %d] mac_rrc_data_req to SRB ID=%ld\n",Mod_idP,Srb_id);
|
||||
#endif
|
||||
|
||||
gNB_RRC_INST *rrc;
|
||||
rrc_gNB_carrier_data_t *carrier;
|
||||
NR_BCCH_BCH_Message_t *mib;
|
||||
NR_SRB_INFO * srb_info;
|
||||
char payload_size, *payload_pP;
|
||||
|
||||
rrc = RC.nrrrc[Mod_idP];
|
||||
carrier = &rrc->carrier;
|
||||
mib = &carrier->mib;
|
||||
srb_info = &carrier->Srb0;
|
||||
rrc_gNB_carrier_data_t *carrier;
|
||||
NR_BCCH_BCH_Message_t *mib;
|
||||
NR_SRB_INFO *srb_info;
|
||||
char payload_size, *payload_pP;
|
||||
|
||||
/* MIBCH */
|
||||
if( (Srb_id & RAB_OFFSET ) == MIBCH) {
|
||||
mib->message.choice.mib->systemFrameNumber.buf[0] = sfn_msb << 2;
|
||||
enc_rval = uper_encode_to_buffer(&asn_DEF_NR_BCCH_BCH_Message,
|
||||
NULL,
|
||||
(void *)mib,
|
||||
carrier->MIB,
|
||||
24);
|
||||
LOG_D(NR_RRC,"Encoded MIB for frame %d sfn_msb %d (%p), bits %lu\n",frameP,sfn_msb,carrier->MIB,enc_rval.encoded);
|
||||
buffer_pP[0]=carrier->MIB[0];
|
||||
buffer_pP[1]=carrier->MIB[1];
|
||||
buffer_pP[2]=carrier->MIB[2];
|
||||
LOG_D(NR_RRC,"MIB PDU buffer_pP[0]=%x , buffer_pP[1]=%x, buffer_pP[2]=%x\n",buffer_pP[0],buffer_pP[1],buffer_pP[2]);
|
||||
AssertFatal (enc_rval.encoded > 0, "ASN1 message encoding failed (%s, %lu)!\n",
|
||||
enc_rval.failed_type->name, enc_rval.encoded);
|
||||
return(3);
|
||||
}
|
||||
carrier = &RC.nrrrc[Mod_idP]->carrier;
|
||||
mib = &carrier->mib;
|
||||
srb_info = &carrier->Srb0;
|
||||
|
||||
/* MIBCH */
|
||||
if ((Srb_id & RAB_OFFSET) == MIBCH) {
|
||||
|
||||
// Currently we are getting the pdcch_ConfigSIB1 from the configuration file.
|
||||
// Uncomment this function for a dynamic pdcch_ConfigSIB1.
|
||||
//channel_bandwidth_t min_channel_bw = bw_10MHz; // Must be obtained based on TS 38.101-1 Table 5.3.5-1
|
||||
//generate_pdcch_ConfigSIB1(carrier->pdcch_ConfigSIB1,
|
||||
// *carrier->servingcellconfigcommon->ssbSubcarrierSpacing,
|
||||
// carrier->mib.message.choice.mib->subCarrierSpacingCommon,
|
||||
// min_channel_bw);
|
||||
|
||||
mib->message.choice.mib->pdcch_ConfigSIB1.controlResourceSetZero = carrier->pdcch_ConfigSIB1->controlResourceSetZero;
|
||||
mib->message.choice.mib->pdcch_ConfigSIB1.searchSpaceZero = carrier->pdcch_ConfigSIB1->searchSpaceZero;
|
||||
|
||||
mib->message.choice.mib->systemFrameNumber.buf[0] = sfn_msb << 2;
|
||||
enc_rval = uper_encode_to_buffer(&asn_DEF_NR_BCCH_BCH_Message,
|
||||
NULL,
|
||||
(void *) mib,
|
||||
carrier->MIB,
|
||||
24);
|
||||
LOG_D(NR_RRC, "Encoded MIB for frame %d sfn_msb %d (%p), bits %lu\n", frameP, sfn_msb, carrier->MIB,
|
||||
enc_rval.encoded);
|
||||
buffer_pP[0] = carrier->MIB[0];
|
||||
buffer_pP[1] = carrier->MIB[1];
|
||||
buffer_pP[2] = carrier->MIB[2];
|
||||
LOG_D(NR_RRC, "MIB PDU buffer_pP[0]=%x , buffer_pP[1]=%x, buffer_pP[2]=%x\n", buffer_pP[0], buffer_pP[1],
|
||||
buffer_pP[2]);
|
||||
AssertFatal (enc_rval.encoded > 0, "ASN1 message encoding failed (%s, %lu)!\n",
|
||||
enc_rval.failed_type->name, enc_rval.encoded);
|
||||
return (3);
|
||||
}
|
||||
|
||||
/* TODO BCCH SIB1 SIBs */
|
||||
if ((Srb_id & RAB_OFFSET ) == BCCH) {
|
||||
memcpy(&buffer_pP[0],
|
||||
RC.rrc[Mod_idP]->carrier[CC_id].SIB1_MBMS,
|
||||
RC.rrc[Mod_idP]->carrier[CC_id].sizeof_SIB1_MBMS);
|
||||
memcpy(&buffer_pP[0],
|
||||
RC.nrrrc[Mod_idP]->carrier.SIB1,
|
||||
RC.nrrrc[Mod_idP]->carrier.sizeof_SIB1);
|
||||
|
||||
return RC.nrrrc[Mod_idP]->carrier.sizeof_SIB1;
|
||||
}
|
||||
|
||||
/* CCCH */
|
||||
|
||||
@@ -68,6 +68,7 @@
|
||||
#include "NR_SDAP-Config.h"
|
||||
#include "NR_RRCReconfigurationComplete.h"
|
||||
#include "NR_RRCReconfigurationComplete-IEs.h"
|
||||
#include "PHY/defs_nr_common.h"
|
||||
#if defined(NR_Rel16)
|
||||
#include "NR_SCS-SpecificCarrier.h"
|
||||
#include "NR_TDD-UL-DL-ConfigCommon.h"
|
||||
@@ -226,12 +227,19 @@ uint8_t do_MIB_NR(gNB_RRC_INST *rrc,uint32_t frame) {
|
||||
mib->message.choice.mib->spare.bits_unused = 7; // This makes a spare of 1 bits
|
||||
|
||||
mib->message.choice.mib->ssb_SubcarrierOffset = (carrier->ssb_SubcarrierOffset)&15;
|
||||
|
||||
/*
|
||||
* The SIB1 will be sent in this allocation (Type0-PDCCH) : 38.213, 13-4 Table and 38.213 13-11 to 13-14 tables
|
||||
* the reverse allocation is in nr_ue_decode_mib()
|
||||
*/
|
||||
mib->message.choice.mib->pdcch_ConfigSIB1.controlResourceSetZero = *scc->downlinkConfigCommon->initialDownlinkBWP->pdcch_ConfigCommon->choice.setup->controlResourceSetZero;
|
||||
mib->message.choice.mib->pdcch_ConfigSIB1.searchSpaceZero = *scc->downlinkConfigCommon->initialDownlinkBWP->pdcch_ConfigCommon->choice.setup->searchSpaceZero;
|
||||
* The SIB1 will be sent in this allocation (Type0-PDCCH) : 38.213, 13-4 Table and 38.213 13-11 to 13-14 tables
|
||||
* the reverse allocation is in nr_ue_decode_mib()
|
||||
*/
|
||||
if(rrc->carrier.pdcch_ConfigSIB1) {
|
||||
mib->message.choice.mib->pdcch_ConfigSIB1.controlResourceSetZero = rrc->carrier.pdcch_ConfigSIB1->controlResourceSetZero;
|
||||
mib->message.choice.mib->pdcch_ConfigSIB1.searchSpaceZero = rrc->carrier.pdcch_ConfigSIB1->searchSpaceZero;
|
||||
} else {
|
||||
mib->message.choice.mib->pdcch_ConfigSIB1.controlResourceSetZero = *scc->downlinkConfigCommon->initialDownlinkBWP->pdcch_ConfigCommon->choice.setup->controlResourceSetZero;
|
||||
mib->message.choice.mib->pdcch_ConfigSIB1.searchSpaceZero = *scc->downlinkConfigCommon->initialDownlinkBWP->pdcch_ConfigCommon->choice.setup->searchSpaceZero;
|
||||
}
|
||||
|
||||
AssertFatal(scc->ssbSubcarrierSpacing != NULL, "scc->ssbSubcarrierSpacing is null\n");
|
||||
switch (*scc->ssbSubcarrierSpacing) {
|
||||
case NR_SubcarrierSpacing_kHz15:
|
||||
@@ -297,27 +305,28 @@ uint8_t do_SIB1_NR(rrc_gNB_carrier_data_t *carrier,
|
||||
asn_enc_rval_t enc_rval;
|
||||
|
||||
// TODO : Add support for more than one PLMN
|
||||
//int num_plmn = configuration->num_plmn;
|
||||
int num_plmn = 1;
|
||||
int num_plmn = 1; // int num_plmn = configuration->num_plmn;
|
||||
struct NR_PLMN_Identity nr_plmn[num_plmn];
|
||||
NR_MCC_MNC_Digit_t nr_mcc_digit[num_plmn][3];
|
||||
NR_MCC_MNC_Digit_t nr_mnc_digit[num_plmn][3];
|
||||
memset(nr_plmn,0,sizeof(nr_plmn));
|
||||
memset(nr_mcc_digit,0,sizeof(nr_mcc_digit));
|
||||
memset(nr_mnc_digit,0,sizeof(nr_mnc_digit));
|
||||
|
||||
// struct NR_UAC_BarringInfoSet nr_uac_BarringInfoSet;
|
||||
|
||||
NR_BCCH_DL_SCH_Message_t *sib1_message = CALLOC(1,sizeof(NR_BCCH_DL_SCH_Message_t));
|
||||
carrier->siblock1 = sib1_message;
|
||||
sib1_message->message.present = NR_BCCH_DL_SCH_MessageType_PR_c1;
|
||||
sib1_message->message.choice.c1 = CALLOC(1,sizeof(struct NR_BCCH_DL_SCH_MessageType__c1));
|
||||
sib1_message->message.choice.c1->present = NR_BCCH_DL_SCH_MessageType__c1_PR_systemInformationBlockType1;
|
||||
sib1_message->message.choice.c1->choice.systemInformationBlockType1 = CALLOC(1,sizeof(struct NR_SIB1));
|
||||
|
||||
|
||||
struct NR_SIB1 *sib1 = sib1_message->message.choice.c1->choice.systemInformationBlockType1;
|
||||
|
||||
// cellSelectionInfo
|
||||
sib1->cellSelectionInfo = CALLOC(1,sizeof(struct NR_SIB1__cellSelectionInfo));
|
||||
sib1->cellSelectionInfo->q_RxLevMin = -50;
|
||||
|
||||
// cellAccessRelatedInfo
|
||||
struct NR_PLMN_IdentityInfo *nr_plmn_info=CALLOC(1,sizeof(struct NR_PLMN_IdentityInfo));
|
||||
asn_set_empty(&nr_plmn_info->plmn_IdentityList.list);
|
||||
for (int i = 0; i < num_plmn; ++i) {
|
||||
@@ -329,44 +338,133 @@ uint8_t do_SIB1_NR(rrc_gNB_carrier_data_t *carrier,
|
||||
ASN_SEQUENCE_ADD(&nr_plmn[i].mcc->list, &nr_mcc_digit[i][0]);
|
||||
ASN_SEQUENCE_ADD(&nr_plmn[i].mcc->list, &nr_mcc_digit[i][1]);
|
||||
ASN_SEQUENCE_ADD(&nr_plmn[i].mcc->list, &nr_mcc_digit[i][2]);
|
||||
nr_mnc_digit[i][0] = (configuration->mnc[i]/100)%10;
|
||||
if(configuration->mnc_digit_length[i] == 3) nr_mnc_digit[i][0] = (configuration->mnc[i]/100)%10;
|
||||
nr_mnc_digit[i][1] = (configuration->mnc[i]/10)%10;
|
||||
nr_mnc_digit[i][2] = (configuration->mnc[i])%10;
|
||||
nr_plmn[i].mnc.list.size=0;
|
||||
nr_plmn[i].mnc.list.count=0;
|
||||
ASN_SEQUENCE_ADD(&nr_plmn[i].mnc.list, &nr_mnc_digit[i][0]);
|
||||
if(configuration->mnc_digit_length[i] == 3) ASN_SEQUENCE_ADD(&nr_plmn[i].mnc.list, &nr_mnc_digit[i][0]);
|
||||
ASN_SEQUENCE_ADD(&nr_plmn[i].mnc.list, &nr_mnc_digit[i][1]);
|
||||
ASN_SEQUENCE_ADD(&nr_plmn[i].mnc.list, &nr_mnc_digit[i][2]);
|
||||
ASN_SEQUENCE_ADD(&nr_plmn_info->plmn_IdentityList.list, &nr_plmn[i]);
|
||||
}//end plmn loop
|
||||
|
||||
nr_plmn_info->cellIdentity.buf = CALLOC(1,8);
|
||||
nr_plmn_info->cellIdentity.buf[0]= (configuration->cell_identity >> 20) & 0xff;
|
||||
nr_plmn_info->cellIdentity.buf[1]= (configuration->cell_identity >> 12) & 0xff;
|
||||
nr_plmn_info->cellIdentity.buf[2]= (configuration->cell_identity >> 4) & 0xff;
|
||||
nr_plmn_info->cellIdentity.buf[3]= (configuration->cell_identity << 4) & 0xff;
|
||||
nr_plmn_info->cellIdentity.size= 4;
|
||||
nr_plmn_info->cellIdentity.buf = CALLOC(1,5);
|
||||
nr_plmn_info->cellIdentity.buf[0]= (configuration->cell_identity >> 28) & 0xff;
|
||||
nr_plmn_info->cellIdentity.buf[1]= (configuration->cell_identity >> 20) & 0xff;
|
||||
nr_plmn_info->cellIdentity.buf[2]= (configuration->cell_identity >> 12) & 0xff;
|
||||
nr_plmn_info->cellIdentity.buf[3]= (configuration->cell_identity >> 4) & 0xff;
|
||||
nr_plmn_info->cellIdentity.buf[4]= (configuration->cell_identity << 4) & 0xff;
|
||||
nr_plmn_info->cellIdentity.size= 5;
|
||||
nr_plmn_info->cellIdentity.bits_unused= 4;
|
||||
nr_plmn_info->cellReservedForOperatorUse = 0;
|
||||
nr_plmn_info->cellReservedForOperatorUse = NR_PLMN_IdentityInfo__cellReservedForOperatorUse_reserved;
|
||||
|
||||
nr_plmn_info->trackingAreaCode = CALLOC(1,sizeof(NR_TrackingAreaCode_t));
|
||||
nr_plmn_info->trackingAreaCode->buf = CALLOC(1,3);
|
||||
nr_plmn_info->trackingAreaCode->buf[0] = ( ((uint32_t)configuration->tac) >> 16) & 0xff;
|
||||
nr_plmn_info->trackingAreaCode->buf[1] = ( ((uint32_t)configuration->tac) >> 8) & 0xff;
|
||||
nr_plmn_info->trackingAreaCode->buf[2] = ( ((uint32_t)configuration->tac) >> 0) & 0xff;
|
||||
nr_plmn_info->trackingAreaCode->size = 3;
|
||||
nr_plmn_info->trackingAreaCode->bits_unused = 0;
|
||||
|
||||
ASN_SEQUENCE_ADD(&sib1->cellAccessRelatedInfo.plmn_IdentityList.list, nr_plmn_info);
|
||||
#if 0
|
||||
sib1->uac_BarringInfo = CALLOC(1, sizeof(struct NR_SIB1__uac_BarringInfo));
|
||||
memset(sib1->uac_BarringInfo, 0, sizeof(struct NR_SIB1__uac_BarringInfo));
|
||||
nr_uac_BarringInfoSet.uac_BarringFactor = NR_UAC_BarringInfoSet__uac_BarringFactor_p95;
|
||||
nr_uac_BarringInfoSet.uac_BarringTime = NR_UAC_BarringInfoSet__uac_BarringTime_s4;
|
||||
nr_uac_BarringInfoSet.uac_BarringForAccessIdentity.buf = MALLOC(1);
|
||||
memset(nr_uac_BarringInfoSet.uac_BarringForAccessIdentity.buf,0,1);
|
||||
nr_uac_BarringInfoSet.uac_BarringForAccessIdentity.size = 1;
|
||||
nr_uac_BarringInfoSet.uac_BarringForAccessIdentity.bits_unused = 1;
|
||||
ASN_SEQUENCE_ADD(&sib1->uac_BarringInfo->uac_BarringInfoSetList, &nr_uac_BarringInfoSet);
|
||||
#endif
|
||||
//encode SIB1 to data
|
||||
carrier->SIB1=(uint8_t *) malloc16(128);
|
||||
|
||||
// connEstFailureControl
|
||||
// TODO: add connEstFailureControl
|
||||
|
||||
//si-SchedulingInfo
|
||||
/*sib1->si_SchedulingInfo = CALLOC(1,sizeof(struct NR_SI_SchedulingInfo));
|
||||
asn_set_empty(&sib1->si_SchedulingInfo->schedulingInfoList.list);
|
||||
sib1->si_SchedulingInfo->si_WindowLength = NR_SI_SchedulingInfo__si_WindowLength_s20;
|
||||
struct NR_SchedulingInfo *schedulingInfo = CALLOC(1,sizeof(struct NR_SchedulingInfo));
|
||||
schedulingInfo->si_BroadcastStatus = NR_SchedulingInfo__si_BroadcastStatus_broadcasting;
|
||||
schedulingInfo->si_Periodicity = NR_SchedulingInfo__si_Periodicity_rf8;
|
||||
asn_set_empty(&schedulingInfo->sib_MappingInfo.list);
|
||||
e_NR_SIB_TypeInfo__type *sib_type = CALLOC(1,sizeof(e_NR_SIB_TypeInfo__type));
|
||||
*sib_type = NR_SIB_TypeInfo__type_sibType3;
|
||||
ASN_SEQUENCE_ADD(&schedulingInfo->sib_MappingInfo.list,sib_type);
|
||||
ASN_SEQUENCE_ADD(&sib1->si_SchedulingInfo->schedulingInfoList.list,schedulingInfo);*/
|
||||
|
||||
// servingCellConfigCommon
|
||||
sib1->servingCellConfigCommon = CALLOC(1,sizeof(struct NR_ServingCellConfigCommonSIB));
|
||||
|
||||
asn_set_empty(&sib1->servingCellConfigCommon->downlinkConfigCommon.frequencyInfoDL.frequencyBandList.list);
|
||||
asn_set_empty(&sib1->servingCellConfigCommon->downlinkConfigCommon.frequencyInfoDL.scs_SpecificCarrierList.list);
|
||||
sib1->servingCellConfigCommon->downlinkConfigCommon.initialDownlinkBWP.genericParameters.locationAndBandwidth = configuration->scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth;
|
||||
sib1->servingCellConfigCommon->downlinkConfigCommon.initialDownlinkBWP.genericParameters.subcarrierSpacing = configuration->scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.subcarrierSpacing;
|
||||
sib1->servingCellConfigCommon->downlinkConfigCommon.initialDownlinkBWP.genericParameters.cyclicPrefix = configuration->scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.cyclicPrefix;
|
||||
for(int i = 0; i< configuration->scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.count; i++) {
|
||||
struct NR_NR_MultiBandInfo *nrMultiBandInfo = CALLOC(1,sizeof(struct NR_NR_MultiBandInfo));
|
||||
nrMultiBandInfo->freqBandIndicatorNR = configuration->scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[i];
|
||||
ASN_SEQUENCE_ADD(&sib1->servingCellConfigCommon->downlinkConfigCommon.frequencyInfoDL.frequencyBandList.list,nrMultiBandInfo);
|
||||
}
|
||||
sib1->servingCellConfigCommon->downlinkConfigCommon.frequencyInfoDL.offsetToPointA = configuration->scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->offsetToCarrier;
|
||||
for(int i = 0; i< configuration->scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.count; i++) {
|
||||
ASN_SEQUENCE_ADD(&sib1->servingCellConfigCommon->downlinkConfigCommon.frequencyInfoDL.scs_SpecificCarrierList.list,configuration->scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[i]);
|
||||
}
|
||||
sib1->servingCellConfigCommon->downlinkConfigCommon.initialDownlinkBWP.pdcch_ConfigCommon = configuration->scc->downlinkConfigCommon->initialDownlinkBWP->pdcch_ConfigCommon;
|
||||
sib1->servingCellConfigCommon->downlinkConfigCommon.initialDownlinkBWP.pdsch_ConfigCommon = configuration->scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon;
|
||||
sib1->servingCellConfigCommon->downlinkConfigCommon.bcch_Config.modificationPeriodCoeff = NR_BCCH_Config__modificationPeriodCoeff_n2;
|
||||
sib1->servingCellConfigCommon->downlinkConfigCommon.pcch_Config.defaultPagingCycle = 0;
|
||||
sib1->servingCellConfigCommon->downlinkConfigCommon.pcch_Config.nAndPagingFrameOffset.present = NR_PCCH_Config__nAndPagingFrameOffset_PR_oneT;
|
||||
sib1->servingCellConfigCommon->downlinkConfigCommon.pcch_Config.ns = NR_PCCH_Config__ns_four;
|
||||
|
||||
sib1->servingCellConfigCommon->uplinkConfigCommon = CALLOC(1,sizeof(struct NR_UplinkConfigCommonSIB));
|
||||
asn_set_empty(&sib1->servingCellConfigCommon->uplinkConfigCommon->frequencyInfoUL.scs_SpecificCarrierList.list);
|
||||
for(int i = 0; i< configuration->scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list.count; i++) {
|
||||
ASN_SEQUENCE_ADD(&sib1->servingCellConfigCommon->uplinkConfigCommon->frequencyInfoUL.scs_SpecificCarrierList.list,configuration->scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list.array[i]);
|
||||
}
|
||||
sib1->servingCellConfigCommon->uplinkConfigCommon->initialUplinkBWP.genericParameters = configuration->scc->uplinkConfigCommon->initialUplinkBWP->genericParameters;
|
||||
sib1->servingCellConfigCommon->uplinkConfigCommon->initialUplinkBWP.rach_ConfigCommon = configuration->scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon;
|
||||
sib1->servingCellConfigCommon->uplinkConfigCommon->initialUplinkBWP.pusch_ConfigCommon = configuration->scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon;
|
||||
sib1->servingCellConfigCommon->uplinkConfigCommon->initialUplinkBWP.pucch_ConfigCommon = configuration->scc->uplinkConfigCommon->initialUplinkBWP->pucch_ConfigCommon;
|
||||
|
||||
sib1->servingCellConfigCommon->n_TimingAdvanceOffset = configuration->scc->n_TimingAdvanceOffset;
|
||||
sib1->servingCellConfigCommon->ssb_PositionsInBurst.inOneGroup = configuration->scc->ssb_PositionsInBurst->choice.shortBitmap;
|
||||
sib1->servingCellConfigCommon->ssb_PeriodicityServingCell = *configuration->scc->ssb_periodicityServingCell;
|
||||
sib1->servingCellConfigCommon->tdd_UL_DL_ConfigurationCommon = CALLOC(1,sizeof(struct NR_TDD_UL_DL_ConfigCommon));
|
||||
sib1->servingCellConfigCommon->tdd_UL_DL_ConfigurationCommon->referenceSubcarrierSpacing = configuration->scc->tdd_UL_DL_ConfigurationCommon->referenceSubcarrierSpacing;
|
||||
sib1->servingCellConfigCommon->tdd_UL_DL_ConfigurationCommon->pattern1 = configuration->scc->tdd_UL_DL_ConfigurationCommon->pattern1;
|
||||
sib1->servingCellConfigCommon->tdd_UL_DL_ConfigurationCommon->pattern2 = configuration->scc->tdd_UL_DL_ConfigurationCommon->pattern2;
|
||||
sib1->servingCellConfigCommon->ss_PBCH_BlockPower = configuration->scc->ss_PBCH_BlockPower;
|
||||
|
||||
// ims-EmergencySupport
|
||||
// TODO: add ims-EmergencySupport
|
||||
|
||||
// eCallOverIMS-Support
|
||||
// TODO: add eCallOverIMS-Support
|
||||
|
||||
// ue-TimersAndConstants
|
||||
// TODO: add ue-TimersAndConstants
|
||||
|
||||
// uac-BarringInfo
|
||||
/*sib1->uac_BarringInfo = CALLOC(1, sizeof(struct NR_SIB1__uac_BarringInfo));
|
||||
NR_UAC_BarringInfoSet_t *nr_uac_BarringInfoSet = CALLOC(1, sizeof(NR_UAC_BarringInfoSet_t));
|
||||
asn_set_empty(&sib1->uac_BarringInfo->uac_BarringInfoSetList);
|
||||
nr_uac_BarringInfoSet->uac_BarringFactor = NR_UAC_BarringInfoSet__uac_BarringFactor_p95;
|
||||
nr_uac_BarringInfoSet->uac_BarringTime = NR_UAC_BarringInfoSet__uac_BarringTime_s4;
|
||||
nr_uac_BarringInfoSet->uac_BarringForAccessIdentity.buf = CALLOC(1, 1);
|
||||
nr_uac_BarringInfoSet->uac_BarringForAccessIdentity.size = 1;
|
||||
nr_uac_BarringInfoSet->uac_BarringForAccessIdentity.bits_unused = 1;
|
||||
ASN_SEQUENCE_ADD(&sib1->uac_BarringInfo->uac_BarringInfoSetList, nr_uac_BarringInfoSet);*/
|
||||
|
||||
// useFullResumeID
|
||||
// TODO: add useFullResumeID
|
||||
|
||||
// lateNonCriticalExtension
|
||||
// TODO: add lateNonCriticalExtension
|
||||
|
||||
// nonCriticalExtension
|
||||
// TODO: add nonCriticalExtension
|
||||
|
||||
xer_fprint(stdout, &asn_DEF_NR_SIB1, (const void*)sib1_message->message.choice.c1->choice.systemInformationBlockType1);
|
||||
|
||||
if(carrier->SIB1 == NULL) carrier->SIB1=(uint8_t *) malloc16(NR_MAX_SIB_LENGTH/8);
|
||||
enc_rval = uper_encode_to_buffer(&asn_DEF_NR_BCCH_DL_SCH_Message,
|
||||
NULL,
|
||||
(void *)sib1_message,
|
||||
carrier->SIB1,
|
||||
128);
|
||||
NR_MAX_SIB_LENGTH/8);
|
||||
AssertFatal (enc_rval.encoded > 0, "ASN1 message encoding failed (%s, %lu)!\n",
|
||||
enc_rval.failed_type->name, enc_rval.encoded);
|
||||
|
||||
|
||||
@@ -403,6 +403,7 @@ typedef struct {
|
||||
int pucch_TargetSNRx10;
|
||||
NR_BCCH_DL_SCH_Message_t *siblock1;
|
||||
NR_ServingCellConfigCommon_t *servingcellconfigcommon;
|
||||
NR_PDCCH_ConfigSIB1_t *pdcch_ConfigSIB1;
|
||||
NR_CellGroupConfig_t *secondaryCellGroup[MAX_NR_RRC_UE_CONTEXTS];
|
||||
NR_SRB_INFO SI;
|
||||
NR_SRB_INFO Srb0;
|
||||
|
||||
@@ -71,6 +71,12 @@ void rrc_add_nsa_user(gNB_RRC_INST *rrc,struct rrc_gNB_ue_context_s *ue_context_
|
||||
|
||||
void rrc_remove_nsa_user(gNB_RRC_INST *rrc, int rnti);
|
||||
|
||||
void fill_default_initialDownlinkBWP(NR_BWP_Downlink_t *bwp, NR_ServingCellConfigCommon_t *servingcellconfigcommon);
|
||||
|
||||
void fill_default_coresetZero(NR_ControlResourceSet_t *coreset0, NR_ServingCellConfigCommon_t *servingcellconfigcommon);
|
||||
|
||||
void fill_default_searchSpaceZero(NR_SearchSpace_t *ss0);
|
||||
|
||||
void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellconfigcommon,
|
||||
NR_CellGroupConfig_t *secondaryCellGroup,
|
||||
int scg_id,
|
||||
|
||||
@@ -225,7 +225,7 @@ static void init_NR_SI(gNB_RRC_INST *rrc, gNB_RrcConfigurationReq *configuration
|
||||
(NR_CellGroupConfig_t *)NULL
|
||||
);
|
||||
|
||||
if (get_softmodem_params()->phy_test > 0 || get_softmodem_params()->do_ra > 0) {
|
||||
if (get_softmodem_params()->phy_test > 0 || get_softmodem_params()->do_ra > 0 || get_softmodem_params()->sa > 0) {
|
||||
// This is for phytest only, emulate first X2 message if uecap.raw file is present
|
||||
FILE *fd;
|
||||
fd = fopen("uecap.raw","r");
|
||||
|
||||
@@ -98,7 +98,7 @@ int generate_CG_Config(gNB_RRC_INST *rrc,
|
||||
total_size = (enc_rval.encoded+7)>>3;
|
||||
|
||||
FILE *fd; // file to be generated for nr-ue
|
||||
if (get_softmodem_params()->phy_test==1 || get_softmodem_params()->do_ra > 0) {
|
||||
if (get_softmodem_params()->phy_test==1 || get_softmodem_params()->do_ra > 0 || get_softmodem_params()->sa == 1) {
|
||||
// This is for phytest only, emulate first X2 message if uecap.raw file is present
|
||||
LOG_I(RRC,"Dumping NR_RRCReconfiguration message (%jd bytes)\n",(enc_rval.encoded+7)>>3);
|
||||
for (int i=0; i<(enc_rval.encoded+7)>>3; i++) {
|
||||
@@ -123,7 +123,7 @@ int generate_CG_Config(gNB_RRC_INST *rrc,
|
||||
|
||||
|
||||
|
||||
if (get_softmodem_params()->phy_test==1 || get_softmodem_params()->do_ra > 0) {
|
||||
if (get_softmodem_params()->phy_test==1 || get_softmodem_params()->do_ra > 0 || get_softmodem_params()->sa == 1) {
|
||||
|
||||
LOG_I(RRC,"Dumping scg_RB_Config message (%jd bytes)\n",(enc_rval.encoded+7)>>3);
|
||||
for (int i=0; i<(enc_rval.encoded+7)>>3; i++) {
|
||||
|
||||
@@ -162,7 +162,7 @@ void rrc_add_nsa_user(gNB_RRC_INST *rrc,struct rrc_gNB_ue_context_s *ue_context_
|
||||
NR_RRCReconfiguration_IEs_t *reconfig_ies=calloc(1,sizeof(NR_RRCReconfiguration_IEs_t));
|
||||
ue_context_p->ue_context.reconfig->criticalExtensions.choice.rrcReconfiguration = reconfig_ies;
|
||||
carrier->initial_csi_index[rrc->Nb_ue] = 0;
|
||||
if (get_softmodem_params()->phy_test == 1 || get_softmodem_params()->do_ra == 1){
|
||||
if (get_softmodem_params()->phy_test == 1 || get_softmodem_params()->do_ra == 1 || get_softmodem_params()->sa == 1){
|
||||
ue_context_p->ue_context.rb_config = calloc(1,sizeof(NR_RRCReconfiguration_t));
|
||||
fill_default_rbconfig(ue_context_p->ue_context.rb_config);
|
||||
}
|
||||
|
||||
@@ -48,6 +48,99 @@
|
||||
#define false 0
|
||||
#define true 1
|
||||
|
||||
void fill_default_initialDownlinkBWP(NR_BWP_Downlink_t *bwp, NR_ServingCellConfigCommon_t *servingcellconfigcommon) {
|
||||
|
||||
bwp->bwp_Id = 0;
|
||||
|
||||
bwp->bwp_Common=calloc(1,sizeof(*bwp->bwp_Common));
|
||||
memcpy((void*)&bwp->bwp_Common,
|
||||
&servingcellconfigcommon->downlinkConfigCommon->initialDownlinkBWP,
|
||||
sizeof(bwp->bwp_Common));
|
||||
|
||||
bwp->bwp_Dedicated=calloc(1,sizeof(*bwp->bwp_Dedicated));
|
||||
bwp->bwp_Dedicated->pdsch_Config = calloc(1,sizeof(*bwp->bwp_Dedicated->pdsch_Config));
|
||||
bwp->bwp_Dedicated->pdsch_Config->present = NR_SetupRelease_PDSCH_Config_PR_setup;
|
||||
bwp->bwp_Dedicated->pdsch_Config->choice.setup = calloc(1,sizeof(*bwp->bwp_Dedicated->pdsch_Config->choice.setup));
|
||||
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dataScramblingIdentityPDSCH = NULL;
|
||||
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA = calloc(1,sizeof(*bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA));
|
||||
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->present= NR_SetupRelease_DMRS_DownlinkConfig_PR_setup;
|
||||
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup = calloc(1,sizeof(*bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup));
|
||||
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type=NULL;
|
||||
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->maxLength=NULL;
|
||||
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->scramblingID0=NULL;
|
||||
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->scramblingID1=NULL;
|
||||
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->phaseTrackingRS=NULL;
|
||||
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_AdditionalPosition = calloc(1,sizeof(*bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_AdditionalPosition));
|
||||
*bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_AdditionalPosition = NR_DMRS_DownlinkConfig__dmrs_AdditionalPosition_pos0;
|
||||
}
|
||||
|
||||
void fill_default_coresetZero(NR_ControlResourceSet_t *coreset0, NR_ServingCellConfigCommon_t *servingcellconfigcommon) {
|
||||
|
||||
coreset0->controlResourceSetId = 0;
|
||||
|
||||
// frequencyDomainResources '11111111 00000000 00000000 00000000 00000000 00000'B,
|
||||
if(coreset0->frequencyDomainResources.buf == NULL) coreset0->frequencyDomainResources.buf = calloc(1,6);
|
||||
coreset0->frequencyDomainResources.buf[0] = 0xff;
|
||||
coreset0->frequencyDomainResources.buf[1] = 0;
|
||||
coreset0->frequencyDomainResources.buf[2] = 0;
|
||||
coreset0->frequencyDomainResources.buf[3] = 0;
|
||||
coreset0->frequencyDomainResources.buf[4] = 0;
|
||||
coreset0->frequencyDomainResources.buf[5] = 0;
|
||||
coreset0->frequencyDomainResources.size = 6;
|
||||
coreset0->frequencyDomainResources.bits_unused = 3;
|
||||
coreset0->duration = 1;
|
||||
coreset0->cce_REG_MappingType.present=NR_ControlResourceSet__cce_REG_MappingType_PR_interleaved;
|
||||
coreset0->cce_REG_MappingType.choice.interleaved=calloc(1,sizeof(*coreset0->cce_REG_MappingType.choice.interleaved));
|
||||
coreset0->cce_REG_MappingType.choice.interleaved->reg_BundleSize = NR_ControlResourceSet__cce_REG_MappingType__interleaved__reg_BundleSize_n6;
|
||||
coreset0->cce_REG_MappingType.choice.interleaved->interleaverSize = NR_ControlResourceSet__cce_REG_MappingType__interleaved__interleaverSize_n2;
|
||||
coreset0->cce_REG_MappingType.choice.interleaved->shiftIndex = servingcellconfigcommon->physCellId;
|
||||
coreset0->precoderGranularity = NR_ControlResourceSet__precoderGranularity_sameAsREG_bundle;
|
||||
|
||||
if(coreset0->tci_StatesPDCCH_ToAddList == NULL) coreset0->tci_StatesPDCCH_ToAddList = calloc(1,sizeof(*coreset0->tci_StatesPDCCH_ToAddList));
|
||||
|
||||
NR_TCI_StateId_t *tci[8];
|
||||
for (int i=0;i<8;i++) {
|
||||
tci[i]=calloc(1,sizeof(*tci[i]));
|
||||
*tci[i] = i;
|
||||
ASN_SEQUENCE_ADD(&coreset0->tci_StatesPDCCH_ToAddList->list,tci[i]);
|
||||
}
|
||||
coreset0->tci_StatesPDCCH_ToReleaseList = NULL;
|
||||
coreset0->tci_PresentInDCI = NULL;
|
||||
coreset0->pdcch_DMRS_ScramblingID = NULL;
|
||||
|
||||
}
|
||||
|
||||
void fill_default_searchSpaceZero(NR_SearchSpace_t *ss0) {
|
||||
|
||||
if(ss0->controlResourceSetId == NULL) ss0->controlResourceSetId=calloc(1,sizeof(*ss0->controlResourceSetId));
|
||||
if(ss0->monitoringSymbolsWithinSlot == NULL) ss0->monitoringSymbolsWithinSlot = calloc(1,sizeof(*ss0->monitoringSymbolsWithinSlot));
|
||||
if(ss0->monitoringSymbolsWithinSlot->buf == NULL) ss0->monitoringSymbolsWithinSlot->buf = calloc(1,2);
|
||||
if(ss0->nrofCandidates == NULL) ss0->nrofCandidates = calloc(1,sizeof(*ss0->nrofCandidates));
|
||||
if(ss0->searchSpaceType == NULL) ss0->searchSpaceType = calloc(1,sizeof(*ss0->searchSpaceType));
|
||||
if(ss0->searchSpaceType->choice.common == NULL) ss0->searchSpaceType->choice.common=calloc(1,sizeof(*ss0->searchSpaceType->choice.common));
|
||||
if(ss0->searchSpaceType->choice.common->dci_Format0_0_AndFormat1_0 == NULL) ss0->searchSpaceType->choice.common->dci_Format0_0_AndFormat1_0 = calloc(1,sizeof(*ss0->searchSpaceType->choice.common->dci_Format0_0_AndFormat1_0));
|
||||
|
||||
ss0->searchSpaceId = 0;
|
||||
*ss0->controlResourceSetId = 0;
|
||||
ss0->monitoringSlotPeriodicityAndOffset = calloc(1,sizeof(*ss0->monitoringSlotPeriodicityAndOffset));
|
||||
ss0->monitoringSlotPeriodicityAndOffset->present = NR_SearchSpace__monitoringSlotPeriodicityAndOffset_PR_sl1;
|
||||
ss0->duration=NULL;
|
||||
|
||||
// should be '1100 0000 0000 00'B (LSB first!), first two symols in slot, adjust if needed
|
||||
ss0->monitoringSymbolsWithinSlot->buf[1] = 0;
|
||||
ss0->monitoringSymbolsWithinSlot->buf[0] = (1<<7) | (1<<6);
|
||||
ss0->monitoringSymbolsWithinSlot->size = 2;
|
||||
ss0->monitoringSymbolsWithinSlot->bits_unused = 2;
|
||||
|
||||
// FIXME: update values from TS38.213 Section 10.1 Table 10.1-1: CCE aggregation levels and maximum number of PDCCH candidates per CCE aggregation level for CSS sets configured by searchSpaceSIB1
|
||||
ss0->nrofCandidates->aggregationLevel1 = NR_SearchSpace__nrofCandidates__aggregationLevel1_n0;
|
||||
ss0->nrofCandidates->aggregationLevel2 = NR_SearchSpace__nrofCandidates__aggregationLevel2_n0;
|
||||
ss0->nrofCandidates->aggregationLevel4 = NR_SearchSpace__nrofCandidates__aggregationLevel4_n0;
|
||||
ss0->nrofCandidates->aggregationLevel8 = NR_SearchSpace__nrofCandidates__aggregationLevel8_n1;
|
||||
ss0->nrofCandidates->aggregationLevel16 = NR_SearchSpace__nrofCandidates__aggregationLevel16_n0;
|
||||
|
||||
ss0->searchSpaceType->present = NR_SearchSpace__searchSpaceType_PR_common;
|
||||
}
|
||||
|
||||
void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellconfigcommon,
|
||||
NR_CellGroupConfig_t *secondaryCellGroup,
|
||||
@@ -457,7 +550,8 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco
|
||||
ASN_SEQUENCE_ADD(&bwp->bwp_Common->pdcch_ConfigCommon->choice.setup->commonSearchSpaceList->list,ss);
|
||||
|
||||
|
||||
bwp->bwp_Common->pdcch_ConfigCommon->choice.setup->searchSpaceSIB1=NULL;
|
||||
bwp->bwp_Common->pdcch_ConfigCommon->choice.setup->searchSpaceSIB1=calloc(1,sizeof(*bwp->bwp_Common->pdcch_ConfigCommon->choice.setup->searchSpaceSIB1));
|
||||
*bwp->bwp_Common->pdcch_ConfigCommon->choice.setup->searchSpaceSIB1=0;
|
||||
bwp->bwp_Common->pdcch_ConfigCommon->choice.setup->searchSpaceOtherSystemInformation=NULL;
|
||||
bwp->bwp_Common->pdcch_ConfigCommon->choice.setup->pagingSearchSpace=NULL;
|
||||
bwp->bwp_Common->pdcch_ConfigCommon->choice.setup->ra_SearchSpace=calloc(1,sizeof(*bwp->bwp_Common->pdcch_ConfigCommon->choice.setup->ra_SearchSpace));
|
||||
|
||||
@@ -46,16 +46,17 @@ nr_mac_rrc_data_ind_ue(
|
||||
const sdu_size_t pdu_len){
|
||||
|
||||
switch(channel){
|
||||
case NR_BCCH_BCH:
|
||||
AssertFatal( nr_rrc_ue_decode_NR_BCCH_BCH_Message( module_id, gNB_index, (uint8_t*)pduP, pdu_len) == 0, "UE decode BCCH-BCH error!\n");
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
case NR_BCCH_BCH:
|
||||
AssertFatal( nr_rrc_ue_decode_NR_BCCH_BCH_Message(module_id, gNB_index, (uint8_t*)pduP, pdu_len) == 0, "UE decode BCCH-BCH error!\n");
|
||||
break;
|
||||
case NR_BCCH_DL_SCH:
|
||||
AssertFatal( nr_rrc_ue_decode_NR_SIB1_Message(module_id, gNB_index, (uint8_t*)pduP, pdu_len) == 0, "UE decode BCCH-DLSCH error!\n");
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
|
||||
return(0);
|
||||
|
||||
}
|
||||
|
||||
int8_t mac_rrc_nr_data_req_ue(const module_id_t Mod_idP,
|
||||
|
||||
@@ -458,7 +458,7 @@ NR_UE_RRC_INST_t* openair_rrc_top_init_ue_nr(char* rrc_config_path){
|
||||
RRC_LIST_INIT(NR_UE_rrc_inst[nr_ue].CSI_ReportConfig_list, NR_maxNrofCSI_ReportConfigurations);
|
||||
}
|
||||
|
||||
if (get_softmodem_params()->phy_test==1 || get_softmodem_params()->do_ra==1) {
|
||||
if (get_softmodem_params()->phy_test==1 || get_softmodem_params()->do_ra==1 || get_softmodem_params()->sa == 1) {
|
||||
// read in files for RRCReconfiguration and RBconfig
|
||||
FILE *fd;
|
||||
char filename[1024];
|
||||
@@ -1477,6 +1477,39 @@ int8_t nr_rrc_ue_decode_ccch( const protocol_ctxt_t *const ctxt_pP, const NR_SRB
|
||||
return rval;
|
||||
}
|
||||
|
||||
/*brief decode SIB1 message*/
|
||||
int8_t nr_rrc_ue_decode_NR_SIB1_Message(module_id_t module_id, uint8_t gNB_index, uint8_t *const bufferP, const uint8_t buffer_len) {
|
||||
|
||||
NR_BCCH_DL_SCH_Message_t *bcch_message = NULL;
|
||||
|
||||
asn_dec_rval_t dec_rval = uper_decode_complete(NULL,
|
||||
&asn_DEF_NR_BCCH_DL_SCH_Message,
|
||||
(void **)&bcch_message,
|
||||
(const void *)bufferP,
|
||||
buffer_len);
|
||||
|
||||
if ((dec_rval.code != RC_OK) || (dec_rval.consumed == 0)) {
|
||||
LOG_D(RRC,"NR_BCCH_DL_SCH decode error\n");
|
||||
SEQUENCE_free( &asn_DEF_NR_BCCH_DL_SCH_Message, (void *)bcch_message, 1 );
|
||||
return -1;
|
||||
}
|
||||
else {
|
||||
NR_SIB1_t *sib1 = NR_UE_rrc_inst[module_id].sib1[gNB_index];
|
||||
if(sib1 != NULL){
|
||||
SEQUENCE_free(&asn_DEF_NR_BCCH_BCH_Message, (void *)sib1, 1 );
|
||||
}
|
||||
sib1 = bcch_message->message.choice.c1->choice.systemInformationBlockType1;
|
||||
if (*(int64_t*)sib1 != 1) {
|
||||
LOG_D(RRC, "SIB1 address: %lx\n", *(int64_t*)sib1);
|
||||
xer_fprint(stdout, &asn_DEF_NR_SIB1, (const void*)sib1);
|
||||
}
|
||||
else
|
||||
LOG_E(PHY, "sib1 is starting by 8 times 0\n");
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
// from NR SRB3
|
||||
int8_t nr_rrc_ue_decode_NR_DL_DCCH_Message(
|
||||
|
||||
@@ -51,6 +51,7 @@
|
||||
#include "NR_asn_constant.h"
|
||||
#include "NR_SchedulingRequestToAddMod.h"
|
||||
#include "NR_MIB.h"
|
||||
#include "NR_SIB1.h"
|
||||
#include "NR_BCCH-BCH-Message.h"
|
||||
#include "NR_DL-DCCH-Message.h"
|
||||
#include "../NR/nr_rrc_defs.h"
|
||||
|
||||
@@ -86,6 +86,13 @@ int8_t nr_rrc_ue_process_radio_bearer_config(NR_RadioBearerConfig_t *radio_beare
|
||||
\param sdu_len length of buffer*/
|
||||
int8_t nr_rrc_ue_decode_NR_BCCH_BCH_Message(const module_id_t module_id, const uint8_t gNB_index, uint8_t *const bufferP, const uint8_t buffer_len);
|
||||
|
||||
/**\brief decode NR SIB1 message
|
||||
\param module_idP module id
|
||||
\param gNB_index gNB index
|
||||
\param sduP pointer to buffer of ASN message
|
||||
\param sdu_len length of buffer*/
|
||||
int8_t nr_rrc_ue_decode_NR_SIB1_Message(module_id_t module_id, uint8_t gNB_index, uint8_t *const bufferP, const uint8_t buffer_len);
|
||||
|
||||
/**\brief Decode NR DCCH from gNB, sent from lower layer through SRB3
|
||||
\param module_id module id
|
||||
\param gNB_index gNB index
|
||||
|
||||
@@ -284,7 +284,7 @@ int create_gNB_tasks(uint32_t gnb_nb) {
|
||||
}
|
||||
}
|
||||
|
||||
if (AMF_MODE_ENABLED && (get_softmodem_params()->phy_test==0 && get_softmodem_params()->do_ra==0)) {
|
||||
if (AMF_MODE_ENABLED && (get_softmodem_params()->phy_test==0 && get_softmodem_params()->do_ra==0 && get_softmodem_params()->sa==0)) {
|
||||
if (gnb_nb > 0) {
|
||||
if (itti_create_task (TASK_NGAP, ngap_gNB_task, NULL) < 0) {
|
||||
LOG_E(S1AP, "Create task for NGAP failed\n");
|
||||
|
||||
Reference in New Issue
Block a user