remove MMX instruction usage in threegpplte_turbo_encoder_sse()
This commit is contained in:
@@ -47,14 +47,8 @@
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//#define CALLGRIND 1
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//#define CALLGRIND 1
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struct treillis {
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struct treillis {
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union {
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uint8_t systematic_andp1[24];
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simde__m64 systematic_andp1_64[3];
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uint8_t parity2[24];
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uint8_t systematic_andp1_8[24];
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};
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union {
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simde__m64 parity2_64[3];
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uint8_t parity2_8[24];
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};
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int exit_state;
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int exit_state;
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} __attribute__ ((aligned(64)));
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} __attribute__ ((aligned(64)));
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@@ -91,12 +85,11 @@ static void treillis_table_init(void) {
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current_state=i;
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current_state=i;
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for (b=0; b<8 ; b++ ) { // pre-compute the image of the byte j in _m128i vector right place
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for (b=0; b<8 ; b++ ) { // pre-compute the image of the byte j in _m128i vector right place
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all_treillis[i][j].systematic_andp1_8[b*3]= (j&(1<<(7-b)))>>(7-b);
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all_treillis[i][j].systematic_andp1[b * 3] = (j & (1 << (7 - b))) >> (7 - b);
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v=threegpplte_rsc( all_treillis[i][j].systematic_andp1_8[b*3] ,
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v = threegpplte_rsc(all_treillis[i][j].systematic_andp1[b * 3], ¤t_state);
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¤t_state);
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all_treillis[i][j].systematic_andp1[b * 3 + 1] = v; // for the yparity1
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all_treillis[i][j].systematic_andp1_8[b*3+1]=v; // for the yparity1
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// all_treillis[i][j].parity1_8[b*3+1]=v; // for the yparity1
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// all_treillis[i][j].parity1_8[b*3+1]=v; // for the yparity1
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all_treillis[i][j].parity2_8[b*3+2]=v; // for the yparity2
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all_treillis[i][j].parity2[b * 3 + 2] = v; // for the yparity2
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}
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}
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all_treillis[i][j].exit_state=current_state;
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all_treillis[i][j].exit_state=current_state;
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@@ -275,13 +268,9 @@ char interleave_compact_byte(short *base_interleaver,unsigned char *input, unsig
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}
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}
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*/
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*/
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void threegpplte_turbo_encoder_sse(unsigned char *input,
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void threegpplte_turbo_encoder_sse(unsigned char *input, unsigned short input_length_bytes, unsigned char *output, unsigned char F)
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unsigned short input_length_bytes,
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{
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unsigned char *output,
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unsigned char F) {
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int i;
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unsigned char *x;
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unsigned char *x;
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unsigned char state0=0,state1=0;
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unsigned short input_length_bits = input_length_bytes<<3;
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unsigned short input_length_bits = input_length_bytes<<3;
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short *base_interleaver;
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short *base_interleaver;
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@@ -290,6 +279,7 @@ void threegpplte_turbo_encoder_sse(unsigned char *input,
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}
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}
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// look for f1 and f2 precomputed interleaver values
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// look for f1 and f2 precomputed interleaver values
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int i;
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for (i=0; i < 188 && f1f2mat[i].nb_bits != input_length_bits; i++);
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for (i=0; i < 188 && f1f2mat[i].nb_bits != input_length_bits; i++);
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if ( i == 188 ) {
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if ( i == 188 ) {
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@@ -301,24 +291,18 @@ void threegpplte_turbo_encoder_sse(unsigned char *input,
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unsigned char systematic2[768] __attribute__((aligned(32)));
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unsigned char systematic2[768] __attribute__((aligned(32)));
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interleave_compact_byte(base_interleaver, input, systematic2, input_length_bytes);
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interleave_compact_byte(base_interleaver, input, systematic2, input_length_bytes);
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simde__m64 *ptr_output = (simde__m64 *)output;
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unsigned char *ptr_output = output;
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unsigned char cur_s1, cur_s2;
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unsigned char cur_s1, cur_s2;
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int code_rate;
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unsigned char state0 = 0, state1 = 0;
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for (int i = 0; i < input_length_bytes; i++) {
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for ( state0=state1=i=0 ; i<input_length_bytes; i++ ) {
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cur_s1=input[i];
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cur_s1=input[i];
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cur_s2=systematic2[i];
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cur_s2=systematic2[i];
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*(simde__m128i *)ptr_output = simde_mm_add_epi8(*(simde__m128i *)all_treillis[state0][cur_s1].systematic_andp1,
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for (code_rate = 0; code_rate < 3; code_rate++) {
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*(simde__m128i *)all_treillis[state1][cur_s2].parity2);
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/*
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ptr_output += 16;
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*ptr_output++ = simde_mm_add_pi8(all_treillis[state0][cur_s1].systematic_64[code_rate],
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for (int code_rate = 16; code_rate < 24; code_rate++) {
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simde_mm_add_pi8(all_treillis[state0][cur_s1].parity1_64[code_rate],
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*ptr_output++ = all_treillis[state0][cur_s1].systematic_andp1[code_rate] + all_treillis[state1][cur_s2].parity2[code_rate];
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all_treillis[state1][cur_s2].parity2_64[code_rate]));
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*/
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*ptr_output++ = simde_mm_add_pi8(all_treillis[state0][cur_s1].systematic_andp1_64[code_rate],
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all_treillis[state1][cur_s2].parity2_64[code_rate]);
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}
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}
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state0=all_treillis[state0][cur_s1].exit_state;
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state0=all_treillis[state0][cur_s1].exit_state;
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state1=all_treillis[state1][cur_s2].exit_state;
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state1=all_treillis[state1][cur_s2].exit_state;
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}
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}
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