From f0394364fd10b5831a86f2495cc6331e596a4a86 Mon Sep 17 00:00:00 2001 From: Raghavendra Dinavahi Date: Thu, 5 Mar 2026 17:00:57 +0100 Subject: [PATCH] gNB PHY-TEST: Introduced --Dmod/Umod option for scheduling slot >= 64 in FR2-FDD case --Dmod option/--Umod option, for example --Dmod 1 will schedule every slot in slots per frame --Dmod 3 will schedule every 3rd slot. You can use --Dmod option togethor with -D option same for uplink scheduling too. for FR2 with 120Khz scs, there are 80 slots. Removed the assert such that FR2 config can be tested in phy-test, currently bitmap works only until 64 slots. --- executables/nr-softmodem-common.h | 2 ++ executables/nr-softmodem.h | 4 ++++ openair1/PHY/TOOLS/calibration_test.c | 2 ++ .../LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c | 20 +++++++++++++------ 4 files changed, 22 insertions(+), 6 deletions(-) diff --git a/executables/nr-softmodem-common.h b/executables/nr-softmodem-common.h index bcbd138128..202b518081 100644 --- a/executables/nr-softmodem-common.h +++ b/executables/nr-softmodem-common.h @@ -55,5 +55,7 @@ #define CONFIG_HLP_ULBW_PHYTEST "Set the number of PRBs used for ULSCH in PHYTEST mode\n" #define CONFIG_HLP_DLBM_PHYTEST "Bitmap for DLSCH slots in period (slot 0 starts at LSB)\n" #define CONFIG_HLP_ULBM_PHYTEST "Bitmap for ULSCH slots in period (slot 0 starts at LSB)\n" +#define CONFIG_HLP_DLMOD_PHYTEST "For-DLSCH, if val is n, every nth slot in slots per frame will be scheduled. \n" +#define CONFIG_HLP_ULMOD_PHYTEST "For ULSCH, if val is n, every nth slot in slots per frame will be scheduled. \n" void wait_gNBs(void); #endif diff --git a/executables/nr-softmodem.h b/executables/nr-softmodem.h index 08bee0d2d8..f460a9d934 100644 --- a/executables/nr-softmodem.h +++ b/executables/nr-softmodem.h @@ -25,6 +25,8 @@ {"T" , CONFIG_HLP_ULBW_PHYTEST, 0, .uptr=&target_ul_bw, .defintval=0, TYPE_UINT, 0}, \ {"D" , CONFIG_HLP_DLBM_PHYTEST, 0, .u64ptr=&dlsch_slot_bitmap, .defint64val=0, TYPE_UINT64, 0}, \ {"U" , CONFIG_HLP_ULBM_PHYTEST, 0, .u64ptr=&ulsch_slot_bitmap, .defint64val=0, TYPE_UINT64, 0}, \ + {"Dmod" , CONFIG_HLP_DLMOD_PHYTEST, 0, .uptr=&dlsch_slot_modval, .defintval=0, TYPE_UINT, 0}, \ + {"Umod" , CONFIG_HLP_ULMOD_PHYTEST, 0, .uptr=&ulsch_slot_modval, .defintval=0, TYPE_UINT, 0}, \ {"usrp-tx-thread-config", CONFIG_HLP_USRP_THREAD, 0, .iptr=&usrp_tx_thread, .defstrval=0, TYPE_INT, 0}, \ {"uecap_file", CONFIG_HLP_UECAP_FILE, 0, .strptr=&uecap_file, .defstrval="./uecap_ports1.xml", TYPE_STRING, 0}, \ } @@ -39,6 +41,8 @@ extern uint32_t target_ul_bw; extern uint64_t dlsch_slot_bitmap; extern uint64_t ulsch_slot_bitmap; extern char *uecap_file; +extern uint32_t dlsch_slot_modval; +extern uint32_t ulsch_slot_modval; // In nr-gnb.c extern void init_gNB(); diff --git a/openair1/PHY/TOOLS/calibration_test.c b/openair1/PHY/TOOLS/calibration_test.c index 05420672ad..f4a31e9cfd 100644 --- a/openair1/PHY/TOOLS/calibration_test.c +++ b/openair1/PHY/TOOLS/calibration_test.c @@ -23,6 +23,8 @@ uint32_t target_dl_bw = 50; uint32_t target_dl_Nl; uint32_t target_ul_Nl; char *uecap_file; +uint32_t dlsch_slot_modval; +uint32_t ulsch_slot_modval; #include int read_recplayconfig(recplay_conf_t **recplay_conf, recplay_state_t **recplay_state) {return 0;} diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c index f23dfe8b30..7afcbf35d2 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c @@ -42,17 +42,24 @@ /* This function checks whether the given Dl/UL slot is set in the input bitmap (per period), which is a mask indicating in which - slot to transmit (among those available in the TDD configuration) */ -static bool is_xlsch_in_slot(uint64_t bitmap, slot_t slot) + slot to transmit (among those available in the TDD configuration) + This function also checks if Dmod/Umod option is set, then the slot will be + scheduled in case slot % val == 0. + Use Dmod/Umod in case of FDD FR2. */ +static bool is_xlsch_in_slot(uint64_t bitmap, uint32_t modval, slot_t slot) { - AssertFatal(slot < 64, "Unable to handle periods with length larger than 64 slots in phy-test mode\n"); - return (bitmap >> slot) & 0x01; + AssertFatal(modval || slot < 64, "Slot >= 64 cannot be scheduled using options 'D/U', use 'Dmod/Umod' option\n"); + + bool val1 = (bitmap >> slot) & 0x01; + bool val2 = (modval && (slot % modval == 0)); + return (val1 || val2); } uint32_t target_dl_mcs = 9; uint32_t target_dl_Nl = 1; uint32_t target_dl_bw = 50; uint64_t dlsch_slot_bitmap = (1<<1); +uint32_t dlsch_slot_modval = 0; /* schedules whole bandwidth for first user, all the time */ void nr_preprocessor_phytest(gNB_MAC_INST *mac, post_process_pdsch_t *pp_pdsch) @@ -62,7 +69,7 @@ void nr_preprocessor_phytest(gNB_MAC_INST *mac, post_process_pdsch_t *pp_pdsch) /* already mutex protected: held in gNB_dlsch_ulsch_scheduler() */ int slot_period = slot % mac->frame_structure.numb_slots_period; - if (!is_xlsch_in_slot(dlsch_slot_bitmap, slot_period)) + if (!is_xlsch_in_slot(dlsch_slot_bitmap, dlsch_slot_modval, slot_period)) return; NR_UE_info_t *UE = mac->UE_info.connected_ue_list[0]; NR_ServingCellConfigCommon_t *scc = mac->common_channels[0].ServingCellConfigCommon; @@ -218,6 +225,7 @@ uint32_t target_ul_mcs = 9; uint32_t target_ul_bw = 50; uint32_t target_ul_Nl = 1; uint64_t ulsch_slot_bitmap = (1 << 8); +uint32_t ulsch_slot_modval = 0; void nr_ul_preprocessor_phytest(gNB_MAC_INST *nr_mac, post_process_pusch_t *pp_pusch) { int frame = pp_pusch->frame; @@ -267,7 +275,7 @@ void nr_ul_preprocessor_phytest(gNB_MAC_INST *nr_mac, post_process_pusch_t *pp_p * limitations). Note that if K2 or the TDD configuration is changed, below * conditions might exclude each other and never be true */ int slot_period = sched_slot % nr_mac->frame_structure.numb_slots_period; - if (!is_xlsch_in_slot(ulsch_slot_bitmap, slot_period)) + if (!is_xlsch_in_slot(ulsch_slot_bitmap, ulsch_slot_modval, slot_period)) return; // TODO implement beam procedures for phy-test mode