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@@ -45,6 +45,7 @@ void nr_init_pbch_dmrs(PHY_VARS_gNB* gNB)
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for (uint8_t n=0; n<NR_PBCH_DMRS_LENGTH_DWORD; n++) {
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for (uint8_t n=0; n<NR_PBCH_DMRS_LENGTH_DWORD; n++) {
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gNB->nr_gold_pbch_dmrs[n_hf][l][n] = lte_gold_generic(&x1, &x2, reset);
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gNB->nr_gold_pbch_dmrs[n_hf][l][n] = lte_gold_generic(&x1, &x2, reset);
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//printf("%d \n",gNB->nr_gold_pbch_dmrs[n_hf][l][n]);
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reset = 0;
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reset = 0;
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}
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}
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@@ -183,10 +184,8 @@ void nr_init_prs(PHY_VARS_gNB* gNB)
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for (uint8_t n=0; n<NR_MAX_PRS_INIT_LENGTH_DWORD; n++) {
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for (uint8_t n=0; n<NR_MAX_PRS_INIT_LENGTH_DWORD; n++) {
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gNB->nr_gold_prs[slotNum][symNum][n] = lte_gold_generic(&x1, &x2, reset);
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gNB->nr_gold_prs[slotNum][symNum][n] = lte_gold_generic(&x1, &x2, reset);
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//printf("%d \n",gNB->nr_gold_prs[slotNum][symNum][n]);
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reset = 0;
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//printf("printing x1= %d \n",x1);
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//printf("%d \n",gNB->nr_gold_prs[slotNum][symNum][n]);
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//printf("printing x2= %d \n",x2);
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reset = 0;
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}
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}
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}
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}
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@@ -32,6 +32,13 @@
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@param PHY_VARS_gNB* gNB structure provides configuration, frame parameters and the pointers to the 32 bits sequence storage tables
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@param PHY_VARS_gNB* gNB structure provides configuration, frame parameters and the pointers to the 32 bits sequence storage tables
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*/
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*/
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void nr_init_pbch_dmrs(PHY_VARS_gNB* gNB);
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void nr_init_pbch_dmrs(PHY_VARS_gNB* gNB);
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/*
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This function generates NR Gold Sequence(ts 138.211) for the PRS.
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@param PHY_VARS_gNB* gNB structure provides configuration, frame parameters and the pointers to the 32 bits sequence storage tables
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*/
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void nr_init_prs(PHY_VARS_gNB* gNB);
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/*!\brief This function generates the NR Gold sequence (38-211, Sec 5.2.1) for the PDCCH DMRS.
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/*!\brief This function generates the NR Gold sequence (38-211, Sec 5.2.1) for the PDCCH DMRS.
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@param PHY_VARS_gNB* gNB structure provides configuration, frame parameters and the pointers to the 32 bits sequence storage tables
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@param PHY_VARS_gNB* gNB structure provides configuration, frame parameters and the pointers to the 32 bits sequence storage tables
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@param Nid is used for the initialization of x2, Physical cell Id by default or upper layer configured pdcch_scrambling_ID
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@param Nid is used for the initialization of x2, Physical cell Id by default or upper layer configured pdcch_scrambling_ID
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@@ -2,6 +2,7 @@
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#include "PHY/defs_gNB.h"
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#include "PHY/defs_gNB.h"
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#include "PHY/NR_TRANSPORT/nr_transport_proto.h"
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#include "PHY/NR_TRANSPORT/nr_transport_proto.h"
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#include "PHY/LTE_REFSIG/lte_refsig.h"
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#include "PHY/LTE_REFSIG/lte_refsig.h"
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#include "PHY/NR_REFSIG/nr_refsig.h"
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#include "PHY/sse_intrin.h"
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#include "PHY/sse_intrin.h"
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#define DEBUG_PRS
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#define DEBUG_PRS
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@@ -16,7 +17,7 @@ int nr_generate_prs(uint32_t *nr_gold_prs,
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NR_DL_FRAME_PARMS *frame_parms) {
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NR_DL_FRAME_PARMS *frame_parms) {
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//int k,l;
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//int k,l;
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//int16_t a;
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//int16_t a;
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int16_t mod_prs[NR_MAX_PRS_INIT_LENGTH_DWORD<<1];
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int16_t mod_prs[NR_MAX_PRS_LENGTH<<1];
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uint8_t idx=0;
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uint8_t idx=0;
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uint8_t nushift = config->cell_config.phy_cell_id.value &3;
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uint8_t nushift = config->cell_config.phy_cell_id.value &3;
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LOG_D(PHY, "PRS mapping started at symbol %d shift %d\n", ssb_start_symbol+1, nushift);
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LOG_D(PHY, "PRS mapping started at symbol %d shift %d\n", ssb_start_symbol+1, nushift);
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@@ -94,11 +94,22 @@ void nr_common_signal_procedures (PHY_VARS_gNB *gNB,int frame,int slot,nfapi_nr_
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nr_generate_pss(gNB->d_pss, &txdataF[0][txdataF_offset], AMP, ssb_start_symbol, cfg, fp);
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nr_generate_pss(gNB->d_pss, &txdataF[0][txdataF_offset], AMP, ssb_start_symbol, cfg, fp);
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nr_generate_sss(gNB->d_sss, &txdataF[0][txdataF_offset], AMP, ssb_start_symbol, cfg, fp);
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nr_generate_sss(gNB->d_sss, &txdataF[0][txdataF_offset], AMP, ssb_start_symbol, cfg, fp);
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//nr_generate_prs(gNB->nr_gold_prs[n_hf][ssb_index&7],&txdataF[0][txdataF_offset], AMP, ssb_start_symbol, cfg, fp);
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if (cfg->carrier_config.num_tx_ant.value <= 4)
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if (cfg->carrier_config.num_tx_ant.value <= 4)
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nr_generate_pbch_dmrs(gNB->nr_gold_pbch_dmrs[n_hf][ssb_index&7],&txdataF[0][txdataF_offset], AMP, ssb_start_symbol, cfg, fp);
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nr_generate_pbch_dmrs(gNB->nr_gold_pbch_dmrs[n_hf][ssb_index&7],&txdataF[0][txdataF_offset], AMP, ssb_start_symbol, cfg, fp);
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else
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else
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nr_generate_pbch_dmrs(gNB->nr_gold_pbch_dmrs[0][ssb_index&7],&txdataF[0][txdataF_offset], AMP, ssb_start_symbol, cfg, fp);
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nr_generate_pbch_dmrs(gNB->nr_gold_pbch_dmrs[0][ssb_index&7],&txdataF[0][txdataF_offset], AMP, ssb_start_symbol, cfg, fp);
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if (cfg->carrier_config.num_tx_ant.value <= 4)
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nr_generate_prs(gNB->nr_gold_prs[n_hf][ssb_index&7],&txdataF[0][txdataF_offset], AMP, ssb_start_symbol, cfg, fp);
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else
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nr_generate_prs(gNB->nr_gold_prs[0][ssb_index&7],&txdataF[0][txdataF_offset], AMP, ssb_start_symbol, cfg, fp);
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if (T_ACTIVE(T_GNB_PHY_MIB)) {
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if (T_ACTIVE(T_GNB_PHY_MIB)) {
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unsigned char bch[3];
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unsigned char bch[3];
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bch[0] = ssb_pdu.ssb_pdu_rel15.bchPayload & 0xff;
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bch[0] = ssb_pdu.ssb_pdu_rel15.bchPayload & 0xff;
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@@ -154,9 +165,6 @@ void phy_procedures_gNB_TX(PHY_VARS_gNB *gNB,
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n_hf=1;
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n_hf=1;
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if ((cfg->cell_config.frame_duplex_type.value == TDD) &&
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if ((cfg->cell_config.frame_duplex_type.value == TDD) &&
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(nr_slot_select(cfg,frame,slot) == NR_UPLINK_SLOT)) return;
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(nr_slot_select(cfg,frame,slot) == NR_UPLINK_SLOT)) return;
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@@ -234,10 +242,9 @@ void phy_procedures_gNB_TX(PHY_VARS_gNB *gNB,
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// check if we have prs to transmit in this frame and slot
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// check if we have prs to transmit in this frame and slot
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if (cfg->carrier_config.num_tx_ant.value <= 4)
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if (cfg->carrier_config.num_tx_ant.value <= 4)
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nr_generate_prs(gNB->nr_gold_pbch_dmrs[n_hf][ssb_index&7],&txdataF[0][txdataF_offset], AMP, ssb_start_symbol, cfg, fp);
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nr_generate_prs(gNB->nr_gold_prs[n_hf][ssb_index&7],&txdataF[0][txdataF_offset], AMP, ssb_start_symbol, cfg, fp);
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else
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else
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nr_generate_prs(gNB->nr_gold_pbch_dmrs[0][ssb_index&7],&txdataF[0][txdataF_offset], AMP, ssb_start_symbol, cfg, fp);
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nr_generate_prs(gNB->nr_gold_prs[0][ssb_index&7],&txdataF[0][txdataF_offset], AMP, ssb_start_symbol, cfg, fp);
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if (do_meas==1) stop_meas(&gNB->phy_proc_tx);
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if (do_meas==1) stop_meas(&gNB->phy_proc_tx);
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