diff --git a/openair1/PHY/CODING/lte_rate_matching.c b/openair1/PHY/CODING/lte_rate_matching.c
index 69697fc2e0..96663bd8a6 100644
--- a/openair1/PHY/CODING/lte_rate_matching.c
+++ b/openair1/PHY/CODING/lte_rate_matching.c
@@ -36,6 +36,7 @@
 #include <stdlib.h>
 #endif
 #include "PHY/defs.h"
+#include "assertions.h"
 
 //#define cmin(a,b) ((a)<(b) ? (a) : (b))
 
@@ -515,16 +516,14 @@ uint32_t lte_rate_matching_turbo(uint32_t RTC,
   // if (rvidx==3)
   //  for (cnt=0;cnt<Ncb;cnt++)
   //    counter_buffer[rvidx][cnt]=0;
-  if (Ncb<(3*(RTC<<5))) {
-    msg("Exiting, RM condition (Nir %d, Nsoft %d, Kw %d\n",Nir,Nsoft,3*(RTC<<5));
-    return(0);
-  }
+  AssertFatal(Ncb>=(3*RTC<<5),"Exiting, RM condition (Ncb %d, Nir/C %d, Nsoft %d, Kw %d\n",Ncb,Nir/C,Nsoft,3*(RTC<<5));
+  
 
   Gp = G/Nl/Qm;
   GpmodC = Gp%C;
 
 #ifdef RM_DEBUG
-  printf("lte_rate_matching_turbo: Kw %d, rvidx %d, G %d, Qm %d, Nl%d, r %d\n",3*(RTC<<5),rvidx, G, Qm,Nl,r);
+  printf("lte_rate_matching_turbo: Ncb %d, Kw %d, Nir/C %d, rvidx %d, G %d, Qm %d, Nl%d, r %d\n",Ncb,3*(RTC<<5),Nir/C,rvidx, G, Qm,Nl,r);
 #endif
 
   if (r < (C-(GpmodC)))
diff --git a/openair1/PHY/LTE_TRANSPORT/dci.c b/openair1/PHY/LTE_TRANSPORT/dci.c
index 2fd89c8f64..70761ac5ae 100644
--- a/openair1/PHY/LTE_TRANSPORT/dci.c
+++ b/openair1/PHY/LTE_TRANSPORT/dci.c
@@ -2108,14 +2108,14 @@ uint8_t generate_dci_top(uint8_t num_ue_spec_dci,
       if (dci_alloc[i].L == (uint8_t)L) {
 
 #ifdef DEBUG_DCI_ENCODING
-        LOG_I(PHY,"Generating common DCI %d/%d (nCCE %d) of length %d, aggregation %d (%x)\n",i,num_common_dci,dci_alloc[i].nCCE,dci_alloc[i].dci_length,1<<dci_alloc[i].L,
+        LOG_I(PHY,"Generating common DCI %d/%d (nCCE %d) of length %d, aggregation %d (%x)\n",i,num_common_dci,dci_alloc[i].firstCCE,dci_alloc[i].dci_length,1<<dci_alloc[i].L,
               *(unsigned int*)dci_alloc[i].dci_pdu);
         dump_dci(frame_parms,&dci_alloc[i]);
 #endif
 
-        if (dci_alloc[i].nCCE>=0) {
+        if (dci_alloc[i].firstCCE>=0) {
           e_ptr = generate_dci0(dci_alloc[i].dci_pdu,
-                                e+(72*dci_alloc[i].nCCE),
+                                e+(72*dci_alloc[i].firstCCE),
                                 dci_alloc[i].dci_length,
                                 dci_alloc[i].L,
                                 dci_alloc[i].rnti);
@@ -2133,9 +2133,9 @@ uint8_t generate_dci_top(uint8_t num_ue_spec_dci,
         dump_dci(frame_parms,&dci_alloc[i]);
 #endif
 
-        if (dci_alloc[i].nCCE >= 0) {
+        if (dci_alloc[i].firstCCE >= 0) {
           e_ptr = generate_dci0(dci_alloc[i].dci_pdu,
-                                e+(72*dci_alloc[i].nCCE),
+                                e+(72*dci_alloc[i].firstCCE),
                                 dci_alloc[i].dci_length,
                                 dci_alloc[i].L,
                                 dci_alloc[i].rnti);
@@ -2537,13 +2537,116 @@ uint16_t get_nquad(uint8_t num_pdcch_symbols,LTE_DL_FRAME_PARMS *frame_parms,uin
   return(Nreg - 4 - (3*Ngroup_PHICH));
 }
 
-uint16_t get_nCCE_max(uint8_t Mod_id,uint8_t CC_id)
+uint16_t get_nCCE_mac(uint8_t Mod_id,uint8_t CC_id,int num_pdcch_symbols,int subframe)
 {
 
   // check for eNB only !
-  return(get_nCCE(3,&PHY_vars_eNB_g[Mod_id][CC_id]->lte_frame_parms,1)); // 5, 15,21
+  return(get_nCCE(num_pdcch_symbols,
+		  &PHY_vars_eNB_g[Mod_id][CC_id]->lte_frame_parms,
+		  get_mi(&PHY_vars_eNB_g[Mod_id][CC_id]->lte_frame_parms,subframe))); 
 }
 
+
+int get_nCCE_offset_l1(int *CCE_table,
+		       const unsigned char L, 
+		       const int nCCE, 
+		       const int common_dci, 
+		       const unsigned short rnti, 
+		       const unsigned char subframe)
+{
+
+  int search_space_free,m,nb_candidates = 0,l,i;
+  unsigned int Yk;
+   /*
+    printf("CCE Allocation: ");
+    for (i=0;i<nCCE;i++)
+    printf("%d.",CCE_table[i]);
+    printf("\n");
+  */
+  if (common_dci == 1) {
+    // check CCE(0 ... L-1)
+    nb_candidates = (L==4) ? 4 : 2;
+    nb_candidates = min(nb_candidates,nCCE/L);
+
+    //    printf("Common DCI nb_candidates %d, L %d\n",nb_candidates,L);
+
+    for (m = nb_candidates-1 ; m >=0 ; m--) {
+
+      search_space_free = 1;
+      for (l=0; l<L; l++) {
+
+	//	printf("CCE_table[%d] %d\n",(m*L)+l,CCE_table[(m*L)+l]);
+        if (CCE_table[(m*L) + l] == 1) {
+          search_space_free = 0;
+          break;
+        }
+      }
+     
+      if (search_space_free == 1) {
+
+	//	printf("returning %d\n",m*L);
+
+        for (l=0; l<L; l++)
+          CCE_table[(m*L)+l]=1;
+        return(m*L);
+      }
+    }
+
+    return(-1);
+
+  } else { // Find first available in ue specific search space
+    // according to procedure in Section 9.1.1 of 36.213 (v. 8.6)
+    // compute Yk
+    Yk = (unsigned int)rnti;
+
+    for (i=0; i<=subframe; i++)
+      Yk = (Yk*39827)%65537;
+
+    Yk = Yk % (nCCE/L);
+
+
+    switch (L) {
+    case 1:
+    case 2:
+      nb_candidates = 6;
+      break;
+
+    case 4:
+    case 8:
+      nb_candidates = 2;
+      break;
+
+    default:
+      DevParam(L, nCCE, rnti);
+      break;
+    }
+
+
+    LOG_D(MAC,"rnti %x, Yk = %d, nCCE %d (nCCE/L %d),nb_cand %d\n",rnti,Yk,nCCE,nCCE/L,nb_candidates);
+
+    for (m = 0 ; m < nb_candidates ; m++) {
+      search_space_free = 1;
+
+      for (l=0; l<L; l++) {
+        if (CCE_table[(((Yk+m)%(nCCE/L))*L) + l] == 1) {
+          search_space_free = 0;
+          break;
+        }
+      }
+
+      if (search_space_free == 1) {
+        for (l=0; l<L; l++)
+          CCE_table[(((Yk+m)%(nCCE/L))*L)+l]=1;
+
+        return(((Yk+m)%(nCCE/L))*L);
+      }
+    }
+
+    return(-1);
+  }
+}
+
+
 void dci_decoding_procedure0(LTE_UE_PDCCH **lte_ue_pdcch_vars,
 			     int do_common,
 			     uint8_t subframe,
@@ -2691,7 +2794,7 @@ void dci_decoding_procedure0(LTE_UE_PDCCH **lte_ue_pdcch_vars,
         dci_alloc[*dci_cnt].dci_length = sizeof_bits;
         dci_alloc[*dci_cnt].rnti       = crc;
         dci_alloc[*dci_cnt].L          = L;
-        dci_alloc[*dci_cnt].nCCE       = CCEind;
+        dci_alloc[*dci_cnt].firstCCE   = CCEind;
 
         if (sizeof_bytes<=4) {
           dci_alloc[*dci_cnt].dci_pdu[3] = dci_decoded_output[0];
diff --git a/openair1/PHY/LTE_TRANSPORT/dci_tools.c b/openair1/PHY/LTE_TRANSPORT/dci_tools.c
index a77501e14c..b3d2272107 100644
--- a/openair1/PHY/LTE_TRANSPORT/dci_tools.c
+++ b/openair1/PHY/LTE_TRANSPORT/dci_tools.c
@@ -453,7 +453,7 @@ uint32_t conv_1C_RIV(int32_t rballoc,uint32_t N_RB_DL) {
    
 }
 
-int get_prb(int N_RB_DL,int odd_slot,int vrb,int Ngap) {
+uint32_t get_prb(int N_RB_DL,int odd_slot,int vrb,int Ngap) {
 
   int offset;
 
@@ -926,10 +926,15 @@ int generate_eNB_dlsch_params_from_dci(int frame,
         //      printf("FDD 1A: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB);
       }
 
-
       dlsch0_harq = dlsch[0]->harq_processes[harq_pid];
 
-      dlsch0_harq->rb_alloc[0]    = localRIV2alloc_LUT6[rballoc];
+      if (vrb_type==LOCALIZED) {
+	dlsch0_harq->rb_alloc[0]    = localRIV2alloc_LUT6[rballoc];
+      }
+      else {
+	LOG_E(PHY,"Distributed RB allocation not done yet\n");
+	mac_xface->macphy_exit("exiting");
+      }
       dlsch0_harq->vrb_type       = vrb_type;
       dlsch0_harq->nb_rb          = RIV2nb_rb_LUT6[rballoc];//NPRB;
       RIV_max = RIV_max6;
@@ -960,7 +965,14 @@ int generate_eNB_dlsch_params_from_dci(int frame,
 
       dlsch0_harq = dlsch[0]->harq_processes[harq_pid];
 
-      dlsch0_harq->rb_alloc[0]    = localRIV2alloc_LUT25[rballoc];
+      
+      if (vrb_type==LOCALIZED) {
+	dlsch0_harq->rb_alloc[0]    = localRIV2alloc_LUT25[rballoc];
+      }
+      else {
+	LOG_E(PHY,"Distributed RB allocation not done yet\n");
+	mac_xface->macphy_exit("exiting");
+      }
       dlsch0_harq->vrb_type       = vrb_type;
       dlsch0_harq->nb_rb          = RIV2nb_rb_LUT25[rballoc];//NPRB;
       RIV_max                     = RIV_max25;
@@ -987,9 +999,16 @@ int generate_eNB_dlsch_params_from_dci(int frame,
       }
 
       dlsch0_harq = dlsch[0]->harq_processes[harq_pid];
+      if (vrb_type==LOCALIZED) {
+	dlsch0_harq->rb_alloc[0]     = localRIV2alloc_LUT50_0[rballoc];
+	dlsch0_harq->rb_alloc[1]     = localRIV2alloc_LUT50_1[rballoc];
+      }
+      else {
+	LOG_E(PHY,"Distributed RB allocation not done yet\n");
+	mac_xface->macphy_exit("exiting");
+      }
+
 
-      dlsch0_harq->rb_alloc[0]     = localRIV2alloc_LUT50_0[rballoc];
-      dlsch0_harq->rb_alloc[1]     = localRIV2alloc_LUT50_1[rballoc];
       dlsch0_harq->vrb_type        = vrb_type;
       dlsch0_harq->nb_rb                               = RIV2nb_rb_LUT50[rballoc];//NPRB;
       RIV_max = RIV_max50;
@@ -1017,10 +1036,17 @@ int generate_eNB_dlsch_params_from_dci(int frame,
       dlsch0_harq = dlsch[0]->harq_processes[harq_pid];
 
       dlsch0_harq->vrb_type         = vrb_type;
-      dlsch0_harq->rb_alloc[0]      = localRIV2alloc_LUT100_0[rballoc];
-      dlsch0_harq->rb_alloc[1]      = localRIV2alloc_LUT100_1[rballoc];
-      dlsch0_harq->rb_alloc[2]      = localRIV2alloc_LUT100_2[rballoc];
-      dlsch0_harq->rb_alloc[3]      = localRIV2alloc_LUT100_3[rballoc];
+      if (vrb_type==LOCALIZED) {
+	dlsch0_harq->rb_alloc[0]      = localRIV2alloc_LUT100_0[rballoc];
+	dlsch0_harq->rb_alloc[1]      = localRIV2alloc_LUT100_1[rballoc];
+	dlsch0_harq->rb_alloc[2]      = localRIV2alloc_LUT100_2[rballoc];
+	dlsch0_harq->rb_alloc[3]      = localRIV2alloc_LUT100_3[rballoc];
+      }
+      else {
+	LOG_E(PHY,"Distributed RB allocation not done yet\n");
+	mac_xface->macphy_exit("exiting");
+      }
+
 
 
       dlsch0_harq->nb_rb                               = RIV2nb_rb_LUT100[rballoc];//NPRB;
@@ -2644,17 +2670,17 @@ int generate_eNB_dlsch_params_from_dci(int frame,
 #ifdef DEBUG_DCI
 
   if (dlsch0) {
-    msg("dlsch0 eNB: dlsch0   %p\n",dlsch0);
-    msg("dlsch0 eNB: rnti     %x\n",dlsch0->rnti);
-    msg("dlsch0 eNB: NBRB     %d\n",dlsch0_harq->nb_rb);
-    msg("dlsch0 eNB: rballoc  %x\n",dlsch0_harq->rb_alloc[0]);
-    msg("dlsch0 eNB: harq_pid %d\n",harq_pid);
-    msg("dlsch0 eNB: round    %d\n",dlsch0_harq->round);
-    msg("dlsch0 eNB: rvidx    %d\n",dlsch0_harq->rvidx);
-    msg("dlsch0 eNB: TBS      %d (NPRB %d)\n",dlsch0_harq->TBS,NPRB);
-    msg("dlsch0 eNB: mcs      %d\n",dlsch0_harq->mcs);
-    msg("dlsch0 eNB: tpmi %d\n",tpmi);
-    msg("dlsch0 eNB: mimo_mode %d\n",dlsch0_harq->mimo_mode);
+    printf("dlsch0 eNB: dlsch0   %p\n",dlsch0);
+    printf("dlsch0 eNB: rnti     %x\n",dlsch0->rnti);
+    printf("dlsch0 eNB: NBRB     %d\n",dlsch0_harq->nb_rb);
+    printf("dlsch0 eNB: rballoc  %x\n",dlsch0_harq->rb_alloc[0]);
+    printf("dlsch0 eNB: harq_pid %d\n",harq_pid);
+    printf("dlsch0 eNB: round    %d\n",dlsch0_harq->round);
+    printf("dlsch0 eNB: rvidx    %d\n",dlsch0_harq->rvidx);
+    printf("dlsch0 eNB: TBS      %d (NPRB %d)\n",dlsch0_harq->TBS,NPRB);
+    printf("dlsch0 eNB: mcs      %d\n",dlsch0_harq->mcs);
+    printf("dlsch0 eNB: tpmi %d\n",tpmi);
+    printf("dlsch0 eNB: mimo_mode %d\n",dlsch0_harq->mimo_mode);
   }
 
 #endif
@@ -5511,15 +5537,15 @@ int generate_ue_dlsch_params_from_dci(int frame,
 #ifdef DEBUG_DCI
 
   if (dlsch[0]) {
-    msg("PDSCH dlsch0 UE: rnti     %x\n",dlsch[0]->rnti);
-    msg("PDSCH dlsch0 UE: NBRB     %d\n",dlsch0_harq->nb_rb);
-    msg("PDSCH dlsch0 UE: rballoc  %x\n",dlsch0_harq->rb_alloc[0]);
-    msg("PDSCH dlsch0 UE: harq_pid %d\n",harq_pid);
-    msg("PDSCH dlsch0 UE: DCINdi   %d\n",dlsch0_harq->DCINdi);
-    msg("PDSCH dlsch0 UE: rvidx    %d\n",dlsch0_harq->rvidx);
-    msg("PDSCH dlsch0 UE: TBS      %d\n",dlsch0_harq->TBS);
-    msg("PDSCH dlsch0 UE: mcs      %d\n",dlsch0_harq->mcs);
-    msg("PDSCH dlsch0 UE: pwr_off  %d\n",dlsch0_harq->dl_power_off);
+    printf("PDSCH dlsch0 UE: rnti     %x\n",dlsch[0]->rnti);
+    printf("PDSCH dlsch0 UE: NBRB     %d\n",dlsch0_harq->nb_rb);
+    printf("PDSCH dlsch0 UE: rballoc  %x\n",dlsch0_harq->rb_alloc_even[0]);
+    printf("PDSCH dlsch0 UE: harq_pid %d\n",harq_pid);
+    printf("PDSCH dlsch0 UE: DCINdi   %d\n",dlsch0_harq->DCINdi);
+    printf("PDSCH dlsch0 UE: rvidx    %d\n",dlsch0_harq->rvidx);
+    printf("PDSCH dlsch0 UE: TBS      %d\n",dlsch0_harq->TBS);
+    printf("PDSCH dlsch0 UE: mcs      %d\n",dlsch0_harq->mcs);
+    printf("PDSCH dlsch0 UE: pwr_off  %d\n",dlsch0_harq->dl_power_off);
   }
 
 #endif
diff --git a/openair1/PHY/LTE_TRANSPORT/defs.h b/openair1/PHY/LTE_TRANSPORT/defs.h
index 8b23c51079..f25e199e9d 100644
--- a/openair1/PHY/LTE_TRANSPORT/defs.h
+++ b/openair1/PHY/LTE_TRANSPORT/defs.h
@@ -266,6 +266,8 @@ typedef struct {
   uint8_t Mdlharq;
   /// MIMO transmission mode indicator for this sub-frame (for definition see 36-212 V8.6 2009-03, p.17)
   uint8_t Kmimo;
+  /// Nsoft parameter related to UE Category
+  uint32_t Nsoft;
   /// amplitude of PDSCH (compared to RS) in symbols without pilots
   int16_t sqrt_rho_a;
   /// amplitude of PDSCH (compared to RS) in symbols containing pilots
@@ -693,6 +695,8 @@ typedef struct {
   uint8_t Mdlharq;
   /// MIMO transmission mode indicator for this sub-frame (for definition see 36-212 V8.6 2009-03, p.17)
   uint8_t Kmimo;
+  /// Nsoft parameter related to UE Category
+  uint32_t Nsoft;
   /// Maximum number of Turbo iterations
   uint8_t max_turbo_iterations;
   /// accumulated tx power adjustment for PUCCH
@@ -737,7 +741,7 @@ typedef struct {
   /// Aggregation level
   uint8_t L;
   /// Position of first CCE of the dci
-  int nCCE;
+  int firstCCE;
   /// flag to indicate that this is a RA response
   boolean_t ra_flag;
   /// rnti
diff --git a/openair1/PHY/LTE_TRANSPORT/dlsch_coding.c b/openair1/PHY/LTE_TRANSPORT/dlsch_coding.c
index 83066480b4..a2f33f0fb2 100644
--- a/openair1/PHY/LTE_TRANSPORT/dlsch_coding.c
+++ b/openair1/PHY/LTE_TRANSPORT/dlsch_coding.c
@@ -117,7 +117,7 @@ void free_eNB_dlsch(LTE_eNB_DLSCH_t *dlsch)
 
 }
 
-LTE_eNB_DLSCH_t *new_eNB_dlsch(unsigned char Kmimo,unsigned char Mdlharq,unsigned char N_RB_DL, uint8_t abstraction_flag)
+LTE_eNB_DLSCH_t *new_eNB_dlsch(unsigned char Kmimo,unsigned char Mdlharq,uint32_t Nsoft,unsigned char N_RB_DL, uint8_t abstraction_flag)
 {
 
   LTE_eNB_DLSCH_t *dlsch;
@@ -148,6 +148,7 @@ LTE_eNB_DLSCH_t *new_eNB_dlsch(unsigned char Kmimo,unsigned char Mdlharq,unsigne
     bzero(dlsch,sizeof(LTE_eNB_DLSCH_t));
     dlsch->Kmimo = Kmimo;
     dlsch->Mdlharq = Mdlharq;
+    dlsch->Nsoft = Nsoft;
 
     for (i=0; i<10; i++)
       dlsch->harq_ids[i] = Mdlharq;
@@ -395,7 +396,7 @@ int dlsch_encoding(unsigned char *a,
                                         dlsch->harq_processes[harq_pid]->w[r],
                                         dlsch->harq_processes[harq_pid]->e+r_offset,
                                         dlsch->harq_processes[harq_pid]->C, // C
-                                        NSOFT,                    // Nsoft,
+                                        dlsch->Nsoft,                    // Nsoft,
                                         dlsch->Mdlharq,
                                         dlsch->Kmimo,
                                         dlsch->harq_processes[harq_pid]->rvidx,
diff --git a/openair1/PHY/LTE_TRANSPORT/dlsch_decoding.c b/openair1/PHY/LTE_TRANSPORT/dlsch_decoding.c
index 6ab784aa18..efcd868338 100644
--- a/openair1/PHY/LTE_TRANSPORT/dlsch_decoding.c
+++ b/openair1/PHY/LTE_TRANSPORT/dlsch_decoding.c
@@ -81,7 +81,7 @@ void free_ue_dlsch(LTE_UE_DLSCH_t *dlsch)
   }
 }
 
-LTE_UE_DLSCH_t *new_ue_dlsch(uint8_t Kmimo,uint8_t Mdlharq,uint8_t max_turbo_iterations,uint8_t N_RB_DL, uint8_t abstraction_flag)
+LTE_UE_DLSCH_t *new_ue_dlsch(uint8_t Kmimo,uint8_t Mdlharq,uint32_t Nsoft,uint8_t max_turbo_iterations,uint8_t N_RB_DL, uint8_t abstraction_flag)
 {
 
   LTE_UE_DLSCH_t *dlsch;
@@ -113,6 +113,7 @@ LTE_UE_DLSCH_t *new_ue_dlsch(uint8_t Kmimo,uint8_t Mdlharq,uint8_t max_turbo_ite
     memset(dlsch,0,sizeof(LTE_UE_DLSCH_t));
     dlsch->Kmimo = Kmimo;
     dlsch->Mdlharq = Mdlharq;
+    dlsch->Nsoft = Nsoft;
     dlsch->max_turbo_iterations = max_turbo_iterations;
 
     for (i=0; i<Mdlharq; i++) {
@@ -353,7 +354,7 @@ uint32_t  dlsch_decoding(PHY_VARS_UE *phy_vars_ue,
                                    (uint8_t*)&dummy_w[r][0],
                                    dlsch_llr+r_offset,
                                    harq_process->C,
-                                   NSOFT,
+                                   dlsch->Nsoft,
                                    dlsch->Mdlharq,
                                    dlsch->Kmimo,
                                    harq_process->rvidx,
diff --git a/openair1/PHY/LTE_TRANSPORT/dlsch_llr_computation.c b/openair1/PHY/LTE_TRANSPORT/dlsch_llr_computation.c
index a35f89b851..f9f6002970 100644
--- a/openair1/PHY/LTE_TRANSPORT/dlsch_llr_computation.c
+++ b/openair1/PHY/LTE_TRANSPORT/dlsch_llr_computation.c
@@ -662,14 +662,16 @@ int dlsch_qpsk_llr(LTE_DL_FRAME_PARMS *frame_parms,
 
   if ((symbol_mod==0) || (symbol_mod==(4-frame_parms->Ncp))) {
     if (frame_parms->mode1_flag==0)
-      len = (nb_rb*8)- (2*pbch_pss_sss_adjust/3);
+      len = (nb_rb*8) - (2*pbch_pss_sss_adjust/3);
     else
       len = (nb_rb*10) - (5*pbch_pss_sss_adjust/6);
   } else {
     len = (nb_rb*12) - pbch_pss_sss_adjust;
   }
 
+
   //  printf("dlsch_qpsk_llr: symbol %d,nb_rb %d, len %d,pbch_pss_sss_adjust %d\n",symbol,nb_rb,len,pbch_pss_sss_adjust);
+
   for (i=0; i<len; i++) {
     *llr32 = *rxF;
     //    printf("llr %d : (%d,%d)\n",i,((int16_t*)llr32)[0],((int16_t*)llr32)[1]);
diff --git a/openair1/PHY/LTE_TRANSPORT/proto.h b/openair1/PHY/LTE_TRANSPORT/proto.h
index 8f78a6ed8a..9afea790b3 100644
--- a/openair1/PHY/LTE_TRANSPORT/proto.h
+++ b/openair1/PHY/LTE_TRANSPORT/proto.h
@@ -56,15 +56,16 @@ void free_eNB_dlsch(LTE_eNB_DLSCH_t *dlsch);
 
 void clean_eNb_dlsch(LTE_eNB_DLSCH_t *dlsch, uint8_t abstraction_flag);
 
-/** \fn new_eNB_dlsch(uint8_t Kmimo,uint8_t Mdlharq,uint8_t abstraction_flag)
+/** \fn new_eNB_dlsch(uint8_t Kmimo,uint8_t Mdlharq,uint32_t Nsoft,uint8_t abstraction_flag)
     \brief This function allocates structures for a particular DLSCH at eNB
     @returns Pointer to DLSCH to be removed
     @param Kmimo Kmimo factor from 36-212/36-213
     @param Mdlharq Maximum number of HARQ rounds (36-212/36-213)
+    @param Nsoft Soft-LLR buffer size from UE-Category
     @params N_RB_DL total number of resource blocks (determine the operating BW)
     @param abstraction_flag Flag to indicate abstracted interface
 */
-LTE_eNB_DLSCH_t *new_eNB_dlsch(uint8_t Kmimo,uint8_t Mdlharq,uint8_t N_RB_DL, uint8_t abstraction_flag);
+LTE_eNB_DLSCH_t *new_eNB_dlsch(uint8_t Kmimo,uint8_t Mdlharq,uint32_t Nsoft,uint8_t N_RB_DL, uint8_t abstraction_flag);
 
 /** \fn free_ue_dlsch(LTE_UE_DLSCH_t *dlsch)
     \brief This function frees memory allocated for a particular DLSCH at UE
@@ -72,11 +73,16 @@ LTE_eNB_DLSCH_t *new_eNB_dlsch(uint8_t Kmimo,uint8_t Mdlharq,uint8_t N_RB_DL, ui
 */
 void free_ue_dlsch(LTE_UE_DLSCH_t *dlsch);
 
-LTE_eNB_ULSCH_t *new_eNB_ulsch(uint8_t Mdlharq,uint8_t max_turbo_iterations,uint8_t N_RB_UL, uint8_t abstraction_flag);
-
-LTE_UE_DLSCH_t *new_ue_dlsch(uint8_t Kmimo,uint8_t Mdlharq,uint8_t max_turbo_iterations,uint8_t N_RB_DL, uint8_t abstraction_flag);
-
-LTE_UE_ULSCH_t *new_ue_ulsch(unsigned char Mdlharq,unsigned char N_RB_UL, uint8_t abstraction_flag);
+/** \fn new_ue_dlsch(uint8_t Kmimo,uint8_t Mdlharq,uint32_t Nsoft,uint8_t abstraction_flag)
+    \brief This function allocates structures for a particular DLSCH at eNB
+    @returns Pointer to DLSCH to be removed
+    @param Kmimo Kmimo factor from 36-212/36-213
+    @param Mdlharq Maximum number of HARQ rounds (36-212/36-213)
+    @param Nsoft Soft-LLR buffer size from UE-Category
+    @params N_RB_DL total number of resource blocks (determine the operating BW)
+    @param abstraction_flag Flag to indicate abstracted interface
+*/
+LTE_UE_DLSCH_t *new_ue_dlsch(uint8_t Kmimo,uint8_t Mdlharq,uint32_t Nsoft,uint8_t max_turbo_iterations,uint8_t N_RB_DL, uint8_t abstraction_flag);
 
 
 void clean_eNb_ulsch(LTE_eNB_ULSCH_t *ulsch, uint8_t abstraction_flag);
@@ -1233,11 +1239,20 @@ uint32_t get_TBS_DL(uint8_t mcs, uint16_t nb_rb);
 uint32_t get_TBS_UL(uint8_t mcs, uint16_t nb_rb);
 
 /* \brief Return bit-map of resource allocation for a given DCI rballoc (RIV format) and vrb type
+   @param N_RB_DL number of PRB on DL
+   @param indicator for even/odd slot
+   @param vrb vrb index
+   @param Ngap Gap indicator
+*/
+uint32_t get_prb(int N_RB_DL,int odd_slot,int vrb,int Ngap);
+
+/* \brief Return prb for a given vrb index 
    @param vrb_type VRB type (0=localized,1=distributed)
    @param rb_alloc_dci rballoc field from DCI
 */
 uint32_t get_rballoc(vrb_t vrb_type,uint16_t rb_alloc_dci);
 
+
 /* \brief Return bit-map of resource allocation for a given DCI rballoc (RIV format) and vrb type
    @returns Transmission mode (1-7)
 */
@@ -1577,6 +1592,12 @@ uint16_t computeRIV(uint16_t N_RB_DL,uint16_t RBstart,uint16_t Lcrbs);
 
 uint32_t pmi_extend(LTE_DL_FRAME_PARMS *frame_parms,uint8_t wideband_pmi);
 
+int get_nCCE_offset_l1(int *CCE_table,
+		       const unsigned char L, 
+		       const int nCCE, 
+		       const int common_dci, 
+		       const unsigned short rnti, 
+		       const unsigned char subframe);
 
 uint16_t get_nCCE(uint8_t num_pdcch_symbols,LTE_DL_FRAME_PARMS *frame_parms,uint8_t mi);
 
@@ -1584,7 +1605,7 @@ uint16_t get_nquad(uint8_t num_pdcch_symbols,LTE_DL_FRAME_PARMS *frame_parms,uin
 
 uint8_t get_mi(LTE_DL_FRAME_PARMS *frame,uint8_t subframe);
 
-uint16_t get_nCCE_max(uint8_t Mod_id,uint8_t CC_id);
+uint16_t get_nCCE_mac(uint8_t Mod_id,uint8_t CC_id,int num_pdcch_symbols,int subframe);
 
 uint8_t get_num_pdcch_symbols(uint8_t num_dci,DCI_ALLOC_t *dci_alloc,LTE_DL_FRAME_PARMS *frame_parms,uint8_t subframe);
 
diff --git a/openair1/PHY/TOOLS/lte_dfts.c b/openair1/PHY/TOOLS/lte_dfts.c
index c031d5d384..ec4577a67a 100644
--- a/openair1/PHY/TOOLS/lte_dfts.c
+++ b/openair1/PHY/TOOLS/lte_dfts.c
@@ -94,7 +94,7 @@ static inline void cmacc(__m128i a,__m128i b, __m128i *re32, __m128i *im32)
   cmac_tmp    = _mm_sign_epi16(b,*(__m128i*)reflip);
   //  cmac_tmp    = _mm_shufflelo_epi16(b,_MM_SHUFFLE(2,3,0,1));
   //  cmac_tmp    = _mm_shufflehi_epi16(cmac_tmp,_MM_SHUFFLE(2,3,0,1));
-  cmac_tmp = _mm_shuffle_epi8(b,_mm_set_epi8(13,12,15,14,9,8,11,10,5,4,7,6,1,0,3,2));
+  cmac_tmp = _mm_shuffle_epi8(cmac_tmp,_mm_set_epi8(13,12,15,14,9,8,11,10,5,4,7,6,1,0,3,2));
   cmac_tmp_im32  = _mm_madd_epi16(cmac_tmp,a);
 
   *re32 = _mm_add_epi32(*re32,cmac_tmp_re32);
diff --git a/openair1/PHY/impl_defs_top.h b/openair1/PHY/impl_defs_top.h
index 80530c932f..d702754077 100755
--- a/openair1/PHY/impl_defs_top.h
+++ b/openair1/PHY/impl_defs_top.h
@@ -340,13 +340,12 @@ typedef struct {
 #define NUMBER_OF_SUBBANDS_MAX 13
 #define NUMBER_OF_HARQ_PID_MAX 8
 
-#if defined(CBMIMO1) || defined(EXMIMO) || defined(OAI_USRP)
 #define MAX_FRAME_NUMBER 0x400
+#if defined(CBMIMO1) || defined(EXMIMO) || defined(OAI_USRP)
 #define NUMBER_OF_eNB_MAX 1
 #define NUMBER_OF_UE_MAX 4
 #define NUMBER_OF_CONNECTED_eNB_MAX 3
 #else
-#define MAX_FRAME_NUMBER 0xFFFF
 #ifdef LARGE_SCALE
 #define NUMBER_OF_eNB_MAX 2
 #define NUMBER_OF_UE_MAX 120
diff --git a/openair1/SCHED/defs.h b/openair1/SCHED/defs.h
index bebe476dcd..bcf2c213c2 100644
--- a/openair1/SCHED/defs.h
+++ b/openair1/SCHED/defs.h
@@ -399,7 +399,6 @@ uint32_t pdcch_alloc2ul_frame(LTE_DL_FRAME_PARMS *frame_parms,uint32_t frame, ui
 
 uint16_t get_Np(uint8_t N_RB_DL,uint8_t nCCE,uint8_t plus1);
 
-int get_nCCE_offset(unsigned char L, int nCCE, int common_dci, unsigned short rnti, unsigned char subframe);
 
 
 int8_t find_ue(uint16_t rnti, PHY_VARS_eNB *phy_vars_eNB);
diff --git a/openair1/SCHED/phy_procedures_lte_common.c b/openair1/SCHED/phy_procedures_lte_common.c
index ce659a60f8..c51bd82d8a 100755
--- a/openair1/SCHED/phy_procedures_lte_common.c
+++ b/openair1/SCHED/phy_procedures_lte_common.c
@@ -405,8 +405,8 @@ uint8_t get_ack(LTE_DL_FRAME_PARMS *frame_parms,
 
           if (harq_ack[0].send_harq_status == 1)
             o_ACK[1] = harq_ack[0].ack;
-        } else if (harq_ack[8].send_harq_status == 1)
-          o_ACK[0] = harq_ack[8].ack;
+        } else if (harq_ack[0].send_harq_status == 1)
+          o_ACK[0] = harq_ack[0].ack;
 
         status = harq_ack[9].send_harq_status + (harq_ack[0].send_harq_status<<1);
         //printf("Subframe 4, TDD config 3: harq_ack[9] = %d,harq_ack[0] = %d\n",harq_ack[9].ack,harq_ack[0].ack);
diff --git a/openair1/SCHED/phy_procedures_lte_eNb.c b/openair1/SCHED/phy_procedures_lte_eNb.c
index b9cb618ea0..c52d769e2c 100755
--- a/openair1/SCHED/phy_procedures_lte_eNb.c
+++ b/openair1/SCHED/phy_procedures_lte_eNb.c
@@ -296,100 +296,6 @@ int get_ue_active_harq_pid(const uint8_t Mod_id,const uint8_t CC_id,const uint16
 }
 
 
-int CCE_table[800];
-
-void init_nCCE_table(void)
-{
-  memset(CCE_table,0,800*sizeof(int));
-}
-
-
-int get_nCCE_offset(const unsigned char L, const int nCCE, const int common_dci, const unsigned short rnti, const unsigned char subframe)
-{
-
-  int search_space_free,m,nb_candidates = 0,l,i;
-  unsigned int Yk;
-
-  /*
-    printf("CCE Allocation: ");
-    for (i=0;i<nCCE;i++)
-    printf("%d.",CCE_table[i]);
-    printf("\n");
-  */
-  if (common_dci == 1) {
-    // check CCE(0 ... L-1)
-    nb_candidates = (L==4) ? 4 : 2;
-    nb_candidates = min(nb_candidates,nCCE/L);
-
-    for (m = nb_candidates-1 ; m >=0 ; m--) {
-      search_space_free = 1;
-      for (l=0; l<L; l++) {
-        if (CCE_table[(m*L) + l] == 1) {
-          search_space_free = 0;
-          break;
-        }
-      }
-
-      if (search_space_free == 1) {
-        for (l=0; l<L; l++)
-          CCE_table[(m*L)+l]=1;
-        return(m*L);
-      }
-    }
-
-    return(-1);
-
-  } else { // Find first available in ue specific search space
-    // according to procedure in Section 9.1.1 of 36.213 (v. 8.6)
-    // compute Yk
-    Yk = (unsigned int)rnti;
-
-    for (i=0; i<=subframe; i++)
-      Yk = (Yk*39827)%65537;
-
-    Yk = Yk % (nCCE/L);
-
-
-    switch (L) {
-    case 1:
-    case 2:
-      nb_candidates = 6;
-      break;
-
-    case 4:
-    case 8:
-      nb_candidates = 2;
-      break;
-
-    default:
-      DevParam(L, nCCE, rnti);
-      break;
-    }
-
-    //    LOG_I(PHY,"rnti %x, Yk = %d, nCCE %d (nCCE/L %d),nb_cand %d\n",rnti,Yk,nCCE,nCCE/L,nb_candidates);
-
-    for (m = 0 ; m < nb_candidates ; m++) {
-      search_space_free = 1;
-
-      for (l=0; l<L; l++) {
-        if (CCE_table[(((Yk+m)%(nCCE/L))*L) + l] == 1) {
-          search_space_free = 0;
-          break;
-        }
-      }
-
-      if (search_space_free == 1) {
-        for (l=0; l<L; l++)
-          CCE_table[(((Yk+m)%(nCCE/L))*L)+l]=1;
-
-        return(((Yk+m)%(nCCE/L))*L);
-      }
-    }
-
-    return(-1);
-  }
-}
-
 int16_t get_target_pusch_rx_power(const module_id_t module_idP, const uint8_t CC_id)
 {
   //return PHY_vars_eNB_g[module_idP][CC_id]->PHY_measurements_eNB[0].n0_power_tot_dBm;
@@ -1811,15 +1717,18 @@ void phy_procedures_eNB_TX(unsigned char sched_subframe,PHY_VARS_eNB *phy_vars_e
     phy_vars_eNB->dlsch_eNB[i][0]->subframe_tx[subframe] = 0;
   }
 
-  init_nCCE_table();
+  //  init_nCCE_table();
 
-  num_pdcch_symbols = get_num_pdcch_symbols(DCI_pdu->Num_common_dci + DCI_pdu->Num_ue_spec_dci,
-                      DCI_pdu->dci_alloc,
-                      &phy_vars_eNB->lte_frame_parms,
-                      subframe);
+  num_pdcch_symbols = DCI_pdu->num_pdcch_symbols;
+  /*get_num_pdcch_symbols(DCI_pdu->Num_common_dci + DCI_pdu->Num_ue_spec_dci,
+    DCI_pdu->dci_alloc,
+    &phy_vars_eNB->lte_frame_parms,
+    subframe);*/
+  /*
   DCI_pdu->nCCE = get_nCCE(num_pdcch_symbols,
                            &phy_vars_eNB->lte_frame_parms,
-                           get_mi(&phy_vars_eNB->lte_frame_parms,subframe));
+                           get_mi(&phy_vars_eNB->lte_frame_parms,subframe));*/
+
   LOG_D(PHY,"num_pdcch_symbols %"PRIu8", nCCE %u (dci commond %"PRIu8", dci uespec %"PRIu8"\n",num_pdcch_symbols,DCI_pdu->nCCE,
         DCI_pdu->Num_common_dci,DCI_pdu->Num_ue_spec_dci);
 
@@ -1835,6 +1744,7 @@ void phy_procedures_eNB_TX(unsigned char sched_subframe,PHY_VARS_eNB *phy_vars_e
 #endif
 
   for (i=0; i<DCI_pdu->Num_common_dci + DCI_pdu->Num_ue_spec_dci ; i++) {
+    LOG_D(PHY,"[eNB] Subframe %d: DCI %d/%d : rnti %x, CCEind %d\n",subframe,i,DCI_pdu->Num_common_dci+DCI_pdu->Num_ue_spec_dci,DCI_pdu->dci_alloc[i].rnti,DCI_pdu->dci_alloc[i].firstCCE);
 #ifdef DEBUG_PHY_PROC
 
     if (DCI_pdu->dci_alloc[i].rnti != SI_RNTI) {
@@ -1862,28 +1772,21 @@ void phy_procedures_eNB_TX(unsigned char sched_subframe,PHY_VARS_eNB *phy_vars_e
                                          phy_vars_eNB->eNB_UE_stats[0].DL_pmi_single);
 
 
-      int result = get_nCCE_offset(1<<DCI_pdu->dci_alloc[i].L, DCI_pdu->nCCE, 1, SI_RNTI, subframe);
-      phy_vars_eNB->dlsch_eNB_SI->nCCE[subframe] = result;
-
-      if (result == -1) {
-        // FIXME what happens to phy_vars_eNB->dlsch_eNB_SI->nCCE[subframe]?
-        LOG_E(PHY,"[eNB %"PRIu8"] Frame %d subframe %d : No available CCE resources for common DCI (SI)!!!\n",phy_vars_eNB->Mod_id,phy_vars_eNB->proc[sched_subframe].frame_tx,subframe);
-      } else {
-        LOG_T(PHY,"[eNB %"PRIu8"] Frame %d subframe %d : CCE resource for common DCI (SI)  => %"PRIu8"/%u\n",phy_vars_eNB->Mod_id,phy_vars_eNB->proc[sched_subframe].frame_tx,subframe,
-              phy_vars_eNB->dlsch_eNB_SI->nCCE[subframe],DCI_pdu->nCCE);
+      phy_vars_eNB->dlsch_eNB_SI->nCCE[subframe] = DCI_pdu->dci_alloc[i].firstCCE;
 
+      LOG_T(PHY,"[eNB %"PRIu8"] Frame %d subframe %d : CCE resource for common DCI (SI)  => %"PRIu8"/%u\n",phy_vars_eNB->Mod_id,phy_vars_eNB->proc[sched_subframe].frame_tx,subframe,
+	    phy_vars_eNB->dlsch_eNB_SI->nCCE[subframe],DCI_pdu->nCCE);
+      
 #if defined(SMBV) && !defined(EXMIMO)
 
-        // configure SI DCI
-        if (smbv_is_config_frame(phy_vars_eNB->proc[sched_subframe].frame_tx) && (smbv_frame_cnt < 4)) {
-          msg("[SMBV] Frame %3d, SI in SF %d DCI %"PRIu32"\n",phy_vars_eNB->proc[sched_subframe].frame_tx,subframe,i);
-          smbv_configure_common_dci(smbv_fname,(smbv_frame_cnt*10) + (subframe), "SI", &DCI_pdu->dci_alloc[i], i);
-        }
-
-#endif
+      // configure SI DCI
+      if (smbv_is_config_frame(phy_vars_eNB->proc[sched_subframe].frame_tx) && (smbv_frame_cnt < 4)) {
+	msg("[SMBV] Frame %3d, SI in SF %d DCI %"PRIu32"\n",phy_vars_eNB->proc[sched_subframe].frame_tx,subframe,i);
+	smbv_configure_common_dci(smbv_fname,(smbv_frame_cnt*10) + (subframe), "SI", &DCI_pdu->dci_alloc[i], i);
       }
-
-      DCI_pdu->dci_alloc[i].nCCE = phy_vars_eNB->dlsch_eNB_SI->nCCE[subframe];
+      
+#endif
+      
 
     } else if (DCI_pdu->dci_alloc[i].ra_flag == 1) {
 #ifdef DEBUG_PHY_PROC
@@ -1904,28 +1807,20 @@ void phy_procedures_eNB_TX(unsigned char sched_subframe,PHY_VARS_eNB *phy_vars_e
 
       //    mac_xface->macphy_exit("Transmitted RAR, exiting\n");
 
-      int result = get_nCCE_offset(1<<DCI_pdu->dci_alloc[i].L, DCI_pdu->nCCE, 1, DCI_pdu->dci_alloc[i].rnti, subframe);
-      phy_vars_eNB->dlsch_eNB_ra->nCCE[subframe] = result;
 
-      if (result == -1) {
-        // FIXME what happens to phy_vars_eNB->dlsch_eNB_ra->nCCE[subframe]?
-        LOG_E(PHY,"[eNB %"PRIu8"] Frame %d subframe %d : No available CCE resources for common DCI (RA) !!!\n",phy_vars_eNB->Mod_id,phy_vars_eNB->proc[sched_subframe].frame_tx,subframe);
-      } else {
-        LOG_D(PHY,"[eNB %"PRIu8"] Frame %d subframe %d : CCE resource for common DCI (RA)  => %"PRIu8"/%u\n",phy_vars_eNB->Mod_id,phy_vars_eNB->proc[sched_subframe].frame_tx,subframe,
-              phy_vars_eNB->dlsch_eNB_ra->nCCE[subframe],DCI_pdu->nCCE);
+      phy_vars_eNB->dlsch_eNB_ra->nCCE[subframe] = DCI_pdu->dci_alloc[i].firstCCE;
+
+      LOG_D(PHY,"[eNB %"PRIu8"] Frame %d subframe %d : CCE resource for common DCI (RA)  => %"PRIu8"/%u\n",phy_vars_eNB->Mod_id,phy_vars_eNB->proc[sched_subframe].frame_tx,subframe,
+	    phy_vars_eNB->dlsch_eNB_ra->nCCE[subframe],DCI_pdu->nCCE);
 #if defined(SMBV) && !defined(EXMIMO)
 
-        // configure RA DCI
-        if (smbv_is_config_frame(phy_vars_eNB->proc[sched_subframe].frame_tx) && (smbv_frame_cnt < 4)) {
-          msg("[SMBV] Frame %3d, RA in SF %d DCI %"PRIu32"\n",phy_vars_eNB->proc[sched_subframe].frame_tx,subframe,i);
-          smbv_configure_common_dci(smbv_fname,(smbv_frame_cnt*10) + (subframe), "RA", &DCI_pdu->dci_alloc[i], i);
-        }
-
-#endif
-
+      // configure RA DCI
+      if (smbv_is_config_frame(phy_vars_eNB->proc[sched_subframe].frame_tx) && (smbv_frame_cnt < 4)) {
+	msg("[SMBV] Frame %3d, RA in SF %d DCI %"PRIu32"\n",phy_vars_eNB->proc[sched_subframe].frame_tx,subframe,i);
+	smbv_configure_common_dci(smbv_fname,(smbv_frame_cnt*10) + (subframe), "RA", &DCI_pdu->dci_alloc[i], i);
       }
 
-      DCI_pdu->dci_alloc[i].nCCE = phy_vars_eNB->dlsch_eNB_ra->nCCE[subframe];
+#endif
 
     }
 
@@ -1966,30 +1861,22 @@ void phy_procedures_eNB_TX(unsigned char sched_subframe,PHY_VARS_eNB *phy_vars_e
         LOG_D(PHY,"[eNB %"PRIu8"][PDSCH %"PRIx16"/%"PRIu8"] Frame %d subframe %d: Generated dlsch params\n",
               phy_vars_eNB->Mod_id,DCI_pdu->dci_alloc[i].rnti,phy_vars_eNB->dlsch_eNB[(uint8_t)UE_id][0]->current_harq_pid,phy_vars_eNB->proc[sched_subframe].frame_tx,subframe);
 
-        int result = get_nCCE_offset(1<<DCI_pdu->dci_alloc[i].L, DCI_pdu->nCCE, 0, DCI_pdu->dci_alloc[i].rnti, subframe);
-        phy_vars_eNB->dlsch_eNB[(uint8_t)UE_id][0]->nCCE[subframe] = result;
 
-        if (result == -1) {
-          // FIXME what happens to phy_vars_eNB->dlsch_eNB[(uint8_t)UE_id][0]->nCCE[subframe]?
-          LOG_E(PHY,"[eNB %"PRIu8"] Frame %d subframe %d : No available CCE resources for UE spec DCI (PDSCH %"PRIx16") !!!\n",
-                phy_vars_eNB->Mod_id,phy_vars_eNB->proc[sched_subframe].frame_tx,subframe,DCI_pdu->dci_alloc[i].rnti);
-        } else {
-          LOG_D(PHY,"[eNB %"PRIu8"] Frame %d subframe %d : CCE resource for ue DCI (PDSCH %"PRIx16")  => %"PRIu8"/%u\n",phy_vars_eNB->Mod_id,phy_vars_eNB->proc[sched_subframe].frame_tx,subframe,
-                DCI_pdu->dci_alloc[i].rnti,phy_vars_eNB->dlsch_eNB[(uint8_t)UE_id][0]->nCCE[subframe],DCI_pdu->nCCE);
+        phy_vars_eNB->dlsch_eNB[(uint8_t)UE_id][0]->nCCE[subframe] = DCI_pdu->dci_alloc[i].firstCCE;
+
+	LOG_D(PHY,"[eNB %"PRIu8"] Frame %d subframe %d : CCE resource for ue DCI (PDSCH %"PRIx16")  => %"PRIu8"/%u\n",phy_vars_eNB->Mod_id,phy_vars_eNB->proc[sched_subframe].frame_tx,subframe,
+	      DCI_pdu->dci_alloc[i].rnti,phy_vars_eNB->dlsch_eNB[(uint8_t)UE_id][0]->nCCE[subframe],DCI_pdu->nCCE);
 
 #if defined(SMBV) && !defined(EXMIMO)
-          DCI_pdu->dci_alloc[i].nCCE = phy_vars_eNB->dlsch_eNB[(uint8_t)UE_id][0]->nCCE[subframe];
-
-          // configure UE-spec DCI
-          if (smbv_is_config_frame(phy_vars_eNB->proc[sched_subframe].frame_tx) && (smbv_frame_cnt < 4)) {
-            msg("[SMBV] Frame %3d, PDSCH in SF %d DCI %"PRIu32"\n",phy_vars_eNB->proc[sched_subframe].frame_tx,subframe,i);
-            smbv_configure_ue_spec_dci(smbv_fname,(smbv_frame_cnt*10) + (subframe), UE_id+1, &DCI_pdu->dci_alloc[i], i);
-          }
+	
+	// configure UE-spec DCI
+	if (smbv_is_config_frame(phy_vars_eNB->proc[sched_subframe].frame_tx) && (smbv_frame_cnt < 4)) {
+	  msg("[SMBV] Frame %3d, PDSCH in SF %d DCI %"PRIu32"\n",phy_vars_eNB->proc[sched_subframe].frame_tx,subframe,i);
+	  smbv_configure_ue_spec_dci(smbv_fname,(smbv_frame_cnt*10) + (subframe), UE_id+1, &DCI_pdu->dci_alloc[i], i);
+	}
 
 #endif
-        }
 
-        DCI_pdu->dci_alloc[i].nCCE = phy_vars_eNB->dlsch_eNB[(uint8_t)UE_id][0]->nCCE[subframe];
 #ifdef DEBUG_PHY_PROC
         //if (phy_vars_eNB->proc[sched_subframe].frame_tx%100 == 0)
         LOG_D(PHY,"[eNB %"PRIu8"][DCI][PDSCH %"PRIx16"] Frame %d subframe %d UE_id %"PRId8" Generated DCI format %d, aggregation %d\n",
@@ -2067,29 +1954,21 @@ void phy_procedures_eNB_TX(unsigned char sched_subframe,PHY_VARS_eNB *phy_vars_e
                                          CBA_RNTI,
                                          0);  // do_srs
 
-      if ((DCI_pdu->dci_alloc[i].nCCE=get_nCCE_offset(1<<DCI_pdu->dci_alloc[i].L,
-                                      DCI_pdu->nCCE,
-                                      0,
-                                      DCI_pdu->dci_alloc[i].rnti,
-                                      subframe)) == -1) {
-        LOG_E(PHY,"[eNB %"PRIu8"] Frame %d subframe %d : No available CCE resources (%u) for UE spec DCI (PUSCH %"PRIx16") !!!\n",
-              phy_vars_eNB->Mod_id,phy_vars_eNB->proc[sched_subframe].frame_tx,subframe,DCI_pdu->nCCE,DCI_pdu->dci_alloc[i].rnti);
-      } else {
-        LOG_T(PHY,"[eNB %"PRIu8"] Frame %d subframe %d : CCE resources for UE spec DCI (PUSCH %"PRIx16") => %d/%u\n",
-              phy_vars_eNB->Mod_id,phy_vars_eNB->proc[sched_subframe].frame_tx,subframe,DCI_pdu->dci_alloc[i].rnti,
-              DCI_pdu->dci_alloc[i].nCCE,DCI_pdu->nCCE);
-
+      LOG_T(PHY,"[eNB %"PRIu8"] Frame %d subframe %d : CCE resources for UE spec DCI (PUSCH %"PRIx16") => %d/%u\n",
+	    phy_vars_eNB->Mod_id,phy_vars_eNB->proc[sched_subframe].frame_tx,subframe,DCI_pdu->dci_alloc[i].rnti,
+	    DCI_pdu->dci_alloc[i].firstCCE,DCI_pdu->nCCE);
+      
 #if defined(SMBV) && !defined(EXMIMO)
 
         // configure UE-spec DCI for UL Grant
-        if (smbv_is_config_frame(phy_vars_eNB->proc[sched_subframe].frame_tx) && (smbv_frame_cnt < 4)) {
-          msg("[SMBV] Frame %3d, SF %d UL DCI %"PRIu32"\n",phy_vars_eNB->proc[sched_subframe].frame_tx,subframe,i);
-          smbv_configure_ue_spec_dci(smbv_fname,(smbv_frame_cnt*10) + (subframe), UE_id+1, &DCI_pdu->dci_alloc[i], i);
-        }
-
+      if (smbv_is_config_frame(phy_vars_eNB->proc[sched_subframe].frame_tx) && (smbv_frame_cnt < 4)) {
+	msg("[SMBV] Frame %3d, SF %d UL DCI %"PRIu32"\n",phy_vars_eNB->proc[sched_subframe].frame_tx,subframe,i);
+	smbv_configure_ue_spec_dci(smbv_fname,(smbv_frame_cnt*10) + (subframe), UE_id+1, &DCI_pdu->dci_alloc[i], i);
+      }
+      
 #endif
 
-      }
+      
 
 #ifdef DEBUG_PHY_PROC
       LOG_D(PHY,"[eNB %"PRIu8"][PUSCH %"PRIu8"] frame %d subframe %d Setting subframe_scheduling_flag for UE %"PRIu32" harq_pid %"PRIu8" (ul subframe %"PRIu8")\n",
@@ -2120,13 +1999,13 @@ void phy_procedures_eNB_TX(unsigned char sched_subframe,PHY_VARS_eNB *phy_vars_e
   }
 
   if (abstraction_flag == 0) {
-#ifdef DEBUG_PHY_PROC
+    //#ifdef DEBUG_PHY_PROC
 
     if (DCI_pdu->Num_ue_spec_dci+DCI_pdu->Num_common_dci > 0)
       LOG_D(PHY,"[eNB %"PRIu8"] Frame %d, subframe %d: Calling generate_dci_top (pdcch) (common %"PRIu8",ue_spec %"PRIu8")\n",phy_vars_eNB->Mod_id,phy_vars_eNB->proc[sched_subframe].frame_tx, subframe,
             DCI_pdu->Num_common_dci,DCI_pdu->Num_ue_spec_dci);
 
-#endif
+    //#endif
 
     //    for (sect_id=0;sect_id<number_of_cards;sect_id++)
     num_pdcch_symbols = generate_dci_top(DCI_pdu->Num_ue_spec_dci,
@@ -2409,7 +2288,7 @@ void phy_procedures_eNB_TX(unsigned char sched_subframe,PHY_VARS_eNB *phy_vars_e
       input_buffer_length = phy_vars_eNB->dlsch_eNB[(uint8_t)UE_id][0]->harq_processes[harq_pid]->TBS/8;
 
 
-#ifdef DEBUG_PHY_PROC
+      //#ifdef DEBUG_PHY_PROC
       LOG_D(PHY,
             "[eNB %"PRIu8"][PDSCH %"PRIx16"/%"PRIu8"] Frame %d, subframe %d: Generating PDSCH/DLSCH with input size = %"PRIu16", G %d, nb_rb %"PRIu16", mcs %"PRIu8", pmi_alloc %"PRIx16", rv %"PRIu8" (round %"PRIu8")\n",
             phy_vars_eNB->Mod_id, phy_vars_eNB->dlsch_eNB[(uint8_t)UE_id][0]->rnti,harq_pid,
@@ -2425,7 +2304,7 @@ void phy_procedures_eNB_TX(unsigned char sched_subframe,PHY_VARS_eNB *phy_vars_e
             pmi2hex_2Ar1(phy_vars_eNB->dlsch_eNB[(uint8_t)UE_id][0]->harq_processes[harq_pid]->pmi_alloc),
             phy_vars_eNB->dlsch_eNB[(uint8_t)UE_id][0]->harq_processes[harq_pid]->rvidx,
             phy_vars_eNB->dlsch_eNB[(uint8_t)UE_id][0]->harq_processes[harq_pid]->round);
-#endif
+      //#endif
 #if defined(MESSAGE_CHART_GENERATOR_PHY)
       MSC_LOG_TX_MESSAGE(
         MSC_PHY_ENB,MSC_PHY_UE,
@@ -3445,7 +3324,7 @@ void phy_procedures_eNB_RX(const unsigned char sched_subframe,PHY_VARS_eNB *phy_
         }
       }
 
-#ifdef DEBUG_PHY_PROC
+      //#ifdef DEBUG_PHY_PROC
       LOG_D(PHY,
             "[eNB %d][PUSCH %d] Frame %d Subframe %d Demodulating PUSCH: dci_alloc %d, rar_alloc %d, round %d, first_rb %d, nb_rb %d, mcs %d, TBS %d, rv %d, cyclic_shift %d (n_DMRS2 %d, cyclicShift_common %d, nprs %d), O_ACK %d \n",
             phy_vars_eNB->Mod_id,harq_pid,frame,subframe,
@@ -3462,7 +3341,7 @@ void phy_procedures_eNB_RX(const unsigned char sched_subframe,PHY_VARS_eNB *phy_
             phy_vars_eNB->lte_frame_parms.pusch_config_common.ul_ReferenceSignalsPUSCH.cyclicShift,
             nPRS,
             phy_vars_eNB->ulsch_eNB[i]->harq_processes[harq_pid]->O_ACK);
-#endif
+      //#endif
       start_meas(&phy_vars_eNB->ulsch_demodulation_stats);
 
       if (abstraction_flag==0) {
@@ -3508,7 +3387,7 @@ void phy_procedures_eNB_RX(const unsigned char sched_subframe,PHY_VARS_eNB *phy_
 #endif
       stop_meas(&phy_vars_eNB->ulsch_decoding_stats);
 
-#ifdef DEBUG_PHY_PROC
+      //#ifdef DEBUG_PHY_PROC
       LOG_D(PHY,"[eNB %d][PUSCH %d] frame %d subframe %d RNTI %x RX power (%d,%d) RSSI (%d,%d) N0 (%d,%d) dB ACK (%d,%d), decoding iter %d\n",
             phy_vars_eNB->Mod_id,harq_pid,
             frame,subframe,
@@ -3522,7 +3401,7 @@ void phy_procedures_eNB_RX(const unsigned char sched_subframe,PHY_VARS_eNB *phy_
             phy_vars_eNB->ulsch_eNB[i]->harq_processes[harq_pid]->o_ACK[0],
             phy_vars_eNB->ulsch_eNB[i]->harq_processes[harq_pid]->o_ACK[1],
             ret);
-#endif //DEBUG_PHY_PROC
+      //#endif //DEBUG_PHY_PROC
       /*
       if ((two_ues_connected==1) && (phy_vars_eNB->cooperation_flag==2)) {
       for (j=0;j<phy_vars_eNB->lte_frame_parms.nb_antennas_rx;j++) {
@@ -3744,11 +3623,11 @@ void phy_procedures_eNB_RX(const unsigned char sched_subframe,PHY_VARS_eNB *phy_
 
         if (phy_vars_eNB->ulsch_eNB[i]->Msg3_flag == 1) {
 #ifdef OPENAIR2
-#ifdef DEBUG_PHY_PROC
+	  //#ifdef DEBUG_PHY_PROC
           LOG_I(PHY,"[eNB %d][RAPROC] Frame %d Terminating ra_proc for harq %d, UE %d\n",
                 phy_vars_eNB->Mod_id,
                 frame,harq_pid,i);
-#endif
+	  //#endif
           mac_xface->rx_sdu(phy_vars_eNB->Mod_id,
                             phy_vars_eNB->CC_id,
                             frame,subframe,
@@ -3781,9 +3660,9 @@ void phy_procedures_eNB_RX(const unsigned char sched_subframe,PHY_VARS_eNB *phy_
           phy_vars_eNB->eNB_UE_stats[i].mode = PUSCH;
           phy_vars_eNB->ulsch_eNB[i]->Msg3_flag = 0;
 
-#ifdef DEBUG_PHY_PROC
-          LOG_D(PHY,"[eNB %d][RAPROC] Frame %d : RX Subframe %d Setting UE %d mode to PUSCH\n",phy_vars_eNB->Mod_id,frame,subframe,i);
-#endif //DEBUG_PHY_PROC
+	  //#ifdef DEBUG_PHY_PROC
+	    LOG_D(PHY,"[eNB %d][RAPROC] Frame %d : RX Subframe %d Setting UE %d mode to PUSCH\n",phy_vars_eNB->Mod_id,frame,subframe,i);
+	    //#endif //DEBUG_PHY_PROC
 
           for (k=0; k<8; k++) { //harq_processes
             for (j=0; j<phy_vars_eNB->dlsch_eNB[i][0]->Mdlharq; j++) {
@@ -4638,11 +4517,11 @@ void phy_procedures_eNB_lte(unsigned char subframe,PHY_VARS_eNB **phy_vars_eNB,u
     phy_vars_eNB[CC_id]->proc[subframe].frame_tx++;
     phy_vars_eNB[CC_id]->proc[subframe].frame_rx++;
 
-    if (phy_vars_eNB[CC_id]->proc[subframe].frame_tx==MAX_FRAME_NUMBER) // defined in impl_defs_top.h
-      phy_vars_eNB[CC_id]->proc[subframe].frame_tx=0;
+    if (phy_vars_eNB[CC_id]->proc[subframe].frame_tx>=MAX_FRAME_NUMBER) // defined in impl_defs_top.h
+      phy_vars_eNB[CC_id]->proc[subframe].frame_tx-=MAX_FRAME_NUMBER;
 
-    if (phy_vars_eNB[CC_id]->proc[subframe].frame_rx==MAX_FRAME_NUMBER)
-      phy_vars_eNB[CC_id]->proc[subframe].frame_rx=0;
+    if (phy_vars_eNB[CC_id]->proc[subframe].frame_rx>=MAX_FRAME_NUMBER)
+      phy_vars_eNB[CC_id]->proc[subframe].frame_rx-=MAX_FRAME_NUMBER;
   }
 
   VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_ENB_LTE,0);
diff --git a/openair1/SCHED/phy_procedures_lte_ue.c b/openair1/SCHED/phy_procedures_lte_ue.c
index 7dcd71ce47..bc7c5e9479 100755
--- a/openair1/SCHED/phy_procedures_lte_ue.c
+++ b/openair1/SCHED/phy_procedures_lte_ue.c
@@ -168,7 +168,7 @@ void dump_dlsch_SI(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t subframe)
                                   1,
                                   phy_vars_ue->lte_ue_pdcch_vars[eNB_id]->num_pdcch_symbols,
                                   phy_vars_ue->frame_rx,subframe);
-  LOG_I(PHY,"[UE %d] Dumping dlsch_SI : ofdm_symbol_size %d, nsymb %d, nb_rb %d, mcs %d, nb_rb %d, num_pdcch_symbols %d,G %d\n",
+  LOG_D(PHY,"[UE %d] Dumping dlsch_SI : ofdm_symbol_size %d, nsymb %d, nb_rb %d, mcs %d, nb_rb %d, num_pdcch_symbols %d,G %d\n",
         phy_vars_ue->Mod_id,
 	phy_vars_ue->lte_frame_parms.ofdm_symbol_size,
 	nsymb,
@@ -2061,9 +2061,9 @@ int lte_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_UE *phy_vars_ue,uint8_t abst
 
 #endif
 
-#ifdef DEBUG_PHY_PROC
+  //#ifdef DEBUG_PHY_PROC
   LOG_D(PHY,"[UE  %d] Frame %d, slot %d, Mode %s: DCI found %i\n",phy_vars_ue->Mod_id,frame_rx,slot_rx,mode_string[phy_vars_ue->UE_mode[eNB_id]],dci_cnt);
-#endif
+  //#endif
 
   phy_vars_ue->lte_ue_pdcch_vars[eNB_id]->dci_received += dci_cnt;
   /*
@@ -2101,10 +2101,10 @@ int lte_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_UE *phy_vars_ue,uint8_t abst
 
 #ifdef DEBUG_PHY_PROC
 
-    if (subframe_rx == 9) { //( frame_rx % 100 == 0)   {
+    //    if (subframe_rx == 9) { //( frame_rx % 100 == 0)   {
       LOG_D(PHY,"frame %d, subframe %d, rnti %x: dci %d/%d\n",frame_rx,subframe_rx,phy_vars_ue->lte_ue_pdcch_vars[eNB_id]->crnti,i,dci_cnt);
       //dump_dci(&phy_vars_ue->lte_frame_parms, &dci_alloc_rx[i]);
-    }
+      //    }
 
 #endif
 
@@ -2444,7 +2444,7 @@ int phy_procedures_UE_RX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstrac
     else
       openair_daq_vars.use_ia_receiver = (openair_daq_vars.use_ia_receiver+1)%3;
 
-    LOG_I(PHY,"[MYEMOS] frame %d, IA receiver %d, MCS %d, bitrate %d\n",
+    LOG_D(PHY,"[MYEMOS] frame %d, IA receiver %d, MCS %d, bitrate %d\n",
           frame_rx,
           openair_daq_vars.use_ia_receiver,
           phy_vars_ue->dlsch_ue[eNB_id][0]->harq_processes[phy_vars_ue->dlsch_ue[eNB_id][0]->current_harq_pid]->mcs,
@@ -2622,13 +2622,13 @@ int phy_procedures_UE_RX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstrac
 
         phy_vars_ue->dlsch_ue[eNB_id][0]->active = 0;
 
-#ifdef DEBUG_PHY_PROC
+	//#ifdef DEBUG_PHY_PROC
         LOG_D(PHY,"[UE  %d][PDSCH %x/%d] Frame %d subframe %d Scheduling DLSCH decoding\n",
               phy_vars_ue->Mod_id,
               phy_vars_ue->dlsch_ue[eNB_id][0]->rnti,
               harq_pid,
               (subframe_prev == 9) ? (frame_rx-1) : frame_rx,subframe_prev);
-#endif
+	//#endif
 
         if (phy_vars_ue->dlsch_ue[eNB_id][0]) {
           if (abstraction_flag == 0) {
@@ -2674,17 +2674,18 @@ int phy_procedures_UE_RX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstrac
           if (ret == (1+phy_vars_ue->dlsch_ue[eNB_id][0]->max_turbo_iterations)) {
             phy_vars_ue->dlsch_errors[eNB_id]++;
 
-#ifdef DEBUG_PHY_PROC
-            LOG_D(PHY,"[UE  %d][PDSCH %x/%d] Frame %d subframe %d DLSCH in error (rv %d,mcs %d)\n",
+	    //#ifdef DEBUG_PHY_PROC
+            LOG_D(PHY,"[UE  %d][PDSCH %x/%d] Frame %d subframe %d DLSCH in error (rv %d,mcs %d,TBS %d)\n",
                   phy_vars_ue->Mod_id,phy_vars_ue->dlsch_ue[eNB_id][0]->rnti,
                   harq_pid,frame_rx,subframe_prev,
                   phy_vars_ue->dlsch_ue[eNB_id][0]->harq_processes[harq_pid]->rvidx,
-                  phy_vars_ue->dlsch_ue[eNB_id][0]->harq_processes[harq_pid]->mcs);
+                  phy_vars_ue->dlsch_ue[eNB_id][0]->harq_processes[harq_pid]->mcs,
+                  phy_vars_ue->dlsch_ue[eNB_id][0]->harq_processes[harq_pid]->TBS);
 
             //      if (abstraction_flag ==0 )
-            //dump_dlsch(phy_vars_ue,eNB_id,subframe_prev,harq_pid);
-            //mac_xface->macphy_exit("");
-#endif
+            dump_dlsch(phy_vars_ue,eNB_id,subframe_prev,harq_pid);
+            mac_xface->macphy_exit("");
+	    //#endif
           } else {
             LOG_D(PHY,"[UE  %d][PDSCH %x/%d] Frame %d subframe %d (slot_rx %d): Received DLSCH (rv %d,mcs %d,TBS %d)\n",
                   phy_vars_ue->Mod_id,phy_vars_ue->dlsch_ue[eNB_id][0]->rnti,
@@ -2799,7 +2800,7 @@ int phy_procedures_UE_RX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstrac
                     frame_rx,subframe_prev);
 
 #ifdef DEBUG_PHY_PROC
-            LOG_I(PHY,"Decoding DLSCH_SI : rb_alloc %x : nb_rb %d G %d TBS %d, num_pdcch_sym %d\n",phy_vars_ue->dlsch_ue_SI[eNB_id]->harq_processes[0]->rb_alloc_even[0],
+            LOG_D(PHY,"Decoding DLSCH_SI : rb_alloc %x : nb_rb %d G %d TBS %d, num_pdcch_sym %d\n",phy_vars_ue->dlsch_ue_SI[eNB_id]->harq_processes[0]->rb_alloc_even[0],
                   phy_vars_ue->dlsch_ue_SI[eNB_id]->harq_processes[0]->nb_rb,
                   phy_vars_ue->dlsch_ue_SI[eNB_id]->harq_processes[0]->G,
                   phy_vars_ue->dlsch_ue_SI[eNB_id]->harq_processes[0]->TBS,
@@ -2847,7 +2848,7 @@ int phy_procedures_UE_RX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstrac
           if (ret == (1+phy_vars_ue->dlsch_ue_SI[eNB_id]->max_turbo_iterations)) {
             phy_vars_ue->dlsch_SI_errors[eNB_id]++;
 #ifdef DEBUG_PHY_PROC
-            LOG_I(PHY,"[UE  %d] Frame %d, subframe %d, received SI in error (TBS %d, mcs %d, rvidx %d, rballoc %X.%X.%X.%X\n",
+            LOG_D(PHY,"[UE  %d] Frame %d, subframe %d, received SI in error (TBS %d, mcs %d, rvidx %d, rballoc %X.%X.%X.%X\n",
 		  phy_vars_ue->Mod_id,
 		  frame_rx,
 		  subframe_prev,
@@ -3280,7 +3281,7 @@ int phy_procedures_UE_RX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstrac
   }
 
   if (is_pmch_subframe((subframe_rx==9?-1:0)+frame_rx,subframe_rx,&phy_vars_ue->lte_frame_parms)) {
-    LOG_I(PHY,"ue calling pmch subframe ..\n ");
+    LOG_D(PHY,"ue calling pmch subframe ..\n ");
 
     if ((slot_rx%2)==1) {
       LOG_D(PHY,"[UE %d] Frame %d, subframe %d: Querying for PMCH demodulation(%d)\n",
@@ -3428,7 +3429,7 @@ int phy_procedures_UE_RX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstrac
             phy_vars_rn->sync_area[subframe_rx] = sync_area; // this could also go the harq data struct
             phy_vars_rn->dlsch_rn_MCH[subframe_rx]->harq_processes[0]->TBS = phy_vars_ue->dlsch_ue_MCH[0]->harq_processes[0]->TBS;
             phy_vars_rn->dlsch_rn_MCH[subframe_rx]->harq_processes[0]->mcs = phy_vars_ue->dlsch_ue_MCH[0]->harq_processes[0]->mcs;
-            LOG_I(PHY,"[RN/UE %d] Frame %d subframe %d: store the MCH PDU for MBSFN sync area %d (MCS %d, TBS %d)\n",
+            LOG_D(PHY,"[RN/UE %d] Frame %d subframe %d: store the MCH PDU for MBSFN sync area %d (MCS %d, TBS %d)\n",
                   phy_vars_ue->Mod_id, frame_rx,subframe_rx,sync_area,
                   phy_vars_rn->dlsch_rn_MCH[subframe_rx]->harq_processes[0]->mcs,
                   phy_vars_rn->dlsch_rn_MCH[subframe_rx]->harq_processes[0]->TBS>>3);
diff --git a/openair1/SIMULATION/LTE_PHY/dlsim.c b/openair1/SIMULATION/LTE_PHY/dlsim.c
index 6474e83dd9..cae2ed7c19 100644
--- a/openair1/SIMULATION/LTE_PHY/dlsim.c
+++ b/openair1/SIMULATION/LTE_PHY/dlsim.c
@@ -266,15 +266,15 @@ int main(int argc, char **argv)
   unsigned int ret;
   unsigned int coded_bits_per_codeword=0,nsymb,dci_cnt,tbs=0;
 
-  unsigned int tx_lev=0,tx_lev_dB=0,trials,errs[4]= {0,0,0,0},errs2[4]= {0,0,0,0},round_trials[4]= {0,0,0,0},dci_errors=0,dlsch_active=0,num_layers;
-  int re_allocated;
+  unsigned int tx_lev=0,tx_lev_dB=0,trials,errs[4]= {0,0,0,0},errs2[4]= {0,0,0,0},round_trials[4]= {0,0,0,0},dci_errors=0,dlsch_active=0;//,num_layers;
+  //  int re_allocated;
   char fname[32],vname[32];
   FILE *bler_fd;
   char bler_fname[256];
   FILE *time_meas_fd;
   char time_meas_fname[256];
-  FILE *tikz_fd;
-  char tikz_fname[256];
+  //  FILE *tikz_fd;
+  //  char tikz_fname[256];
 
   FILE *input_trch_fd=NULL;
   unsigned char input_trch_file=0;
@@ -300,7 +300,7 @@ int main(int argc, char **argv)
   uint8_t rx_sample_offset = 0;
   //char stats_buffer[4096];
   //int len;
-  uint8_t num_rounds = 4,fix_rounds=0;
+  uint8_t num_rounds = 4;//,fix_rounds=0;
   uint8_t subframe=7;
   int u;
   int n=0;
@@ -314,8 +314,8 @@ int main(int argc, char **argv)
 
   // void *data;
   // int ii;
-  int bler;
-  double blerr[4],uncoded_ber,avg_ber;
+  //  int bler;
+  double blerr[4],uncoded_ber;//,avg_ber;
   short *uncoded_ber_bit=NULL;
   uint8_t N_RB_DL=25,osf=1;
   uint8_t fdd_flag = 0;
@@ -330,7 +330,7 @@ int main(int argc, char **argv)
   int common_flag=0,TPC=0;
 
   double cpu_freq_GHz;
-  time_stats_t ts;//,sts,usts;
+  //  time_stats_t ts;//,sts,usts;
   int avg_iter,iter_trials;
   int rballocset=0;
   int print_perf=0;
@@ -344,15 +344,22 @@ int main(int argc, char **argv)
   int TB0_active = 1;
   uint32_t perfect_ce = 0;
 
-  LTE_DL_UE_HARQ_t *dlsch0_ue_harq;
-  LTE_DL_eNB_HARQ_t *dlsch0_eNB_harq;
+  //  LTE_DL_UE_HARQ_t *dlsch0_ue_harq;
+  //  LTE_DL_eNB_HARQ_t *dlsch0_eNB_harq;
   uint8_t Kmimo;
-  FILE    *proc_fd = NULL;
-  char buf[64];
+  uint8_t ue_category=4;
+  uint32_t Nsoft;
+
+
+
+  int CCE_table[800];
 
   opp_enabled=1; // to enable the time meas
 
 #if defined(__arm__)
+  FILE    *proc_fd = NULL;
+  char buf[64];
+
   proc_fd = fopen("/sys/devices/system/cpu/cpu4/cpufreq/cpuinfo_cur_freq", "r");
   if(!proc_fd)
      printf("cannot open /sys/devices/system/cpu/cpu4/cpufreq/cpuinfo_cur_freq");
@@ -375,10 +382,10 @@ int main(int argc, char **argv)
   // default parameters
   n_frames = 1000;
   snr0 = 0;
-  num_layers = 1;
+  //  num_layers = 1;
   perfect_ce = 0;
 
-  while ((c = getopt (argc, argv, "ahdpZDe:m:n:o:s:f:t:c:g:r:F:x:y:z:AM:N:I:i:O:R:S:C:T:b:u:v:w:B:PLl:Y")) != -1) {
+  while ((c = getopt (argc, argv, "ahdpZDe:m:n:o:s:f:t:c:g:r:F:x:y:z:AM:N:I:i:O:R:S:C:T:b:u:U:v:w:B:PLl:Y")) != -1) {
     switch (c) {
     case 'a':
       awgn_flag = 1;
@@ -522,7 +529,6 @@ int main(int argc, char **argv)
       case 'N':
         channel_model=AWGN;
         break;
-
       default:
         msg("Unsupported channel model!\n");
         exit(-1);
@@ -530,6 +536,10 @@ int main(int argc, char **argv)
 
       break;
 
+    case 'U':
+      ue_category = atoi(optarg);
+      break;
+
     case 'x':
       transmission_mode=atoi(optarg);
 
@@ -985,10 +995,27 @@ int main(int argc, char **argv)
   else
     Kmimo=1;
 
+  switch (ue_category) {
+  case 1:
+    Nsoft = 250368;
+    break;
+  case 2:
+  case 3:
+    Nsoft = 1237248;
+    break;
+  case 4:
+    Nsoft = 1827072;
+    break;
+  default:
+    printf("Unsupported UE category %d\n",ue_category);
+    exit(-1);
+    break;
+  }
+
   for (k=0; k<n_users; k++) {
     // Create transport channel structures for 2 transport blocks (MIMO)
     for (i=0; i<2; i++) {
-      PHY_vars_eNB->dlsch_eNB[k][i] = new_eNB_dlsch(Kmimo,8,N_RB_DL,0);
+      PHY_vars_eNB->dlsch_eNB[k][i] = new_eNB_dlsch(Kmimo,8,Nsoft,N_RB_DL,0);
 
       if (!PHY_vars_eNB->dlsch_eNB[k][i]) {
         printf("Can't get eNB dlsch structures\n");
@@ -1000,7 +1027,7 @@ int main(int argc, char **argv)
   }
 
   for (i=0; i<2; i++) {
-    PHY_vars_UE->dlsch_ue[0][i]  = new_ue_dlsch(Kmimo,8,MAX_TURBO_ITERATIONS,N_RB_DL,0);
+    PHY_vars_UE->dlsch_ue[0][i]  = new_ue_dlsch(Kmimo,8,Nsoft,MAX_TURBO_ITERATIONS,N_RB_DL,0);
 
     if (!PHY_vars_UE->dlsch_ue[0][i]) {
       printf("Can't get ue dlsch structures\n");
@@ -1011,7 +1038,7 @@ int main(int argc, char **argv)
   }
 
   // structure for SIC at UE
-  PHY_vars_UE->dlsch_eNB[0] = new_eNB_dlsch(Kmimo,8,N_RB_DL,0);
+  PHY_vars_UE->dlsch_eNB[0] = new_eNB_dlsch(Kmimo,8,Nsoft,N_RB_DL,0);
 
   if (DLSCH_alloc_pdu2_1E[0].tpmi == 5) {
 
@@ -1298,7 +1325,7 @@ int main(int argc, char **argv)
           dci_alloc[num_dci].L          = 1;
           dci_alloc[num_dci].rnti       = SI_RNTI;
           dci_alloc[num_dci].format     = format1A;
-          dci_alloc[num_dci].nCCE       = 0;
+          dci_alloc[num_dci].firstCCE       = 0;
           dump_dci(&PHY_vars_eNB->lte_frame_parms,&dci_alloc[num_dci]);
 
           printf("Generating dlsch params for user %d\n",k);
@@ -1605,7 +1632,7 @@ int main(int argc, char **argv)
           dci_alloc[num_dci].L          = 1;
           dci_alloc[num_dci].rnti       = SI_RNTI;
           dci_alloc[num_dci].format     = format1A;
-          dci_alloc[num_dci].nCCE       = 0;
+          dci_alloc[num_dci].firstCCE       = 0;
           dump_dci(&PHY_vars_eNB->lte_frame_parms,&dci_alloc[num_dci]);
 
           printf("Generating dlsch params for user %d\n",k);
@@ -1913,7 +1940,7 @@ int main(int argc, char **argv)
           dci_alloc[num_dci].L          = 1;
           dci_alloc[num_dci].rnti       = SI_RNTI;
           dci_alloc[num_dci].format     = format1A;
-          dci_alloc[num_dci].nCCE       = 0;
+          dci_alloc[num_dci].firstCCE       = 0;
           dump_dci(&PHY_vars_eNB->lte_frame_parms,&dci_alloc[num_dci]);
 
           printf("Generating dlsch params for user %d\n",k);
@@ -1944,7 +1971,7 @@ int main(int argc, char **argv)
         dci_alloc[num_dci].L          = 1;
         dci_alloc[num_dci].rnti       = n_rnti+k;
         dci_alloc[num_dci].format     = format1E_2A_M10PRB;
-        dci_alloc[num_dci].nCCE       = 4*k;
+        dci_alloc[num_dci].firstCCE       = 4*k;
         printf("Generating dlsch params for user %d\n",k);
         generate_eNB_dlsch_params_from_dci(0,
 					   subframe,
@@ -1989,17 +2016,20 @@ int main(int argc, char **argv)
     if (n_frames==1) printf("%d\n",numCCE);
 
     // apply RNTI-based nCCE allocation
+    memset(CCE_table,0,800*sizeof(int));
+
     for (i=num_common_dci; i<num_dci; i++) {
 
-      dci_alloc[i].nCCE = get_nCCE_offset(1<<dci_alloc[i].L,
-                                          numCCE,
-                                          (dci_alloc[i].rnti==SI_RNTI)? 1 : 0,
-                                          dci_alloc[i].rnti,
-                                          subframe);
+      dci_alloc[i].firstCCE = get_nCCE_offset_l1(CCE_table,
+						 1<<dci_alloc[i].L,
+						 numCCE,
+						 (dci_alloc[i].rnti==SI_RNTI)? 1 : 0,
+						 dci_alloc[i].rnti,
+						 subframe);
 
       if (n_frames==1)
         printf("dci %d: rnti %x, format %d : nCCE %d/%d\n",i,dci_alloc[i].rnti, dci_alloc[i].format,
-               dci_alloc[i].nCCE,numCCE);
+               dci_alloc[i].firstCCE,numCCE);
     }
 
     for (k=0; k<n_users; k++) {
@@ -2082,7 +2112,7 @@ int main(int argc, char **argv)
       round_trials[3] = 0;
 
       dci_errors=0;
-      avg_ber = 0;
+      //      avg_ber = 0;
 
       round=0;
       avg_iter = 0;
@@ -2667,13 +2697,13 @@ PMI_FEEDBACK:
               }
 
               start_meas(&PHY_vars_eNB->dlsch_modulation_stats);
-              re_allocated = dlsch_modulation(PHY_vars_eNB->lte_eNB_common_vars.txdataF[eNB_id],
-                                              AMP,
-                                              subframe,
-                                              &PHY_vars_eNB->lte_frame_parms,
-                                              num_pdcch_symbols,
-                                              PHY_vars_eNB->dlsch_eNB[k][0],
-                                              PHY_vars_eNB->dlsch_eNB[k][1]);
+              dlsch_modulation(PHY_vars_eNB->lte_eNB_common_vars.txdataF[eNB_id],
+			       AMP,
+			       subframe,
+			       &PHY_vars_eNB->lte_frame_parms,
+			       num_pdcch_symbols,
+			       PHY_vars_eNB->dlsch_eNB[k][0],
+			       PHY_vars_eNB->dlsch_eNB[k][1]);
               stop_meas(&PHY_vars_eNB->dlsch_modulation_stats);
               /*
               if (trials==0 && round==0)
diff --git a/openair1/SIMULATION/LTE_PHY/pdcchsim.c b/openair1/SIMULATION/LTE_PHY/pdcchsim.c
index 7a36132980..c2676c9d01 100644
--- a/openair1/SIMULATION/LTE_PHY/pdcchsim.c
+++ b/openair1/SIMULATION/LTE_PHY/pdcchsim.c
@@ -56,7 +56,7 @@ PHY_VARS_UE *PHY_vars_UE;
 
 #define UL_RB_ALLOC 0x1ff;
 #define CCCH_RB_ALLOC computeRIV(PHY_vars_eNB->lte_frame_parms.N_RB_UL,0,2)
-#define DLSCH_RB_ALLOC 0x1fbf // igore DC component,RB13
+#define DLSCH_RB_ALLOC ((uint16_t)0x1fbf) // igore DC component,RB13
 
 void lte_param_init(unsigned char N_tx, unsigned char N_rx,unsigned char transmission_mode,unsigned char extended_prefix_flag,uint16_t Nid_cell,uint8_t tdd_config,uint8_t N_RB_DL,
                     lte_frame_type_t frame_type,uint8_t osf,uint32_t perfect_ce)
@@ -154,9 +154,9 @@ DCI_PDU DCI_pdu;
 
 DCI_PDU *get_dci(LTE_DL_FRAME_PARMS *lte_frame_parms,uint8_t log2L, uint8_t log2Lcommon, uint8_t format_selector, uint32_t rnti)
 {
-  uint8_t BCCH_alloc_pdu[8];
-  uint8_t DLSCH_alloc_pdu[8];
-  uint8_t UL_alloc_pdu[8];
+  uint32_t BCCH_alloc_pdu[2];
+  uint32_t DLSCH_alloc_pdu[2];
+  uint32_t UL_alloc_pdu[2];
 
   int i;
   int dci_length_bytes,dci_length;
@@ -462,31 +462,35 @@ DCI_PDU *get_dci(LTE_DL_FRAME_PARMS *lte_frame_parms,uint8_t log2L, uint8_t log2
   DCI_pdu.dci_alloc[0].ra_flag    = 0;
   memcpy((void*)&DCI_pdu.dci_alloc[0].dci_pdu[0], &BCCH_alloc_pdu[0], BCCH_pdu_size_bytes);
   DCI_pdu.Num_common_dci++;
-  /*
+  if (lte_frame_parms->N_RB_DL >= 25) {
   // add ue specific dci
-  DCI_pdu.dci_alloc[1].dci_length = dci_length;
-  DCI_pdu.dci_alloc[1].L          = log2L;
-  DCI_pdu.dci_alloc[1].rnti       = rnti;
-  DCI_pdu.dci_alloc[1].format     = format1;
-  DCI_pdu.dci_alloc[1].ra_flag    = 0;
-  memcpy((void*)&DCI_pdu.dci_alloc[1].dci_pdu[0], &DLSCH_alloc_pdu[0], dci_length_bytes);
-  DCI_pdu.Num_ue_spec_dci++;
+    DCI_pdu.dci_alloc[1].dci_length = dci_length;
+    DCI_pdu.dci_alloc[1].L          = log2L;
+    DCI_pdu.dci_alloc[1].rnti       = rnti;
+    DCI_pdu.dci_alloc[1].format     = format1;
+    DCI_pdu.dci_alloc[1].ra_flag    = 0;
+    memcpy((void*)&DCI_pdu.dci_alloc[1].dci_pdu[0], &DLSCH_alloc_pdu[0], dci_length_bytes);
+    DCI_pdu.Num_ue_spec_dci++;
+
+    if (lte_frame_parms->N_RB_DL >= 50) {
+      DCI_pdu.dci_alloc[2].dci_length = UL_pdu_size_bits;
+      DCI_pdu.dci_alloc[2].L          = log2L;
+      DCI_pdu.dci_alloc[2].rnti       = rnti;
+      DCI_pdu.dci_alloc[2].format     = format0;
+      DCI_pdu.dci_alloc[2].ra_flag    = 0;
+      memcpy((void*)&DCI_pdu.dci_alloc[0].dci_pdu[0], &UL_alloc_pdu[0], UL_pdu_size_bytes);
+      DCI_pdu.Num_ue_spec_dci++;
+    }
+  }
+
 
 
-  DCI_pdu.dci_alloc[0].dci_length = UL_pdu_size_bits;
-  DCI_pdu.dci_alloc[0].L          = log2L;
-  DCI_pdu.dci_alloc[0].rnti       = rnti;
-  DCI_pdu.dci_alloc[0].format     = format0;
-  DCI_pdu.dci_alloc[0].ra_flag    = 0;
-  memcpy((void*)&DCI_pdu.dci_alloc[0].dci_pdu[0], &UL_alloc_pdu[0], UL_pdu_size_bytes);
-  DCI_pdu.Num_ue_spec_dci++;
-  */
   DCI_pdu.nCCE = 0;
 
   for (i=0; i<DCI_pdu.Num_common_dci+DCI_pdu.Num_ue_spec_dci; i++) {
     DCI_pdu.nCCE += (1<<(DCI_pdu.dci_alloc[i].L));
   }
-
+  
   return(&DCI_pdu);
 }
 
@@ -523,10 +527,8 @@ int main(int argc, char **argv)
   uint8_t dci_cnt=0;
   LTE_DL_FRAME_PARMS *frame_parms;
   uint8_t log2L=2, log2Lcommon=2, format_selector=0;
-  uint8_t numCCE,nCCE_max,common_active=0,ul_active=0,dl_active=0;
-  uint32_t rv;
+  uint8_t numCCE,common_active=0,ul_active=0,dl_active=0;
 
-  DCI_format_t format = format1;
   uint32_t n_trials_common=0,n_trials_ul=0,n_trials_dl=0,false_detection_cnt=0;
   uint8_t common_rx,ul_rx,dl_rx;
   uint8_t tdd_config=3;
@@ -540,19 +542,19 @@ int main(int argc, char **argv)
 
   DCI_ALLOC_t dci_alloc_rx[8];
 
-  void* dlsch_pdu = NULL;
-  //  int ret;
+  int ret;
 
   uint8_t harq_pid;
   uint8_t phich_ACK;
 
   uint8_t num_phich_interf = 0;
   lte_frame_type_t frame_type=TDD;
-  int re_offset;
-  uint32_t *txptr;
+  //  int re_offset;
+  //  uint32_t *txptr;
   int aarx;
   int k;
   uint32_t perfect_ce = 0;
+  int CCE_table[800];
 
   number_of_cards = 1;
   openair_daq_vars.rx_rf_mode = 1;
@@ -876,7 +878,7 @@ int main(int argc, char **argv)
     i=0;
 
     while (!feof(input_fd)) {
-      fscanf(input_fd,"%s %s",input_val_str,input_val_str2);//&input_val1,&input_val2);
+      ret=fscanf(input_fd,"%s %s",input_val_str,input_val_str2);//&input_val1,&input_val2);
 
       if ((i%4)==0) {
         ((short*)txdata[0])[i/2] = (short)((1<<15)*strtod(input_val_str,NULL));
@@ -903,7 +905,7 @@ int main(int argc, char **argv)
 
   PHY_vars_UE->UE_mode[0] = PUSCH;
 
-  nCCE_max = get_nCCE(3,&PHY_vars_eNB->lte_frame_parms,get_mi(&PHY_vars_eNB->lte_frame_parms,0));
+  //  nCCE_max = get_nCCE(3,&PHY_vars_eNB->lte_frame_parms,get_mi(&PHY_vars_eNB->lte_frame_parms,0));
   //printf("nCCE_max %d\n",nCCE_max);
 
   //printf("num_phich interferers %d\n",num_phich_interf);
@@ -955,55 +957,62 @@ int main(int argc, char **argv)
         numCCE=0;
         n_trials_common++;
         common_active = 1;
-        n_trials_ul++;
-        ul_active = 1;
-        n_trials_dl++;
-        dl_active = 1;
+	if (PHY_vars_eNB->lte_frame_parms.N_RB_DL >= 50) { 
+	  n_trials_ul++;
+	  ul_active = 1;
+	}
+        if (PHY_vars_eNB->lte_frame_parms.N_RB_DL >= 25) { 
+	  n_trials_dl++;
+	  dl_active = 1; 
+	}
 
-        init_nCCE_table();
         num_pdcch_symbols = get_num_pdcch_symbols(DCI_pdu.Num_common_dci+DCI_pdu.Num_ue_spec_dci,
                             DCI_pdu.dci_alloc, frame_parms, subframe);
-        DCI_pdu.nCCE = get_nCCE(num_pdcch_symbols,&PHY_vars_eNB->lte_frame_parms,get_mi(&PHY_vars_eNB->lte_frame_parms,subframe));
+	numCCE = get_nCCE(num_pdcch_symbols,&PHY_vars_eNB->lte_frame_parms,get_mi(&PHY_vars_eNB->lte_frame_parms,subframe));
 
         if (n_frames==1) {
           printf("num_dci %d, num_pddch_symbols %d, nCCE %d\n",
                  DCI_pdu.Num_common_dci+DCI_pdu.Num_ue_spec_dci,
-                 num_pdcch_symbols,
-                 DCI_pdu.nCCE);
+                 num_pdcch_symbols,numCCE);
         }
 
         // apply RNTI-based nCCE allocation
+	memset(CCE_table,0,800*sizeof(int));
+
         for (i = 0; i < DCI_pdu.Num_common_dci + DCI_pdu.Num_ue_spec_dci; i++) {
           // SI RNTI
           if (DCI_pdu.dci_alloc[i].rnti == SI_RNTI) {
-            DCI_pdu.dci_alloc[i].nCCE = get_nCCE_offset(1<<DCI_pdu.dci_alloc[i].L,
-                                        DCI_pdu.nCCE,
-                                        1,
-                                        SI_RNTI,
-                                        subframe);
+            DCI_pdu.dci_alloc[i].firstCCE = get_nCCE_offset_l1(CCE_table,
+							       1<<DCI_pdu.dci_alloc[i].L,
+							       numCCE,
+							       1,
+							       SI_RNTI,
+							       subframe);
           }
           // RA RNTI
           else if (DCI_pdu.dci_alloc[i].ra_flag == 1) {
-            DCI_pdu.dci_alloc[i].nCCE = get_nCCE_offset(1<<DCI_pdu.dci_alloc[i].L,
-                                        DCI_pdu.nCCE,
-                                        1,
-                                        DCI_pdu.dci_alloc[i].rnti,
-                                        subframe);
+            DCI_pdu.dci_alloc[i].firstCCE = get_nCCE_offset_l1(CCE_table,
+							       1<<DCI_pdu.dci_alloc[i].L,
+							       numCCE,
+							       1,
+							       DCI_pdu.dci_alloc[i].rnti,
+							       subframe);
           }
           // C RNTI
           else {
-            DCI_pdu.dci_alloc[i].nCCE = get_nCCE_offset(1<<DCI_pdu.dci_alloc[i].L,
-                                        DCI_pdu.nCCE,
-                                        0,
-                                        DCI_pdu.dci_alloc[i].rnti,
-                                        subframe);
+            DCI_pdu.dci_alloc[i].firstCCE = get_nCCE_offset_l1(CCE_table,
+							       1<<DCI_pdu.dci_alloc[i].L,
+							       numCCE,
+							       0,
+							       DCI_pdu.dci_alloc[i].rnti,
+							       subframe);
           }
 
           if (n_frames==1)
             printf("dci %d: rnti 0x%x, format %d, L %d, nCCE %d/%d dci_length %d\n",i,DCI_pdu.dci_alloc[i].rnti, DCI_pdu.dci_alloc[i].format,
-                   DCI_pdu.dci_alloc[i].L, DCI_pdu.dci_alloc[i].nCCE, DCI_pdu.nCCE, DCI_pdu.dci_alloc[i].dci_length);
+                   DCI_pdu.dci_alloc[i].L, DCI_pdu.dci_alloc[i].firstCCE, numCCE, DCI_pdu.dci_alloc[i].dci_length);
 
-          if (DCI_pdu.dci_alloc[i].nCCE==-1)
+          if (DCI_pdu.dci_alloc[i].firstCCE==-1)
             exit(-1);
         }
 
@@ -1037,7 +1046,7 @@ int main(int argc, char **argv)
 
           generate_phich_top(PHY_vars_eNB,
                              subframe,AMP,0,0);
-          /*
+          
           // generate 3 interfering PHICH
           if (num_phich_interf>0) {
             PHY_vars_eNB->ulsch_eNB[0]->harq_processes[harq_pid]->first_rb = 4;
@@ -1064,7 +1073,7 @@ int main(int argc, char **argv)
           }
 
           PHY_vars_eNB->ulsch_eNB[0]->harq_processes[harq_pid]->first_rb = 0;
-          */
+          
         }
 
         //  write_output("pilotsF.m","rsF",txdataF[0],lte_PHY_vars_eNB->lte_frame_parms.ofdm_symbol_size,1,1);
@@ -1244,7 +1253,7 @@ int main(int argc, char **argv)
 
             for (i = 0; i < dci_cnt; i++)
               printf("dci %d: rnti 0x%x, format %d, L %d, nCCE %d/%d dci_length %d\n",i, dci_alloc_rx[i].rnti, dci_alloc_rx[i].format,
-                     dci_alloc_rx[i].L, dci_alloc_rx[i].nCCE, numCCE, dci_alloc_rx[i].dci_length);
+                     dci_alloc_rx[i].L, dci_alloc_rx[i].firstCCE, numCCE, dci_alloc_rx[i].dci_length);
           }
 
           for (i=0; i<dci_cnt; i++) {
@@ -1319,8 +1328,8 @@ int main(int argc, char **argv)
     } //trials
 
     printf("SNR %f : n_errors_common = %d/%d (%e)\n", SNR,n_errors_common,n_trials_common,(double)n_errors_common/n_trials_common);
-    printf("SNR %f : n_errors_ul = %d/%d (%e)\n", SNR,n_errors_ul,n_trials_ul,(double)n_errors_ul/n_trials_ul);
-    printf("SNR %f : n_errors_dl = %d/%d (%e)\n", SNR,n_errors_dl,n_trials_dl,(double)n_errors_dl/n_trials_dl);
+    if (ul_active==1) printf("SNR %f : n_errors_ul = %d/%d (%e)\n", SNR,n_errors_ul,n_trials_ul,(double)n_errors_ul/n_trials_ul);
+    if (dl_active==1) printf("SNR %f : n_errors_dl = %d/%d (%e)\n", SNR,n_errors_dl,n_trials_dl,(double)n_errors_dl/n_trials_dl);
     printf("SNR %f : n_errors_cfi = %d/%d (%e)\n", SNR,n_errors_cfi,trial,(double)n_errors_cfi/trial);
     printf("SNR %f : n_errors_hi = %d/%d (%e)\n", SNR,n_errors_hi,trial,(double)n_errors_hi/trial);
 
diff --git a/openair1/SIMULATION/LTE_PHY/ulsim.c b/openair1/SIMULATION/LTE_PHY/ulsim.c
index de2789acef..aa4f5bf520 100644
--- a/openair1/SIMULATION/LTE_PHY/ulsim.c
+++ b/openair1/SIMULATION/LTE_PHY/ulsim.c
@@ -151,7 +151,7 @@ int main(int argc, char **argv)
 
   int aarx,aatx;
   double channelx,channely;
-  double sigma2, sigma2_dB=10,SNR,SNR2,snr0=-2.0,snr1,SNRmeas,rate,saving_bler;
+  double sigma2, sigma2_dB=10,SNR,SNR2,snr0=-2.0,snr1,SNRmeas,rate,saving_bler=0;
   double input_snr_step=.2,snr_int=30;
   double blerr;
 
@@ -180,7 +180,7 @@ int main(int argc, char **argv)
   unsigned int coded_bits_per_codeword,nsymb;
   int subframe=3;
   unsigned int tx_lev=0,tx_lev_dB,trials,errs[4]= {0,0,0,0},round_trials[4]= {0,0,0,0};
-  uint8_t transmission_mode=1,n_rx=1,n_tx=1;
+  uint8_t transmission_mode=1,n_rx=1;
 
   FILE *bler_fd=NULL;
   char bler_fname[512];
@@ -395,10 +395,6 @@ int main(int argc, char **argv)
         exit(-1);
       }
 
-      if (transmission_mode>1) {
-        n_tx = 1;
-      }
-
       break;
 
     case 'y':
@@ -690,8 +686,8 @@ int main(int argc, char **argv)
 
   // Create transport channel structures for 2 transport blocks (MIMO)
   for (i=0; i<2; i++) {
-    PHY_vars_eNB->dlsch_eNB[0][i] = new_eNB_dlsch(1,8,N_RB_DL,0);
-    PHY_vars_UE->dlsch_ue[0][i]  = new_ue_dlsch(1,8,MAX_TURBO_ITERATIONS,N_RB_DL,0);
+    PHY_vars_eNB->dlsch_eNB[0][i] = new_eNB_dlsch(1,8,1827072,N_RB_DL,0);
+    PHY_vars_UE->dlsch_ue[0][i]  = new_ue_dlsch(1,8,1827072,MAX_TURBO_ITERATIONS,N_RB_DL,0);
 
     if (!PHY_vars_eNB->dlsch_eNB[0][i]) {
       printf("Can't get eNB dlsch structures\n");
@@ -706,7 +702,7 @@ int main(int argc, char **argv)
     PHY_vars_eNB->dlsch_eNB[0][i]->rnti = 14;
     PHY_vars_UE->dlsch_ue[0][i]->rnti   = 14;
 
-  }
+  } 
 
 
   switch (PHY_vars_eNB->lte_frame_parms.N_RB_UL) {
@@ -894,11 +890,11 @@ int main(int argc, char **argv)
 
 
       harq_pid = subframe2harq_pid(&PHY_vars_UE->lte_frame_parms,PHY_vars_UE->frame_tx,subframe);
-
+      input_buffer_length = PHY_vars_UE->ulsch_ue[0]->harq_processes[harq_pid]->TBS/8;
+      input_buffer = (unsigned char *)malloc(input_buffer_length+4);
       //      printf("UL frame %d/subframe %d, harq_pid %d\n",PHY_vars_UE->frame,subframe,harq_pid);
       if (input_fdUL == NULL) {
-        input_buffer_length = PHY_vars_UE->ulsch_ue[0]->harq_processes[harq_pid]->TBS/8;
-        input_buffer = (unsigned char *)malloc(input_buffer_length+4);
+
 
         if (n_frames == 1) {
           trch_out_fdUL= fopen("ulsch_trchUL.txt","w");
@@ -920,7 +916,7 @@ int main(int argc, char **argv)
         i=0;
 
         while (!feof(input_fdUL)) {
-          fscanf(input_fdUL,"%s %s",input_val_str,input_val_str2);//&input_val1,&input_val2);
+          ret=fscanf(input_fdUL,"%s %s",input_val_str,input_val_str2);//&input_val1,&input_val2);
 
           if ((i%4)==0) {
             ((short*)txdata[0])[i/2] = (short)((1<<15)*strtod(input_val_str,NULL));
@@ -1250,6 +1246,7 @@ int main(int argc, char **argv)
           start_meas(&PHY_vars_eNB->phy_proc_rx);
           start_meas(&PHY_vars_eNB->ofdm_demod_stats);
           lte_eNB_I0_measurements(PHY_vars_eNB,
+				  subframe,
                                   0,
                                   1);
 
diff --git a/openair2/LAYER2/MAC/defs.h b/openair2/LAYER2/MAC/defs.h
index a0a43b6d79..d92a143348 100644
--- a/openair2/LAYER2/MAC/defs.h
+++ b/openair2/LAYER2/MAC/defs.h
@@ -251,7 +251,8 @@ typedef struct {
 typedef struct {
   uint8_t Num_ue_spec_dci ;
   uint8_t Num_common_dci  ;
-  unsigned int nCCE;
+  uint32_t nCCE;
+  uint32_t num_pdcch_symbols;
   DCI_ALLOC_t dci_alloc[NUM_DCI_MAX] ;
 } DCI_PDU;
 /*! \brief CCCH payload */
@@ -765,8 +766,6 @@ typedef struct {
   uint8_t Msg3_subframe;
   /// Flag to indicate the eNB should generate Msg4 upon reception of SDU from RRC.  This is triggered by first ULSCH reception at eNB for new user.
   uint8_t generate_Msg4;
-  /// Flag to indicate the eNB should generate the DCI for Msg4, after getting the SDU from RRC.
-  uint8_t generate_Msg4_dci;
   /// Flag to indicate that eNB is waiting for ACK that UE has received Msg3.
   uint8_t wait_ack_Msg4;
   /// UE RNTI allocated during RAR
@@ -835,8 +834,8 @@ typedef struct {
   /// Outgoing CCCH pdu for PHY
   CCCH_PDU CCCH_pdu;
   RA_TEMPLATE RA_template[NB_RA_PROC_MAX];
-  /// BCCH active flag
-  uint8_t bcch_active;
+  /// VRB map for common channels
+  uint8_t vrb_map[100];
   /// MBSFN SubframeConfig
   struct MBSFN_SubframeConfig *mbsfn_SubframeConfig[8];
   /// number of subframe allocation pattern available for MBSFN sync area
@@ -883,9 +882,11 @@ typedef struct {
   /// Common cell resources
   COMMON_channels_t common_channels[MAX_NUM_CCs];
   UE_list_t UE_list;
+
   ///subband bitmap configuration
   SBMAP_CONF sbmap_conf;
-
+  /// CCE table used to build DCI scheduling information
+  int CCE_table[MAX_NUM_CCs][800];
   ///  active flag for Other lcid
   //  uint8_t lcid_active[NB_RB_MAX];
   /// eNB stats
diff --git a/openair2/LAYER2/MAC/eNB_scheduler.c b/openair2/LAYER2/MAC/eNB_scheduler.c
index 329c40be05..8a6b8d66c7 100644
--- a/openair2/LAYER2/MAC/eNB_scheduler.c
+++ b/openair2/LAYER2/MAC/eNB_scheduler.c
@@ -77,13 +77,13 @@
 
 
 
+
+
+
 void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag, frame_t frameP, sub_frame_t subframeP)  //, int calibration_flag) {
 {
 
-  unsigned int nprb[MAX_NUM_CCs];
-  unsigned int nCCE[MAX_NUM_CCs];
   int mbsfn_status[MAX_NUM_CCs];
-  uint32_t RBalloc[MAX_NUM_CCs];
   protocol_ctxt_t   ctxt;
 #ifdef EXMIMO
   int ret;
@@ -106,10 +106,11 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
 
   for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
     DCI_pdu[CC_id] = &eNB_mac_inst[module_idP].common_channels[CC_id].DCI_pdu;
-    nCCE[CC_id]=0;
-    nprb[CC_id]=0;
-    RBalloc[CC_id]=0;
+    DCI_pdu[CC_id]->nCCE=0;
+    DCI_pdu[CC_id]->num_pdcch_symbols=1;
     mbsfn_status[CC_id]=0;
+    // clear vrb_map
+    memset(eNB_mac_inst[module_idP].common_channels[CC_id].vrb_map,0,100);
   }
 
   // refresh UE list based on UEs dropped by PHY in previous subframe
@@ -186,7 +187,7 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
   for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
     DCI_pdu[CC_id]->Num_common_dci  = 0;
     DCI_pdu[CC_id]->Num_ue_spec_dci = 0;
-    eNB_mac_inst[module_idP].common_channels[CC_id].bcch_active = 0;
+
 
 #ifdef Rel10
     eNB_mac_inst[module_idP].common_channels[CC_id].mcch_active =0;
@@ -194,6 +195,8 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
 
     eNB_mac_inst[module_idP].frame    = frameP;
     eNB_mac_inst[module_idP].subframe = subframeP;
+
+
   }
 
   //if (subframeP%5 == 0)
@@ -238,19 +241,20 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
     // Schedule ULSCH for FDD or subframeP 4 (TDD config 0,3,6)
     // Schedule Normal DLSCH
 
-    schedule_RA(module_idP,frameP,subframeP,2,nprb,nCCE);
+
+    schedule_RA(module_idP,frameP,subframeP,2);
+
 
     if (mac_xface->lte_frame_parms->frame_type == FDD) {  //FDD
-      schedule_ulsch(module_idP,frameP,cooperation_flag,0,4,nCCE);//,calibration_flag);
+      schedule_ulsch(module_idP,frameP,cooperation_flag,0,4);//,calibration_flag);
     } else if  ((mac_xface->lte_frame_parms->tdd_config == TDD) || //TDD
                 (mac_xface->lte_frame_parms->tdd_config == 3) ||
                 (mac_xface->lte_frame_parms->tdd_config == 6)) {
-      //schedule_ulsch(module_idP,frameP,cooperation_flag,subframeP,4,nCCE);//,calibration_flag);
+      //schedule_ulsch(module_idP,frameP,cooperation_flag,subframeP,4);//,calibration_flag);
     }
 
-    // schedule_ue_spec(module_idP,frameP,subframeP,nprb,nCCE,mbsfn_status);
-
-    fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,1,mbsfn_status);
+    schedule_ue_spec(module_idP,frameP,subframeP,mbsfn_status);
+    fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
 
     break;
 
@@ -262,22 +266,22 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
       switch (mac_xface->lte_frame_parms->tdd_config) {
       case 0:
       case 1:
-        schedule_ulsch(module_idP,frameP,cooperation_flag,subframeP,7,nCCE);
-        fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,0,mbsfn_status);
+        schedule_ulsch(module_idP,frameP,cooperation_flag,subframeP,7);
+        fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
         break;
 
       case 6:
-        schedule_ulsch(module_idP,frameP,cooperation_flag,subframeP,8,nCCE);
-        fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,0,mbsfn_status);
+        schedule_ulsch(module_idP,frameP,cooperation_flag,subframeP,8);
+        fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
         break;
 
       default:
         break;
       }
     } else { //FDD
-      schedule_ue_spec(module_idP,frameP,subframeP,nprb,nCCE,mbsfn_status);
-      fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,0,mbsfn_status);
-      schedule_ulsch(module_idP,frameP,cooperation_flag,1,5,nCCE);
+      schedule_ulsch(module_idP,frameP,cooperation_flag,1,5);
+      //      schedule_ue_spec(module_idP,frameP,subframeP,mbsfn_status);
+      fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
     }
 
     break;
@@ -287,9 +291,9 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
     // TDD, nothing
     // FDD, normal UL/DLSCH
     if (mac_xface->lte_frame_parms->frame_type == FDD) {  //FDD
-      schedule_ue_spec(module_idP,frameP,subframeP,nprb,nCCE,mbsfn_status);
-      fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,0,mbsfn_status);
-      schedule_ulsch(module_idP,frameP,cooperation_flag,2,6,nCCE);
+      schedule_ulsch(module_idP,frameP,cooperation_flag,2,6);
+      //      schedule_ue_spec(module_idP,frameP,subframeP,mbsfn_status);
+      fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
     }
 
     break;
@@ -302,22 +306,22 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
     if (mac_xface->lte_frame_parms->frame_type == TDD) {
       switch (mac_xface->lte_frame_parms->tdd_config) {
       case 2:
-        schedule_ulsch(module_idP,frameP,cooperation_flag,subframeP,7,nCCE);
+        schedule_ulsch(module_idP,frameP,cooperation_flag,subframeP,7);
 
         // no break here!
       case 5:
-        schedule_ue_spec(module_idP,frameP,subframeP,nprb,nCCE,mbsfn_status);
-        fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,0,mbsfn_status);
+        schedule_ue_spec(module_idP,frameP,subframeP,mbsfn_status);
+        fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
         break;
 
       default:
         break;
       }
     } else { //FDD
-      schedule_ue_spec(module_idP,frameP,subframeP,nprb,nCCE,mbsfn_status);
-      fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,0,mbsfn_status);
-      schedule_ulsch(module_idP,frameP,cooperation_flag,3,7,nCCE);
 
+      schedule_ulsch(module_idP,frameP,cooperation_flag,3,7);
+      //      schedule_ue_spec(module_idP,frameP,subframeP,mbsfn_status);
+      fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
     }
 
     break;
@@ -330,8 +334,8 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
     if (mac_xface->lte_frame_parms->frame_type == 1) { // TDD
       switch (mac_xface->lte_frame_parms->tdd_config) {
       case 1:
-        //        schedule_RA(module_idP,frameP,subframeP,nprb,nCCE);
-        schedule_ulsch(module_idP,frameP,cooperation_flag,subframeP,8,nCCE);
+        //        schedule_RA(module_idP,frameP,subframeP);
+        schedule_ulsch(module_idP,frameP,cooperation_flag,subframeP,8);
 
         // no break here!
       case 2:
@@ -341,8 +345,9 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
 
         // no break here!
       case 5:
-        schedule_ue_spec(module_idP,frameP,subframeP,nprb,nCCE,mbsfn_status);
-        fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,1,mbsfn_status);
+
+        schedule_ue_spec(module_idP,frameP,subframeP,mbsfn_status);
+        fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
         break;
 
       default:
@@ -350,11 +355,11 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
       }
     } else {
       if (mac_xface->lte_frame_parms->frame_type == FDD) {  //FDD
-	//        schedule_RA(module_idP,frameP, subframeP, 0, nprb, nCCE);
-        //  schedule_ulsch(module_idP, frameP, cooperation_flag, 4, 8, nCCE);
-        schedule_ue_spec(module_idP, frameP, subframeP, nprb, nCCE, mbsfn_status);
-        fill_DLSCH_dci(module_idP, frameP, subframeP, RBalloc, 1, mbsfn_status);
 
+	//        schedule_RA(module_idP,frameP, subframeP, 0);
+	schedule_ulsch(module_idP, frameP, cooperation_flag, 4, 8);
+	//	schedule_ue_spec(module_idP, frameP, subframeP,  mbsfn_status);
+        fill_DLSCH_dci(module_idP, frameP, subframeP,   mbsfn_status);
       }
     }
 
@@ -365,21 +370,21 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
     // TDD Config 0,6 ULSCH for subframes 9,3 resp.
     // TDD normal DLSCH
     // FDD normal UL/DLSCH
-    schedule_SI(module_idP,frameP,nprb,nCCE);
+    schedule_SI(module_idP,frameP,subframeP);
 
-    //schedule_RA(module_idP,frameP,subframeP,5,nprb,nCCE);
+    //schedule_RA(module_idP,frameP,subframeP,5);
     if (mac_xface->lte_frame_parms->frame_type == FDD) {
-      schedule_RA(module_idP,frameP,subframeP,1,nprb,nCCE);
-      //      schedule_ulsch(module_idP,frameP,cooperation_flag,5,9,nCCE);
-      fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,1,mbsfn_status);
-
+      schedule_RA(module_idP,frameP,subframeP,1);
+      schedule_ulsch(module_idP,frameP,cooperation_flag,5,9);
+      schedule_ue_spec(module_idP, frameP, subframeP,  mbsfn_status);
+      fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
     } else if ((mac_xface->lte_frame_parms->tdd_config == 0) || // TDD Config 0
                (mac_xface->lte_frame_parms->tdd_config == 6)) { // TDD Config 6
-      //schedule_ulsch(module_idP,cooperation_flag,subframeP,nCCE);
-      fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,0,mbsfn_status);
+      //schedule_ulsch(module_idP,cooperation_flag,subframeP);
+      fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
     } else {
-      //schedule_ue_spec(module_idP,frameP,subframeP,nprb,nCCE,mbsfn_status);
-      fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,0,mbsfn_status);
+      schedule_ue_spec(module_idP,frameP,subframeP,mbsfn_status);
+      fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
     }
 
     break;
@@ -395,36 +400,36 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
         break;
 
       case 1:
-        schedule_ulsch(module_idP,frameP,cooperation_flag,subframeP,2,nCCE);
-        //  schedule_ue_spec(module_idP,frameP,subframeP,nprb,nCCE,mbsfn_status);
-        fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,0,mbsfn_status);
+        schedule_ulsch(module_idP,frameP,cooperation_flag,subframeP,2);
+        //  schedule_ue_spec(module_idP,frameP,subframeP,mbsfn_status);
+        fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
         break;
 
       case 6:
-        schedule_ulsch(module_idP,frameP,cooperation_flag,subframeP,3,nCCE);
-        //  schedule_ue_spec(module_idP,frameP,subframeP,nprb,nCCE,mbsfn_status);
-        fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,0,mbsfn_status);
+        schedule_ulsch(module_idP,frameP,cooperation_flag,subframeP,3);
+        //  schedule_ue_spec(module_idP,frameP,subframeP,mbsfn_status);
+        fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
         break;
 
       case 5:
-        schedule_RA(module_idP,frameP,subframeP,2,nprb,nCCE);
-        schedule_ue_spec(module_idP,frameP,subframeP,nprb,nCCE,mbsfn_status);
-        fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,1,mbsfn_status);
+        schedule_RA(module_idP,frameP,subframeP,2);
+        schedule_ue_spec(module_idP,frameP,subframeP,mbsfn_status);
+        fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
         break;
 
       case 3:
       case 4:
-        schedule_ue_spec(module_idP,frameP,subframeP,nprb,nCCE,mbsfn_status);
-        fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,0,mbsfn_status);
+        schedule_ue_spec(module_idP,frameP,subframeP,mbsfn_status);
+        fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
         break;
 
       default:
         break;
       }
     } else { //FDD
-      //      schedule_ulsch(module_idP,frameP,cooperation_flag,6,0,nCCE);
-      schedule_ue_spec(module_idP,frameP,subframeP,nprb,nCCE,mbsfn_status);
-      fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,0,mbsfn_status);
+      //      schedule_ulsch(module_idP,frameP,cooperation_flag,6,0);
+      //      schedule_ue_spec(module_idP,frameP,subframeP,mbsfn_status);
+      fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
     }
 
     break;
@@ -437,23 +442,23 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
       switch (mac_xface->lte_frame_parms->tdd_config) {
       case 3:
       case 4:
-        schedule_RA(module_idP,frameP,subframeP,3,nprb,nCCE);  // 3 = Msg3 subframeP, not
-        schedule_ue_spec(module_idP,frameP,subframeP,nprb,nCCE,mbsfn_status);
-        fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,1,mbsfn_status);
+        schedule_RA(module_idP,frameP,subframeP,3);  // 3 = Msg3 subframeP, not
+        schedule_ue_spec(module_idP,frameP,subframeP,mbsfn_status);
+        fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
         break;
 
       case 5:
-        schedule_ue_spec(module_idP,frameP,subframeP,nprb,nCCE,mbsfn_status);
-        fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,0,mbsfn_status);
+        schedule_ue_spec(module_idP,frameP,subframeP,mbsfn_status);
+        fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
         break;
 
       default:
         break;
       }
     } else { //FDD
-      //schedule_ulsch(module_idP,frameP,cooperation_flag,7,1,nCCE);
-      schedule_ue_spec(module_idP,frameP,subframeP,nprb,nCCE,mbsfn_status);
-      fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,0,mbsfn_status);
+      //schedule_ulsch(module_idP,frameP,cooperation_flag,7,1);
+      //      schedule_ue_spec(module_idP,frameP,subframeP,mbsfn_status);
+      fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
     }
 
     break;
@@ -470,19 +475,19 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
       case 4:
       case 5:
 
-        //  schedule_RA(module_idP,subframeP,nprb,nCCE);
-        schedule_ulsch(module_idP,frameP,cooperation_flag,subframeP,2,nCCE);
-        schedule_ue_spec(module_idP,frameP,subframeP,nprb,nCCE,mbsfn_status);
-        fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,0,mbsfn_status);
+        //  schedule_RA(module_idP,subframeP);
+        schedule_ulsch(module_idP,frameP,cooperation_flag,subframeP,2);
+        schedule_ue_spec(module_idP,frameP,subframeP,mbsfn_status);
+        fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
         break;
 
       default:
         break;
       }
     } else { //FDD
-      //schedule_ulsch(module_idP,frameP,cooperation_flag,8,2,nCCE);
-      schedule_ue_spec(module_idP,frameP,subframeP,nprb,nCCE,mbsfn_status);
-      fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,0,mbsfn_status);
+      //schedule_ulsch(module_idP,frameP,cooperation_flag,8,2);
+      //      schedule_ue_spec(module_idP,frameP,subframeP,mbsfn_status);
+      fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
     }
 
     break;
@@ -493,51 +498,53 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
     if (mac_xface->lte_frame_parms->frame_type == TDD) {
       switch (mac_xface->lte_frame_parms->tdd_config) {
       case 1:
-        schedule_ulsch(module_idP,frameP,cooperation_flag,subframeP,3,nCCE);
-        schedule_RA(module_idP,frameP,subframeP,7,nprb,nCCE);  // 7 = Msg3 subframeP, not
-        schedule_ue_spec(module_idP,frameP,subframeP,nprb,nCCE,mbsfn_status);
-        fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,1,mbsfn_status);
+        schedule_ulsch(module_idP,frameP,cooperation_flag,subframeP,3);
+        schedule_RA(module_idP,frameP,subframeP,7);  // 7 = Msg3 subframeP, not
+        schedule_ue_spec(module_idP,frameP,subframeP,mbsfn_status);
+        fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
         break;
 
       case 3:
       case 4:
-        schedule_ulsch(module_idP,frameP,cooperation_flag,subframeP,3,nCCE);
-        schedule_ue_spec(module_idP,frameP,subframeP,nprb,nCCE,mbsfn_status);
-        fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,0,mbsfn_status);
+        schedule_ulsch(module_idP,frameP,cooperation_flag,subframeP,3);
+        schedule_ue_spec(module_idP,frameP,subframeP,mbsfn_status);
+        fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
         break;
 
       case 6:
-        schedule_ulsch(module_idP,frameP,cooperation_flag,subframeP,4,nCCE);
-        //schedule_RA(module_idP,frameP,subframeP,nprb,nCCE);
-        schedule_ue_spec(module_idP,frameP,subframeP,nprb,nCCE,mbsfn_status);
-        fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,0,mbsfn_status);
+        schedule_ulsch(module_idP,frameP,cooperation_flag,subframeP,4);
+        //schedule_RA(module_idP,frameP,subframeP);
+        schedule_ue_spec(module_idP,frameP,subframeP,mbsfn_status);
+        fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
         break;
 
       case 2:
       case 5:
-        //schedule_RA(module_idP,frameP,subframeP,nprb,nCCE);
-        schedule_ue_spec(module_idP,frameP,subframeP,nprb,nCCE,mbsfn_status);
-        fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,0,mbsfn_status);
+        //schedule_RA(module_idP,frameP,subframeP);
+        schedule_ue_spec(module_idP,frameP,subframeP,mbsfn_status);
+        fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
         break;
 
       default:
         break;
       }
     } else { //FDD
-      //     schedule_ulsch(module_idP,frameP,cooperation_flag,9,3,nCCE);
-      schedule_ue_spec(module_idP,frameP,subframeP,nprb,nCCE,mbsfn_status);
-      fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,0,mbsfn_status);
+      //     schedule_ulsch(module_idP,frameP,cooperation_flag,9,3);
+      //      schedule_ue_spec(module_idP,frameP,subframeP,mbsfn_status);
+      fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
     }
 
     break;
 
   }
 
-  for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
-    DCI_pdu[CC_id]->nCCE = nCCE[CC_id];
-  }
+  LOG_D(MAC,"FrameP %d, subframeP %d : Scheduling CCEs\n",frameP,subframeP);
 
-  LOG_D(MAC,"frameP %d, subframeP %d nCCE %d\n",frameP,subframeP,nCCE[0]);
+  // Allocate CCEs for good after scheduling is done
+  for (CC_id=0;CC_id<MAX_NUM_CCs;CC_id++)
+    allocate_CCEs(module_idP,CC_id,subframeP,0);
+
+  LOG_D(MAC,"frameP %d, subframeP %d\n",frameP,subframeP);
 
   stop_meas(&eNB_mac_inst[module_idP].eNB_scheduler);
   VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_ENB_DLSCH_ULSCH_SCHEDULER,VCD_FUNCTION_OUT);
diff --git a/openair2/LAYER2/MAC/eNB_scheduler_RA.c b/openair2/LAYER2/MAC/eNB_scheduler_RA.c
index 361c0f461f..524268665b 100644
--- a/openair2/LAYER2/MAC/eNB_scheduler_RA.c
+++ b/openair2/LAYER2/MAC/eNB_scheduler_RA.c
@@ -68,7 +68,8 @@
 
 #include "SIMULATION/TOOLS/defs.h" // for taus
 
-void schedule_RA(module_id_t module_idP,frame_t frameP, sub_frame_t subframeP,unsigned char Msg3_subframe,unsigned int *nprb,unsigned int *nCCE)
+
+void schedule_RA(module_id_t module_idP,frame_t frameP, sub_frame_t subframeP,unsigned char Msg3_subframe)
 {
 
   int CC_id;
@@ -76,34 +77,195 @@ void schedule_RA(module_id_t module_idP,frame_t frameP, sub_frame_t subframeP,un
 
 
   RA_TEMPLATE *RA_template;
-  unsigned char i;//,harq_pid,round;
+  unsigned char i,harq_pid,round;
   int16_t rrc_sdu_length;
   unsigned char lcid,offset;
   module_id_t UE_id= UE_INDEX_INVALID;
   unsigned short TBsize = -1;
   unsigned short msg4_padding,msg4_post_padding,msg4_header;
+  uint8_t *vrb_map;
+  int first_rb;
+  int rballoc[MAX_NUM_CCs];
+  DCI_PDU *DCI_pdu;
 
   start_meas(&eNB->schedule_ra);
 
   for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
 
-    RA_template = (RA_TEMPLATE *)&eNB->common_channels[CC_id].RA_template[0];
+
+    vrb_map = eNB->common_channels[CC_id].vrb_map;
+    DCI_pdu = &eNB->common_channels[CC_id].DCI_pdu;
 
     for (i=0; i<NB_RA_PROC_MAX; i++) {
 
-      if (RA_template[i].RA_active == TRUE) {
+      RA_template = (RA_TEMPLATE *)&eNB->common_channels[CC_id].RA_template[i];
+
+      if (RA_template->RA_active == TRUE) {
 
         LOG_D(MAC,"[eNB %d][RAPROC] CC_id %d RA %d is active (generate RAR %d, generate_Msg4 %d, wait_ack_Msg4 %d, rnti %x)\n",
-              module_idP,CC_id,i,RA_template[i].generate_rar,RA_template[i].generate_Msg4,RA_template[i].wait_ack_Msg4, RA_template[i].rnti);
+              module_idP,CC_id,i,RA_template->generate_rar,RA_template->generate_Msg4,RA_template->wait_ack_Msg4, RA_template->rnti);
 
-        if (RA_template[i].generate_rar == 1) {
-          nprb[CC_id]= nprb[CC_id] + 3;
-          nCCE[CC_id] = nCCE[CC_id] + 4;
-          RA_template[i].Msg3_subframe=Msg3_subframe;
-        } else if (RA_template[i].generate_Msg4 == 1) {
+        if (RA_template->generate_rar == 1) {
+
+          LOG_D(MAC,"[eNB %d] CC_id %d Frame %d, subframeP %d: Generating RAR DCI (proc %d), RA_active %d format 1A (%d,%d))\n",
+                module_idP, CC_id, frameP, subframeP,i,
+                RA_template->RA_active,
+                RA_template->RA_dci_fmt1,
+                RA_template->RA_dci_size_bits1);
+
+
+
+          if (PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.frame_type == TDD) {
+            switch(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL) {
+            case 6:
+              ((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->type=1;
+              ((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type=0;
+              ((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->ndi=1;
+              ((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->rv=0;
+              ((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->mcs=0;
+              ((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->harq_pid=0;
+              ((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->TPC=1;
+              ((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->padding=0;
+              ((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
+              rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type,
+                                ((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->rballoc);
+              break;
+
+            case 25:
+              ((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->type=1;
+              ((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type=0;
+              ((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->ndi=1;
+              ((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->rv=0;
+              ((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->mcs=0;
+              ((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->harq_pid=0;
+              ((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->TPC=1;
+              ((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->padding=0;
+              ((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
+              rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type,
+                                ((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->rballoc);
+              break;
+
+            case 50:
+              ((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->type=1;
+              ((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type=0;
+              ((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->ndi=1;
+              ((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->rv=0;
+              ((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->mcs=0;
+              ((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->harq_pid=0;
+              ((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->TPC=1;
+              ((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->padding=0;
+              ((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
+              rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type,
+                                ((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->rballoc);
+              break;
+
+            case 100:
+              ((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->type=1;
+              ((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type=0;
+              ((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->ndi=1;
+              ((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->rv=0;
+              ((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->mcs=0;
+              ((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->harq_pid=0;
+              ((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->TPC=1;
+              ((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->padding=0;
+              ((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
+              rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type,
+                                ((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->rballoc);
+              break;
+
+            default:
+              ((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->type=1;
+              ((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type=0;
+              ((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->ndi=1;
+              ((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->rv=0;
+              ((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->mcs=0;
+              ((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->harq_pid=0;
+              ((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->TPC=1;
+              ((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->padding=0;
+              ((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
+              rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type,
+                                ((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->rballoc);
+              break;
+            }
+          } else {
+            switch(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL) {
+            case 6:
+              ((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->type=1;
+              ((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type=0;
+              ((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->ndi=1;
+              ((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->rv=0;
+              ((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->mcs=0;
+              ((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->harq_pid=0;
+              ((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->TPC=1;
+              ((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->padding=0;
+              ((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
+              rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type,
+                                ((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->rballoc);
+              break;
+
+            case 25:
+              ((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->type=1;
+              ((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type=0;
+              ((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->ndi=1;
+              ((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->rv=0;
+              ((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->mcs=0;
+              ((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->harq_pid=0;
+              ((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->TPC=1;
+              ((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->padding=0;
+              ((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_UL,first_rb,4);
+              rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type,
+                                ((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->rballoc);
+              break;
+
+            case 50:
+              ((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->type=1;
+              ((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type=0;
+              ((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->ndi=1;
+              ((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->rv=0;
+              ((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->mcs=0;
+              ((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->harq_pid=0;
+              ((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->TPC=1;
+              ((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->padding=0;
+              ((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
+              rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type,
+                                ((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->rballoc);
+              break;
+
+            case 100:
+              ((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->type=1;
+              ((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type=0;
+              ((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->ndi=1;
+              ((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->rv=0;
+              ((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->mcs=0;
+              ((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->harq_pid=0;
+              ((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->TPC=1;
+              ((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->padding=0;
+              ((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
+              rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type,
+                                ((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->rballoc);
+              break;
+
+            default:
+              break;
+            }
+          }
+
+	  if (!CCE_allocation_infeasible(module_idP,CC_id,1,subframeP,2,RA_template->RA_rnti)) {
+	    add_common_dci(DCI_pdu,
+			   (void*)&RA_template->RA_alloc_pdu1[0],
+			   RA_template->RA_rnti,
+			   RA_template->RA_dci_size_bytes1,
+			   2,
+			   RA_template->RA_dci_size_bits1,
+			   RA_template->RA_dci_fmt1,
+			   1);
+
+	    RA_template->Msg3_subframe=Msg3_subframe;
+	  }
+        } else if (RA_template->generate_Msg4 == 1) {
 
           // check for Msg4 Message
-          UE_id = find_UE_id(module_idP,RA_template[i].rnti);
+          UE_id = find_UE_id(module_idP,RA_template->rnti);
 
           if (Is_rrc_registered == 1) {
 
@@ -131,7 +293,7 @@ void schedule_RA(module_id_t module_idP,frame_t frameP, sub_frame_t subframeP,un
 
           if (rrc_sdu_length>0) {
             LOG_I(MAC,"[eNB %d][RAPROC] CC_id %d Frame %d, subframeP %d: Generating Msg4 with RRC Piggyback (RA proc %d, RNTI %x)\n",
-                  module_idP, CC_id, frameP, subframeP,i,RA_template[i].rnti);
+                  module_idP, CC_id, frameP, subframeP,i,RA_template->rnti);
 
             //msg("[MAC][eNB %d][RAPROC] Frame %d, subframeP %d: Received %d bytes for Msg4: \n",module_idP,frameP,subframeP,rrc_sdu_length);
             //    for (j=0;j<rrc_sdu_length;j++)
@@ -140,6 +302,18 @@ void schedule_RA(module_id_t module_idP,frame_t frameP, sub_frame_t subframeP,un
             //    msg("[MAC][eNB] Frame %d, subframeP %d: Generated DLSCH (Msg4) DCI, format 1A, for UE %d\n",frameP, subframeP,UE_id);
             // Schedule Reflection of Connection request
 
+	    // randomize frequency allocation for RA
+	    while (1) {
+	      first_rb = (unsigned char)(taus()%(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL-4));
+	      
+	      if ((vrb_map[first_rb] != 1) && (vrb_map[first_rb+3] != 1))
+		break;
+	    }
+	    
+	    vrb_map[first_rb] = 1;
+	    vrb_map[first_rb+1] = 1;
+	    vrb_map[first_rb+2] = 1;
+	    vrb_map[first_rb+3] = 1;
 
 
             // Compute MCS for 3 PRB
@@ -149,273 +323,404 @@ void schedule_RA(module_id_t module_idP,frame_t frameP, sub_frame_t subframeP,un
 
               switch (mac_xface->lte_frame_parms->N_RB_DL) {
               case 6:
-                ((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template[i].RA_alloc_pdu2[0])->ndi=1;
+                ((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->ndi=1;
 
                 if ((rrc_sdu_length+msg4_header) <= 22) {
-                  ((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=4;
+                  ((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->mcs=4;
                   TBsize = 22;
                 } else if ((rrc_sdu_length+msg4_header) <= 28) {
-                  ((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=5;
+                  ((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->mcs=5;
                   TBsize = 28;
                 } else if ((rrc_sdu_length+msg4_header) <= 32) {
-                  ((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=6;
+                  ((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->mcs=6;
                   TBsize = 32;
                 } else if ((rrc_sdu_length+msg4_header) <= 41) {
-                  ((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=7;
+                  ((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->mcs=7;
                   TBsize = 41;
                 } else if ((rrc_sdu_length+msg4_header) <= 49) {
-                  ((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=8;
+                  ((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->mcs=8;
                   TBsize = 49;
                 } else if ((rrc_sdu_length+msg4_header) <= 57) {
-                  ((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=9;
+                  ((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->mcs=9;
                   TBsize = 57;
                 }
-
+		((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->type=1;
+		((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type=0;
+		((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->rv=0;
+		((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->harq_pid=0;
+		((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->TPC=1;
+		((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->padding=0;
+		((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->rballoc= mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
+		rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type,
+							 ((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->rballoc);
+		
                 break;
 
               case 25:
 
-                ((DCI1A_5MHz_TDD_1_6_t*)&RA_template[i].RA_alloc_pdu2[0])->ndi=1;
+                ((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->ndi=1;
 
                 if ((rrc_sdu_length+msg4_header) <= 22) {
-                  ((DCI1A_5MHz_TDD_1_6_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=4;
+                  ((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->mcs=4;
                   TBsize = 22;
                 } else if ((rrc_sdu_length+msg4_header) <= 28) {
-                  ((DCI1A_5MHz_TDD_1_6_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=5;
+                  ((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->mcs=5;
                   TBsize = 28;
                 } else if ((rrc_sdu_length+msg4_header) <= 32) {
-                  ((DCI1A_5MHz_TDD_1_6_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=6;
+                  ((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->mcs=6;
                   TBsize = 32;
                 } else if ((rrc_sdu_length+msg4_header) <= 41) {
-                  ((DCI1A_5MHz_TDD_1_6_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=7;
+                  ((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->mcs=7;
                   TBsize = 41;
                 } else if ((rrc_sdu_length+msg4_header) <= 49) {
-                  ((DCI1A_5MHz_TDD_1_6_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=8;
+                  ((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->mcs=8;
                   TBsize = 49;
                 } else if ((rrc_sdu_length+msg4_header) <= 57) {
-                  ((DCI1A_5MHz_TDD_1_6_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=9;
+                  ((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->mcs=9;
                   TBsize = 57;
                 }
-
+		
+		((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->type=1;
+		((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type=0;
+		((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->rv=0;
+		((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->harq_pid=0;
+		((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->TPC=1;
+		((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->padding=0;
+		((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->rballoc= mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
+		rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type,
+							 ((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->rballoc);
                 break;
 
               case 50:
 
-                ((DCI1A_10MHz_TDD_1_6_t*)&RA_template[i].RA_alloc_pdu2[0])->ndi=1;
+                ((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->ndi=1;
 
                 if ((rrc_sdu_length+msg4_header) <= 22) {
-                  ((DCI1A_10MHz_TDD_1_6_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=4;
+                  ((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->mcs=4;
                   TBsize = 22;
                 } else if ((rrc_sdu_length+msg4_header) <= 28) {
-                  ((DCI1A_10MHz_TDD_1_6_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=5;
+                  ((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->mcs=5;
                   TBsize = 28;
                 } else if ((rrc_sdu_length+msg4_header) <= 32) {
-                  ((DCI1A_10MHz_TDD_1_6_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=6;
+                  ((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->mcs=6;
                   TBsize = 32;
                 } else if ((rrc_sdu_length+msg4_header) <= 41) {
-                  ((DCI1A_10MHz_TDD_1_6_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=7;
+                  ((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->mcs=7;
                   TBsize = 41;
                 } else if ((rrc_sdu_length+msg4_header) <= 49) {
-                  ((DCI1A_10MHz_TDD_1_6_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=8;
+                  ((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->mcs=8;
                   TBsize = 49;
                 } else if ((rrc_sdu_length+msg4_header) <= 57) {
-                  ((DCI1A_10MHz_TDD_1_6_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=9;
+                  ((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->mcs=9;
                   TBsize = 57;
                 }
+		((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->type=1;
+		((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type=0;
+		((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->rv=0;
+		((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->harq_pid=0;
+		((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->TPC=1;
+		((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->padding=0;
+		((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->rballoc= mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
+		rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type,
+							 ((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->rballoc);
 
                 break;
 
               case 100:
 
-                ((DCI1A_20MHz_TDD_1_6_t*)&RA_template[i].RA_alloc_pdu2[0])->ndi=1;
+                ((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->ndi=1;
 
                 if ((rrc_sdu_length+msg4_header) <= 22) {
-                  ((DCI1A_20MHz_TDD_1_6_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=4;
+                  ((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->mcs=4;
                   TBsize = 22;
                 } else if ((rrc_sdu_length+msg4_header) <= 28) {
-                  ((DCI1A_20MHz_TDD_1_6_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=5;
+                  ((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->mcs=5;
                   TBsize = 28;
                 } else if ((rrc_sdu_length+msg4_header) <= 32) {
-                  ((DCI1A_20MHz_TDD_1_6_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=6;
+                  ((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->mcs=6;
                   TBsize = 32;
                 } else if ((rrc_sdu_length+msg4_header) <= 41) {
-                  ((DCI1A_20MHz_TDD_1_6_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=7;
+                  ((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->mcs=7;
                   TBsize = 41;
                 } else if ((rrc_sdu_length+msg4_header) <= 49) {
-                  ((DCI1A_20MHz_TDD_1_6_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=8;
+                  ((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->mcs=8;
                   TBsize = 49;
                 } else if ((rrc_sdu_length+msg4_header) <= 57) {
-                  ((DCI1A_20MHz_TDD_1_6_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=9;
+                  ((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->mcs=9;
                   TBsize = 57;
                 }
 
+		((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->type=1;
+		((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type=0;
+		((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->rv=0;
+		((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->harq_pid=0;
+		((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->TPC=1;
+		((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->rballoc= mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
+		rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type,
+							 ((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->rballoc);
                 break;
               }
             } else { // FDD DCI
               switch (mac_xface->lte_frame_parms->N_RB_DL) {
               case 6:
-                ((DCI1A_1_5MHz_FDD_t*)&RA_template[i].RA_alloc_pdu2[0])->ndi=1;
+                ((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->ndi=1;
 
                 if ((rrc_sdu_length+msg4_header) <= 22) {
-                  ((DCI1A_1_5MHz_FDD_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=4;
+                  ((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->mcs=4;
                   TBsize = 22;
                 } else if ((rrc_sdu_length+msg4_header) <= 28) {
-                  ((DCI1A_1_5MHz_FDD_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=5;
+                  ((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->mcs=5;
                   TBsize = 28;
                 } else if ((rrc_sdu_length+msg4_header) <= 32) {
-                  ((DCI1A_1_5MHz_FDD_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=6;
+                  ((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->mcs=6;
                   TBsize = 32;
                 } else if ((rrc_sdu_length+msg4_header) <= 41) {
-                  ((DCI1A_1_5MHz_FDD_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=7;
+                  ((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->mcs=7;
                   TBsize = 41;
                 } else if ((rrc_sdu_length+msg4_header) <= 49) {
-                  ((DCI1A_1_5MHz_FDD_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=8;
+                  ((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->mcs=8;
                   TBsize = 49;
                 } else if ((rrc_sdu_length+msg4_header) <= 57) {
-                  ((DCI1A_1_5MHz_FDD_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=9;
+                  ((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->mcs=9;
                   TBsize = 57;
                 }
 
+		((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->type=1;
+		((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type=0;
+		((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->rv=0;
+		((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->harq_pid=0;
+		((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->TPC=1;
+		((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->padding=0;
+		((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->rballoc= mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
+		rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type,
+							 ((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->rballoc);
                 break;
 
               case 25:
-                ((DCI1A_5MHz_FDD_t*)&RA_template[i].RA_alloc_pdu2[0])->ndi=1;
+                ((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->ndi=1;
 
                 if ((rrc_sdu_length+msg4_header) <= 22) {
-                  ((DCI1A_5MHz_FDD_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=4;
+                  ((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->mcs=4;
                   TBsize = 22;
                 } else if ((rrc_sdu_length+msg4_header) <= 28) {
-                  ((DCI1A_5MHz_FDD_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=5;
+                  ((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->mcs=5;
                   TBsize = 28;
                 } else if ((rrc_sdu_length+msg4_header) <= 32) {
-                  ((DCI1A_5MHz_FDD_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=6;
+                  ((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->mcs=6;
                   TBsize = 32;
                 } else if ((rrc_sdu_length+msg4_header) <= 41) {
-                  ((DCI1A_5MHz_FDD_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=7;
+                  ((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->mcs=7;
                   TBsize = 41;
                 } else if ((rrc_sdu_length+msg4_header) <= 49) {
-                  ((DCI1A_5MHz_FDD_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=8;
+                  ((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->mcs=8;
                   TBsize = 49;
                 } else if ((rrc_sdu_length+msg4_header) <= 57) {
-                  ((DCI1A_5MHz_FDD_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=9;
+                  ((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->mcs=9;
                   TBsize = 57;
                 }
 
+		((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->type=1;
+		((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type=0;
+		((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->rv=0;
+		((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->harq_pid=0;
+		((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->TPC=1;
+		((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->padding=0;
+		((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->rballoc= mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
+		rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type,
+							 ((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->rballoc);
                 break;
 
               case 50:
-                ((DCI1A_10MHz_FDD_t*)&RA_template[i].RA_alloc_pdu2[0])->ndi=1;
+                ((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->ndi=1;
 
                 if ((rrc_sdu_length+msg4_header) <= 22) {
-                  ((DCI1A_10MHz_FDD_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=4;
+                  ((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->mcs=4;
                   TBsize = 22;
                 } else if ((rrc_sdu_length+msg4_header) <= 28) {
-                  ((DCI1A_10MHz_FDD_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=5;
+                  ((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->mcs=5;
                   TBsize = 28;
                 } else if ((rrc_sdu_length+msg4_header) <= 32) {
-                  ((DCI1A_10MHz_FDD_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=6;
+                  ((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->mcs=6;
                   TBsize = 32;
                 } else if ((rrc_sdu_length+msg4_header) <= 41) {
-                  ((DCI1A_10MHz_FDD_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=7;
+                  ((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->mcs=7;
                   TBsize = 41;
                 } else if ((rrc_sdu_length+msg4_header) <= 49) {
-                  ((DCI1A_10MHz_FDD_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=8;
+                  ((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->mcs=8;
                   TBsize = 49;
                 } else if ((rrc_sdu_length+msg4_header) <= 57) {
-                  ((DCI1A_10MHz_FDD_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=9;
+                  ((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->mcs=9;
                   TBsize = 57;
                 }
 
+		((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->type=1;
+		((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type=0;
+		((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->rv=0;
+		((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->harq_pid=0;
+		((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->TPC=1;
+		((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->padding=0;
+		((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->rballoc= mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
+		rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type,
+							 ((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->rballoc);
                 break;
 
               case 100:
-                ((DCI1A_20MHz_FDD_t*)&RA_template[i].RA_alloc_pdu2[0])->ndi=1;
+                ((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->ndi=1;
 
                 if ((rrc_sdu_length+msg4_header) <= 22) {
-                  ((DCI1A_20MHz_FDD_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=4;
+                  ((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->mcs=4;
                   TBsize = 22;
                 } else if ((rrc_sdu_length+msg4_header) <= 28) {
-                  ((DCI1A_20MHz_FDD_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=5;
+                  ((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->mcs=5;
                   TBsize = 28;
                 } else if ((rrc_sdu_length+msg4_header) <= 32) {
-                  ((DCI1A_20MHz_FDD_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=6;
+                  ((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->mcs=6;
                   TBsize = 32;
                 } else if ((rrc_sdu_length+msg4_header) <= 41) {
-                  ((DCI1A_20MHz_FDD_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=7;
+                  ((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->mcs=7;
                   TBsize = 41;
                 } else if ((rrc_sdu_length+msg4_header) <= 49) {
-                  ((DCI1A_20MHz_FDD_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=8;
+                  ((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->mcs=8;
                   TBsize = 49;
                 } else if ((rrc_sdu_length+msg4_header) <= 57) {
-                  ((DCI1A_20MHz_FDD_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs=9;
+                  ((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->mcs=9;
                   TBsize = 57;
                 }
-
+		((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->type=1;
+		((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type=0;
+		((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->rv=0;
+		((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->harq_pid=0;
+		((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->TPC=1;
+		((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->padding=0;
+		((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->rballoc= mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
+		rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type,
+							 ((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->rballoc);
                 break;
               }
             }
 
-            RA_template[i].generate_Msg4=0;
-            RA_template[i].generate_Msg4_dci=1;
-            RA_template[i].wait_ack_Msg4=1;
-            RA_template[i].RA_active = FALSE;
-            lcid=0;
-
-            if ((TBsize - rrc_sdu_length - msg4_header) <= 2) {
-              msg4_padding = TBsize - rrc_sdu_length - msg4_header;
-              msg4_post_padding = 0;
-            } else {
-              msg4_padding = 0;
-              msg4_post_padding = TBsize - rrc_sdu_length - msg4_header -1;
-            }
-
-            LOG_I(MAC,"[eNB %d][RAPROC] CC_id %d Frame %d subframeP %d Msg4 : TBS %d, sdu_len %d, msg4_header %d, msg4_padding %d, msg4_post_padding %d\n",
-                  module_idP,CC_id,frameP,subframeP,TBsize,rrc_sdu_length,msg4_header,msg4_padding,msg4_post_padding);
-            DevAssert( UE_id != UE_INDEX_INVALID ); // FIXME not sure how to gracefully return
-            offset = generate_dlsch_header((unsigned char*)eNB->UE_list.DLSCH_pdu[CC_id][0][(unsigned char)UE_id].payload[0],
-                                           1,                           //num_sdus
-                                           (unsigned short*)&rrc_sdu_length,             //
-                                           &lcid,                       // sdu_lcid
-                                           255,                         // no drx
-                                           0,                           // no timing advance
-                                           RA_template[i].cont_res_id,  // contention res id
-                                           msg4_padding,                // no padding
-                                           msg4_post_padding);
-
-            memcpy((void*)&eNB->UE_list.DLSCH_pdu[CC_id][0][(unsigned char)UE_id].payload[0][(unsigned char)offset],
-                   &eNB->common_channels[CC_id].CCCH_pdu.payload[0],
-                   rrc_sdu_length);
-
-            if (opt_enabled==1) {
-              trace_pdu(1, (uint8_t *)eNB->UE_list.DLSCH_pdu[CC_id][0][(unsigned char)UE_id].payload[0],
-                        rrc_sdu_length, UE_id, 3, UE_RNTI(module_idP, UE_id),
-                        eNB->subframe,0,0);
-              LOG_D(OPT,"[eNB %d][DLSCH] CC_id %d Frame %d trace pdu for rnti %x with size %d\n",
-                    module_idP, CC_id, frameP, UE_RNTI(module_idP,UE_id), rrc_sdu_length);
-            }
-
-            nprb[CC_id]= nprb[CC_id] + 3;
-            nCCE[CC_id] = nCCE[CC_id] + 4;
-          }
+	    if (!CCE_allocation_infeasible(module_idP,CC_id,0,subframeP,2,RA_template->rnti)) {
+	      add_ue_spec_dci(DCI_pdu,
+			      (void*)&RA_template->RA_alloc_pdu2[0],
+			      RA_template->rnti,
+			      RA_template->RA_dci_size_bytes2,
+			      2,
+			      RA_template->RA_dci_size_bits2,
+			      RA_template->RA_dci_fmt2,
+			      0);
+	      
+	      RA_template->generate_Msg4=0;
+	      RA_template->wait_ack_Msg4=1;
+	      RA_template->RA_active = FALSE;
+	      lcid=0;
+	      
+	      if ((TBsize - rrc_sdu_length - msg4_header) <= 2) {
+		msg4_padding = TBsize - rrc_sdu_length - msg4_header;
+		msg4_post_padding = 0;
+	      } else {
+		msg4_padding = 0;
+		msg4_post_padding = TBsize - rrc_sdu_length - msg4_header -1;
+	      }
+	      
+	      LOG_I(MAC,"[eNB %d][RAPROC] CC_id %d Frame %d subframeP %d Msg4 : TBS %d, sdu_len %d, msg4_header %d, msg4_padding %d, msg4_post_padding %d\n",
+		    module_idP,CC_id,frameP,subframeP,TBsize,rrc_sdu_length,msg4_header,msg4_padding,msg4_post_padding);
+	      DevAssert( UE_id != UE_INDEX_INVALID ); // FIXME not sure how to gracefully return
+	      offset = generate_dlsch_header((unsigned char*)eNB->UE_list.DLSCH_pdu[CC_id][0][(unsigned char)UE_id].payload[0],
+					     1,                           //num_sdus
+					     (unsigned short*)&rrc_sdu_length,             //
+					     &lcid,                       // sdu_lcid
+					     255,                         // no drx
+					     0,                           // no timing advance
+					     RA_template->cont_res_id,  // contention res id
+					     msg4_padding,                // no padding
+					     msg4_post_padding);
+	      
+	      memcpy((void*)&eNB->UE_list.DLSCH_pdu[CC_id][0][(unsigned char)UE_id].payload[0][(unsigned char)offset],
+		     &eNB->common_channels[CC_id].CCCH_pdu.payload[0],
+		     rrc_sdu_length);
+	      
+	      if (opt_enabled==1) {
+		trace_pdu(1, (uint8_t *)eNB->UE_list.DLSCH_pdu[CC_id][0][(unsigned char)UE_id].payload[0],
+			  rrc_sdu_length, UE_id, 3, UE_RNTI(module_idP, UE_id),
+			  eNB->subframe,0,0);
+		LOG_D(OPT,"[eNB %d][DLSCH] CC_id %d Frame %d trace pdu for rnti %x with size %d\n",
+		      module_idP, CC_id, frameP, UE_RNTI(module_idP,UE_id), rrc_sdu_length);
+	      }
+	      
+	    }
+	  }
 
           //try here
         }
 
-        /*
-        else if (eNB_mac_inst[module_idP][CC_id].RA_template[i].wait_ack_Msg4==1) {
-        // check HARQ status and retransmit if necessary
-        LOG_I(MAC,"[eNB %d][RAPROC] Frame %d, subframeP %d: Checking if Msg4 was acknowledged :\n",module_idP,frameP,subframeP);
-        // Get candidate harq_pid from PHY
-        mac_xface->get_ue_active_harq_pid(module_idP,eNB_mac_inst[module_idP][CC_id].RA_template[i].rnti,subframeP,&harq_pid,&round,0);
-        if (round>0) {
-         *nprb= (*nprb) + 3;
-         *nCCE = (*nCCE) + 4;
-        }
-        }
-         */
+      } else if (RA_template->wait_ack_Msg4==1) {
+	// check HARQ status and retransmit if necessary
+	LOG_I(MAC,"[eNB %d][RAPROC] CC_id %d Frame %d, subframeP %d: Checking if Msg4 was acknowledged: \n",
+	      module_idP,CC_id,frameP,subframeP);
+	// Get candidate harq_pid from PHY
+	mac_xface->get_ue_active_harq_pid(module_idP,CC_id,RA_template->rnti,frameP,subframeP,&harq_pid,&round,0);
+	
+	if (round>0) {
+	  //RA_template->wait_ack_Msg4++;
+	  // we have to schedule a retransmission
+	  if (PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.frame_type == TDD) {
+	    ((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->ndi=1;
+	  } else {
+	    ((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->ndi=1;
+	  }
+	  
+	  // randomize frequency allocation for RA
+	  while (1) {
+	    first_rb = (unsigned char)(taus()%(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL-4));
+	    
+	    if ((vrb_map[first_rb] != 1) && (vrb_map[first_rb+3] != 1))
+	      break;
+	  }
+	  
+	  vrb_map[first_rb] = 1;
+	  vrb_map[first_rb+1] = 1;
+	  vrb_map[first_rb+2] = 1;
+	  vrb_map[first_rb+3] = 1;
+	  
+	  if (PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.frame_type == TDD) {
+	    ((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_UL,first_rb,4);
+	    rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type,
+						     ((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->rballoc);
+	  } else {
+	    ((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_UL,first_rb,4);
+	    rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type,
+						     ((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->rballoc);
+	  }
+	  
+	  if (!CCE_allocation_infeasible(module_idP,CC_id,0,subframeP,2,RA_template->rnti)) {
+	    add_ue_spec_dci(DCI_pdu,
+			    (void*)&RA_template->RA_alloc_pdu2[0],
+			    RA_template->rnti,
+			    RA_template->RA_dci_size_bytes2,
+			    2,
+			    RA_template->RA_dci_size_bits2,
+			    RA_template->RA_dci_fmt2,
+			    0);
+	  }
+	  LOG_W(MAC,"[eNB %d][RAPROC] CC_id %d Frame %d, subframeP %d: Msg4 not acknowledged, adding ue specific dci (rnti %x) for RA (Msg4 Retransmission)\n",
+		module_idP,CC_id,frameP,subframeP,RA_template->rnti);
+	} else {
+	  /*      msg4 not received
+		  if ((round == 0) && (RA_template->wait_ack_Msg4>1){
+		  remove UE instance across all the layers: mac_xface->cancel_RA();
+		  }
+	  */
+	  LOG_I(MAC,"[eNB %d][RAPROC] CC_id %d Frame %d, subframeP %d : Msg4 acknowledged\n",module_idP,CC_id,frameP,subframeP);
+	  RA_template->wait_ack_Msg4=0;
+	  RA_template->RA_active=FALSE;
+	  UE_id = find_UE_id(module_idP,RA_template->rnti);
+	  DevAssert( UE_id != -1 );
+	  eNB_mac_inst[module_idP].UE_list.UE_template[UE_PCCID(module_idP,UE_id)][UE_id].configured=TRUE;
+	  
+	}
       }
-    }
-  }
+    } // for i=0 .. N_RA_PROC-1 
+  } // CC_id
 
   stop_meas(&eNB->schedule_ra);
 }
diff --git a/openair2/LAYER2/MAC/eNB_scheduler_bch.c b/openair2/LAYER2/MAC/eNB_scheduler_bch.c
index dd0890783e..b9a310c30c 100644
--- a/openair2/LAYER2/MAC/eNB_scheduler_bch.c
+++ b/openair2/LAYER2/MAC/eNB_scheduler_bch.c
@@ -72,9 +72,8 @@ void
 schedule_SI(
   module_id_t   module_idP,
   frame_t       frameP,
-  unsigned int* nprbP,
-  unsigned int* nCCEP
-)
+  sub_frame_t   subframeP)
+
 //------------------------------------------------------------------------------
 {
 
@@ -85,12 +84,19 @@ schedule_SI(
   void *BCCH_alloc_pdu;
   int CC_id;
   eNB_MAC_INST *eNB = &eNB_mac_inst[module_idP];
+  uint8_t *vrb_map;
+  int first_rb;
+  int rballoc[MAX_NUM_CCs];
+  int sizeof1A_bytes,sizeof1A_bits;
+  DCI_PDU *DCI_pdu;
 
   start_meas(&eNB->schedule_si);
 
   for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
-
-    BCCH_alloc_pdu=(void*)&eNB->common_channels[CC_id].BCCH_alloc_pdu;
+    
+    BCCH_alloc_pdu  = (void*)&eNB->common_channels[CC_id].BCCH_alloc_pdu;
+    DCI_pdu         = (void*)&eNB->common_channels[CC_id].DCI_pdu;
+    vrb_map         = (void*)&eNB->common_channels[CC_id].vrb_map;
 
     bcch_sdu_length = mac_rrc_data_req(module_idP,
                                        CC_id,
@@ -104,7 +110,21 @@ schedule_SI(
     if (bcch_sdu_length > 0) {
       LOG_D(MAC,"[eNB %d] Frame %d : BCCH->DLSCH CC_id %d, Received %d bytes \n",module_idP,frameP,CC_id,bcch_sdu_length);
 
+      // Allocate 4 PRBs in a random location
+      while (1) {
+	first_rb = (unsigned char)(taus()%(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL-4));
+	if ((vrb_map[first_rb] != 1) && 
+	    (vrb_map[first_rb+1] != 1) && 
+	    (vrb_map[first_rb+2] != 1) && 
+	    (vrb_map[first_rb+3] != 1))
+	  break;
+      }
+      vrb_map[first_rb] = 1;
+      vrb_map[first_rb+1] = 1;
+      vrb_map[first_rb+2] = 1;
+      vrb_map[first_rb+3] = 1;
 
+      // Get MCS for length of SI
       if (bcch_sdu_length <= (mac_xface->get_TBS_DL(0,3))) {
         mcs=0;
       } else if (bcch_sdu_length <= (mac_xface->get_TBS_DL(1,3))) {
@@ -125,46 +145,153 @@ schedule_SI(
         mcs=8;
       }
 
+
+
       if (PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.frame_type == TDD) {
         switch (PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL) {
         case 6:
           ((DCI1A_1_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->mcs = mcs;
+          ((DCI1A_1_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
+          ((DCI1A_1_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->type = 1;
+          ((DCI1A_1_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->vrb_type = 0;
+          ((DCI1A_1_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->ndi = 1;
+          ((DCI1A_1_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->rv = 1;
+          ((DCI1A_1_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->harq_pid = 0;
+          ((DCI1A_1_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->TPC = 1;
+          ((DCI1A_1_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->padding = 0;
+          rballoc[CC_id] |= mac_xface->get_rballoc(0,((DCI1A_1_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->rballoc);
+	  sizeof1A_bytes = sizeof(DCI1A_1_5MHz_TDD_1_6_t);
+	  sizeof1A_bits = sizeof_DCI1A_1_5MHz_TDD_1_6_t;
           break;
 
         case 25:
           ((DCI1A_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->mcs = mcs;
-          break;
+          ((DCI1A_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
+          ((DCI1A_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->type = 1;
+          ((DCI1A_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->vrb_type = 0;
+          ((DCI1A_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->ndi = 1;
+          ((DCI1A_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->rv = 1;
+          ((DCI1A_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->harq_pid = 0;
+          ((DCI1A_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->TPC = 1;
+          ((DCI1A_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->padding = 0;
+          rballoc[CC_id] |= mac_xface->get_rballoc(0,((DCI1A_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->rballoc);
+	  sizeof1A_bytes = sizeof(DCI1A_5MHz_TDD_1_6_t);
+	  sizeof1A_bits = sizeof_DCI1A_5MHz_TDD_1_6_t;
+	  break;
 
         case 50:
           ((DCI1A_10MHz_TDD_1_6_t*)BCCH_alloc_pdu)->mcs = mcs;
+          ((DCI1A_10MHz_TDD_1_6_t*)BCCH_alloc_pdu)->rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
+          ((DCI1A_10MHz_TDD_1_6_t*)BCCH_alloc_pdu)->type = 1;
+          ((DCI1A_10MHz_TDD_1_6_t*)BCCH_alloc_pdu)->vrb_type = 0;
+          ((DCI1A_10MHz_TDD_1_6_t*)BCCH_alloc_pdu)->ndi = 1;
+          ((DCI1A_10MHz_TDD_1_6_t*)BCCH_alloc_pdu)->rv = 1;
+          ((DCI1A_10MHz_TDD_1_6_t*)BCCH_alloc_pdu)->harq_pid = 0;
+          ((DCI1A_10MHz_TDD_1_6_t*)BCCH_alloc_pdu)->TPC = 1;
+          ((DCI1A_10MHz_TDD_1_6_t*)BCCH_alloc_pdu)->padding = 0;
+          rballoc[CC_id] |= mac_xface->get_rballoc(0,((DCI1A_10MHz_TDD_1_6_t*)BCCH_alloc_pdu)->rballoc);
+	  sizeof1A_bytes = sizeof(DCI1A_10MHz_TDD_1_6_t);
+	  sizeof1A_bits = sizeof_DCI1A_10MHz_TDD_1_6_t;
           break;
 
         case 100:
           ((DCI1A_20MHz_TDD_1_6_t*)BCCH_alloc_pdu)->mcs = mcs;
-          break;
+          ((DCI1A_20MHz_TDD_1_6_t*)BCCH_alloc_pdu)->rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
+          ((DCI1A_20MHz_TDD_1_6_t*)BCCH_alloc_pdu)->type = 1;
+          ((DCI1A_20MHz_TDD_1_6_t*)BCCH_alloc_pdu)->vrb_type = 0;
+          ((DCI1A_20MHz_TDD_1_6_t*)BCCH_alloc_pdu)->ndi = 1;
+          ((DCI1A_20MHz_TDD_1_6_t*)BCCH_alloc_pdu)->rv = 1;
+          ((DCI1A_20MHz_TDD_1_6_t*)BCCH_alloc_pdu)->harq_pid = 0;
+          ((DCI1A_20MHz_TDD_1_6_t*)BCCH_alloc_pdu)->TPC = 1;
+          ((DCI1A_20MHz_TDD_1_6_t*)BCCH_alloc_pdu)->padding = 0;
+          rballoc[CC_id] |= mac_xface->get_rballoc(0,((DCI1A_20MHz_TDD_1_6_t*)BCCH_alloc_pdu)->rballoc);
+	  sizeof1A_bytes = sizeof(DCI1A_20MHz_TDD_1_6_t);
+	  sizeof1A_bits = sizeof_DCI1A_20MHz_TDD_1_6_t; 
+         break;
         }
 
       } else {
         switch (PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL) {
         case 6:
           ((DCI1A_1_5MHz_FDD_t*)BCCH_alloc_pdu)->mcs = mcs;
+          ((DCI1A_1_5MHz_FDD_t*)BCCH_alloc_pdu)->rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
+          ((DCI1A_1_5MHz_FDD_t*)BCCH_alloc_pdu)->type = 1;
+          ((DCI1A_1_5MHz_FDD_t*)BCCH_alloc_pdu)->vrb_type = 0;
+          ((DCI1A_1_5MHz_FDD_t*)BCCH_alloc_pdu)->ndi = 1;
+          ((DCI1A_1_5MHz_FDD_t*)BCCH_alloc_pdu)->rv = 1;
+          ((DCI1A_1_5MHz_FDD_t*)BCCH_alloc_pdu)->harq_pid = 0;
+          ((DCI1A_1_5MHz_FDD_t*)BCCH_alloc_pdu)->TPC = 1;
+          ((DCI1A_1_5MHz_FDD_t*)BCCH_alloc_pdu)->padding = 0;
+
+          rballoc[CC_id] |= mac_xface->get_rballoc(0,((DCI1A_1_5MHz_FDD_t*)BCCH_alloc_pdu)->rballoc);
+	  sizeof1A_bytes = sizeof(DCI1A_1_5MHz_FDD_t);
+	  sizeof1A_bits = sizeof_DCI1A_1_5MHz_FDD_t;
           break;
 
         case 25:
           ((DCI1A_5MHz_FDD_t*)BCCH_alloc_pdu)->mcs = mcs;
+          ((DCI1A_5MHz_FDD_t*)BCCH_alloc_pdu)->rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
+          ((DCI1A_5MHz_FDD_t*)BCCH_alloc_pdu)->type = 1;
+          ((DCI1A_5MHz_FDD_t*)BCCH_alloc_pdu)->vrb_type = 0;
+          ((DCI1A_5MHz_FDD_t*)BCCH_alloc_pdu)->ndi = 1;
+          ((DCI1A_5MHz_FDD_t*)BCCH_alloc_pdu)->rv = 1;
+          ((DCI1A_5MHz_FDD_t*)BCCH_alloc_pdu)->harq_pid = 0;
+          ((DCI1A_5MHz_FDD_t*)BCCH_alloc_pdu)->TPC = 1;
+          ((DCI1A_5MHz_FDD_t*)BCCH_alloc_pdu)->padding = 0;
+
+          rballoc[CC_id] |= mac_xface->get_rballoc(0,((DCI1A_5MHz_FDD_t*)BCCH_alloc_pdu)->rballoc);
+	  sizeof1A_bytes = sizeof(DCI1A_5MHz_FDD_t);
+	  sizeof1A_bits = sizeof_DCI1A_5MHz_FDD_t;
           break;
 
         case 50:
           ((DCI1A_10MHz_FDD_t*)BCCH_alloc_pdu)->mcs = mcs;
+          ((DCI1A_10MHz_FDD_t*)BCCH_alloc_pdu)->rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
+          ((DCI1A_10MHz_FDD_t*)BCCH_alloc_pdu)->type = 1;
+          ((DCI1A_10MHz_FDD_t*)BCCH_alloc_pdu)->vrb_type = 0;
+          ((DCI1A_10MHz_FDD_t*)BCCH_alloc_pdu)->ndi = 1;
+          ((DCI1A_10MHz_FDD_t*)BCCH_alloc_pdu)->rv = 1;
+          ((DCI1A_10MHz_FDD_t*)BCCH_alloc_pdu)->harq_pid = 0;
+          ((DCI1A_10MHz_FDD_t*)BCCH_alloc_pdu)->TPC = 1;
+          ((DCI1A_10MHz_FDD_t*)BCCH_alloc_pdu)->padding = 0;
+
+          rballoc[CC_id] |= mac_xface->get_rballoc(0,((DCI1A_10MHz_FDD_t*)BCCH_alloc_pdu)->rballoc);
+	  sizeof1A_bytes = sizeof(DCI1A_10MHz_FDD_t);
+	  sizeof1A_bits = sizeof_DCI1A_10MHz_FDD_t;
           break;
 
         case 100:
           ((DCI1A_20MHz_FDD_t*)BCCH_alloc_pdu)->mcs = mcs;
-          break;
+          ((DCI1A_20MHz_FDD_t*)BCCH_alloc_pdu)->rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
+          ((DCI1A_20MHz_FDD_t*)BCCH_alloc_pdu)->type = 1;
+          ((DCI1A_20MHz_FDD_t*)BCCH_alloc_pdu)->vrb_type = 0;
+          ((DCI1A_20MHz_FDD_t*)BCCH_alloc_pdu)->ndi = 1;
+          ((DCI1A_20MHz_FDD_t*)BCCH_alloc_pdu)->rv = 1;
+          ((DCI1A_20MHz_FDD_t*)BCCH_alloc_pdu)->harq_pid = 0;
+          ((DCI1A_20MHz_FDD_t*)BCCH_alloc_pdu)->TPC = 1;
+          ((DCI1A_20MHz_FDD_t*)BCCH_alloc_pdu)->padding = 0;
+
+          rballoc[CC_id] |= mac_xface->get_rballoc(0,((DCI1A_20MHz_FDD_t*)BCCH_alloc_pdu)->rballoc);
+ 	  sizeof1A_bytes = sizeof(DCI1A_20MHz_FDD_t);
+	  sizeof1A_bits = sizeof_DCI1A_20MHz_FDD_t;
+	  break;
 
         }
       }
 
+      if (!CCE_allocation_infeasible(module_idP,CC_id,1,subframeP,2,SI_RNTI)) {
+	add_common_dci(DCI_pdu,
+		       BCCH_alloc_pdu,
+		       SI_RNTI,
+		       sizeof1A_bytes,
+		       2,
+		       sizeof1A_bits,
+		       format1A,0);
+      }
+      else {
+	LOG_E(MAC,"[eNB %d] CCid %d Frame %d, subframe %d : Cannot add DCI 1A for SI\n",module_idP, CC_id,frameP,subframeP);
+      }
+
       if (opt_enabled == 1) {
         trace_pdu(1,
                   &eNB->common_channels[CC_id].BCCH_pdu.payload[0],
@@ -194,17 +321,13 @@ schedule_SI(
               mac_xface->get_TBS_DL(mcs,3));
       }
 
-      eNB->common_channels[CC_id].bcch_active=1;
-      nprbP[CC_id]=3;
-      nCCEP[CC_id]=4;
+
       eNB->eNB_stats[CC_id].total_num_bcch_pdu+=1;
       eNB->eNB_stats[CC_id].bcch_buffer=bcch_sdu_length;
       eNB->eNB_stats[CC_id].total_bcch_buffer+=bcch_sdu_length;
       eNB->eNB_stats[CC_id].bcch_mcs=mcs;
     } else {
-      eNB->common_channels[CC_id].bcch_active=0;
-      nprbP[CC_id]=0;
-      nCCEP[CC_id]=0;
+
       //LOG_D(MAC,"[eNB %d] Frame %d : BCCH not active \n",Mod_id,frame);
     }
   }
diff --git a/openair2/LAYER2/MAC/eNB_scheduler_dlsch.c b/openair2/LAYER2/MAC/eNB_scheduler_dlsch.c
index 3dea35f053..332a0bd1de 100644
--- a/openair2/LAYER2/MAC/eNB_scheduler_dlsch.c
+++ b/openair2/LAYER2/MAC/eNB_scheduler_dlsch.c
@@ -422,16 +422,13 @@ schedule_ue_spec(
   module_id_t   module_idP,
   frame_t       frameP,
   sub_frame_t   subframeP,
-  unsigned int  *nb_rb_used0,
-  unsigned int  *nCCE_used,
-  int*           mbsfn_flag
+  int*          mbsfn_flag
 )
 //------------------------------------------------------------------------------
 {
 
   uint8_t               CC_id;
   int                   UE_id;
-  uint16_t              nCCE[MAX_NUM_CCs];
   int                   N_RBG[MAX_NUM_CCs];
   unsigned char         aggregation;
   mac_rlc_status_resp_t rlc_status;
@@ -459,6 +456,7 @@ schedule_ue_spec(
   int32_t                 tpc=1;
   static int32_t          tpc_accumulated=0;
   UE_sched_ctrl           *ue_sched_ctl;
+  int i;
 
   if (UE_list->head==-1) {
     return;
@@ -473,15 +471,18 @@ schedule_ue_spec(
   for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
     min_rb_unit[CC_id]=get_min_rb_unit(module_idP,CC_id);
     frame_parms[CC_id] = mac_xface->get_lte_frame_parms(module_idP,CC_id);
-    total_nb_available_rb[CC_id] = frame_parms[CC_id]->N_RB_DL - nb_rb_used0[CC_id];
-    nCCE[CC_id] = mac_xface->get_nCCE_max(module_idP,CC_id) - nCCE_used[CC_id];
+    // get number of PRBs less those used by common channels
+    total_nb_available_rb[CC_id] = frame_parms[CC_id]->N_RB_DL;
+    for (i=0;i<frame_parms[CC_id]->N_RB_DL;i++)
+      if (eNB->common_channels[CC_id].vrb_map[i]!=0)
+	total_nb_available_rb[CC_id]--;
+
     N_RBG[CC_id] = frame_parms[CC_id]->N_RBG;
 
     // store the global enb stats:
     eNB->eNB_stats[CC_id].num_dlactive_UEs =  UE_list->num_UEs;
     eNB->eNB_stats[CC_id].available_prbs =  total_nb_available_rb[CC_id];
     eNB->eNB_stats[CC_id].total_available_prbs +=  total_nb_available_rb[CC_id];
-    eNB->eNB_stats[CC_id].available_ncces = nCCE[CC_id];
     eNB->eNB_stats[CC_id].dlsch_bytes_tx=0;
     eNB->eNB_stats[CC_id].dlsch_pdus_tx=0;
   }
@@ -523,9 +524,11 @@ schedule_ue_spec(
         continue_flag=1;
       }
 
-      if ((ue_sched_ctl->pre_nb_available_rbs[CC_id] == 0) || (nCCE[CC_id] < (1<<aggregation))) {
+      if ((ue_sched_ctl->pre_nb_available_rbs[CC_id] == 0) ||  // no RBs allocated 
+	  CCE_allocation_infeasible(module_idP,CC_id,0,subframeP,aggregation,rnti)
+	  ) {
         LOG_D(MAC,"[eNB %d] Frame %d : no RB allocated for UE %d on CC_id %d: continue \n",
-              module_idP, frameP, UE_id, CC_id, nb_rb_used0[CC_id], ue_sched_ctl->pre_nb_available_rbs[CC_id], nCCE[CC_id], aggregation);
+              module_idP, frameP, UE_id, CC_id);
         //if(mac_xface->get_transmission_mode(module_idP,rnti)==5)
         continue_flag=1; //to next user (there might be rbs availiable for other UEs in TM5
         // else
@@ -540,7 +543,6 @@ schedule_ue_spec(
                     UE_list);
         // update UL DAI after DLSCH scheduling
         set_ul_DAI(module_idP,UE_id,CC_id,frameP,subframeP,frame_parms);
-
       }
 
       if (continue_flag == 1 ) {
@@ -587,11 +589,10 @@ schedule_ue_spec(
         UE_list->UE_template[CC_id][UE_id].rballoc_subband[harq_pid][j] = 0;
       }
 
-      LOG_D(MAC,"[eNB %d] Frame %d: Scheduling UE %d on CC_id %d (rnti %x, harq_pid %d, round %d, rb %d, cqi %d, mcs %d, ncc %d, rrc %d)\n",
+      LOG_D(MAC,"[eNB %d] Frame %d: Scheduling UE %d on CC_id %d (rnti %x, harq_pid %d, round %d, rb %d, cqi %d, mcs %d, rrc %d)\n",
             module_idP, frameP, UE_id,CC_id,rnti,harq_pid, round,nb_available_rb,
             eNB_UE_stats->DL_cqi[0], eNB_UE_stats->dlsch_mcs1,
-            nCCE[CC_id],
-            UE_list->eNB_UE_stats[CC_id][UE_id].rrc_status);
+	    UE_list->eNB_UE_stats[CC_id][UE_id].rrc_status);
 
 
       // Note this code is for a specific DCI format
@@ -641,8 +642,6 @@ schedule_ue_spec(
 
           nb_available_rb -= nb_rb;
           aggregation = process_ue_cqi(module_idP,UE_id);
-          nCCE[CC_id]-=(1<<aggregation); // adjust the remaining nCCE
-          nCCE_used[CC_id] += (1<<aggregation);
 
 
           PHY_vars_eNB_g[module_idP][CC_id]->mu_mimo_mode[UE_id].pre_nb_available_rbs = nb_rb;
@@ -789,7 +788,6 @@ schedule_ue_spec(
           UE_list->eNB_UE_stats[CC_id][UE_id].num_retransmission+=1;
           UE_list->eNB_UE_stats[CC_id][UE_id].rbs_used_retx=nb_rb;
           UE_list->eNB_UE_stats[CC_id][UE_id].total_rbs_used_retx+=nb_rb;
-          UE_list->eNB_UE_stats[CC_id][UE_id].ncce_used_retx=nCCE[CC_id];
           UE_list->eNB_UE_stats[CC_id][UE_id].dlsch_mcs1=eNB_UE_stats->dlsch_mcs1;
           UE_list->eNB_UE_stats[CC_id][UE_id].dlsch_mcs2=eNB_UE_stats->dlsch_mcs1;
         } else {
@@ -1130,8 +1128,6 @@ schedule_ue_spec(
           }
 
           aggregation = process_ue_cqi(module_idP,UE_id);
-          nCCE[CC_id]-=(1<<aggregation); // adjust the remaining nCCE
-          nCCE_used[CC_id]+=(1<<aggregation); // adjust the remaining nCCE
           UE_list->UE_template[CC_id][UE_id].nb_rb[harq_pid] = nb_rb;
 
           add_ue_dlsch_info(module_idP,
@@ -1145,7 +1141,6 @@ schedule_ue_spec(
 
           UE_list->eNB_UE_stats[CC_id][UE_id].rbs_used = nb_rb;
           UE_list->eNB_UE_stats[CC_id][UE_id].total_rbs_used += nb_rb;
-          UE_list->eNB_UE_stats[CC_id][UE_id].ncce_used = nCCE[CC_id];
           UE_list->eNB_UE_stats[CC_id][UE_id].dlsch_mcs1=eNB_UE_stats->dlsch_mcs1;
           UE_list->eNB_UE_stats[CC_id][UE_id].dlsch_mcs2=mcs;
           UE_list->eNB_UE_stats[CC_id][UE_id].TBS = TBS;
@@ -1498,10 +1493,9 @@ schedule_ue_spec(
       if (frame_parms[CC_id]->frame_type == TDD) {
         set_ul_DAI(module_idP,UE_id,CC_id,frameP,subframeP,frame_parms);
       }
-    }
-  }
 
-  //printf("MAC nCCE : %d\n",*nCCE_used);
+    } // UE_id loop
+  }  // CC_id loop
 
 
   stop_meas(&eNB->schedule_dlsch);
@@ -1512,13 +1506,11 @@ schedule_ue_spec(
 //------------------------------------------------------------------------------
 void
 fill_DLSCH_dci(
-  module_id_t module_idP,
-  frame_t frameP,
-  sub_frame_t subframeP,
-  uint32_t* RBallocP,
-  uint8_t RA_scheduledP,
-  int* mbsfn_flagP
-)
+	       module_id_t module_idP,
+	       frame_t frameP,
+	       sub_frame_t subframeP,
+	       int* mbsfn_flagP
+	       )
 //------------------------------------------------------------------------------
 {
 
@@ -1526,10 +1518,9 @@ fill_DLSCH_dci(
   int   UE_id = -1;
   uint8_t            first_rb,nb_rb=3;
   rnti_t        rnti;
-  unsigned char vrb_map[100];
+  unsigned char *vrb_map;
   uint8_t            rballoc_sub[25];
   //uint8_t number_of_subbands=13;
-  uint32_t           *rballoc=RBallocP;
 
   unsigned char round;
   unsigned char harq_pid;
@@ -1552,598 +1543,8 @@ fill_DLSCH_dci(
     if (mbsfn_flagP[CC_id]>0)
       continue;
 
-    DCI_pdu  = &eNB->common_channels[CC_id].DCI_pdu;
-    BCCH_alloc_pdu=(void*)&eNB->common_channels[CC_id].BCCH_alloc_pdu;
-    // clear vrb_map
-    memset(vrb_map,0,100);
-
-
-    // SI DLSCH
-    //  printf("BCCH check\n");
-    if (eNB->common_channels[CC_id].bcch_active == 1) {
-      eNB->common_channels[CC_id].bcch_active = 0;
-      LOG_D(MAC,"[eNB %d] CC_id %d Frame %d subframeP %d: BCCH active\n", module_idP, CC_id, frameP, subframeP);
-      // randomize frequency allocation for SI
-      first_rb = 0;//10;//(unsigned char)(taus()%(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL-4));
-
-      /*  Where is this from, should be removed!!!!
-
-      if (PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.frame_type == TDD) {
-
-      }
-      else {
-      BCCH_alloc_pdu_fdd.rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
-      rballoc[CC_id] |= mac_xface->get_rballoc(BCCH_alloc_pdu_fdd.vrb_type,BCCH_alloc_pdu_fdd.rballoc);
-      }
-      */
-
-
-      vrb_map[first_rb] = 1;
-      vrb_map[first_rb+1] = 1;
-      vrb_map[first_rb+2] = 1;
-      vrb_map[first_rb+3] = 1;
-
-      if (PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.frame_type == TDD) {
-        switch (PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL) {
-        case 6:
-          ((DCI1A_1_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
-          ((DCI1A_1_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->type = 1;
-          ((DCI1A_1_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->vrb_type = 0;
-          ((DCI1A_1_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->ndi = 1;
-          ((DCI1A_1_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->rv = 1;
-          ((DCI1A_1_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->harq_pid = 0;
-          ((DCI1A_1_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->TPC = 1;
-          ((DCI1A_1_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->padding = 0;
-          rballoc[CC_id] |= mac_xface->get_rballoc(0,((DCI1A_1_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->rballoc);
-          add_common_dci(DCI_pdu,
-                         BCCH_alloc_pdu,
-                         SI_RNTI,
-                         sizeof(DCI1A_1_5MHz_TDD_1_6_t),
-                         2,
-                         sizeof_DCI1A_1_5MHz_TDD_1_6_t,
-                         format1A,0);
-          break;
-
-        case 25:
-          ((DCI1A_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
-          ((DCI1A_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->type = 1;
-          ((DCI1A_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->vrb_type = 0;
-          ((DCI1A_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->ndi = 1;
-          ((DCI1A_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->rv = 1;
-          ((DCI1A_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->harq_pid = 0;
-          ((DCI1A_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->TPC = 1;
-          ((DCI1A_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->padding = 0;
-          rballoc[CC_id] |= mac_xface->get_rballoc(0,((DCI1A_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->rballoc);
-          add_common_dci(DCI_pdu,
-                         BCCH_alloc_pdu,
-                         SI_RNTI,
-                         sizeof(DCI1A_5MHz_TDD_1_6_t),
-                         2,
-                         sizeof_DCI1A_5MHz_TDD_1_6_t,
-                         format1A,0);
-          break;
-
-        case 50:
-          ((DCI1A_10MHz_TDD_1_6_t*)BCCH_alloc_pdu)->rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
-          ((DCI1A_10MHz_TDD_1_6_t*)BCCH_alloc_pdu)->type = 1;
-          ((DCI1A_10MHz_TDD_1_6_t*)BCCH_alloc_pdu)->vrb_type = 0;
-          ((DCI1A_10MHz_TDD_1_6_t*)BCCH_alloc_pdu)->ndi = 1;
-          ((DCI1A_10MHz_TDD_1_6_t*)BCCH_alloc_pdu)->rv = 1;
-          ((DCI1A_10MHz_TDD_1_6_t*)BCCH_alloc_pdu)->harq_pid = 0;
-          ((DCI1A_10MHz_TDD_1_6_t*)BCCH_alloc_pdu)->TPC = 1;
-          ((DCI1A_10MHz_TDD_1_6_t*)BCCH_alloc_pdu)->padding = 0;
-          rballoc[CC_id] |= mac_xface->get_rballoc(0,((DCI1A_10MHz_TDD_1_6_t*)BCCH_alloc_pdu)->rballoc);
-          add_common_dci(DCI_pdu,
-                         BCCH_alloc_pdu,
-                         SI_RNTI,
-                         sizeof(DCI1A_10MHz_TDD_1_6_t),
-                         2,
-                         sizeof_DCI1A_10MHz_TDD_1_6_t,
-                         format1A,0);
-          break;
-
-        case 100:
-          ((DCI1A_20MHz_TDD_1_6_t*)BCCH_alloc_pdu)->rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
-          ((DCI1A_20MHz_TDD_1_6_t*)BCCH_alloc_pdu)->type = 1;
-          ((DCI1A_20MHz_TDD_1_6_t*)BCCH_alloc_pdu)->vrb_type = 0;
-          ((DCI1A_20MHz_TDD_1_6_t*)BCCH_alloc_pdu)->ndi = 1;
-          ((DCI1A_20MHz_TDD_1_6_t*)BCCH_alloc_pdu)->rv = 1;
-          ((DCI1A_20MHz_TDD_1_6_t*)BCCH_alloc_pdu)->harq_pid = 0;
-          ((DCI1A_20MHz_TDD_1_6_t*)BCCH_alloc_pdu)->TPC = 1;
-          ((DCI1A_20MHz_TDD_1_6_t*)BCCH_alloc_pdu)->padding = 0;
-          rballoc[CC_id] |= mac_xface->get_rballoc(0,((DCI1A_20MHz_TDD_1_6_t*)BCCH_alloc_pdu)->rballoc);
-          add_common_dci(DCI_pdu,
-                         BCCH_alloc_pdu,
-                         SI_RNTI,
-                         sizeof(DCI1A_20MHz_TDD_1_6_t),
-                         2,
-                         sizeof_DCI1A_20MHz_TDD_1_6_t,
-                         format1A,0);
-          break;
-        }
-      } else {
-        switch (PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL) {
-        case 6:
-          ((DCI1A_1_5MHz_FDD_t*)BCCH_alloc_pdu)->rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
-          ((DCI1A_1_5MHz_FDD_t*)BCCH_alloc_pdu)->type = 1;
-          ((DCI1A_1_5MHz_FDD_t*)BCCH_alloc_pdu)->vrb_type = 0;
-          ((DCI1A_1_5MHz_FDD_t*)BCCH_alloc_pdu)->ndi = 1;
-          ((DCI1A_1_5MHz_FDD_t*)BCCH_alloc_pdu)->rv = 1;
-          ((DCI1A_1_5MHz_FDD_t*)BCCH_alloc_pdu)->harq_pid = 0;
-          ((DCI1A_1_5MHz_FDD_t*)BCCH_alloc_pdu)->TPC = 1;
-          ((DCI1A_1_5MHz_FDD_t*)BCCH_alloc_pdu)->padding = 0;
-
-          rballoc[CC_id] |= mac_xface->get_rballoc(0,((DCI1A_1_5MHz_FDD_t*)BCCH_alloc_pdu)->rballoc);
-          add_common_dci(DCI_pdu,
-                         BCCH_alloc_pdu,
-                         SI_RNTI,
-                         sizeof(DCI1A_1_5MHz_FDD_t),
-                         2,
-                         sizeof_DCI1A_1_5MHz_FDD_t,
-                         format1A,0);
-          break;
-
-        case 25:
-          ((DCI1A_5MHz_FDD_t*)BCCH_alloc_pdu)->rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
-          ((DCI1A_5MHz_FDD_t*)BCCH_alloc_pdu)->type = 1;
-          ((DCI1A_5MHz_FDD_t*)BCCH_alloc_pdu)->vrb_type = 0;
-          ((DCI1A_5MHz_FDD_t*)BCCH_alloc_pdu)->ndi = 1;
-          ((DCI1A_5MHz_FDD_t*)BCCH_alloc_pdu)->rv = 1;
-          ((DCI1A_5MHz_FDD_t*)BCCH_alloc_pdu)->harq_pid = 0;
-          ((DCI1A_5MHz_FDD_t*)BCCH_alloc_pdu)->TPC = 1;
-          ((DCI1A_5MHz_FDD_t*)BCCH_alloc_pdu)->padding = 0;
-
-          rballoc[CC_id] |= mac_xface->get_rballoc(0,((DCI1A_5MHz_FDD_t*)BCCH_alloc_pdu)->rballoc);
-          add_common_dci(DCI_pdu,
-                         BCCH_alloc_pdu,
-                         SI_RNTI,
-                         sizeof(DCI1A_5MHz_FDD_t),
-                         2,
-                         sizeof_DCI1A_5MHz_FDD_t,
-                         format1A,0);
-          break;
-
-        case 50:
-          ((DCI1A_10MHz_FDD_t*)BCCH_alloc_pdu)->rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
-          ((DCI1A_10MHz_FDD_t*)BCCH_alloc_pdu)->type = 1;
-          ((DCI1A_10MHz_FDD_t*)BCCH_alloc_pdu)->vrb_type = 0;
-          ((DCI1A_10MHz_FDD_t*)BCCH_alloc_pdu)->ndi = 1;
-          ((DCI1A_10MHz_FDD_t*)BCCH_alloc_pdu)->rv = 1;
-          ((DCI1A_10MHz_FDD_t*)BCCH_alloc_pdu)->harq_pid = 0;
-          ((DCI1A_10MHz_FDD_t*)BCCH_alloc_pdu)->TPC = 1;
-          ((DCI1A_10MHz_FDD_t*)BCCH_alloc_pdu)->padding = 0;
-
-          rballoc[CC_id] |= mac_xface->get_rballoc(0,((DCI1A_10MHz_FDD_t*)BCCH_alloc_pdu)->rballoc);
-          add_common_dci(DCI_pdu,
-                         BCCH_alloc_pdu,
-                         SI_RNTI,
-                         sizeof(DCI1A_10MHz_FDD_t),
-                         2,
-                         sizeof_DCI1A_10MHz_FDD_t,
-                         format1A,0);
-          break;
-
-        case 100:
-          ((DCI1A_20MHz_FDD_t*)BCCH_alloc_pdu)->rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
-          ((DCI1A_20MHz_FDD_t*)BCCH_alloc_pdu)->type = 1;
-          ((DCI1A_20MHz_FDD_t*)BCCH_alloc_pdu)->vrb_type = 0;
-          ((DCI1A_20MHz_FDD_t*)BCCH_alloc_pdu)->ndi = 1;
-          ((DCI1A_20MHz_FDD_t*)BCCH_alloc_pdu)->rv = 1;
-          ((DCI1A_20MHz_FDD_t*)BCCH_alloc_pdu)->harq_pid = 0;
-          ((DCI1A_20MHz_FDD_t*)BCCH_alloc_pdu)->TPC = 1;
-          ((DCI1A_20MHz_FDD_t*)BCCH_alloc_pdu)->padding = 0;
-
-          rballoc[CC_id] |= mac_xface->get_rballoc(0,((DCI1A_20MHz_FDD_t*)BCCH_alloc_pdu)->rballoc);
-          add_common_dci(DCI_pdu,
-                         BCCH_alloc_pdu,
-                         SI_RNTI,
-                         sizeof(DCI1A_20MHz_FDD_t),
-                         2,
-                         sizeof_DCI1A_20MHz_FDD_t,
-                         format1A,0);
-          break;
-        }
-      }
-    }
-
-    if (RA_scheduledP == 1) {
-      for (i=0; i<NB_RA_PROC_MAX; i++) {
-
-        RA_template = &eNB->common_channels[CC_id].RA_template[i];
-
-        if (RA_template->generate_rar == 1) {
-
-          //FK: postponed to fill_rar
-          //RA_template->generate_rar = 0;
-
-          LOG_D(MAC,"[eNB %d] CC_id %d Frame %d, subframeP %d: Generating RAR DCI (proc %d), RA_active %d format 1A (%d,%d))\n",
-                module_idP, CC_id, frameP, subframeP,i,
-                RA_template->RA_active,
-                RA_template->RA_dci_fmt1,
-                RA_template->RA_dci_size_bits1);
-
-          // randomize frequency allocation for RA
-          while (1) {
-            first_rb = (unsigned char)(taus()%(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL-4));
-
-            if ((vrb_map[first_rb] != 1) && (vrb_map[first_rb+3] != 1))
-              break;
-          }
-
-          vrb_map[first_rb] = 1;
-          vrb_map[first_rb+1] = 1;
-          vrb_map[first_rb+2] = 1;
-          vrb_map[first_rb+3] = 1;
-
-          if (PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.frame_type == TDD) {
-            switch(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL) {
-            case 6:
-              ((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->type=1;
-              ((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type=0;
-              ((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->ndi=1;
-              ((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->rv=0;
-              ((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->mcs=0;
-              ((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->harq_pid=0;
-              ((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->TPC=1;
-              ((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->padding=0;
-              ((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
-              rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type,
-                                ((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->rballoc);
-              break;
-
-            case 25:
-              ((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->type=1;
-              ((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type=0;
-              ((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->ndi=1;
-              ((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->rv=0;
-              ((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->mcs=0;
-              ((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->harq_pid=0;
-              ((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->TPC=1;
-              ((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->padding=0;
-              ((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
-              rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type,
-                                ((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->rballoc);
-              break;
-
-            case 50:
-              ((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->type=1;
-              ((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type=0;
-              ((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->ndi=1;
-              ((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->rv=0;
-              ((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->mcs=0;
-              ((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->harq_pid=0;
-              ((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->TPC=1;
-              ((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->padding=0;
-              ((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
-              rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type,
-                                ((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->rballoc);
-              break;
-
-            case 100:
-              ((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->type=1;
-              ((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type=0;
-              ((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->ndi=1;
-              ((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->rv=0;
-              ((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->mcs=0;
-              ((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->harq_pid=0;
-              ((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->TPC=1;
-              ((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->padding=0;
-              ((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
-              rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type,
-                                ((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->rballoc);
-              break;
-
-            default:
-              ((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->type=1;
-              ((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type=0;
-              ((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->ndi=1;
-              ((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->rv=0;
-              ((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->mcs=0;
-              ((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->harq_pid=0;
-              ((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->TPC=1;
-              ((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->padding=0;
-              ((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
-              rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type,
-                                ((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->rballoc);
-              break;
-            }
-          } else {
-            switch(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL) {
-            case 6:
-              ((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->type=1;
-              ((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type=0;
-              ((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->ndi=1;
-              ((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->rv=0;
-              ((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->mcs=0;
-              ((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->harq_pid=0;
-              ((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->TPC=1;
-              ((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->padding=0;
-              ((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
-              rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type,
-                                ((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->rballoc);
-              break;
-
-            case 25:
-              ((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->type=1;
-              ((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type=0;
-              ((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->ndi=1;
-              ((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->rv=0;
-              ((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->mcs=0;
-              ((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->harq_pid=0;
-              ((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->TPC=1;
-              ((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->padding=0;
-              ((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_UL,first_rb,4);
-              rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type,
-                                ((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->rballoc);
-              break;
-
-            case 50:
-              ((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->type=1;
-              ((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type=0;
-              ((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->ndi=1;
-              ((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->rv=0;
-              ((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->mcs=0;
-              ((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->harq_pid=0;
-              ((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->TPC=1;
-              ((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->padding=0;
-              ((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
-              rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type,
-                                ((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->rballoc);
-              break;
-
-            case 100:
-              ((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->type=1;
-              ((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type=0;
-              ((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->ndi=1;
-              ((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->rv=0;
-              ((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->mcs=0;
-              ((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->harq_pid=0;
-              ((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->TPC=1;
-              ((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->padding=0;
-              ((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
-              rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type,
-                                ((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->rballoc);
-              break;
-
-            default:
-              break;
-            }
-          }
-
-          add_common_dci(DCI_pdu,
-                         (void*)&RA_template->RA_alloc_pdu1[0],
-                         RA_template->RA_rnti,
-                         RA_template->RA_dci_size_bytes1,
-                         2,
-                         RA_template->RA_dci_size_bits1,
-                         RA_template->RA_dci_fmt1,
-                         1);
-
-
-
-          LOG_D(MAC,"[eNB %d] CC_id %d Frame %d: Adding common dci for RA%d (RAR) RA_active %d\n",
-                module_idP,CC_id,frameP,i, RA_template->RA_active);
-        }
-
-        if (RA_template->generate_Msg4_dci == 1) {
-
-          // randomize frequency allocation for RA
-          while (1) {
-            first_rb = (unsigned char)(taus()%(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL-4));
-
-            if ((vrb_map[first_rb] != 1) && (vrb_map[first_rb+3] != 1))
-              break;
-          }
-
-          vrb_map[first_rb] = 1;
-          vrb_map[first_rb+1] = 1;
-          vrb_map[first_rb+2] = 1;
-          vrb_map[first_rb+3] = 1;
-
-          if (PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.frame_type == TDD) {
-            switch (PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL) {
-            case 6:
-              ((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->type=1;
-              ((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type=0;
-              ((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->rv=0;
-              ((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->harq_pid=0;
-              ((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->TPC=1;
-              ((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->padding=0;
-              ((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->rballoc= mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
-              rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type,
-                                ((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->rballoc);
-              break;
-
-            case 25:
-              ((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->type=1;
-              ((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type=0;
-              ((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->rv=0;
-              ((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->harq_pid=0;
-              ((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->TPC=1;
-              ((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->padding=0;
-              ((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->rballoc= mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
-              rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type,
-                                ((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->rballoc);
-              break;
-
-            case 50:
-              ((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->type=1;
-              ((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type=0;
-              ((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->rv=0;
-              ((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->harq_pid=0;
-              ((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->TPC=1;
-              ((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->padding=0;
-              ((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->rballoc= mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
-              rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type,
-                                ((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->rballoc);
-              break;
-
-            case 100:
-              ((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->type=1;
-              ((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type=0;
-              ((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->rv=0;
-              ((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->harq_pid=0;
-              ((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->TPC=1;
-              ((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->rballoc= mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
-              rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type,
-                                ((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->rballoc);
-              break;
-
-            default:
-              ((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->type=1;
-              ((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type=0;
-              ((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->rv=0;
-              ((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->harq_pid=0;
-              ((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->TPC=1;
-              ((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->padding=0;
-              ((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->rballoc= mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
-              rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type,
-                                ((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->rballoc);
-              break;
-            }
-          } else {
-            switch (PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL) {
-
-            case 6:
-              ((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->type=1;
-              ((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type=0;
-              ((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->rv=0;
-              ((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->harq_pid=0;
-              ((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->TPC=1;
-              ((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->padding=0;
-              ((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->rballoc= mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
-              rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type,
-                                ((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->rballoc);
-              break;
-
-            case 25:
-              ((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->type=1;
-              ((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type=0;
-              ((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->rv=0;
-              ((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->harq_pid=0;
-              ((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->TPC=1;
-              ((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->padding=0;
-              ((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->rballoc= mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
-              rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type,
-                                ((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->rballoc);
-              break;
-
-            case 50:
-              ((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->type=1;
-              ((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type=0;
-              ((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->rv=0;
-              ((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->harq_pid=0;
-              ((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->TPC=1;
-              ((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->padding=0;
-              ((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->rballoc= mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
-              rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type,
-                                ((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->rballoc);
-              break;
-
-            case 100:
-              ((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->type=1;
-              ((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type=0;
-              ((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->rv=0;
-              ((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->harq_pid=0;
-              ((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->TPC=1;
-              ((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->padding=0;
-              ((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->rballoc= mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
-              rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type,
-                                ((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->rballoc);
-              break;
-
-            default:
-              ((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->type=1;
-              ((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type=0;
-              ((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->rv=0;
-              ((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->harq_pid=0;
-              ((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->TPC=1;
-              ((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->rballoc= mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
-              rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type,
-                                ((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->rballoc);
-              break;
-            }
-          }
-
-          add_ue_spec_dci(DCI_pdu,
-                          (void*)&RA_template->RA_alloc_pdu2[0],
-                          RA_template->rnti,
-                          RA_template->RA_dci_size_bytes2,
-                          1,
-                          RA_template->RA_dci_size_bits2,
-                          RA_template->RA_dci_fmt2,
-                          0);
-          LOG_D(MAC,"[eNB %d][RAPROC] CC_id %d Frame %d, subframeP %d: Adding ue specific dci (rnti %x) for Msg4\n",
-                module_idP,CC_id,frameP,subframeP,RA_template->rnti);
-          RA_template->generate_Msg4_dci=0;
-
-        } else if (RA_template->wait_ack_Msg4==1) {
-          // check HARQ status and retransmit if necessary
-          LOG_I(MAC,"[eNB %d][RAPROC] CC_id %d Frame %d, subframeP %d: Checking if Msg4 was acknowledged: \n",
-                module_idP,CC_id,frameP,subframeP);
-          // Get candidate harq_pid from PHY
-          mac_xface->get_ue_active_harq_pid(module_idP,CC_id,RA_template->rnti,frameP,subframeP,&harq_pid,&round,0);
-
-          if (round>0) {
-            //RA_template->wait_ack_Msg4++;
-            // we have to schedule a retransmission
-            if (PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.frame_type == TDD) {
-              ((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->ndi=1;
-            } else {
-              ((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->ndi=1;
-            }
-
-            // randomize frequency allocation for RA
-            while (1) {
-              first_rb = (unsigned char)(taus()%(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL-4));
-
-              if ((vrb_map[first_rb] != 1) && (vrb_map[first_rb+3] != 1))
-                break;
-            }
-
-            vrb_map[first_rb] = 1;
-            vrb_map[first_rb+1] = 1;
-            vrb_map[first_rb+2] = 1;
-            vrb_map[first_rb+3] = 1;
-
-            if (PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.frame_type == TDD) {
-              ((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_UL,first_rb,4);
-              rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type,
-                                ((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->rballoc);
-            } else {
-              ((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_UL,first_rb,4);
-              rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type,
-                                ((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->rballoc);
-            }
-
-            add_ue_spec_dci(DCI_pdu,
-                            (void*)&RA_template->RA_alloc_pdu2[0],
-                            RA_template->rnti,
-                            RA_template->RA_dci_size_bytes2,
-                            2,
-                            RA_template->RA_dci_size_bits2,
-                            RA_template->RA_dci_fmt2,
-                            0);
-            LOG_W(MAC,"[eNB %d][RAPROC] CC_id %d Frame %d, subframeP %d: Msg4 not acknowledged, adding ue specific dci (rnti %x) for RA (Msg4 Retransmission)\n",
-                  module_idP,CC_id,frameP,subframeP,RA_template->rnti);
-          } else {
-            /*      msg4 not received
-            if ((round == 0) && (RA_template->wait_ack_Msg4>1){
-            remove UE instance across all the layers: mac_xface->cancel_RA();
-              }
-            */
-            LOG_I(MAC,"[eNB %d][RAPROC] CC_id %d Frame %d, subframeP %d : Msg4 acknowledged\n",module_idP,CC_id,frameP,subframeP);
-            RA_template->wait_ack_Msg4=0;
-            RA_template->RA_active=FALSE;
-            UE_id = find_UE_id(module_idP,RA_template->rnti);
-            DevAssert( UE_id != -1 );
-            eNB_mac_inst[module_idP].UE_list.UE_template[UE_PCCID(module_idP,UE_id)][UE_id].configured=TRUE;
-
-          }
-        }
-      }
-    } // RA is scheduled in this subframeP
-
+    DCI_pdu         = &eNB->common_channels[CC_id].DCI_pdu;
+    
 
     // UE specific DCIs
     for (UE_id=UE_list->head; UE_id>=0; UE_id=UE_list->next[UE_id]) {
@@ -2164,11 +1565,6 @@ fill_DLSCH_dci(
         /// Synchronizing rballoc with rballoc_sub
         for(i=0; i<PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RBG; i++) {
           rballoc_sub[i] = UE_list->UE_template[CC_id][UE_id].rballoc_subband[harq_pid][i];
-
-          if(rballoc_sub[i] == 1) {
-            rballoc[CC_id] |= (0x0001<<i);  // TO be FIXED!!!!!!
-          }
-
         }
 
         switch(mac_xface->get_transmission_mode(module_idP,CC_id,rnti)) {
@@ -2177,7 +1573,7 @@ fill_DLSCH_dci(
         case 1:
 
         case 2:
-          LOG_D(MAC,"[eNB %d] CC_id %d Adding UE %d spec DCI for %d PRBS (rb alloc: %x) \n",module_idP, CC_id, UE_id, nb_rb,rballoc);
+          LOG_D(MAC,"[eNB %d] CC_id %d Adding UE %d spec DCI for %d PRBS \n",module_idP, CC_id, UE_id, nb_rb);
 
           if (PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.frame_type == TDD) {
             switch (PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL) {
@@ -2270,7 +1666,7 @@ fill_DLSCH_dci(
 
         case 3:
           LOG_D(MAC,"[eNB %d] CC_id %d Adding Format 2A UE %d spec DCI for %d PRBS (rb alloc: %x) \n",
-                module_idP, CC_id, UE_id, nb_rb,rballoc);
+                module_idP, CC_id, UE_id, nb_rb);
 
           if (PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.frame_type == TDD) {
             switch (PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL) {
diff --git a/openair2/LAYER2/MAC/eNB_scheduler_primitives.c b/openair2/LAYER2/MAC/eNB_scheduler_primitives.c
index 34169d902e..8880a85c2e 100644
--- a/openair2/LAYER2/MAC/eNB_scheduler_primitives.c
+++ b/openair2/LAYER2/MAC/eNB_scheduler_primitives.c
@@ -879,3 +879,217 @@ int get_nb_subband(void)
   return nb_sb;
 
 }
+
+void init_CCE_table(int module_idP,int CC_idP)
+{
+  memset(eNB_mac_inst[module_idP].CCE_table[CC_idP],0,800*sizeof(int));
+} 
+
+
+int get_nCCE_offset(int *CCE_table,
+		    const unsigned char L, 
+		    const int nCCE, 
+		    const int common_dci, 
+		    const unsigned short rnti, 
+		    const unsigned char subframe)
+{
+
+  int search_space_free,m,nb_candidates = 0,l,i;
+  unsigned int Yk;
+   /*
+    printf("CCE Allocation: ");
+    for (i=0;i<nCCE;i++)
+    printf("%d.",CCE_table[i]);
+    printf("\n");
+  */
+  if (common_dci == 1) {
+    // check CCE(0 ... L-1)
+    nb_candidates = (L==4) ? 4 : 2;
+    nb_candidates = min(nb_candidates,nCCE/L);
+
+    //    printf("Common DCI nb_candidates %d, L %d\n",nb_candidates,L);
+
+    for (m = nb_candidates-1 ; m >=0 ; m--) {
+
+      search_space_free = 1;
+      for (l=0; l<L; l++) {
+
+	//	printf("CCE_table[%d] %d\n",(m*L)+l,CCE_table[(m*L)+l]);
+        if (CCE_table[(m*L) + l] == 1) {
+          search_space_free = 0;
+          break;
+        }
+      }
+     
+      if (search_space_free == 1) {
+
+	//	printf("returning %d\n",m*L);
+
+        for (l=0; l<L; l++)
+          CCE_table[(m*L)+l]=1;
+        return(m*L);
+      }
+    }
+
+    return(-1);
+
+  } else { // Find first available in ue specific search space
+    // according to procedure in Section 9.1.1 of 36.213 (v. 8.6)
+    // compute Yk
+    Yk = (unsigned int)rnti;
+
+    for (i=0; i<=subframe; i++)
+      Yk = (Yk*39827)%65537;
+
+    Yk = Yk % (nCCE/L);
+
+
+    switch (L) {
+    case 1:
+    case 2:
+      nb_candidates = 6;
+      break;
+
+    case 4:
+    case 8:
+      nb_candidates = 2;
+      break;
+
+    default:
+      DevParam(L, nCCE, rnti);
+      break;
+    }
+
+
+    LOG_D(MAC,"rnti %x, Yk = %d, nCCE %d (nCCE/L %d),nb_cand %d\n",rnti,Yk,nCCE,nCCE/L,nb_candidates);
+
+    for (m = 0 ; m < nb_candidates ; m++) {
+      search_space_free = 1;
+
+      for (l=0; l<L; l++) {
+        if (CCE_table[(((Yk+m)%(nCCE/L))*L) + l] == 1) {
+          search_space_free = 0;
+          break;
+        }
+      }
+
+      if (search_space_free == 1) {
+        for (l=0; l<L; l++)
+          CCE_table[(((Yk+m)%(nCCE/L))*L)+l]=1;
+
+        return(((Yk+m)%(nCCE/L))*L);
+      }
+    }
+
+    return(-1);
+  }
+}
+
+// Allocate the CCEs
+int allocate_CCEs(int module_idP,
+		  int CC_idP,
+		  int subframeP,
+		  int test_onlyP) {
+
+
+  int *CCE_table = eNB_mac_inst[module_idP].CCE_table[CC_idP];
+  DCI_PDU *DCI_pdu = &eNB_mac_inst[module_idP].common_channels[CC_idP].DCI_pdu;
+  int nCCE_max = mac_xface->get_nCCE_max(module_idP,CC_idP,DCI_pdu->num_pdcch_symbols,subframeP);
+  int fCCE;
+  int i;
+  int allocation_is_feasible = 1;
+  DCI_ALLOC_t *dci_alloc;
+
+
+  LOG_D(MAC,"Allocate CCEs subframe %d, test %d : (common %d,uspec %d)\n",subframeP,test_onlyP,DCI_pdu->Num_common_dci,DCI_pdu->Num_ue_spec_dci);
+
+  init_CCE_table(module_idP,CC_idP);
+  DCI_pdu->nCCE=0;
+
+  while (allocation_is_feasible == 1) {
+
+    for (i=0;i<DCI_pdu->Num_common_dci + DCI_pdu->Num_ue_spec_dci;i++) {
+      dci_alloc = &DCI_pdu->dci_alloc[i];
+      LOG_D(MAC,"Trying to allocate DCI %d/%d (%d,%d) : rnti %x, aggreg %d nCCE %d / %d (num_pdcch_symbols %d)\n",
+	    i,DCI_pdu->Num_common_dci+DCI_pdu->Num_ue_spec_dci,
+	    DCI_pdu->Num_common_dci,DCI_pdu->Num_ue_spec_dci,
+	    dci_alloc->rnti,1<<dci_alloc->L,
+	    DCI_pdu->nCCE,nCCE_max,DCI_pdu->num_pdcch_symbols);
+
+      if (DCI_pdu->nCCE + (1<<dci_alloc->L) > nCCE_max) {
+	if (DCI_pdu->num_pdcch_symbols == 3)
+	  allocation_is_feasible = 0;
+	else {
+	  DCI_pdu->num_pdcch_symbols++;
+	  nCCE_max = mac_xface->get_nCCE_max(module_idP,CC_idP,DCI_pdu->num_pdcch_symbols,subframeP);
+	}
+	break;
+      }
+      else { // number of CCEs left can potentially hold this allocation
+	if ((fCCE = get_nCCE_offset(CCE_table,
+				    1<<(dci_alloc->L), 
+				    nCCE_max,
+				    (i<DCI_pdu->Num_common_dci) ? 1 : 0, 
+				    dci_alloc->rnti, 
+				    subframeP))>=0) {// the allocation is feasible, rnti rule passes
+
+	  LOG_D(MAC,"Allocating at nCCE %d\n",fCCE);
+	  if (test_onlyP == 0) {
+	    DCI_pdu->nCCE += (1<<dci_alloc->L);
+	    dci_alloc->firstCCE=fCCE;
+	    LOG_D(MAC,"Allocate CCEs subframe %d, test %d\n",subframeP,test_onlyP);
+	  }
+	} // fCCE>=0
+	else {
+	  if (DCI_pdu->num_pdcch_symbols == 3)
+	    allocation_is_feasible = 0;
+	  else {
+	    DCI_pdu->num_pdcch_symbols++;
+	    nCCE_max = mac_xface->get_nCCE_max(module_idP,CC_idP,DCI_pdu->num_pdcch_symbols,subframeP);
+	  }
+	  break;
+	} // fCCE==-1
+      } // nCCE <= nCCE_max
+    } // for i = 0 ... num_dcis  
+    if (allocation_is_feasible==1)
+      return (0);
+  } // allocation_is_feasible == 1
+
+  return(-1);
+  
+
+}
+
+boolean_t CCE_allocation_infeasible(int module_idP,
+				    int CC_idP,
+				    int common_flag,
+				    int subframe,
+				    int aggregation,
+				    int rnti) {
+
+
+  DCI_PDU *DCI_pdu = &eNB_mac_inst[module_idP].common_channels[CC_idP].DCI_pdu;
+  DCI_ALLOC_t *dci_alloc;
+  int ret;
+  boolean_t res=FALSE;
+
+  if (common_flag==1) {
+    DCI_pdu->dci_alloc[DCI_pdu->Num_common_dci + DCI_pdu->Num_ue_spec_dci].rnti = rnti;
+    DCI_pdu->dci_alloc[DCI_pdu->Num_common_dci + DCI_pdu->Num_ue_spec_dci].L = aggregation;
+    DCI_pdu->Num_common_dci++;
+    ret = allocate_CCEs(module_idP,CC_idP,subframe,1);
+    if (ret==-1)
+      res = TRUE;
+    DCI_pdu->Num_common_dci--;
+  }
+  else {
+    DCI_pdu->dci_alloc[DCI_pdu->Num_common_dci + DCI_pdu->Num_ue_spec_dci].rnti = rnti;
+    DCI_pdu->dci_alloc[DCI_pdu->Num_common_dci + DCI_pdu->Num_ue_spec_dci].L = aggregation;
+    DCI_pdu->Num_ue_spec_dci++;
+    ret = allocate_CCEs(module_idP,CC_idP,subframe,1);
+    if (ret==-1)
+      res = FALSE;
+    DCI_pdu->Num_ue_spec_dci--;
+  }
+}
+
diff --git a/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c b/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c
index 10c728f2a7..f924885f82 100644
--- a/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c
+++ b/openair2/LAYER2/MAC/eNB_scheduler_ulsch.c
@@ -223,7 +223,7 @@ void rx_sdu(
             payload_ptr[0],payload_ptr[1],payload_ptr[2],payload_ptr[3],payload_ptr[4], payload_ptr[5], rntiP);
 
       for (ii=0; ii<NB_RA_PROC_MAX; ii++) {
-        LOG_D(MAC,"[eNB %d][RAPROC] CC_id %p Checking proc %d : rnti (%x, %x), active %d\n",
+        LOG_D(MAC,"[eNB %d][RAPROC] CC_id %d Checking proc %d : rnti (%x, %x), active %d\n",
               enb_mod_idP, CC_idP, ii,
               eNB->common_channels[CC_idP].RA_template[ii].rnti, rntiP,
               eNB->common_channels[CC_idP].RA_template[ii].RA_active);
@@ -236,7 +236,7 @@ void rx_sdu(
           if (UE_id < 0) {
             memcpy(&eNB->common_channels[CC_idP].RA_template[ii].cont_res_id[0],payload_ptr,6);
             LOG_I(MAC,"[eNB %d][RAPROC] CC_id %d Frame %d CCCH: Received Msg3: length %d, offset %d\n",
-                  enb_mod_idP,CC_idP,frameP,rx_lengths[ii],payload_ptr-sduP);
+                  enb_mod_idP,CC_idP,frameP,rx_lengths[i],payload_ptr-sduP);
 
             if ((UE_id=add_new_ue(enb_mod_idP,CC_idP,eNB->common_channels[CC_idP].RA_template[ii].rnti,harq_pidP)) == -1 ) {
               mac_xface->macphy_exit("[MAC][eNB] Max user count reached\n");
@@ -246,7 +246,7 @@ void rx_sdu(
                     enb_mod_idP,CC_idP,frameP,eNB->common_channels[CC_idP].RA_template[ii].rnti,UE_id);
           } else {
             LOG_I(MAC,"[eNB %d][RAPROC] CC_id %d Frame %d CCCH: Received Msg3 from already registered UE %d: length %d, offset %d\n",
-                  enb_mod_idP,CC_idP,frameP,UE_id,rx_lengths[ii],payload_ptr-sduP);
+                  enb_mod_idP,CC_idP,frameP,UE_id,rx_lengths[i],payload_ptr-sduP);
 	    // kill RA procedure
           }
 
@@ -258,7 +258,7 @@ void rx_sdu(
               rntiP,
               CCCH,
               (uint8_t*)payload_ptr,
-              rx_lengths[ii],
+              rx_lengths[i],
               ENB_FLAG_YES,
               enb_mod_idP,
               0);
@@ -297,17 +297,17 @@ void rx_sdu(
                 enb_mod_idP,CC_idP,frameP, rx_lengths[i], UE_id, rx_lcids[i]);
 
           mac_rlc_data_ind(
-            enb_mod_idP,
-            rntiP,
-	      enb_mod_idP,
-            frameP,
-            ENB_FLAG_YES,
-            MBMS_FLAG_NO,
-            rx_lcids[i],
-            (char *)payload_ptr,
-            rx_lengths[i],
-            1,
-            NULL);//(unsigned int*)crc_status);
+			   enb_mod_idP,
+			   rntiP,
+			   enb_mod_idP,
+			   frameP,
+			   ENB_FLAG_YES,
+			   MBMS_FLAG_NO,
+			   rx_lcids[i],
+			   (char *)payload_ptr,
+			   rx_lengths[i],
+			   1,
+			   NULL);//(unsigned int*)crc_status);
           UE_list->eNB_UE_stats[CC_idP][UE_id].num_pdu_rx[rx_lcids[i]]+=1;
           UE_list->eNB_UE_stats[CC_idP][UE_id].num_bytes_rx[rx_lcids[i]]+=rx_lengths[i];
         }
@@ -596,12 +596,14 @@ unsigned char *parse_ulsch_header(unsigned char *mac_header,
 }
 
 
-void schedule_ulsch(module_id_t module_idP, frame_t frameP,unsigned char cooperation_flag,sub_frame_t subframeP, unsigned char sched_subframe,
-                    unsigned int *nCCE)  //,int calibration_flag) {
-{
+void schedule_ulsch(module_id_t module_idP, 
+		    frame_t frameP,
+		    unsigned char cooperation_flag,
+		    sub_frame_t subframeP, 
+		    unsigned char sched_subframe) {
+
 
 
-  unsigned int nCCE_available[MAX_NUM_CCs];
   uint16_t first_rb[MAX_NUM_CCs],i;
   int CC_id;
   eNB_MAC_INST *eNB=&eNB_mac_inst[module_idP];
@@ -612,7 +614,6 @@ void schedule_ulsch(module_id_t module_idP, frame_t frameP,unsigned char coopera
   for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
 
     first_rb[CC_id] = 1;
-    nCCE_available[CC_id] = mac_xface->get_nCCE_max(module_idP,CC_id) - nCCE[CC_id];
 
     // UE data info;
     // check which UE has data to transmit
@@ -644,10 +645,10 @@ void schedule_ulsch(module_id_t module_idP, frame_t frameP,unsigned char coopera
 
   }
 
-  schedule_ulsch_rnti(module_idP, cooperation_flag, frameP, subframeP, sched_subframe, nCCE, nCCE_available, first_rb);
+  schedule_ulsch_rnti(module_idP, cooperation_flag, frameP, subframeP, sched_subframe,first_rb);
 
 #ifdef CBA
-  schedule_ulsch_cba_rnti(module_idP, cooperation_flag, frameP, subframeP, sched_subframe, nCCE, nCCE_available, first_rb);
+  schedule_ulsch_cba_rnti(module_idP, cooperation_flag, frameP, subframeP, sched_subframe, first_rb);
 #endif
 
 
@@ -662,8 +663,6 @@ void schedule_ulsch_rnti(module_id_t   module_idP,
                          frame_t       frameP,
                          sub_frame_t   subframeP,
                          unsigned char sched_subframe,
-                         unsigned int *nCCE,
-                         unsigned int *nCCE_available,
                          uint16_t     *first_rb)
 {
 
@@ -697,8 +696,7 @@ void schedule_ulsch_rnti(module_id_t   module_idP,
                                 frameP,
                                 subframeP,
                                 first_rb,
-                                aggregation,
-                                nCCE);
+                                aggregation);
 
   //  LOG_I(MAC,"exiting ulsch preprocesor\n");
 
@@ -729,11 +727,12 @@ void schedule_ulsch_rnti(module_id_t   module_idP,
         continue; // mac_xface->macphy_exit("[MAC][eNB] Cannot find eNB_UE_stats\n");
       }
 
-      if (nCCE_available[CC_id] < (1<<aggregation)) {
-        LOG_W(MAC,"[eNB %d] frame %d subframe %d, UE %d CC %d: not enough nCCE (%d)\n", module_idP,frameP,subframeP,UE_id,CC_id,nCCE_available[CC_id]);
+      if (CCE_allocation_infeasible(module_idP,CC_id,0,subframeP,aggregation,rnti)) {
+        LOG_W(MAC,"[eNB %d] frame %d subframe %d, UE %d/%x CC %d: not enough nCCE\n", module_idP,frameP,subframeP,UE_id,rnti,CC_id);
         continue; // break;
       }
 
+      //      printf("UE %d/%x is feasible, mode %s\n",UE_id,rnti,mode_string[eNB_UE_stats->mode]);
 
       if (eNB_UE_stats->mode == PUSCH) { // ue has a ulsch channel
 
@@ -747,8 +746,8 @@ void schedule_ulsch_rnti(module_id_t   module_idP,
           //should we continue or set harq_pid to 0?
           continue;
         } else
-          LOG_T(MAC,"[eNB %d] Frame %d, subframeP %d, UE %d CC %d : got harq pid %d  round %d (nCCE %d, rnti %x,mode %s)\n",
-                module_idP,frameP,subframeP,UE_id,CC_id, harq_pid, round,nCCE[CC_id],rnti,mode_string[eNB_UE_stats->mode]);
+          LOG_T(MAC,"[eNB %d] Frame %d, subframeP %d, UE %d CC %d : got harq pid %d  round %d (rnti %x,mode %s)\n",
+                module_idP,frameP,subframeP,UE_id,CC_id, harq_pid, round,rnti,mode_string[eNB_UE_stats->mode]);
 
 #undef EXMIMO_IOT
 #ifndef EXMIMO_IOT
@@ -1089,9 +1088,6 @@ void schedule_ulsch_rnti(module_id_t   module_idP,
                             subframeP,
                             S_UL_SCHEDULED);
 
-          nCCE[CC_id] = nCCE[CC_id] + (1<<aggregation);
-          nCCE_available[CC_id] = mac_xface->get_nCCE_max(module_idP,CC_id) - nCCE[CC_id];
-
           LOG_D(MAC,"[eNB %d] CC_id %d Frame %d, subframeP %d: Generated ULSCH DCI for next UE_id %d, format 0\n", module_idP,CC_id,frameP,subframeP,UE_id);
 #ifdef DEBUG
           dump_dci(frame_parms, &DCI_pdu->dci_alloc[DCI_pdu->Num_common_dci+DCI_pdu->Num_ue_spec_dci-1]);
@@ -1104,8 +1100,7 @@ void schedule_ulsch_rnti(module_id_t   module_idP,
 }
 
 #ifdef CBA
-void schedule_ulsch_cba_rnti(module_id_t module_idP, unsigned char cooperation_flag, frame_t frameP, sub_frame_t subframeP, unsigned char sched_subframe, unsigned int *nCCE,
-                             unsigned int *nCCE_available, uint16_t *first_rb)
+void schedule_ulsch_cba_rnti(module_id_t module_idP, unsigned char cooperation_flag, frame_t frameP, sub_frame_t subframeP, unsigned char sched_subframe, uint16_t *first_rb)
 {
 
   eNB_MAC_INST *eNB = &eNB_mac_inst[module_idP];
@@ -1164,11 +1159,11 @@ void schedule_ulsch_cba_rnti(module_id_t module_idP, unsigned char cooperation_f
     // cba group template uses the exisitng UE template, and thus if a UE
     // is scheduled, the correspodning group can't be used for CBA
     // this can be fixed later
-    if ((total_groups > 0) && (nCCE[CC_id] == 0)) {
+    if (total_groups > 0)  {
       DCI_pdu = &eNB_mac_inst[module_idP].common_channels[CC_id].DCI_pdu;
 
       for (cba_group=0;
-           (cba_group<total_groups)  && (nCCE_available[CC_id]* (total_cba_resources+1) > (1<<aggregation));
+           (cba_group<total_groups)   > (1<<aggregation));
            cba_group++) {
         // equal weight
         //weight[cba_group] = floor(total_UEs/active_groups);//find_num_active_UEs_in_cbagroup(module_idP, cba_group);
@@ -1256,13 +1251,6 @@ void schedule_ulsch_cba_rnti(module_id_t module_idP, unsigned char cooperation_f
       // phase 2 reduce the number of cba allocations among the groups
       cba_group=0;
 
-      while  (nCCE[CC_id] + (1<<aggregation) * total_cba_resources >= nCCE_available[CC_id]) {
-        num_cba_resources[cba_group%total_groups]--;
-        total_cba_resources--;
-        //  LOG_N(MAC,"reducing num cba resources to %d for group %d \n", num_cba_resources[cba_group%total_groups], cba_group%total_groups );
-        cba_group++;
-      }
-
       if (total_cba_resources <= 0) {
         return;
       }
@@ -1280,11 +1268,11 @@ void schedule_ulsch_cba_rnti(module_id_t module_idP, unsigned char cooperation_f
       for (cba_group=0; cba_group<total_groups; cba_group++) {
 
         LOG_N(MAC,
-              "[eNB %d] CC_id %d Frame %d, subframe %d: cba group %d active_ues %d total groups %d mcs %d, available/required rb (%d/%d), num resources %d, ncce (%d/%d required %d \n",
+              "[eNB %d] CC_id %d Frame %d, subframe %d: cba group %d active_ues %d total groups %d mcs %d, available/required rb (%d/%d), num resources %d, ncce required %d \n",
               module_idP, CC_id, frameP, subframeP, cba_group,active_UEs[cba_group],total_groups,
               mcs[cba_group], available_rbs,required_rbs[cba_group],
               num_cba_resources[cba_group],
-              nCCE[CC_id],nCCE_available[CC_id],(1<<aggregation) * num_cba_resources[cba_group]);
+              (1<<aggregation) * num_cba_resources[cba_group]);
 
         for (cba_resources=0; cba_resources < num_cba_resources[cba_group]; cba_resources++) {
           rb_table_index =0;
@@ -1310,10 +1298,10 @@ void schedule_ulsch_cba_rnti(module_id_t module_idP, unsigned char cooperation_f
 
           first_rb[CC_id]+=rb_table[rb_table_index];
           LOG_N(MAC,
-                "[eNB %d] CC_id %d Frame %d, subframeP %d: schedule CBA access %d rnti %x, total/required/allocated/remaining rbs (%d/%d/%d/%d), mcs %d, rballoc %d, nCCE (%d/%d)\n",
+                "[eNB %d] CC_id %d Frame %d, subframeP %d: schedule CBA access %d rnti %x, total/required/allocated/remaining rbs (%d/%d/%d/%d), mcs %d, rballoc %d\n",
                 module_idP, CC_id, frameP, subframeP, cba_group,eNB_mac_inst[module_idP].common_channels[CC_id].cba_rnti[cba_group],
                 available_rbs, required_rbs[cba_group], allocated_rbs, remaining_rbs,
-                mcs[cba_group],rballoc,nCCE_available[CC_id],nCCE[CC_id]);
+                mcs[cba_group],rballoc);
 
           switch (frame_parms->N_RB_UL) {
           case 6:
@@ -1426,8 +1414,6 @@ void schedule_ulsch_cba_rnti(module_id_t module_idP, unsigned char cooperation_f
             break;
           }
 
-          nCCE[CC_id] = nCCE[CC_id] + (1<<aggregation) ;
-          nCCE_available[CC_id] = mac_xface->get_nCCE_max(module_idP,CC_id) - nCCE[CC_id];
           //      break;// for the moment only schedule one
         }
       }
diff --git a/openair2/LAYER2/MAC/main.c b/openair2/LAYER2/MAC/main.c
index 5db78a30c2..0e8a65cf01 100644
--- a/openair2/LAYER2/MAC/main.c
+++ b/openair2/LAYER2/MAC/main.c
@@ -468,6 +468,7 @@ int l2_init(LTE_DL_FRAME_PARMS *frame_parms,int eMBMS_active, char *uecap_xer,ui
   mac_xface->get_transmission_mode     = get_transmission_mode;
   mac_xface->get_rballoc               = get_rballoc;
   mac_xface->get_nb_rb                 = conv_nprb;
+  mac_xface->get_prb                   = get_prb;
   //  mac_xface->get_SB_size               = Get_SB_size;
   mac_xface->get_subframe_direction    = get_subframe_direction;
   mac_xface->Msg3_transmitted          = Msg3_tx;
@@ -507,7 +508,7 @@ int l2_init(LTE_DL_FRAME_PARMS *frame_parms,int eMBMS_active, char *uecap_xer,ui
   mac_xface->computeRIV             = computeRIV;
   mac_xface->get_TBS_DL             = get_TBS_DL;
   mac_xface->get_TBS_UL             = get_TBS_UL;
-  mac_xface->get_nCCE_max           = get_nCCE_max;
+  mac_xface->get_nCCE_max           = get_nCCE_mac;
   mac_xface->get_nCCE_offset        = get_nCCE_offset;
   mac_xface->get_ue_mode            = get_ue_mode;
   mac_xface->phy_config_sib1_eNB    = phy_config_sib1_eNB;
diff --git a/openair2/LAYER2/MAC/pre_processor.c b/openair2/LAYER2/MAC/pre_processor.c
index 5a4caf82c4..d4d94de832 100644
--- a/openair2/LAYER2/MAC/pre_processor.c
+++ b/openair2/LAYER2/MAC/pre_processor.c
@@ -731,20 +731,24 @@ void dlsch_scheduler_pre_processor (module_id_t   Mod_id,
 
 
 void dlsch_scheduler_pre_processor_reset (int module_idP,
-    int UE_id,
-    uint8_t  CC_id,
-    int frameP,
-    int subframeP,					  
-    int N_RBG,
-    uint16_t nb_rbs_required[MAX_NUM_CCs][NUMBER_OF_UE_MAX],
-    uint16_t nb_rbs_required_remaining[MAX_NUM_CCs][NUMBER_OF_UE_MAX],
-    unsigned char rballoc_sub[MAX_NUM_CCs][N_RBG_MAX],
-    unsigned char MIMO_mode_indicator[MAX_NUM_CCs][N_RBG_MAX])
+					  int UE_id,
+					  uint8_t  CC_id,
+					  int frameP,
+					  int subframeP,					  
+					  int N_RBG,
+					  uint16_t nb_rbs_required[MAX_NUM_CCs][NUMBER_OF_UE_MAX],
+					  uint16_t nb_rbs_required_remaining[MAX_NUM_CCs][NUMBER_OF_UE_MAX],
+					  unsigned char rballoc_sub[MAX_NUM_CCs][N_RBG_MAX],
+					  unsigned char MIMO_mode_indicator[MAX_NUM_CCs][N_RBG_MAX])
+  
 {
-  int i;
+  int i,j;
   UE_list_t *UE_list=&eNB_mac_inst[module_idP].UE_list;
   UE_sched_ctrl *ue_sched_ctl = &UE_list->UE_sched_ctrl[UE_id];
   rnti_t rnti = UE_RNTI(module_idP,UE_id);
+  uint8_t *vrb_map = &eNB_mac_inst[module_idP].common_channels[CC_id].vrb_map;
+  int RBGsize = PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL/N_RBG;
+
 
   // initialize harq_pid and round
   mac_xface->get_ue_active_harq_pid(module_idP,CC_id,rnti,
@@ -758,9 +762,17 @@ void dlsch_scheduler_pre_processor_reset (int module_idP,
   ue_sched_ctl->dl_pow_off[CC_id] = 2;
   nb_rbs_required_remaining[CC_id][UE_id] = 0;
 
+  // Initialize Subbands according to VRB map
   for (i=0; i<N_RBG; i++) {
     ue_sched_ctl->rballoc_sub_UE[CC_id][i] = 0;
     rballoc_sub[CC_id][i] = 0;
+    for (j=0;j<RBGsize;j++) {
+      if (vrb_map[j+(i*RBGsize)]!=0) {
+	rballoc_sub[CC_id][i] = 1;
+	break;
+      }
+    }
+    LOG_D(MAC,"Frame %d Subframe %d CC_id %d RBG %i : rb_alloc %d\n",frameP,subframeP,CC_id,i,rballoc_sub[CC_id][i]);
     MIMO_mode_indicator[CC_id][i] = 2;
   }
 }
@@ -828,8 +840,7 @@ void ulsch_scheduler_pre_processor(module_id_t module_idP,
                                    int frameP,
                                    sub_frame_t subframeP,
                                    uint16_t *first_rb,
-                                   uint8_t aggregation,
-                                   uint32_t *nCCE)
+                                   uint8_t aggregation)
 {
 
   int16_t            i;
@@ -839,7 +850,6 @@ void ulsch_scheduler_pre_processor(module_id_t module_idP,
   int16_t            total_remaining_rbs[MAX_NUM_CCs];
   uint16_t           max_num_ue_to_be_scheduled=0,total_ue_count=0;
   rnti_t             rnti= -1;
-  uint32_t            nCCE_to_be_used[MAX_NUM_CCs];
   UE_list_t          *UE_list = &eNB_mac_inst[module_idP].UE_list;
   UE_TEMPLATE        *UE_template = 0;
   LTE_DL_FRAME_PARMS   *frame_parms = 0;
@@ -860,7 +870,6 @@ void ulsch_scheduler_pre_processor(module_id_t module_idP,
   // we need to distribute RBs among UEs
   // step1:  reset the vars
   for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
-    nCCE_to_be_used[CC_id]= nCCE[CC_id];
     total_allocated_rbs[CC_id]=0;
     total_remaining_rbs[CC_id]=0;
     average_rbs_per_user[CC_id]=0;
@@ -894,11 +903,13 @@ void ulsch_scheduler_pre_processor(module_id_t module_idP,
       if (UE_template->pre_allocated_nb_rb_ul > 0) {
         total_ue_count+=1;
       }
-
-      if((mac_xface->get_nCCE_max(module_idP,CC_id) - nCCE_to_be_used[CC_id])  > (1<<aggregation)) {
+      /*
+      if((mac_xface->get_nCCE_max(module_idP,CC_id,3,subframeP) - nCCE_to_be_used[CC_id])  > (1<<aggregation)) {
         nCCE_to_be_used[CC_id] = nCCE_to_be_used[CC_id] + (1<<aggregation);
         max_num_ue_to_be_scheduled+=1;
-      }
+	}*/
+
+      max_num_ue_to_be_scheduled+=1;
 
       if (total_ue_count == 0) {
         average_rbs_per_user[CC_id] = 0;
diff --git a/openair2/LAYER2/MAC/proto.h b/openair2/LAYER2/MAC/proto.h
index d02e42ee16..9afe098d77 100644
--- a/openair2/LAYER2/MAC/proto.h
+++ b/openair2/LAYER2/MAC/proto.h
@@ -47,26 +47,23 @@ void add_ue_spec_dci(DCI_PDU *DCI_pdu,void *pdu,rnti_t rnti,unsigned char dci_si
 
 //LG commented cause compilation error for RT eNB extern inline unsigned int taus(void);
 
-/** \fn void schedule_RA(module_id_t module_idP,frame_t frameP,sub_frame_t subframe,uint8_t Msg3_subframe,unsigned int *nprb,unsigned int *nCCE);
+/** \fn void schedule_RA(module_id_t module_idP,frame_t frameP,sub_frame_t subframe,uint8_t Msg3_subframe,unsigned int *nprb);
 \brief First stage of Random-Access Scheduling. Loops over the RA_templates and checks if RAR, Msg3 or its retransmission are to be scheduled in the subframe.  It returns the total number of PRB used for RA SDUs.  For Msg3 it retrieves the L3msg from RRC and fills the appropriate buffers.  For the others it just computes the number of PRBs. Each DCI uses 3 PRBs (format 1A)
 for the message.
 @param Mod_id Instance ID of eNB
 @param frame Frame index
 @param subframe Subframe number on which to act
-@param nprb Pointer to current PRB count
-@param nCCE Pointer to current nCCE count
+
 */
-void schedule_RA(module_id_t module_idP,frame_t frameP,sub_frame_t subframe,uint8_t Msg3_subframe,unsigned int *nprb,unsigned int *nCCE);
+void schedule_RA(module_id_t module_idP,frame_t frameP,sub_frame_t subframe,uint8_t Msg3_subframe);
 
 /** \brief First stage of SI Scheduling. Gets a SI SDU from RRC if available and computes the MCS required to transport it as a function of the SDU length.  It assumes a length less than or equal to 64 bytes (MCS 6, 3 PRBs).
 @param Mod_id Instance ID of eNB
 @param frame Frame index
 @param subframe Subframe number on which to act
 @param Msg3_subframe Subframe where Msg3 will be transmitted
-@param nprb Pointer to current PRB count
-@param nCCE Pointer to current nCCE count
 */
-void schedule_SI(module_id_t module_idP,frame_t frameP,unsigned int *nprb,unsigned int *nCCE);
+void schedule_SI(module_id_t module_idP,frame_t frameP,sub_frame_t subframeP);
 
 /** \brief MBMS scheduling: Checking the position for MBSFN subframes. Create MSI, transfer MCCH from RRC to MAC, transfer MTCHs from RLC to MAC. Multiplexing MSI,MCCH&MTCHs. Return 1 if there are MBSFN data being allocated, otherwise return 0;
 @param Mod_id Instance ID of eNB
@@ -95,49 +92,41 @@ int8_t ue_get_mbsfn_sf_alloction (module_id_t module_idP, uint8_t mbsfn_sync_are
 @param frame Frame index
 @param subframe Subframe number on which to act
 @param sched_subframe Subframe number where PUSCH is transmitted (for DAI lookup)
-@param nCCE Pointer to current nCCE count
 */
-void schedule_ulsch(module_id_t module_idP,frame_t frameP,unsigned char cooperation_flag,sub_frame_t subframe,unsigned char sched_subframe,unsigned int *nCCE);
+void schedule_ulsch(module_id_t module_idP,frame_t frameP,unsigned char cooperation_flag,sub_frame_t subframe,unsigned char sched_subframe);
 
 /** \brief ULSCH Scheduling per RNTI
 @param Mod_id Instance ID of eNB
 @param frame Frame index
 @param subframe Subframe number on which to act
 @param sched_subframe Subframe number where PUSCH is transmitted (for DAI lookup)
-@param nCCE Pointer to current nCCE count
 */
-void schedule_ulsch_rnti(module_id_t module_idP, unsigned char cooperation_flag, frame_t frameP, sub_frame_t subframe, unsigned char sched_subframe, unsigned int *nCCE, unsigned int *nCCE_available,
-                         uint16_t *first_rb);
+void schedule_ulsch_rnti(module_id_t module_idP, unsigned char cooperation_flag, frame_t frameP, sub_frame_t subframe, unsigned char sched_subframe, uint16_t *first_rb);
 
 /** \brief ULSCH Scheduling for CBA  RNTI
 @param Mod_id Instance ID of eNB
 @param frame Frame index
 @param subframe Subframe number on which to act
 @param sched_subframe Subframe number where PUSCH is transmitted (for DAI lookup)
-@param nCCE Pointer to current nCCE count
 */
-void schedule_ulsch_cba_rnti(module_id_t module_idP, unsigned char cooperation_flag, frame_t frameP, sub_frame_t subframe, unsigned char sched_subframe, unsigned int *nCCE,
-                             unsigned int *nCCE_available, uint16_t *first_rb);
+void schedule_ulsch_cba_rnti(module_id_t module_idP, unsigned char cooperation_flag, frame_t frameP, sub_frame_t subframe, unsigned char sched_subframe, uint16_t *first_rb);
 
 /** \brief Second stage of DLSCH scheduling, after schedule_SI, schedule_RA and schedule_dlsch have been called.  This routine first allocates random frequency assignments for SI and RA SDUs using distributed VRB allocations and adds the corresponding DCI SDU to the DCI buffer for PHY.  It then loops over the UE specific DCIs previously allocated and fills in the remaining DCI fields related to frequency allocation.  It assumes localized allocation of type 0 (DCI.rah=0).  The allocation is done for tranmission modes 1,2,4.
 @param Mod_id Instance of eNB
 @param frame Frame index
 @param subframe Index of subframe
-@param rballoc Bitmask for allowable subband allocations
-@param RA_scheduled RA was scheduled in this subframe
 @param mbsfn_flag Indicates that this subframe is for MCH/MCCH
 */
-void fill_DLSCH_dci(module_id_t module_idP,frame_t frameP,sub_frame_t subframe,uint32_t *rballoc,uint8_t RA_scheduled,int *mbsfn_flag);
+void fill_DLSCH_dci(module_id_t module_idP,frame_t frameP,sub_frame_t subframe,int *mbsfn_flag);
 
 /** \brief UE specific DLSCH scheduling. Retrieves next ue to be schduled from round-robin scheduler and gets the appropriate harq_pid for the subframe from PHY. If the process is active and requires a retransmission, it schedules the retransmission with the same PRB count and MCS as the first transmission. Otherwise it consults RLC for DCCH/DTCH SDUs (status with maximum number of available PRBS), builds the MAC header (timing advance sent by default) and copies
 @param Mod_id Instance ID of eNB
 @param frame Frame index
 @param subframe Subframe on which to act
-@param nb_rb_used0 Number of PRB used by SI/RA
-@param nCCE_used Number of CCE used by SI/RA
+
 @param mbsfn_flag  Indicates that MCH/MCCH is in this subframe
 */
-void schedule_ue_spec(module_id_t module_idP,frame_t frameP,sub_frame_t subframe,unsigned int *nb_rb_used0,unsigned int *nCCE_used,int *mbsfn_flag);
+void schedule_ue_spec(module_id_t module_idP,frame_t frameP,sub_frame_t subframe,int *mbsfn_flag);
 
 /** \brief Function for UE/PHY to compute PUSCH transmit power in power-control procedure.
     @param Mod_id Module id of UE
@@ -312,6 +301,27 @@ uint8_t     process_ue_cqi    (module_id_t module_idP, int UE_id);
 
 int8_t find_active_UEs_with_traffic(module_id_t module_idP);
 
+void init_CCE_table(int module_idP,int CC_idP);
+
+int get_nCCE_offset(int *CCE_table,
+		    const unsigned char L, 
+		    const int nCCE, 
+		    const int common_dci, 
+		    const unsigned short rnti, 
+		    const unsigned char subframe);
+
+int allocate_CCEs(int module_idP,
+		  int CC_idP,
+		  int subframe,
+		  int test_only);
+
+boolean_t CCE_allocation_infeasible(int module_idP,
+				  int CC_idP,
+				  int common_flag,
+				  int subframe,
+				  int aggregation,
+				  int rnti);
+
 void set_ue_dai(sub_frame_t   subframeP,
                 uint8_t       tdd_config,
                 int           UE_id,
@@ -492,7 +502,7 @@ int UE_PCCID(module_id_t mod_idP,int ue_idP);
 rnti_t UE_RNTI(module_id_t mod_idP, int ue_idP);
 
 
-void ulsch_scheduler_pre_processor(module_id_t module_idP, int frameP, sub_frame_t subframeP, uint16_t *first_rb, uint8_t  aggregattion, uint32_t *nCCE);
+void ulsch_scheduler_pre_processor(module_id_t module_idP, int frameP, sub_frame_t subframeP, uint16_t *first_rb, uint8_t  aggregattion);
 void store_ulsch_buffer(module_id_t module_idP, int frameP, sub_frame_t subframeP);
 void sort_ue_ul (module_id_t module_idP,int frameP, sub_frame_t subframeP);
 void assign_max_mcs_min_rb(module_id_t module_idP,int frameP, sub_frame_t subframeP,uint16_t *first_rb);
diff --git a/openair2/PHY_INTERFACE/defs.h b/openair2/PHY_INTERFACE/defs.h
index 20acba99e4..7b0367f537 100755
--- a/openair2/PHY_INTERFACE/defs.h
+++ b/openair2/PHY_INTERFACE/defs.h
@@ -238,14 +238,17 @@ typedef struct {
   int (*get_ue_active_harq_pid)(module_id_t Mod_id, uint8_t CC_id,rnti_t rnti, int frame, uint8_t subframe, uint8_t *harq_pid, uint8_t *round, uint8_t ul_flag);
 
   /// Function to retrieve number of CCE
-  uint16_t (*get_nCCE_max)(module_id_t Mod_id,uint8_t  CC_id);
+  uint16_t (*get_nCCE_max)(module_id_t Mod_id,uint8_t  CC_id,int num_pdcch_symbols,int subframe);
+
 
-  /// Function to get the CCE offset
   int (*get_nCCE_offset)(unsigned char L, int nCCE, int common_dci, unsigned short rnti, unsigned char subframe);
 
   /// Function to retrieve number of PRB in an rb_alloc
   uint32_t (*get_nb_rb)(uint8_t ra_header, uint32_t rb_alloc, int n_rb_dl);
 
+  /// Function to convert VRB to PRB for distributed allocation
+  int (*get_prb)(int N_RB_DL,int odd_slot,int vrb,int Ngap);
+
   /// Function to retrieve transmission mode for UE
   uint8_t (*get_transmission_mode)(module_id_t Mod_id,uint8_t CC_id,rnti_t rnti);
 
@@ -312,8 +315,9 @@ typedef struct {
 
   /// get the delta TF for Uplink Power Control Calculation
   int16_t (*get_hundred_times_delta_TF) (module_id_t module_idP, uint8_t CC_id, rnti_t rnti, uint8_t harq_pid);
-  /// get target uplink received power 
+  /// get target PUSCH received power 
   int16_t (*get_target_pusch_rx_power) (module_id_t module_idP, uint8_t CC_id);
+  /// get target PUSCH received power 
   int16_t (*get_target_pucch_rx_power) (module_id_t module_idP, uint8_t CC_id);
 
   unsigned char is_cluster_head;
diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.conf
index 2974ce8551..44acc8b9ea 100644
--- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.conf
+++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.conf
@@ -36,7 +36,7 @@ eNBs =
       nb_antennas_tx          			      = 1;
       nb_antennas_rx          			      = 1;
       tx_gain                                            = 90;
-      rx_gain                                            = 120;
+      rx_gain                                            = 130;
       prach_root              			      = 0;
       prach_config_index      			      = 0;
       prach_high_speed        			      = "DISABLE";
diff --git a/targets/SIMU/USER/init_lte.c b/targets/SIMU/USER/init_lte.c
index d798b0968a..bbb99260eb 100644
--- a/targets/SIMU/USER/init_lte.c
+++ b/targets/SIMU/USER/init_lte.c
@@ -76,7 +76,7 @@ PHY_VARS_eNB* init_lte_eNB(LTE_DL_FRAME_PARMS *frame_parms,
 
   for (i=0; i<NUMBER_OF_UE_MAX; i++) {
     for (j=0; j<2; j++) {
-      PHY_vars_eNB->dlsch_eNB[i][j] = new_eNB_dlsch(1,NUMBER_OF_HARQ_PID_MAX,frame_parms->N_RB_DL,abstraction_flag);
+      PHY_vars_eNB->dlsch_eNB[i][j] = new_eNB_dlsch(1,NUMBER_OF_HARQ_PID_MAX,NSOFT,frame_parms->N_RB_DL,abstraction_flag);
 
       if (!PHY_vars_eNB->dlsch_eNB[i][j]) {
         LOG_E(PHY,"Can't get eNB dlsch structures for UE %d \n", i);
@@ -128,11 +128,11 @@ PHY_VARS_eNB* init_lte_eNB(LTE_DL_FRAME_PARMS *frame_parms,
     exit(-1);
   }
 
-  PHY_vars_eNB->dlsch_eNB_SI  = new_eNB_dlsch(1,1,frame_parms->N_RB_DL, abstraction_flag);
+  PHY_vars_eNB->dlsch_eNB_SI  = new_eNB_dlsch(1,1,NSOFT,frame_parms->N_RB_DL, abstraction_flag);
   LOG_D(PHY,"eNB %d : SI %p\n",eNB_id,PHY_vars_eNB->dlsch_eNB_SI);
-  PHY_vars_eNB->dlsch_eNB_ra  = new_eNB_dlsch(1,1,frame_parms->N_RB_DL, abstraction_flag);
+  PHY_vars_eNB->dlsch_eNB_ra  = new_eNB_dlsch(1,1,NSOFT,frame_parms->N_RB_DL, abstraction_flag);
   LOG_D(PHY,"eNB %d : RA %p\n",eNB_id,PHY_vars_eNB->dlsch_eNB_ra);
-  PHY_vars_eNB->dlsch_eNB_MCH = new_eNB_dlsch(1,NUMBER_OF_HARQ_PID_MAX,frame_parms->N_RB_DL, 0);
+  PHY_vars_eNB->dlsch_eNB_MCH = new_eNB_dlsch(1,NUMBER_OF_HARQ_PID_MAX,NSOFT,frame_parms->N_RB_DL, 0);
   LOG_D(PHY,"eNB %d : MCH %p\n",eNB_id,PHY_vars_eNB->dlsch_eNB_MCH);
 
 
@@ -169,7 +169,7 @@ PHY_VARS_UE* init_lte_UE(LTE_DL_FRAME_PARMS *frame_parms,
 
   for (i=0; i<NUMBER_OF_CONNECTED_eNB_MAX; i++) {
     for (j=0; j<2; j++) {
-      PHY_vars_UE->dlsch_ue[i][j]  = new_ue_dlsch(1,NUMBER_OF_HARQ_PID_MAX,MAX_TURBO_ITERATIONS,frame_parms->N_RB_DL, abstraction_flag);
+      PHY_vars_UE->dlsch_ue[i][j]  = new_ue_dlsch(1,NUMBER_OF_HARQ_PID_MAX,NSOFT,MAX_TURBO_ITERATIONS,frame_parms->N_RB_DL, abstraction_flag);
 
       if (!PHY_vars_UE->dlsch_ue[i][j]) {
         LOG_E(PHY,"Can't get ue dlsch structures\n");
@@ -187,15 +187,15 @@ PHY_VARS_UE* init_lte_UE(LTE_DL_FRAME_PARMS *frame_parms,
       exit(-1);
     }
 
-    PHY_vars_UE->dlsch_ue_SI[i]  = new_ue_dlsch(1,1,MAX_TURBO_ITERATIONS,frame_parms->N_RB_DL, abstraction_flag);
-    PHY_vars_UE->dlsch_ue_ra[i]  = new_ue_dlsch(1,1,MAX_TURBO_ITERATIONS,frame_parms->N_RB_DL, abstraction_flag);
+    PHY_vars_UE->dlsch_ue_SI[i]  = new_ue_dlsch(1,1,NSOFT,MAX_TURBO_ITERATIONS,frame_parms->N_RB_DL, abstraction_flag);
+    PHY_vars_UE->dlsch_ue_ra[i]  = new_ue_dlsch(1,1,NSOFT,MAX_TURBO_ITERATIONS,frame_parms->N_RB_DL, abstraction_flag);
 
     PHY_vars_UE->transmission_mode[i] = transmission_mode;
   }
 
   PHY_vars_UE->lte_frame_parms.pucch_config_common.deltaPUCCH_Shift = 1;
 
-  PHY_vars_UE->dlsch_ue_MCH[0]  = new_ue_dlsch(1,NUMBER_OF_HARQ_PID_MAX,MAX_TURBO_ITERATIONS_MBSFN,frame_parms->N_RB_DL,0);
+  PHY_vars_UE->dlsch_ue_MCH[0]  = new_ue_dlsch(1,NUMBER_OF_HARQ_PID_MAX,NSOFT,MAX_TURBO_ITERATIONS_MBSFN,frame_parms->N_RB_DL,0);
 
   return (PHY_vars_UE);
 }
@@ -211,11 +211,11 @@ PHY_VARS_RN* init_lte_RN(LTE_DL_FRAME_PARMS *frame_parms,
 
   if (eMBMS_active_state == multicast_relay) {
     for (i=0; i < 10 ; i++) { // num SF in a frame
-      PHY_vars_RN->dlsch_rn_MCH[i] = new_ue_dlsch(1,1,MAX_TURBO_ITERATIONS_MBSFN,frame_parms->N_RB_DL, 0);
+      PHY_vars_RN->dlsch_rn_MCH[i] = new_ue_dlsch(1,1,MAX_TURBO_ITERATIONS_MBSFN,NSOFT,frame_parms->N_RB_DL, 0);
       LOG_D(PHY,"eNB %d : MCH[%d] %p\n",RN_id,i,PHY_vars_RN->dlsch_rn_MCH[i]);
     }
   } else {
-    PHY_vars_RN->dlsch_rn_MCH[0] = new_ue_dlsch(1,1,MAX_TURBO_ITERATIONS,frame_parms->N_RB_DL, 0);
+    PHY_vars_RN->dlsch_rn_MCH[0] = new_ue_dlsch(1,1,MAX_TURBO_ITERATIONS,NSOFT,frame_parms->N_RB_DL, 0);
     LOG_D(PHY,"eNB %d : MCH[0] %p\n",RN_id,PHY_vars_RN->dlsch_rn_MCH[0]);
   }