removing unused fapi structures at UE
This commit is contained in:
francescomani
@@ -456,437 +456,6 @@ typedef struct {
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} fapi_nr_dl_config_request_t;
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//
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// P5
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//
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typedef struct {
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fapi_nr_coreset_t coreset;
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uint8_t monitoring_slot_peridicity;
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uint8_t monitoring_slot_offset;
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uint16_t duration;
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uint16_t monitoring_symbols_within_slot;
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uint8_t number_of_candidates[5]; // aggregation level 1, 2, 4, 8, 16
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uint8_t dci_2_0_number_of_candidates[5]; // aggregation level 1, 2, 4, 8, 16
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uint8_t dci_2_3_monitorying_periodicity;
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uint8_t dci_2_3_number_of_candidates;
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} fapi_nr_search_space_t;
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typedef struct {
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fapi_nr_search_space_t search_space_sib1;
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fapi_nr_search_space_t search_space_others_sib;
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fapi_nr_search_space_t search_space_paging;
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//fapi_nr_coreset_t coreset_ra; // common coreset
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fapi_nr_search_space_t search_space_ra;
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} fapi_nr_pdcch_config_common_t;
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typedef struct {
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uint8_t k0;
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uint8_t mapping_type;
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uint8_t symbol_starting;
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uint8_t symbol_length;
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} fapi_nr_pdsch_time_domain_resource_allocation_t;
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typedef struct {
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fapi_nr_pdsch_time_domain_resource_allocation_t allocation_list[FAPI_NR_MAX_NUM_DL_ALLOCATIONS];
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} fapi_nr_pdsch_config_common_t;
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typedef struct {
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uint8_t prach_configuration_index;
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uint8_t msg1_fdm;
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uint8_t msg1_frequency_start;
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uint8_t zero_correlation_zone_config;
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uint8_t preamble_received_target_power;
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uint8_t preamble_transmission_max;
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uint8_t power_ramping_step;
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uint8_t ra_window_size;
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uint8_t total_number_of_preamble;
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uint8_t ssb_occasion_per_rach;
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uint8_t cb_preamble_per_ssb;
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uint8_t group_a_msg3_size;
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uint8_t group_a_number_of_preamble;
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uint8_t group_b_power_offset;
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uint8_t contention_resolution_timer;
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uint8_t rsrp_threshold_ssb;
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uint8_t rsrp_threshold_ssb_sul;
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uint8_t prach_length; // l839, l139
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uint8_t prach_root_sequence_index; // 0 - 837 for l839, 0 - 137 for l139
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uint8_t msg1_subcarrier_spacing;
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uint8_t restrictedset_config;
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uint8_t msg3_transform_precoding;
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} fapi_nr_rach_config_common_t;
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typedef struct {
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uint8_t k2;
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uint8_t mapping_type;
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uint8_t symbol_starting;
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uint8_t symbol_length;
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} fapi_nr_pusch_time_domain_resource_allocation_t;
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typedef struct {
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uint8_t group_hopping_enabled_transform_precoding;
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fapi_nr_pusch_time_domain_resource_allocation_t allocation_list[FAPI_NR_MAX_NUM_UL_ALLOCATIONS];
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uint8_t msg3_delta_preamble;
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uint8_t p0_nominal_with_grant;
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} fapi_nr_pusch_config_common_t;
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typedef struct {
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uint8_t pucch_resource_common;
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uint8_t pucch_group_hopping;
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uint8_t hopping_id;
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uint8_t p0_nominal;
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} fapi_nr_pucch_config_common_t;
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typedef struct {
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fapi_nr_pdcch_config_common_t pdcch_config_common;
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fapi_nr_pdsch_config_common_t pdsch_config_common;
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} fapi_nr_dl_bwp_common_config_t;
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typedef struct {
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uint16_t int_rnti;
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uint8_t time_frequency_set;
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uint8_t dci_payload_size;
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uint8_t serving_cell_id[FAPI_NR_MAX_NUM_SERVING_CELLS]; // interrupt configuration per serving cell
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uint8_t position_in_dci[FAPI_NR_MAX_NUM_SERVING_CELLS]; // interrupt configuration per serving cell
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} fapi_nr_downlink_preemption_t;
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typedef struct {
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uint8_t tpc_index;
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uint8_t tpc_index_sul;
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uint8_t target_cell;
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} fapi_nr_pusch_tpc_command_config_t;
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typedef struct {
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uint8_t tpc_index_pcell;
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uint8_t tpc_index_pucch_scell;
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} fapi_nr_pucch_tpc_command_config_t;
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typedef struct {
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uint8_t starting_bit_of_format_2_3;
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uint8_t feild_type_format_2_3;
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} fapi_nr_srs_tpc_command_config_t;
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typedef struct {
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fapi_nr_downlink_preemption_t downlink_preemption;
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fapi_nr_pusch_tpc_command_config_t tpc_pusch;
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fapi_nr_pucch_tpc_command_config_t tpc_pucch;
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fapi_nr_srs_tpc_command_config_t tpc_srs;
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} fapi_nr_pdcch_config_dedicated_t;
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typedef struct {
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uint8_t dmrs_type;
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uint8_t dmrs_addition_position;
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uint8_t max_length;
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uint16_t scrambling_id0;
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uint16_t scrambling_id1;
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uint8_t ptrs_frequency_density[2]; // phase tracking rs
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uint8_t ptrs_time_density[3]; // phase tracking rs
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uint8_t ptrs_epre_ratio; // phase tracking rs
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uint8_t ptrs_resource_element_offset; // phase tracking rs
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} fapi_nr_dmrs_downlink_config_t;
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typedef struct {
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uint8_t bwp_or_cell_level;
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uint8_t pattern_type;
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uint32_t resource_blocks[9]; // bitmaps type 275 bits
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uint8_t slot_type; // bitmaps type one/two slot(s)
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uint32_t symbols_in_resouece_block; // bitmaps type 14/28 bits
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uint8_t periodic; // bitmaps type
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uint32_t pattern[2]; // bitmaps type 2/4/5/8/10/20/40 bits
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fapi_nr_coreset_t coreset; // coreset
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uint8_t subcarrier_spacing;
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uint8_t mode;
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} fapi_nr_rate_matching_pattern_group_t;
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typedef struct {
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// resource mapping
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uint8_t row; // row1/row2/row4/other
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uint16_t frequency_domain_allocation; // 4/12/3/6 bits
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uint8_t number_of_ports;
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uint8_t first_ofdm_symbol_in_time_domain;
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uint8_t first_ofdm_symbol_in_time_domain2;
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uint8_t cdm_type;
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uint8_t density; // .5/1/3
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uint8_t density_dot5_type; // even/odd PRBs
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uint8_t frequency_band_starting_rb; // freqBand
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uint8_t frequency_band_number_of_rb; // freqBand
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// periodicityAndOffset
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uint8_t periodicity; // slot4/5/8/10/16/20/32/40/64/80/160/320/640
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uint32_t offset; // 0..639 bits
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} fapi_nr_zp_csi_rs_resource_t;
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typedef struct {
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uint16_t data_scrambling_id_pdsch;
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fapi_nr_dmrs_downlink_config_t dmrs_dl_for_pdsch_mapping_type_a;
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fapi_nr_dmrs_downlink_config_t dmrs_dl_for_pdsch_mapping_type_b;
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uint8_t vrb_to_prb_interleaver;
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uint8_t resource_allocation;
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fapi_nr_pdsch_time_domain_resource_allocation_t allocation_list[FAPI_NR_MAX_NUM_DL_ALLOCATIONS];
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uint8_t pdsch_aggregation_factor;
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fapi_nr_rate_matching_pattern_group_t rate_matching_pattern_group1;
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fapi_nr_rate_matching_pattern_group_t rate_matching_pattern_group2;
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uint8_t rbg_size;
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uint8_t mcs_table;
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uint8_t max_num_of_code_word_scheduled_by_dci;
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uint8_t bundle_size; // prb_bundling static
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uint8_t bundle_size_set1; // prb_bundling dynamic
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uint8_t bundle_size_set2; // prb_bundling dynamic
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fapi_nr_zp_csi_rs_resource_t periodically_zp_csi_rs_resource_set[FAPI_NR_MAX_NUM_ZP_CSI_RS_RESOURCE_PER_SET];
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} fapi_nr_pdsch_config_dedicated_t;
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typedef struct {
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uint16_t starting_prb;
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uint8_t intra_slot_frequency_hopping;
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uint16_t second_hop_prb;
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uint8_t format; // pucch format 0..4
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uint8_t initial_cyclic_shift;
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uint8_t number_of_symbols;
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uint8_t starting_symbol_index;
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uint8_t time_domain_occ;
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uint8_t number_of_prbs;
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uint8_t occ_length;
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uint8_t occ_index;
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} fapi_nr_pucch_resource_t;
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typedef struct {
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uint8_t periodicity;
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uint8_t number_of_harq_process;
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fapi_nr_pucch_resource_t n1_pucch_an;
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} fapi_nr_sps_config_t;
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typedef struct {
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uint8_t beam_failure_instance_max_count;
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uint8_t beam_failure_detection_timer;
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} fapi_nr_radio_link_monitoring_config_t;
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typedef struct {
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fapi_nr_pdcch_config_dedicated_t pdcch_config_dedicated;
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fapi_nr_pdsch_config_dedicated_t pdsch_config_dedicated;
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fapi_nr_sps_config_t sps_config;
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fapi_nr_radio_link_monitoring_config_t radio_link_monitoring_config;
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} fapi_nr_dl_bwp_dedicated_config_t;
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typedef struct {
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fapi_nr_rach_config_common_t rach_config_common;
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fapi_nr_pusch_config_common_t pusch_config_common;
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fapi_nr_pucch_config_common_t pucch_config_common;
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} fapi_nr_ul_bwp_common_config_t;
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typedef struct {
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uint8_t inter_slot_frequency_hopping;
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uint8_t additional_dmrs;
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uint8_t max_code_rate;
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uint8_t number_of_slots;
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uint8_t pi2bpsk;
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uint8_t simultaneous_harq_ack_csi;
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} fapi_nr_pucch_format_config_t;
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typedef struct {
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fapi_nr_pucch_format_config_t format1;
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fapi_nr_pucch_format_config_t format2;
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fapi_nr_pucch_format_config_t format3;
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fapi_nr_pucch_format_config_t format4;
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fapi_nr_pucch_resource_t multi_csi_pucch_resources[2];
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uint8_t dl_data_to_ul_ack[8];
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// pucch power control
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uint8_t deltaF_pucch_f0;
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uint8_t deltaF_pucch_f1;
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uint8_t deltaF_pucch_f2;
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uint8_t deltaF_pucch_f3;
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uint8_t deltaF_pucch_f4;
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uint8_t two_pucch_pc_adjusment_states;
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} fapi_nr_pucch_config_dedicated_t;
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typedef struct {
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uint8_t dmrs_type;
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uint8_t dmrs_addition_position;
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uint8_t ptrs_uplink_config; // to indicate if PTRS Uplink is configured of not
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uint8_t ptrs_type; //cp-OFDM, dft-S-OFDM
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uint16_t ptrs_frequency_density[2];
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uint8_t ptrs_time_density[3];
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uint8_t ptrs_max_number_of_ports;
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uint8_t ptrs_resource_element_offset;
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uint8_t ptrs_power;
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uint16_t ptrs_sample_density[5];
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uint8_t ptrs_time_density_transform_precoding;
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uint8_t max_length;
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uint16_t scrambling_id0;
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uint16_t scrambling_id1;
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uint8_t npusch_identity;
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uint8_t disable_sequence_group_hopping;
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uint8_t sequence_hopping_enable;
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} fapi_nr_dmrs_uplink_config_t;
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typedef struct {
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uint8_t tpc_accmulation;
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uint8_t msg3_alpha;
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uint8_t p0_nominal_with_grant;
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uint8_t two_pusch_pc_adjustments_states;
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uint8_t delta_mcs;
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} fapi_nr_pusch_power_control_t;
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typedef enum {tx_config_codebook = 1, tx_config_nonCodebook = 2} tx_config_t;
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typedef enum {transform_precoder_enabled = 0, transform_precoder_disabled = 1} transform_precoder_t;
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typedef enum {
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codebook_subset_fullyAndPartialAndNonCoherent = 1,
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codebook_subset_partialAndNonCoherent = 2,
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codebook_subset_nonCoherent = 3} codebook_subset_t;
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typedef struct {
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uint16_t data_scrambling_identity;
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tx_config_t tx_config;
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fapi_nr_dmrs_uplink_config_t dmrs_ul_for_pusch_mapping_type_a;
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fapi_nr_dmrs_uplink_config_t dmrs_ul_for_pusch_mapping_type_b;
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fapi_nr_pusch_power_control_t pusch_power_control;
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uint8_t frequency_hopping;
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uint16_t frequency_hopping_offset_lists[4];
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uint8_t resource_allocation;
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fapi_nr_pusch_time_domain_resource_allocation_t allocation_list[FAPI_NR_MAX_NUM_UL_ALLOCATIONS];
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uint8_t pusch_aggregation_factor;
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uint8_t mcs_table;
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uint8_t mcs_table_transform_precoder;
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transform_precoder_t transform_precoder;
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codebook_subset_t codebook_subset;
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uint8_t max_rank;
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uint8_t rbg_size;
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//uci-OnPUSCH
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uint8_t uci_on_pusch_type; //dynamic, semi-static
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uint8_t beta_offset_ack_index1[4];
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uint8_t beta_offset_ack_index2[4];
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uint8_t beta_offset_ack_index3[4];
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uint8_t beta_offset_csi_part1_index1[4];
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uint8_t beta_offset_csi_part1_index2[4];
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uint8_t beta_offset_csi_part2_index1[4];
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uint8_t beta_offset_csi_part2_index2[4];
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uint8_t tp_pi2BPSK;
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} fapi_nr_pusch_config_dedicated_t;
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typedef struct {
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uint8_t frequency_hopping;
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fapi_nr_dmrs_uplink_config_t cg_dmrs_configuration;
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uint8_t mcs_table;
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uint8_t mcs_table_transform_precoder;
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//uci-OnPUSCH
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uint8_t uci_on_pusch_type; //dynamic, semi-static
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uint8_t beta_offset_ack_index1[4];
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uint8_t beta_offset_ack_index2[4];
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uint8_t beta_offset_ack_index3[4];
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uint8_t beta_offset_csi_part1_index1[4];
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uint8_t beta_offset_csi_part1_index2[4];
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uint8_t beta_offset_csi_part2_index1[4];
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uint8_t beta_offset_csi_part2_index2[4];
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uint8_t resource_allocation;
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// rgb-Size structure missing in spec.
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uint8_t power_control_loop_to_use;
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// p0-PUSCH-Alpha
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uint8_t p0;
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uint8_t alpha;
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uint8_t transform_precoder;
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uint8_t number_of_harq_process;
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uint8_t rep_k;
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uint8_t rep_k_rv;
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uint8_t periodicity;
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uint8_t configured_grant_timer;
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// rrc-ConfiguredUplinkGrant
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uint16_t time_domain_offset;
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uint8_t time_domain_allocation;
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uint32_t frequency_domain_allocation;
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uint8_t antenna_ports;
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uint8_t dmrs_seq_initialization;
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uint8_t precoding_and_number_of_layers;
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uint8_t srs_resource_indicator;
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uint8_t mcs_and_tbs;
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uint8_t frequency_hopping_offset;
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uint8_t path_loss_reference_index;
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} fapi_nr_configured_grant_config_t;
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typedef struct {
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uint8_t qcl_type1_serving_cell_index;
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uint8_t qcl_type1_bwp_id;
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uint8_t qcl_type1_rs_type; // csi-rs or ssb
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uint8_t qcl_type1_nzp_csi_rs_resource_id;
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uint8_t qcl_type1_ssb_index;
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uint8_t qcl_type1_type;
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uint8_t qcl_type2_serving_cell_index;
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uint8_t qcl_type2_bwp_id;
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uint8_t qcl_type2_rs_type; // csi-rs or ssb
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uint8_t qcl_type2_nzp_csi_rs_resource_id;
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uint8_t qcl_type2_ssb_index;
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uint8_t qcl_type2_type;
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} fapi_nr_tci_state_t;
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typedef struct {
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uint8_t root_sequence_index;
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// rach genertic
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uint8_t prach_configuration_index;
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uint8_t msg1_fdm;
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uint8_t msg1_frequency_start;
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uint8_t zero_correlation_zone_config;
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uint8_t preamble_received_target_power;
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uint8_t preamble_transmission_max;
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uint8_t power_ramping_step;
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uint8_t ra_window_size;
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uint8_t rsrp_threshold_ssb;
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// PRACH-ResourceDedicatedBFR
|
||||
uint8_t bfr_ssb_index[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
|
||||
uint8_t bfr_ssb_ra_preamble_index[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
|
||||
// NZP-CSI-RS-Resource
|
||||
uint8_t bfr_csi_rs_nzp_resource_mapping[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
|
||||
uint8_t bfr_csi_rs_power_control_offset[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
|
||||
uint8_t bfr_csi_rs_power_control_offset_ss[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
|
||||
uint16_t bfr_csi_rs_scrambling_id[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
|
||||
uint8_t bfr_csi_rs_resource_periodicity[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
|
||||
uint16_t bfr_csi_rs_resource_offset[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
|
||||
fapi_nr_tci_state_t qcl_infomation_periodic_csi_rs[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
|
||||
|
||||
uint8_t bfr_csirs_ra_occasions[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
|
||||
uint8_t bfr_csirs_ra_preamble_index[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS][FAPI_NR_MAX_RA_OCCASION_PER_CSIRS];
|
||||
|
||||
uint8_t ssb_per_rach_occasion;
|
||||
uint8_t ra_ssb_occasion_mask_index;
|
||||
fapi_nr_search_space_t recovery_search_space;
|
||||
// RA-Prioritization
|
||||
uint8_t power_ramping_step_high_priority;
|
||||
uint8_t scaling_factor_bi;
|
||||
uint8_t beam_failure_recovery_timer;
|
||||
} fapi_nr_beam_failure_recovery_config_t;
|
||||
|
||||
typedef struct {
|
||||
fapi_nr_pucch_config_dedicated_t pucch_config_dedicated;
|
||||
fapi_nr_pusch_config_dedicated_t pusch_config_dedicated;
|
||||
fapi_nr_configured_grant_config_t configured_grant_config;
|
||||
// SRS-Config
|
||||
uint8_t srs_tpc_accumulation;
|
||||
fapi_nr_beam_failure_recovery_config_t beam_failure_recovery_config;
|
||||
|
||||
} fapi_nr_ul_bwp_dedicated_config_t;
|
||||
|
||||
#define FAPI_NR_CONFIG_REQUEST_MASK_PBCH 0x01
|
||||
#define FAPI_NR_CONFIG_REQUEST_MASK_DL_BWP_COMMON 0x02
|
||||
#define FAPI_NR_CONFIG_REQUEST_MASK_UL_BWP_COMMON 0x04
|
||||
|
||||
Reference in New Issue
Block a user