addressing review comments
This commit is contained in:
@@ -344,11 +344,6 @@ typedef struct {
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#define MAX_NR_OF_DL_ALLOCATIONS 16
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#define MAX_NR_OF_DL_ALLOCATIONS 16
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#define MAX_NR_OF_UL_ALLOCATIONS (16)
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#define MAX_NR_OF_UL_ALLOCATIONS (16)
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typedef enum {
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typeA = 0,
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typeB = 1
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} mappingType_t;
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typedef enum {
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typedef enum {
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pdsch_dmrs_pos0 = 0,
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pdsch_dmrs_pos0 = 0,
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pdsch_dmrs_pos1 = 1,
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pdsch_dmrs_pos1 = 1,
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@@ -368,12 +363,7 @@ typedef enum {
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pusch_dmrs_type1 = 0,
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pusch_dmrs_type1 = 0,
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pusch_dmrs_type2 = 1
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pusch_dmrs_type2 = 1
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} pusch_dmrs_type_t;
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} pusch_dmrs_type_t;
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typedef enum {
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pusch_dmrs_pos0 = 0,
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pusch_dmrs_pos1 = 1,
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pusch_dmrs_pos2 = 2,
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pusch_dmrs_pos3 = 3,
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} pusch_dmrs_AdditionalPosition_t;
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typedef enum {
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typedef enum {
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pusch_len1 = 1,
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pusch_len1 = 1,
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pusch_len2 = 2
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pusch_len2 = 2
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@@ -85,31 +85,22 @@ nrUE_params_t *get_nrUE_params(void) {
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int main(int argc, char **argv)
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int main(int argc, char **argv)
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{
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{
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char c;
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char c;
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int i; //,j,l,aa;
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int i;
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double SNR, SNR_lin, snr0 = -2.0, snr1 = 2.0;
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double SNR, SNR_lin, snr0 = -2.0, snr1 = 2.0;
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double snr_step = 0.1;
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double snr_step = 0.1;
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uint8_t snr1set = 0;
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uint8_t snr1set = 0;
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int **txdata;
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int **txdata;
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double **s_re, **s_im, **r_re, **r_im;
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double **s_re, **s_im, **r_re, **r_im;
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// int sync_pos, sync_pos_slot;
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// FILE *rx_frame_file;
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FILE *output_fd = NULL;
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FILE *output_fd = NULL;
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//uint8_t write_output_file = 0;
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//uint8_t write_output_file = 0;
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// int subframe_offset;
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// char fname[40], vname[40];
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int trial, n_trials = 1, n_errors = 0, n_false_positive = 0;
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int trial, n_trials = 1, n_errors = 0, n_false_positive = 0;
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uint8_t n_tx = 1, n_rx = 1;
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uint8_t n_tx = 1, n_rx = 1;
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//uint8_t transmission_mode = 1;
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uint16_t Nid_cell = 0;
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uint16_t Nid_cell = 0;
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channel_desc_t *gNB2UE;
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channel_desc_t *gNB2UE;
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uint8_t extended_prefix_flag = 0;
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uint8_t extended_prefix_flag = 0;
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//int8_t interf1 = -21, interf2 = -21;
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FILE *input_fd = NULL, *pbch_file_fd = NULL;
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FILE *input_fd = NULL, *pbch_file_fd = NULL;
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//char input_val_str[50],input_val_str2[50];
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//uint16_t NB_RB=25;
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SCM_t channel_model = AWGN; //Rayleigh1_anticorr;
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SCM_t channel_model = AWGN; //Rayleigh1_anticorr;
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uint16_t N_RB_DL = 106, mu = 1;
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uint16_t N_RB_DL = 106, mu = 1;
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//unsigned char frame_type = 0;
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unsigned char pbch_phase = 0;
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unsigned char pbch_phase = 0;
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int frame = 0, slot = 0;
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int frame = 0, slot = 0;
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int frame_length_complex_samples;
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int frame_length_complex_samples;
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@@ -120,7 +111,6 @@ int main(int argc, char **argv)
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double sigma;
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double sigma;
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unsigned char qbits = 8;
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unsigned char qbits = 8;
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int ret;
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int ret;
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//int run_initial_sync=0;
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int loglvl = OAILOG_WARNING;
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int loglvl = OAILOG_WARNING;
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uint8_t dlsch_threads = 0;
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uint8_t dlsch_threads = 0;
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float target_error_rate = 0.01;
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float target_error_rate = 0.01;
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@@ -195,14 +185,6 @@ int main(int argc, char **argv)
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break;
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break;
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/*case 'i':
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interf1 = atoi(optarg);
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break;
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case 'j':
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interf2 = atoi(optarg);
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break;*/
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case 'n':
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case 'n':
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n_trials = atoi(optarg);
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n_trials = atoi(optarg);
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break;
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break;
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@@ -312,13 +294,10 @@ int main(int argc, char **argv)
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gNBthreads[sizeof(gNBthreads)-1]=0;
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gNBthreads[sizeof(gNBthreads)-1]=0;
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break;
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break;
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/*case 'x':
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transmission_mode = atoi(optarg);
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break;*/
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default:
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default:
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case 'h':
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case 'h':
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printf("%s -h(elp) -p(extended_prefix) -N cell_id -f output_filename -F input_filename -g channel_model -n n_frames -t Delayspread -s snr0 -S snr1 -x transmission_mode -y TXant -z RXant -i Intefrence0 -j Interference1 -A interpolation_file -C(alibration offset dB) -N CellId\n", argv[0]);
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printf("%s -h(elp) -p(extended_prefix) -N cell_id -f output_filename -F input_filename -g channel_model -n n_frames -t Delayspread -s snr0 -S snr1 -y TXant -z RXant -i Intefrence0 -j Interference1 -A interpolation_file -C(alibration offset dB) -N CellId\n", argv[0]);
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printf("-h This message\n");
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printf("-h This message\n");
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printf("-p Use extended prefix mode\n");
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printf("-p Use extended prefix mode\n");
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printf("-V Enable VCD dumb functions\n");
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printf("-V Enable VCD dumb functions\n");
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@@ -333,7 +312,7 @@ int main(int argc, char **argv)
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printf("-z Number of RX antennas used in UE\n");
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printf("-z Number of RX antennas used in UE\n");
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//printf("-i Relative strength of first intefering eNB (in dB) - cell_id mod 3 = 1\n");
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//printf("-i Relative strength of first intefering eNB (in dB) - cell_id mod 3 = 1\n");
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//printf("-j Relative strength of second intefering eNB (in dB) - cell_id mod 3 = 2\n");
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//printf("-j Relative strength of second intefering eNB (in dB) - cell_id mod 3 = 2\n");
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printf("-M Multiple SSB positions in burst\n");
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printf("-M Multiple SSB positions in burst\n");
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printf("-N Nid_cell\n");
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printf("-N Nid_cell\n");
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printf("-R N_RB_DL\n");
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printf("-R N_RB_DL\n");
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printf("-O oversampling factor (1,2,4,8,16)\n");
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printf("-O oversampling factor (1,2,4,8,16)\n");
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@@ -324,21 +324,20 @@ void nr_dlsim_preprocessor(module_id_t module_id,
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current_BWP->mcsTableIdx = g_mcsTableIdx;
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current_BWP->mcsTableIdx = g_mcsTableIdx;
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sched_pdsch->time_domain_allocation = get_dl_tda(RC.nrmac[module_id], scc, slot);
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sched_pdsch->time_domain_allocation = get_dl_tda(RC.nrmac[module_id], scc, slot);
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AssertFatal(sched_pdsch->time_domain_allocation>=0,"Unable to find PDSCH time domain allocation in list\n");
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AssertFatal(sched_pdsch->time_domain_allocation>=0,"Unable to find PDSCH time domain allocation in list\n");
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NR_pdsch_tda_info_t *tda_info = &sched_pdsch->tda_info;
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nr_get_pdsch_tda_info(current_BWP, sched_pdsch->time_domain_allocation, tda_info);
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set_dl_dmrs_params(&sched_pdsch->dmrs_parms,
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sched_pdsch->tda_info = nr_get_pdsch_tda_info(current_BWP, sched_pdsch->time_domain_allocation);
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scc,
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current_BWP,
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sched_pdsch->dmrs_parms = get_dl_dmrs_params(scc,
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tda_info,
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current_BWP,
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sched_pdsch->nrOfLayers);
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&sched_pdsch->tda_info,
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sched_pdsch->nrOfLayers);
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sched_pdsch->Qm = nr_get_Qm_dl(sched_pdsch->mcs, current_BWP->mcsTableIdx);
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sched_pdsch->Qm = nr_get_Qm_dl(sched_pdsch->mcs, current_BWP->mcsTableIdx);
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sched_pdsch->R = nr_get_code_rate_dl(sched_pdsch->mcs, current_BWP->mcsTableIdx);
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sched_pdsch->R = nr_get_code_rate_dl(sched_pdsch->mcs, current_BWP->mcsTableIdx);
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sched_pdsch->tb_size = nr_compute_tbs(sched_pdsch->Qm,
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sched_pdsch->tb_size = nr_compute_tbs(sched_pdsch->Qm,
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sched_pdsch->R,
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sched_pdsch->R,
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sched_pdsch->rbSize,
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sched_pdsch->rbSize,
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tda_info->nrOfSymbols,
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sched_pdsch->tda_info.nrOfSymbols,
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sched_pdsch->dmrs_parms.N_PRB_DMRS * sched_pdsch->dmrs_parms.N_DMRS_SLOT,
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sched_pdsch->dmrs_parms.N_PRB_DMRS * sched_pdsch->dmrs_parms.N_DMRS_SLOT,
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0 /* N_PRB_oh, 0 for initialBWP */,
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0 /* N_PRB_oh, 0 for initialBWP */,
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0 /* tb_scaling */,
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0 /* tb_scaling */,
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@@ -3155,7 +3155,7 @@ int is_nr_UL_slot(NR_TDD_UL_DL_ConfigCommon_t *tdd_UL_DL_ConfigurationCommon, sl
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else return(slot_in_period >= slots1+tdd_UL_DL_ConfigurationCommon->pattern2->nrofDownlinkSlots ? 1 : 0);
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else return(slot_in_period >= slots1+tdd_UL_DL_ConfigurationCommon->pattern2->nrofDownlinkSlots ? 1 : 0);
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}
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}
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int16_t fill_dmrs_mask(NR_PDSCH_Config_t *pdsch_Config,int dmrs_TypeA_Position,int NrOfSymbols, int startSymbol, int mappingtype, int length) {
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int16_t fill_dmrs_mask(const NR_PDSCH_Config_t *pdsch_Config,int dmrs_TypeA_Position,int NrOfSymbols, int startSymbol, mappingType_t mappingtype, int length) {
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int dmrs_AdditionalPosition = 0;
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int dmrs_AdditionalPosition = 0;
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NR_DMRS_DownlinkConfig_t *dmrs_config = NULL;
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NR_DMRS_DownlinkConfig_t *dmrs_config = NULL;
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@@ -38,6 +38,18 @@
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#include "openair1/PHY/impl_defs_nr.h"
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#include "openair1/PHY/impl_defs_nr.h"
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#include "common/utils/nr/nr_common.h"
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#include "common/utils/nr/nr_common.h"
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typedef enum {
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pusch_dmrs_pos0 = 0,
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pusch_dmrs_pos1 = 1,
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pusch_dmrs_pos2 = 2,
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pusch_dmrs_pos3 = 3,
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} pusch_dmrs_AdditionalPosition_t;
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typedef enum {
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typeA = 0,
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typeB = 1
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} mappingType_t;
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uint32_t get_Y(NR_SearchSpace_t *ss, int slot, rnti_t rnti);
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uint32_t get_Y(NR_SearchSpace_t *ss, int slot, rnti_t rnti);
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uint8_t get_BG(uint32_t A, uint16_t R);
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uint8_t get_BG(uint32_t A, uint16_t R);
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@@ -46,7 +58,7 @@ uint64_t from_nrarfcn(int nr_bandP, uint8_t scs_index, uint32_t dl_nrarfcn);
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uint32_t to_nrarfcn(int nr_bandP, uint64_t dl_CarrierFreq, uint8_t scs_index, uint32_t bw);
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uint32_t to_nrarfcn(int nr_bandP, uint64_t dl_CarrierFreq, uint8_t scs_index, uint32_t bw);
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int16_t fill_dmrs_mask(NR_PDSCH_Config_t *pdsch_Config,int dmrs_TypeA_Position,int NrOfSymbols,int startSymbol,int mappingtype_fromDCI,int length);
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int16_t fill_dmrs_mask(const NR_PDSCH_Config_t *pdsch_Config,int dmrs_TypeA_Position,int NrOfSymbols,int startSymbol,mappingType_t mappingtype,int length);
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int is_nr_DL_slot(NR_TDD_UL_DL_ConfigCommon_t *tdd_UL_DL_ConfigurationCommon,slot_t slotP);
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int is_nr_DL_slot(NR_TDD_UL_DL_ConfigCommon_t *tdd_UL_DL_ConfigurationCommon,slot_t slotP);
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@@ -1159,10 +1159,8 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
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// Calculate number of symbols
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// Calculate number of symbols
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int time_domain_assignment = get_dl_tda(nr_mac, scc, slotP);
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int time_domain_assignment = get_dl_tda(nr_mac, scc, slotP);
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NR_pdsch_tda_info_t tda_info;
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NR_tda_info_t tda_info = nr_get_pdsch_tda_info(dl_bwp,
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nr_get_pdsch_tda_info(dl_bwp,
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time_domain_assignment);
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time_domain_assignment,
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&tda_info);
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NR_ControlResourceSet_t *coreset = ra->coreset;
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NR_ControlResourceSet_t *coreset = ra->coreset;
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@@ -1242,12 +1240,10 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
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const int pduindex = nr_mac->pdu_index[CC_id]++;
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const int pduindex = nr_mac->pdu_index[CC_id]++;
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uint8_t mcsTableIdx = dl_bwp->mcsTableIdx;
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uint8_t mcsTableIdx = dl_bwp->mcsTableIdx;
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NR_pdsch_dmrs_t dmrs_parms;
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NR_pdsch_dmrs_t dmrs_parms = get_dl_dmrs_params(scc,
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set_dl_dmrs_params(&dmrs_parms,
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dl_bwp,
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scc,
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&tda_info,
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dl_bwp,
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1);
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&tda_info,
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1);
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pdsch_pdu_rel15->pduBitmap = 0;
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pdsch_pdu_rel15->pduBitmap = 0;
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pdsch_pdu_rel15->rnti = ra->RA_rnti;
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pdsch_pdu_rel15->rnti = ra->RA_rnti;
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@@ -1531,15 +1527,12 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
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}
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}
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}
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}
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NR_pdsch_tda_info_t msg4_tda;
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NR_tda_info_t msg4_tda = nr_get_pdsch_tda_info(dl_bwp, time_domain_assignment);
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nr_get_pdsch_tda_info(dl_bwp, time_domain_assignment, &msg4_tda);
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NR_pdsch_dmrs_t dmrs_info;
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NR_pdsch_dmrs_t dmrs_info = get_dl_dmrs_params(scc,
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set_dl_dmrs_params(&dmrs_info,
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dl_bwp,
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scc,
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&msg4_tda,
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dl_bwp,
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1);
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&msg4_tda,
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1);
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uint8_t mcsTableIdx = dl_bwp->mcsTableIdx;
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uint8_t mcsTableIdx = dl_bwp->mcsTableIdx;
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@@ -282,7 +282,7 @@ uint32_t schedule_control_sib1(module_id_t module_id,
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NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config,
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NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config,
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int time_domain_allocation,
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int time_domain_allocation,
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NR_pdsch_dmrs_t *dmrs_parms,
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NR_pdsch_dmrs_t *dmrs_parms,
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NR_pdsch_tda_info_t *tda_info,
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NR_tda_info_t *tda_info,
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uint8_t candidate_idx,
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uint8_t candidate_idx,
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uint16_t num_total_bytes) {
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uint16_t num_total_bytes) {
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@@ -580,17 +580,16 @@ void schedule_nr_sib1(module_id_t module_idP, frame_t frameP, sub_frame_t slotP)
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AssertFatal((startSymbolIndex+nrOfSymbols)<14,"SIB1 TDA %d would cause overlap with CSI-RS. Please select a different SIB1 TDA.\n",time_domain_allocation);
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AssertFatal((startSymbolIndex+nrOfSymbols)<14,"SIB1 TDA %d would cause overlap with CSI-RS. Please select a different SIB1 TDA.\n",time_domain_allocation);
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NR_pdsch_tda_info_t tda_info;
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NR_tda_info_t tda_info = {
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tda_info.mapping_type = is_typeA? typeA: typeB;
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.mapping_type = is_typeA ? typeA : typeB,
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tda_info.startSymbolIndex = startSymbolIndex;
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.startSymbolIndex = startSymbolIndex,
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tda_info.nrOfSymbols = nrOfSymbols;
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.nrOfSymbols = nrOfSymbols
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};
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NR_pdsch_dmrs_t dmrs_parms;
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NR_pdsch_dmrs_t dmrs_parms = get_dl_dmrs_params(scc,
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set_dl_dmrs_params(&dmrs_parms,
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NULL,
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scc,
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&tda_info,
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NULL,
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1);
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&tda_info,
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1);
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// Configure sched_ctrlCommon for SIB1
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// Configure sched_ctrlCommon for SIB1
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uint32_t TBS = schedule_control_sib1(module_idP, CC_id,
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uint32_t TBS = schedule_control_sib1(module_idP, CC_id,
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@@ -410,7 +410,7 @@ bool allocate_dl_retransmission(module_id_t module_id,
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if (tda == retInfo->time_domain_allocation &&
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if (tda == retInfo->time_domain_allocation &&
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layers == retInfo->nrOfLayers) {
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layers == retInfo->nrOfLayers) {
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|
||||||
NR_pdsch_tda_info_t *tda_info = &retInfo->tda_info;
|
NR_tda_info_t *tda_info = &retInfo->tda_info;
|
||||||
/* Check that there are enough resources for retransmission */
|
/* Check that there are enough resources for retransmission */
|
||||||
while (rbSize < retInfo->rbSize) {
|
while (rbSize < retInfo->rbSize) {
|
||||||
rbStart += rbSize; /* last iteration rbSize was not enough, skip it */
|
rbStart += rbSize; /* last iteration rbSize was not enough, skip it */
|
||||||
@@ -433,14 +433,11 @@ bool allocate_dl_retransmission(module_id_t module_id,
|
|||||||
} else {
|
} else {
|
||||||
/* the retransmission will use a different time domain allocation, check
|
/* the retransmission will use a different time domain allocation, check
|
||||||
* that we have enough resources */
|
* that we have enough resources */
|
||||||
NR_pdsch_tda_info_t temp_tda;
|
NR_tda_info_t temp_tda = nr_get_pdsch_tda_info(dl_bwp, tda);
|
||||||
nr_get_pdsch_tda_info(dl_bwp, tda, &temp_tda);
|
NR_pdsch_dmrs_t temp_dmrs = get_dl_dmrs_params(scc,
|
||||||
NR_pdsch_dmrs_t temp_dmrs;
|
dl_bwp,
|
||||||
set_dl_dmrs_params(&temp_dmrs,
|
&temp_tda,
|
||||||
scc,
|
layers);
|
||||||
dl_bwp,
|
|
||||||
&temp_tda,
|
|
||||||
layers);
|
|
||||||
|
|
||||||
const uint16_t slbitmap = SL_to_bitmap(temp_tda.startSymbolIndex, temp_tda.nrOfSymbols);
|
const uint16_t slbitmap = SL_to_bitmap(temp_tda.startSymbolIndex, temp_tda.nrOfSymbols);
|
||||||
while (rbStart < bwpSize && (rballoc_mask[rbStart] & slbitmap) != slbitmap)
|
while (rbStart < bwpSize && (rballoc_mask[rbStart] & slbitmap) != slbitmap)
|
||||||
@@ -623,8 +620,7 @@ void pf_dl(module_id_t module_id,
|
|||||||
else
|
else
|
||||||
sched_pdsch->mcs = get_mcs_from_bler(bo, stats, &sched_ctrl->dl_bler_stats, max_mcs, frame);
|
sched_pdsch->mcs = get_mcs_from_bler(bo, stats, &sched_ctrl->dl_bler_stats, max_mcs, frame);
|
||||||
sched_pdsch->nrOfLayers = get_dl_nrOfLayers(sched_ctrl, current_BWP->dci_format);
|
sched_pdsch->nrOfLayers = get_dl_nrOfLayers(sched_ctrl, current_BWP->dci_format);
|
||||||
sched_pdsch->pm_index = set_pm_index(UE,
|
sched_pdsch->pm_index = get_pm_index(UE,
|
||||||
sched_ctrl,
|
|
||||||
sched_pdsch->nrOfLayers,
|
sched_pdsch->nrOfLayers,
|
||||||
mac->xp_pdsch_antenna_ports);
|
mac->xp_pdsch_antenna_ports);
|
||||||
const uint8_t Qm = nr_get_Qm_dl(sched_pdsch->mcs, current_BWP->mcsTableIdx);
|
const uint8_t Qm = nr_get_Qm_dl(sched_pdsch->mcs, current_BWP->mcsTableIdx);
|
||||||
@@ -728,9 +724,9 @@ void pf_dl(module_id_t module_id,
|
|||||||
NR_sched_pdsch_t *sched_pdsch = &sched_ctrl->sched_pdsch;
|
NR_sched_pdsch_t *sched_pdsch = &sched_ctrl->sched_pdsch;
|
||||||
sched_pdsch->time_domain_allocation = get_dl_tda(RC.nrmac[module_id], scc, slot);
|
sched_pdsch->time_domain_allocation = get_dl_tda(RC.nrmac[module_id], scc, slot);
|
||||||
AssertFatal(sched_pdsch->time_domain_allocation>=0,"Unable to find PDSCH time domain allocation in list\n");
|
AssertFatal(sched_pdsch->time_domain_allocation>=0,"Unable to find PDSCH time domain allocation in list\n");
|
||||||
NR_pdsch_tda_info_t *tda_info = &sched_pdsch->tda_info;
|
|
||||||
|
|
||||||
nr_get_pdsch_tda_info(dl_bwp, sched_pdsch->time_domain_allocation, tda_info);
|
sched_pdsch->tda_info = nr_get_pdsch_tda_info(dl_bwp, sched_pdsch->time_domain_allocation);
|
||||||
|
NR_tda_info_t *tda_info = &sched_pdsch->tda_info;
|
||||||
|
|
||||||
const uint16_t slbitmap = SL_to_bitmap(tda_info->startSymbolIndex, tda_info->nrOfSymbols);
|
const uint16_t slbitmap = SL_to_bitmap(tda_info->startSymbolIndex, tda_info->nrOfSymbols);
|
||||||
|
|
||||||
@@ -743,11 +739,10 @@ void pf_dl(module_id_t module_id,
|
|||||||
while (rbStart + max_rbSize < bwpSize && (rballoc_mask[rbStart + max_rbSize] & slbitmap) == slbitmap)
|
while (rbStart + max_rbSize < bwpSize && (rballoc_mask[rbStart + max_rbSize] & slbitmap) == slbitmap)
|
||||||
max_rbSize++;
|
max_rbSize++;
|
||||||
|
|
||||||
set_dl_dmrs_params(&sched_pdsch->dmrs_parms,
|
sched_pdsch->dmrs_parms = get_dl_dmrs_params(scc,
|
||||||
scc,
|
dl_bwp,
|
||||||
dl_bwp,
|
tda_info,
|
||||||
tda_info,
|
sched_pdsch->nrOfLayers);
|
||||||
sched_pdsch->nrOfLayers);
|
|
||||||
sched_pdsch->Qm = nr_get_Qm_dl(sched_pdsch->mcs, dl_bwp->mcsTableIdx);
|
sched_pdsch->Qm = nr_get_Qm_dl(sched_pdsch->mcs, dl_bwp->mcsTableIdx);
|
||||||
sched_pdsch->R = nr_get_code_rate_dl(sched_pdsch->mcs, dl_bwp->mcsTableIdx);
|
sched_pdsch->R = nr_get_code_rate_dl(sched_pdsch->mcs, dl_bwp->mcsTableIdx);
|
||||||
sched_pdsch->pucch_allocation = alloc;
|
sched_pdsch->pucch_allocation = alloc;
|
||||||
@@ -929,7 +924,7 @@ void nr_schedule_ue_spec(module_id_t module_id,
|
|||||||
remove_nr_list(&sched_ctrl->retrans_dl_harq, current_harq_pid);
|
remove_nr_list(&sched_ctrl->retrans_dl_harq, current_harq_pid);
|
||||||
}
|
}
|
||||||
|
|
||||||
NR_pdsch_tda_info_t *tda_info = &sched_pdsch->tda_info;
|
NR_tda_info_t *tda_info = &sched_pdsch->tda_info;
|
||||||
NR_pdsch_dmrs_t *dmrs_parms = &sched_pdsch->dmrs_parms;
|
NR_pdsch_dmrs_t *dmrs_parms = &sched_pdsch->dmrs_parms;
|
||||||
NR_UE_harq_t *harq = &sched_ctrl->harq_processes[current_harq_pid];
|
NR_UE_harq_t *harq = &sched_ctrl->harq_processes[current_harq_pid];
|
||||||
DevAssert(!harq->is_waiting);
|
DevAssert(!harq->is_waiting);
|
||||||
|
|||||||
@@ -197,8 +197,8 @@ void nr_preprocessor_phytest(module_id_t module_id,
|
|||||||
const int CC_id = 0;
|
const int CC_id = 0;
|
||||||
|
|
||||||
const int tda = get_dl_tda(RC.nrmac[module_id], scc, slot);
|
const int tda = get_dl_tda(RC.nrmac[module_id], scc, slot);
|
||||||
NR_pdsch_tda_info_t *tda_info = &sched_ctrl->sched_pdsch.tda_info;
|
NR_tda_info_t tda_info = nr_get_pdsch_tda_info(dl_bwp, tda);
|
||||||
nr_get_pdsch_tda_info(dl_bwp, tda, tda_info);
|
sched_ctrl->sched_pdsch.tda_info = tda_info;
|
||||||
sched_ctrl->sched_pdsch.time_domain_allocation = tda;
|
sched_ctrl->sched_pdsch.time_domain_allocation = tda;
|
||||||
|
|
||||||
/* find largest unallocated chunk */
|
/* find largest unallocated chunk */
|
||||||
@@ -214,12 +214,12 @@ void nr_preprocessor_phytest(module_id_t module_id,
|
|||||||
while (true) {
|
while (true) {
|
||||||
/* advance to first free RB */
|
/* advance to first free RB */
|
||||||
while (rbStart < bwpSize &&
|
while (rbStart < bwpSize &&
|
||||||
(vrb_map[rbStart + BWPStart]&SL_to_bitmap(tda_info->startSymbolIndex, tda_info->nrOfSymbols)))
|
(vrb_map[rbStart + BWPStart]&SL_to_bitmap(tda_info.startSymbolIndex, tda_info.nrOfSymbols)))
|
||||||
rbStart++;
|
rbStart++;
|
||||||
rbSize = 1;
|
rbSize = 1;
|
||||||
/* iterate until we are at target_dl_bw or no available RBs */
|
/* iterate until we are at target_dl_bw or no available RBs */
|
||||||
while (rbStart + rbSize < bwpSize &&
|
while (rbStart + rbSize < bwpSize &&
|
||||||
!(vrb_map[rbStart + rbSize + BWPStart]&SL_to_bitmap(tda_info->startSymbolIndex, tda_info->nrOfSymbols)) &&
|
!(vrb_map[rbStart + rbSize + BWPStart]&SL_to_bitmap(tda_info.startSymbolIndex, tda_info.nrOfSymbols)) &&
|
||||||
rbSize < target_dl_bw)
|
rbSize < target_dl_bw)
|
||||||
rbSize++;
|
rbSize++;
|
||||||
/* found target_dl_bw? */
|
/* found target_dl_bw? */
|
||||||
@@ -305,11 +305,10 @@ void nr_preprocessor_phytest(module_id_t module_id,
|
|||||||
sched_pdsch->rbStart = rbStart;
|
sched_pdsch->rbStart = rbStart;
|
||||||
sched_pdsch->rbSize = rbSize;
|
sched_pdsch->rbSize = rbSize;
|
||||||
|
|
||||||
set_dl_dmrs_params(&sched_pdsch->dmrs_parms,
|
sched_pdsch->dmrs_parms = get_dl_dmrs_params(scc,
|
||||||
scc,
|
dl_bwp,
|
||||||
dl_bwp,
|
&tda_info,
|
||||||
tda_info,
|
target_dl_Nl);
|
||||||
target_dl_Nl);
|
|
||||||
|
|
||||||
sched_pdsch->mcs = target_dl_mcs;
|
sched_pdsch->mcs = target_dl_mcs;
|
||||||
sched_pdsch->nrOfLayers = target_dl_Nl;
|
sched_pdsch->nrOfLayers = target_dl_Nl;
|
||||||
@@ -319,7 +318,7 @@ void nr_preprocessor_phytest(module_id_t module_id,
|
|||||||
sched_pdsch->tb_size = nr_compute_tbs(sched_pdsch->Qm,
|
sched_pdsch->tb_size = nr_compute_tbs(sched_pdsch->Qm,
|
||||||
sched_pdsch->R,
|
sched_pdsch->R,
|
||||||
sched_pdsch->rbSize,
|
sched_pdsch->rbSize,
|
||||||
tda_info->nrOfSymbols,
|
tda_info.nrOfSymbols,
|
||||||
sched_pdsch->dmrs_parms.N_PRB_DMRS * sched_pdsch->dmrs_parms.N_DMRS_SLOT,
|
sched_pdsch->dmrs_parms.N_PRB_DMRS * sched_pdsch->dmrs_parms.N_DMRS_SLOT,
|
||||||
0 /* N_PRB_oh, 0 for initialBWP */,
|
0 /* N_PRB_oh, 0 for initialBWP */,
|
||||||
0 /* tb_scaling */,
|
0 /* tb_scaling */,
|
||||||
@@ -331,7 +330,7 @@ void nr_preprocessor_phytest(module_id_t module_id,
|
|||||||
|
|
||||||
/* mark the corresponding RBs as used */
|
/* mark the corresponding RBs as used */
|
||||||
for (int rb = 0; rb < sched_pdsch->rbSize; rb++)
|
for (int rb = 0; rb < sched_pdsch->rbSize; rb++)
|
||||||
vrb_map[rb + sched_pdsch->rbStart + BWPStart] = SL_to_bitmap(tda_info->startSymbolIndex, tda_info->nrOfSymbols);
|
vrb_map[rb + sched_pdsch->rbStart + BWPStart] = SL_to_bitmap(tda_info.startSymbolIndex, tda_info.nrOfSymbols);
|
||||||
|
|
||||||
if ((frame&127) == 0) LOG_D(MAC,"phytest: %d.%d DL mcs %d, DL rbStart %d, DL rbSize %d\n", frame, slot, sched_pdsch->mcs, rbStart,rbSize);
|
if ((frame&127) == 0) LOG_D(MAC,"phytest: %d.%d DL mcs %d, DL rbStart %d, DL rbSize %d\n", frame, slot, sched_pdsch->mcs, rbStart,rbSize);
|
||||||
}
|
}
|
||||||
@@ -393,13 +392,13 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_
|
|||||||
else
|
else
|
||||||
rbSize = target_ul_bw;
|
rbSize = target_ul_bw;
|
||||||
|
|
||||||
NR_pusch_tda_info_t *tda_info = &sched_ctrl->sched_pusch.tda_info;
|
NR_tda_info_t tda_info = nr_get_pusch_tda_info(ul_bwp, tda);
|
||||||
nr_get_pusch_tda_info(ul_bwp, tda, tda_info);
|
sched_ctrl->sched_pusch.tda_info = tda_info;
|
||||||
|
|
||||||
uint16_t *vrb_map_UL =
|
uint16_t *vrb_map_UL =
|
||||||
&RC.nrmac[module_id]->common_channels[CC_id].vrb_map_UL[sched_slot * MAX_BWP_SIZE];
|
&RC.nrmac[module_id]->common_channels[CC_id].vrb_map_UL[sched_slot * MAX_BWP_SIZE];
|
||||||
for (int i = rbStart; i < rbStart + rbSize; ++i) {
|
for (int i = rbStart; i < rbStart + rbSize; ++i) {
|
||||||
if ((vrb_map_UL[i+BWPStart] & SL_to_bitmap(tda_info->startSymbolIndex, tda_info->nrOfSymbols)) != 0) {
|
if ((vrb_map_UL[i+BWPStart] & SL_to_bitmap(tda_info.startSymbolIndex, tda_info.nrOfSymbols)) != 0) {
|
||||||
LOG_E(MAC,
|
LOG_E(MAC,
|
||||||
"%s(): %4d.%2d RB %d is already reserved, cannot schedule UE\n",
|
"%s(): %4d.%2d RB %d is already reserved, cannot schedule UE\n",
|
||||||
__func__,
|
__func__,
|
||||||
@@ -460,18 +459,17 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_
|
|||||||
sched_pusch->Qm <<= 1;
|
sched_pusch->Qm <<= 1;
|
||||||
}
|
}
|
||||||
|
|
||||||
NR_pusch_dmrs_t *dmrs = &sched_ctrl->sched_pusch.dmrs_info;
|
NR_pusch_dmrs_t dmrs = get_ul_dmrs_params(scc,
|
||||||
set_ul_dmrs_params(dmrs,
|
ul_bwp,
|
||||||
scc,
|
&tda_info,
|
||||||
ul_bwp,
|
sched_pusch->nrOfLayers);
|
||||||
tda_info,
|
sched_ctrl->sched_pusch.dmrs_info = dmrs;
|
||||||
sched_pusch->nrOfLayers);
|
|
||||||
|
|
||||||
sched_pusch->tb_size = nr_compute_tbs(sched_pusch->Qm,
|
sched_pusch->tb_size = nr_compute_tbs(sched_pusch->Qm,
|
||||||
sched_pusch->R,
|
sched_pusch->R,
|
||||||
sched_pusch->rbSize,
|
sched_pusch->rbSize,
|
||||||
tda_info->nrOfSymbols,
|
tda_info.nrOfSymbols,
|
||||||
dmrs->N_PRB_DMRS * dmrs->num_dmrs_symb,
|
dmrs.N_PRB_DMRS * dmrs.num_dmrs_symb,
|
||||||
0, // nb_rb_oh
|
0, // nb_rb_oh
|
||||||
0,
|
0,
|
||||||
sched_pusch->nrOfLayers /* NrOfLayers */)
|
sched_pusch->nrOfLayers /* NrOfLayers */)
|
||||||
@@ -485,6 +483,6 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_
|
|||||||
sched_ctrl->aggregation_level);
|
sched_ctrl->aggregation_level);
|
||||||
|
|
||||||
for (int rb = rbStart; rb < rbStart + rbSize; rb++)
|
for (int rb = rbStart; rb < rbStart + rbSize; rb++)
|
||||||
vrb_map_UL[rb+BWPStart] |= SL_to_bitmap(tda_info->startSymbolIndex, tda_info->nrOfSymbols);
|
vrb_map_UL[rb+BWPStart] |= SL_to_bitmap(tda_info.startSymbolIndex, tda_info.nrOfSymbols);
|
||||||
return true;
|
return true;
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -142,7 +142,8 @@ static inline uint8_t get_max_cces(uint8_t scs) {
|
|||||||
return (nr_max_number_of_cces_per_slot[scs]);
|
return (nr_max_number_of_cces_per_slot[scs]);
|
||||||
}
|
}
|
||||||
|
|
||||||
uint8_t get_dl_nrOfLayers(NR_UE_sched_ctrl_t *sched_ctrl, nr_dci_format_t dci_format) {
|
uint8_t get_dl_nrOfLayers(const NR_UE_sched_ctrl_t *sched_ctrl,
|
||||||
|
const nr_dci_format_t dci_format) {
|
||||||
|
|
||||||
// TODO check this but it should be enough for now
|
// TODO check this but it should be enough for now
|
||||||
// if there is not csi report activated RI is 0 from initialization
|
// if there is not csi report activated RI is 0 from initialization
|
||||||
@@ -153,13 +154,13 @@ uint8_t get_dl_nrOfLayers(NR_UE_sched_ctrl_t *sched_ctrl, nr_dci_format_t dci_fo
|
|||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
uint16_t set_pm_index(NR_UE_info_t *UE,
|
uint16_t get_pm_index(const NR_UE_info_t *UE,
|
||||||
NR_UE_sched_ctrl_t *sched_ctrl,
|
|
||||||
int layers,
|
int layers,
|
||||||
int xp_pdsch_antenna_ports) {
|
int xp_pdsch_antenna_ports) {
|
||||||
|
|
||||||
if (layers == 1) return 0;
|
if (layers == 1) return 0;
|
||||||
|
|
||||||
|
const NR_UE_sched_ctrl_t *sched_ctrl = &UE->UE_sched_ctrl;
|
||||||
const int report_id = sched_ctrl->CSI_report.cri_ri_li_pmi_cqi_report.csi_report_id;
|
const int report_id = sched_ctrl->CSI_report.cri_ri_li_pmi_cqi_report.csi_report_id;
|
||||||
const nr_csi_report_t *csi_report = &UE->csi_report_template[report_id];
|
const nr_csi_report_t *csi_report = &UE->csi_report_template[report_id];
|
||||||
const int N1 = csi_report->N1;
|
const int N1 = csi_report->N1;
|
||||||
@@ -221,20 +222,17 @@ uint8_t get_mcs_from_cqi(int mcs_table, int cqi_table, int cqi_idx)
|
|||||||
return 9;
|
return 9;
|
||||||
}
|
}
|
||||||
|
|
||||||
void set_dl_dmrs_params(NR_pdsch_dmrs_t *dmrs,
|
NR_pdsch_dmrs_t get_dl_dmrs_params(const NR_ServingCellConfigCommon_t *scc,
|
||||||
const NR_ServingCellConfigCommon_t *scc,
|
const NR_UE_DL_BWP_t *dl_bwp,
|
||||||
NR_UE_DL_BWP_t *dl_bwp,
|
const NR_tda_info_t *tda_info,
|
||||||
NR_pdsch_tda_info_t *tda_info,
|
const int Layers) {
|
||||||
int Layers) {
|
|
||||||
|
|
||||||
|
NR_pdsch_dmrs_t dmrs = {0};
|
||||||
int frontloaded_symb = 1; // default value
|
int frontloaded_symb = 1; // default value
|
||||||
nr_dci_format_t dci_format = dl_bwp ? dl_bwp->dci_format : NR_DL_DCI_FORMAT_1_0;
|
nr_dci_format_t dci_format = dl_bwp ? dl_bwp->dci_format : NR_DL_DCI_FORMAT_1_0;
|
||||||
if (dci_format == NR_DL_DCI_FORMAT_1_0) {
|
if (dci_format == NR_DL_DCI_FORMAT_1_0) {
|
||||||
if (tda_info->nrOfSymbols == 2)
|
dmrs.numDmrsCdmGrpsNoData = tda_info->nrOfSymbols == 2 ? 1 : 2;
|
||||||
dmrs->numDmrsCdmGrpsNoData = 1;
|
dmrs.dmrs_ports_id = 0;
|
||||||
else
|
|
||||||
dmrs->numDmrsCdmGrpsNoData = 2;
|
|
||||||
dmrs->dmrs_ports_id = 0;
|
|
||||||
}
|
}
|
||||||
else {
|
else {
|
||||||
//TODO first basic implementation of dmrs port selection
|
//TODO first basic implementation of dmrs port selection
|
||||||
@@ -247,23 +245,23 @@ void set_dl_dmrs_params(NR_pdsch_dmrs_t *dmrs,
|
|||||||
|
|
||||||
switch (Layers) {
|
switch (Layers) {
|
||||||
case 1:
|
case 1:
|
||||||
dmrs->dmrs_ports_id = 0;
|
dmrs.dmrs_ports_id = 0;
|
||||||
dmrs->numDmrsCdmGrpsNoData = 1;
|
dmrs.numDmrsCdmGrpsNoData = 1;
|
||||||
frontloaded_symb = 1;
|
frontloaded_symb = 1;
|
||||||
break;
|
break;
|
||||||
case 2:
|
case 2:
|
||||||
dmrs->dmrs_ports_id = 2;
|
dmrs.dmrs_ports_id = 2;
|
||||||
dmrs->numDmrsCdmGrpsNoData = 1;
|
dmrs.numDmrsCdmGrpsNoData = 1;
|
||||||
frontloaded_symb = 1;
|
frontloaded_symb = 1;
|
||||||
break;
|
break;
|
||||||
case 3:
|
case 3:
|
||||||
dmrs->dmrs_ports_id = 9;
|
dmrs.dmrs_ports_id = 9;
|
||||||
dmrs->numDmrsCdmGrpsNoData = 2;
|
dmrs.numDmrsCdmGrpsNoData = 2;
|
||||||
frontloaded_symb = 1;
|
frontloaded_symb = 1;
|
||||||
break;
|
break;
|
||||||
case 4:
|
case 4:
|
||||||
dmrs->dmrs_ports_id = 10;
|
dmrs.dmrs_ports_id = 10;
|
||||||
dmrs->numDmrsCdmGrpsNoData = 2;
|
dmrs.numDmrsCdmGrpsNoData = 2;
|
||||||
frontloaded_symb = 1;
|
frontloaded_symb = 1;
|
||||||
break;
|
break;
|
||||||
default:
|
default:
|
||||||
@@ -273,19 +271,19 @@ void set_dl_dmrs_params(NR_pdsch_dmrs_t *dmrs,
|
|||||||
|
|
||||||
NR_PDSCH_Config_t *pdsch_Config = dl_bwp ? dl_bwp->pdsch_Config : NULL;
|
NR_PDSCH_Config_t *pdsch_Config = dl_bwp ? dl_bwp->pdsch_Config : NULL;
|
||||||
if (pdsch_Config) {
|
if (pdsch_Config) {
|
||||||
if (tda_info->mapping_type == NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeB)
|
if (tda_info->mapping_type == typeB)
|
||||||
dmrs->dmrsConfigType = pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeB->choice.setup->dmrs_Type != NULL;
|
dmrs.dmrsConfigType = pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeB->choice.setup->dmrs_Type != NULL;
|
||||||
else
|
else
|
||||||
dmrs->dmrsConfigType = pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type != NULL;
|
dmrs.dmrsConfigType = pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type != NULL;
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
dmrs->dmrsConfigType = NFAPI_NR_DMRS_TYPE1;
|
dmrs.dmrsConfigType = NFAPI_NR_DMRS_TYPE1;
|
||||||
|
|
||||||
dmrs->N_PRB_DMRS = dmrs->numDmrsCdmGrpsNoData * (dmrs->dmrsConfigType == NFAPI_NR_DMRS_TYPE1 ? 6 : 4);
|
|
||||||
dmrs->dl_dmrs_symb_pos = fill_dmrs_mask(pdsch_Config, scc->dmrs_TypeA_Position, tda_info->nrOfSymbols, tda_info->startSymbolIndex, tda_info->mapping_type, frontloaded_symb);
|
|
||||||
dmrs->N_DMRS_SLOT = get_num_dmrs(dmrs->dl_dmrs_symb_pos);
|
|
||||||
LOG_D(NR_MAC,"Filling dmrs info, ps->N_PRB_DMRS %d, ps->dl_dmrs_symb_pos %x, ps->N_DMRS_SLOT %d\n",dmrs->N_PRB_DMRS,dmrs->dl_dmrs_symb_pos,dmrs->N_DMRS_SLOT);
|
|
||||||
|
|
||||||
|
dmrs.N_PRB_DMRS = dmrs.numDmrsCdmGrpsNoData * (dmrs.dmrsConfigType == NFAPI_NR_DMRS_TYPE1 ? 6 : 4);
|
||||||
|
dmrs.dl_dmrs_symb_pos = fill_dmrs_mask(pdsch_Config, scc->dmrs_TypeA_Position, tda_info->nrOfSymbols, tda_info->startSymbolIndex, tda_info->mapping_type, frontloaded_symb);
|
||||||
|
dmrs.N_DMRS_SLOT = get_num_dmrs(dmrs.dl_dmrs_symb_pos);
|
||||||
|
LOG_D(NR_MAC,"Filling dmrs info, ps->N_PRB_DMRS %d, ps->dl_dmrs_symb_pos %x, ps->N_DMRS_SLOT %d\n",dmrs.N_PRB_DMRS,dmrs.dl_dmrs_symb_pos,dmrs.N_DMRS_SLOT);
|
||||||
|
return dmrs;
|
||||||
}
|
}
|
||||||
|
|
||||||
NR_ControlResourceSet_t *get_coreset(gNB_MAC_INST *nrmac,
|
NR_ControlResourceSet_t *get_coreset(gNB_MAC_INST *nrmac,
|
||||||
@@ -551,54 +549,56 @@ bool nr_find_nb_rb(uint16_t Qm,
|
|||||||
return *tbs >= bytes && *nb_rb <= nb_rb_max;
|
return *tbs >= bytes && *nb_rb <= nb_rb_max;
|
||||||
}
|
}
|
||||||
|
|
||||||
void nr_get_pdsch_tda_info(const NR_UE_DL_BWP_t *dl_bwp,
|
NR_tda_info_t nr_get_pdsch_tda_info(const NR_UE_DL_BWP_t *dl_bwp,
|
||||||
int tda,
|
const int tda) {
|
||||||
NR_pdsch_tda_info_t *tda_info) {
|
|
||||||
|
|
||||||
|
NR_tda_info_t tda_info = {0};
|
||||||
NR_PDSCH_TimeDomainResourceAllocationList_t *tdaList = dl_bwp->tdaList;
|
NR_PDSCH_TimeDomainResourceAllocationList_t *tdaList = dl_bwp->tdaList;
|
||||||
AssertFatal(tda < tdaList->list.count, "time_domain_allocation %d>=%d\n", tda, tdaList->list.count);
|
AssertFatal(tda < tdaList->list.count, "time_domain_allocation %d>=%d\n", tda, tdaList->list.count);
|
||||||
tda_info->mapping_type = tdaList->list.array[tda]->mappingType;
|
tda_info.mapping_type = tdaList->list.array[tda]->mappingType;
|
||||||
const int startSymbolAndLength = tdaList->list.array[tda]->startSymbolAndLength;
|
const int startSymbolAndLength = tdaList->list.array[tda]->startSymbolAndLength;
|
||||||
SLIV2SL(startSymbolAndLength, &tda_info->startSymbolIndex, &tda_info->nrOfSymbols);
|
SLIV2SL(startSymbolAndLength, &tda_info.startSymbolIndex, &tda_info.nrOfSymbols);
|
||||||
|
return tda_info;
|
||||||
}
|
}
|
||||||
|
|
||||||
void nr_get_pusch_tda_info(const NR_UE_UL_BWP_t *ul_bwp,
|
NR_tda_info_t nr_get_pusch_tda_info(const NR_UE_UL_BWP_t *ul_bwp,
|
||||||
int tda,
|
const int tda) {
|
||||||
NR_pusch_tda_info_t *tda_info) {
|
|
||||||
|
|
||||||
|
NR_tda_info_t tda_info = {0};
|
||||||
NR_PUSCH_TimeDomainResourceAllocationList_t *tdaList = ul_bwp->tdaList;
|
NR_PUSCH_TimeDomainResourceAllocationList_t *tdaList = ul_bwp->tdaList;
|
||||||
AssertFatal(tda < tdaList->list.count, "time_domain_allocation %d>=%d\n", tda, tdaList->list.count);
|
AssertFatal(tda < tdaList->list.count, "time_domain_allocation %d>=%d\n", tda, tdaList->list.count);
|
||||||
tda_info->mapping_type = tdaList->list.array[tda]->mappingType;
|
tda_info.mapping_type = tdaList->list.array[tda]->mappingType;
|
||||||
const int startSymbolAndLength = tdaList->list.array[tda]->startSymbolAndLength;
|
const int startSymbolAndLength = tdaList->list.array[tda]->startSymbolAndLength;
|
||||||
SLIV2SL(startSymbolAndLength, &tda_info->startSymbolIndex, &tda_info->nrOfSymbols);
|
SLIV2SL(startSymbolAndLength, &tda_info.startSymbolIndex, &tda_info.nrOfSymbols);
|
||||||
|
return tda_info;
|
||||||
}
|
}
|
||||||
|
|
||||||
void set_ul_dmrs_params(NR_pusch_dmrs_t *dmrs,
|
NR_pusch_dmrs_t get_ul_dmrs_params(const NR_ServingCellConfigCommon_t *scc,
|
||||||
const NR_ServingCellConfigCommon_t *scc,
|
const NR_UE_UL_BWP_t *ul_bwp,
|
||||||
NR_UE_UL_BWP_t *ul_bwp,
|
const NR_tda_info_t *tda_info,
|
||||||
NR_pusch_tda_info_t *tda_info,
|
const int Layers) {
|
||||||
int Layers) {
|
|
||||||
|
|
||||||
|
NR_pusch_dmrs_t dmrs = {0};
|
||||||
// TODO setting of cdm groups with no data to be redone for MIMO
|
// TODO setting of cdm groups with no data to be redone for MIMO
|
||||||
if (ul_bwp->transform_precoding || Layers<3)
|
if (ul_bwp->transform_precoding || Layers<3)
|
||||||
dmrs->num_dmrs_cdm_grps_no_data = (ul_bwp->dci_format == NR_UL_DCI_FORMAT_0_1) ? 1 : (tda_info->nrOfSymbols == 2 ? 1 : 2);
|
dmrs.num_dmrs_cdm_grps_no_data = ul_bwp->dci_format == NR_UL_DCI_FORMAT_0_1 || tda_info->nrOfSymbols == 2 ? 1 : 2;
|
||||||
else
|
else
|
||||||
dmrs->num_dmrs_cdm_grps_no_data = 2;
|
dmrs.num_dmrs_cdm_grps_no_data = 2;
|
||||||
|
|
||||||
NR_DMRS_UplinkConfig_t *NR_DMRS_UplinkConfig = ul_bwp->pusch_Config ?
|
NR_DMRS_UplinkConfig_t *NR_DMRS_UplinkConfig = ul_bwp->pusch_Config ?
|
||||||
(tda_info->mapping_type == NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeA ?
|
(tda_info->mapping_type == typeA ?
|
||||||
ul_bwp->pusch_Config->dmrs_UplinkForPUSCH_MappingTypeA->choice.setup :
|
ul_bwp->pusch_Config->dmrs_UplinkForPUSCH_MappingTypeA->choice.setup :
|
||||||
ul_bwp->pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup) : NULL;
|
ul_bwp->pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup) : NULL;
|
||||||
|
|
||||||
dmrs->dmrs_config_type = NR_DMRS_UplinkConfig ? ((NR_DMRS_UplinkConfig->dmrs_Type == NULL ? 0 : 1)) : 0;
|
dmrs.dmrs_config_type = NR_DMRS_UplinkConfig && NR_DMRS_UplinkConfig->dmrs_Type ? 1 : 0;
|
||||||
|
|
||||||
const pusch_dmrs_AdditionalPosition_t additional_pos = NR_DMRS_UplinkConfig ? (NR_DMRS_UplinkConfig->dmrs_AdditionalPosition == NULL ?
|
const pusch_dmrs_AdditionalPosition_t additional_pos = (NR_DMRS_UplinkConfig && NR_DMRS_UplinkConfig->dmrs_AdditionalPosition) ?
|
||||||
2 : (*NR_DMRS_UplinkConfig->dmrs_AdditionalPosition ==
|
(*NR_DMRS_UplinkConfig->dmrs_AdditionalPosition ==
|
||||||
NR_DMRS_UplinkConfig__dmrs_AdditionalPosition_pos3 ?
|
NR_DMRS_UplinkConfig__dmrs_AdditionalPosition_pos3 ?
|
||||||
3 : *NR_DMRS_UplinkConfig->dmrs_AdditionalPosition)) : 2;
|
3 : *NR_DMRS_UplinkConfig->dmrs_AdditionalPosition) : 2;
|
||||||
|
|
||||||
const pusch_maxLength_t pusch_maxLength = NR_DMRS_UplinkConfig ? (NR_DMRS_UplinkConfig->maxLength == NULL ? 1 : 2) : 1;
|
const pusch_maxLength_t pusch_maxLength = NR_DMRS_UplinkConfig ? (NR_DMRS_UplinkConfig->maxLength == NULL ? 1 : 2) : 1;
|
||||||
dmrs->ul_dmrs_symb_pos = get_l_prime(tda_info->nrOfSymbols,
|
dmrs.ul_dmrs_symb_pos = get_l_prime(tda_info->nrOfSymbols,
|
||||||
tda_info->mapping_type,
|
tda_info->mapping_type,
|
||||||
additional_pos,
|
additional_pos,
|
||||||
pusch_maxLength,
|
pusch_maxLength,
|
||||||
@@ -607,13 +607,12 @@ void set_ul_dmrs_params(NR_pusch_dmrs_t *dmrs,
|
|||||||
|
|
||||||
uint8_t num_dmrs_symb = 0;
|
uint8_t num_dmrs_symb = 0;
|
||||||
for(int i = tda_info->startSymbolIndex; i < tda_info->startSymbolIndex + tda_info->nrOfSymbols; i++)
|
for(int i = tda_info->startSymbolIndex; i < tda_info->startSymbolIndex + tda_info->nrOfSymbols; i++)
|
||||||
num_dmrs_symb += (dmrs->ul_dmrs_symb_pos >> i) & 1;
|
num_dmrs_symb += (dmrs.ul_dmrs_symb_pos >> i) & 1;
|
||||||
dmrs->num_dmrs_symb = num_dmrs_symb;
|
dmrs.num_dmrs_symb = num_dmrs_symb;
|
||||||
dmrs->N_PRB_DMRS = dmrs->dmrs_config_type == 0 ?
|
dmrs.N_PRB_DMRS = dmrs.num_dmrs_cdm_grps_no_data * (dmrs.dmrs_config_type == 0 ? 6 : 4);
|
||||||
dmrs->num_dmrs_cdm_grps_no_data * 6 :
|
|
||||||
dmrs->num_dmrs_cdm_grps_no_data * 4;
|
|
||||||
|
|
||||||
dmrs->NR_DMRS_UplinkConfig = NR_DMRS_UplinkConfig;
|
dmrs.NR_DMRS_UplinkConfig = NR_DMRS_UplinkConfig;
|
||||||
|
return dmrs;
|
||||||
}
|
}
|
||||||
|
|
||||||
#define BLER_UPDATE_FRAME 10
|
#define BLER_UPDATE_FRAME 10
|
||||||
|
|||||||
@@ -53,28 +53,28 @@ const int get_ul_tda(const gNB_MAC_INST *nrmac, const NR_ServingCellConfigCommon
|
|||||||
return 0; // if FDD or not mixed slot in TDD, for now use default TDA (TODO handle CSI-RS slots)
|
return 0; // if FDD or not mixed slot in TDD, for now use default TDA (TODO handle CSI-RS slots)
|
||||||
}
|
}
|
||||||
|
|
||||||
int compute_bw_factor(int mu, int rb) {
|
int compute_ph_factor(int mu,
|
||||||
// 38.213 7.1.1
|
int tbs_bits,
|
||||||
return (10 * log10(rb << mu));
|
int rb,
|
||||||
}
|
int n_layers,
|
||||||
|
int n_symbols,
|
||||||
int compute_delta_tf(int tbs_bits,
|
int n_dmrs,
|
||||||
int rb,
|
long *deltaMCS) {
|
||||||
int n_layers,
|
|
||||||
int n_symbols,
|
|
||||||
int n_dmrs,
|
|
||||||
long *deltaMCS) {
|
|
||||||
|
|
||||||
// 38.213 7.1.1
|
// 38.213 7.1.1
|
||||||
// if the PUSCH transmission is over more than one layer delta_tf = 0
|
// if the PUSCH transmission is over more than one layer delta_tf = 0
|
||||||
if(deltaMCS == NULL || n_layers>1)
|
int delta_tf = 0;
|
||||||
return 0;
|
if(deltaMCS != NULL && n_layers == 1) {
|
||||||
|
const int n_re = (NR_NB_SC_PER_RB * n_symbols - n_dmrs) * rb;
|
||||||
|
const int BPRE = tbs_bits/n_re; //TODO change for PUSCH with CSI
|
||||||
|
const float f = pow(2, (float) BPRE * 1.25);
|
||||||
|
const float beta = 1.0f; //TODO change for PUSCH with CSI
|
||||||
|
delta_tf = (10 * log10((f - 1) * beta));
|
||||||
|
}
|
||||||
|
|
||||||
const int n_re = (NR_NB_SC_PER_RB * n_symbols - n_dmrs) * rb;
|
const int bw_factor = 10 * log10(rb << mu);
|
||||||
const int BPRE = tbs_bits/n_re; //TODO change for PUSCH with CSI
|
|
||||||
const float f = pow(2, (float) BPRE * 1.25);
|
return (delta_tf + bw_factor);
|
||||||
const float beta = 1.0f; //TODO change for PUSCH with CSI
|
|
||||||
return(10 * log10((f - 1) * beta));
|
|
||||||
}
|
}
|
||||||
|
|
||||||
// For both UL-SCH except:
|
// For both UL-SCH except:
|
||||||
@@ -244,13 +244,13 @@ int nr_process_mac_pdu(instance_t module_idP,
|
|||||||
// in sched_ctrl we set normalized PH wrt MCS and PRBs
|
// in sched_ctrl we set normalized PH wrt MCS and PRBs
|
||||||
long *deltaMCS = ul_bwp->pusch_Config ? ul_bwp->pusch_Config->pusch_PowerControl->deltaMCS : NULL;
|
long *deltaMCS = ul_bwp->pusch_Config ? ul_bwp->pusch_Config->pusch_PowerControl->deltaMCS : NULL;
|
||||||
sched_ctrl->ph = PH +
|
sched_ctrl->ph = PH +
|
||||||
compute_bw_factor(sched_pusch->mu, sched_pusch->rbSize) +
|
compute_ph_factor(sched_pusch->mu,
|
||||||
compute_delta_tf(sched_pusch->tb_size<<3,
|
sched_pusch->tb_size<<3,
|
||||||
sched_pusch->rbSize,
|
sched_pusch->rbSize,
|
||||||
sched_pusch->nrOfLayers,
|
sched_pusch->nrOfLayers,
|
||||||
sched_pusch->tda_info.nrOfSymbols, //n_symbols
|
sched_pusch->tda_info.nrOfSymbols, //n_symbols
|
||||||
sched_pusch->dmrs_info.num_dmrs_symb*sched_pusch->dmrs_info.N_PRB_DMRS, //n_dmrs
|
sched_pusch->dmrs_info.num_dmrs_symb*sched_pusch->dmrs_info.N_PRB_DMRS, //n_dmrs
|
||||||
deltaMCS);
|
deltaMCS);
|
||||||
/* 38.133 Table10.1.18.1-1 */
|
/* 38.133 Table10.1.18.1-1 */
|
||||||
sched_ctrl->pcmax = PCMAX - 29;
|
sched_ctrl->pcmax = PCMAX - 29;
|
||||||
LOG_D(NR_MAC, "SINGLE ENTRY PHR R1 %d PH %d (%d dB) R2 %d PCMAX %d (%d dBm)\n",
|
LOG_D(NR_MAC, "SINGLE ENTRY PHR R1 %d PH %d (%d dB) R2 %d PCMAX %d (%d dBm)\n",
|
||||||
@@ -260,6 +260,7 @@ int nr_process_mac_pdu(instance_t module_idP,
|
|||||||
case UL_SCH_LCID_MULTI_ENTRY_PHR_1_OCT:
|
case UL_SCH_LCID_MULTI_ENTRY_PHR_1_OCT:
|
||||||
//38.321 section 6.1.3.9
|
//38.321 section 6.1.3.9
|
||||||
// varialbe length
|
// varialbe length
|
||||||
|
AssertFatal(1==0,"Multi entry PHR not supported\n");
|
||||||
if (!get_mac_len(pduP, pdu_len, &mac_len, &mac_subheader_len))
|
if (!get_mac_len(pduP, pdu_len, &mac_len, &mac_subheader_len))
|
||||||
return 0;
|
return 0;
|
||||||
/* Extract MULTI ENTRY PHR elements from single octet bitmap for PHR calculation */
|
/* Extract MULTI ENTRY PHR elements from single octet bitmap for PHR calculation */
|
||||||
@@ -268,6 +269,7 @@ int nr_process_mac_pdu(instance_t module_idP,
|
|||||||
case UL_SCH_LCID_MULTI_ENTRY_PHR_4_OCT:
|
case UL_SCH_LCID_MULTI_ENTRY_PHR_4_OCT:
|
||||||
//38.321 section 6.1.3.9
|
//38.321 section 6.1.3.9
|
||||||
// varialbe length
|
// varialbe length
|
||||||
|
AssertFatal(1==0,"Multi entry PHR not supported\n");
|
||||||
if (!get_mac_len(pduP, pdu_len, &mac_len, &mac_subheader_len))
|
if (!get_mac_len(pduP, pdu_len, &mac_len, &mac_subheader_len))
|
||||||
return 0;
|
return 0;
|
||||||
/* Extract MULTI ENTRY PHR elements from four octets bitmap for PHR calculation */
|
/* Extract MULTI ENTRY PHR elements from four octets bitmap for PHR calculation */
|
||||||
@@ -918,35 +920,35 @@ void nr_ue_max_mcs_min_rb(int mu, int ph_limit, NR_sched_pusch_t *sched_pusch, N
|
|||||||
update_ul_ue_R_Qm(*mcs, ul_bwp->mcs_table, ul_bwp->pusch_Config, &R, &Qm);
|
update_ul_ue_R_Qm(*mcs, ul_bwp->mcs_table, ul_bwp->pusch_Config, &R, &Qm);
|
||||||
|
|
||||||
long *deltaMCS = ul_bwp->pusch_Config ? ul_bwp->pusch_Config->pusch_PowerControl->deltaMCS : NULL;
|
long *deltaMCS = ul_bwp->pusch_Config ? ul_bwp->pusch_Config->pusch_PowerControl->deltaMCS : NULL;
|
||||||
int tx_power = compute_bw_factor(mu, *Rb) +
|
int tx_power = compute_ph_factor(mu,
|
||||||
compute_delta_tf(tbs_bits,
|
tbs_bits,
|
||||||
*Rb,
|
*Rb,
|
||||||
sched_pusch->nrOfLayers,
|
sched_pusch->nrOfLayers,
|
||||||
sched_pusch->tda_info.nrOfSymbols,
|
sched_pusch->tda_info.nrOfSymbols,
|
||||||
sched_pusch->dmrs_info.N_PRB_DMRS*sched_pusch->dmrs_info.num_dmrs_symb,
|
sched_pusch->dmrs_info.N_PRB_DMRS*sched_pusch->dmrs_info.num_dmrs_symb,
|
||||||
deltaMCS);
|
deltaMCS);
|
||||||
|
|
||||||
while (ph_limit < tx_power && *Rb >= minRb) {
|
while (ph_limit < tx_power && *Rb >= minRb) {
|
||||||
(*Rb)--;
|
(*Rb)--;
|
||||||
tx_power = compute_bw_factor(mu, *Rb) +
|
tx_power = compute_ph_factor(mu,
|
||||||
compute_delta_tf(tbs_bits,
|
tbs_bits,
|
||||||
*Rb,
|
*Rb,
|
||||||
sched_pusch->nrOfLayers,
|
sched_pusch->nrOfLayers,
|
||||||
sched_pusch->tda_info.nrOfSymbols,
|
sched_pusch->tda_info.nrOfSymbols,
|
||||||
sched_pusch->dmrs_info.N_PRB_DMRS*sched_pusch->dmrs_info.num_dmrs_symb,
|
sched_pusch->dmrs_info.N_PRB_DMRS*sched_pusch->dmrs_info.num_dmrs_symb,
|
||||||
deltaMCS);
|
deltaMCS);
|
||||||
}
|
}
|
||||||
|
|
||||||
while (ph_limit < tx_power && *mcs > 6) {
|
while (ph_limit < tx_power && *mcs > 6) {
|
||||||
(*mcs)--;
|
(*mcs)--;
|
||||||
update_ul_ue_R_Qm(*mcs, ul_bwp->mcs_table, ul_bwp->pusch_Config, &R, &Qm);
|
update_ul_ue_R_Qm(*mcs, ul_bwp->mcs_table, ul_bwp->pusch_Config, &R, &Qm);
|
||||||
tx_power = compute_bw_factor(mu, *Rb) +
|
tx_power = compute_ph_factor(mu,
|
||||||
compute_delta_tf(tbs_bits,
|
tbs_bits,
|
||||||
*Rb,
|
*Rb,
|
||||||
sched_pusch->nrOfLayers,
|
sched_pusch->nrOfLayers,
|
||||||
sched_pusch->tda_info.nrOfSymbols,
|
sched_pusch->tda_info.nrOfSymbols,
|
||||||
sched_pusch->dmrs_info.N_PRB_DMRS*sched_pusch->dmrs_info.num_dmrs_symb,
|
sched_pusch->dmrs_info.N_PRB_DMRS*sched_pusch->dmrs_info.num_dmrs_symb,
|
||||||
deltaMCS);
|
deltaMCS);
|
||||||
}
|
}
|
||||||
|
|
||||||
if (ph_limit < tx_power)
|
if (ph_limit < tx_power)
|
||||||
@@ -988,14 +990,11 @@ static bool allocate_ul_retransmission(gNB_MAC_INST *nrmac,
|
|||||||
LOG_D(NR_MAC, "%s(): retransmission keeping TDA %d and TBS %d\n", __func__, tda, retInfo->tb_size);
|
LOG_D(NR_MAC, "%s(): retransmission keeping TDA %d and TBS %d\n", __func__, tda, retInfo->tb_size);
|
||||||
} else {
|
} else {
|
||||||
|
|
||||||
NR_pusch_tda_info_t tda_info;
|
NR_tda_info_t tda_info = nr_get_pusch_tda_info(&UE->current_UL_BWP, tda);
|
||||||
nr_get_pusch_tda_info(&UE->current_UL_BWP, tda, &tda_info);
|
NR_pusch_dmrs_t dmrs_info = get_ul_dmrs_params(scc,
|
||||||
NR_pusch_dmrs_t dmrs_info;
|
&UE->current_UL_BWP,
|
||||||
set_ul_dmrs_params(&dmrs_info,
|
&tda_info,
|
||||||
scc,
|
nrOfLayers);
|
||||||
&UE->current_UL_BWP,
|
|
||||||
&tda_info,
|
|
||||||
nrOfLayers);
|
|
||||||
/* the retransmission will use a different time domain allocation, check
|
/* the retransmission will use a different time domain allocation, check
|
||||||
* that we have enough resources */
|
* that we have enough resources */
|
||||||
const uint16_t slbitmap = SL_to_bitmap(tda_info.startSymbolIndex, tda_info.nrOfSymbols);
|
const uint16_t slbitmap = SL_to_bitmap(tda_info.startSymbolIndex, tda_info.nrOfSymbols);
|
||||||
@@ -1225,18 +1224,15 @@ void pf_ul(module_id_t module_id,
|
|||||||
|
|
||||||
sched_pusch->nrOfLayers = 1;
|
sched_pusch->nrOfLayers = 1;
|
||||||
sched_pusch->time_domain_allocation = get_ul_tda(nrmac, scc, sched_pusch->slot);
|
sched_pusch->time_domain_allocation = get_ul_tda(nrmac, scc, sched_pusch->slot);
|
||||||
NR_pusch_tda_info_t *tda_info = &sched_pusch->tda_info;
|
sched_pusch->tda_info = nr_get_pusch_tda_info(current_BWP, sched_pusch->time_domain_allocation);
|
||||||
nr_get_pusch_tda_info(current_BWP, sched_pusch->time_domain_allocation, tda_info);
|
sched_pusch->dmrs_info = get_ul_dmrs_params(scc,
|
||||||
NR_pusch_dmrs_t *dmrs = &sched_pusch->dmrs_info;
|
current_BWP,
|
||||||
set_ul_dmrs_params(dmrs,
|
&sched_pusch->tda_info,
|
||||||
scc,
|
sched_pusch->nrOfLayers);
|
||||||
current_BWP,
|
|
||||||
tda_info,
|
|
||||||
sched_pusch->nrOfLayers);
|
|
||||||
|
|
||||||
LOG_D(NR_MAC,"Looking for min_rb %d RBs, starting at %d num_dmrs_cdm_grps_no_data %d\n",
|
LOG_D(NR_MAC,"Looking for min_rb %d RBs, starting at %d num_dmrs_cdm_grps_no_data %d\n",
|
||||||
min_rb, rbStart, dmrs->num_dmrs_cdm_grps_no_data);
|
min_rb, rbStart, sched_pusch->dmrs_info.num_dmrs_cdm_grps_no_data);
|
||||||
const uint16_t slbitmap = SL_to_bitmap(tda_info->startSymbolIndex, tda_info->nrOfSymbols);
|
const uint16_t slbitmap = SL_to_bitmap(sched_pusch->tda_info.startSymbolIndex, sched_pusch->tda_info.nrOfSymbols);
|
||||||
while (rbStart < bwpSize && (rballoc_mask[rbStart] & slbitmap) != slbitmap)
|
while (rbStart < bwpSize && (rballoc_mask[rbStart] & slbitmap) != slbitmap)
|
||||||
rbStart++;
|
rbStart++;
|
||||||
if (rbStart + min_rb >= bwpSize) {
|
if (rbStart + min_rb >= bwpSize) {
|
||||||
@@ -1260,8 +1256,8 @@ void pf_ul(module_id_t module_id,
|
|||||||
sched_pusch->tb_size = nr_compute_tbs(sched_pusch->Qm,
|
sched_pusch->tb_size = nr_compute_tbs(sched_pusch->Qm,
|
||||||
sched_pusch->R,
|
sched_pusch->R,
|
||||||
sched_pusch->rbSize,
|
sched_pusch->rbSize,
|
||||||
tda_info->nrOfSymbols,
|
sched_pusch->tda_info.nrOfSymbols,
|
||||||
dmrs->N_PRB_DMRS * dmrs->num_dmrs_symb,
|
sched_pusch->dmrs_info.N_PRB_DMRS * sched_pusch->dmrs_info.num_dmrs_symb,
|
||||||
0, // nb_rb_oh
|
0, // nb_rb_oh
|
||||||
0,
|
0,
|
||||||
sched_pusch->nrOfLayers)
|
sched_pusch->nrOfLayers)
|
||||||
@@ -1327,19 +1323,16 @@ void pf_ul(module_id_t module_id,
|
|||||||
|
|
||||||
sched_pusch->nrOfLayers = 1;
|
sched_pusch->nrOfLayers = 1;
|
||||||
sched_pusch->time_domain_allocation = get_ul_tda(nrmac, scc, sched_pusch->slot);
|
sched_pusch->time_domain_allocation = get_ul_tda(nrmac, scc, sched_pusch->slot);
|
||||||
NR_pusch_tda_info_t *tda_info = &sched_pusch->tda_info;
|
sched_pusch->tda_info = nr_get_pusch_tda_info(current_BWP, sched_pusch->time_domain_allocation);
|
||||||
nr_get_pusch_tda_info(current_BWP, sched_pusch->time_domain_allocation, tda_info);
|
sched_pusch->dmrs_info = get_ul_dmrs_params(scc,
|
||||||
NR_pusch_dmrs_t *dmrs = &sched_pusch->dmrs_info;
|
current_BWP,
|
||||||
set_ul_dmrs_params(dmrs,
|
&sched_pusch->tda_info,
|
||||||
scc,
|
sched_pusch->nrOfLayers);
|
||||||
current_BWP,
|
|
||||||
tda_info,
|
|
||||||
sched_pusch->nrOfLayers);
|
|
||||||
|
|
||||||
update_ul_ue_R_Qm(sched_pusch->mcs, current_BWP->mcs_table, current_BWP->pusch_Config, &sched_pusch->R, &sched_pusch->Qm);
|
update_ul_ue_R_Qm(sched_pusch->mcs, current_BWP->mcs_table, current_BWP->pusch_Config, &sched_pusch->R, &sched_pusch->Qm);
|
||||||
|
|
||||||
int rbStart = 0;
|
int rbStart = 0;
|
||||||
const uint16_t slbitmap = SL_to_bitmap(tda_info->startSymbolIndex, tda_info->nrOfSymbols);
|
const uint16_t slbitmap = SL_to_bitmap(sched_pusch->tda_info.startSymbolIndex, sched_pusch->tda_info.nrOfSymbols);
|
||||||
while (rbStart < bwpSize && (rballoc_mask[rbStart] & slbitmap) != slbitmap)
|
while (rbStart < bwpSize && (rballoc_mask[rbStart] & slbitmap) != slbitmap)
|
||||||
rbStart++;
|
rbStart++;
|
||||||
sched_pusch->rbStart = rbStart;
|
sched_pusch->rbStart = rbStart;
|
||||||
@@ -1372,8 +1365,8 @@ void pf_ul(module_id_t module_id,
|
|||||||
nr_find_nb_rb(sched_pusch->Qm,
|
nr_find_nb_rb(sched_pusch->Qm,
|
||||||
sched_pusch->R,
|
sched_pusch->R,
|
||||||
1, // layers
|
1, // layers
|
||||||
tda_info->nrOfSymbols,
|
sched_pusch->tda_info.nrOfSymbols,
|
||||||
dmrs->N_PRB_DMRS * dmrs->num_dmrs_symb,
|
sched_pusch->dmrs_info.N_PRB_DMRS * sched_pusch->dmrs_info.num_dmrs_symb,
|
||||||
B,
|
B,
|
||||||
min_rbSize,
|
min_rbSize,
|
||||||
max_rbSize,
|
max_rbSize,
|
||||||
@@ -1383,7 +1376,8 @@ void pf_ul(module_id_t module_id,
|
|||||||
sched_pusch->rbSize = rbSize;
|
sched_pusch->rbSize = rbSize;
|
||||||
sched_pusch->tb_size = TBS;
|
sched_pusch->tb_size = TBS;
|
||||||
LOG_D(NR_MAC,"rbSize %d (max_rbSize %d), TBS %d, est buf %d, sched_ul %d, B %d, CCE %d, num_dmrs_symb %d, N_PRB_DMRS %d\n",
|
LOG_D(NR_MAC,"rbSize %d (max_rbSize %d), TBS %d, est buf %d, sched_ul %d, B %d, CCE %d, num_dmrs_symb %d, N_PRB_DMRS %d\n",
|
||||||
rbSize, max_rbSize,sched_pusch->tb_size, sched_ctrl->estimated_ul_buffer, sched_ctrl->sched_ul_bytes, B,sched_ctrl->cce_index,dmrs->num_dmrs_symb,dmrs->N_PRB_DMRS);
|
rbSize, max_rbSize,sched_pusch->tb_size, sched_ctrl->estimated_ul_buffer, sched_ctrl->sched_ul_bytes, B,
|
||||||
|
sched_ctrl->cce_index,sched_pusch->dmrs_info.num_dmrs_symb,sched_pusch->dmrs_info.N_PRB_DMRS);
|
||||||
|
|
||||||
/* Mark the corresponding RBs as used */
|
/* Mark the corresponding RBs as used */
|
||||||
|
|
||||||
|
|||||||
@@ -88,7 +88,7 @@ uint32_t schedule_control_sib1(module_id_t module_id,
|
|||||||
NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config,
|
NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config,
|
||||||
int time_domain_allocation,
|
int time_domain_allocation,
|
||||||
NR_pdsch_dmrs_t *dmrs_parms,
|
NR_pdsch_dmrs_t *dmrs_parms,
|
||||||
NR_pdsch_tda_info_t *tda_info,
|
NR_tda_info_t *tda_info,
|
||||||
uint8_t candidate_idx,
|
uint8_t candidate_idx,
|
||||||
uint16_t num_total_bytes);
|
uint16_t num_total_bytes);
|
||||||
|
|
||||||
@@ -324,19 +324,16 @@ long get_K2(NR_PUSCH_TimeDomainResourceAllocationList_t *tdaList,
|
|||||||
int time_domain_assignment,
|
int time_domain_assignment,
|
||||||
int mu);
|
int mu);
|
||||||
|
|
||||||
void nr_get_pdsch_tda_info(const NR_UE_DL_BWP_t *dl_bwp,
|
NR_tda_info_t nr_get_pdsch_tda_info(const NR_UE_DL_BWP_t *dl_bwp,
|
||||||
int tda,
|
const int tda);
|
||||||
NR_pdsch_tda_info_t *tda_info);
|
|
||||||
|
|
||||||
void nr_get_pusch_tda_info(const NR_UE_UL_BWP_t *ul_bwp,
|
NR_tda_info_t nr_get_pusch_tda_info(const NR_UE_UL_BWP_t *ul_bwp,
|
||||||
int tda,
|
const int tda);
|
||||||
NR_pusch_tda_info_t *tda_info);
|
|
||||||
|
|
||||||
void set_ul_dmrs_params(NR_pusch_dmrs_t *dmrs,
|
NR_pusch_dmrs_t get_ul_dmrs_params(const NR_ServingCellConfigCommon_t *scc,
|
||||||
const NR_ServingCellConfigCommon_t *scc,
|
const NR_UE_UL_BWP_t *ul_bwp,
|
||||||
NR_UE_UL_BWP_t *ul_bwp,
|
const NR_tda_info_t *tda_info,
|
||||||
NR_pusch_tda_info_t *tda_info,
|
const int Layers);
|
||||||
int Layers);
|
|
||||||
|
|
||||||
uint8_t nr_get_tpc(int target, uint8_t cqi, int incr);
|
uint8_t nr_get_tpc(int target, uint8_t cqi, int incr);
|
||||||
|
|
||||||
@@ -460,20 +457,18 @@ int16_t ssb_index_from_prach(module_id_t module_idP,
|
|||||||
|
|
||||||
void find_SSB_and_RO_available(module_id_t module_idP);
|
void find_SSB_and_RO_available(module_id_t module_idP);
|
||||||
|
|
||||||
void set_dl_dmrs_params(NR_pdsch_dmrs_t *dmrs,
|
NR_pdsch_dmrs_t get_dl_dmrs_params(const NR_ServingCellConfigCommon_t *scc,
|
||||||
const NR_ServingCellConfigCommon_t *scc,
|
const NR_UE_DL_BWP_t *BWP,
|
||||||
NR_UE_DL_BWP_t *BWP,
|
const NR_tda_info_t *tda_info,
|
||||||
NR_pdsch_tda_info_t *tda_info,
|
const int Layers);
|
||||||
int Layers);
|
|
||||||
|
|
||||||
uint16_t set_pm_index(NR_UE_info_t *UE,
|
uint16_t get_pm_index(const NR_UE_info_t *UE,
|
||||||
NR_UE_sched_ctrl_t *sched_ctrl,
|
|
||||||
int layers,
|
int layers,
|
||||||
int xp_pdsch_antenna_ports);
|
int xp_pdsch_antenna_ports);
|
||||||
|
|
||||||
uint8_t get_mcs_from_cqi(int mcs_table, int cqi_table, int cqi_idx);
|
uint8_t get_mcs_from_cqi(int mcs_table, int cqi_table, int cqi_idx);
|
||||||
|
|
||||||
uint8_t get_dl_nrOfLayers(NR_UE_sched_ctrl_t *sched_ctrl, nr_dci_format_t dci_format);
|
uint8_t get_dl_nrOfLayers(const NR_UE_sched_ctrl_t *sched_ctrl, const nr_dci_format_t dci_format);
|
||||||
|
|
||||||
const int get_dl_tda(const gNB_MAC_INST *nrmac, const NR_ServingCellConfigCommon_t *scc, int slot);
|
const int get_dl_tda(const gNB_MAC_INST *nrmac, const NR_ServingCellConfigCommon_t *scc, int slot);
|
||||||
const int get_ul_tda(const gNB_MAC_INST *nrmac, const NR_ServingCellConfigCommon_t *scc, int slot);
|
const int get_ul_tda(const gNB_MAC_INST *nrmac, const NR_ServingCellConfigCommon_t *scc, int slot);
|
||||||
|
|||||||
@@ -373,11 +373,11 @@ typedef struct NR_sched_pucch {
|
|||||||
int start_symb;
|
int start_symb;
|
||||||
} NR_sched_pucch_t;
|
} NR_sched_pucch_t;
|
||||||
|
|
||||||
typedef struct NR_pusch_tda_info {
|
typedef struct NR_tda_info {
|
||||||
int mapping_type;
|
mappingType_t mapping_type;
|
||||||
int startSymbolIndex;
|
int startSymbolIndex;
|
||||||
int nrOfSymbols;
|
int nrOfSymbols;
|
||||||
} NR_pusch_tda_info_t;
|
} NR_tda_info_t;
|
||||||
|
|
||||||
typedef struct NR_pusch_dmrs {
|
typedef struct NR_pusch_dmrs {
|
||||||
uint8_t N_PRB_DMRS;
|
uint8_t N_PRB_DMRS;
|
||||||
@@ -409,9 +409,10 @@ typedef struct NR_sched_pusch {
|
|||||||
int8_t ul_harq_pid;
|
int8_t ul_harq_pid;
|
||||||
|
|
||||||
uint8_t nrOfLayers;
|
uint8_t nrOfLayers;
|
||||||
|
// time_domain_allocation is the index of a list of tda
|
||||||
int time_domain_allocation;
|
int time_domain_allocation;
|
||||||
|
NR_tda_info_t tda_info;
|
||||||
NR_pusch_dmrs_t dmrs_info;
|
NR_pusch_dmrs_t dmrs_info;
|
||||||
NR_pusch_tda_info_t tda_info;
|
|
||||||
} NR_sched_pusch_t;
|
} NR_sched_pusch_t;
|
||||||
|
|
||||||
typedef struct NR_sched_srs {
|
typedef struct NR_sched_srs {
|
||||||
@@ -420,12 +421,6 @@ typedef struct NR_sched_srs {
|
|||||||
bool srs_scheduled;
|
bool srs_scheduled;
|
||||||
} NR_sched_srs_t;
|
} NR_sched_srs_t;
|
||||||
|
|
||||||
typedef struct NR_pdsch_tda_info {
|
|
||||||
int mapping_type;
|
|
||||||
int startSymbolIndex;
|
|
||||||
int nrOfSymbols;
|
|
||||||
} NR_pdsch_tda_info_t;
|
|
||||||
|
|
||||||
typedef struct NR_pdsch_dmrs {
|
typedef struct NR_pdsch_dmrs {
|
||||||
uint8_t dmrs_ports_id;
|
uint8_t dmrs_ports_id;
|
||||||
uint8_t N_PRB_DMRS;
|
uint8_t N_PRB_DMRS;
|
||||||
@@ -454,12 +449,13 @@ typedef struct NR_sched_pdsch {
|
|||||||
// pucch format allocation
|
// pucch format allocation
|
||||||
uint8_t pucch_allocation;
|
uint8_t pucch_allocation;
|
||||||
|
|
||||||
int time_domain_allocation;
|
|
||||||
|
|
||||||
uint16_t pm_index;
|
uint16_t pm_index;
|
||||||
uint8_t nrOfLayers;
|
uint8_t nrOfLayers;
|
||||||
|
|
||||||
NR_pdsch_dmrs_t dmrs_parms;
|
NR_pdsch_dmrs_t dmrs_parms;
|
||||||
NR_pdsch_tda_info_t tda_info;
|
// time_domain_allocation is the index of a list of tda
|
||||||
|
int time_domain_allocation;
|
||||||
|
NR_tda_info_t tda_info;
|
||||||
} NR_sched_pdsch_t;
|
} NR_sched_pdsch_t;
|
||||||
|
|
||||||
typedef struct NR_UE_harq {
|
typedef struct NR_UE_harq {
|
||||||
|
|||||||
Reference in New Issue
Block a user