diff --git a/cmake_targets/CMakeLists.txt b/cmake_targets/CMakeLists.txt index 5ac5053412..15b94a1082 100644 --- a/cmake_targets/CMakeLists.txt +++ b/cmake_targets/CMakeLists.txt @@ -249,6 +249,7 @@ add_boolean_option(UE_AUTOTEST_TRACE False "Activate UE autotest specific logs add_boolean_option(UE_DEBUG_TRACE False "Activate UE debug trace") add_boolean_option(UE_TIMING_TRACE False "Activate UE timing trace") add_boolean_option(DEBUG_CONSOLE False "makes debugging easier, disables stdout/stderr buffering") +add_boolean_option(GES_SUPPORT True "To enable the GES Code") set (OCP_ITTI ${OPENAIR_DIR}/common/utils/ocp_itti) add_library(ITTI diff --git a/openair2/LAYER2/NR_MAC_COMMON/nr_mac.h b/openair2/LAYER2/NR_MAC_COMMON/nr_mac.h index 20b4c85dc6..f29a5af042 100644 --- a/openair2/LAYER2/NR_MAC_COMMON/nr_mac.h +++ b/openair2/LAYER2/NR_MAC_COMMON/nr_mac.h @@ -24,8 +24,8 @@ * \author R. Knopp, K.H. HSU, G. Casati * \date 2019 * \version 0.1 - * \company Eurecom / NTUST / Fraunhofer IIS - * \email: knopp@eurecom.fr, kai-hsiang.hsu@eurecom.fr, guido.casati@iis.fraunhofer.de + * \company Eurecom / NTUST / Fraunhofer IIS + * \email: knopp@eurecom.fr, kai-hsiang.hsu@eurecom.fr, guido.casati@iis.fraunhofer.de * \note * \warning */ @@ -71,72 +71,132 @@ // R: Reserved bit, set to zero. typedef struct { - uint8_t LCID:6; // octet 1 [5:0] - uint8_t F:1; // octet 1 [6] - uint8_t R:1; // octet 1 [7] - uint8_t L:8; // octet 2 [7:0] + uint8_t LCID: 6; // octet 1 [5:0] + uint8_t F: 1; // octet 1 [6] + uint8_t R: 1; // octet 1 [7] + uint8_t L: 8; // octet 2 [7:0] } __attribute__ ((__packed__)) NR_MAC_SUBHEADER_SHORT; typedef struct { - uint8_t LCID:6; // octet 1 [5:0] - uint8_t F:1; // octet 1 [6] - uint8_t R:1; // octet 1 [7] - uint8_t L1:8; // octet 2 [7:0] - uint8_t L2:8; // octet 3 [7:0] + uint8_t LCID: 6; // octet 1 [5:0] + uint8_t F: 1; // octet 1 [6] + uint8_t R: 1; // octet 1 [7] + uint8_t L1: 8; // octet 2 [7:0] + uint8_t L2: 8; // octet 3 [7:0] } __attribute__ ((__packed__)) NR_MAC_SUBHEADER_LONG; typedef struct { - uint8_t LCID:6; // octet 1 [5:0] - uint8_t R:2; // octet 1 [7:6] + uint8_t LCID: 6; // octet 1 [5:0] + uint8_t R: 2; // octet 1 [7:6] } __attribute__ ((__packed__)) NR_MAC_SUBHEADER_FIXED; // BSR MAC CEs // TS 38.321 ch. 6.1.3.1 // Short BSR for a specific logical channel group ID typedef struct { - uint8_t Buffer_size:5; // octet 1 LSB - uint8_t LcgID:3; // octet 1 MSB + uint8_t Buffer_size: 5; // octet 1 LSB + uint8_t LcgID: 3; // octet 1 MSB } __attribute__ ((__packed__)) NR_BSR_SHORT; typedef NR_BSR_SHORT NR_BSR_SHORT_TRUNCATED; // Long BSR for all logical channel group ID typedef struct { - uint8_t Buffer_size7:8; - uint8_t Buffer_size6:8; - uint8_t Buffer_size5:8; - uint8_t Buffer_size4:8; - uint8_t Buffer_size3:8; - uint8_t Buffer_size2:8; - uint8_t Buffer_size1:8; - uint8_t Buffer_size0:8; - uint8_t LcgID0:1; - uint8_t LcgID1:1; - uint8_t LcgID2:1; - uint8_t LcgID3:1; - uint8_t LcgID4:1; - uint8_t LcgID5:1; - uint8_t LcgID6:1; - uint8_t LcgID7:1; + uint8_t Buffer_size7: 8; + uint8_t Buffer_size6: 8; + uint8_t Buffer_size5: 8; + uint8_t Buffer_size4: 8; + uint8_t Buffer_size3: 8; + uint8_t Buffer_size2: 8; + uint8_t Buffer_size1: 8; + uint8_t Buffer_size0: 8; + uint8_t LcgID0: 1; + uint8_t LcgID1: 1; + uint8_t LcgID2: 1; + uint8_t LcgID3: 1; + uint8_t LcgID4: 1; + uint8_t LcgID5: 1; + uint8_t LcgID6: 1; + uint8_t LcgID7: 1; } __attribute__ ((__packed__)) NR_BSR_LONG; typedef NR_BSR_LONG NR_BSR_LONG_TRUNCATED; // 38.321 ch. 6.1.3.4 typedef struct { - uint8_t TA_COMMAND:6; // octet 1 [5:0] - uint8_t TAGID:2; // octet 1 [7:6] + uint8_t TA_COMMAND: 6; // octet 1 [5:0] + uint8_t TAGID: 2; // octet 1 [7:6] } __attribute__ ((__packed__)) NR_MAC_CE_TA; // single Entry PHR MAC CE // TS 38.321 ch. 6.1.3.8 typedef struct { - uint8_t PH:6; - uint8_t R1:2; - uint8_t PCMAX:6; - uint8_t R2:6; + uint8_t PH: 6; + uint8_t R1: 2; + uint8_t PCMAX: 6; + uint8_t R2: 6; } __attribute__ ((__packed__)) NR_SINGLE_ENTRY_PHR_MAC_CE; +#ifdef GES_SUPPORT + +// SP ZP CSI-RS Resource Set Activation/Deactivation MAC CE +// 38.321 ch. 6.1.3.19 +typedef struct { + uint8_t BWPID: 2; // octet 1 [1:0] + uint8_t CELLID: 5; // octet 1 [6:2] + uint8_t A_D: 1; // octet 1 [7] + uint8_t CSIRS_RSC_ID: 4; // octet 2 [3:0] + uint8_t R: 4 // octet 2 [7:4] +} __attribute__ ((__packed__)) NR_MAC_CE_SP_ZP_CSI_RS_RES_SET; + +//TS 38.321 Sec 6.1.3.15, TCI State indicaton for UE-Specific PDCCH MAC CE +typedef struct { + uint8_t CoresetId1: 3; //Octect 1 [2:0] + uint8_t ServingCellId: 5; //Octect 1 [7:3] + uint8_t TciStateId: 7; //Octect 2 [6:0] + uint8_t CoresetId2: 1; //Octect 2 [7] +} __attribute__ ((__packed__)) NR_TCI_PDCCH; + +//TS 38.321 Sec 6.1.3.14, TCI State activation/deactivation for UE Specific PDSCH MAC CE +typedef struct { + uint8_t BWP_Id: 2; //Octect 1 [1:0] + uint8_t ServingCellId: 5; //Octect 1 [6:2] + uint8_t R: 1; //Octect 1 [7] + uint8_t T[]; //Octects 2 to MAX TCI States/8 +} __attribute__ ((__packed__)) NR_TCI_PDSCH_APERIODIC_CSI; + +//TS 6.1.3.16, SP CSI reporting on PUCCH Activation/Deactivation MAC CE +typedef struct { + uint8_t BWP_Id: 2; //Octect 1 [1:0] + uint8_t ServingCellId: 5; //Octect 1 [6:2] + uint8_t R1: 1; //Octect 1 [7] + uint8_t S0: 1; //Octect 2 [0] + uint8_t S1: 1; //Octect 2 [1] + uint8_t S2: 1; //Octect 2 [2] + uint8_t S3: 1; //Octect 2 [3] + uint8_t R2: 4; //Octect 2 [7:4] +} __attribute__ ((__packed__)) NR_PUCCH_CSI_REPORTING; + + +//TS 38.321 sec 6.1.3.12 +//SP CSI-RS / CSI-IM Resource Set Activation/Deactivation MAC CE +typedef struct { + uint8_t BWP_ID: 2; + uint8_t SCID: 5; + uint8_t A_D: 1; + uint8_t SP_CSI_RSID: 6; + uint8_t IM: 1; + uint8_t R1: 1; + uint8_t SP_CSI_IMID: 6; + uint8_t R2: 2; + struct TCI_S { + uint8_t TCI_STATE_ID: 6; + uint8_t R: 2; + } __attribute__ ((__packed__)) TCI_STATE; +} __attribute__ ((__packed__)) CSI_RS_CSI_IM_ACT_DEACT_MAC_CE; + +#endif + //* RAR MAC subheader // TS 38.321 ch. 6.1.5, 6.2.2 *// // - E: The Extension field is a flag indicating if the MAC subPDU including this MAC subheader is the last MAC subPDU or not in the MAC PDU // - T: The Type field is a flag indicating whether the MAC subheader contains a Random Access Preamble ID or a Backoff Indicator (0, BI) (1, RAPID) @@ -146,30 +206,30 @@ typedef struct { /*!\brief RAR MAC subheader with RAPID */ typedef struct { - uint8_t RAPID:6; - uint8_t T:1; - uint8_t E:1; + uint8_t RAPID: 6; + uint8_t T: 1; + uint8_t E: 1; } __attribute__ ((__packed__)) NR_RA_HEADER_RAPID; /*!\brief RAR MAC subheader with Backoff Indicator */ typedef struct { - uint8_t BI:4; - uint8_t R:2; - uint8_t T:1; - uint8_t E:1; + uint8_t BI: 4; + uint8_t R: 2; + uint8_t T: 1; + uint8_t E: 1; } __attribute__ ((__packed__)) NR_RA_HEADER_BI; // TS 38.321 ch. 6.2.3 typedef struct { - uint8_t TA1:7; // octet 1 [6:0] - uint8_t R:1; // octet 1 [7] - uint8_t UL_GRANT_1:3; // octet 2 [2:0] - uint8_t TA2:5; // octet 2 [7:3] - uint8_t UL_GRANT_2:8; // octet 3 [7:0] - uint8_t UL_GRANT_3:8; // octet 4 [7:0] - uint8_t UL_GRANT_4:8; // octet 5 [7:0] - uint8_t TCRNTI_1:8; // octet 6 [7:0] - uint8_t TCRNTI_2:8; // octet 7 [7:0] + uint8_t TA1: 7; // octet 1 [6:0] + uint8_t R: 1; // octet 1 [7] + uint8_t UL_GRANT_1: 3; // octet 2 [2:0] + uint8_t TA2: 5; // octet 2 [7:3] + uint8_t UL_GRANT_2: 8; // octet 3 [7:0] + uint8_t UL_GRANT_3: 8; // octet 4 [7:0] + uint8_t UL_GRANT_4: 8; // octet 5 [7:0] + uint8_t TCRNTI_1: 8; // octet 6 [7:0] + uint8_t TCRNTI_2: 8; // octet 7 [7:0] } __attribute__ ((__packed__)) NR_MAC_RAR; // 38.321 ch6.2.1, 38.331 @@ -185,7 +245,7 @@ typedef struct { #define DL_SCH_LCID_TCI_STATE_IND_UE_SPEC_PDCCH 0x34 #define DL_SCH_LCID_TCI_STATE_ACT_UE_SPEC_PDSCH 0x35 #define DL_SCH_LCID_APERIODIC_CSI_TRI_STATE_SUBSEL 0x36 -#define DL_SCH_LCID_SP_CSI_RS_CSI_IM_RES_SET_ACT 0X37 +#define DL_SCH_LCID_SP_CSI_RS_CSI_IM_RES_SET_ACT 0X37 #define DL_SCH_LCID_DUPLICATION_ACT 0X38 #define DL_SCH_LCID_SCell_ACT_4_OCT 0X39 #define DL_SCH_LCID_SCell_ACT_1_OCT 0X3A diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c index 7777e307fb..e086210e4f 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c @@ -47,6 +47,12 @@ //////////////////////////////////////////////////////// /////* DLSCH MAC PDU generation (6.1.2 TS 38.321) *///// //////////////////////////////////////////////////////// +#ifdef GES_SUPPORT +#define OCTET 8 +#define HALFWORD 16 +#define WORD 32 +//#define SIZE_OF_POINTER sizeof (void *) +#endif int nr_generate_dlsch_pdu(module_id_t module_idP, unsigned char *sdus_payload, @@ -56,127 +62,302 @@ int nr_generate_dlsch_pdu(module_id_t module_idP, unsigned char *sdu_lcids, unsigned char drx_cmd, unsigned char *ue_cont_res_id, - unsigned short post_padding){ + unsigned short post_padding) { - gNB_MAC_INST *gNB = RC.nrmac[module_idP]; + gNB_MAC_INST *gNB = RC.nrmac[module_idP]; - NR_MAC_SUBHEADER_FIXED *mac_pdu_ptr = (NR_MAC_SUBHEADER_FIXED *) mac_pdu; - unsigned char * dlsch_buffer_ptr = sdus_payload; - uint8_t last_size = 0; - int offset = 0, mac_ce_size, i, timing_advance_cmd, tag_id = 0; - // MAC CEs - uint8_t mac_header_control_elements[16], *ce_ptr; - ce_ptr = &mac_header_control_elements[0]; + NR_MAC_SUBHEADER_FIXED *mac_pdu_ptr = (NR_MAC_SUBHEADER_FIXED *) mac_pdu; + unsigned char * dlsch_buffer_ptr = sdus_payload; + uint8_t last_size = 0; + int offset = 0, mac_ce_size, i, timing_advance_cmd, tag_id = 0; + // MAC CEs + uint8_t mac_header_control_elements[16], *ce_ptr; + ce_ptr = &mac_header_control_elements[0]; +#ifdef GES_SUPPORT + uint16_t UE_id = 0; //TODO need to get as a function parameter or need to invoke api to UE_id using module Id and RNTI + gNB_MAC_INST *gNB_mac = RC.nrmac[module_idP]; + NR_UE_list_t *UE_list = &gNB_mac->UE_list; + NR_UE_sched_ctrl_t *ue_sched_ctl = NULL; + //NR_CellGroupConfig_t *config = UE_list->secondaryCellGroup[UE_id]; + ue_sched_ctl = &(UE_list->UE_sched_ctrl[UE_id]); +#endif - // 1) Compute MAC CE and related subheaders + // 1) Compute MAC CE and related subheaders - // DRX command subheader (MAC CE size 0) - if (drx_cmd != 255) { - mac_pdu_ptr->R = 0; - mac_pdu_ptr->LCID = DL_SCH_LCID_DRX; - //last_size = 1; - mac_pdu_ptr++; - } - - // Timing Advance subheader - /* This was done only when timing_advance_cmd != 31 - // now TA is always send when ta_timer resets regardless of its value - // this is done to avoid issues with the timeAlignmentTimer which is - // supposed to monitor if the UE received TA or not */ - if (gNB->ta_len){ - mac_pdu_ptr->R = 0; - mac_pdu_ptr->LCID = DL_SCH_LCID_TA_COMMAND; - //last_size = 1; - mac_pdu_ptr++; - - // TA MAC CE (1 octet) - timing_advance_cmd = gNB->ta_command; - AssertFatal(timing_advance_cmd < 64,"timing_advance_cmd %d > 63\n", timing_advance_cmd); - ((NR_MAC_CE_TA *) ce_ptr)->TA_COMMAND = timing_advance_cmd; //(timing_advance_cmd+31)&0x3f; - if (gNB->tag->tag_Id != 0){ - tag_id = gNB->tag->tag_Id; - ((NR_MAC_CE_TA *) ce_ptr)->TAGID = tag_id; + // DRX command subheader (MAC CE size 0) + if (drx_cmd != 255) { + mac_pdu_ptr->R = 0; + mac_pdu_ptr->LCID = DL_SCH_LCID_DRX; + //last_size = 1; + mac_pdu_ptr++; } - LOG_D(MAC, "NR MAC CE timing advance command = %d (%d) TAG ID = %d\n", timing_advance_cmd, ((NR_MAC_CE_TA *) ce_ptr)->TA_COMMAND, tag_id); + // Timing Advance subheader + /* This was done only when timing_advance_cmd != 31 + // now TA is always send when ta_timer resets regardless of its value + // this is done to avoid issues with the timeAlignmentTimer which is + // supposed to monitor if the UE received TA or not */ + if (gNB->ta_len) { + mac_pdu_ptr->R = 0; + mac_pdu_ptr->LCID = DL_SCH_LCID_TA_COMMAND; + //last_size = 1; + mac_pdu_ptr++; - mac_ce_size = sizeof(NR_MAC_CE_TA); + // TA MAC CE (1 octet) + timing_advance_cmd = gNB->ta_command; + AssertFatal(timing_advance_cmd < 64, "timing_advance_cmd %d > 63\n", timing_advance_cmd); + ((NR_MAC_CE_TA *) ce_ptr)->TA_COMMAND = timing_advance_cmd; //(timing_advance_cmd+31)&0x3f; + if (gNB->tag->tag_Id != 0) { + tag_id = gNB->tag->tag_Id; + ((NR_MAC_CE_TA *) ce_ptr)->TAGID = tag_id; + } - // Copying bytes for MAC CEs to the mac pdu pointer - memcpy((void *) mac_pdu_ptr, (void *) ce_ptr, mac_ce_size); - ce_ptr += mac_ce_size; - mac_pdu_ptr += (unsigned char) mac_ce_size; - } + LOG_D(MAC, "NR MAC CE timing advance command = %d (%d) TAG ID = %d\n", timing_advance_cmd, ((NR_MAC_CE_TA *) ce_ptr)->TA_COMMAND, tag_id); - // Contention resolution fixed subheader and MAC CE - if (ue_cont_res_id) { - mac_pdu_ptr->R = 0; - mac_pdu_ptr->LCID = DL_SCH_LCID_CON_RES_ID; - mac_pdu_ptr++; - //last_size = 1; + mac_ce_size = sizeof(NR_MAC_CE_TA); - // contention resolution identity MAC ce has a fixed 48 bit size - // this contains the UL CCCH SDU. If UL CCCH SDU is longer than 48 bits, - // it contains the first 48 bits of the UL CCCH SDU - LOG_T(MAC, "[gNB ][RAPROC] Generate contention resolution msg: %x.%x.%x.%x.%x.%x\n", - ue_cont_res_id[0], ue_cont_res_id[1], ue_cont_res_id[2], - ue_cont_res_id[3], ue_cont_res_id[4], ue_cont_res_id[5]); + // Copying bytes for MAC CEs to the mac pdu pointer + memcpy((void *) mac_pdu_ptr, (void *) ce_ptr, mac_ce_size); + ce_ptr += mac_ce_size; + mac_pdu_ptr += (unsigned char) mac_ce_size; + } - // Copying bytes (6 octects) to CEs pointer - mac_ce_size = 6; - memcpy(ce_ptr, ue_cont_res_id, mac_ce_size); - - // Copying bytes for MAC CEs to mac pdu pointer - memcpy((void *) mac_pdu_ptr, (void *) ce_ptr, mac_ce_size); - ce_ptr += mac_ce_size; - mac_pdu_ptr += (unsigned char) mac_ce_size; - } + // Contention resolution fixed subheader and MAC CE + if (ue_cont_res_id) { + mac_pdu_ptr->R = 0; + mac_pdu_ptr->LCID = DL_SCH_LCID_CON_RES_ID; + mac_pdu_ptr++; + //last_size = 1; - // 2) Generation of DLSCH MAC subPDUs including subheaders and MAC SDUs - for (i = 0; i < num_sdus; i++) { - LOG_D(MAC, "[gNB] Generate DLSCH header num sdu %d len sdu %d\n", num_sdus, sdu_lengths[i]); + // contention resolution identity MAC ce has a fixed 48 bit size + // this contains the UL CCCH SDU. If UL CCCH SDU is longer than 48 bits, + // it contains the first 48 bits of the UL CCCH SDU + LOG_T(MAC, "[gNB ][RAPROC] Generate contention resolution msg: %x.%x.%x.%x.%x.%x\n", + ue_cont_res_id[0], ue_cont_res_id[1], ue_cont_res_id[2], + ue_cont_res_id[3], ue_cont_res_id[4], ue_cont_res_id[5]); + + // Copying bytes (6 octects) to CEs pointer + mac_ce_size = 6; + memcpy(ce_ptr, ue_cont_res_id, mac_ce_size); + + // Copying bytes for MAC CEs to mac pdu pointer + memcpy((void *) mac_pdu_ptr, (void *) ce_ptr, mac_ce_size); + ce_ptr += mac_ce_size; + mac_pdu_ptr += (unsigned char) mac_ce_size; + } + +#ifdef GES_SUPPORT + + //TS 38.321 Sec 6.1.3.15 TCI State indication for UE Specific PDCCH MAC CE SubPDU generation + if (ue_sched_ctl->UE_mac_ce_ctrl.pdcch_state_ind.is_scheduled) { + //filling subheader + mac_pdu_ptr->R = 0; + mac_pdu_ptr->LCID = DL_SCH_LCID_TCI_STATE_IND_UE_SPEC_PDCCH; + mac_pdu_ptr++; + //Creating the instance of CE structure + NR_TCI_PDCCH nr_UESpec_TCI_StateInd_PDCCH; + //filling the CE structre + nr_UESpec_TCI_StateInd_PDCCH.CoresetId1 = ((ue_sched_ctl->UE_mac_ce_ctrl.pdcch_state_ind.coresetId) & 0xF) >> 1; //extracting MSB 3 bits from LS nibble + nr_UESpec_TCI_StateInd_PDCCH.ServingCellId = (ue_sched_ctl->UE_mac_ce_ctrl.pdcch_state_ind.servingCellId) & 0x1F; //extracting LSB 5 Bits + nr_UESpec_TCI_StateInd_PDCCH.TciStateId = (ue_sched_ctl->UE_mac_ce_ctrl.pdcch_state_ind.tciStateId) & 0x7F; //extracting LSB 7 bits + nr_UESpec_TCI_StateInd_PDCCH.CoresetId2 = (ue_sched_ctl->UE_mac_ce_ctrl.pdcch_state_ind.coresetId) & 0x1; //extracting LSB 1 bit + LOG_D(MAC, "NR MAC CE TCI state indication for UE Specific PDCCH = %d \n", nr_UESpec_TCI_StateInd_PDCCH.TciStateId); + mac_ce_size = sizeof(NR_TCI_PDCCH); + // Copying bytes for MAC CEs to the mac pdu pointer + memcpy((void *) mac_pdu_ptr, (void *)&nr_UESpec_TCI_StateInd_PDCCH, mac_ce_size); + //incrementing the PDU pointer + mac_pdu_ptr += (unsigned char) mac_ce_size; + } + + //TS 38.321 Sec 6.1.3.16, SP CSI reporting on PUCCH Activation/Deactivation MAC CE + if (ue_sched_ctl->UE_mac_ce_ctrl.SP_CSI_reporting_pucch.is_scheduled) { + //filling the subheader + mac_pdu_ptr->R = 0; + mac_pdu_ptr->LCID = DL_SCH_LCID_SP_CSI_REP_PUCCH_ACT; + mac_pdu_ptr++; + //creating the instance of CE structure + NR_PUCCH_CSI_REPORTING nr_PUCCH_CSI_reportingActDeact; + //filling the CE structure + nr_PUCCH_CSI_reportingActDeact.BWP_Id = (ue_sched_ctl->UE_mac_ce_ctrl.SP_CSI_reporting_pucch.bwpId) & 0x3; //extracting LSB 2 bibs + nr_PUCCH_CSI_reportingActDeact.ServingCellId = (ue_sched_ctl->UE_mac_ce_ctrl.SP_CSI_reporting_pucch.servingCellId) & 0x1F; //extracting LSB 5 bits + nr_PUCCH_CSI_reportingActDeact.S0 = ue_sched_ctl->UE_mac_ce_ctrl.SP_CSI_reporting_pucch.s0tos3_actDeact[0]; + nr_PUCCH_CSI_reportingActDeact.S1 = ue_sched_ctl->UE_mac_ce_ctrl.SP_CSI_reporting_pucch.s0tos3_actDeact[1]; + nr_PUCCH_CSI_reportingActDeact.S2 = ue_sched_ctl->UE_mac_ce_ctrl.SP_CSI_reporting_pucch.s0tos3_actDeact[2]; + nr_PUCCH_CSI_reportingActDeact.S3 = ue_sched_ctl->UE_mac_ce_ctrl.SP_CSI_reporting_pucch.s0tos3_actDeact[3]; + nr_PUCCH_CSI_reportingActDeact.R2 = 0; + mac_ce_size = sizeof(NR_PUCCH_CSI_REPORTING); + // Copying MAC CE data to the mac pdu pointer + memcpy((void *) mac_pdu_ptr, (void *)&nr_PUCCH_CSI_reportingActDeact, mac_ce_size); + //incrementing the PDU pointer + mac_pdu_ptr += (unsigned char) mac_ce_size; + } + + //TS 38.321 Sec 6.1.3.14, TCI State activation/deactivation for UE Specific PDSCH MAC CE + if (ue_sched_ctl->UE_mac_ce_ctrl.pdsch_TCI_States_ActDeact.is_scheduled) { + //Computing the number of octects to be allocated for Flexible array member + //of MAC CE structure + uint8_t num_octects = (ue_sched_ctl->UE_mac_ce_ctrl.pdsch_TCI_States_ActDeact.highestTciStateActivated) / 8 + 1; //Calculating the number of octects for allocating the memory + + //filling the subheader + ((NR_MAC_SUBHEADER_SHORT *) mac_pdu_ptr)->R = 0; + ((NR_MAC_SUBHEADER_SHORT *) mac_pdu_ptr)->F = 0; + ((NR_MAC_SUBHEADER_SHORT *) mac_pdu_ptr)->LCID = DL_SCH_LCID_TCI_STATE_ACT_UE_SPEC_PDSCH; + ((NR_MAC_SUBHEADER_SHORT *) mac_pdu_ptr)->L = sizeof(NR_TCI_PDSCH_APERIODIC_CSI) + num_octects * sizeof(uint8_t); + last_size = 2; + //Incrementing the PDU pointer + mac_pdu_ptr += last_size; + //allocating memory for CE Structure + NR_TCI_PDSCH_APERIODIC_CSI *nr_UESpec_TCI_StateInd_PDSCH = (NR_TCI_PDSCH_APERIODIC_CSI *)malloc(sizeof(NR_TCI_PDSCH_APERIODIC_CSI) + num_octects * sizeof(uint8_t)); + //initializing to zero + memset((void *)nr_UESpec_TCI_StateInd_PDSCH, 0, sizeof(NR_TCI_PDSCH_APERIODIC_CSI) + num_octects * sizeof(uint8_t)); + //filling the CE Structure + nr_UESpec_TCI_StateInd_PDSCH->BWP_Id = (ue_sched_ctl->UE_mac_ce_ctrl.pdsch_TCI_States_ActDeact.bwpId) & 0x3; //extracting LSB 2 Bits + nr_UESpec_TCI_StateInd_PDSCH->ServingCellId = (ue_sched_ctl->UE_mac_ce_ctrl.pdsch_TCI_States_ActDeact.servingCellId) & 0x1F; //extracting LSB 5 bits + for(i = 0; i < (num_octects * 8); i++) { + if(ue_sched_ctl->UE_mac_ce_ctrl.pdsch_TCI_States_ActDeact.tciStateActDeact[i]) + nr_UESpec_TCI_StateInd_PDSCH->T[i / 8] = nr_UESpec_TCI_StateInd_PDSCH->T[i / 8] | (1 << (i % 8)); + } + mac_ce_size = sizeof(NR_TCI_PDSCH_APERIODIC_CSI) + num_octects * sizeof(uint8_t); + //Copying bytes for MAC CEs to the mac pdu pointer + memcpy((void *) mac_pdu_ptr, (void *)nr_UESpec_TCI_StateInd_PDSCH, mac_ce_size); + //incrementing the mac pdu pointer + mac_pdu_ptr += (unsigned char) mac_ce_size; + //freeing the allocated memory + free(nr_UESpec_TCI_StateInd_PDSCH); + } + + //TS38.321 Sec 6.1.3.13 Aperiodic CSI Trigger State Subselection MAC CE + if (ue_sched_ctl->UE_mac_ce_ctrl.aperi_CSI_trigger.is_scheduled) { + //Computing the number of octects to be allocated for Flexible array member + //of MAC CE structure + uint8_t num_octects = (ue_sched_ctl->UE_mac_ce_ctrl.aperi_CSI_trigger.highestTriggerStateSelected) / 8 + 1; //Calculating the number of octects for allocating the memory + + //filling the subheader + ((NR_MAC_SUBHEADER_SHORT *) mac_pdu_ptr)->R = 0; + ((NR_MAC_SUBHEADER_SHORT *) mac_pdu_ptr)->F = 0; + ((NR_MAC_SUBHEADER_SHORT *) mac_pdu_ptr)->LCID = DL_SCH_LCID_APERIODIC_CSI_TRI_STATE_SUBSEL; + ((NR_MAC_SUBHEADER_SHORT *) mac_pdu_ptr)->L = sizeof(NR_TCI_PDSCH_APERIODIC_CSI) + num_octects * sizeof(uint8_t); + last_size = 2; + //Incrementing the PDU pointer + mac_pdu_ptr += last_size; + //allocating memory for CE structure + NR_TCI_PDSCH_APERIODIC_CSI *nr_Aperiodic_CSI_Trigger = (NR_TCI_PDSCH_APERIODIC_CSI *)malloc(sizeof(NR_TCI_PDSCH_APERIODIC_CSI) + num_octects * sizeof(uint8_t)); + //initializing to zero + memset((void *)nr_Aperiodic_CSI_Trigger, 0, sizeof(NR_TCI_PDSCH_APERIODIC_CSI) + num_octects * sizeof(uint8_t)); + //filling the CE Structure + nr_Aperiodic_CSI_Trigger->BWP_Id = (ue_sched_ctl->UE_mac_ce_ctrl.aperi_CSI_trigger.bwpId) & 0x3; //extracting LSB 2 bits + nr_Aperiodic_CSI_Trigger->ServingCellId = (ue_sched_ctl->UE_mac_ce_ctrl.aperi_CSI_trigger.servingCellId) & 0x1F; //extracting LSB 5 bits + nr_Aperiodic_CSI_Trigger->R = 0; + for(i = 0; i < (num_octects * 8); i++) { + if(ue_sched_ctl->UE_mac_ce_ctrl.aperi_CSI_trigger.triggerStateSelection[i]) + nr_Aperiodic_CSI_Trigger->T[i / 8] = nr_Aperiodic_CSI_Trigger->T[i / 8] | (1 << (i % 8)); + } + mac_ce_size = sizeof(NR_TCI_PDSCH_APERIODIC_CSI) + num_octects * sizeof(uint8_t); + // Copying bytes for MAC CEs to the mac pdu pointer + memcpy((void *) mac_pdu_ptr, (void *)nr_Aperiodic_CSI_Trigger, mac_ce_size); + //incrementing the mac pdu pointer + mac_pdu_ptr += (unsigned char) mac_ce_size; + //freeing the allocated memory + free(nr_Aperiodic_CSI_Trigger); + } + + if (ue_sched_ctl->UE_mac_ce_ctrl.sp_zp_csi_rs.is_scheduled) { + ((NR_MAC_SUBHEADER_FIXED *) mac_pdu_ptr)->R = 0; + ((NR_MAC_SUBHEADER_FIXED *) mac_pdu_ptr)->LCID = DL_SCH_LCID_SP_ZP_CSI_RS_RES_SET_ACT; + mac_pdu_ptr++; + ((NR_MAC_CE_SP_ZP_CSI_RS_RES_SET *) mac_pdu_ptr)->A_D = ue_sched_ctl->UE_mac_ce_ctrl.sp_zp_csi_rs.act_deact; + ((NR_MAC_CE_SP_ZP_CSI_RS_RES_SET *) mac_pdu_ptr)->CELLID = ue_sched_ctl->UE_mac_ce_ctrl.sp_zp_csi_rs.serv_cell_id & 0x1F; //5 bits + ((NR_MAC_CE_SP_ZP_CSI_RS_RES_SET *) mac_pdu_ptr)->BWPID = ue_sched_ctl->UE_mac_ce_ctrl.sp_zp_csi_rs.bwpid & 0x3; //2 bits + ((NR_MAC_CE_SP_ZP_CSI_RS_RES_SET *) mac_pdu_ptr)->CSIRS_RSC_ID = ue_sched_ctl->UE_mac_ce_ctrl.sp_zp_csi_rs.rsc_id & 0xF; //4 bits + ((NR_MAC_CE_SP_ZP_CSI_RS_RES_SET *) mac_pdu_ptr)->R = 0; + LOG_D(MAC, "NR MAC CE of ZP CSIRS Serv cell ID = %d BWPID= %d Rsc set ID = %d\n", ue_sched_ctl->UE_mac_ce_ctrl.sp_zp_csi_rs.serv_cell_id, ue_sched_ctl->UE_mac_ce_ctrl.sp_zp_csi_rs.bwpid, ue_sched_ctl->UE_mac_ce_ctrl.sp_zp_csi_rs.rsc_id); + mac_ce_size = sizeof(NR_MAC_CE_SP_ZP_CSI_RS_RES_SET); + mac_pdu_ptr += (unsigned char) mac_ce_size; + } + + if (ue_sched_ctl->UE_mac_ce_ctrl.csi_im.is_scheduled) { + mac_pdu_ptr->R = 0; + mac_pdu_ptr->LCID = DL_SCH_LCID_SP_CSI_RS_CSI_IM_RES_SET_ACT; + mac_pdu_ptr++; + CSI_RS_CSI_IM_ACT_DEACT_MAC_CE csi_rs_im_act_deact_ce; + csi_rs_im_act_deact_ce.A_D = ue_sched_ctl->UE_mac_ce_ctrl.csi_im.act_deact; + csi_rs_im_act_deact_ce.SCID = ue_sched_ctl->UE_mac_ce_ctrl.csi_im.serv_cellid & 0x3F;//gNB_PHY -> ssb_pdu.ssb_pdu_rel15.PhysCellId; + csi_rs_im_act_deact_ce.BWP_ID = ue_sched_ctl->UE_mac_ce_ctrl.csi_im.bwp_id; + csi_rs_im_act_deact_ce.R1 = 0; + csi_rs_im_act_deact_ce.IM = ue_sched_ctl->UE_mac_ce_ctrl.csi_im.im;// IF set CSI IM Rsc id will presesent else CSI IM RSC ID is abscent + csi_rs_im_act_deact_ce.SP_CSI_RSID = ue_sched_ctl->UE_mac_ce_ctrl.csi_im.nzp_csi_rsc_id; + + if ( csi_rs_im_act_deact_ce.IM ) { //is_scheduled if IM is 1 else this field will not present + csi_rs_im_act_deact_ce.R2 = 0; + csi_rs_im_act_deact_ce.SP_CSI_IMID = ue_sched_ctl->UE_mac_ce_ctrl.csi_im.csi_im_rsc_id; + mac_ce_size = sizeof ( csi_rs_im_act_deact_ce ) - sizeof ( csi_rs_im_act_deact_ce.TCI_STATE ); + } else { + mac_ce_size = sizeof ( csi_rs_im_act_deact_ce ) - sizeof ( csi_rs_im_act_deact_ce.TCI_STATE ) - 1; + } + + memcpy ((void *) mac_pdu_ptr, (void *) & ( csi_rs_im_act_deact_ce), mac_ce_size); + mac_pdu_ptr += (unsigned char) mac_ce_size; + + if (csi_rs_im_act_deact_ce.A_D ) { //Following IE is_scheduled only if A/D is 1 + mac_ce_size = sizeof ( struct TCI_S); + + for ( i = 0; i < ue_sched_ctl->UE_mac_ce_ctrl.csi_im.nb_tci_resource_set_id; i++) { + csi_rs_im_act_deact_ce.TCI_STATE.R = 0; + csi_rs_im_act_deact_ce.TCI_STATE.TCI_STATE_ID = ue_sched_ctl->UE_mac_ce_ctrl.csi_im.tci_state_id [i] & 0x7F; + memcpy ((void *) mac_pdu_ptr, (void *) & (csi_rs_im_act_deact_ce.TCI_STATE), mac_ce_size); + mac_pdu_ptr += (unsigned char) mac_ce_size; + } + + } + } + +#endif + + // 2) Generation of DLSCH MAC subPDUs including subheaders and MAC SDUs + for (i = 0; i < num_sdus; i++) { + LOG_D(MAC, "[gNB] Generate DLSCH header num sdu %d len sdu %d\n", num_sdus, sdu_lengths[i]); + + if (sdu_lengths[i] < 128) { + ((NR_MAC_SUBHEADER_SHORT *) mac_pdu_ptr)->R = 0; + ((NR_MAC_SUBHEADER_SHORT *) mac_pdu_ptr)->F = 0; + ((NR_MAC_SUBHEADER_SHORT *) mac_pdu_ptr)->LCID = sdu_lcids[i]; + ((NR_MAC_SUBHEADER_SHORT *) mac_pdu_ptr)->L = (unsigned char) sdu_lengths[i]; + last_size = 2; + } else { + ((NR_MAC_SUBHEADER_LONG *) mac_pdu_ptr)->R = 0; + ((NR_MAC_SUBHEADER_LONG *) mac_pdu_ptr)->F = 1; + ((NR_MAC_SUBHEADER_LONG *) mac_pdu_ptr)->LCID = sdu_lcids[i]; + ((NR_MAC_SUBHEADER_LONG *) mac_pdu_ptr)->L1 = ((unsigned short) sdu_lengths[i] >> 8) & 0x7f; + ((NR_MAC_SUBHEADER_LONG *) mac_pdu_ptr)->L2 = (unsigned short) sdu_lengths[i] & 0xff; + last_size = 3; + } + + mac_pdu_ptr += last_size; + + // 3) cycle through SDUs, compute each relevant and place dlsch_buffer in + memcpy((void *) mac_pdu_ptr, (void *) dlsch_buffer_ptr, sdu_lengths[i]); + dlsch_buffer_ptr += sdu_lengths[i]; + mac_pdu_ptr += sdu_lengths[i]; + } + + // 4) Compute final offset for padding + if (post_padding > 0) { + ((NR_MAC_SUBHEADER_FIXED *) mac_pdu_ptr)->R = 0; + ((NR_MAC_SUBHEADER_FIXED *) mac_pdu_ptr)->LCID = DL_SCH_LCID_PADDING; + mac_pdu_ptr++; - if (sdu_lengths[i] < 128) { - ((NR_MAC_SUBHEADER_SHORT *) mac_pdu_ptr)->R = 0; - ((NR_MAC_SUBHEADER_SHORT *) mac_pdu_ptr)->F = 0; - ((NR_MAC_SUBHEADER_SHORT *) mac_pdu_ptr)->LCID = sdu_lcids[i]; - ((NR_MAC_SUBHEADER_SHORT *) mac_pdu_ptr)->L = (unsigned char) sdu_lengths[i]; - last_size = 2; } else { - ((NR_MAC_SUBHEADER_LONG *) mac_pdu_ptr)->R = 0; - ((NR_MAC_SUBHEADER_LONG *) mac_pdu_ptr)->F = 1; - ((NR_MAC_SUBHEADER_LONG *) mac_pdu_ptr)->LCID = sdu_lcids[i]; - ((NR_MAC_SUBHEADER_LONG *) mac_pdu_ptr)->L1 = ((unsigned short) sdu_lengths[i] >> 8) & 0x7f; - ((NR_MAC_SUBHEADER_LONG *) mac_pdu_ptr)->L2 = (unsigned short) sdu_lengths[i] & 0xff; - last_size = 3; + // no MAC subPDU with padding } - mac_pdu_ptr += last_size; + // compute final offset + offset = ((unsigned char *) mac_pdu_ptr - mac_pdu); - // 3) cycle through SDUs, compute each relevant and place dlsch_buffer in - memcpy((void *) mac_pdu_ptr, (void *) dlsch_buffer_ptr, sdu_lengths[i]); - dlsch_buffer_ptr+= sdu_lengths[i]; - mac_pdu_ptr += sdu_lengths[i]; - } + //printf("Offset %d \n", ((unsigned char *) mac_pdu_ptr - mac_pdu)); - // 4) Compute final offset for padding - if (post_padding > 0) { - ((NR_MAC_SUBHEADER_FIXED *) mac_pdu_ptr)->R = 0; - ((NR_MAC_SUBHEADER_FIXED *) mac_pdu_ptr)->LCID = DL_SCH_LCID_PADDING; - mac_pdu_ptr++; - - } else { - // no MAC subPDU with padding - } - - // compute final offset - offset = ((unsigned char *) mac_pdu_ptr - mac_pdu); - - //printf("Offset %d \n", ((unsigned char *) mac_pdu_ptr - mac_pdu)); - - return offset; + return offset; } /* functionalities of this function have been moved to nr_schedule_uss_dlsch_phytest */ -void nr_schedule_ue_spec(module_id_t module_idP, frame_t frameP, sub_frame_t slotP){ +void nr_schedule_ue_spec(module_id_t module_idP, frame_t frameP, sub_frame_t slotP) { } diff --git a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h index 90d2310f77..bea14ed406 100644 --- a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h +++ b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h @@ -179,6 +179,71 @@ typedef struct { uint8_t num_sf_allocation_pattern; } NR_COMMON_channels_t; + +// SP ZP CSI-RS Resource Set Activation/Deactivation MAC CE +typedef struct sp_zp_csirs { + bool is_scheduled; //ZP CSI-RS ACT/Deact MAC CE is scheduled + bool act_deact; //Activation/Deactivation indication + uint8_t serv_cell_id; //Identity of Serving cell for which MAC CE applies + uint8_t bwpid; //Downlink BWP id + uint8_t rsc_id; //SP ZP CSI-RS resource set +} sp_zp_csirs_t; + +//SP CSI-RS / CSI-IM Resource Set Activation/Deactivation MAC CE +#define MAX_CSI_RESOURCE_SET 64 +typedef struct csi_rs_im { + bool is_scheduled; + bool act_deact; + uint8_t serv_cellid; + uint8_t bwp_id; + bool im; + uint8_t csi_im_rsc_id; + uint8_t nzp_csi_rsc_id; + uint8_t nb_tci_resource_set_id; + uint8_t tci_state_id [ MAX_CSI_RESOURCE_SET ]; +} csi_rs_im_t; + +typedef struct pdcchStateInd { + bool is_scheduled; + uint8_t servingCellId; + uint8_t coresetId; + uint8_t tciStateId; +} pdcchStateInd_t; + +typedef struct SPCSIReportingpucch { + bool is_scheduled; + uint8_t servingCellId; + uint8_t bwpId; + bool s0tos3_actDeact[4]; +} SPCSIReportingpucch_t; + +#define MAX_APERIODIC_TRIGGER_STATES 128 //38.331 +typedef struct aperiodicCSI_triggerStateSelection { + bool is_scheduled; + uint8_t servingCellId; + uint8_t bwpId; + uint8_t highestTriggerStateSelected; + bool triggerStateSelection[MAX_APERIODIC_TRIGGER_STATES]; +} aperiodicCSI_triggerStateSelection_t; + +#define MAX_TCI_STATES 128 //38.331 +typedef struct pdschTciStatesActDeact { + bool is_scheduled; + uint8_t servingCellId; + uint8_t bwpId; + uint8_t highestTciStateActivated; + bool tciStateActDeact[MAX_TCI_STATES]; +} pdschTciStatesActDeact_t; + +typedef struct UE_info { + sp_zp_csirs_t sp_zp_csi_rs; + csi_rs_im_t csi_im; + pdcchStateInd_t pdcch_state_ind; + SPCSIReportingpucch_t SP_CSI_reporting_pucch; + aperiodicCSI_triggerStateSelection_t aperi_CSI_trigger; + pdschTciStatesActDeact_t pdsch_TCI_States_ActDeact; +} NR_UE_mac_ce_ctrl_t; + typedef struct NR_sched_pucch { int frame; int ul_slot; @@ -188,6 +253,7 @@ typedef struct NR_sched_pucch { struct NR_sched_pucch *next_sched_pucch; } NR_sched_pucch; + /*! \brief scheduling control information set through an API */ typedef struct { uint64_t dlsch_in_slot_bitmap; // static bitmap signaling which slot in a tdd period contains dlsch @@ -195,6 +261,8 @@ typedef struct { NR_sched_pucch *sched_pucch; uint16_t ta_timer; int16_t ta_update; + int dummy; + NR_UE_mac_ce_ctrl_t UE_mac_ce_ctrl;// MAC CE related information } NR_UE_sched_ctrl_t; /*! \brief UE list used by gNB to order UEs/CC for scheduling*/ @@ -213,7 +281,7 @@ typedef struct { NR_CellGroupConfig_t *secondaryCellGroup[MAX_MOBILES_PER_GNB]; } NR_UE_list_t; -/*! \brief top level gNB MAC structure */ +/*! \brief top level eNB MAC structure */ typedef struct gNB_MAC_INST_s { /// Ethernet parameters for northbound midhaul interface eth_params_t eth_params_n; @@ -254,7 +322,7 @@ typedef struct gNB_MAC_INST_s { /// UL handle uint32_t ul_handle; - // MAC function execution peformance profiler + // MAC function execution peformance profiler /// processing time of eNB scheduler time_stats_t eNB_scheduler; /// processing time of eNB scheduler for SI