From 75305c383b953b41f91637bb88ead680c88f354a Mon Sep 17 00:00:00 2001 From: Kujou <874864293@qq.com> Date: Mon, 12 Aug 2019 20:13:00 +0800 Subject: [PATCH 1/8] adding initial version of fapi_nr_interface_scf.h --- .../nfapi/public_inc/nfapi_nr_interface_scf.h | 1084 +++++++++++++++++ 1 file changed, 1084 insertions(+) create mode 100644 nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface_scf.h diff --git a/nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface_scf.h b/nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface_scf.h new file mode 100644 index 0000000000..c62c316ab9 --- /dev/null +++ b/nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface_scf.h @@ -0,0 +1,1084 @@ +/* + nfapi_nr_interface.h + ------------------- + AUTHOR : Raymond Knopp, Guy de Souza, WEI-TAI CHEN, Chenyu Zhang + COMPANY : EURECOM, NTUST + EMAIL : Lionel.Gauthier@eurecom.fr, desouza@eurecom.fr, kroempa@gmail.com +*/ + +#ifndef _NFAPI_NR_INTERFACE_H_ +#define _NFAPI_NR_INTERFACE_H_ + +#include "nfapi_interface.h" + + +#define NFAPI_NR_MAX_NB_CCE_AGGREGATION_LEVELS 5 +#define NFAPI_NR_MAX_NB_TCI_STATES_PDCCH 64 +#define NFAPI_NR_MAX_NB_CORESETS 12 +#define NFAPI_NR_MAX_NB_SEARCH_SPACES 40 + +// Extension to the generic structures for single tlv values +typedef struct { + nfapi_tl_t tl; + int32_t value; +} nfapi_int32_tlv_t; + +typedef struct { + nfapi_tl_t tl; + uint32_t value; +} nfapi_uint32_tlv_t; + +/*typedef struct { + nfapi_tl_t tl; + int64_t value; +} nfapi_int64_tlv_t;*/ + +typedef struct { + nfapi_tl_t tl; + uint64_t value; +} nfapi_uint64_tlv_t; + +// nFAPI enums +typedef enum { + NFAPI_NR_DL_CONFIG_DCI_DL_PDU_TYPE = 0, + NFAPI_NR_DL_CONFIG_BCH_PDU_TYPE, + NFAPI_NR_DL_CONFIG_DLSCH_PDU_TYPE, + NFAPI_NR_DL_CONFIG_PCH_PDU_TYPE, + NFAPI_NR_DL_CONFIG_NBCH_PDU_TYPE, + NFAPI_NR_DL_CONFIG_NPDCCH_PDU_TYPE, + NFAPI_NR_DL_CONFIG_NDLSCH_PDU_TYPE +} nfapi_nr_dl_config_pdu_type_e; + +//These TLVs are used exclusively by nFAPI +typedef struct +{ + // These TLVs are used to setup the transport connection between VNF and PNF + // nfapi_ipv4_address_t p7_vnf_address_ipv4; + // nfapi_ipv6_address_t p7_vnf_address_ipv6; + // nfapi_uint16_tlv_t p7_vnf_port; + + // nfapi_ipv4_address_t p7_pnf_address_ipv4; + // nfapi_ipv6_address_t p7_pnf_address_ipv6; + // nfapi_uint16_tlv_t p7_pnf_port; + + // // These TLVs are used to setup the transport connection between VNF and PNF + // nfapi_uint8_tlv_t dl_ue_per_sf; + // nfapi_uint8_tlv_t ul_ue_per_sf; + + // These TLVs are used by PNF to report its RF capabilities to the VNF software + nfapi_rf_bands_t rf_bands; + + // These TLVs are used by the VNF to configure the synchronization with the PNF. + // nfapi_uint8_tlv_t timing_window; + // nfapi_uint8_tlv_t timing_info_mode; + // nfapi_uint8_tlv_t timing_info_period; + + // These TLVs are used by the VNF to configure the RF in the PNF + // nfapi_uint16_tlv_t max_transmit_power; + nfapi_uint32_tlv_t nrarfcn; + + // nfapi_nmm_frequency_bands_t nmm_gsm_frequency_bands; + // nfapi_nmm_frequency_bands_t nmm_umts_frequency_bands; + // nfapi_nmm_frequency_bands_t nmm_lte_frequency_bands; + // nfapi_uint8_tlv_t nmm_uplink_rssi_supported; + +} nfapi_nr_nfapi_t; + +#define NFAPI_NR_NFAPI_P7_VNF_ADDRESS_IPV4_TAG 0x5100 +#define NFAPI_NR_NFAPI_P7_VNF_ADDRESS_IPV6_TAG 0x5101 +#define NFAPI_NR_NFAPI_P7_VNF_PORT_TAG 0x5102 +#define NFAPI_NR_NFAPI_P7_PNF_ADDRESS_IPV4_TAG 0x5103 +#define NFAPI_NR_NFAPI_P7_PNF_ADDRESS_IPV6_TAG 0x5104 +#define NFAPI_NR_NFAPI_P7_PNF_PORT_TAG 0x5105 + +#define NFAPI_NR_NFAPI_DOWNLINK_UES_PER_SUBFRAME_TAG 0x510A +#define NFAPI_NR_NFAPI_UPLINK_UES_PER_SUBFRAME_TAG 0x510B +#define NFAPI_NR_NFAPI_RF_BANDS_TAG 0x5114 +#define NFAPI_NR_NFAPI_TIMING_WINDOW_TAG 0x511E +#define NFAPI_NR_NFAPI_TIMING_INFO_MODE_TAG 0x511F +#define NFAPI_NR_NFAPI_TIMING_INFO_PERIOD_TAG 0x5120 +#define NFAPI_NR_NFAPI_MAXIMUM_TRANSMIT_POWER_TAG 0x5128 +#define NFAPI_NR_NFAPI_NRARFCN_TAG 0x5129 +#define NFAPI_NR_NFAPI_NMM_GSM_FREQUENCY_BANDS_TAG 0x5130 +#define NFAPI_NR_NFAPI_NMM_UMTS_FREQUENCY_BANDS_TAG 0x5131 +#define NFAPI_NR_NFAPI_NMM_LTE_FREQUENCY_BANDS_TAG 0x5132 +#define NFAPI_NR_NFAPI_NMM_UPLINK_RSSI_SUPPORTED_TAG 0x5133 + +// P5 Message Structures + +typedef struct{ + nfapi_tl_t tl; + uint16_t corset_ID; ///// L1 parameter 'CORESET-ID' + uint16_t freq_dom; ///// L1 parameter 'CORESET-freq-dom' + uint16_t duration; ///// L1 parameter 'CORESET-time-duration' + uint16_t reg_type; ///// L1 parameter 'CORESET-CCE-REG-mapping-type' + uint16_t reg_bundlesize; ///// L1 parameter 'CORESET-REG-bundle-size' + uint16_t interleaversize; ///// L1 parameter 'CORESET-interleaver-size' + uint16_t shiftindex; ///// L1 parameter 'CORESET-shift-index' + uint16_t precodergranularity; ///// L1 parameter 'CORESET-precoder-granuality' + uint16_t tci_stateId; ///// L1 parameter 'TCI-StatesPDCCH' + uint16_t tci_present; ///// L1 parameter 'TCI-PresentInDCI' + uint16_t dmrs_scramblingID; ///// L1 parameter 'PDCCH-DMRS-Scrambling-ID' +} nfapi_nr_ControlResourcesSet_t; + +typedef struct{ + nfapi_tl_t tl; + nfapi_nr_ControlResourcesSet_t coreset; + uint16_t monitoringSlotPeriodicityAndOffset; ///// L1 parameters 'Montoring-periodicity-PDCCH-slot' + uint16_t monitoringSymbolsWithinSlot; ///// L1 parameter 'Montoring-symbols-PDCCH-within-slot' + uint16_t nrofCand_aggLevel1; ///// L1 parameter 'Aggregation-level-1' + uint16_t nrofCand_aggLevel2; ///// L1 parameter 'Aggregation-level-2' + uint16_t nrofCand_aggLevel4; ///// L1 parameter 'Aggregation-level-4' + uint16_t nrofCand_aggLevel8; ///// L1 parameter 'Aggregation-level-8' + uint16_t nrofCand_aggLevel16; ///// L1 parameter 'Aggregation-level-16' + uint16_t sfi_agg_fmt2_0; ///// L1 parameters 'SFI-Num-PDCCH-cand' and 'SFI-Aggregation-Level' + uint16_t monitoringperiodicity_fmt2_3; ///// L1 parameter 'SRS-monitoring-periodicity' + uint16_t nrof_candidates_fmt_2_3; ///// L1 parameter 'SRS-Num-PDCCH-cand' +} nfapi_nr_SearchSpace_t; + + +typedef struct { + nfapi_uint16_tlv_t numerology_index_mu; + nfapi_uint16_tlv_t duplex_mode; + nfapi_uint16_tlv_t dl_cyclic_prefix_type; + nfapi_uint16_tlv_t ul_cyclic_prefix_type; +} nfapi_nr_subframe_config_t; + +#define NFAPI_NR_SUBFRAME_CONFIG_DUPLEX_MODE_TAG 0x5001 +#define NFAPI_NR_SUBFRAME_CONFIG_PCFICH_POWER_OFFSET_TAG 0x5002 +#define NFAPI_NR_SUBFRAME_CONFIG_PB_TAG 0x5003 +#define NFAPI_NR_SUBFRAME_CONFIG_DL_CYCLIC_PREFIX_TYPE_TAG 0x5004 +#define NFAPI_NR_SUBFRAME_CONFIG_UL_CYCLIC_PREFIX_TYPE_TAG 0x5005 +#define NFAPI_NR_SUBFRAME_CONFIG_NUMEROLOGY_INDEX_MU_TAG 0x5006 + +typedef struct { + nfapi_uint16_tlv_t dl_carrier_bandwidth; + nfapi_uint16_tlv_t ul_carrier_bandwidth; + nfapi_uint16_tlv_t dl_bwp_subcarrierspacing; + nfapi_uint16_tlv_t ul_bwp_subcarrierspacing; + nfapi_uint16_tlv_t dl_locationandbandwidth; + nfapi_uint16_tlv_t ul_locationandbandwidth; + nfapi_uint16_tlv_t dl_absolutefrequencypointA; + nfapi_uint16_tlv_t ul_absolutefrequencypointA; + nfapi_uint16_tlv_t dl_offsettocarrier; + nfapi_uint16_tlv_t ul_offsettocarrier; + nfapi_uint16_tlv_t dl_subcarrierspacing; + nfapi_uint16_tlv_t ul_subcarrierspacing; + nfapi_uint16_tlv_t dl_specificcarrier_k0; + nfapi_uint16_tlv_t ul_specificcarrier_k0; + nfapi_uint16_tlv_t NIA_subcarrierspacing; +} nfapi_nr_rf_config_t; + +#define NFAPI_NR_RF_CONFIG_DL_CARRIER_BANDWIDTH_TAG 0x500A +#define NFAPI_NR_RF_CONFIG_UL_CARRIER_BANDWIDTH_TAG 0x500B +#define NFAPI_NR_RF_CONFIG_DL_SUBCARRIERSPACING_TAG 0x500C +#define NFAPI_NR_RF_CONFIG_UL_SUBCARRIERSPACING_TAG 0x500D + +typedef struct { + nfapi_uint16_tlv_t physical_cell_id; + nfapi_uint16_tlv_t half_frame_index; + nfapi_uint16_tlv_t ssb_subcarrier_offset; + nfapi_uint16_tlv_t ssb_sib1_position_in_burst; // in sib1 + nfapi_uint64_tlv_t ssb_scg_position_in_burst; // in servingcellconfigcommon + nfapi_uint16_tlv_t ssb_periodicity; + nfapi_uint16_tlv_t ss_pbch_block_power; + nfapi_uint16_tlv_t n_ssb_crb; + nfapi_uint16_tlv_t rmsi_pdcch_config; +} nfapi_nr_sch_config_t; + +#define NFAPI_NR_SCH_CONFIG_PHYSICAL_CELL_ID_TAG 0x501E +#define NFAPI_NR_SCH_CONFIG_HALF_FRAME_INDEX_TAG 0x501F +#define NFAPI_NR_SCH_CONFIG_SSB_SUBCARRIER_OFFSET_TAG 0x5020 +#define NFAPI_NR_SCH_CONFIG_SSB_POSITION_IN_BURST 0x5021 +#define NFAPI_NR_SCH_CONFIG_SSB_PERIODICITY 0x5022 +#define NFAPI_NR_SCH_CONFIG_SS_PBCH_BLOCK_POWER 0x5023 +#define NFAPI_NR_SCH_CONFIG_N_SSB_CRB 0x5024 + +typedef struct { + nfapi_uint16_tlv_t data_scrambling_id; + nfapi_uint16_tlv_t dmrs_typeA_position; + nfapi_uint16_tlv_t dmrs_additional_position; + nfapi_uint16_tlv_t dmrs_type; + nfapi_uint16_tlv_t dmrs_max_length; + nfapi_uint16_tlv_t mapping_type; + nfapi_uint16_tlv_t resource_allocation; + nfapi_uint16_tlv_t time_allocation_list; + nfapi_uint16_tlv_t mcs_table; + nfapi_uint16_tlv_t aggregation_factor; + nfapi_uint16_tlv_t prb_bundling_type; + nfapi_uint16_tlv_t rbg_size; + nfapi_uint16_tlv_t vrb_to_prb_interleaver; + nfapi_uint16_tlv_t code_block_groug_transmission; + nfapi_uint16_tlv_t x_overhead; + nfapi_uint16_tlv_t max_dci_codewords; + +} nfapi_nr_pdsch_config_t; +#define NFAPI_NR_PDSCH_CONFIG_TAG + + +typedef struct { + nfapi_uint16_tlv_t prach_RootSequenceIndex; ///// L1 parameter 'PRACHRootSequenceIndex' + nfapi_uint16_tlv_t prach_msg1_SubcarrierSpacing; ///// L1 parameter 'prach-Msg1SubcarrierSpacing' + nfapi_uint16_tlv_t restrictedSetConfig; + nfapi_uint16_tlv_t msg3_transformPrecoding; ///// L1 parameter 'msg3-tp' + /////////////////--------------------NR RACH-ConfigGeneric--------------------///////////////// + nfapi_uint16_tlv_t prach_ConfigurationIndex; ///// L1 parameter 'PRACHConfigurationIndex' + nfapi_uint16_tlv_t prach_msg1_FDM; ///// L1 parameter 'prach-FDM' + nfapi_uint16_tlv_t prach_msg1_FrequencyStart; ///// L1 parameter 'prach-frequency-start' + nfapi_uint16_tlv_t zeroCorrelationZoneConfig; + nfapi_uint16_tlv_t preambleReceivedTargetPower; +} nfapi_nr_rach_config_t; + +typedef struct { + nfapi_uint16_tlv_t groupHoppingEnabledTransformPrecoding; ///// L1 parameter 'Group-hopping-enabled-Transform-precoding' + nfapi_uint16_tlv_t msg3_DeltaPreamble; ///// L1 parameter 'Delta-preamble-msg3' + nfapi_uint16_tlv_t p0_NominalWithGrant; ///// L1 parameter 'p0-nominal-pusch-withgrant' + nfapi_uint16_tlv_t TimeDomainResourceAllocation_k2; ///// L1 parameter 'K2' + nfapi_uint16_tlv_t TimeDomainResourceAllocation_mappingType; ///// L1 parameter 'Mapping-type' +} nfapi_nr_pusch_config_t; + +typedef struct { + nfapi_uint16_tlv_t pucch_GroupHopping; ///// L1 parameter 'PUCCH-GroupHopping' + nfapi_uint16_tlv_t p0_nominal; ///// L1 parameter 'p0-nominal-pucch' +} nfapi_nr_pucch_config_t; + + +typedef struct { + nfapi_tl_t tl; + nfapi_nr_SearchSpace_t sib1searchSpace; + nfapi_nr_SearchSpace_t sibssearchSpace; + nfapi_nr_SearchSpace_t ra_SearchSpace; +}nfapi_nr_pdcch_config_t; + +typedef struct { +//NR TDD-UL-DL-ConfigCommon ///// L1 parameter 'UL-DL-configuration-common' + nfapi_uint16_tlv_t subcarrierspacing; ///// L1 parameter 'reference-SCS' + nfapi_uint16_tlv_t dl_ul_periodicity; ///// L1 parameter 'DL-UL-transmission-periodicity' + nfapi_uint16_tlv_t nrofDownlinkSlots; ///// L1 parameter 'number-of-DL-slots' + nfapi_uint16_tlv_t nrofDownlinkSymbols; ///// L1 parameter 'number-of-DL-symbols-common' + nfapi_uint16_tlv_t nrofUplinkSlots; ///// L1 parameter 'number-of-UL-slots' + nfapi_uint16_tlv_t nrofUplinkSymbols; ///// L1 parameter 'number-of-UL-symbols-common' +} nfapi_nr_tdd_ul_dl_config_t; + +typedef struct { + //RateMatchPattern is used to configure one rate matching pattern for PDSCH ///// L1 parameter 'Resource-set-cekk' + nfapi_uint16_tlv_t Match_Id; + nfapi_uint16_tlv_t patternType; + nfapi_uint16_tlv_t symbolsInResourceBlock; ///// L1 parameter 'rate-match-PDSCH-bitmap2 + nfapi_uint16_tlv_t periodicityAndPattern; ///// L1 parameter 'rate-match-PDSCH-bitmap3' + nfapi_uint16_tlv_t controlResourceSet; + nfapi_uint16_tlv_t subcarrierSpacing; ///// L1 parameter 'resource-pattern-scs' + nfapi_uint16_tlv_t mode; +} nfapi_nr_ratematchpattern_t; + +typedef struct { + //NR RateMatchPatternLTE-CRS + nfapi_uint16_tlv_t carrierfreqDL; ///// L1 parameter 'center-subcarrier-location' + nfapi_uint16_tlv_t dl_bandwidth; ///// L1 parameter 'BW' + nfapi_uint16_tlv_t nrofcrs_Ports; ///// L1 parameter 'rate-match-resources-numb-LTE-CRS-antenna-port' + nfapi_uint16_tlv_t v_Shift; ///// L1 parameter 'rate-match-resources-LTE-CRS-v-shift' + nfapi_uint16_tlv_t frame_Period; + nfapi_uint16_tlv_t frame_Offset; +} nfapi_nr_ratematchpattern_lte_crs_t; + +typedef struct { + nfapi_p4_p5_message_header_t header; + uint8_t num_tlv; + nfapi_nr_subframe_config_t subframe_config; + nfapi_nr_rf_config_t rf_config; + nfapi_nr_sch_config_t sch_config; + nfapi_nr_pdsch_config_t pdsch_config; + nfapi_nr_rach_config_t rach_config; + nfapi_nr_pusch_config_t pusch_config; + nfapi_nr_pucch_config_t pucch_config; + nfapi_nr_pdcch_config_t pdcch_config; + nfapi_nr_tdd_ul_dl_config_t tdd_ul_dl_config; + nfapi_nr_ratematchpattern_t ratematchpattern; + nfapi_nr_ratematchpattern_lte_crs_t ratematchpattern_lte_crs; + nfapi_nr_nfapi_t nfapi_config; + + nfapi_vendor_extension_tlv_t vendor_extension; +} nfapi_nr_config_request_t; + + + +typedef enum { + NFAPI_NR_DL_DCI_FORMAT_1_0 = 0, + NFAPI_NR_DL_DCI_FORMAT_1_1, + NFAPI_NR_DL_DCI_FORMAT_2_0, + NFAPI_NR_DL_DCI_FORMAT_2_1, + NFAPI_NR_DL_DCI_FORMAT_2_2, + NFAPI_NR_DL_DCI_FORMAT_2_3, + NFAPI_NR_UL_DCI_FORMAT_0_0, + NFAPI_NR_UL_DCI_FORMAT_0_1 +} nfapi_nr_dci_format_e; + +typedef enum { + NFAPI_NR_RNTI_new = 0, + NFAPI_NR_RNTI_C, + NFAPI_NR_RNTI_RA, + NFAPI_NR_RNTI_P, + NFAPI_NR_RNTI_CS, + NFAPI_NR_RNTI_TC, + NFAPI_NR_RNTI_SP_CSI, + NFAPI_NR_RNTI_SI, + NFAPI_NR_RNTI_SFI, + NFAPI_NR_RNTI_INT, + NFAPI_NR_RNTI_TPC_PUSCH, + NFAPI_NR_RNTI_TPC_PUCCH, + NFAPI_NR_RNTI_TPC_SRS +} nfapi_nr_rnti_type_e; + +typedef enum { + NFAPI_NR_USS_FORMAT_0_0_AND_1_0, + NFAPI_NR_USS_FORMAT_0_1_AND_1_1, +} nfapi_nr_uss_dci_formats_e; + +typedef enum { + NFAPI_NR_SEARCH_SPACE_TYPE_COMMON=0, + NFAPI_NR_SEARCH_SPACE_TYPE_UE_SPECIFIC +} nfapi_nr_search_space_type_e; + +typedef enum { + NFAPI_NR_COMMON_SEARCH_SPACE_TYPE_0=0, + NFAPI_NR_COMMON_SEARCH_SPACE_TYPE_0A, + NFAPI_NR_COMMON_SEARCH_SPACE_TYPE_1, + NFAPI_NR_COMMON_SEARCH_SPACE_TYPE_2 +} nfapi_nr_common_search_space_type_e; + +typedef enum { + NFAPI_NR_SSB_AND_CSET_MUX_PATTERN_TYPE1=0, + NFAPI_NR_SSB_AND_CSET_MUX_PATTERN_TYPE2, + NFAPI_NR_SSB_AND_CSET_MUX_PATTERN_TYPE3 +} nfapi_nr_ssb_and_cset_mux_pattern_type_e; + +typedef enum { + NFAPI_NR_CCE_REG_MAPPING_INTERLEAVED=0, + NFAPI_NR_CCE_REG_MAPPING_NON_INTERLEAVED +} nfapi_nr_cce_reg_mapping_type_e; + +typedef enum { + NFAPI_NR_CSET_CONFIG_MIB_SIB1=0, + NFAPI_NR_CSET_CONFIG_PDCCH_CONFIG, // implicit assumption of coreset Id other than 0 + NFAPI_NR_CSET_CONFIG_PDCCH_CONFIG_CSET_0 +} nfapi_nr_coreset_config_type_e; + +typedef enum { + NFAPI_NR_CSET_SAME_AS_REG_BUNDLE=0, + NFAPI_NR_CSET_ALL_CONTIGUOUS_RBS +} nfapi_nr_coreset_precoder_granularity_type_e; + +typedef enum { + NFAPI_NR_QCL_TYPE_A=0, + NFAPI_NR_QCL_TYPE_B, + NFAPI_NR_QCL_TYPE_C, + NFAPI_NR_QCL_TYPE_D +} nfapi_nr_qcl_type_e; + +typedef enum { + NFAPI_NR_SS_PERIODICITY_SL1=1, + NFAPI_NR_SS_PERIODICITY_SL2=2, + NFAPI_NR_SS_PERIODICITY_SL4=4, + NFAPI_NR_SS_PERIODICITY_SL5=5, + NFAPI_NR_SS_PERIODICITY_SL8=8, + NFAPI_NR_SS_PERIODICITY_SL10=10, + NFAPI_NR_SS_PERIODICITY_SL16=16, + NFAPI_NR_SS_PERIODICITY_SL20=20, + NFAPI_NR_SS_PERIODICITY_SL40=40, + NFAPI_NR_SS_PERIODICITY_SL80=80, + NFAPI_NR_SS_PERIODICITY_SL160=160, + NFAPI_NR_SS_PERIODICITY_SL320=320, + NFAPI_NR_SS_PERIODICITY_SL640=640, + NFAPI_NR_SS_PERIODICITY_SL1280=1280, + NFAPI_NR_SS_PERIODICITY_SL2560=2560 +} nfapi_nr_search_space_monitoring_periodicity_e; + +typedef enum { + NFAPI_NR_PDSCH_TIME_DOMAIN_ALLOC_TYPE_DEFAULT_A=0, + NFAPI_NR_PDSCH_TIME_DOMAIN_ALLOC_TYPE_DEFAULT_B, + NFAPI_NR_PDSCH_TIME_DOMAIN_ALLOC_TYPE_DEFAULT_C, + NFAPI_NR_PDSCH_TIME_DOMAIN_ALLOC_TYPE_ALLOC_LIST +} nfapi_nr_pdsch_time_domain_alloc_type_e; + +typedef enum { + NFAPI_NR_PDSCH_MAPPING_TYPE_A=0, + NFAPI_NR_PDSCH_MAPPING_TYPE_B +} nfapi_nr_pdsch_mapping_type_e; + +typedef enum { + NFAPI_NR_PDSCH_RBG_CONFIG_TYPE1=0, + NFAPI_NR_PDSCH_RBG_CONFIG_TYPE2 +} nfapi_nr_pdsch_rbg_config_type_e; + +typedef enum { + NFAPI_NR_PRG_GRANULARITY_2=2, + NFAPI_NR_PRG_GRANULARITY_4=4, + NFAPI_NR_PRG_GRANULARITY_WIDEBAND +} nfapi_nr_prg_granularity_e; + +typedef enum { + NFAPI_NR_PRB_BUNDLING_TYPE_STATIC=0, + NFAPI_NR_PRB_BUNDLING_TYPE_DYNAMIC +} nfapi_nr_prb_bundling_type_e; + +typedef enum { + NFAPI_NR_MCS_TABLE_QAM64_LOW_SE=0, + NFAPI_NR_MCS_TABLE_QAM256 +} nfapi_nr_pdsch_mcs_table_e; + +typedef enum { + NFAPI_NR_DMRS_TYPE1=0, + NFAPI_NR_DMRS_TYPE2 +} nfapi_nr_dmrs_type_e; + +// P7 Sub Structures + +typedef struct { + +nfapi_tl_t tl; + +uint8_t format_indicator; //1 bit +uint16_t frequency_domain_assignment; //up to 16 bits +uint8_t time_domain_assignment; // 4 bits +uint8_t frequency_hopping_flag; //1 bit + +uint8_t ra_preamble_index; //6 bits +uint8_t ss_pbch_index; //6 bits +uint8_t prach_mask_index; //4 bits + +uint8_t vrb_to_prb_mapping; //0 or 1 bit +uint8_t mcs; //5 bits +uint8_t ndi; //1 bit +uint8_t rv; //2 bits +uint8_t harq_pid; //4 bits +uint8_t dai; //0, 2 or 4 bits +uint8_t dai1; //1 or 2 bits +uint8_t dai2; //0 or 2 bits +uint8_t tpc; //2 bits +uint8_t pucch_resource_indicator; //3 bits +uint8_t pdsch_to_harq_feedback_timing_indicator; //0, 1, 2 or 3 bits + +uint8_t short_messages_indicator; //2 bits +uint8_t short_messages; //8 bits +uint8_t tb_scaling; //2 bits + +uint8_t carrier_indicator; //0 or 3 bits +uint8_t bwp_indicator; //0, 1 or 2 bits +uint8_t prb_bundling_size_indicator; //0 or 1 bits +uint8_t rate_matching_indicator; //0, 1 or 2 bits +uint8_t zp_csi_rs_trigger; //0, 1 or 2 bits +uint8_t transmission_configuration_indication; //0 or 3 bits +uint8_t srs_request; //2 bits +uint8_t cbgti; //CBG Transmission Information: 0, 2, 4, 6 or 8 bits +uint8_t cbgfi; //CBG Flushing Out Information: 0 or 1 bit +uint8_t dmrs_sequence_initialization; //0 or 1 bit + +uint8_t srs_resource_indicator; +uint8_t precoding_information; +uint8_t csi_request; +uint8_t ptrs_dmrs_association; +uint8_t beta_offset_indicator; //0 or 2 bits + +uint8_t slot_format_indicator_count; +uint8_t *slot_format_indicators; + +uint8_t pre_emption_indication_count; +uint16_t *pre_emption_indications; //14 bit + +uint8_t block_number_count; +uint8_t *block_numbers; + +uint8_t ul_sul_indicator; //0 or 1 bit +uint8_t antenna_ports; + +uint16_t reserved; //1_0/C-RNTI:10 bits, 1_0/P-RNTI: 6 bits, 1_0/SI-&RA-RNTI: 16 bits +uint16_t padding; + +} nfapi_nr_dl_config_dci_dl_pdu_rel15_t; + +//#define NFAPI_NR_DL_CONFIG_REQUEST_DCI_DL_PDU_REL15_TAG 0x???? + +typedef struct{ + nfapi_tl_t tl; + uint8_t coreset_id; + uint64_t frequency_domain_resources; + uint8_t duration; + uint8_t cce_reg_mapping_type; + uint8_t reg_bundle_size; + uint8_t interleaver_size; + uint8_t shift_index; + uint8_t precoder_granularity; + uint8_t tci_state_id; + uint8_t tci_present_in_dci; + uint32_t dmrs_scrambling_id; +} nfapi_nr_coreset_t; + +typedef struct{ + nfapi_tl_t tl; + uint8_t search_space_id; + uint8_t coreset_id; + uint8_t search_space_type; + uint8_t duration; + uint8_t css_formats_0_0_and_1_0; + uint8_t css_format_2_0; + uint8_t css_format_2_1; + uint8_t css_format_2_2; + uint8_t css_format_2_3; + uint8_t uss_dci_formats; + uint16_t srs_monitoring_periodicity; + uint16_t slot_monitoring_periodicity; + uint16_t slot_monitoring_offset; + uint16_t monitoring_symbols_in_slot; + uint16_t number_of_candidates[NFAPI_NR_MAX_NB_CCE_AGGREGATION_LEVELS]; +} nfapi_nr_search_space_t; + +typedef struct { + nfapi_tl_t tl; + uint16_t rnti; + uint8_t rnti_type; + uint8_t dci_format; + /// Number of CRB in BWP that this DCI configures + uint16_t n_RB_BWP; + uint8_t config_type; + uint8_t search_space_type; + uint8_t common_search_space_type; + uint8_t aggregation_level; + uint8_t n_rb; + uint8_t n_symb; + int8_t rb_offset; + uint8_t cr_mapping_type; + uint8_t reg_bundle_size; + uint8_t interleaver_size; + uint8_t shift_index; + uint8_t mux_pattern; + uint8_t precoder_granularity; + uint8_t first_slot; + uint8_t first_symbol; + uint8_t nb_ss_sets_per_slot; + uint8_t nb_slots; + uint8_t sfn_mod2; + uint16_t scrambling_id; + nfapi_bf_vector_t bf_vector; +} nfapi_nr_dl_config_pdcch_parameters_rel15_t; + +typedef struct { + nfapi_tl_t tl; + uint16_t length; + int16_t pdu_index; + uint16_t transmission_power; +} nfapi_nr_dl_config_bch_pdu_rel15_t; +#define NFAPI_NR_DL_CONFIG_REQUEST_BCH_PDU_REL15_TAG 0x5025 + +typedef struct { + nfapi_nr_dl_config_bch_pdu_rel15_t bch_pdu_rel15; +} nfapi_nr_dl_config_bch_pdu; + +typedef struct { + nfapi_tl_t tl; + uint16_t length; + uint8_t pdu_index; + uint16_t rnti; + uint16_t nb_mod_symbols; + uint8_t time_allocation_type; + uint8_t freq_allocation_type; + uint8_t start_prb; + uint8_t n_prb; + uint8_t start_symbol; + uint8_t nb_symbols; + uint8_t mcs_idx; + uint8_t ndi; + uint8_t nb_codewords; + uint8_t nb_layers; + uint16_t coding_rate; + uint8_t modulation; + uint8_t modulation_order; + uint16_t transport_block_size; + uint8_t nb_re_dmrs; + uint8_t time_alloc_list_flag; + uint8_t time_alloc_list; + uint8_t rbg_list; + uint8_t virtual_resource_block_assignment_flag; + uint32_t resource_block_coding; + uint8_t redundancy_version; + uint8_t transport_blocks; + uint8_t transmission_scheme; + uint8_t number_of_subbands; + uint8_t codebook_index[NFAPI_MAX_NUM_SUBBANDS]; + uint8_t ue_category_capacity; + uint8_t pa; + uint8_t delta_power_offset_index; + uint8_t ngap; + uint8_t transmission_mode; + uint8_t num_bf_prb_per_subband; + uint8_t num_bf_vector; + nfapi_bf_vector_t bf_vector[NFAPI_MAX_BF_VECTORS]; +}nfapi_nr_dl_config_dlsch_pdu_rel15_t; +#define NFAPI_NR_DL_CONFIG_REQUEST_DLSCH_PDU_REL15_TAG + +typedef struct { + nfapi_nr_dl_config_dlsch_pdu_rel15_t dlsch_pdu_rel15; +} nfapi_nr_dl_config_dlsch_pdu; + +typedef struct { + nfapi_tl_t tl; + nfapi_nr_search_space_t pagingSearchSpace; + nfapi_nr_coreset_t pagingControlResourceSets; +}nfapi_nr_dl_config_pch_pdu_rel15_t; + +typedef struct { + +} nfapi_nr_dl_config_nbch_pdu_rel15_t; + +typedef struct { + +} nfapi_nr_dl_config_npdcch_pdu_rel15_t; + +typedef struct { + +} nfapi_nr_dl_config_ndlsch_pdu_rel15_t; + +typedef struct { + nfapi_nr_dl_config_dci_dl_pdu_rel15_t dci_dl_pdu_rel15; + nfapi_nr_dl_config_pdcch_parameters_rel15_t pdcch_params_rel15; +} nfapi_nr_dl_config_dci_dl_pdu; + + +typedef struct { + uint8_t pdu_type; + uint8_t pdu_size; + + union { + nfapi_nr_dl_config_dci_dl_pdu dci_dl_pdu; + nfapi_nr_dl_config_bch_pdu_rel15_t bch_pdu_rel15; + nfapi_nr_dl_config_dlsch_pdu dlsch_pdu; + nfapi_nr_dl_config_pch_pdu_rel15_t pch_pdu_rel15; + nfapi_nr_dl_config_nbch_pdu_rel15_t nbch_pdu_rel15; + nfapi_nr_dl_config_npdcch_pdu_rel15_t npdcch_pdu_rel15; + nfapi_nr_dl_config_ndlsch_pdu_rel15_t ndlsch_pdu_rel15; + }; +} nfapi_nr_dl_config_request_pdu_t; + +typedef struct { + nfapi_tl_t tl; + uint8_t number_dci; + uint8_t number_pdu; + uint8_t number_pdsch_rnti; + nfapi_nr_dl_config_request_pdu_t *dl_config_pdu_list; +} nfapi_nr_dl_config_request_body_t; + +typedef struct { + nfapi_p7_message_header_t header; + uint16_t sfn_sf; + nfapi_nr_dl_config_request_body_t dl_config_request_body; + nfapi_vendor_extension_tlv_t vendor_extension; +} nfapi_nr_dl_config_request_t; + + +typedef enum {nr_pusch_freq_hopping_disabled = 0 , + nr_pusch_freq_hopping_enabled = 1 + } nr_pusch_freq_hopping_t; + +typedef struct{ + uint8_t aperiodicSRS_ResourceTrigger; +} nfapi_nr_ul_srs_config_t; + +typedef struct { + uint8_t bandwidth_part_ind; + uint16_t number_rbs; + uint16_t start_rb; + uint8_t frame_offset; + uint16_t number_symbols; + uint16_t start_symbol; + uint8_t nb_re_dmrs; + uint8_t length_dmrs; + nr_pusch_freq_hopping_t pusch_freq_hopping; + uint8_t mcs; + uint8_t Qm; + uint8_t ndi; + uint8_t rv; + int8_t accumulated_delta_PUSCH; + int8_t absolute_delta_PUSCH; + uint8_t n_layers; + uint8_t tpmi; + uint8_t n_dmrs_cdm_groups; + uint8_t dmrs_ports[4]; + uint8_t n_front_load_symb; + nfapi_nr_ul_srs_config_t srs_config; + uint8_t csi_reportTriggerSize; + uint8_t maxCodeBlockGroupsPerTransportBlock; + uint8_t ptrs_dmrs_association_port; + uint8_t beta_offset_ind; +} nfapi_nr_ul_config_ulsch_pdu_rel15_t; + +typedef struct { + uint16_t rnti; + nfapi_nr_ul_config_ulsch_pdu_rel15_t ulsch_pdu_rel15; +} nfapi_nr_ul_config_ulsch_pdu; + + + + + + +// SCF222_5G-FAPI_PHY_SPI_Specificayion.pdf Section 3.2 + +//typedef unsigned long int uint64_t; + +//PHY API message types + +typedef enum { + NFAPI_NR_PHY_MSG_TYPE_PARAM_REQUEST= 0x00, + NFAPI_NR_PHY_MSG_TYPE_PARAM_RESPONSE= 0x01, + NFAPI_NR_PHY_MSG_TYPE_CONFIG_REQUEST= 0x02, + NFAPI_NR_PHY_MSG_TYPE_CONFIG_RESPONSE=0X03, + NFAPI_NR_PHY_MSG_TYPE_START_REQUEST= 0X04, + NFAPI_NR_PHY_MSG_TYPE_STOP_REQUEST= 0X05, + NFAPI_NR_PHY_MSG_TYPE_STOP_INDICATION=0X06, + NFAPI_NR_PHY_MSG_TYPE_ERROR_INDICATION=0X07, + //RESERVED 0X08 ~ 0X7F + NFAPI_NR_PHY_MSG_TYPE_DL_TTI_REQUEST= 0X80, + NFAPI_NR_PHY_MSG_TYPE_UL_TTI_REQUEST= 0X81, + NFAPI_NR_PHY_MSG_TYPE_SLOT_INDICATION=0X82, + NFAPI_NR_PHY_MSG_TYPE_UL_DCI_REQUEST= 0X83, + NFAPI_NR_PHY_MSG_TYPE_TX_DATA_REQUEST=0X54, + NFAPI_NR_PHY_MSG_TYPE_RX_DATA_INDICATION=0X85, + NFAPI_NR_PHY_MSG_TYPE_CRC_INDICATION= 0X86, + NFAPI_NR_PHY_MSG_TYPE_UCI_INDICATION= 0X87, + NFAPI_NR_PHY_MSG_TYPE_SRS_INDICATION= 0X88, + NFAPI_NR_PHY_MSG_TYPE_PACH_INDICATION= 0X89 + //RESERVED 0X8a ~ 0xff +} nfapi_nr_phy_msg_type_e; + +// SCF222_5G-FAPI_PHY_SPI_Specificayion.pdf Section 3.3 + +//3.3.1 PARAM + +//same with nfapi_param_request_t ? +typedef struct { + nfapi_p4_p5_message_header_t header; + nfapi_vendor_extension_tlv_t vendor_extension; +} nfapi_nr_param_request_t; + +typedef struct { + nfapi_nr_param_errors_e error_code; + //Number of TLVs contained in the message body. + uint8_t number_of_tlvs; + nfapi_nr_param_tlv_t TLV; +} nfapi_nr_param_response_t; + +typedef enum { + NFAPI_NR_PARAM_MSG_OK = 0, + NFAPI_NR_PARAM_MSG_INVALID_STATE +} nfapi_nr_param_errors_e; + +//PARAM and CONFIG TLVs are used in the PARAM and CONFIG message exchanges, respectively +typedef struct { + nfapi_tl_t tl; + uint16_t value; +} nfapi_nr_param_tlv_t; + +//nfapi_nr_param_tlv_format_t cell param ~ measurement_param: + +//table 3-9 + +#define NFAPI_NR_PARAM_TLV_RELEASE_CAPABILITY_TAG 0x0001 +#define NFAPI_NR_PARAM_TLV_PHY_STATE_TAG 0x0002 +#define NFAPI_NR_PARAM_TLV_SKIP_BLANK_DL_CONFIG_TAG 0x0003 +#define NFAPI_NR_PARAM_TLV_SKIP_BLANK_UL_CONFIG_TAG 0x0004 +#define NFAPI_NR_PARAM_TLV_NUM_CONFIG_TLVS_TO_REPORT_TAG 0x0005 +#define NFAPI_NR_PARAM_TLV_CYCLIC_PREFIX_TAG 0x0006 +#define NFAPI_NR_PARAM_TLV_SUPPORTED_SUBCARRIER_SPACINGS_DL_TAG 0x0007 +#define NFAPI_NR_PARAM_TLV_SUPPORTED_BANDWIDTH_DL_TAG 0x0008 +#define NFAPI_NR_PARAM_TLV_SUPPORTED_SUBCARRIER_SPACINGS_UL_TAG 0x0009 +#define NFAPI_NR_PARAM_TLV_SUPPORTED_BANDWIDTH_UL_TAG 0x000A +#define NFAPI_NR_PARAM_TLV_CCE_MAPPING_TYPE_TAG 0x000B +#define NFAPI_NR_PARAM_TLV_CORESET_OUTSIDE_FIRST_3_OFDM_SYMS_OF_SLOT_TAG 0x000C +#define NFAPI_NR_PARAM_TLV_PRECODER_GRANULARITY_CORESET_TAG 0x000D +#define NFAPI_NR_PARAM_TLV_PDCCH_MU_MIMO_TAG 0x000E +#define NFAPI_NR_PARAM_TLV_PDCCH_PRECODER_CYCLING_TAG 0x000F +#define NFAPI_NR_PARAM_TLV_MAX_PDCCHS_PER_SLOT_TAG 0x0010 +#define NFAPI_NR_PARAM_TLV_PUCCH_FORMATS_TAG 0x0011 +#define NFAPI_NR_PARAM_TLV_MAX_PUCCHS_PER_SLOT_TAG 0x0012 +#define NFAPI_NR_PARAM_TLV_PDSCH_MAPPING_TYPE_TAG 0x0013 +#define NFAPI_NR_PARAM_TLV_PDSCH_ALLOCATION_TYPES_TAG 0x0014 +#define NFAPI_NR_PARAM_TLV_PDSCH_VRB_TO_PRB_MAPPING_TAG 0x0015 +#define NFAPI_NR_PARAM_TLV_PDSCH_CBG_TAG 0x0016 +#define NFAPI_NR_PARAM_TLV_PDSCH_DMRS_CONFIG_TYPES_TAG 0x0017 +#define NFAPI_NR_PARAM_TLV_PDSCH_DMRS_MAX_LENGTH_TAG 0x0018 +#define NFAPI_NR_PARAM_TLV_PDSCH_DMRS_ADDITIONAL_POS_TAG 0x0019 +#define NFAPI_NR_PARAM_TLV_MAX_PDSCH_S_YBS_PER_SLOT_TAG 0x001A +#define NFAPI_NR_PARAM_TLV_MAX_NUMBER_MIMO_LAYERS_PDSCH_TAG 0x001B +#define NFAPI_NR_PARAM_TLV_SUPPORTED_MAX_MODULATION_ORDER_DL_TAG 0x001C +#define NFAPI_NR_PARAM_TLV_MAX_MU_MIMO_USERS_DL_TAG 0x001D +#define NFAPI_NR_PARAM_TLV_PDSCH_DATA_IN_DMRS_SYMBOLS_TAG 0x001E +#define NFAPI_NR_PARAM_TLV_PREMPTION_SUPPORT_TAG 0x001F +#define NFAPI_NR_PARAM_TLV_PDSCH_NON_SLOT_SUPPORT_TAG 0x0020 +#define NFAPI_NR_PARAM_TLV_UCI_MUX_ULSCH_IN_PUSCH_TAG 0x0021 +#define NFAPI_NR_PARAM_TLV_UCI_ONLY_PUSCH_TAG 0x0022 +#define NFAPI_NR_PARAM_TLV_PUSCH_FREQUENCY_HOPPING_TAG 0x0023 +#define NFAPI_NR_PARAM_TLV_PUSCH_DMRS_CONFIG_TYPES_TAG 0x0024 +#define NFAPI_NR_PARAM_TLV_PUSCH_DMRS_MAX_LEN_TAG 0x0025 +#define NFAPI_NR_PARAM_TLV_PUSCH_DMRS_ADDITIONAL_POS_TAG 0x0026 +#define NFAPI_NR_PARAM_TLV_PUSCH_CBG_TAG 0x0027 +#define NFAPI_NR_PARAM_TLV_PUSCH_MAPPING_TYPE_TAG 0x0028 +#define NFAPI_NR_PARAM_TLV_PUSCH_ALLOCATION_TYPES_TAG 0x0029 +#define NFAPI_NR_PARAM_TLV_PUSCH_VRB_TO_PRB_MAPPING_TAG 0x002A +#define NFAPI_NR_PARAM_TLV_PUSCH_MAX_PTRS_PORTS_TAG 0x002B +#define NFAPI_NR_PARAM_TLV_MAX_PDUSCHS_TBS_PER_SLOT_TAG 0x002C +#define NFAPI_NR_PARAM_TLV_MAX_NUMBER_MIMO_LAYERS_NON_CB_PUSCH_TAG 0x002D +#define NFAPI_NR_PARAM_TLV_SUPPORTED_MODULATION_ORDER_UL_TAG 0x002E +#define NFAPI_NR_PARAM_TLV_MAX_MU_MIMO_USERS_UL_TAG 0x002F +#define NFAPI_NR_PARAM_TLV_DFTS_OFDM_SUPPORT_TAG 0x0030 +#define NFAPI_NR_PARAM_TLV_PUSCH_AGGREGATION_FACTOR_TAG 0x0031 +#define NFAPI_NR_PARAM_TLV_PRACH_LONG_FORMATS_TAG 0x0032 +#define NFAPI_NR_PARAM_TLV_PRACH_SHORT_FORMATS_TAG 0x0033 +#define NFAPI_NR_PARAM_TLV_PRACH_RESTRICTED_SETS_TAG 0x0034 +#define NFAPI_NR_PARAM_TLV_MAX_PRACH_FD_OCCASIONS_IN_A_SLOT_TAG 0x0035 +#define NFAPI_NR_PARAM_TLV_RSSI_MEASUREMENT_SUPPORT_TAG 0x0036 + +typedef struct +{ + uint16_t release_capability; + uint16_t phy_state; + uint8_t skip_blank_dl_config; + uint8_t skip_blank_ul_config; + nfapi_nr_num_config_tlvs_to_report* num_config_tlvs_to_report_list; +} nfapi_nr_cell_param_t; + +typedef struct{ + uint16_t num_config_tlvs_to_report; + nfapi_nr_param_tlv_t tlv; +} nfapi_nr_num_config_tlvs_to_report; + +//table 3-10 Carrier parameters +typedef struct +{ + uint8_t cyclic_prefix; + uint8_t supported_subcarrier_spacings_dl; + uint16_t supported_bandwidth_dl; + uint8_t supported_subcarrier_spacings_ul; + uint16_t supported_bandwidth_ul; + +} nfapi_nr_carrier_param_t; + +//table 3-11 PDCCH parameters +typedef struct +{ + uint8_t cce_mapping_type; + uint8_t coreset_outside_first_3_of_ofdm_syms_of_slot; + uint8_t coreset_precoder_granularity_coreset; + uint8_t pdcch_mu_mimo; + uint8_t pdcch_precoder_cycling; + uint8_t max_pdcch_per_slot; + +} nfapi_nr_pdcch_param_t; + +//table 3-12 PUCCH parameters +typedef struct +{ + uint8_t pucch_formats; + uint8_t max_pucchs_per_slot; + +} nfapi_nr_pucch_param_t; + +//table 3-13 PDSCH parameters +typedef struct +{ + +} nfapi_nr_pdsch_param_t; + +//table 3-14 +typedef struct +{ + +} nfapi_nr_pusch_param_t; + +//table 3-15 +typedef struct +{ + +} nfapi_nr_prach_param_t; + +//table 3-16 +typedef struct +{ + +} nfapi_nr_measurement_param_t; + +//-------------------------------------------// +//3.3.2 CONFIG + +typedef struct { + uint8_t number_of_tlvs; + nfapi_nr_config_tlv_t tlv; +} nfapi_nr_config_request_t; + +typedef struct { + nfapi_tl_t tl; + uint16_t value; +} nfapi_nr_config_tlv_t; + +typedef struct { + nfapi_nr_config_errors_e error_code; + uint8_t number_of_invalid_tlvs; + uint8_t unmber_of_missing_tlvs; + //? ↓ + nfapi_nr_config_tlv_t tlv; +} nfapi_nr_config_response_t; + +typedef enum { + NFAPI_NR_CONFIG_MSG_OK = 0, + NFAPI_NR_CONFIG_MSG_INVALID_STATE +} nfapi_nr_config_errors_e; + +//nfapi_nr_config_tlv_format_t carrier config ~ precoding config: + +//table 3-21 +typedef struct +{ + +} nfapi_nr_carrier_config_t; + +//table 3-22 +typedef struct +{ + +} nfapi_nr_cell_config_t; + +//table 3-23 +typedef struct +{ + +} nfapi_nr_ssb_config_t; + +//table 3-24 +typedef struct +{ + +} nfapi_nr_prach_config_t; + +//table 3-25 +typedef struct +{ + +} nfapi_nr_ssb_table_t; + +//table 3-26 +typedef struct +{ + +} nfapi_nr_tdd_tablr_t; + +//table 3-27 +typedef struct +{ + +} nfapi_nr_measurement_config_t; + +//table 3-32 +typedef struct +{ + +} nfapi_nr_beamforming_table_t; + +//table 3-33 +typedef struct +{ + +} nfapi_nr_precoding_table_t; + +//------------------------------// +//3.3.3 START + +// ? +typedef struct { + nfapi_p4_p5_message_header_t header; + nfapi_vendor_extension_tlv_t vendor_extension; +} nfapi_nr_start_request_t; + +typedef enum { + NFAPI_NR_START_MSG_INVALID_STATE +} nfapi_nr_start_errors_e; + +//3.3.4 STOP + +// ? +typedef struct { + nfapi_p4_p5_message_header_t header; + nfapi_vendor_extension_tlv_t vendor_extension; +} nfapi_nr_stop_request_t; + +// ? +typedef struct { + nfapi_p4_p5_message_header_t header; + nfapi_vendor_extension_tlv_t vendor_extension; +} nfapi_nr_stop_indication_t; + +typedef enum { + NFAPI_NR_STOP_MSG_INVALID_STATE +} nfapi_nr_stop_errors_e; + +//3.3.5 PHY Notifications + +typedef struct { + uint16_t sfn; //0~1023 + uint16_t slot;//0~319 + nfapi_nr_phy_msg_type_e msg_id;//Indicate which message received by the PHY has an error. Values taken from Table 3-4. + nfapi_nr_phy_notifications_errors_e error_code; +} nfapi_nr_phy_notifications_error_indicate_t; + +typedef enum { + NFAPI_NR_PHY_API_MSG_OK =0x0, + NFAPI_NR_PHY_API_MSG_INVALID_STATE =0x1, + NFAPI_NR_PHY_API_MSG_INVALID_CONFIG =0x2, + NFAPI_NR_PHY_API_SFN_OUT_OF_SYNC =0X03, + NFAPI_NR_PHY_API_MSG_SLOR_ERR =0X04, + NFAPI_NR_PHY_API_MSG_BCH_MISSING =0X05, + NFAPI_NR_PHY_API_MSG_INVALID_SFN =0X06, + NFAPI_NR_PHY_API_MSG_UL_DCI_ERR =0X07, + NFAPI_NR_PHY_API_MSG_TX_ERR =0X08 +} nfapi_nr_phy_notifications_errors_e; + + +//-----------------------// +//3.3.6 Storing Precoding and Beamforming Tables + +typedef struct { + uint16_t num_dig_beams; //0~65535 + uint16_t num_txrus; //0~65535 + nfapi_nr_dig_beam_t* dig_beam_list; + nfapi_nr_txru_t* txru_list; +} nfapi_nr_dbt_pdu_t; + +typedef struct { + uint16_t beam_idx; //0~65535 +} nfapi_nr_dig_beam_t; + +typedef struct { + uint16_t dig_beam_weight_Re; + uint16_t dig_beam_weight_Im; +} nfapi_nr_txru_t; + +//? table 3-33 +typedef struct { + uint16_t pm_idx; //0~65535 + nfapi_nr_num_layers_t* num_layers_list; //0~65535 + nfapi_nr_num_ant_ports_t* num_ant_ports_list; +} nfapi_nr_pm_pdu_t; + +typedef struct { + uint16_t numLayers; //0~65535 + nfapi_nr_num_ant_ports_t* num_ant_ports_list; +} nfapi_nr_num_layers_t; + +typedef struct { + uint16_t num_ant_ports; + int16_t precoder_weight_Re; + int16_t precoder_weight_Im; +} nfapi_nr_num_ant_ports_t; + +// Section 3.4 + +//3.4.1 + +#endif From 4d84f5cd872799deba619a32a2b264c82021540a Mon Sep 17 00:00:00 2001 From: Kujou <874864293@qq.com> Date: Wed, 14 Aug 2019 21:39:43 +0800 Subject: [PATCH 2/8] to test --- .vscode/launch.json | 28 + .../nfapi/public_inc/nfapi_nr_interface_scf.h | 934 ++++-------------- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c | 2 +- openair2/NR_PHY_INTERFACE/nfapi_5g_test.c | 20 + 4 files changed, 246 insertions(+), 738 deletions(-) create mode 100644 .vscode/launch.json create mode 100644 openair2/NR_PHY_INTERFACE/nfapi_5g_test.c diff --git a/.vscode/launch.json b/.vscode/launch.json new file mode 100644 index 0000000000..6757ed47f6 --- /dev/null +++ b/.vscode/launch.json @@ -0,0 +1,28 @@ +{ + // Use IntelliSense to learn about possible attributes. + // Hover to view descriptions of existing attributes. + // For more information, visit: https://go.microsoft.com/fwlink/?linkid=830387 + "version": "0.2.0", + "configurations": [ + { + "name": "(gdb) Launch", + "type": "cppdbg", + "request": "launch", + "program": "enter program name, for example ${workspaceFolder}/a.exe", + "args": [], + "stopAtEntry": false, + "cwd": "${workspaceFolder}", + "environment": [], + "externalConsole": false, + "MIMode": "gdb", + "miDebuggerPath": "/path/to/gdb", + "setupCommands": [ + { + "description": "Enable pretty-printing for gdb", + "text": "-enable-pretty-printing", + "ignoreFailures": true + } + ] + } + ] +} \ No newline at end of file diff --git a/nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface_scf.h b/nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface_scf.h index c62c316ab9..cec382b95f 100644 --- a/nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface_scf.h +++ b/nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface_scf.h @@ -1,17 +1,17 @@ /* nfapi_nr_interface.h ------------------- - AUTHOR : Raymond Knopp, Guy de Souza, WEI-TAI CHEN, Chenyu Zhang - COMPANY : EURECOM, NTUST - EMAIL : Lionel.Gauthier@eurecom.fr, desouza@eurecom.fr, kroempa@gmail.com + AUTHOR : Chenyu Zhang, Florian Kaltenberger + COMPANY : BUPT, EURECOM + EMAIL : octopus@bupt.edu.cn, florian.kaltenberger@eurecom.fr */ -#ifndef _NFAPI_NR_INTERFACE_H_ -#define _NFAPI_NR_INTERFACE_H_ +#ifndef _NFAPI_NR_INTERFACE_SCF_H_ +#define _NFAPI_NR_INTERFACE_SCF_H_ +#include "stddef.h" #include "nfapi_interface.h" - #define NFAPI_NR_MAX_NB_CCE_AGGREGATION_LEVELS 5 #define NFAPI_NR_MAX_NB_TCI_STATES_PDCCH 64 #define NFAPI_NR_MAX_NB_CORESETS 12 @@ -28,702 +28,9 @@ typedef struct { uint32_t value; } nfapi_uint32_tlv_t; -/*typedef struct { - nfapi_tl_t tl; - int64_t value; -} nfapi_int64_tlv_t;*/ - -typedef struct { - nfapi_tl_t tl; - uint64_t value; -} nfapi_uint64_tlv_t; - -// nFAPI enums -typedef enum { - NFAPI_NR_DL_CONFIG_DCI_DL_PDU_TYPE = 0, - NFAPI_NR_DL_CONFIG_BCH_PDU_TYPE, - NFAPI_NR_DL_CONFIG_DLSCH_PDU_TYPE, - NFAPI_NR_DL_CONFIG_PCH_PDU_TYPE, - NFAPI_NR_DL_CONFIG_NBCH_PDU_TYPE, - NFAPI_NR_DL_CONFIG_NPDCCH_PDU_TYPE, - NFAPI_NR_DL_CONFIG_NDLSCH_PDU_TYPE -} nfapi_nr_dl_config_pdu_type_e; - -//These TLVs are used exclusively by nFAPI -typedef struct -{ - // These TLVs are used to setup the transport connection between VNF and PNF - // nfapi_ipv4_address_t p7_vnf_address_ipv4; - // nfapi_ipv6_address_t p7_vnf_address_ipv6; - // nfapi_uint16_tlv_t p7_vnf_port; - - // nfapi_ipv4_address_t p7_pnf_address_ipv4; - // nfapi_ipv6_address_t p7_pnf_address_ipv6; - // nfapi_uint16_tlv_t p7_pnf_port; - - // // These TLVs are used to setup the transport connection between VNF and PNF - // nfapi_uint8_tlv_t dl_ue_per_sf; - // nfapi_uint8_tlv_t ul_ue_per_sf; - - // These TLVs are used by PNF to report its RF capabilities to the VNF software - nfapi_rf_bands_t rf_bands; - - // These TLVs are used by the VNF to configure the synchronization with the PNF. - // nfapi_uint8_tlv_t timing_window; - // nfapi_uint8_tlv_t timing_info_mode; - // nfapi_uint8_tlv_t timing_info_period; - - // These TLVs are used by the VNF to configure the RF in the PNF - // nfapi_uint16_tlv_t max_transmit_power; - nfapi_uint32_tlv_t nrarfcn; - - // nfapi_nmm_frequency_bands_t nmm_gsm_frequency_bands; - // nfapi_nmm_frequency_bands_t nmm_umts_frequency_bands; - // nfapi_nmm_frequency_bands_t nmm_lte_frequency_bands; - // nfapi_uint8_tlv_t nmm_uplink_rssi_supported; - -} nfapi_nr_nfapi_t; - -#define NFAPI_NR_NFAPI_P7_VNF_ADDRESS_IPV4_TAG 0x5100 -#define NFAPI_NR_NFAPI_P7_VNF_ADDRESS_IPV6_TAG 0x5101 -#define NFAPI_NR_NFAPI_P7_VNF_PORT_TAG 0x5102 -#define NFAPI_NR_NFAPI_P7_PNF_ADDRESS_IPV4_TAG 0x5103 -#define NFAPI_NR_NFAPI_P7_PNF_ADDRESS_IPV6_TAG 0x5104 -#define NFAPI_NR_NFAPI_P7_PNF_PORT_TAG 0x5105 - -#define NFAPI_NR_NFAPI_DOWNLINK_UES_PER_SUBFRAME_TAG 0x510A -#define NFAPI_NR_NFAPI_UPLINK_UES_PER_SUBFRAME_TAG 0x510B -#define NFAPI_NR_NFAPI_RF_BANDS_TAG 0x5114 -#define NFAPI_NR_NFAPI_TIMING_WINDOW_TAG 0x511E -#define NFAPI_NR_NFAPI_TIMING_INFO_MODE_TAG 0x511F -#define NFAPI_NR_NFAPI_TIMING_INFO_PERIOD_TAG 0x5120 -#define NFAPI_NR_NFAPI_MAXIMUM_TRANSMIT_POWER_TAG 0x5128 -#define NFAPI_NR_NFAPI_NRARFCN_TAG 0x5129 -#define NFAPI_NR_NFAPI_NMM_GSM_FREQUENCY_BANDS_TAG 0x5130 -#define NFAPI_NR_NFAPI_NMM_UMTS_FREQUENCY_BANDS_TAG 0x5131 -#define NFAPI_NR_NFAPI_NMM_LTE_FREQUENCY_BANDS_TAG 0x5132 -#define NFAPI_NR_NFAPI_NMM_UPLINK_RSSI_SUPPORTED_TAG 0x5133 - -// P5 Message Structures - -typedef struct{ - nfapi_tl_t tl; - uint16_t corset_ID; ///// L1 parameter 'CORESET-ID' - uint16_t freq_dom; ///// L1 parameter 'CORESET-freq-dom' - uint16_t duration; ///// L1 parameter 'CORESET-time-duration' - uint16_t reg_type; ///// L1 parameter 'CORESET-CCE-REG-mapping-type' - uint16_t reg_bundlesize; ///// L1 parameter 'CORESET-REG-bundle-size' - uint16_t interleaversize; ///// L1 parameter 'CORESET-interleaver-size' - uint16_t shiftindex; ///// L1 parameter 'CORESET-shift-index' - uint16_t precodergranularity; ///// L1 parameter 'CORESET-precoder-granuality' - uint16_t tci_stateId; ///// L1 parameter 'TCI-StatesPDCCH' - uint16_t tci_present; ///// L1 parameter 'TCI-PresentInDCI' - uint16_t dmrs_scramblingID; ///// L1 parameter 'PDCCH-DMRS-Scrambling-ID' -} nfapi_nr_ControlResourcesSet_t; - -typedef struct{ - nfapi_tl_t tl; - nfapi_nr_ControlResourcesSet_t coreset; - uint16_t monitoringSlotPeriodicityAndOffset; ///// L1 parameters 'Montoring-periodicity-PDCCH-slot' - uint16_t monitoringSymbolsWithinSlot; ///// L1 parameter 'Montoring-symbols-PDCCH-within-slot' - uint16_t nrofCand_aggLevel1; ///// L1 parameter 'Aggregation-level-1' - uint16_t nrofCand_aggLevel2; ///// L1 parameter 'Aggregation-level-2' - uint16_t nrofCand_aggLevel4; ///// L1 parameter 'Aggregation-level-4' - uint16_t nrofCand_aggLevel8; ///// L1 parameter 'Aggregation-level-8' - uint16_t nrofCand_aggLevel16; ///// L1 parameter 'Aggregation-level-16' - uint16_t sfi_agg_fmt2_0; ///// L1 parameters 'SFI-Num-PDCCH-cand' and 'SFI-Aggregation-Level' - uint16_t monitoringperiodicity_fmt2_3; ///// L1 parameter 'SRS-monitoring-periodicity' - uint16_t nrof_candidates_fmt_2_3; ///// L1 parameter 'SRS-Num-PDCCH-cand' -} nfapi_nr_SearchSpace_t; - - -typedef struct { - nfapi_uint16_tlv_t numerology_index_mu; - nfapi_uint16_tlv_t duplex_mode; - nfapi_uint16_tlv_t dl_cyclic_prefix_type; - nfapi_uint16_tlv_t ul_cyclic_prefix_type; -} nfapi_nr_subframe_config_t; - -#define NFAPI_NR_SUBFRAME_CONFIG_DUPLEX_MODE_TAG 0x5001 -#define NFAPI_NR_SUBFRAME_CONFIG_PCFICH_POWER_OFFSET_TAG 0x5002 -#define NFAPI_NR_SUBFRAME_CONFIG_PB_TAG 0x5003 -#define NFAPI_NR_SUBFRAME_CONFIG_DL_CYCLIC_PREFIX_TYPE_TAG 0x5004 -#define NFAPI_NR_SUBFRAME_CONFIG_UL_CYCLIC_PREFIX_TYPE_TAG 0x5005 -#define NFAPI_NR_SUBFRAME_CONFIG_NUMEROLOGY_INDEX_MU_TAG 0x5006 - -typedef struct { - nfapi_uint16_tlv_t dl_carrier_bandwidth; - nfapi_uint16_tlv_t ul_carrier_bandwidth; - nfapi_uint16_tlv_t dl_bwp_subcarrierspacing; - nfapi_uint16_tlv_t ul_bwp_subcarrierspacing; - nfapi_uint16_tlv_t dl_locationandbandwidth; - nfapi_uint16_tlv_t ul_locationandbandwidth; - nfapi_uint16_tlv_t dl_absolutefrequencypointA; - nfapi_uint16_tlv_t ul_absolutefrequencypointA; - nfapi_uint16_tlv_t dl_offsettocarrier; - nfapi_uint16_tlv_t ul_offsettocarrier; - nfapi_uint16_tlv_t dl_subcarrierspacing; - nfapi_uint16_tlv_t ul_subcarrierspacing; - nfapi_uint16_tlv_t dl_specificcarrier_k0; - nfapi_uint16_tlv_t ul_specificcarrier_k0; - nfapi_uint16_tlv_t NIA_subcarrierspacing; -} nfapi_nr_rf_config_t; - -#define NFAPI_NR_RF_CONFIG_DL_CARRIER_BANDWIDTH_TAG 0x500A -#define NFAPI_NR_RF_CONFIG_UL_CARRIER_BANDWIDTH_TAG 0x500B -#define NFAPI_NR_RF_CONFIG_DL_SUBCARRIERSPACING_TAG 0x500C -#define NFAPI_NR_RF_CONFIG_UL_SUBCARRIERSPACING_TAG 0x500D - -typedef struct { - nfapi_uint16_tlv_t physical_cell_id; - nfapi_uint16_tlv_t half_frame_index; - nfapi_uint16_tlv_t ssb_subcarrier_offset; - nfapi_uint16_tlv_t ssb_sib1_position_in_burst; // in sib1 - nfapi_uint64_tlv_t ssb_scg_position_in_burst; // in servingcellconfigcommon - nfapi_uint16_tlv_t ssb_periodicity; - nfapi_uint16_tlv_t ss_pbch_block_power; - nfapi_uint16_tlv_t n_ssb_crb; - nfapi_uint16_tlv_t rmsi_pdcch_config; -} nfapi_nr_sch_config_t; - -#define NFAPI_NR_SCH_CONFIG_PHYSICAL_CELL_ID_TAG 0x501E -#define NFAPI_NR_SCH_CONFIG_HALF_FRAME_INDEX_TAG 0x501F -#define NFAPI_NR_SCH_CONFIG_SSB_SUBCARRIER_OFFSET_TAG 0x5020 -#define NFAPI_NR_SCH_CONFIG_SSB_POSITION_IN_BURST 0x5021 -#define NFAPI_NR_SCH_CONFIG_SSB_PERIODICITY 0x5022 -#define NFAPI_NR_SCH_CONFIG_SS_PBCH_BLOCK_POWER 0x5023 -#define NFAPI_NR_SCH_CONFIG_N_SSB_CRB 0x5024 - -typedef struct { - nfapi_uint16_tlv_t data_scrambling_id; - nfapi_uint16_tlv_t dmrs_typeA_position; - nfapi_uint16_tlv_t dmrs_additional_position; - nfapi_uint16_tlv_t dmrs_type; - nfapi_uint16_tlv_t dmrs_max_length; - nfapi_uint16_tlv_t mapping_type; - nfapi_uint16_tlv_t resource_allocation; - nfapi_uint16_tlv_t time_allocation_list; - nfapi_uint16_tlv_t mcs_table; - nfapi_uint16_tlv_t aggregation_factor; - nfapi_uint16_tlv_t prb_bundling_type; - nfapi_uint16_tlv_t rbg_size; - nfapi_uint16_tlv_t vrb_to_prb_interleaver; - nfapi_uint16_tlv_t code_block_groug_transmission; - nfapi_uint16_tlv_t x_overhead; - nfapi_uint16_tlv_t max_dci_codewords; - -} nfapi_nr_pdsch_config_t; -#define NFAPI_NR_PDSCH_CONFIG_TAG - - -typedef struct { - nfapi_uint16_tlv_t prach_RootSequenceIndex; ///// L1 parameter 'PRACHRootSequenceIndex' - nfapi_uint16_tlv_t prach_msg1_SubcarrierSpacing; ///// L1 parameter 'prach-Msg1SubcarrierSpacing' - nfapi_uint16_tlv_t restrictedSetConfig; - nfapi_uint16_tlv_t msg3_transformPrecoding; ///// L1 parameter 'msg3-tp' - /////////////////--------------------NR RACH-ConfigGeneric--------------------///////////////// - nfapi_uint16_tlv_t prach_ConfigurationIndex; ///// L1 parameter 'PRACHConfigurationIndex' - nfapi_uint16_tlv_t prach_msg1_FDM; ///// L1 parameter 'prach-FDM' - nfapi_uint16_tlv_t prach_msg1_FrequencyStart; ///// L1 parameter 'prach-frequency-start' - nfapi_uint16_tlv_t zeroCorrelationZoneConfig; - nfapi_uint16_tlv_t preambleReceivedTargetPower; -} nfapi_nr_rach_config_t; - -typedef struct { - nfapi_uint16_tlv_t groupHoppingEnabledTransformPrecoding; ///// L1 parameter 'Group-hopping-enabled-Transform-precoding' - nfapi_uint16_tlv_t msg3_DeltaPreamble; ///// L1 parameter 'Delta-preamble-msg3' - nfapi_uint16_tlv_t p0_NominalWithGrant; ///// L1 parameter 'p0-nominal-pusch-withgrant' - nfapi_uint16_tlv_t TimeDomainResourceAllocation_k2; ///// L1 parameter 'K2' - nfapi_uint16_tlv_t TimeDomainResourceAllocation_mappingType; ///// L1 parameter 'Mapping-type' -} nfapi_nr_pusch_config_t; - -typedef struct { - nfapi_uint16_tlv_t pucch_GroupHopping; ///// L1 parameter 'PUCCH-GroupHopping' - nfapi_uint16_tlv_t p0_nominal; ///// L1 parameter 'p0-nominal-pucch' -} nfapi_nr_pucch_config_t; - - -typedef struct { - nfapi_tl_t tl; - nfapi_nr_SearchSpace_t sib1searchSpace; - nfapi_nr_SearchSpace_t sibssearchSpace; - nfapi_nr_SearchSpace_t ra_SearchSpace; -}nfapi_nr_pdcch_config_t; - -typedef struct { -//NR TDD-UL-DL-ConfigCommon ///// L1 parameter 'UL-DL-configuration-common' - nfapi_uint16_tlv_t subcarrierspacing; ///// L1 parameter 'reference-SCS' - nfapi_uint16_tlv_t dl_ul_periodicity; ///// L1 parameter 'DL-UL-transmission-periodicity' - nfapi_uint16_tlv_t nrofDownlinkSlots; ///// L1 parameter 'number-of-DL-slots' - nfapi_uint16_tlv_t nrofDownlinkSymbols; ///// L1 parameter 'number-of-DL-symbols-common' - nfapi_uint16_tlv_t nrofUplinkSlots; ///// L1 parameter 'number-of-UL-slots' - nfapi_uint16_tlv_t nrofUplinkSymbols; ///// L1 parameter 'number-of-UL-symbols-common' -} nfapi_nr_tdd_ul_dl_config_t; - -typedef struct { - //RateMatchPattern is used to configure one rate matching pattern for PDSCH ///// L1 parameter 'Resource-set-cekk' - nfapi_uint16_tlv_t Match_Id; - nfapi_uint16_tlv_t patternType; - nfapi_uint16_tlv_t symbolsInResourceBlock; ///// L1 parameter 'rate-match-PDSCH-bitmap2 - nfapi_uint16_tlv_t periodicityAndPattern; ///// L1 parameter 'rate-match-PDSCH-bitmap3' - nfapi_uint16_tlv_t controlResourceSet; - nfapi_uint16_tlv_t subcarrierSpacing; ///// L1 parameter 'resource-pattern-scs' - nfapi_uint16_tlv_t mode; -} nfapi_nr_ratematchpattern_t; - -typedef struct { - //NR RateMatchPatternLTE-CRS - nfapi_uint16_tlv_t carrierfreqDL; ///// L1 parameter 'center-subcarrier-location' - nfapi_uint16_tlv_t dl_bandwidth; ///// L1 parameter 'BW' - nfapi_uint16_tlv_t nrofcrs_Ports; ///// L1 parameter 'rate-match-resources-numb-LTE-CRS-antenna-port' - nfapi_uint16_tlv_t v_Shift; ///// L1 parameter 'rate-match-resources-LTE-CRS-v-shift' - nfapi_uint16_tlv_t frame_Period; - nfapi_uint16_tlv_t frame_Offset; -} nfapi_nr_ratematchpattern_lte_crs_t; - -typedef struct { - nfapi_p4_p5_message_header_t header; - uint8_t num_tlv; - nfapi_nr_subframe_config_t subframe_config; - nfapi_nr_rf_config_t rf_config; - nfapi_nr_sch_config_t sch_config; - nfapi_nr_pdsch_config_t pdsch_config; - nfapi_nr_rach_config_t rach_config; - nfapi_nr_pusch_config_t pusch_config; - nfapi_nr_pucch_config_t pucch_config; - nfapi_nr_pdcch_config_t pdcch_config; - nfapi_nr_tdd_ul_dl_config_t tdd_ul_dl_config; - nfapi_nr_ratematchpattern_t ratematchpattern; - nfapi_nr_ratematchpattern_lte_crs_t ratematchpattern_lte_crs; - nfapi_nr_nfapi_t nfapi_config; - - nfapi_vendor_extension_tlv_t vendor_extension; -} nfapi_nr_config_request_t; - - - -typedef enum { - NFAPI_NR_DL_DCI_FORMAT_1_0 = 0, - NFAPI_NR_DL_DCI_FORMAT_1_1, - NFAPI_NR_DL_DCI_FORMAT_2_0, - NFAPI_NR_DL_DCI_FORMAT_2_1, - NFAPI_NR_DL_DCI_FORMAT_2_2, - NFAPI_NR_DL_DCI_FORMAT_2_3, - NFAPI_NR_UL_DCI_FORMAT_0_0, - NFAPI_NR_UL_DCI_FORMAT_0_1 -} nfapi_nr_dci_format_e; - -typedef enum { - NFAPI_NR_RNTI_new = 0, - NFAPI_NR_RNTI_C, - NFAPI_NR_RNTI_RA, - NFAPI_NR_RNTI_P, - NFAPI_NR_RNTI_CS, - NFAPI_NR_RNTI_TC, - NFAPI_NR_RNTI_SP_CSI, - NFAPI_NR_RNTI_SI, - NFAPI_NR_RNTI_SFI, - NFAPI_NR_RNTI_INT, - NFAPI_NR_RNTI_TPC_PUSCH, - NFAPI_NR_RNTI_TPC_PUCCH, - NFAPI_NR_RNTI_TPC_SRS -} nfapi_nr_rnti_type_e; - -typedef enum { - NFAPI_NR_USS_FORMAT_0_0_AND_1_0, - NFAPI_NR_USS_FORMAT_0_1_AND_1_1, -} nfapi_nr_uss_dci_formats_e; - -typedef enum { - NFAPI_NR_SEARCH_SPACE_TYPE_COMMON=0, - NFAPI_NR_SEARCH_SPACE_TYPE_UE_SPECIFIC -} nfapi_nr_search_space_type_e; - -typedef enum { - NFAPI_NR_COMMON_SEARCH_SPACE_TYPE_0=0, - NFAPI_NR_COMMON_SEARCH_SPACE_TYPE_0A, - NFAPI_NR_COMMON_SEARCH_SPACE_TYPE_1, - NFAPI_NR_COMMON_SEARCH_SPACE_TYPE_2 -} nfapi_nr_common_search_space_type_e; - -typedef enum { - NFAPI_NR_SSB_AND_CSET_MUX_PATTERN_TYPE1=0, - NFAPI_NR_SSB_AND_CSET_MUX_PATTERN_TYPE2, - NFAPI_NR_SSB_AND_CSET_MUX_PATTERN_TYPE3 -} nfapi_nr_ssb_and_cset_mux_pattern_type_e; - -typedef enum { - NFAPI_NR_CCE_REG_MAPPING_INTERLEAVED=0, - NFAPI_NR_CCE_REG_MAPPING_NON_INTERLEAVED -} nfapi_nr_cce_reg_mapping_type_e; - -typedef enum { - NFAPI_NR_CSET_CONFIG_MIB_SIB1=0, - NFAPI_NR_CSET_CONFIG_PDCCH_CONFIG, // implicit assumption of coreset Id other than 0 - NFAPI_NR_CSET_CONFIG_PDCCH_CONFIG_CSET_0 -} nfapi_nr_coreset_config_type_e; - -typedef enum { - NFAPI_NR_CSET_SAME_AS_REG_BUNDLE=0, - NFAPI_NR_CSET_ALL_CONTIGUOUS_RBS -} nfapi_nr_coreset_precoder_granularity_type_e; - -typedef enum { - NFAPI_NR_QCL_TYPE_A=0, - NFAPI_NR_QCL_TYPE_B, - NFAPI_NR_QCL_TYPE_C, - NFAPI_NR_QCL_TYPE_D -} nfapi_nr_qcl_type_e; - -typedef enum { - NFAPI_NR_SS_PERIODICITY_SL1=1, - NFAPI_NR_SS_PERIODICITY_SL2=2, - NFAPI_NR_SS_PERIODICITY_SL4=4, - NFAPI_NR_SS_PERIODICITY_SL5=5, - NFAPI_NR_SS_PERIODICITY_SL8=8, - NFAPI_NR_SS_PERIODICITY_SL10=10, - NFAPI_NR_SS_PERIODICITY_SL16=16, - NFAPI_NR_SS_PERIODICITY_SL20=20, - NFAPI_NR_SS_PERIODICITY_SL40=40, - NFAPI_NR_SS_PERIODICITY_SL80=80, - NFAPI_NR_SS_PERIODICITY_SL160=160, - NFAPI_NR_SS_PERIODICITY_SL320=320, - NFAPI_NR_SS_PERIODICITY_SL640=640, - NFAPI_NR_SS_PERIODICITY_SL1280=1280, - NFAPI_NR_SS_PERIODICITY_SL2560=2560 -} nfapi_nr_search_space_monitoring_periodicity_e; - -typedef enum { - NFAPI_NR_PDSCH_TIME_DOMAIN_ALLOC_TYPE_DEFAULT_A=0, - NFAPI_NR_PDSCH_TIME_DOMAIN_ALLOC_TYPE_DEFAULT_B, - NFAPI_NR_PDSCH_TIME_DOMAIN_ALLOC_TYPE_DEFAULT_C, - NFAPI_NR_PDSCH_TIME_DOMAIN_ALLOC_TYPE_ALLOC_LIST -} nfapi_nr_pdsch_time_domain_alloc_type_e; - -typedef enum { - NFAPI_NR_PDSCH_MAPPING_TYPE_A=0, - NFAPI_NR_PDSCH_MAPPING_TYPE_B -} nfapi_nr_pdsch_mapping_type_e; - -typedef enum { - NFAPI_NR_PDSCH_RBG_CONFIG_TYPE1=0, - NFAPI_NR_PDSCH_RBG_CONFIG_TYPE2 -} nfapi_nr_pdsch_rbg_config_type_e; - -typedef enum { - NFAPI_NR_PRG_GRANULARITY_2=2, - NFAPI_NR_PRG_GRANULARITY_4=4, - NFAPI_NR_PRG_GRANULARITY_WIDEBAND -} nfapi_nr_prg_granularity_e; - -typedef enum { - NFAPI_NR_PRB_BUNDLING_TYPE_STATIC=0, - NFAPI_NR_PRB_BUNDLING_TYPE_DYNAMIC -} nfapi_nr_prb_bundling_type_e; - -typedef enum { - NFAPI_NR_MCS_TABLE_QAM64_LOW_SE=0, - NFAPI_NR_MCS_TABLE_QAM256 -} nfapi_nr_pdsch_mcs_table_e; - -typedef enum { - NFAPI_NR_DMRS_TYPE1=0, - NFAPI_NR_DMRS_TYPE2 -} nfapi_nr_dmrs_type_e; - -// P7 Sub Structures - -typedef struct { - -nfapi_tl_t tl; - -uint8_t format_indicator; //1 bit -uint16_t frequency_domain_assignment; //up to 16 bits -uint8_t time_domain_assignment; // 4 bits -uint8_t frequency_hopping_flag; //1 bit - -uint8_t ra_preamble_index; //6 bits -uint8_t ss_pbch_index; //6 bits -uint8_t prach_mask_index; //4 bits - -uint8_t vrb_to_prb_mapping; //0 or 1 bit -uint8_t mcs; //5 bits -uint8_t ndi; //1 bit -uint8_t rv; //2 bits -uint8_t harq_pid; //4 bits -uint8_t dai; //0, 2 or 4 bits -uint8_t dai1; //1 or 2 bits -uint8_t dai2; //0 or 2 bits -uint8_t tpc; //2 bits -uint8_t pucch_resource_indicator; //3 bits -uint8_t pdsch_to_harq_feedback_timing_indicator; //0, 1, 2 or 3 bits - -uint8_t short_messages_indicator; //2 bits -uint8_t short_messages; //8 bits -uint8_t tb_scaling; //2 bits - -uint8_t carrier_indicator; //0 or 3 bits -uint8_t bwp_indicator; //0, 1 or 2 bits -uint8_t prb_bundling_size_indicator; //0 or 1 bits -uint8_t rate_matching_indicator; //0, 1 or 2 bits -uint8_t zp_csi_rs_trigger; //0, 1 or 2 bits -uint8_t transmission_configuration_indication; //0 or 3 bits -uint8_t srs_request; //2 bits -uint8_t cbgti; //CBG Transmission Information: 0, 2, 4, 6 or 8 bits -uint8_t cbgfi; //CBG Flushing Out Information: 0 or 1 bit -uint8_t dmrs_sequence_initialization; //0 or 1 bit - -uint8_t srs_resource_indicator; -uint8_t precoding_information; -uint8_t csi_request; -uint8_t ptrs_dmrs_association; -uint8_t beta_offset_indicator; //0 or 2 bits - -uint8_t slot_format_indicator_count; -uint8_t *slot_format_indicators; - -uint8_t pre_emption_indication_count; -uint16_t *pre_emption_indications; //14 bit - -uint8_t block_number_count; -uint8_t *block_numbers; - -uint8_t ul_sul_indicator; //0 or 1 bit -uint8_t antenna_ports; - -uint16_t reserved; //1_0/C-RNTI:10 bits, 1_0/P-RNTI: 6 bits, 1_0/SI-&RA-RNTI: 16 bits -uint16_t padding; - -} nfapi_nr_dl_config_dci_dl_pdu_rel15_t; - -//#define NFAPI_NR_DL_CONFIG_REQUEST_DCI_DL_PDU_REL15_TAG 0x???? - -typedef struct{ - nfapi_tl_t tl; - uint8_t coreset_id; - uint64_t frequency_domain_resources; - uint8_t duration; - uint8_t cce_reg_mapping_type; - uint8_t reg_bundle_size; - uint8_t interleaver_size; - uint8_t shift_index; - uint8_t precoder_granularity; - uint8_t tci_state_id; - uint8_t tci_present_in_dci; - uint32_t dmrs_scrambling_id; -} nfapi_nr_coreset_t; - -typedef struct{ - nfapi_tl_t tl; - uint8_t search_space_id; - uint8_t coreset_id; - uint8_t search_space_type; - uint8_t duration; - uint8_t css_formats_0_0_and_1_0; - uint8_t css_format_2_0; - uint8_t css_format_2_1; - uint8_t css_format_2_2; - uint8_t css_format_2_3; - uint8_t uss_dci_formats; - uint16_t srs_monitoring_periodicity; - uint16_t slot_monitoring_periodicity; - uint16_t slot_monitoring_offset; - uint16_t monitoring_symbols_in_slot; - uint16_t number_of_candidates[NFAPI_NR_MAX_NB_CCE_AGGREGATION_LEVELS]; -} nfapi_nr_search_space_t; - -typedef struct { - nfapi_tl_t tl; - uint16_t rnti; - uint8_t rnti_type; - uint8_t dci_format; - /// Number of CRB in BWP that this DCI configures - uint16_t n_RB_BWP; - uint8_t config_type; - uint8_t search_space_type; - uint8_t common_search_space_type; - uint8_t aggregation_level; - uint8_t n_rb; - uint8_t n_symb; - int8_t rb_offset; - uint8_t cr_mapping_type; - uint8_t reg_bundle_size; - uint8_t interleaver_size; - uint8_t shift_index; - uint8_t mux_pattern; - uint8_t precoder_granularity; - uint8_t first_slot; - uint8_t first_symbol; - uint8_t nb_ss_sets_per_slot; - uint8_t nb_slots; - uint8_t sfn_mod2; - uint16_t scrambling_id; - nfapi_bf_vector_t bf_vector; -} nfapi_nr_dl_config_pdcch_parameters_rel15_t; - -typedef struct { - nfapi_tl_t tl; - uint16_t length; - int16_t pdu_index; - uint16_t transmission_power; -} nfapi_nr_dl_config_bch_pdu_rel15_t; -#define NFAPI_NR_DL_CONFIG_REQUEST_BCH_PDU_REL15_TAG 0x5025 - -typedef struct { - nfapi_nr_dl_config_bch_pdu_rel15_t bch_pdu_rel15; -} nfapi_nr_dl_config_bch_pdu; - -typedef struct { - nfapi_tl_t tl; - uint16_t length; - uint8_t pdu_index; - uint16_t rnti; - uint16_t nb_mod_symbols; - uint8_t time_allocation_type; - uint8_t freq_allocation_type; - uint8_t start_prb; - uint8_t n_prb; - uint8_t start_symbol; - uint8_t nb_symbols; - uint8_t mcs_idx; - uint8_t ndi; - uint8_t nb_codewords; - uint8_t nb_layers; - uint16_t coding_rate; - uint8_t modulation; - uint8_t modulation_order; - uint16_t transport_block_size; - uint8_t nb_re_dmrs; - uint8_t time_alloc_list_flag; - uint8_t time_alloc_list; - uint8_t rbg_list; - uint8_t virtual_resource_block_assignment_flag; - uint32_t resource_block_coding; - uint8_t redundancy_version; - uint8_t transport_blocks; - uint8_t transmission_scheme; - uint8_t number_of_subbands; - uint8_t codebook_index[NFAPI_MAX_NUM_SUBBANDS]; - uint8_t ue_category_capacity; - uint8_t pa; - uint8_t delta_power_offset_index; - uint8_t ngap; - uint8_t transmission_mode; - uint8_t num_bf_prb_per_subband; - uint8_t num_bf_vector; - nfapi_bf_vector_t bf_vector[NFAPI_MAX_BF_VECTORS]; -}nfapi_nr_dl_config_dlsch_pdu_rel15_t; -#define NFAPI_NR_DL_CONFIG_REQUEST_DLSCH_PDU_REL15_TAG - -typedef struct { - nfapi_nr_dl_config_dlsch_pdu_rel15_t dlsch_pdu_rel15; -} nfapi_nr_dl_config_dlsch_pdu; - -typedef struct { - nfapi_tl_t tl; - nfapi_nr_search_space_t pagingSearchSpace; - nfapi_nr_coreset_t pagingControlResourceSets; -}nfapi_nr_dl_config_pch_pdu_rel15_t; - -typedef struct { - -} nfapi_nr_dl_config_nbch_pdu_rel15_t; - -typedef struct { - -} nfapi_nr_dl_config_npdcch_pdu_rel15_t; - -typedef struct { - -} nfapi_nr_dl_config_ndlsch_pdu_rel15_t; - -typedef struct { - nfapi_nr_dl_config_dci_dl_pdu_rel15_t dci_dl_pdu_rel15; - nfapi_nr_dl_config_pdcch_parameters_rel15_t pdcch_params_rel15; -} nfapi_nr_dl_config_dci_dl_pdu; - - -typedef struct { - uint8_t pdu_type; - uint8_t pdu_size; - - union { - nfapi_nr_dl_config_dci_dl_pdu dci_dl_pdu; - nfapi_nr_dl_config_bch_pdu_rel15_t bch_pdu_rel15; - nfapi_nr_dl_config_dlsch_pdu dlsch_pdu; - nfapi_nr_dl_config_pch_pdu_rel15_t pch_pdu_rel15; - nfapi_nr_dl_config_nbch_pdu_rel15_t nbch_pdu_rel15; - nfapi_nr_dl_config_npdcch_pdu_rel15_t npdcch_pdu_rel15; - nfapi_nr_dl_config_ndlsch_pdu_rel15_t ndlsch_pdu_rel15; - }; -} nfapi_nr_dl_config_request_pdu_t; - -typedef struct { - nfapi_tl_t tl; - uint8_t number_dci; - uint8_t number_pdu; - uint8_t number_pdsch_rnti; - nfapi_nr_dl_config_request_pdu_t *dl_config_pdu_list; -} nfapi_nr_dl_config_request_body_t; - -typedef struct { - nfapi_p7_message_header_t header; - uint16_t sfn_sf; - nfapi_nr_dl_config_request_body_t dl_config_request_body; - nfapi_vendor_extension_tlv_t vendor_extension; -} nfapi_nr_dl_config_request_t; - - -typedef enum {nr_pusch_freq_hopping_disabled = 0 , - nr_pusch_freq_hopping_enabled = 1 - } nr_pusch_freq_hopping_t; - -typedef struct{ - uint8_t aperiodicSRS_ResourceTrigger; -} nfapi_nr_ul_srs_config_t; - -typedef struct { - uint8_t bandwidth_part_ind; - uint16_t number_rbs; - uint16_t start_rb; - uint8_t frame_offset; - uint16_t number_symbols; - uint16_t start_symbol; - uint8_t nb_re_dmrs; - uint8_t length_dmrs; - nr_pusch_freq_hopping_t pusch_freq_hopping; - uint8_t mcs; - uint8_t Qm; - uint8_t ndi; - uint8_t rv; - int8_t accumulated_delta_PUSCH; - int8_t absolute_delta_PUSCH; - uint8_t n_layers; - uint8_t tpmi; - uint8_t n_dmrs_cdm_groups; - uint8_t dmrs_ports[4]; - uint8_t n_front_load_symb; - nfapi_nr_ul_srs_config_t srs_config; - uint8_t csi_reportTriggerSize; - uint8_t maxCodeBlockGroupsPerTransportBlock; - uint8_t ptrs_dmrs_association_port; - uint8_t beta_offset_ind; -} nfapi_nr_ul_config_ulsch_pdu_rel15_t; - -typedef struct { - uint16_t rnti; - nfapi_nr_ul_config_ulsch_pdu_rel15_t ulsch_pdu_rel15; -} nfapi_nr_ul_config_ulsch_pdu; - - - - - - +// 2019.8 // SCF222_5G-FAPI_PHY_SPI_Specificayion.pdf Section 3.2 -//typedef unsigned long int uint64_t; - //PHY API message types typedef enum { @@ -753,7 +60,7 @@ typedef enum { //3.3.1 PARAM -//same with nfapi_param_request_t ? +//same with nfapi_param_request_t typedef struct { nfapi_p4_p5_message_header_t header; nfapi_vendor_extension_tlv_t vendor_extension; @@ -769,12 +76,14 @@ typedef struct { typedef enum { NFAPI_NR_PARAM_MSG_OK = 0, NFAPI_NR_PARAM_MSG_INVALID_STATE + } nfapi_nr_param_errors_e; //PARAM and CONFIG TLVs are used in the PARAM and CONFIG message exchanges, respectively typedef struct { nfapi_tl_t tl; uint16_t value; + } nfapi_nr_param_tlv_t; //nfapi_nr_param_tlv_format_t cell param ~ measurement_param: @@ -838,7 +147,7 @@ typedef struct { typedef struct { - uint16_t release_capability; + uint16_t release_capability;//TAG 0x0001 uint16_t phy_state; uint8_t skip_blank_dl_config; uint8_t skip_blank_ul_config; @@ -853,7 +162,7 @@ typedef struct{ //table 3-10 Carrier parameters typedef struct { - uint8_t cyclic_prefix; + uint8_t cyclic_prefix;//TAG 0x0006 uint8_t supported_subcarrier_spacings_dl; uint16_t supported_bandwidth_dl; uint8_t supported_subcarrier_spacings_ul; @@ -869,7 +178,7 @@ typedef struct uint8_t coreset_precoder_granularity_coreset; uint8_t pdcch_mu_mimo; uint8_t pdcch_precoder_cycling; - uint8_t max_pdcch_per_slot; + uint8_t max_pdcch_per_slot;//TAG 0x0010 } nfapi_nr_pdcch_param_t; @@ -884,25 +193,61 @@ typedef struct //table 3-13 PDSCH parameters typedef struct { - + uint8_t pdsch_mapping_type; + uint8_t pdsch_allocation_types; + uint8_t pdsch_vrb_to_prb_mapping; + uint8_t pdsch_cbg; + uint8_t pdsch_dmrs_config_types; + uint8_t pdsch_dmrs_max_length; + uint8_t pdsch_dmrs_additional_pos; + uint8_t max_pdsch_tbs_per_slot; + uint8_t max_number_mimo_layers_pdsch; + uint8_t supported_max_modulation_order_dl; + uint8_t max_mu_mimo_users_dl; + uint8_t pdsch_data_in_dmrs_symbols; + uint8_t premption_support;//TAG 0x001F + uint8_t pdsch_non_slot_support; + } nfapi_nr_pdsch_param_t; //table 3-14 typedef struct { - + uint8_t uci_mux_ulsch_in_pusch; + uint8_t uci_only_pusch; + uint8_t pusch_frequency_hopping; + uint8_t pusch_dmrs_config_types; + uint8_t pusch_dmrs_max_len; + uint8_t pusch_dmrs_additional_pos; + uint8_t pusch_cbg; + uint8_t pusch_mapping_type; + uint8_t pusch_allocation_types; + uint8_t pusch_vrb_to_prb_mapping; + //uint8 ? ↓ see table 3-14 + uint8_t pusch_max_ptrs_ports; + uint8_t max_pduschs_tbs_per_slot; + uint8_t max_number_mimo_layers_non_cb_pusch; + uint8_t supported_modulation_order_ul; + uint8_t max_mu_mimo_users_ul; + uint8_t dfts_ofdm_support; + uint8_t pusch_aggregation_factor;//TAG 0x0031 + } nfapi_nr_pusch_param_t; //table 3-15 typedef struct { - + uint8_t prach_long_formats; + uint8_t prach_short_formats; + uint8_t prach_restricted_sets; + uint8_t max_prach_fd_occasions_in_a_slot; + } nfapi_nr_prach_param_t; //table 3-16 typedef struct { - + uint8_t rssi_measurement_support; } nfapi_nr_measurement_param_t; //-------------------------------------------// @@ -920,77 +265,193 @@ typedef struct { typedef struct { nfapi_nr_config_errors_e error_code; - uint8_t number_of_invalid_tlvs; + uint8_t number_of_invalid_tlvs_that_can_only_be_configured_in_idle; uint8_t unmber_of_missing_tlvs; //? ↓ - nfapi_nr_config_tlv_t tlv; + nfapi_nr_config_tlv_t* tlv_invalid_list; + nfapi_nr_config_tlv_t* tlv_invalid_idle_list; + nfapi_nr_config_tlv_t* tlv_invalid_running_list; + nfapi_nr_config_tlv_t* tlv_missing_list; + } nfapi_nr_config_response_t; typedef enum { NFAPI_NR_CONFIG_MSG_OK = 0, - NFAPI_NR_CONFIG_MSG_INVALID_STATE + NFAPI_NR_CONFIG_MSG_INVALID_CONFIG //The configuration provided has missing mandatory TLVs, or TLVs that are invalid or unsupported in this state. } nfapi_nr_config_errors_e; //nfapi_nr_config_tlv_format_t carrier config ~ precoding config: +#define NFAPI_NR_CONFIG_DL_BANDWIDTH_TAG 0x1001 +#define NFAPI_NR_CONFIG_DL_FREQUENCY_TAG 0x1002 +#define NFAPI_NR_CONFIG_DL_K0_TAG 0x1003 +#define NFAPI_NR_CONFIG_DL_GRID_SIZE_TAG 0x1004 +#define NFAPI_NR_CONFIG_NUM_TX_ANT_TAG 0x1005 +#define NFAPI_NR_CONFIG_UPLINK_BANDWIDTH_TAG 0x1006 +#define NFAPI_NR_CONFIG_UPLINK_FREQUENCY_TAG 0x1007 +#define NFAPI_NR_CONFIG_UL_K0_TAG 0x1008 +#define NFAPI_NR_CONFIG_UL_GRID_SIZE_TAG 0x1009 +#define NFAPI_NR_CONFIG_NUM_RX_ANT_TAG 0x100A +#define NFAPI_NR_CONFIG_FREQUENCY_SHIFT_7P5KHZ_TAG 0x100B + +#define NFAPI_NR_CONFIG_PHY_CELL_ID_TAG 0x100C +#define NFAPI_NR_CONFIG_FRAME_DUPLEX_TYPE_TAG 0x100D + +#define NFAPI_NR_CONFIG_SS_PBCH_POWER_TAG 0x100E +#define NFAPI_NR_CONFIG_BCH_PAYLOAD_TAG 0x100F +#define NFAPI_NR_CONFIG_SCS_COMMON_TAG 0x1010 + +#define NFAPI_NR_CONFIG_PRACH_SEQUENCE_LENGTH_TAG 0x1011 +#define NFAPI_NR_CONFIG_PRACH_SUB_C_SPACING_TAG 0x1012 +#define NFAPI_NR_CONFIG_RESTRICTED_SET_CONFIG_TAG 0x1013 +#define NFAPI_NR_CONFIG_NUM_PRACH_FD_OCCASIONS_TAG 0x1014 +#define NFAPI_NR_CONFIG_PRACH_ROOT_SEQUENCE_INDEX_TAG 0x1015 +#define NFAPI_NR_CONFIG_NUM_ROOT_SEQUENCES_TAG 0x1016 +#define NFAPI_NR_CONFIG_K1_TAG 0x1017 +#define NFAPI_NR_CONFIG_PRACH_ZERO_CORR_CONF_TAG 0x1018 +#define NFAPI_NR_CONFIG_NUM_UNUSED_ROOT_SEQUENCES_TAG 0x1019 +#define NFAPI_NR_CONFIG_UNUSED_ROOT_SEQUENCES_TAG 0x101A +#define NFAPI_NR_CONFIG_SSB_PER_RACH_TAG 0x101B +#define NFAPI_NR_CONFIG_PRACH_MULTIPLE_CARRIERS_IN_A_BAND_TAG 0x101C + +#define NFAPI_NR_CONFIG_SSB_OFFSET_POINT_A_TAG 0x101D +#define NFAPI_NR_CONFIG_BETA_PSS_TAG 0x101E +#define NFAPI_NR_CONFIG_SSB_PERIOD_TAG 0x101F +#define NFAPI_NR_CONFIG_SSB_SUBCARRIER_OFFSET_TAG 0x1020 +#define NFAPI_NR_CONFIG_MIB_TAG 0x1021 +#define NFAPI_NR_CONFIG_SSB_MASK_TAG 0x1022 +#define NFAPI_NR_CONFIG_BEAM_ID_TAG 0x1023 +#define NFAPI_NR_CONFIG_SS_PBCH_MULTIPLE_CARRIERS_IN_A_BAND_TAG 0x1024 +#define NFAPI_NR_CONFIG_MULTIPLE_CELLS_SS_PBCH_IN_A_CARRIER_TAG 0x1025 +#define NFAPI_NR_CONFIG_TDD_PERIOD_TAG 0x1026 +#define NFAPI_NR_CONFIG_SLOT_CONFIG_TAG 0x1027 + +#define NFAPI_NR_CONFIG_RSSI_MEASUREMENT_TAG 0x1028 + //table 3-21 typedef struct { - -} nfapi_nr_carrier_config_t; + uint16_t dl_bandwidth;//Carrier bandwidth for DL in MHz [38.104, sec 5.3.2] Values: 5, 10, 15, 20, 25, 30, 40,50, 60, 70, 80,90,100,200,400 + uint32_t dl_frequency; //Absolute frequency of DL point A in KHz [38.104, sec5.2 and 38.211 sec 4.4.4.2] Value: 450000 -> 52600000 + uint16_t dl_k0[5];//π‘˜_{0}^{πœ‡} for each of the numerologies [38.211, sec 5.3.1] Value: 0 ->23699 + uint16_t dl_grid_size[5];//Grid size 𝑁_{π‘”π‘Ÿπ‘–π‘‘}^{𝑠𝑖𝑧𝑒,πœ‡} for each of the numerologies [38.211, sec 4.4.2] Value: 0->275 0 = this numerology not used + uint16_t num_tx_ant;//Number of Tx antennas + uint16_t uplink_bandwidth;//Carrier bandwidth for UL in MHz. [38.104, sec 5.3.2] Values: 5, 10, 15, 20, 25, 30, 40,50, 60, 70, 80,90,100,200,400 + uint32_t uplink_frequency;//Absolute frequency of UL point A in KHz [38.104, sec5.2 and 38.211 sec 4.4.4.2] Value: 450000 -> 52600000 + uint16_t ul_k0[5];//π‘˜0 πœ‡ for each of the numerologies [38.211, sec 5.3.1] Value: : 0 ->23699 + uint16_t ul_grid_size[5];//Grid size π‘π‘”π‘Ÿπ‘–π‘‘ 𝑠𝑖𝑧𝑒,πœ‡ for each of the numerologies [38.211, sec 4.4.2]. Value: 0->275 0 = this numerology not used + uint16_t num_rx_ant;// + uint8_t frequency_shift_7p5khz;//Indicates presence of 7.5KHz frequency shift. Value: 0 = false 1 = true + +} nfapi_nr_carrier_config_t; //table 3-22 typedef struct { - + uint8_t phy_cell_id;//Physical Cell ID, 𝑁_{𝐼𝐷}^{𝑐𝑒𝑙𝑙} [38.211, sec 7.4.2.1] Value: 0 ->1007 + uint8_t frame_duplex_type;//Frame duplex type Value: 0 = FDD 1 = TDD + } nfapi_nr_cell_config_t; //table 3-23 typedef struct { - + uint32_t ss_pbch_power;//SSB Block Power Value: TBD (-60..50 dBm) + uint8_t bch_payload;//Defines option selected for generation of BCH payload, see Table 3-13 (v0.0.011 Value: 0: MAC generates the full PBCH payload 1: PHY generates the timing PBCH bits 2: PHY generates the full PBCH payload + uint8_t scs_common;//subcarrierSpacing for common, used for initial access and broadcast message. [38.211 sec 4.2] Value:0->3 + } nfapi_nr_ssb_config_t; //table 3-24 typedef struct { - + uint8_t prach_sequence_length;//RACH sequence length. Long or Short sequence length. Only short sequence length is supported for FR2. [38.211, sec 6.3.3.1] Value: 0 = Long sequence 1 = Short sequence + uint8_t prach_sub_c_spacing;//Subcarrier spacing of PRACH. [38.211 sec 4.2] Value:0->4 + uint8_t restricted_set_config;//PRACH restricted set config Value: 0: unrestricted 1: restricted set type A 2: restricted set type B + uint8_t num_prach_fd_occasions;//Number of RACH frequency domain occasions. Corresponds to the parameter 𝑀 in [38.211, sec 6.3.3.2] which equals the higher layer parameter msg1FDM Value: 1,2,4,8 + nfapi_nr_num_prach_fd_occasions_t* num_prach_fd_occasions_list; + uint8_t ssb_per_rach;//SSB-per-RACH-occasion Value: 0: 1/8 1:1/4, 2:1/2 3:1 4:2 5:4, 6:8 7:16 + uint8_t prach_multiple_carriers_in_a_band;//0 = disabled 1 = enabled + } nfapi_nr_prach_config_t; +typedef struct +{ + uint8_t num_prach_fd_occasions; + uint16_t prach_root_sequence_index;//Starting logical root sequence index, 𝑖, equivalent to higher layer parameter prach-RootSequenceIndex [38.211, sec 6.3.3.1] Value: 0 -> 837 + uint8_t num_root_sequences;//Number of root sequences for a particular FD occasion that are required to generate the necessary number of preambles + uint16_t k1;//Frequency offset (from UL bandwidth part) for each FD. [38.211, sec 6.3.3.2] Value: from 0 to 272 + uint8_t prach_zero_corr_conf;//PRACH Zero CorrelationZone Config which is used to dervive 𝑁𝑐𝑠 [38.211, sec 6.3.3.1] Value: from 0 to 15 + uint8_t num_unused_root_sequences;//Number of unused sequences available for noise estimation per FD occasion. At least one unused root sequence is required per FD occasion. + nfapi_nr_num_unused_root_sequences_t* num_unused_root_sequences_list; + +} nfapi_nr_num_prach_fd_occasions_t; + +typedef struct +{ + uint8_t unused_root_sequences;//Unused root sequence or sequences per FD occasion. Required for noise estimation. + +} nfapi_nr_num_unused_root_sequences_t; + //table 3-25 typedef struct { - + uint16_t ssb_offset_point_a;//Offset of lowest subcarrier of lowest resource block used for SS/PBCH block. Given in PRB [38.211, section 4.4.4.2] Value: 0->2199 + uint8_t beta_pss;//PSS EPRE to SSS EPRE in a SS/PBCH block [38.213, sec 4.1] Values: 0 = 0dB + uint8_t ssb_period;//SSB periodicity in msec Value: 0: ms5 1: ms10 2: ms20 3: ms40 4: ms80 5: ms160 + uint8_t ssb_subcarrier_offset;//ssbSubcarrierOffset or π‘˜π‘†π‘†π΅ (38.211, section 7.4.3.1) Value: 0->31 + uint32_t MIB;//MIB payload, where the 24 MSB are used and represent the MIB in [38.331 MIB IE] and represent 0 1 2 3 1 , , , ,..., Aβˆ’ a a a a a [38.212, sec 7.1.1] + nfapi_nr_ssb_mask_size_2_t* ssb_mask_size_2_list;//2 + nfapi_nr_ssb_mask_size_64_t* ssb_mask_size_64_list;//64 + uint8_t ss_pbch_multiple_carriers_in_a_band;//0 = disabled 1 = enabled + uint8_t multiple_cells_ss_pbch_in_a_carrier;//Indicates that multiple cells will be supported in a single carrier 0 = disabled 1 = enabled + } nfapi_nr_ssb_table_t; -//table 3-26 typedef struct { - -} nfapi_nr_tdd_tablr_t; + uint32_t ssb_mask;//Bitmap for actually transmitted SSB. MSB->LSB of first 32 bit number corresponds to SSB 0 to SSB 31 MSB->LSB of second 32 bit number corresponds to SSB 32 to SSB 63 Value for each bit: 0: not transmitted 1: transmitted + +} nfapi_nr_ssb_mask_size_2_t; + +typedef struct +{ + uint8_t beam_id[64];//BeamID for each SSB in SsbMask. For example, if SSB mask bit 26 is set to 1, then BeamId[26] will be used to indicate beam ID of SSB 26. Value: from 0 to 63 + +} nfapi_nr_ssb_mask_size_64_t; + +//table 3-26 + +//? +typedef struct +{ + uint8_t tdd_period;//DL UL Transmission Periodicity. Value:0: ms0p5 1: ms0p625 2: ms1 3: ms1p25 4: ms2 5: ms2p5 6: ms5 7: ms10 + nfapi_nr_max_tdd_periodicity_t* max_tdd_periodicity_list; + +} nfapi_nr_tdd_table_t; + +typedef struct +{ + nfapi_nr_max_num_of_symbol_per_slot_t* max_num_of_symbol_per_slot_list; + +} nfapi_nr_max_tdd_periodicity_t; + +typedef struct +{ + uint8_t slot_config;//For each symbol in each slot a uint8_t value is provided indicating: 0: DL slot 1: UL slot 2: Guard slot + +} nfapi_nr_max_num_of_symbol_per_slot_t; //table 3-27 typedef struct { - + uint8_t rssi_measurement;//RSSI measurement unit. See Table 3-16 for RSSI definition. Value: 0: Do not report RSSI 1: dBm 2: dBFS + } nfapi_nr_measurement_config_t; -//table 3-32 -typedef struct -{ - -} nfapi_nr_beamforming_table_t; - -//table 3-33 -typedef struct -{ - -} nfapi_nr_precoding_table_t; - //------------------------------// //3.3.3 START -// ? typedef struct { nfapi_p4_p5_message_header_t header; nfapi_vendor_extension_tlv_t vendor_extension; @@ -1002,13 +463,11 @@ typedef enum { //3.3.4 STOP -// ? typedef struct { nfapi_p4_p5_message_header_t header; nfapi_vendor_extension_tlv_t vendor_extension; } nfapi_nr_stop_request_t; -// ? typedef struct { nfapi_p4_p5_message_header_t header; nfapi_vendor_extension_tlv_t vendor_extension; @@ -1043,6 +502,8 @@ typedef enum { //-----------------------// //3.3.6 Storing Precoding and Beamforming Tables +//table 3-32 +//? typedef struct { uint16_t num_dig_beams; //0~65535 uint16_t num_txrus; //0~65535 @@ -1079,6 +540,5 @@ typedef struct { // Section 3.4 -//3.4.1 #endif diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c index 02c27930d3..1c5a809129 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c @@ -435,7 +435,7 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, } // Phytest scheduling/ option not activated because of pending bug - + /*if (slotP==2) nr_schedule_css_dlsch_phytest(module_idP, frameP, slotP);*/ diff --git a/openair2/NR_PHY_INTERFACE/nfapi_5g_test.c b/openair2/NR_PHY_INTERFACE/nfapi_5g_test.c new file mode 100644 index 0000000000..29fe8daffd --- /dev/null +++ b/openair2/NR_PHY_INTERFACE/nfapi_5g_test.c @@ -0,0 +1,20 @@ + + +//openair2/NR_PHY_INTERFACE/nfapi_5g_test.c +#include "nfapi_nr_interface_scf.h" + +#include // for printf + +int main ( int argc, char** argv) +{ + nfapi_nr_cell_param_t nfapi_nr_cell_param_test; + nfapi_nr_num_config_tlvs_to_report* num_config_tlvs_to_report_list; + nfapi_nr_cell_param_test.num_config_tlvs_to_report_list = num_config_tlvs_to_report_list; + nfapi_nr_cell_param_test.phy_state = 0; + nfapi_nr_cell_param_test.release_capability = 0; + nfapi_nr_cell_param_test.skip_blank_dl_config = 0; + nfapi_nr_cell_param_test.skip_blank_ul_config = 0; + + printf(" test nfapi \n"); + return 0; +} From 224b78184838995798ae5d6b7b8818a8830a12e3 Mon Sep 17 00:00:00 2001 From: Kujou <874864293@qq.com> Date: Wed, 14 Aug 2019 21:45:12 +0800 Subject: [PATCH 3/8] to test --- cmake_targets/CMakeLists.txt | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/cmake_targets/CMakeLists.txt b/cmake_targets/CMakeLists.txt index 05494f63c5..c56f923857 100644 --- a/cmake_targets/CMakeLists.txt +++ b/cmake_targets/CMakeLists.txt @@ -2193,6 +2193,10 @@ add_library(minimal_lib ) target_link_libraries(minimal_lib pthread dl) +add_executable( + ${OPENAIR_DIR}/openair2/NR_PHY_INTERFACE/nfapi_5g_test.c + ) + add_executable(replay_node ${OPENAIR_TARGETS}/ARCH/rfsimulator/stored_node.c ) @@ -2872,5 +2876,3 @@ ADD_CUSTOM_TARGET(oarf include (${OPENAIR_DIR}/common/utils/telnetsrv/telnetsrv_CMakeLists.txt) - - From e901aa79ab03c445c93af1f025fbc11f2c924f5e Mon Sep 17 00:00:00 2001 From: Kujou <874864293@qq.com> Date: Wed, 14 Aug 2019 22:24:48 +0800 Subject: [PATCH 4/8] fix .h --- .../nfapi/public_inc/nfapi_nr_interface_scf.h | 162 +++++++++--------- 1 file changed, 82 insertions(+), 80 deletions(-) diff --git a/nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface_scf.h b/nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface_scf.h index cec382b95f..a2348a5646 100644 --- a/nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface_scf.h +++ b/nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface_scf.h @@ -60,12 +60,24 @@ typedef enum { //3.3.1 PARAM +typedef struct { + nfapi_tl_t tl; + uint16_t value; + +} nfapi_nr_param_tlv_t; + //same with nfapi_param_request_t typedef struct { nfapi_p4_p5_message_header_t header; nfapi_vendor_extension_tlv_t vendor_extension; } nfapi_nr_param_request_t; +typedef enum { + NFAPI_NR_PARAM_MSG_OK = 0, + NFAPI_NR_PARAM_MSG_INVALID_STATE + +} nfapi_nr_param_errors_e; + typedef struct { nfapi_nr_param_errors_e error_code; //Number of TLVs contained in the message body. @@ -73,18 +85,9 @@ typedef struct { nfapi_nr_param_tlv_t TLV; } nfapi_nr_param_response_t; -typedef enum { - NFAPI_NR_PARAM_MSG_OK = 0, - NFAPI_NR_PARAM_MSG_INVALID_STATE - -} nfapi_nr_param_errors_e; //PARAM and CONFIG TLVs are used in the PARAM and CONFIG message exchanges, respectively -typedef struct { - nfapi_tl_t tl; - uint16_t value; -} nfapi_nr_param_tlv_t; //nfapi_nr_param_tlv_format_t cell param ~ measurement_param: @@ -145,6 +148,11 @@ typedef struct { #define NFAPI_NR_PARAM_TLV_MAX_PRACH_FD_OCCASIONS_IN_A_SLOT_TAG 0x0035 #define NFAPI_NR_PARAM_TLV_RSSI_MEASUREMENT_SUPPORT_TAG 0x0036 +typedef struct{ + uint16_t num_config_tlvs_to_report; + nfapi_nr_param_tlv_t tlv; +} nfapi_nr_num_config_tlvs_to_report; + typedef struct { uint16_t release_capability;//TAG 0x0001 @@ -154,11 +162,6 @@ typedef struct nfapi_nr_num_config_tlvs_to_report* num_config_tlvs_to_report_list; } nfapi_nr_cell_param_t; -typedef struct{ - uint16_t num_config_tlvs_to_report; - nfapi_nr_param_tlv_t tlv; -} nfapi_nr_num_config_tlvs_to_report; - //table 3-10 Carrier parameters typedef struct { @@ -252,16 +255,20 @@ typedef struct //-------------------------------------------// //3.3.2 CONFIG +typedef struct { + nfapi_tl_t tl; + uint16_t value; +} nfapi_nr_config_tlv_t; typedef struct { uint8_t number_of_tlvs; nfapi_nr_config_tlv_t tlv; } nfapi_nr_config_request_t; -typedef struct { - nfapi_tl_t tl; - uint16_t value; -} nfapi_nr_config_tlv_t; +typedef enum { + NFAPI_NR_CONFIG_MSG_OK = 0, + NFAPI_NR_CONFIG_MSG_INVALID_CONFIG //The configuration provided has missing mandatory TLVs, or TLVs that are invalid or unsupported in this state. +} nfapi_nr_config_errors_e; typedef struct { nfapi_nr_config_errors_e error_code; @@ -275,11 +282,6 @@ typedef struct { } nfapi_nr_config_response_t; -typedef enum { - NFAPI_NR_CONFIG_MSG_OK = 0, - NFAPI_NR_CONFIG_MSG_INVALID_CONFIG //The configuration provided has missing mandatory TLVs, or TLVs that are invalid or unsupported in this state. -} nfapi_nr_config_errors_e; - //nfapi_nr_config_tlv_format_t carrier config ~ precoding config: #define NFAPI_NR_CONFIG_DL_BANDWIDTH_TAG 0x1001 @@ -363,17 +365,12 @@ typedef struct } nfapi_nr_ssb_config_t; //table 3-24 + typedef struct { - uint8_t prach_sequence_length;//RACH sequence length. Long or Short sequence length. Only short sequence length is supported for FR2. [38.211, sec 6.3.3.1] Value: 0 = Long sequence 1 = Short sequence - uint8_t prach_sub_c_spacing;//Subcarrier spacing of PRACH. [38.211 sec 4.2] Value:0->4 - uint8_t restricted_set_config;//PRACH restricted set config Value: 0: unrestricted 1: restricted set type A 2: restricted set type B - uint8_t num_prach_fd_occasions;//Number of RACH frequency domain occasions. Corresponds to the parameter 𝑀 in [38.211, sec 6.3.3.2] which equals the higher layer parameter msg1FDM Value: 1,2,4,8 - nfapi_nr_num_prach_fd_occasions_t* num_prach_fd_occasions_list; - uint8_t ssb_per_rach;//SSB-per-RACH-occasion Value: 0: 1/8 1:1/4, 2:1/2 3:1 4:2 5:4, 6:8 7:16 - uint8_t prach_multiple_carriers_in_a_band;//0 = disabled 1 = enabled + uint8_t unused_root_sequences;//Unused root sequence or sequences per FD occasion. Required for noise estimation. -} nfapi_nr_prach_config_t; +} nfapi_nr_num_unused_root_sequences_t; typedef struct { @@ -389,11 +386,29 @@ typedef struct typedef struct { - uint8_t unused_root_sequences;//Unused root sequence or sequences per FD occasion. Required for noise estimation. + uint8_t prach_sequence_length;//RACH sequence length. Long or Short sequence length. Only short sequence length is supported for FR2. [38.211, sec 6.3.3.1] Value: 0 = Long sequence 1 = Short sequence + uint8_t prach_sub_c_spacing;//Subcarrier spacing of PRACH. [38.211 sec 4.2] Value:0->4 + uint8_t restricted_set_config;//PRACH restricted set config Value: 0: unrestricted 1: restricted set type A 2: restricted set type B + uint8_t num_prach_fd_occasions;//Number of RACH frequency domain occasions. Corresponds to the parameter 𝑀 in [38.211, sec 6.3.3.2] which equals the higher layer parameter msg1FDM Value: 1,2,4,8 + nfapi_nr_num_prach_fd_occasions_t* num_prach_fd_occasions_list; + uint8_t ssb_per_rach;//SSB-per-RACH-occasion Value: 0: 1/8 1:1/4, 2:1/2 3:1 4:2 5:4, 6:8 7:16 + uint8_t prach_multiple_carriers_in_a_band;//0 = disabled 1 = enabled -} nfapi_nr_num_unused_root_sequences_t; +} nfapi_nr_prach_config_t; //table 3-25 +typedef struct +{ + uint32_t ssb_mask;//Bitmap for actually transmitted SSB. MSB->LSB of first 32 bit number corresponds to SSB 0 to SSB 31 MSB->LSB of second 32 bit number corresponds to SSB 32 to SSB 63 Value for each bit: 0: not transmitted 1: transmitted + +} nfapi_nr_ssb_mask_size_2_t; + +typedef struct +{ + uint8_t beam_id[64];//BeamID for each SSB in SsbMask. For example, if SSB mask bit 26 is set to 1, then BeamId[26] will be used to indicate beam ID of SSB 26. Value: from 0 to 63 + +} nfapi_nr_ssb_mask_size_64_t; + typedef struct { uint16_t ssb_offset_point_a;//Offset of lowest subcarrier of lowest resource block used for SS/PBCH block. Given in PRB [38.211, section 4.4.4.2] Value: 0->2199 @@ -408,27 +423,14 @@ typedef struct } nfapi_nr_ssb_table_t; -typedef struct -{ - uint32_t ssb_mask;//Bitmap for actually transmitted SSB. MSB->LSB of first 32 bit number corresponds to SSB 0 to SSB 31 MSB->LSB of second 32 bit number corresponds to SSB 32 to SSB 63 Value for each bit: 0: not transmitted 1: transmitted - -} nfapi_nr_ssb_mask_size_2_t; - -typedef struct -{ - uint8_t beam_id[64];//BeamID for each SSB in SsbMask. For example, if SSB mask bit 26 is set to 1, then BeamId[26] will be used to indicate beam ID of SSB 26. Value: from 0 to 63 - -} nfapi_nr_ssb_mask_size_64_t; - //table 3-26 //? typedef struct { - uint8_t tdd_period;//DL UL Transmission Periodicity. Value:0: ms0p5 1: ms0p625 2: ms1 3: ms1p25 4: ms2 5: ms2p5 6: ms5 7: ms10 - nfapi_nr_max_tdd_periodicity_t* max_tdd_periodicity_list; + uint8_t slot_config;//For each symbol in each slot a uint8_t value is provided indicating: 0: DL slot 1: UL slot 2: Guard slot -} nfapi_nr_tdd_table_t; +} nfapi_nr_max_num_of_symbol_per_slot_t; typedef struct { @@ -438,9 +440,10 @@ typedef struct typedef struct { - uint8_t slot_config;//For each symbol in each slot a uint8_t value is provided indicating: 0: DL slot 1: UL slot 2: Guard slot + uint8_t tdd_period;//DL UL Transmission Periodicity. Value:0: ms0p5 1: ms0p625 2: ms1 3: ms1p25 4: ms2 5: ms2p5 6: ms5 7: ms10 + nfapi_nr_max_tdd_periodicity_t* max_tdd_periodicity_list; -} nfapi_nr_max_num_of_symbol_per_slot_t; +} nfapi_nr_tdd_table_t; //table 3-27 typedef struct @@ -478,6 +481,17 @@ typedef enum { } nfapi_nr_stop_errors_e; //3.3.5 PHY Notifications +typedef enum { + NFAPI_NR_PHY_API_MSG_OK =0x0, + NFAPI_NR_PHY_API_MSG_INVALID_STATE =0x1, + NFAPI_NR_PHY_API_MSG_INVALID_CONFIG =0x2, + NFAPI_NR_PHY_API_SFN_OUT_OF_SYNC =0X3, + NFAPI_NR_PHY_API_MSG_SLOR_ERR =0X4, + NFAPI_NR_PHY_API_MSG_BCH_MISSING =0X5, + NFAPI_NR_PHY_API_MSG_INVALID_SFN =0X6, + NFAPI_NR_PHY_API_MSG_UL_DCI_ERR =0X7, + NFAPI_NR_PHY_API_MSG_TX_ERR =0X8 +} nfapi_nr_phy_notifications_errors_e; typedef struct { uint16_t sfn; //0~1023 @@ -486,31 +500,11 @@ typedef struct { nfapi_nr_phy_notifications_errors_e error_code; } nfapi_nr_phy_notifications_error_indicate_t; -typedef enum { - NFAPI_NR_PHY_API_MSG_OK =0x0, - NFAPI_NR_PHY_API_MSG_INVALID_STATE =0x1, - NFAPI_NR_PHY_API_MSG_INVALID_CONFIG =0x2, - NFAPI_NR_PHY_API_SFN_OUT_OF_SYNC =0X03, - NFAPI_NR_PHY_API_MSG_SLOR_ERR =0X04, - NFAPI_NR_PHY_API_MSG_BCH_MISSING =0X05, - NFAPI_NR_PHY_API_MSG_INVALID_SFN =0X06, - NFAPI_NR_PHY_API_MSG_UL_DCI_ERR =0X07, - NFAPI_NR_PHY_API_MSG_TX_ERR =0X08 -} nfapi_nr_phy_notifications_errors_e; - - //-----------------------// //3.3.6 Storing Precoding and Beamforming Tables //table 3-32 //? -typedef struct { - uint16_t num_dig_beams; //0~65535 - uint16_t num_txrus; //0~65535 - nfapi_nr_dig_beam_t* dig_beam_list; - nfapi_nr_txru_t* txru_list; -} nfapi_nr_dbt_pdu_t; - typedef struct { uint16_t beam_idx; //0~65535 } nfapi_nr_dig_beam_t; @@ -520,12 +514,21 @@ typedef struct { uint16_t dig_beam_weight_Im; } nfapi_nr_txru_t; -//? table 3-33 typedef struct { - uint16_t pm_idx; //0~65535 - nfapi_nr_num_layers_t* num_layers_list; //0~65535 - nfapi_nr_num_ant_ports_t* num_ant_ports_list; -} nfapi_nr_pm_pdu_t; + uint16_t num_dig_beams; //0~65535 + uint16_t num_txrus; //0~65535 + nfapi_nr_dig_beam_t* dig_beam_list; + nfapi_nr_txru_t* txru_list; +} nfapi_nr_dbt_pdu_t; + + +//table 3-33 +//? +typedef struct { + uint16_t num_ant_ports; + int16_t precoder_weight_Re; + int16_t precoder_weight_Im; +} nfapi_nr_num_ant_ports_t; typedef struct { uint16_t numLayers; //0~65535 @@ -533,12 +536,11 @@ typedef struct { } nfapi_nr_num_layers_t; typedef struct { - uint16_t num_ant_ports; - int16_t precoder_weight_Re; - int16_t precoder_weight_Im; -} nfapi_nr_num_ant_ports_t; + uint16_t pm_idx; //0~65535 + nfapi_nr_num_layers_t* num_layers_list; //0~65535 + //nfapi_nr_num_ant_ports_t* num_ant_ports_list; +} nfapi_nr_pm_pdu_t; // Section 3.4 - #endif From fb4165d62b6f50faebd3335e20cc352a2a13460c Mon Sep 17 00:00:00 2001 From: Kujou <874864293@qq.com> Date: Wed, 14 Aug 2019 22:55:53 +0800 Subject: [PATCH 5/8] S3.3 compile OK --- cmake_targets/CMakeLists.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/cmake_targets/CMakeLists.txt b/cmake_targets/CMakeLists.txt index c56f923857..5ee087d58d 100644 --- a/cmake_targets/CMakeLists.txt +++ b/cmake_targets/CMakeLists.txt @@ -2193,7 +2193,7 @@ add_library(minimal_lib ) target_link_libraries(minimal_lib pthread dl) -add_executable( +add_executable(nfapi_test ${OPENAIR_DIR}/openair2/NR_PHY_INTERFACE/nfapi_5g_test.c ) From c8471c1e545b8c2c517d2dfe8471fdcc3d7ba2ec Mon Sep 17 00:00:00 2001 From: Kujou <874864293@qq.com> Date: Fri, 16 Aug 2019 05:24:04 +0800 Subject: [PATCH 6/8] finish section 3.3 and 3.4 --- .../nfapi/public_inc/nfapi_nr_interface_scf.h | 876 +++++++++++++++++- 1 file changed, 856 insertions(+), 20 deletions(-) diff --git a/nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface_scf.h b/nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface_scf.h index a2348a5646..4f6a012b67 100644 --- a/nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface_scf.h +++ b/nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface_scf.h @@ -73,8 +73,8 @@ typedef struct { } nfapi_nr_param_request_t; typedef enum { - NFAPI_NR_PARAM_MSG_OK = 0, - NFAPI_NR_PARAM_MSG_INVALID_STATE + NFAPI_NR_MSG_OK = 0, //NFAPI_NR_PARAM_MSG_OK = 0, + NFAPI_NR_MSG_INVALID_STATE //NFAPI_NR_PARAM_MSG_INVALID_STATE } nfapi_nr_param_errors_e; @@ -148,18 +148,14 @@ typedef struct { #define NFAPI_NR_PARAM_TLV_MAX_PRACH_FD_OCCASIONS_IN_A_SLOT_TAG 0x0035 #define NFAPI_NR_PARAM_TLV_RSSI_MEASUREMENT_SUPPORT_TAG 0x0036 -typedef struct{ - uint16_t num_config_tlvs_to_report; - nfapi_nr_param_tlv_t tlv; -} nfapi_nr_num_config_tlvs_to_report; - typedef struct { - uint16_t release_capability;//TAG 0x0001 + uint16_t release_capability; //TAG 0x0001 uint16_t phy_state; uint8_t skip_blank_dl_config; uint8_t skip_blank_ul_config; - nfapi_nr_num_config_tlvs_to_report* num_config_tlvs_to_report_list; + uint16_t num_config_tlvs_to_report; + nfapi_nr_param_tlv_t* config_tlvs_to_report_list; } nfapi_nr_cell_param_t; //table 3-10 Carrier parameters @@ -266,8 +262,8 @@ typedef struct { } nfapi_nr_config_request_t; typedef enum { - NFAPI_NR_CONFIG_MSG_OK = 0, - NFAPI_NR_CONFIG_MSG_INVALID_CONFIG //The configuration provided has missing mandatory TLVs, or TLVs that are invalid or unsupported in this state. + NFAPI_NR_MSG_OK = 0, //NFAPI_NR_CONFIG_MSG_OK = 0, + NFAPI_NR_MSG_INVALID_CONFIG //NFAPI_NR_CONFIG_MSG_INVALID_CONFIG //The configuration provided has missing mandatory TLVs, or TLVs that are invalid or unsupported in this state. } nfapi_nr_config_errors_e; typedef struct { @@ -365,12 +361,9 @@ typedef struct } nfapi_nr_ssb_config_t; //table 3-24 - -typedef struct -{ +/*typedef struct { uint8_t unused_root_sequences;//Unused root sequence or sequences per FD occasion. Required for noise estimation. - -} nfapi_nr_num_unused_root_sequences_t; +} nfapi_nr_num_unused_root_sequences_t;*/ typedef struct { @@ -380,7 +373,7 @@ typedef struct uint16_t k1;//Frequency offset (from UL bandwidth part) for each FD. [38.211, sec 6.3.3.2] Value: from 0 to 272 uint8_t prach_zero_corr_conf;//PRACH Zero CorrelationZone Config which is used to dervive 𝑁𝑐𝑠 [38.211, sec 6.3.3.1] Value: from 0 to 15 uint8_t num_unused_root_sequences;//Number of unused sequences available for noise estimation per FD occasion. At least one unused root sequence is required per FD occasion. - nfapi_nr_num_unused_root_sequences_t* num_unused_root_sequences_list; + uint8_t* unused_root_sequences_list;//Unused root sequence or sequences per FD occasion. Required for noise estimation. } nfapi_nr_num_prach_fd_occasions_t; @@ -461,7 +454,7 @@ typedef struct { } nfapi_nr_start_request_t; typedef enum { - NFAPI_NR_START_MSG_INVALID_STATE + NFAPI_NR_MSG_INVALID_STATE //NFAPI_NR_START_MSG_INVALID_STATE } nfapi_nr_start_errors_e; //3.3.4 STOP @@ -477,7 +470,7 @@ typedef struct { } nfapi_nr_stop_indication_t; typedef enum { - NFAPI_NR_STOP_MSG_INVALID_STATE + NFAPI_NR_MSG_INVALID_STATE //NFAPI_NR_STOP_MSG_INVALID_STATE } nfapi_nr_stop_errors_e; //3.3.5 PHY Notifications @@ -541,6 +534,849 @@ typedef struct { //nfapi_nr_num_ant_ports_t* num_ant_ports_list; } nfapi_nr_pm_pdu_t; + // Section 3.4 -#endif +// Section 3.4.1 slot indication +#define NFAPI_NR_SLOT_INDICATION_PERIOD_NUMEROLOGY_0 1000 //us +#define NFAPI_NR_SLOT_INDICATION_PERIOD_NUMEROLOGY_1 50 //us +#define NFAPI_NR_SLOT_INDICATION_PERIOD_NUMEROLOGY_2 250 //us +#define NFAPI_NR_SLOT_INDICATION_PERIOD_NUMEROLOGY_3 125 //us + +typedef struct { + uint16_t sfn; //0->1023 + uint16_t slot;//0->319 + +} nfapi_nr_slot_indication_t; + +// 3.4.2 + +//for pdcch_pdu: + +typedef struct +{ + uint16_t beam_idx;//Index of the digital beam weight vector pre-stored at cell configuration. The vector maps this input port to output TXRUs. Value: 0->65535 + +}nfapi_nr_dig_bf_interface_t; + +typedef struct +{ + uint16_t pm_idx;//Index to precoding matrix (PM) pre-stored at cell configuration. Note: If precoding is not used this parameter should be set to 0. Value: 0->65535. + nfapi_nr_dig_bf_interface_t* dig_bf_interface_list; + +}nfapi_nr_tx_precoding_and_beamforming_number_of_prgs_t; + +//table 3-43 +typedef struct +{ + uint16_t num_prgs;/*Number of PRGs spanning this allocation. +Value : 1->275 */ + uint16_t prg_size;/*Size in RBs of a precoding resource block group (PRG) – to which same precoding and digital beamforming gets applied. Value: 1->275 */ + //watchout: dig_bf_interfaces here, in table 3-53 it's dig_bf_interface + uint8_t dig_bf_interfaces;//Number of STD ant ports (parallel streams) feeding into the digBF Value: 0->255 + nfapi_nr_tx_precoding_and_beamforming_number_of_prgs_t* prgs_list;// + +}nfapi_nr_tx_precoding_and_beamforming_t; + +//table 3-37 + +#define DCI_PAYLOAD_BTYE_LEN 12 //? TS38.212 sec 7.3.1 + +typedef struct +{ + uint16_t rnti;// + uint16_t scrambling_id;// + uint16_t scrambling_rnti;/* */ + uint8_t cce_index;// + uint8_t aggregation_level;// + nfapi_nr_tx_precoding_and_beamforming_t* precoding_and_beamforming_list; + //tx power info + uint8_t beta_pdcch_1_0;/*PDCCH power value used for PDCCH Format 1_0 with CRC scrambled by SI-RNTI, PI-RNTI or RA-RNTI. This is ratio of +SSB/PBCH EPRE to PDCCH and PDCCH DMRS EPRE [TS38.213, sec 4.1] Value :0->17 */ + uint8_t power_control_offset_ss;//PDCCH power value used for all other PDCCH Formats. This is ratio of SSB/PBCH block EPRE to PDCCH and PDCCH DMRS EPRE [TS38.214, sec 4.1] Values: 0: -3dB, 1: 0dB, 2: 3dB, 3: 6dB + uint16_t payload_size_bits;//The total DCI length (in bits) including padding bits [TS38.212 sec 7.3.1] Range 0-> DCI_PAYLOAD_BTYE_LEN*8 + uint8_t payload[DCI_PAYLOAD_BTYE_LEN];//DCI payload, where the actual size is defined by PayloadSizeBits. The bit order is as following bit0-bit7 are mapped to first byte of MSB - LSB + +} nfapi_nr_dl_dci_pdu_t; + +//table 3-36 +typedef struct +{ + uint16_t bwp_size;//Bandwidth part size [TS38.213 sec12]. Number of contiguous PRBs allocated to the BWP Value: 1->275 + uint16_t bwp_start;//bandwidth part start RB index from reference CRB [TS38.213 sec 12] Value: 0->274 + uint8_t subcarrier_spacing;//subcarrierSpacing [TS38.211 sec 4.2] Value:0->4 + uint8_t cyclic_prefix;//Cyclic prefix type [TS38.211 sec 4.2] 0: Normal; 1: Extended + //Coreset [TS38.211 sec 7.3.2.2] + uint8_t start_symbol_index;//Starting OFDM symbol for the CORESET Value: 0->13 + uint8_t duration_symbols;/* Contiguous time duration of the CORESET in number of symbols. Corresponds to L1 parameter π‘π‘ π‘¦π‘šπ‘ 𝐢𝑂𝑅𝐸𝑆𝐸𝑇 [TS38.211 sec 7.3.2.2] Value: 1,2,3*/ + uint8_t freq_domain_resource[6];/* Frequency domain resources. This is a bitmap defining non-overlapping groups of 6 PRBs in ascending order. [TS38.213 10.1]. Also, corresponds to L1 parameter N^{CORESET}_{RB} [TS38.211 sec 7.3.2.2] + Bitmap of uint8 array. 45 bits.*/ + uint8_t cce_reg_mapping_type;/*CORESET-CCE-to-REG-mapping-type [TS38.211 sec 7.3.2.2] 0: non-interleaved 1: interleaved */ + uint8_t reg_bundle_size;/*The number of REGs in a bundle. Must be 6 for +cceRegMappingType = nonInterleaved. For cceRegMappingType = interleaved, must belong to {2,6} if duration = 1,2 and must belong to {3,6} if +duration = 3. Corresponds to parameter L. [TS38.211 sec 7.3.2.2] Value: 2,3,6 */ + uint8_t interleaver_size;//The interleaver size. For interleaved mapping belongs to {2,3,6} and for non-interleaved mapping is NA. Corresponds to parameter R. [TS38.211 sec 7.3.2.2] Value: 2,3,6 + uint8_t core_set_type;//[TS38.211 sec 7.3.2.2 and sec 7.4.1.3.2] 0: CORESET is configured by the PBCH or SIB1 (subcarrier 0 of CRB0 for DMRS mapping) 1: otherwise (subcarrier 0 of CORESET) + uint16_t shift_index;//[TS38.211 sec 7.3.2.2] Not applicable for non-interleaved mapping. For interleaved mapping and a PDCCH transmitted in a CORESET configured by the PBCH or SIB1 this should be set to phy cell ID. Value: 10 bits Otherwise, for interleaved mapping this is set to 0-> max num of PRBs. Value 0-> 275 + uint8_t precoder_granularity;//Granularity of precoding [TS38.211 sec 7.3.2.2] 0: sameAsRegBundle 1: allContiguousRBs + uint16_t num_dl_dci;//Number of DCIs in this CORESET. Value: 0->MaxDciPerSlot + nfapi_nr_dl_dci_pdu_t* dl_dci_list; + +} nfapi_nr_pdcch_pdu_t; + +//for pdsch_pdu: + +typedef struct +{ + uint16_t target_code_rate;// + uint8_t qam_mod_order;// + uint8_t mcs_index;// + uint8_t mcs_table;// + uint8_t rv_index;// + uint32_t tb_size;// +} nfapi_nr_code_word_t; + +//table 3-38 +typedef struct +{ + uint16_t pdu_bit_map;//Bitmap indicating presence of optional PDUs Bit 0: pdschPtrs - Indicates PTRS included (FR2) Bit 1:cbgRetxCtrl (Present when CBG based retransmit is used) All other bits reserved + uint16_t rnti;//The RNTI used for identifying the UE when receiving the PDU Value: 1 -> 65535 + uint16_t pdu_index;// + uint16_t bwp_size;//Bandwidth part size [TS38.213 sec12]. Number of contiguous PRBs allocated to the BWP Value: 1->275 + uint16_t bwp_start;//bandwidth part start RB index from reference CRB [TS38.213 sec 12] Value: 0->274 + uint8_t subcarrier_spacing;//Value:0->4 + uint8_t cyclic_prefix;//0: Normal; 1: Extended + uint8_t nr_of_code_words;//Number of code words for this RNTI (UE) Value: 1 -> 2 + nfapi_nr_code_word_t* code_word_list; + uint16_t data_scrambling_id;// + uint8_t nr_of_layers;// + uint8_t transmission_scheme;//PDSCH transmission schemes [TS38.214, sec 5.1.1] 0: Up to 8 transmission layers + uint8_t ref_point;//Reference point for PDSCH DMRS "k" - used for tone mapping + //DMRS + uint16_t dl_dmrs_symb_pos;//Bitmap occupying the 14 LSBs with: bit 0: first symbol and for each bit 0: no DMRS 1: DMRS + uint8_t dmrs_config_type;//DL DMRS config type[TS38.211, sec 7.4.1.1.2] 0: type 1 1: type 2 + uint16_t dl_dmrs_scrambling_id;//DL-DMRS-Scrambling-ID [TS38.211, sec 7.4.1.1.2 ] If provided by the higher-layer and the PDSCH is scheduled by PDCCH with CRC scrambled by CRNTI or CS-RNTI, otherwise, L2 should set this to physical cell id. Value: 0->65535 + uint8_t scid;// 0 1 + uint8_t num_dmrs_cdm_grps_no_data;//Number of DM-RS CDM groups without data [TS38.212 sec 7.3.1.2.2] [TS38.214 Table 4.1-1] it determines the ratio of PDSCH EPRE to DM-RS EPRE. Value: 1->3 + uint16_t dmrs_ports;//DMRS ports. [TS38.212 7.3.1.2.2] provides description between DCI 1-1 content and DMRS ports. Bitmap occupying the 11 LSBs with: bit 0: antenna port 1000 bit 11: antenna port 1011 and for each bit 0: DMRS port not used 1: DMRS port used + + //Pdsch Allocation in frequency domain [TS38.214, sec 5.1.2.2] + uint8_t resource_alloc;//Resource Allocation Type [TS38.214, sec 5.1.2.2] 0: Type 0 1: Type 1 + uint8_t rb_bit_map[36];//For resource alloc type 0. TS 38.212 V15.0.x, 7.3.1.2.2 bitmap of RBs, 273 rounded up to multiple of 32. This bitmap is in units of VRBs. LSB of byte 0 of the bitmap represents the first RB of the bwp + uint16_t rb_start;//For resource allocation type 1. [TS38.214, sec5.1.2.2.2] The starting resource block within the BWP for this PDSCH. Value: 0->274 + uint16_t rb_size;//For resource allocation type 1. [TS38.214, sec 5.1.2.2.2] The number of resource block within for this PDSCH. Value: 1->275 + uint8_t vrb_to_prb_mapping;//VRB-to-PRB-mapping [TS38.211, sec 7.3.1.6] 0: non-interleaved 1: interleaved with RB size 2 2: Interleaved with RB size 4 + //Resource Allocation in time domain [TS38.214, sec 5.1.2.1] + uint8_t start_symbol_index;//Start symbol index of PDSCH mapping from the start of the slot, S. [TS38.214, Table 5.1.2.1-1] Value: 0->13 + uint8_t nr_of_symbols;//PDSCH duration in symbols, L [TS38.214, Table 5.1.2.1-1] Value: 1->14 + //PTRS TS38.214 sec 5.1.6.3 + uint8_t ptrs_port_index;//PT-RS antenna ports [TS38.214, sec 5.1.6.3] [TS38.211, table 7.4.1.2.2-1] Bitmap occupying the 6 LSBs with: bit 0: ntenna port 1000 bit 5: antenna port 1005 and for each bit 0: PTRS port not used 1: PTRS port used + uint8_t ptrs_time_density;//PT-RS time density [TS38.214, table 5.1.6.3-1] 0: 1 1: 2 2: 4 + uint8_t ptrs_freq_density;//PT-RS frequency density [TS38.214, table[5.1.6.3-2] 0: 2 1: 4 + uint8_t ptrs_re_offset;//PT-RS resource element offset [TS38.211, table [7.4.1.2.2-1] + uint8_t n_epre_ratio_of_pdsch_to_ptrs;//PT-RS-to-PDSCH EPRE ratio [TS38.214, table 4.1-2] Value :0->3 + nfapi_nr_tx_precoding_and_beamforming_t* precoding_and_beamforming_list; + //TX power info + uint8_t power_control_offset;//Ratio of PDSCH EPRE to NZP CSI-RSEPRE [TS38.214, sec 5.2.2.3.1] Value :0->23 representing -8 to 15 dB in 1dB steps + uint8_t power_control_offset_ss;//Ratio of SSB/PBCH block EPRE to NZP CSI-RS EPRES [TS38.214, sec 5.2.2.3.1] Values: 0: -3dB, 1: 0dB, 2: 3dB, 3: 6dB + //CBG fields + uint8_t is_last_cb_present;//Indicates whether last CB is present in the CBG retransmission 0: CBG retransmission does not include last CB 1: CBG retransmission includes last CB If CBG Re-Tx includes last CB, L1 will add the TB CRC to the last CB in the payload before it is read into the LDPC HW unit + uint8_t is_inline_tb_crc;//Indicates whether TB CRC is part of data payload or control message 0: TB CRC is part of data payload 1: TB CRC is part of control message + uint32_t dl_tb_crc;//TB CRC: to be used in the last CB, applicable only if last CB is present + +} nfapi_nr_dlsch_pdu_t; + +//for csi-rs_pdu: + +//table 3-39 +typedef struct +{ +uint16_t bwp_size;// +uint16_t bwp_start;// +uint8_t subcarrier_spacing;// +uint8_t cyclic_prefix;// +uint16_t start_rb; +uint16_t nr_of_rbs; +uint8_t csi_type;//Value: 0:TRS 1:CSI-RS NZP 2:CSI-RS ZP +uint8_t row;//Row entry into the CSI Resource location table. [TS38.211, sec 7.4.1.5.3 and table 7.4.1.5.3-1] Value: 1-18 +uint16_t freq_domain;//Value: Up to the 12 LSBs, actual size is determined by the Row parameter +uint8_t symb_l0;//The time domain location l0 and firstOFDMSymbolInTimeDomain Value: 0->13 +uint8_t symb_l1;// +uint8_t cdm_type; +uint8_t freq_density;//The density field, p and comb offset (for dot5).0: dot5 (even RB), 1: dot5 (odd RB), 2: one, 3: three +uint16_t scramb_id;//ScramblingID of the CSI-RS [TS38.214, sec 5.2.2.3.1] Value: 0->1023 +//tx power info +uint8_t power_control_offset;//Ratio of PDSCH EPRE to NZP CSI-RSEPRE Value :0->23 representing -8 to 15 dB in 1dB steps +uint8_t power_control_offset_ss;//Ratio of SSB/PBCH block EPRE to NZP CSI-RS EPRES 0: -3dB, 1: 0dB, 2: 3dB, 3: 6dB + +} nfapi_nr_csi_rs_pdu_t; + +//for ssb_pdu: + +typedef struct +{ + uint32_t bch_payload;//BCH payload. The valid bits are indicated in the PARAM/CONFIG TLVs. If PARAM/CONFIG TLVs indicate MAC generates full bchPayload then the payload length is 31 bits with the 8 LSB bits being. Otherwise timing PBCH bits are generated by the PHY. And for bchPayload the 24 LSB are used. + +} nfapi_nr_mac_generated_mib_pdu_t; + +typedef struct +{ + uint8_t dmrs_type_a_position;//The position of the first DM-RS for downlink and uplink. + uint8_t pdcch_config_sib1;//The parameter PDCCH-ConfigSIB1 that determines a common ControlResourceSet (CORESET) a common search space and necessary PDCCH parameters. + uint8_t cell_barred;//The flag to indicate whether the cell is barred + uint8_t intra_freq_reselection;//The flag to controls cell selection/reselection to intrafrequency cells when the highest ranked cell is barred, or treated as barred by the UE. value 0 1 + +} nfapi_nr_phy_generated_mib_pdu_t; + + +typedef struct +{ + nfapi_nr_mac_generated_mib_pdu_t* mac_generated_mib_pdu; + nfapi_nr_phy_generated_mib_pdu_t* phy_generated_mib_pdu; + +} nfapi_nr_bch_payload_t; + +typedef struct +{ + uint16_t phys_cell_id;//0~1007 + uint8_t beta_pss;//PSS EPRE to SSS EPRE in a SS/PBCH block 0 = 0dB 1 = 3dB + uint8_t ssb_block_index;//SS/PBCH block index within a SSB burst set. Required for PBCH DMRS scrambling. Value: 0->63 (Lmax) + uint8_t ssb_subcarrier_offset;// + uint16_t ssb_offset_point_a;//Offset of lowest subcarrier of lowest resource block used for SS/PBCH block. Value: 0->2199 + uint8_t bch_payload_flag;//A value indicating how the BCH payload is generated. This should match the PARAM/CONFIG TLVs. Value: 0: MAC generates the full PBCH payload, see Table 3-41, where bchPayload has 31 bits 1: PHY generates the timing PBCH bits, see Table 3-41, where the bchPayload has 24 bits 2: PHY generates the full PBCH payload + nfapi_nr_bch_payload_t bch_payload; + nfapi_nr_tx_precoding_and_beamforming_t precoding_and_beamforming; + +} nfapi_nr_ssb_pdu_t; + +typedef struct +{ + nfapi_nr_pdcch_pdu_t* pdcch_pdu; + nfapi_nr_dlsch_pdu_t* dlsch_pdu;//pdsch_pdu; + nfapi_nr_csi_rs_pdu_t* csi_rs_pdu; + nfapi_nr_ssb_pdu_t* ssb_pdu; +} nfapi_nr_dl_pdu_configuration_t; + +typedef struct +{ + uint16_t pdu_type;//0: PDCCH PDU 1: PDSCH PDU 2: CSI-RS PDU 3: SSB PDU, + uint16_t pdu_size;//Size of the PDU control information (in bytes). This length value includes the 4 bytes required for the PDU type and PDU size parameters. Value 0 -> 65535 + nfapi_nr_dl_pdu_configuration_t* dl_pdu_configuration; + +} nfapi_nr_dl_tti_request_number_of_pdus_t; + +typedef struct +{ + uint8_t pdu_idx;//This value is an index for number of PDU identified by nPDU in this message Value: 0 -> 255 + +} nfapi_nr_dl_tti_request_number_of_ue_t; + +typedef struct +{ + uint8_t n_ue;//Number of UE in this group For SU-MIMO, one group includes one UE only. For MU-MIMO, one group includes up to 12 UEs. Value 1 -> 12 + nfapi_nr_dl_tti_request_number_of_ue_t* ue_list; + +} nfapi_nr_dl_tti_request_number_of_groups_t; + +//3.4.2 dl_tti_request +typedef struct { + uint16_t sfn; //0->1023 + uint16_t slot;//0->319 + uint8_t n_pdus;//Number of PDUs that are included in this message. All PDUs in the message are numbered in order. Value 0 -> 255 + uint8_t n_group;//Number of UE Groups included in this message. Value 0 -> 255 + nfapi_nr_dl_tti_request_number_of_pdus_t* pdus_list; + nfapi_nr_dl_tti_request_number_of_groups_t* groups_list; + +} nfapi_nr_dl_tti_request_t; + +// Section 3.4.3 ul_tti_request + +//for prach_pdu: +typedef struct +{ + nfapi_nr_dig_bf_interface_t* dig_bf_interface_list; + +} nfapi_nr_ul_beamforming_number_of_prgs_t; + +typedef struct +{ + uint16_t num_prgs; + uint16_t prg_size; + //watchout: dig_bf_interface here, in table 3-43 it's dig_bf_interfaces + uint8_t dig_bf_interface; + nfapi_nr_ul_beamforming_number_of_prgs_t* prgs_list;// + +} nfapi_nr_ul_beamforming_t; + +typedef struct +{ + uint16_t phys_cell_id; + uint8_t num_prach_ocas; + uint8_t prach_format; + uint8_t num_ra; + uint8_t prach_start_symbol; + uint16_t num_cs;// + nfapi_nr_ul_beamforming_t beamforming; + +} nfapi_nr_prach_pdu_t; + +//for pusch_pdu: + + //for nfapi_nr_pusch_data_t; +typedef struct +{ + uint8_t rv_index; + uint8_t harq_process_id; + uint8_t new_data_indicator; + uint32_t tb_size; + uint16_t num_cb; + // fixme: + uint8_t *cb_present_and_position;//uint8_t cb_present_and_position[ceil (num_cb / 8)] + +} nfapi_nr_pusch_data_t; + //for nfapi_nr_pusch_uci_t +typedef struct +{ + uint16_t harq_ack_bit_length; + uint16_t csi_part1_bit_length; + uint16_t csi_part2_bit_length; + uint8_t alpha_scaling; + uint8_t beta_offset_harq_ack; + uint8_t beta_offset_csi1; + uint8_t beta_offset_csi2; + +} nfapi_nr_pusch_uci_t; + + //for nfapi_nr_pusch_ptrs_t +typedef struct +{ + uint16_t ptrs_port_index;//PT-RS antenna ports [TS38.214, sec6.2.3.1 and 38.212, section 7.3.1.1.2] Bitmap occupying the 12 LSBs with: bit 0: antenna port 0 bit 11: antenna port 11 and for each bit 0: PTRS port not used 1: PTRS port used + uint8_t ptrs_dmrs_port;//DMRS port corresponding to PTRS. + uint8_t ptrs_re_offset;//PT-RS resource element offset value taken from 0~11 +} nfapi_nr_ptrs_ports_t; + +typedef struct +{ + uint8_t num_ptrs_ports; + nfapi_nr_ptrs_ports_t* ptrs_ports_list; + uint8_t ptrs_time_density; + uint8_t ptrs_freq_density; + uint8_t ul_ptrs_power; + +}nfapi_nr_pusch_ptrs_t; + + //for nfapi_nr_dfts_ofdm_t +typedef struct +{ + uint8_t low_papr_group_number;//Group number for Low PAPR sequence generation. + uint16_t low_papr_sequence_number;//[TS38.211, sec 5.2.2] For DFT-S-OFDM. + uint8_t ul_ptrs_sample_density;//Number of PTRS groups [But I suppose this sentence is misplaced, so as the next one. --Chenyu] + uint8_t ul_ptrs_time_density_transform_precoding;//Number of samples per PTRS group + +} nfapi_nr_dfts_ofdm_t; + +typedef struct +{ + uint16_t pdu_bit_map;// + uint16_t rnti; + uint32_t handle;//An opaque handling returned in the RxData.indication and/or UCI.indication message + //BWP + uint16_t bwp_size; + uint16_t bwp_start; + uint8_t subcarrier_spacing; + uint8_t cyclic_prefix; + //pusch information always include + uint16_t target_code_rate; + uint8_t qam_mod_order; + uint8_t mcs_index; + uint8_t mcs_table; + uint8_t transform_precoding; + uint16_t data_scrambling_id; + //DMRS + uint8_t ul_dmrs_symb_pos; + uint8_t dmrs_config_type; + uint16_t ul_dmrs_scrambling_id; + uint8_t scid;// + uint8_t num_dmrs_cdm_grps_no_data; + uint16_t dmrs_ports;//DMRS ports. [TS38.212 7.3.1.1.2] provides description between DCI 0-1 content and DMRS ports. Bitmap occupying the 11 LSBs with: bit 0: antenna port 1000 bit 11: antenna port 1011 and for each bit 0: DMRS port not used 1: DMRS port used + //Pusch Allocation in frequency domain [TS38.214, sec 6.1.2.2] + uint8_t resource_alloc; + uint8_t rb_bitmap[36];// + uint16_t rb_start; + uint16_t rb_size; + uint8_t vrb_to_prb_mapping; + uint8_t frequency_hopping; + uint16_t tx_direct_current_location;//The uplink Tx Direct Current location for the carrier. Only values in the value range of this field between 0 and 3299, which indicate the subcarrier index within the carrier corresponding 1o the numerology of the corresponding uplink BWP and value 3300, which indicates "Outside the carrier" and value 3301, which indicates "Undetermined position within the carrier" are used. [TS38.331, UplinkTxDirectCurrentBWP IE] + uint8_t uplink_frequency_shift_7p5khz; + //Resource Allocation in time domain + uint8_t start_symbol_index; + uint8_t nr_of_symbols; + //Optional Data only included if indicated in pduBitmap + nfapi_nr_pusch_data_t pusch_data; + nfapi_nr_pusch_uci_t pusch_uci; + nfapi_nr_pusch_ptrs_t pusch_ptrs; + nfapi_nr_dfts_ofdm_t dfts_ofdm; + //beamforming + nfapi_nr_ul_beamforming_t beamforming; + +} nfapi_nr_pusch_pdu_t; + +//for pucch_pdu: +typedef struct +{ + uint16_t rnti; + uint32_t handle; + //BWP + uint16_t bwp_size; + uint16_t bwp_start; + uint8_t subcarrier_spacing; + uint8_t cyclic_prefix; + + uint8_t format_type; + uint8_t multi_slot_tx_indicator; + uint8_t pi_2bpsk; + //pucch allocation in freq domain + uint16_t prb_start; + uint16_t prb_size; + //pucch allocation in tome domain + uint8_t start_symbol_index; + uint8_t nr_of_symbols; + //hopping info + uint8_t freq_hop_flag; + uint16_t second_hop_prb; + uint8_t group_hop_flag; + uint8_t sequence_hop_flag; + uint16_t hopping_id; + uint16_t initial_cyclic_shift; + + uint16_t data_scrambling_id; + uint8_t time_domain_occ_idx; + uint8_t pre_dft_occ_idx; + uint8_t pre_dft_occ_len; + //DMRS + uint8_t add_dmrs_flag; + uint16_t dmrs_scrambling_id; + uint8_t dmrs_cyclic_shift; + + uint8_t sr_flag; + uint8_t bit_len_harq; + uint16_t bit_len_csi_part1; + uint16_t bit_len_csi_part2; + + nfapi_nr_ul_beamforming_t beamforming; + +} nfapi_nr_pucch_pdu_t; + +//for srs_pdu: + +typedef struct +{ + uint16_t rnti;//UE RNTI + uint32_t handle;//An opaque handling returned in the SRS.indication + //BWP + uint16_t bwp_size; + uint16_t bwp_start; + uint8_t subcarrier_spacing; + uint8_t cyclic_prefix; + + uint8_t num_ant_ports; + uint8_t num_symbols; + uint8_t num_repetitions; + uint8_t time_start_position;//Starting position in the time domain l0; Note: the MAC undertakes the translation from startPosition to 𝑙0 + uint8_t config_index; + uint16_t sequence_id; + uint8_t bandwidth_index; + uint8_t comb_size; + uint8_t comb_offset;//Transmission comb offset π‘˜ Μ„ TC [TS38.211, Sec 6.4.1.4.3] Value: 0 β†’ 1 (combSize = 0) Value: 0 β†’ 3 (combSize = 1) + uint8_t cyclic_shift; + uint8_t frequency_position; + uint8_t frequency_shift; + uint8_t frequency_hopping; + uint8_t group_or_sequence_hopping;//Group or sequence hopping configuration (RRC parameter groupOrSequenceHopping in SRS-Resource + uint8_t resource_type;//Type of SRS resource allocation + uint16_t t_srs;//SRS-Periodicity in slots [TS38.211 Sec 6.4.1.4.4] Value: 1,2,3,4,5,8,10,16,20,32,40,64,80,160,320,640,1280,2560 + uint16_t t_offset;//Slot offset value [TS38.211, Sec 6.4.1.4.3] Value:0->2559 + + nfapi_nr_ul_beamforming_t beamforming; + +} nfapi_nr_srs_pdu_t; + +// +typedef struct +{ + nfapi_nr_prach_pdu_t* prach_pdu; + nfapi_nr_pusch_pdu_t* pusch_pdu; + nfapi_nr_pucch_pdu_t* pucch_pdu; + nfapi_nr_srs_pdu_t* srs_pdu; +} nfapi_nr_ul_pdu_configuration_t; + +typedef struct +{ + uint16_t pdu_type;//0: PRACH PDU, 1: PUSCH PDU, 2: PUCCH PDU, 3: SRS PDU + uint16_t pdu_size;//Value: 0 -> 65535 + nfapi_nr_ul_pdu_configuration_t* ul_pdu_configuration; + +} nfapi_nr_ul_tti_request_number_of_pdus_t; + +typedef struct +{ + uint8_t pdu_idx;//This value is an index for number of PDU identified by nPDU in this message Value: 0 -> 65535 + +} nfapi_nr_ul_tti_request_number_of_ue_t; + +typedef struct +{ + uint8_t n_ue;//Number of UE in this group For SU-MIMO, one group includes one UE only. For MU-MIMO, one group includes up to 12 UEs. Value 1 -> 6 + nfapi_nr_ul_tti_request_number_of_ue_t* ue_list; + +} nfapi_nr_ul_tti_request_number_of_groups_t; + +typedef struct { + uint16_t sfn; //0->1023 + uint16_t slot;//0->319 + uint8_t n_pdus;//Number of PDUs that are included in this message. All PDUs in the message are numbered in order. Value 0 -> 255 + uint8_t rach_present;//Indicates if a RACH PDU will be included in this message. 0: no RACH in this slot 1: RACH in this slot + uint8_t n_ulsch;//Number of ULSCH PDUs that are included in this message. + uint8_t n_ulcch;//Number of ULCCH PDUs + uint8_t n_group;//Number of UE Groups included in this message. Value 0 -> 8 + nfapi_nr_ul_tti_request_number_of_pdus_t* pdus_list; + nfapi_nr_ul_tti_request_number_of_groups_t* groups_list; + +} nfapi_nr_ul_tti_request_t; + +//3.4.4 ul_dci_request + +//table 3-54 + +typedef struct +{ + uint16_t pdu_type;//0: PDCCH PDU + uint16_t pdu_size; + nfapi_nr_dl_pdu_configuration_t* phcch_pdu_configuration; + +} nfapi_nr_ul_dci_request_number_of_pdus_t; + +typedef struct +{ + uint16_t sfn; + uint16_t slot; + uint8_t num_pdus; + nfapi_nr_ul_dci_request_number_of_pdus_t* pdu_list; + +} nfapi_nr_ul_dci_request_t; + +//3.4.5 slot_errors +typedef enum { + NFAPI_NR_MSG_INVALID_STATE, + NFAPI_NR_SFN_OUT_OF_SYNC, + NFAPI_NR_MSG_BCH_MISSING, + NFAPI_NR_MSG_SLOT_ERR + +} nfapi_nr_slot_errors_ul_tti_e; + +typedef enum { + NFAPI_NR_MSG_INVALID_STATE, + NFAPI_NR_MSG_SLOT_ERR + +} nfapi_nr_slot_errors_dl_tti_e; + +typedef enum { + NFAPI_NR_MSG_INVALID_STATE, + NFAPI_NR_MSG_INVALID_SFN, + NFAPI_NR_MSG_UL_DCI_ERR + +} nfapi_nr_slot_errors_ul_dci_e; + +//3.4.6 tx_data_request + +//table 3-58 + +typedef struct +{ + uint16_t pdu_length; + uint16_t pdu_index; + uint32_t num_tlv; + //! fixme + nfapi_int32_tlv_t* tlvs; //nfapi_int32_tlv_t tlvs[num_tlv] + +} nfapi_nr_pdu_t; + +typedef struct +{ + uint16_t sfn; + uint16_t slot; + uint16_t number_of_pdus; + nfapi_nr_pdu_t* pdu_list; + +} nfapi_nr_tx_data_request_t; + +typedef enum { + NFAPI_NR_MSG_INVALID_STATE, + NFAPI_NR_MSG_INVALID_SFN, + NFAPI_NR_MSG_TX_ERR + +} nfapi_nr_dl_data_errors_e; + +//section 3.4.7 rx_data_indication + +//table 3-61 + +typedef struct +{ + uint32_t handle; + uint16_t rnti; + uint8_t harq_id; + uint16_t pdu_length; + uint8_t ul_cqi; + uint16_t timing_advance;//Timing advance 𝑇𝐴 measured for the UE [TS 38.213, Section 4.2] NTA_new = NTA_old + (TA βˆ’ 31) β‹… 16 β‹… 64⁄2ΞΌ Value: 0 β†’ 63 0xffff should be set if this field is invalid + uint16_t rssi; + //variable ! fixme + uint32_t pdu; //MAC PDU + +} nfapi_nr_rx_data_pdu_t; + +typedef struct +{ + uint16_t sfn; + uint16_t slot; + uint16_t number_of_pdus; + nfapi_nr_rx_data_pdu_t* pdu_list; + +} nfapi_nr_rx_data_indication_t; + +//3.4.8 crc_indication +//table 3-62 +typedef struct +{ + uint32_t handle; + uint16_t rnti; + uint8_t harq_id; + uint8_t tb_crc_status; + uint16_t num_cb;//If CBG is not used this parameter can be set to zero. Otherwise the number of CBs in the TB. Value: 0->65535 + //! fixme + uint8_t* cb_crc_status;//cb_crc_status[ceil(NumCb/8)]; + uint8_t ul_cqi; + uint16_t timing_advance; + uint16_t rssi; + +} nfapi_nr_crc_t; + +typedef struct +{ + uint16_t sfn; + uint16_t slot; + uint16_t number_crcs; + nfapi_nr_crc_t* crc_list; + +} nfapi_nr_crc_indication_t; + +//3.4.9 uci_indication + +//table 3-63 + + //for dci_pusch_pdu +typedef struct +{ + uint8_t pdu_bit_map; + uint32_t handle; + uint16_t rnti; + uint8_t ul_cqi; + uint16_t timing_advance; + uint16_t rssi; + nfapi_nr_harq_pdu_2_3_4_t harq;//table 3-70 + nfapi_nr_csi_part1_pdu_t csi_part1;//71 + nfapi_nr_csi_part2_pdu_t csi_part2;//72 + +}nfapi_nr_uci_pusch_pdu_t; + +//for PUCCH PDU Format 0/1 +typedef struct +{ + uint8_t pdu_bit_map; + uint32_t handle; + uint16_t rnti; + uint8_t pucch_format;//PUCCH format Value: 0 -> 1 0: PUCCH Format0 1: PUCCH Format1 + uint8_t ul_cqi; + uint16_t timing_advance; + uint16_t rssi; + nfapi_nr_sr_pdu_0_1_t sr;//67 + nfapi_nr_harq_pdu_0_1_t harq;//68 + + +}nfapi_nr_uci_pucch_pdu_format_0_1_t; + +//PUCCH PDU Format 2/3/4 +typedef struct +{ + uint8_t pdu_bit_map; + uint32_t handle; + uint16_t rnti; + uint8_t pucch_format;//PUCCH format Value: 0 -> 2 0: PUCCH Format2 1: PUCCH Format3 2: PUCCH Format4 + uint8_t ul_cqi; + uint16_t timing_advance; + uint16_t rssi; + nfapi_nr_sr_pdu_2_3_4_t sr;//69 + nfapi_nr_harq_pdu_2_3_4_t harq;//70 + nfapi_nr_csi_part1_pdu_t csi_part1;//71 + nfapi_nr_csi_part2_pdu_t csi_part2;//72 + +}nfapi_nr_uci_pucch_pdu_format_2_3_4_t; + +//for SR, HARQ and CSI Part 1/ 2 PDUs +//table 3-67 +typedef struct +{ + uint8_t sr_indication; + uint8_t sr_confidence_level; + +} nfapi_nr_sr_pdu_0_1_t; +//table 3-69 +typedef struct +{ + uint16_t sr_bit_len; + //! fixme + uint8_t* sr_payload;//sr_payload[ceil(sr_bit_len/8)]; + +} nfapi_nr_sr_pdu_2_3_4_t; +//table 3-68 +typedef struct +{ + uint8_t harq_value;//Indicates result on HARQ data. Value: 0 = pass 1 = fail 2 = not present + +} nfapi_nr_harq_t; + +typedef struct +{ + uint8_t num_harq; + uint8_t harq_confidence_level; + nfapi_nr_harq_t* harq_list; + +} nfapi_nr_harq_pdu_0_1_t; +//table 3-70 +typedef struct +{ + uint8_t harq_crc; + uint16_t harq_bit_len; + //! fixme + uint8_t* harq_payload;//harq_payload[ceil(harq_bit_len)]; +} nfapi_nr_harq_pdu_2_3_4_t; + +//table 3-71 +typedef struct +{ + uint8_t csi_part1_crc; + uint16_t csi_part1_bit_len; + //! fixme + uint8_t* csi_part1_payload;//uint8_t[ceil(csiPart1BitLen/8)] + +} nfapi_nr_csi_part1_pdu_t; + +//table 3-72 +typedef struct +{ + uint8_t csi_part2_crc; + uint16_t csi_part2_bit_len; + //! fixme + uint8_t* csi_part2_payload;//uint8_t[ceil(csiPart2BitLen/8)] +} nfapi_nr_csi_part2_pdu_t; + +typedef struct +{ + nfapi_nr_uci_pusch_pdu_t* pusch_pdu; + nfapi_nr_uci_pucch_pdu_format_0_1_t* pucch_pdu_format_0_1; + nfapi_nr_uci_pucch_pdu_format_2_3_4_t* pucch_pdu_format_2_3_4; + nfapi_nr_sr_pdu_0_1_t* sr_pdu_0_1; + nfapi_nr_sr_pdu_2_3_4_t* sr_pdu_2_3_4; + nfapi_nr_harq_pdu_0_1_t* harq_pdu_0_1; + nfapi_nr_harq_pdu_2_3_4_t* harq_pdu_2_3_4; + nfapi_nr_csi_part1_pdu_t* csi_part1_pdu; + nfapi_nr_csi_part2_pdu_t* csi_part2_pdu; + +} nfapi_nr_uci_pdu_information_t; + +typedef struct +{ + uint16_t pdu_type; + uint16_t pdu_size; + nfapi_nr_uci_pdu_information_t uci_pdu; + +} nfapi_nr_uci_t; + +typedef struct +{ + uint16_t sfn; + uint16_t slot; + uint16_t num_ucis; + nfapi_nr_uci_t* uci_list; + +} nfapi_nr_uci_indication_t; + +//3.4.10 srs_indication +//table 3-73 + +typedef struct +{ + uint8_t rb_snr; +}nfapi_nr_srs_indication_reported_symbol_resource_block_t; + +typedef struct +{ + uint16_t num_rbs; + nfapi_nr_srs_indication_reported_symbol_resource_block_t* rb_list; +}nfapi_nr_srs_indication_reported_symbol_t; + + +typedef struct +{ + uint32_t handle; + uint16_t rnti; + uint16_t timing_advance; + uint8_t num_symbols; + uint8_t wide_band_snr; + uint8_t num_reported_symbols; + nfapi_nr_srs_indication_reported_symbol_t* reported_symbol_list; + +}nfapi_nr_srs_indication_pdu_t; + +typedef struct +{ + uint16_t sfn; + uint16_t slot; + uint8_t number_of_pdus; + nfapi_nr_srs_indication_pdu_t* pdu_list; + +} nfapi_nr_srs_indication_t; + + +//3.4.11 rach_indication +//table 3-74 +typedef struct +{ + uint8_t preamble_index; + uint16_t timing_advance; + uint32_t preamble_pwr; + +} nfapi_nr_prach_indication_preamble_t; + +typedef struct{ + uint16_t phy_cell_id; + uint8_t symbol_index; + uint8_t slot_index; + uint8_t freq_index; + uint8_t avg_rssi; + uint8_t avg_snr; + uint8_t num_preamble; + nfapi_nr_prach_indication_preamble_t* preamble_list; + +}nfapi_nr_prach_indication_pdu_t; + +typedef struct +{ + uint16_t sfn; + uint16_t slot; + uint8_t number_of_pdus; + nfapi_nr_prach_indication_pdu_t* pdu_list; + +} nfapi_nr_rach_indication_t; + +#endif \ No newline at end of file From bea98773b00acfd69b32ad0e042b93d4ebe9d57f Mon Sep 17 00:00:00 2001 From: Kujou <874864293@qq.com> Date: Fri, 16 Aug 2019 15:16:55 +0800 Subject: [PATCH 7/8] Sec 3.4 --- .../nfapi/public_inc/nfapi_nr_interface_scf.h | 150 +++++++++--------- 1 file changed, 76 insertions(+), 74 deletions(-) diff --git a/nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface_scf.h b/nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface_scf.h index 4f6a012b67..af0f79d72e 100644 --- a/nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface_scf.h +++ b/nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface_scf.h @@ -73,8 +73,8 @@ typedef struct { } nfapi_nr_param_request_t; typedef enum { - NFAPI_NR_MSG_OK = 0, //NFAPI_NR_PARAM_MSG_OK = 0, - NFAPI_NR_MSG_INVALID_STATE //NFAPI_NR_PARAM_MSG_INVALID_STATE + NFAPI_NR_PARAM_MSG_OK = 0, + NFAPI_NR_PARAM_MSG_INVALID_STATE } nfapi_nr_param_errors_e; @@ -262,8 +262,8 @@ typedef struct { } nfapi_nr_config_request_t; typedef enum { - NFAPI_NR_MSG_OK = 0, //NFAPI_NR_CONFIG_MSG_OK = 0, - NFAPI_NR_MSG_INVALID_CONFIG //NFAPI_NR_CONFIG_MSG_INVALID_CONFIG //The configuration provided has missing mandatory TLVs, or TLVs that are invalid or unsupported in this state. + NFAPI_NR_CONFIG_MSG_OK = 0, + NFAPI_NR_CONFIG_MSG_INVALID_CONFIG //The configuration provided has missing mandatory TLVs, or TLVs that are invalid or unsupported in this state. } nfapi_nr_config_errors_e; typedef struct { @@ -454,7 +454,7 @@ typedef struct { } nfapi_nr_start_request_t; typedef enum { - NFAPI_NR_MSG_INVALID_STATE //NFAPI_NR_START_MSG_INVALID_STATE + NFAPI_NR_START_MSG_INVALID_STATE } nfapi_nr_start_errors_e; //3.3.4 STOP @@ -470,7 +470,7 @@ typedef struct { } nfapi_nr_stop_indication_t; typedef enum { - NFAPI_NR_MSG_INVALID_STATE //NFAPI_NR_STOP_MSG_INVALID_STATE + NFAPI_NR_STOP_MSG_INVALID_STATE } nfapi_nr_stop_errors_e; //3.3.5 PHY Notifications @@ -1067,23 +1067,23 @@ typedef struct //3.4.5 slot_errors typedef enum { - NFAPI_NR_MSG_INVALID_STATE, - NFAPI_NR_SFN_OUT_OF_SYNC, - NFAPI_NR_MSG_BCH_MISSING, - NFAPI_NR_MSG_SLOT_ERR + NFAPI_NR_SLOT_UL_TTI_MSG_INVALID_STATE, + NFAPI_NR_SLOT_UL_TTI_SFN_OUT_OF_SYNC, + NFAPI_NR_SLOT_UL_TTI_MSG_BCH_MISSING, + NFAPI_NR_SLOT_UL_TTI_MSG_SLOT_ERR } nfapi_nr_slot_errors_ul_tti_e; typedef enum { - NFAPI_NR_MSG_INVALID_STATE, - NFAPI_NR_MSG_SLOT_ERR + NFAPI_NR_SLOT_DL_TTI_MSG_INVALID_STATE, + NFAPI_NR_SLOT_DL_TTI_MSG_SLOT_ERR } nfapi_nr_slot_errors_dl_tti_e; typedef enum { - NFAPI_NR_MSG_INVALID_STATE, - NFAPI_NR_MSG_INVALID_SFN, - NFAPI_NR_MSG_UL_DCI_ERR + NFAPI_NR_SLOT_UL_DCI_MSG_INVALID_STATE, + NFAPI_NR_SLOT_UL_DCI_MSG_INVALID_SFN, + NFAPI_NR_SLOT_UL_DCI_MSG_UL_DCI_ERR } nfapi_nr_slot_errors_ul_dci_e; @@ -1111,9 +1111,9 @@ typedef struct } nfapi_nr_tx_data_request_t; typedef enum { - NFAPI_NR_MSG_INVALID_STATE, - NFAPI_NR_MSG_INVALID_SFN, - NFAPI_NR_MSG_TX_ERR + NFAPI_NR_DL_DATA_MSG_INVALID_STATE, + NFAPI_NR_DL_DATA_MSG_INVALID_SFN, + NFAPI_NR_DL_DATA_MSG_TX_ERR } nfapi_nr_dl_data_errors_e; @@ -1172,6 +1172,64 @@ typedef struct //3.4.9 uci_indication +//table 3-67 +typedef struct +{ + uint8_t sr_indication; + uint8_t sr_confidence_level; + +} nfapi_nr_sr_pdu_0_1_t; +//table 3-69 +typedef struct +{ + uint16_t sr_bit_len; + //! fixme + uint8_t* sr_payload;//sr_payload[ceil(sr_bit_len/8)]; + +} nfapi_nr_sr_pdu_2_3_4_t; +//table 3-68 +typedef struct +{ + uint8_t harq_value;//Indicates result on HARQ data. Value: 0 = pass 1 = fail 2 = not present + +} nfapi_nr_harq_t; + +//table 3-70 +typedef struct +{ + uint8_t harq_crc; + uint16_t harq_bit_len; + //! fixme + uint8_t* harq_payload;//harq_payload[ceil(harq_bit_len)]; +} nfapi_nr_harq_pdu_2_3_4_t; + +typedef struct +{ + uint8_t num_harq; + uint8_t harq_confidence_level; + nfapi_nr_harq_t* harq_list; + +} nfapi_nr_harq_pdu_0_1_t; + +//table 3-71 +typedef struct +{ + uint8_t csi_part1_crc; + uint16_t csi_part1_bit_len; + //! fixme + uint8_t* csi_part1_payload;//uint8_t[ceil(csiPart1BitLen/8)] + +} nfapi_nr_csi_part1_pdu_t; + +//table 3-72 +typedef struct +{ + uint8_t csi_part2_crc; + uint16_t csi_part2_bit_len; + //! fixme + uint8_t* csi_part2_payload;//uint8_t[ceil(csiPart2BitLen/8)] +} nfapi_nr_csi_part2_pdu_t; + //table 3-63 //for dci_pusch_pdu @@ -1223,62 +1281,6 @@ typedef struct }nfapi_nr_uci_pucch_pdu_format_2_3_4_t; //for SR, HARQ and CSI Part 1/ 2 PDUs -//table 3-67 -typedef struct -{ - uint8_t sr_indication; - uint8_t sr_confidence_level; - -} nfapi_nr_sr_pdu_0_1_t; -//table 3-69 -typedef struct -{ - uint16_t sr_bit_len; - //! fixme - uint8_t* sr_payload;//sr_payload[ceil(sr_bit_len/8)]; - -} nfapi_nr_sr_pdu_2_3_4_t; -//table 3-68 -typedef struct -{ - uint8_t harq_value;//Indicates result on HARQ data. Value: 0 = pass 1 = fail 2 = not present - -} nfapi_nr_harq_t; - -typedef struct -{ - uint8_t num_harq; - uint8_t harq_confidence_level; - nfapi_nr_harq_t* harq_list; - -} nfapi_nr_harq_pdu_0_1_t; -//table 3-70 -typedef struct -{ - uint8_t harq_crc; - uint16_t harq_bit_len; - //! fixme - uint8_t* harq_payload;//harq_payload[ceil(harq_bit_len)]; -} nfapi_nr_harq_pdu_2_3_4_t; - -//table 3-71 -typedef struct -{ - uint8_t csi_part1_crc; - uint16_t csi_part1_bit_len; - //! fixme - uint8_t* csi_part1_payload;//uint8_t[ceil(csiPart1BitLen/8)] - -} nfapi_nr_csi_part1_pdu_t; - -//table 3-72 -typedef struct -{ - uint8_t csi_part2_crc; - uint16_t csi_part2_bit_len; - //! fixme - uint8_t* csi_part2_payload;//uint8_t[ceil(csiPart2BitLen/8)] -} nfapi_nr_csi_part2_pdu_t; typedef struct { From 20d41208c88b56a190e0b4b63cb4a5799cce9801 Mon Sep 17 00:00:00 2001 From: Kujou <874864293@qq.com> Date: Fri, 16 Aug 2019 15:25:51 +0800 Subject: [PATCH 8/8] to test S3.4 --- openair2/NR_PHY_INTERFACE/nfapi_5g_test.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/openair2/NR_PHY_INTERFACE/nfapi_5g_test.c b/openair2/NR_PHY_INTERFACE/nfapi_5g_test.c index 29fe8daffd..7736252a07 100644 --- a/openair2/NR_PHY_INTERFACE/nfapi_5g_test.c +++ b/openair2/NR_PHY_INTERFACE/nfapi_5g_test.c @@ -8,8 +8,8 @@ int main ( int argc, char** argv) { nfapi_nr_cell_param_t nfapi_nr_cell_param_test; - nfapi_nr_num_config_tlvs_to_report* num_config_tlvs_to_report_list; - nfapi_nr_cell_param_test.num_config_tlvs_to_report_list = num_config_tlvs_to_report_list; + nfapi_nr_param_tlv_t* tlvs_to_report_list; + nfapi_nr_cell_param_test.config_tlvs_to_report_list = tlvs_to_report_list; nfapi_nr_cell_param_test.phy_state = 0; nfapi_nr_cell_param_test.release_capability = 0; nfapi_nr_cell_param_test.skip_blank_dl_config = 0;