diff --git a/openair1/PHY/NR_TRANSPORT/srs_rx.c b/openair1/PHY/NR_TRANSPORT/srs_rx.c index ba95b9ac44..5d855ae6b5 100644 --- a/openair1/PHY/NR_TRANSPORT/srs_rx.c +++ b/openair1/PHY/NR_TRANSPORT/srs_rx.c @@ -74,7 +74,7 @@ int nr_find_srs(rnti_t rnti, } if (index==-1) - LOG_E(MAC,"SRS list is full\n"); + LOG_E(PHY,"SRS list is full\n"); return(index); } diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c index 84f90d48ae..d2193d5f63 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c @@ -64,18 +64,18 @@ uint8_t vnf_first_sched_entry = 1; void clear_nr_nfapi_information(gNB_MAC_INST * gNB, int CC_idP, frame_t frameP, - sub_frame_t slotP){ + sub_frame_t slotP) +{ NR_ServingCellConfigCommon_t *scc = gNB->common_channels->ServingCellConfigCommon; const int num_slots = nr_slots_per_frame[*scc->ssbSubcarrierSpacing]; UL_tti_req_ahead_initialization(gNB, scc, num_slots, CC_idP); - nfapi_nr_dl_tti_request_t *DL_req = &gNB->DL_req[0]; + nfapi_nr_dl_tti_request_t *DL_req = &gNB->DL_req[0]; nfapi_nr_dl_tti_pdcch_pdu_rel15_t **pdcch = (nfapi_nr_dl_tti_pdcch_pdu_rel15_t **)gNB->pdcch_pdu_idx[CC_idP]; - nfapi_nr_ul_tti_request_t *future_ul_tti_req = - &gNB->UL_tti_req_ahead[CC_idP][(slotP + num_slots - 1) % num_slots]; - nfapi_nr_ul_dci_request_t *UL_dci_req = &gNB->UL_dci_req[0]; - nfapi_nr_tx_data_request_t *TX_req = &gNB->TX_req[0]; + nfapi_nr_ul_tti_request_t *future_ul_tti_req = &gNB->UL_tti_req_ahead[CC_idP][(slotP + num_slots - 1) % num_slots]; + nfapi_nr_ul_dci_request_t *UL_dci_req = &gNB->UL_dci_req[0]; + nfapi_nr_tx_data_request_t *TX_req = &gNB->TX_req[0]; gNB->pdu_index[CC_idP] = 0; @@ -223,7 +223,7 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, nr_schedule_srs(module_idP, frame); // This schedule RA procedure if not in phy_test mode - // Otherwise already consider 5G already connected + // Otherwise consider 5G already connected if (get_softmodem_params()->phy_test == 0) { nr_schedule_RA(module_idP, frame, slot); } diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c index 9f78ac06c1..da84ccd18f 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c @@ -344,7 +344,7 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_ const int mu = ul_bwp->scs; const struct NR_PUSCH_TimeDomainResourceAllocationList *tdaList = ul_bwp->tdaList; - const int temp_tda = get_ul_tda(nr_mac, scc, slot); + const int temp_tda = get_ul_tda(nr_mac, scc, frame, slot); if (temp_tda < 0) return false; AssertFatal(temp_tda < tdaList->list.count, @@ -354,7 +354,7 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_ int K2 = get_K2(ul_bwp->tdaList, temp_tda, mu); const int sched_frame = frame + (slot + K2 >= nr_slots_per_frame[mu]); const int sched_slot = (slot + K2) % nr_slots_per_frame[mu]; - const int tda = get_ul_tda(nr_mac, scc, sched_slot); + const int tda = get_ul_tda(nr_mac, scc, sched_frame, sched_slot); if (tda < 0) return false; AssertFatal(tda < tdaList->list.count, diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_srs.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_srs.c index 88bb9877c8..a403414222 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_srs.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_srs.c @@ -137,8 +137,8 @@ void nr_srs_ri_computation(const nfapi_nr_srs_normalized_channel_iq_matrix_t *nr } -void nr_configure_srs(nfapi_nr_srs_pdu_t *srs_pdu, int module_id, int CC_id,NR_UE_info_t* UE, NR_SRS_ResourceSet_t *srs_resource_set, NR_SRS_Resource_t *srs_resource) { - +void nr_configure_srs(nfapi_nr_srs_pdu_t *srs_pdu, int slot, int module_id, int CC_id, NR_UE_info_t *UE, NR_SRS_ResourceSet_t *srs_resource_set, NR_SRS_Resource_t *srs_resource) +{ NR_UE_UL_BWP_t *current_BWP = &UE->current_UL_BWP; srs_pdu->rnti = UE->rnti; @@ -189,6 +189,11 @@ void nr_configure_srs(nfapi_nr_srs_pdu_t *srs_pdu, int module_id, int CC_id,NR_U srs_pdu->beamforming.num_prgs = m_SRS[srs_pdu->config_index]; srs_pdu->beamforming.prg_size = 1; } + + uint16_t *vrb_map_UL = &RC.nrmac[module_id]->common_channels[CC_id].vrb_map_UL[slot * MAX_BWP_SIZE]; + uint64_t mask = SL_to_bitmap(13 - srs_pdu->time_start_position, srs_pdu->num_symbols); + for (int i = 0; i < srs_pdu->bwp_size; ++i) + vrb_map_UL[i + srs_pdu->bwp_start] |= mask; } void nr_fill_nfapi_srs(int module_id, int CC_id, NR_UE_info_t* UE, sub_frame_t slot, NR_SRS_ResourceSet_t *srs_resource_set, NR_SRS_Resource_t *srs_resource) { @@ -203,7 +208,7 @@ void nr_fill_nfapi_srs(int module_id, int CC_id, NR_UE_info_t* UE, sub_frame_t s memset(srs_pdu, 0, sizeof(nfapi_nr_srs_pdu_t)); future_ul_tti_req->n_pdus += 1; - nr_configure_srs(srs_pdu, module_id, CC_id, UE, srs_resource_set, srs_resource); + nr_configure_srs(srs_pdu, slot, module_id, CC_id, UE, srs_resource_set, srs_resource); } /******************************************************************* @@ -271,7 +276,7 @@ void nr_schedule_srs(int module_id, frame_t frame) { int n_slots_frame = nr_slots_per_frame[current_BWP->scs]; // Check if UE will transmit the SRS in this frame - if ( ((frame - offset/n_slots_frame)*n_slots_frame)%period == 0) { + if (((frame - offset / n_slots_frame) * n_slots_frame) % period == 0) { LOG_D(NR_MAC,"Scheduling SRS reception for %d.%d\n", frame, offset%n_slots_frame); nr_fill_nfapi_srs(module_id, CC_id, UE, offset%n_slots_frame, srs_resource_set, srs_resource); sched_ctrl->sched_srs.frame = frame; diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c index 2709a6e7be..d6a9553c10 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c @@ -39,7 +39,7 @@ //#define SRS_IND_DEBUG -const int get_ul_tda(const gNB_MAC_INST *nrmac, const NR_ServingCellConfigCommon_t *scc, int slot) { +const int get_ul_tda(gNB_MAC_INST *nrmac, const NR_ServingCellConfigCommon_t *scc, int frame, int slot) { /* there is a mixed slot only when in TDD */ const NR_TDD_UL_DL_Pattern_t *tdd = scc->tdd_UL_DL_ConfigurationCommon ? &scc->tdd_UL_DL_ConfigurationCommon->pattern1 : NULL; @@ -48,8 +48,16 @@ const int get_ul_tda(const gNB_MAC_INST *nrmac, const NR_ServingCellConfigCommon if (tdd && tdd->nrofUplinkSymbols > 1) { // if there is uplink symbols in mixed slot const int nr_slots_period = tdd->nrofDownlinkSlots + tdd->nrofUplinkSlots + 1; if ((slot%nr_slots_period) == tdd->nrofDownlinkSlots) + return 2; + } + + // Avoid slots with the SRS + UE_iterator(nrmac->UE_info.list, UE) { + NR_sched_srs_t sched_srs = UE->UE_sched_ctrl.sched_srs; + if(sched_srs.srs_scheduled && sched_srs.frame == frame && sched_srs.slot == slot) return 1; } + return 0; // if FDD or not mixed slot in TDD, for now use default TDA (TODO handle CSI-RS slots) } @@ -1583,7 +1591,7 @@ void pf_ul(module_id_t module_id, LOG_D(NR_MAC,"pf_ul: UE %04x harq_pid %d\n",UE->rnti,sched_pusch->ul_harq_pid); if (sched_pusch->ul_harq_pid >= 0) { /* Allocate retransmission*/ - const int tda = get_ul_tda(nrmac, scc, sched_pusch->slot); + const int tda = get_ul_tda(nrmac, scc, sched_pusch->frame, sched_pusch->slot); bool r = allocate_ul_retransmission(nrmac, frame, slot, rballoc_mask, &n_rb_sched, UE, sched_pusch->ul_harq_pid, scc, tda); if (!r) { LOG_D(NR_MAC, "%4d.%2d UL retransmission UE RNTI %04x can NOT be allocated\n", frame, slot, UE->rnti); @@ -1638,7 +1646,7 @@ void pf_ul(module_id_t module_id, } sched_pusch->nrOfLayers = sched_ctrl->srs_feedback.ul_ri + 1; - sched_pusch->time_domain_allocation = get_ul_tda(nrmac, scc, sched_pusch->slot); + sched_pusch->time_domain_allocation = get_ul_tda(nrmac, scc, sched_pusch->frame, sched_pusch->slot); sched_pusch->tda_info = nr_get_pusch_tda_info(current_BWP, sched_pusch->time_domain_allocation); sched_pusch->dmrs_info = get_ul_dmrs_params(scc, current_BWP, @@ -1724,7 +1732,7 @@ void pf_ul(module_id_t module_id, NR_sched_pusch_t *sched_pusch = &sched_ctrl->sched_pusch; sched_pusch->nrOfLayers = sched_ctrl->srs_feedback.ul_ri + 1; - sched_pusch->time_domain_allocation = get_ul_tda(nrmac, scc, sched_pusch->slot); + sched_pusch->time_domain_allocation = get_ul_tda(nrmac, scc, sched_pusch->frame, sched_pusch->slot); sched_pusch->tda_info = nr_get_pusch_tda_info(current_BWP, sched_pusch->time_domain_allocation); sched_pusch->dmrs_info = get_ul_dmrs_params(scc, current_BWP, @@ -1821,11 +1829,11 @@ bool nr_fr1_ulsch_preprocessor(module_id_t module_id, frame_t frame, sub_frame_t NR_UE_sched_ctrl_t *sched_ctrl = &nr_mac->UE_info.list[0]->UE_sched_ctrl; NR_UE_UL_BWP_t *current_BWP = &nr_mac->UE_info.list[0]->current_UL_BWP; int mu = current_BWP->scs; - const int temp_tda = get_ul_tda(nr_mac, scc, slot); + const int temp_tda = get_ul_tda(nr_mac, scc, frame, slot); int K2 = get_K2(current_BWP->tdaList, temp_tda, mu); const int sched_frame = (frame + (slot + K2 >= nr_slots_per_frame[mu])) & 1023; const int sched_slot = (slot + K2) % nr_slots_per_frame[mu]; - const int tda = get_ul_tda(nr_mac, scc, sched_slot); + const int tda = get_ul_tda(nr_mac, scc, sched_frame, sched_slot); if (tda < 0) return false; DevAssert(K2 == get_K2(current_BWP->tdaList, tda, mu)); @@ -1833,14 +1841,6 @@ bool nr_fr1_ulsch_preprocessor(module_id_t module_id, frame_t frame, sub_frame_t if (!is_xlsch_in_slot(nr_mac->ulsch_slot_bitmap[sched_slot / 64], sched_slot)) return false; - // Avoid slots with the SRS - UE_iterator(nr_mac->UE_info.list, UE) { - NR_sched_srs_t sched_srs = UE->UE_sched_ctrl.sched_srs; - if(sched_srs.srs_scheduled && sched_srs.frame==sched_frame && sched_srs.slot==sched_slot) { - return false; - } - } - sched_ctrl->sched_pusch.slot = sched_slot; sched_ctrl->sched_pusch.frame = sched_frame; UE_iterator(nr_mac->UE_info.list, UE2) { diff --git a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h index 0c27c045bf..51b261ddf1 100644 --- a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h +++ b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h @@ -475,7 +475,7 @@ void set_sched_pucch_list(NR_UE_sched_ctrl_t *sched_ctrl, const NR_ServingCellConfigCommon_t *scc); const int get_dl_tda(const gNB_MAC_INST *nrmac, const NR_ServingCellConfigCommon_t *scc, int slot); -const int get_ul_tda(const gNB_MAC_INST *nrmac, const NR_ServingCellConfigCommon_t *scc, int slot); +const int get_ul_tda(gNB_MAC_INST *nrmac, const NR_ServingCellConfigCommon_t *scc, int frame, int slot); int get_cce_index(const gNB_MAC_INST *nrmac, const int CC_id, diff --git a/openair2/RRC/NR/MESSAGES/asn1_msg.c b/openair2/RRC/NR/MESSAGES/asn1_msg.c index eb553e84b5..710a984307 100755 --- a/openair2/RRC/NR/MESSAGES/asn1_msg.c +++ b/openair2/RRC/NR/MESSAGES/asn1_msg.c @@ -748,7 +748,7 @@ void fill_initial_SpCellConfig(int uid, // We are using do_srs = 0 here because the periodic SRS will only be enabled in update_cellGroupConfig() if do_srs == 1 initialUplinkBWP->srs_Config = calloc(1,sizeof(*initialUplinkBWP->srs_Config)); - config_srs(initialUplinkBWP->srs_Config, NULL, curr_bwp, uid, 0, maxMIMO_Layers, 0); + config_srs(scc, initialUplinkBWP->srs_Config, NULL, curr_bwp, uid, 0, maxMIMO_Layers, 0); scheduling_request_config(scc, pucch_Config); @@ -1113,7 +1113,8 @@ void update_cellGroupConfig(NR_CellGroupConfig_t *cellGroupConfig, if (!uplinkConfig->initialUplinkBWP->srs_Config) { uplinkConfig->initialUplinkBWP->srs_Config = calloc(1, sizeof(*uplinkConfig->initialUplinkBWP->srs_Config)); } - config_srs(uplinkConfig->initialUplinkBWP->srs_Config, + config_srs(scc, + SpCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->srs_Config, uecap, curr_bwp, uid, @@ -1146,7 +1147,8 @@ void update_cellGroupConfig(NR_CellGroupConfig_t *cellGroupConfig, } *pusch_Config->maxRank = ul_max_layers; } - config_srs(ul_bwp->bwp_Dedicated->srs_Config, + config_srs(scc, + ul_bwp->bwp_Dedicated->srs_Config, uecap, bwp_size, uid, diff --git a/openair2/RRC/NR/nr_rrc_config.c b/openair2/RRC/NR/nr_rrc_config.c index 7cd269f92c..e0ffa29bf7 100644 --- a/openair2/RRC/NR/nr_rrc_config.c +++ b/openair2/RRC/NR/nr_rrc_config.c @@ -140,7 +140,7 @@ uint64_t get_ssb_bitmap(const NR_ServingCellConfigCommon_t *scc) { void set_csirs_periodicity(NR_NZP_CSI_RS_Resource_t *nzpcsi0, int uid, int nb_slots_per_period) { nzpcsi0->periodicityAndOffset = calloc(1,sizeof(*nzpcsi0->periodicityAndOffset)); - int ideal_period = nb_slots_per_period*MAX_MOBILES_PER_GNB; + int ideal_period = nb_slots_per_period * MAX_MOBILES_PER_GNB; if (ideal_period<5) { nzpcsi0->periodicityAndOffset->present = NR_CSI_ResourcePeriodicityAndOffset_PR_slots4; @@ -399,7 +399,82 @@ long rrc_get_max_nr_csrs(const uint8_t max_rbs, const long b_SRS) { return c_srs; } -void config_srs(NR_SetupRelease_SRS_Config_t *setup_release_srs_Config, +struct NR_SRS_Resource__resourceType__periodic *configure_periodic_srs(const NR_ServingCellConfigCommon_t *scc, + const int uid) +{ + + const NR_TDD_UL_DL_Pattern_t *tdd = scc->tdd_UL_DL_ConfigurationCommon ? &scc->tdd_UL_DL_ConfigurationCommon->pattern1 : NULL; + const int n_slots_frame = slotsperframe[*scc->ssbSubcarrierSpacing]; + const int ul_slots_period = tdd ? tdd->nrofUplinkSlots : n_slots_frame; + const int n_slots_period = tdd ? n_slots_frame/get_nb_periods_per_frame(tdd->dl_UL_TransmissionPeriodicity) : n_slots_frame; + const int first_full_ul_slot = n_slots_period - ul_slots_period; + const int ideal_period = n_slots_period * MAX_MOBILES_PER_GNB; + struct NR_SRS_Resource__resourceType__periodic *periodic_srs = calloc(1,sizeof(*periodic_srs)); + if (ideal_period < 5) { + periodic_srs->periodicityAndOffset_p.present = NR_SRS_PeriodicityAndOffset_PR_sl4; + periodic_srs->periodicityAndOffset_p.choice.sl4 = first_full_ul_slot + (uid % ul_slots_period) + (n_slots_period * (uid / ul_slots_period)); + } + else if (ideal_period < 6) { + periodic_srs->periodicityAndOffset_p.present = NR_SRS_PeriodicityAndOffset_PR_sl5; + periodic_srs->periodicityAndOffset_p.choice.sl5 = first_full_ul_slot + (uid % ul_slots_period) + (n_slots_period * (uid / ul_slots_period)); + } + else if (ideal_period < 9) { + periodic_srs->periodicityAndOffset_p.present = NR_SRS_PeriodicityAndOffset_PR_sl8; + periodic_srs->periodicityAndOffset_p.choice.sl8 = first_full_ul_slot + (uid % ul_slots_period) + (n_slots_period * (uid / ul_slots_period)); + } + else if (ideal_period < 11) { + periodic_srs->periodicityAndOffset_p.present = NR_SRS_PeriodicityAndOffset_PR_sl10; + periodic_srs->periodicityAndOffset_p.choice.sl10 = first_full_ul_slot + (uid % ul_slots_period) + (n_slots_period * (uid / ul_slots_period)); + } + else if (ideal_period < 17) { + periodic_srs->periodicityAndOffset_p.present = NR_SRS_PeriodicityAndOffset_PR_sl16; + periodic_srs->periodicityAndOffset_p.choice.sl16 = first_full_ul_slot + (uid % ul_slots_period) + (n_slots_period * (uid / ul_slots_period)); + } + else if (ideal_period < 21) { + periodic_srs->periodicityAndOffset_p.present = NR_SRS_PeriodicityAndOffset_PR_sl20; + periodic_srs->periodicityAndOffset_p.choice.sl20 = first_full_ul_slot + (uid % ul_slots_period) + (n_slots_period * (uid / ul_slots_period)); + } + else if (ideal_period < 33) { + periodic_srs->periodicityAndOffset_p.present = NR_SRS_PeriodicityAndOffset_PR_sl32; + periodic_srs->periodicityAndOffset_p.choice.sl32 = first_full_ul_slot + (uid % ul_slots_period) + (n_slots_period * (uid / ul_slots_period)); + } + else if (ideal_period < 41) { + periodic_srs->periodicityAndOffset_p.present = NR_SRS_PeriodicityAndOffset_PR_sl40; + periodic_srs->periodicityAndOffset_p.choice.sl40 = first_full_ul_slot + (uid % ul_slots_period) + (n_slots_period * (uid / ul_slots_period)); + } + else if (ideal_period < 65) { + periodic_srs->periodicityAndOffset_p.present = NR_SRS_PeriodicityAndOffset_PR_sl64; + periodic_srs->periodicityAndOffset_p.choice.sl64 = first_full_ul_slot + (uid % ul_slots_period) + (n_slots_period * (uid / ul_slots_period)); + } + else if (ideal_period < 81) { + periodic_srs->periodicityAndOffset_p.present = NR_SRS_PeriodicityAndOffset_PR_sl80; + periodic_srs->periodicityAndOffset_p.choice.sl80 = first_full_ul_slot + (uid % ul_slots_period) + (n_slots_period * (uid / ul_slots_period)); + } + else if (ideal_period < 161) { + periodic_srs->periodicityAndOffset_p.present = NR_SRS_PeriodicityAndOffset_PR_sl160; + periodic_srs->periodicityAndOffset_p.choice.sl160 = first_full_ul_slot + (uid % ul_slots_period) + (n_slots_period * (uid / ul_slots_period)); + } + else if (ideal_period < 321) { + periodic_srs->periodicityAndOffset_p.present = NR_SRS_PeriodicityAndOffset_PR_sl320; + periodic_srs->periodicityAndOffset_p.choice.sl320 = first_full_ul_slot + (uid % ul_slots_period) + (n_slots_period * (uid / ul_slots_period)); + } + else if (ideal_period < 641) { + periodic_srs->periodicityAndOffset_p.present = NR_SRS_PeriodicityAndOffset_PR_sl640; + periodic_srs->periodicityAndOffset_p.choice.sl640 = first_full_ul_slot + (uid % ul_slots_period) + (n_slots_period * (uid / ul_slots_period)); + } + else if (ideal_period < 1281) { + periodic_srs->periodicityAndOffset_p.present = NR_SRS_PeriodicityAndOffset_PR_sl1280; + periodic_srs->periodicityAndOffset_p.choice.sl1280 = first_full_ul_slot + (uid % ul_slots_period) + (n_slots_period * (uid / ul_slots_period)); + } + else { + periodic_srs->periodicityAndOffset_p.present = NR_SRS_PeriodicityAndOffset_PR_sl2560; + periodic_srs->periodicityAndOffset_p.choice.sl2560 = first_full_ul_slot + (uid % ul_slots_period) + (n_slots_period * (uid / ul_slots_period)); + } + return periodic_srs; +} + +void config_srs(const NR_ServingCellConfigCommon_t *scc, + NR_SetupRelease_SRS_Config_t *setup_release_srs_Config, const NR_UE_NR_Capability_t *uecap, const int curr_bwp, const int uid, @@ -512,7 +587,7 @@ void config_srs(NR_SetupRelease_SRS_Config_t *setup_release_srs_Config, srs_res0->transmissionComb.choice.n2 = calloc(1,sizeof(*srs_res0->transmissionComb.choice.n2)); srs_res0->transmissionComb.choice.n2->combOffset_n2 = 0; srs_res0->transmissionComb.choice.n2->cyclicShift_n2 = 0; - srs_res0->resourceMapping.startPosition = 2 + uid%2; + srs_res0->resourceMapping.startPosition = 1; srs_res0->resourceMapping.nrofSymbols = NR_SRS_Resource__resourceMapping__nrofSymbols_n1; srs_res0->resourceMapping.repetitionFactor = NR_SRS_Resource__resourceMapping__repetitionFactor_n1; srs_res0->freqDomainPosition = 0; @@ -523,9 +598,7 @@ void config_srs(NR_SetupRelease_SRS_Config_t *setup_release_srs_Config, srs_res0->groupOrSequenceHopping = NR_SRS_Resource__groupOrSequenceHopping_neither; if (do_srs) { srs_res0->resourceType.present = NR_SRS_Resource__resourceType_PR_periodic; - srs_res0->resourceType.choice.periodic = calloc(1,sizeof(*srs_res0->resourceType.choice.periodic)); - srs_res0->resourceType.choice.periodic->periodicityAndOffset_p.present = NR_SRS_PeriodicityAndOffset_PR_sl160; - srs_res0->resourceType.choice.periodic->periodicityAndOffset_p.choice.sl160 = 17 + (uid >> 1) * 10; // 17/17/.../147/157 are mixed slots + srs_res0->resourceType.choice.periodic = configure_periodic_srs(scc, uid); } else { srs_res0->resourceType.present = NR_SRS_Resource__resourceType_PR_aperiodic; srs_res0->resourceType.choice.aperiodic = calloc(1,sizeof(*srs_res0->resourceType.choice.aperiodic)); @@ -642,11 +715,19 @@ void nr_rrc_config_ul_tda(NR_ServingCellConfigCommon_t *scc, int min_fb_delay){ pusch_timedomainresourceallocation->startSymbolAndLength = get_SLIV(0,13); ASN_SEQUENCE_ADD(&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list,pusch_timedomainresourceallocation); + // UL TDA index 1 in case of SRS + struct NR_PUSCH_TimeDomainResourceAllocation *pusch_timedomainresourceallocation1 = CALLOC(1,sizeof(struct NR_PUSCH_TimeDomainResourceAllocation)); + pusch_timedomainresourceallocation1->k2 = CALLOC(1,sizeof(long)); + *pusch_timedomainresourceallocation1->k2 = k2; + pusch_timedomainresourceallocation1->mappingType = NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB; + pusch_timedomainresourceallocation1->startSymbolAndLength = get_SLIV(0,12); + ASN_SEQUENCE_ADD(&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list,pusch_timedomainresourceallocation1); + if(frame_type==TDD) { if(scc->tdd_UL_DL_ConfigurationCommon) { int ul_symb = scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols; if (ul_symb>1) { - // UL TDA index 1 for mixed slot (TDD) + // UL TDA index 2 for mixed slot (TDD) pusch_timedomainresourceallocation = CALLOC(1,sizeof(struct NR_PUSCH_TimeDomainResourceAllocation)); pusch_timedomainresourceallocation->k2 = CALLOC(1,sizeof(long)); *pusch_timedomainresourceallocation->k2 = k2; @@ -654,7 +735,7 @@ void nr_rrc_config_ul_tda(NR_ServingCellConfigCommon_t *scc, int min_fb_delay){ pusch_timedomainresourceallocation->startSymbolAndLength = get_SLIV(14-ul_symb,ul_symb-1); // starting in fist ul symbol til the last but one ASN_SEQUENCE_ADD(&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list,pusch_timedomainresourceallocation); } - // UL TDA index 2 for msg3 in the mixed slot (TDD) + // UL TDA index 3 for msg3 in the mixed slot (TDD) int nb_periods_per_frame = get_nb_periods_per_frame(scc->tdd_UL_DL_ConfigurationCommon->pattern1.dl_UL_TransmissionPeriodicity); int nb_slots_per_period = ((1<uplinkConfig->pusch_ServingCellConfig->choice.setup->ext1->maxMIMO_Layers : 1; ubwp->bwp_Dedicated->srs_Config = calloc(1,sizeof(*ubwp->bwp_Dedicated->srs_Config)); - config_srs(ubwp->bwp_Dedicated->srs_Config, + config_srs(scc, + ubwp->bwp_Dedicated->srs_Config, NULL, curr_bwp, uid, diff --git a/openair2/RRC/NR/nr_rrc_config.h b/openair2/RRC/NR/nr_rrc_config.h index cdcaec4d76..52dd065b7d 100644 --- a/openair2/RRC/NR/nr_rrc_config.h +++ b/openair2/RRC/NR/nr_rrc_config.h @@ -79,7 +79,8 @@ void config_csirs(const NR_ServingCellConfigCommon_t *servingcellconfigcommon, int id); void config_csiim(int do_csirs, int dl_antenna_ports, int curr_bwp, NR_CSI_MeasConfig_t *csi_MeasConfig, int id); -void config_srs(NR_SetupRelease_SRS_Config_t *setup_release_srs_Config, +void config_srs(const NR_ServingCellConfigCommon_t *scc, + NR_SetupRelease_SRS_Config_t *setup_release_srs_Config, const NR_UE_NR_Capability_t *uecap, const int curr_bwp, const int uid, diff --git a/openair2/RRC/NR/rrc_gNB_reconfig.c b/openair2/RRC/NR/rrc_gNB_reconfig.c index 9185385252..0e5a199dd6 100644 --- a/openair2/RRC/NR/rrc_gNB_reconfig.c +++ b/openair2/RRC/NR/rrc_gNB_reconfig.c @@ -247,7 +247,7 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco int curr_bwp = NRRIV2BW(servingcellconfigcommon->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth,MAX_BWP_SIZE); initialUplinkBWP->srs_Config = calloc(1,sizeof(*initialUplinkBWP->srs_Config)); - config_srs(initialUplinkBWP->srs_Config, NULL, curr_bwp, uid, 0, maxMIMO_Layers, configuration->do_SRS); + config_srs(servingcellconfigcommon, initialUplinkBWP->srs_Config, NULL, curr_bwp, uid, 0, maxMIMO_Layers, configuration->do_SRS); // Downlink BWPs int n_dl_bwp = 1;