Merge branch 'develop' into 'nr_prach_fr2'

This commit is contained in:
Florian Kaltenberger
2020-11-20 08:47:34 +01:00
186 changed files with 7156 additions and 3509 deletions
-4
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@@ -1,8 +1,4 @@
static int cmpdouble(const void *p1, const void *p2) {
return *(double *)p1 > *(double *)p2;
}
double median(varArray_t *input) {
return *(double *)((uint8_t *)(input+1)+(input->size/2)*input->atomSize);
}
+3
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@@ -79,6 +79,9 @@ int n_tx_dropped = 0; /*!< \brief initial max process time for tx */
int n_rx_dropped = 0; /*!< \brief initial max process time for rx */
double DS_TDL = .03;
static int cmpdouble(const void *p1, const void *p2) {
return *(double *)p1 > *(double *)p2;
}
int emulate_rf = 0;
int split73=0;
+4 -1
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@@ -80,6 +80,9 @@ double t_tx_min = 1000000000; /*!< \brief initial min process time for tx */
double t_rx_min = 1000000000; /*!< \brief initial min process time for tx */
int n_tx_dropped = 0; /*!< \brief initial max process time for tx */
int n_rx_dropped = 0; /*!< \brief initial max process time for rx */
static int cmpdouble(const void *p1, const void *p2) {
return *(double *)p1 > *(double *)p2;
}
int split73=0;
@@ -345,7 +348,7 @@ int main(int argc, char **argv) {
unsigned short input_buffer_length;
unsigned int ret;
unsigned int coded_bits_per_codeword,nsymb;
unsigned int tx_lev=0,tx_lev_dB,trials,errs[4]= {0,0,0,0},round_trials[4]= {0,0,0,0};
unsigned int tx_lev=0,tx_lev_dB,trials,errs[5]= {0,0,0,0,0},round_trials[4]= {0,0,0,0};
FILE *bler_fd=NULL;
char bler_fname[512];
FILE *time_meas_fd=NULL;
+59 -47
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@@ -66,8 +66,9 @@
#define inMicroS(a) (((double)(a))/(cpu_freq_GHz*1000.0))
#include "SIMULATION/LTE_PHY/common_sim.h"
#include <openair2/LAYER2/MAC/mac_vars.h>
#include <openair2/RRC/LTE/rrc_vars.h>
unsigned char NB_eNB_INST=0;
LCHAN_DESC DCCH_LCHAN_DESC,DTCH_DL_LCHAN_DESC,DTCH_UL_LCHAN_DESC;
rlc_info_t Rlc_info_um,Rlc_info_am_config;
@@ -81,7 +82,6 @@ double cpuf;
int sf_ahead=4 ;
int sl_ahead=0;
uint8_t nfapi_mode = 0;
uint16_t NB_UE_INST = 1;
uint64_t downlink_frequency[MAX_NUM_CCs][4];
// dummy functions
@@ -150,6 +150,42 @@ int is_x2ap_enabled(void)
openair0_config_t openair0_cfg[MAX_CARDS];
/* specific dlsim DL preprocessor: uses rbStart/rbSize/mcs from command line of
dlsim, does not search for CCE/PUCCH occasion but simply sets to 0 */
int g_mcsIndex = -1, g_rbStart = -1, g_rbSize = -1;
void nr_dlsim_preprocessor(module_id_t module_id,
frame_t frame,
sub_frame_t slot,
int num_slots_per_tdd) {
NR_UE_info_t *UE_info = &RC.nrmac[module_id]->UE_info;
AssertFatal(UE_info->num_UEs == 1, "can have only a single UE\n");
NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[0];
/* manually set free CCE to 0 */
const int target_ss = NR_SearchSpace__searchSpaceType_PR_ue_Specific;
sched_ctrl->search_space = get_searchspace(sched_ctrl->active_bwp, target_ss);
uint8_t nr_of_candidates;
find_aggregation_candidates(&sched_ctrl->aggregation_level,
&nr_of_candidates,
sched_ctrl->search_space);
sched_ctrl->coreset = get_coreset(
sched_ctrl->active_bwp, sched_ctrl->search_space, 1 /* dedicated */);
sched_ctrl->cce_index = 0;
/* set "any" value for PUCCH (simulator evaluates PDSCH only) */
sched_ctrl->pucch_sched_idx = 0;
sched_ctrl->pucch_occ_idx = 0;
sched_ctrl->rbStart = g_rbStart;
sched_ctrl->rbSize = g_rbSize;
sched_ctrl->mcs = g_mcsIndex;
sched_ctrl->time_domain_allocation = 2;
sched_ctrl->mcsTableIdx = 0;
AssertFatal(sched_ctrl->rbStart >= 0, "invalid rbStart %d\n", sched_ctrl->rbStart);
AssertFatal(sched_ctrl->rbSize > 0, "invalid rbSize %d\n", sched_ctrl->rbSize);
AssertFatal(sched_ctrl->mcs >= 0, "invalid sched_ctrl->mcs %d\n", sched_ctrl->mcs);
sched_ctrl->numDmrsCdmGrpsNoData = 1;
}
int main(int argc, char **argv)
@@ -194,11 +230,10 @@ int main(int argc, char **argv)
SCM_t channel_model=AWGN;//Rayleigh1_anticorr;
NB_UE_INST = 1;
//double pbch_sinr;
//int pbch_tx_ant;
int N_RB_DL=106,mu=1;
nfapi_nr_dl_tti_pdsch_pdu_rel15_t dlsch_config;
NR_sched_pucch pucch_sched;
//unsigned char frame_type = 0;
@@ -227,7 +262,6 @@ int main(int argc, char **argv)
randominit(0);
int mcsIndex_set=0,rbStart_set=0,rbSize_set=0;
int print_perf = 0;
FILE *scg_fd=NULL;
@@ -393,18 +427,15 @@ int main(int argc, char **argv)
case 'a':
dlsch_config.rbStart = atoi(optarg);
rbStart_set=1;
g_rbStart = atoi(optarg);
break;
case 'b':
dlsch_config.rbSize = atoi(optarg);
rbSize_set=1;
g_rbSize = atoi(optarg);
break;
case 'e':
dlsch_config.mcsIndex[0] = atoi(optarg);
mcsIndex_set=1;
g_mcsIndex = atoi(optarg);
break;
case 'm':
@@ -483,6 +514,7 @@ int main(int argc, char **argv)
RC.nb_nr_mac_CC[i] = 1;
mac_top_init_gNB();
gNB_mac = RC.nrmac[0];
gNB_mac->pre_processor_dl = nr_dlsim_preprocessor;
gNB_RRC_INST rrc;
memset((void*)&rrc,0,sizeof(rrc));
@@ -560,6 +592,12 @@ int main(int argc, char **argv)
// nr_phy_config_request_sim(gNB,N_RB_DL,N_RB_DL,mu,Nid_cell,SSB_positions);
// call MAC to configure common parameters
/* rrc_mac_config_req_gNB() has created one user, so set the scheduling
* parameters from command line in global variables that will be picked up by
* scheduling preprocessor */
if (g_mcsIndex < 0) g_mcsIndex = 9;
if (g_rbStart < 0) g_rbStart=0;
if (g_rbSize < 0) g_rbSize = N_RB_DL - g_rbStart;
double fs,bw;
@@ -687,11 +725,6 @@ int main(int argc, char **argv)
AssertFatal(input_fd==NULL,"Not ready for input signal file\n");
gNB->pbch_configured = 1;
gNB->ssb_pdu.ssb_pdu_rel15.bchPayload=0x001234;
if (mcsIndex_set==0) dlsch_config.mcsIndex[0]=9;
if (rbStart_set==0) dlsch_config.rbStart=0;
if (rbSize_set==0) dlsch_config.rbSize=N_RB_DL-dlsch_config.rbStart;
//Configure UE
rrc.carrier.MIB = (uint8_t*) malloc(4);
@@ -788,8 +821,14 @@ int main(int argc, char **argv)
for (int i=0; i<MAX_NUM_CORESET; i++)
gNB_mac->UE_info.num_pdcch_cand[0][i] = 0;
if (css_flag == 0) nr_schedule_uss_dlsch_phytest(0,frame,slot,&pucch_sched,&dlsch_config);
else nr_schedule_css_dlsch_phytest(0,frame,slot);
if (css_flag == 0) {
const uint8_t slots_per_frame[5] = {10, 20, 40, 80, 160};
const NR_TDD_UL_DL_Pattern_t *tdd_pattern = &scc->tdd_UL_DL_ConfigurationCommon->pattern1;
const int num_slots_per_tdd = slots_per_frame[*scc->ssbSubcarrierSpacing] >> (7 - tdd_pattern->dl_UL_TransmissionPeriodicity);
nr_schedule_ue_spec(0, frame, slot, num_slots_per_tdd);
} else {
nr_schedule_css_dlsch_phytest(0,frame,slot);
}
Sched_INFO.module_id = 0;
Sched_INFO.CC_id = 0;
Sched_INFO.frame = frame;
@@ -825,38 +864,11 @@ int main(int argc, char **argv)
12,
frame_parms->nb_prefix_samples,
CYCLIC_PREFIX);
} else {/*
} else {
nr_normal_prefix_mod(&gNB->common_vars.txdataF[aa][txdataF_offset],
&txdata[aa][tx_offset],
14,
frame_parms);
*/
PHY_ofdm_mod(&gNB->common_vars.txdataF[aa][txdataF_offset],
(int*)&txdata[aa][tx_offset],
frame_parms->ofdm_symbol_size,
1,
frame_parms->nb_prefix_samples0,
CYCLIC_PREFIX);
apply_nr_rotation(frame_parms,
(int16_t*)&txdata[aa][tx_offset],
slot,
0,
1,
frame_parms->ofdm_symbol_size+frame_parms->nb_prefix_samples0);
PHY_ofdm_mod(&gNB->common_vars.txdataF[aa][txdataF_offset+frame_parms->ofdm_symbol_size],
(int*)&txdata[aa][tx_offset+frame_parms->nb_prefix_samples0+frame_parms->ofdm_symbol_size],
frame_parms->ofdm_symbol_size,
13,
frame_parms->nb_prefix_samples,
CYCLIC_PREFIX);
apply_nr_rotation(frame_parms,
(int16_t*)&txdata[aa][tx_offset+frame_parms->nb_prefix_samples0+frame_parms->ofdm_symbol_size],
slot,
1,
13,
frame_parms->ofdm_symbol_size+frame_parms->nb_prefix_samples);
}
}
@@ -986,7 +998,7 @@ int main(int argc, char **argv)
if (print_perf==1) {
printf("\ngNB TX function statistics (per %d us slot, NPRB %d, mcs %d, TBS %d, Kr %d (Zc %d))\n",
1000>>*scc->ssbSubcarrierSpacing,dlsch_config.rbSize,dlsch_config.mcsIndex[0],
1000>>*scc->ssbSubcarrierSpacing, g_rbSize, g_mcsIndex,
gNB->dlsch[0][0]->harq_processes[0]->pdsch_pdu.pdsch_pdu_rel15.TBSize[0]<<3,
gNB->dlsch[0][0]->harq_processes[0]->K,
gNB->dlsch[0][0]->harq_processes[0]->K/((gNB->dlsch[0][0]->harq_processes[0]->pdsch_pdu.pdsch_pdu_rel15.TBSize[0]<<3)>3824?22:10));
+1
View File
@@ -46,6 +46,7 @@
#include "openair1/SIMULATION/RF/rf.h"
#include "openair1/SIMULATION/NR_PHY/nr_unitary_defs.h"
#include "openair1/SIMULATION/NR_PHY/nr_dummy_functions.c"
#include "openair1/PHY/MODULATION/nr_modulation.h"
//#define DEBUG_NR_PBCHSIM
+7 -5
View File
@@ -45,11 +45,13 @@
#include "PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h"
#include "nr_unitary_defs.h"
#include "OCG_vars.h"
#include <openair2/LAYER2/MAC/mac_vars.h>
#include <openair2/RRC/LTE/rrc_vars.h>
#define NR_PRACH_DEBUG 1
#define PRACH_WRITE_OUTPUT_DEBUG 1
unsigned char NB_eNB_INST=0;
LCHAN_DESC DCCH_LCHAN_DESC,DTCH_DL_LCHAN_DESC,DTCH_UL_LCHAN_DESC;
rlc_info_t Rlc_info_um,Rlc_info_am_config;
@@ -59,7 +61,6 @@ RAN_CONTEXT_t RC;
RU_t *ru;
double cpuf;
extern uint16_t prach_root_sequence_map0_3[838];
uint16_t NB_UE_INST=1;
openair0_config_t openair0_cfg[MAX_CARDS];
uint8_t nfapi_mode=0;
int sl_ahead = 0;
@@ -115,15 +116,16 @@ int main(int argc, char **argv){
int i, aa, aarx, **txdata, trial, n_frames = 1, prach_start, rx_prach_start; //, ntrials=1;
int N_RB_UL = 106, delay = 0, NCS_config = 13, rootSequenceIndex = 1, threequarter_fs = 0, mu = 1, fd_occasion = 0, loglvl = OAILOG_INFO, numRA = 0, prachStartSymbol = 0;
uint8_t snr1set = 0, ue_speed1set = 0, transmission_mode = 1, n_tx = 1, n_rx = 1, awgn_flag = 0, msg1_frequencystart = 0, num_prach_fd_occasions = 1, prach_format=0;
uint8_t frame = 1, slot=19, slot_gNB=19, config_index = 98, prach_sequence_length = 1, num_root_sequences = 16, restrictedSetConfig = 0, N_dur, N_t_slot, start_symbol;
uint8_t frame = 1, slot=19, slot_gNB=19, config_index = 98, prach_sequence_length = 1, restrictedSetConfig = 0, N_dur, N_t_slot, start_symbol;
uint16_t Nid_cell = 0, preamble_tx = 0, preamble_delay, format, format0, format1;
uint32_t tx_lev = 10000, prach_errors = 0, samp_count; //,tx_lev_dB;
uint32_t tx_lev = 10000, prach_errors = 0; //,tx_lev_dB;
uint64_t SSB_positions = 0x01;
uint16_t RA_sfn_index;
uint8_t N_RA_slot;
uint8_t config_period;
int prachOccasion = 0;
double DS_TDL = .03;
NB_UE_INST=1;
// int8_t interf1=-19,interf2=-19;
// uint8_t abstraction_flag=0,calibration_flag=0;
@@ -718,7 +720,7 @@ int main(int argc, char **argv){
// printf("Sigma2 %f (sigma2_dB %f)\n",sigma2,sigma2_dB);
if (awgn_flag == 0) {
multipath_tv_channel(UE2gNB, s_re, s_im, r_re, r_im, frame_parms->samples_per_tti<<1, 0);
multipath_tv_channel(UE2gNB, s_re, s_im, r_re, r_im, frame_parms->samples_per_frame, 0);
}
if (n_frames==1) {
+9 -9
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@@ -60,9 +60,11 @@
#define inMicroS(a) (((double)(a))/(cpu_freq_GHz*1000.0))
#include "SIMULATION/LTE_PHY/common_sim.h"
#include <openair2/LAYER2/MAC/mac_vars.h>
#include <openair2/RRC/LTE/rrc_vars.h>
//#define DEBUG_ULSIM
unsigned char NB_eNB_INST=0;
LCHAN_DESC DCCH_LCHAN_DESC,DTCH_DL_LCHAN_DESC,DTCH_UL_LCHAN_DESC;
rlc_info_t Rlc_info_um,Rlc_info_am_config;
@@ -75,7 +77,6 @@ int sf_ahead=4 ;
int sl_ahead=0;
double cpuf;
uint8_t nfapi_mode = 0;
uint16_t NB_UE_INST = 1;
uint64_t downlink_frequency[MAX_NUM_CCs][4];
@@ -164,6 +165,7 @@ int main(int argc, char **argv)
uint16_t N_RB_DL = 106, N_RB_UL = 106, mu = 1;
double tx_gain=1.0;
double N0=30;
NB_UE_INST = 1;
//unsigned char frame_type = 0;
NR_DL_FRAME_PARMS *frame_parms;
@@ -669,8 +671,7 @@ int main(int argc, char **argv)
nr_scheduled_response_t scheduled_response;
fapi_nr_ul_config_request_t ul_config;
fapi_nr_tx_request_t tx_req;
fapi_nr_tx_request_body_t tx_req_body;
uint8_t ptrs_mcs1 = 2;
uint8_t ptrs_mcs2 = 4;
uint8_t ptrs_mcs3 = 10;
@@ -906,16 +907,15 @@ int main(int argc, char **argv)
scheduled_response.dl_config = NULL;
scheduled_response.ul_config = &ul_config;
scheduled_response.tx_request = &tx_req;
scheduled_response.tx_request->tx_request_body = &tx_req_body;
// Config UL TX PDU
tx_req.slot = slot;
tx_req.sfn = frame;
// tx_req->tx_config // TbD
tx_req.number_of_pdus = 1;
tx_req_body.pdu_length = TBS/8;
tx_req_body.pdu_index = 0;
tx_req_body.pdu = &ulsch_input_buffer[0];
tx_req.tx_request_body[0].pdu_length = TBS/8;
tx_req.tx_request_body[0].pdu_index = 0;
tx_req.tx_request_body[0].pdu = &ulsch_input_buffer[0];
ul_config.slot = slot;
ul_config.number_pdus = 1;
@@ -51,16 +51,16 @@
void display_frame_configuration(NR_DL_FRAME_PARMS *frame_parms) {
printf("\nTdd configuration tti %d downlink %d uplink %d period %d \n", frame_parms->ttis_per_subframe, frame_parms->p_tdd_UL_DL_Configuration->nrofDownlinkSlots,
printf("\nTdd configuration tti %d downlink %d uplink %d period %d \n", frame_parms->slots_per_subframe, frame_parms->p_tdd_UL_DL_Configuration->nrofDownlinkSlots,
frame_parms->p_tdd_UL_DL_Configuration->nrofUplinkSlots, frame_parms->p_tdd_UL_DL_Configuration->dl_UL_TransmissionPeriodicity);
int k = (TDD_CONFIG_NB_FRAMES * NR_NUMBER_OF_SUBFRAMES_PER_FRAME) - 1; //19;
int tti = 0;
for (int j = 0; j < TDD_CONFIG_NB_FRAMES * frame_parms->ttis_per_subframe * NR_NUMBER_OF_SUBFRAMES_PER_FRAME; j++) {
for (int j = 0; j < TDD_CONFIG_NB_FRAMES * frame_parms->slots_per_frame; j++) {
int frame = 0;
if (j != 0) {
frame = (frame_parms->ttis_per_subframe * NR_NUMBER_OF_SUBFRAMES_PER_FRAME)/j;
tti = (j)%(frame_parms->ttis_per_subframe * NR_NUMBER_OF_SUBFRAMES_PER_FRAME);
frame = j / frame_parms->slots_per_frame;
tti = j % frame_parms->slots_per_frame;
}
else {
frame = 0;
@@ -99,9 +99,10 @@ void display_frame_configuration(NR_DL_FRAME_PARMS *frame_parms) {
*
*********************************************************************/
void set_tti_test(NR_DL_FRAME_PARMS *frame_parms, int ttis_per_subframe)
void set_tti_test(NR_DL_FRAME_PARMS *frame_parms, int slots_per_subframe)
{
frame_parms->ttis_per_subframe = ttis_per_subframe;
frame_parms->slots_per_subframe = slots_per_subframe;
frame_parms->slots_per_frame = slots_per_subframe * NR_NUMBER_OF_SUBFRAMES_PER_FRAME;
}
/*******************************************************************
@@ -182,7 +182,7 @@ int test_pucch_basic_error(PHY_VARS_NR_UE *ue, int gNB_id, UE_nr_rxtx_proc_t *pr
/* set a tx slot with no ack */
NR_UE_HARQ_STATUS_t *harq_status = &ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][0]->harq_processes[TST_DL_HARQ_PID_FIRST].harq_ack;
harq_status->slot_for_feedback_ack = proc->nr_tti_tx;
harq_status->slot_for_feedback_ack = proc->nr_slot_tx;
printf("\n => Test : Error due to acknownlegment not set \n");
@@ -300,7 +300,7 @@ int test_pucch_common_config_single_transport_block(PHY_VARS_NR_UE *ue, int gNB_
harq_status->send_harq_status = 1;
harq_status->vDAI_DL = 2;
harq_status->ack = DL_ACK;
harq_status->slot_for_feedback_ack = proc->nr_tti_tx;
harq_status->slot_for_feedback_ack = proc->nr_slot_tx;
printf("\n => Test : PUCCH format from common config in dedicated mode: two positive downlink ACKnowledgments \n");
@@ -567,7 +567,7 @@ int test_pucch_dedicated_single_transport_block(PHY_VARS_NR_UE *ue, int gNB_id,
harq_status = &ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][0]->harq_processes[TST_DL_HARQ_PID_FIRST].harq_ack;
harq_status->slot_for_feedback_ack = proc->nr_tti_tx;
harq_status->slot_for_feedback_ack = proc->nr_slot_tx;
harq_status->send_harq_status = 1;
harq_status->vDAI_DL = 1;
harq_status->ack = DL_ACK;
@@ -586,7 +586,7 @@ int test_pucch_dedicated_single_transport_block(PHY_VARS_NR_UE *ue, int gNB_id,
NR_UE_HARQ_STATUS_t *harq_status = &ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][0]->harq_processes[dl_harq_pid[i]].harq_ack;
harq_status->slot_for_feedback_ack = proc->nr_tti_tx;
harq_status->slot_for_feedback_ack = proc->nr_slot_tx;
harq_status->send_harq_status = 1;
harq_status->vDAI_DL = i+1;
harq_status->ack = DL_ACK;
@@ -620,7 +620,7 @@ int test_pucch_dedicated_single_transport_block(PHY_VARS_NR_UE *ue, int gNB_id,
NR_UE_HARQ_STATUS_t *harq_status = &ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][0]->harq_processes[dl_harq_pid[i]].harq_ack;
harq_status->slot_for_feedback_ack = proc->nr_tti_tx;
harq_status->slot_for_feedback_ack = proc->nr_slot_tx;
harq_status->send_harq_status = 1;
harq_status->vDAI_DL = i+1;
harq_status->ack = DL_ACK;
@@ -684,7 +684,7 @@ int test_pucch_dedicated_two_transport_blocks(PHY_VARS_NR_UE *ue, int gNB_id, UE
NR_UE_HARQ_STATUS_t *harq_status = &ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][code_word]->harq_processes[dl_harq_pid[i]].harq_ack;
harq_status->slot_for_feedback_ack = proc->nr_tti_tx;
harq_status->slot_for_feedback_ack = proc->nr_slot_tx;
harq_status->send_harq_status = 1;
harq_status->vDAI_DL = i+1;
harq_status->ack = DL_ACK;
@@ -727,7 +727,7 @@ int test_pucch_dedicated_two_transport_blocks(PHY_VARS_NR_UE *ue, int gNB_id, UE
NR_UE_HARQ_STATUS_t *harq_status = &ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][code_word]->harq_processes[dl_harq_pid[i]].harq_ack;
harq_status->slot_for_feedback_ack = proc->nr_tti_tx;
harq_status->slot_for_feedback_ack = proc->nr_slot_tx;
harq_status->send_harq_status = 1;
harq_status->vDAI_DL = i+1;
harq_status->ack = DL_ACK;
@@ -761,7 +761,7 @@ int test_pucch_dedicated_two_transport_blocks(PHY_VARS_NR_UE *ue, int gNB_id, UE
NR_UE_HARQ_STATUS_t *harq_status = &ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][code_word]->harq_processes[dl_harq_pid[i]].harq_ack;
harq_status->slot_for_feedback_ack = proc->nr_tti_tx;
harq_status->slot_for_feedback_ack = proc->nr_slot_tx;
harq_status->send_harq_status = 1;
harq_status->vDAI_DL = i+1;
harq_status->ack = DL_ACK;
@@ -980,7 +980,7 @@ int test_sr_ack_dedicated(PHY_VARS_NR_UE *ue, int gNB_id, UE_nr_rxtx_proc_t *pro
harq_status = &ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][0]->harq_processes[TST_DL_HARQ_PID_FIRST].harq_ack;
harq_status->slot_for_feedback_ack = proc->nr_tti_tx;
harq_status->slot_for_feedback_ack = proc->nr_slot_tx;
harq_status->send_harq_status = 1;
harq_status->vDAI_DL = 1;
harq_status->ack = DL_ACK;
@@ -1019,7 +1019,7 @@ int test_sr_ack_dedicated(PHY_VARS_NR_UE *ue, int gNB_id, UE_nr_rxtx_proc_t *pro
harq_status = &ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][0]->harq_processes[TST_DL_HARQ_PID_SECOND].harq_ack;
harq_status->slot_for_feedback_ack = proc->nr_tti_tx;
harq_status->slot_for_feedback_ack = proc->nr_slot_tx;
harq_status->send_harq_status = 1;
harq_status->vDAI_DL = 2;
harq_status->ack = DL_ACK;
@@ -1094,7 +1094,7 @@ int test_csi_dedicated(PHY_VARS_NR_UE *ue, int gNB_id, UE_nr_rxtx_proc_t *proc)
harq_status = &ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][0]->harq_processes[TST_DL_HARQ_PID_FIRST].harq_ack;
harq_status->slot_for_feedback_ack = proc->nr_tti_tx;
harq_status->slot_for_feedback_ack = proc->nr_slot_tx;
harq_status->send_harq_status = 1;
harq_status->vDAI_DL = 1;
harq_status->ack = DL_ACK;
@@ -1168,9 +1168,13 @@ int test_pucch(PHY_VARS_NR_UE *ue)
assert(0);
}
proc->frame_tx = 0;
proc->nr_tti_rx = 0;
proc->nr_tti_tx = (proc->nr_tti_rx + NR_UE_CAPABILITY_SLOT_RX_TO_TX)%(ue->frame_parms.ttis_per_subframe*LTE_NUMBER_OF_SUBFRAMES_PER_FRAME);
proc->frame_rx = 0;
proc->nr_slot_rx = 0;
proc->nr_tti_rx = 0;
proc->frame_tx = proc->frame_rx + (proc->nr_slot_rx + NR_UE_CAPABILITY_SLOT_RX_TO_TX) / ue->frame_parms.slots_per_frame;
proc->nr_slot_tx = (proc->nr_slot_rx + NR_UE_CAPABILITY_SLOT_RX_TO_TX) % ue->frame_parms.slots_per_frame;
proc->nr_tti_tx = proc->nr_slot_tx % ue->frame_parms.slots_per_subframe;
init_pucch_power_configuration( ue, gNB_id);
@@ -223,12 +223,13 @@ int test_srs_periodicity(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc)
}
printf("srs period %d offset %d \n", srs_current_period, p_srs_resource->SRS_Offset);
int duration = (10 * srs_current_period)/(NR_NUMBER_OF_SUBFRAMES_PER_FRAME*frame_parms->ttis_per_subframe);
int duration = (10 * srs_current_period) / frame_parms->slots_per_frame;
for (int frame_tx = 0; frame_tx < duration; frame_tx++) {
for (int slot_tx = 0; slot_tx < (NR_NUMBER_OF_SUBFRAMES_PER_FRAME*frame_parms->ttis_per_subframe); slot_tx++) {
proc->frame_tx = frame_tx;
proc->nr_tti_tx = slot_tx;
for (int slot_tx = 0; slot_tx < frame_parms->slots_per_frame; slot_tx++) {
proc->frame_tx = frame_tx;
proc->nr_slot_tx = slot_tx;
proc->nr_tti_tx = slot_tx % frame_parms->slots_per_subframe;
if (ue_srs_procedure_nr( ue, proc, 0) == 0) {
printf("test_srs_periodicity srs at frame %d slot %d \n", frame_tx, slot_tx);
}