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Add Intrinsics usage by SIMDE

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This commit is contained in:
Bruno Mongazon-Cazavet
2022-09-28 18:21:19 +02:00
committed by Robert Schmidt
parent a1de5e3d11
commit fe1dc24e28
114 changed files with 7900 additions and 11031 deletions
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sdr/BLADERF/USERSPACE/LIB/bladerf_lib.c
+1 -8
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@@ -30,20 +30,13 @@
#include <inttypes.h>
#include "bladerf_lib.h"
#include "math.h"
#include "PHY/sse_intrin.h"
/** @addtogroup _BLADERF_PHY_RF_INTERFACE_
* @{
*/
//! Number of BladeRF devices
#ifdef __SSE4_1__
# include <smmintrin.h>
#endif
#ifdef __AVX2__
# include <immintrin.h>
#endif
int num_devices=0;
/*These items configure the underlying asynch stream used by the the sync interface.
sdr/COMMON/record_player.h
+1 -1
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@@ -44,7 +44,7 @@ extern "C"
#define RECPLAY_REPLAYMODE 2
#define BELL_LABS_IQ_HEADER 0xabababababababab
#define BELL_LABS_IQ_PER_SF 7680 // Up to 5MHz bw for now
#define BELL_LABS_IQ_PER_SF 46080 // 7680 => 5MHz bw for now; 46080 => 3/4 40MHz (106 PRBs)
#define BELL_LABS_IQ_BYTES_PER_SF (BELL_LABS_IQ_PER_SF * 4)
#define MAX_BELL_LABS_IQ_BYTES_PER_SF BELL_LABS_IQ_BYTES_PER_SF*10
sdr/ETHERNET/USERSPACE/LIB/eth_udp.c
+1 -11
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@@ -50,6 +50,7 @@
#include "common_lib.h"
#include "ethernet_lib.h"
#include "openair1/PHY/sse_intrin.h"
#include "common/utils/threadPool/thread-pool.h"
//#define DEBUG 1
@@ -317,15 +318,9 @@ void *trx_eth_write_udp_cmd(udpTXelem_t *udpTXelem) {
if (TS_advance < (nsamps/2)) LOG_W(PHY,"Starting TX FH for TS %llu absslot %llu(%llu) last_rxTS %llu TS_advance %llu samples\n",(unsigned long long)timestamp,(unsigned long long)timestamp/nsamps,((unsigned long long)timestamp/nsamps)%20,(unsigned long long)last_rxTS,(unsigned long long)TS_advance);
void *buff2;
#if defined(__x86_64) || defined(__i386__)
#ifdef __AVX2__
int nsamps2 = 256>>3;
__m256i buff_tx[nsamps2+1];
buff2=(void*)&buff_tx[1] - APP_HEADER_SIZE_BYTES;
#else
int nsamps2 = 256>>2;
__m128i buff_tx[nsamps2+2];
buff2=(void*)&buff_tx[2] - APP_HEADER_SIZE_BYTES;
#endif
#elif defined(__arm__) || defined(__aarch64__)
int nsamps2 = 256>>2;
int16x8_t buff_tx[nsamps2+2];
@@ -362,7 +357,6 @@ void *trx_eth_write_udp_cmd(udpTXelem_t *udpTXelem) {
*(uint16_t *)(buff2 + 4) = aid;
// bring TX data into 12 MSBs
#if defined(__x86_64__) || defined(__i386__)
#ifdef __AVX2__
__m256i *buff256 = (__m256i *)&(((int32_t*)buff[aid])[offset]);
for (int j=0; j<32; j+=8) {
buff_tx[1+j] = _mm256_slli_epi16(buff256[j],4);
@@ -374,10 +368,6 @@ void *trx_eth_write_udp_cmd(udpTXelem_t *udpTXelem) {
buff_tx[7+j] = _mm256_slli_epi16(buff256[j+6],4);
buff_tx[8+j] = _mm256_slli_epi16(buff256[j+7],4);
}
#else
__m128i *buff128 = (__m128i *)&buff[aid][offset];
for (int j=0; j<64; j++) buff_tx[2+j] = _mm_slli_epi16(buff128[j],4);
#endif
#elif defined(__arm__)
int16x8_t *buff128 = (__int16x8_t*)&buff[aid][offset];
for (int j=0; j<64; j++) buff_tx[2+j] = vshlq_n_s16(((int16x8_t *)buff128)[j],4);
sdr/IRIS/USERSPACE/LIB/iris_lib.cpp
+3 -27
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@@ -23,13 +23,7 @@
#include "common_lib.h"
#include <chrono>
#ifdef __SSE4_1__
# include <smmintrin.h>
#endif
#ifdef __AVX2__
# include <immintrin.h>
#endif
#include "openair1/PHY/sse_intrin.h"
#define MOVE_DC
#define SAMPLE_RATE_DOWN 1
@@ -152,13 +146,8 @@ trx_iris_write(openair0_device *device, openair0_timestamp timestamp, void **buf
iris_state_t *s = (iris_state_t *) device->priv;
int nsamps2; // aligned to upper 32 or 16 byte boundary
#if defined(__x86_64) || defined(__i386__)
#ifdef __AVX2__
nsamps2 = (nsamps+7)>>3;
__m256i buff_tx[2][nsamps2];
#else
nsamps2 = (nsamps+3)>>2;
__m128i buff_tx[2][nsamps2];
#endif
#else
#error unsupported CPU architecture, iris device cannot be built
#endif
@@ -167,11 +156,7 @@ trx_iris_write(openair0_device *device, openair0_timestamp timestamp, void **buf
for (int i=0; i<cc; i++) {
for (int j=0; j<nsamps2; j++) {
#if defined(__x86_64__) || defined(__i386__)
#ifdef __AVX2__
buff_tx[i][j] = _mm256_slli_epi16(((__m256i *)buff[i])[j],4);
#else
buff_tx[i][j] = _mm_slli_epi16(((__m128i *)buff[i])[j],4);
#endif
buff_tx[i][j] = simde_mm256_slli_epi16(((__m256i *)buff[i])[j],4);
#endif
}
}
@@ -253,13 +238,8 @@ static int trx_iris_read(openair0_device *device, openair0_timestamp *ptimestamp
int m = s->rx_num_channels;
int nsamps2; // aligned to upper 32 or 16 byte boundary
#if defined(__x86_64) || defined(__i386__)
#ifdef __AVX2__
nsamps2 = (nsamps+7)>>3;
__m256i buff_tmp[2][nsamps2];
#else
nsamps2 = (nsamps+3)>>2;
__m128i buff_tmp[2][nsamps2];
#endif
#endif
for (r = 0; r < s->device_num; r++) {
@@ -331,11 +311,7 @@ static int trx_iris_read(openair0_device *device, openair0_timestamp *ptimestamp
for (int i=0; i<cc; i++) {
for (int j=0; j<nsamps2; j++) {
#if defined(__x86_64__) || defined(__i386__)
#ifdef __AVX2__
((__m256i *)buff[i])[j] = _mm256_srai_epi16(buff_tmp[i][j],4);
#else
((__m128i *)buff[i])[j] = _mm_srai_epi16(buff_tmp[i][j],4);
#endif
((__m256i *)buff[i])[j] = simde_mm256_srai_epi16(buff_tmp[i][j],4);
#endif
}
}
sdr/LMSSDR/USERSPACE/LIB/sodera_lib.cpp
+1 -7
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@@ -46,13 +46,7 @@
#include "Si5351C.h"
#include "LMS_StreamBoard.h"
#ifdef __SSE4_1__
# include <smmintrin.h>
#endif
#ifdef __AVX2__
# include <immintrin.h>
#endif
#include "openair1/PHY/sse_intrin.h"
using namespace std;
sdr/USRP/USERSPACE/LIB/usrp_lib.cpp
+12 -49
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@@ -54,17 +54,7 @@
#include <sys/resource.h>
#ifdef __SSE4_1__
#include <smmintrin.h>
#endif
#ifdef __AVX2__
#include <immintrin.h>
#endif
#ifdef __arm__
#include <arm_neon.h>
#endif
#include "openair1/PHY/sse_intrin.h"
/** @addtogroup _USRP_PHY_RF_INTERFACE_
* @{
@@ -421,14 +411,9 @@ static int trx_usrp_write(openair0_device *device,
if(usrp_tx_thread == 0){
#if defined(__x86_64) || defined(__i386__)
#ifdef __AVX2__
nsamps2 = (nsamps+7)>>3;
__m256i buff_tx[cc<2?2:cc][nsamps2];
#else
nsamps2 = (nsamps+3)>>2;
__m128i buff_tx[cc<2?2:cc][nsamps2];
#endif
#elif defined(__arm__)
#elif defined(__arm__) || defined(__aarch64__)
nsamps2 = (nsamps+3)>>2;
int16x8_t buff_tx[cc<2?2:cc][nsamps2];
#else
@@ -439,12 +424,8 @@ static int trx_usrp_write(openair0_device *device,
for (int i=0; i<cc; i++) {
for (int j=0; j<nsamps2; j++) {
#if defined(__x86_64__) || defined(__i386__)
#ifdef __AVX2__
buff_tx[i][j] = _mm256_slli_epi16(((__m256i *)buff[i])[j],4);
#else
buff_tx[i][j] = _mm_slli_epi16(((__m128i *)buff[i])[j],4);
#endif
#elif defined(__arm__)
buff_tx[i][j] = simde_mm256_slli_epi16(((__m256i *)buff[i])[j],4);
#elif defined(__arm__) || defined(__aarch64__)
buff_tx[i][j] = vshlq_n_s16(((int16x8_t *)buff[i])[j],4);
#endif
}
@@ -561,14 +542,9 @@ void *trx_usrp_write_thread(void * arg){
}*/
#if defined(__x86_64) || defined(__i386__)
#ifdef __AVX2__
nsamps2 = (nsamps+7)>>3;
__m256i buff_tx[cc<2?2:cc][nsamps2];
#else
nsamps2 = (nsamps+3)>>2;
__m128i buff_tx[cc<2?2:cc][nsamps2];
#endif
#elif defined(__arm__)
#elif defined(__arm__) || defined(__aarch64__)
nsamps2 = (nsamps+3)>>2;
int16x8_t buff_tx[cc<2?2:cc][nsamps2];
#else
@@ -579,12 +555,8 @@ void *trx_usrp_write_thread(void * arg){
for (int i=0; i<cc; i++) {
for (int j=0; j<nsamps2; j++) {
#if defined(__x86_64__) || defined(__i386__)
#ifdef __AVX2__
buff_tx[i][j] = _mm256_slli_epi16(((__m256i *)buff[i])[j],4);
#else
buff_tx[i][j] = _mm_slli_epi16(((__m128i *)buff[i])[j],4);
#endif
#elif defined(__arm__)
buff_tx[i][j] = simde_mm256_slli_epi16(((__m256i *)buff[i])[j],4);
#elif defined(__arm__) || defined(__aarch64__)
buff_tx[i][j] = vshlq_n_s16(((int16x8_t *)buff[i])[j],4);
#endif
}
@@ -675,14 +647,9 @@ static int trx_usrp_read(openair0_device *device, openair0_timestamp *ptimestamp
int samples_received=0;
int nsamps2; // aligned to upper 32 or 16 byte boundary
#if defined(__x86_64) || defined(__i386__)
#ifdef __AVX2__
nsamps2 = (nsamps+7)>>3;
__m256i buff_tmp[cc<2 ? 2 : cc][nsamps2];
#else
nsamps2 = (nsamps+3)>>2;
__m128i buff_tmp[cc<2 ? 2 : cc][nsamps2];
#endif
#elif defined(__arm__)
#elif defined(__arm__) || defined(__aarch64__)
nsamps2 = (nsamps+3)>>2;
int16x8_t buff_tmp[cc<2 ? 2 : cc][nsamps2];
#endif
@@ -729,20 +696,14 @@ static int trx_usrp_read(openair0_device *device, openair0_timestamp *ptimestamp
for (int i=0; i<cc; i++) {
#if defined(__x86_64__) || defined(__i386__)
#ifdef __AVX2__
if ((((uintptr_t) buff[i])&0x1F)==0) {
for (int j=0; j<nsamps2; j++)
((__m256i *)buff[i])[j] = _mm256_srai_epi16(buff_tmp[i][j],rxshift);
((__m256i *)buff[i])[j] = simde_mm256_srai_epi16(buff_tmp[i][j],rxshift);
} else {
for (int j=0; j<(nsamps2<<1); j++)
((__m128i *)buff[i])[j] = _mm_srai_epi16(((__m128i *)buff_tmp[i])[j],rxshift);
}
#else
for (int j=0; j<nsamps2; j++)
((__m128i *)buff[i])[j] = _mm_srai_epi16(buff_tmp[i][j],rxshift);
#endif
#elif defined(__arm__)
#elif defined(__arm__) || defined(__aarch64__)
for (int j=0; j<nsamps2; j++)
((int16x8_t *)buff[i])[j] = vshrq_n_s16(buff_tmp[i][j],rxshift);
#endif
@@ -778,7 +739,9 @@ static int trx_usrp_read(openair0_device *device, openair0_timestamp *ptimestamp
memcpy(hdr+1, buff[0], nsamps*4);
recPlay->currentPtr+=sizeof(iqrec_t)+nsamps*4;
recPlay->nbSamplesBlocks++;
#if 0 // BMC: this is too verbose
LOG_D(HW,"recorded %d samples, for TS %lu, shift in buffer %ld\n", nsamps, hdr->ts, recPlay->currentPtr-(uint8_t *)recPlay->ms_sample);
#endif
} else
exit_function(__FILE__, __FUNCTION__, __LINE__,"Recording reaches max iq limit\n");
}
sdr/iqplayer/iqplayer_lib.c
+7 -10
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@@ -88,7 +88,7 @@ static int iqplayer_loadfile(openair0_device *device, openair0_config_t *openair
size_t hs = read(s->fd,&fh,sizeof(fh));
if (hs == sizeof(fh)) {
parse_iqfile_header(device, &fh);
parse_iqfile_header(device, &fh);
fstat(s->fd, &sb);
s->mapsize=sb.st_size;
LOG_I(HW, "Loading %u subframes from %s,size=%lu bytes ...\n",s->nbSamplesBlocks, c->u_sf_filename,(uint64_t)sb.st_size);
@@ -181,10 +181,12 @@ static int trx_iqplayer_write(openair0_device *device, openair0_timestamp timest
*/
static int trx_iqplayer_read(openair0_device *device, openair0_timestamp *ptimestamp, void **buff, int nsamps, int cc) {
recplay_state_t *s = device->recplay_state;
if (s->curSamplesBlock==0 && s->wrap_count==0 )
s->currentTs=s->ms_sample->ts;
if (s->curSamplesBlock==0 && s->wrap_count==0) {
s->currentTs=s->ms_sample->ts;
LOG_I(HW, "First timestamp=%lu s->nbSamplesBlocks=%u\n", s->currentTs, s->nbSamplesBlocks);
}
if (s->curSamplesBlock == s->nbSamplesBlocks) {
LOG_I(HW, "wrapping on iq file (%ld)\n", s->wrap_count);
s->curSamplesBlock = 0;
@@ -202,8 +204,6 @@ static int trx_iqplayer_read(openair0_device *device, openair0_timestamp *ptimes
if (!(device->openair0_cfg->recplay_conf->use_mmap) ) {
close(device->recplay_state->fd);
iqplayer_loadfile(device, device->openair0_cfg);
// LOG_E(HW, "Problem seeking at the beginning of IQ file %s\n",strerror(errno));
}
}
@@ -223,10 +223,6 @@ static int trx_iqplayer_read(openair0_device *device, openair0_timestamp *ptimes
iqrec_t *curHeader=(iqrec_t *)s->currentPtr;
AssertFatal(curHeader->header==BELL_LABS_IQ_HEADER,"" );
// the current timestamp is the stored timestamp until we wrap on input
// USRP shifts 1 sample time to time
if (s->wrap_count !=0 && device->openair0_cfg->recplay_conf->use_mmap)
AssertFatal( abs(curHeader->ts-s->currentTs) < 5 ,
"wrap_count=%li, ts %lu %lu",s->wrap_count,curHeader->ts,s->currentTs);
AssertFatal(nsamps*4==curHeader->nbBytes,"");
*ptimestamp = s->currentTs;
memcpy(buff[0], curHeader+1, nsamps*4);
@@ -237,6 +233,7 @@ static int trx_iqplayer_read(openair0_device *device, openair0_timestamp *ptimes
if (device->openair0_cfg->recplay_conf->use_mmap)
s->currentPtr+=sizeof(iqrec_t)+s->ms_sample->nbBytes;
// BMC TODO: support 1 second or more subframe read delay
struct timespec req;
req.tv_sec = 0;
req.tv_nsec = (device->openair0_cfg[0].recplay_conf->u_sf_read_delay) * 1000;