Merge with develop-nr
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@@ -40,6 +40,7 @@
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#define FAPI_NR_DL_CONFIG_TYPE_DCI 0x01
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#define FAPI_NR_DL_CONFIG_TYPE_DLSCH 0x02
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#define CCE_REG_MAPPING_TYPE_INTERLEAVED 0x01
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#define CCE_REG_MAPPING_TYPE_NON_INTERLEAVED 0x02
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@@ -55,4 +56,4 @@
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#define FAPI_NR_UL_CONFIG_TYPE_SRS 0x04
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#endif
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#endif
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@@ -37,8 +37,8 @@ typedef struct {
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uint8_t sul_ind_0_1 ; // 2 SUL_IND_0_1:
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uint8_t slot_format_ind ; // 3 SLOT_FORMAT_IND: size of DCI format 2_0 is configurable by higher layers up to 128 bits, according to Subclause 11.1.1 of [5, TS 38.213]
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uint8_t pre_emption_ind ; // 4 PRE_EMPTION_IND: size of DCI format 2_1 is configurable by higher layers up to 126 bits, according to Subclause 11.2 of [5, TS 38.213]. Each pre-emption indication is 14 bits
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uint8_t tpc_cmd_number ; // 5 TPC_CMD_NUMBER: The parameter xxx provided by higher layers determines the index to the TPC command number for an UL of a cell. Each TPC command number is 2 bits
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uint8_t block_number ; // 6 BLOCK_NUMBER: starting position of a block is determined by the parameter startingBitOfFormat2_3
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uint8_t block_number ; // 5 BLOCK_NUMBER: starting position of a block is determined by the parameter startingBitOfFormat2_3
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uint8_t close_loop_ind ; // 6 CLOSE_LOOP_IND:
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uint8_t bandwidth_part_ind ; // 7 BANDWIDTH_PART_IND:
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uint8_t short_message_ind ; // 8 SHORT_MESSAGE_IND:
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uint8_t short_messages ; // 9 SHORT_MESSAGES:
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@@ -81,7 +81,7 @@ typedef struct {
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uint8_t antenna_ports ; // 38 ANTENNA_PORTS:
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uint8_t tci ; // 39 TCI: 0 bit if higher layer parameter tci-PresentInDCI is not enabled; otherwise 3 bits
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uint8_t srs_request ; // 40 SRS_REQUEST:
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uint8_t tpc_cmd_number_format2_3 ; // 41 TPC_CMD_NUMBER_FORMAT2_3:
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uint8_t tpc_cmd ; // 41 TPC_CMD:
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uint8_t csi_request ; // 42 CSI_REQUEST:
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uint8_t cbgti ; // 43 CBGTI: 0, 2, 4, 6, or 8 bits determined by higher layer parameter maxCodeBlockGroupsPerTransportBlock for the PDSCH
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uint8_t cbgfi ; // 44 CBGFI: 0 or 1 bit determined by higher layer parameter codeBlockGroupFlushIndicator
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@@ -237,15 +237,34 @@ typedef struct {
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typedef struct {
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} fapi_nr_ul_config_pucch_pdu;
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typedef enum {pusch_freq_hopping_disabled = 0 , pusch_freq_hopping_enabled = 1}pusch_freq_hopping_t;
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typedef struct{
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uint8_t aperiodicSRS_ResourceTrigger;
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} fapi_nr_ul_srs_config_t;
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typedef struct {
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uint8_t bandwidth_part_ind;
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uint16_t number_rbs;
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uint16_t start_rb;
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uint8_t frame_offset;
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uint16_t number_symbols;
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uint16_t start_symbol;
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pusch_freq_hopping_t pusch_freq_hopping;
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uint8_t mcs;
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uint8_t tpc_command;
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uint8_t ndi;
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uint8_t rv;
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uint8_t harq_process_nbr;
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int8_t accumulated_delta_PUSCH;
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int8_t absolute_delta_PUSCH;
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uint8_t n_layers;
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uint8_t tpmi;
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uint8_t n_dmrs_cdm_groups;
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uint8_t dmrs_ports[4];
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uint8_t n_front_load_symb;
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fapi_nr_ul_srs_config_t srs_config;
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uint8_t csi_reportTriggerSize;
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uint8_t maxCodeBlockGroupsPerTransportBlock;
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uint8_t ptrs_dmrs_association_port;
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uint8_t beta_offset_ind;
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} fapi_nr_ul_config_pusch_pdu_rel15_t;
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typedef struct {
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@@ -290,17 +309,43 @@ typedef struct {
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typedef struct {
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fapi_nr_dl_config_dci_dl_pdu_rel15_t dci_config_rel15;
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} fapi_nr_dl_config_dci_pdu;
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typedef struct{
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uint8_t aperiodicSRS_ResourceTrigger;
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} fapi_nr_dl_srs_config_t;
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typedef enum{vrb_to_prb_mapping_non_interleaved = 0, vrb_to_prb_mapping_interleaved = 1} vrb_to_prb_mapping_t;
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//typedef fapi_nr_dci_pdu_rel15_t fapi_nr_dl_config_dlsch_pdu_rel15_t;
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typedef struct {
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uint8_t bandwidth_part_ind;
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uint16_t number_rbs;
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uint16_t start_rb;
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uint8_t frame_offset;
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uint16_t number_symbols;
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uint16_t start_symbol;
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uint8_t prb_bundling_size_ind;
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uint8_t rate_matching_ind;
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uint8_t zp_csi_rs_trigger;
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uint8_t mcs;
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uint8_t rv;
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uint8_t harq_pid;
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uint8_t ndi;
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// TODO: check the fields needed to L1 with NR_DL_UE_HARQ_t and NR_UE_DLSCH_t
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uint8_t rv;
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uint8_t tb2_mcs;
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uint8_t tb2_ndi;
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uint8_t tb2_rv;
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uint8_t harq_process_nbr;
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vrb_to_prb_mapping_t vrb_to_prb_mapping;
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uint8_t dai;
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double scaling_factor_S;
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int8_t accumulated_delta_PUCCH;
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uint8_t pucch_resource_id;
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uint8_t pdsch_to_harq_feedback_time_ind;
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uint8_t n_dmrs_cdm_groups;
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uint8_t dmrs_ports[10];
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uint8_t n_front_load_symb;
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uint8_t tci_state;
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fapi_nr_dl_srs_config_t srs_config;
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uint8_t cbgti;
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uint8_t codeBlockGroupFlushIndicator;
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// to be check the fields needed to L1 with NR_DL_UE_HARQ_t and NR_UE_DLSCH_t
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} fapi_nr_dl_config_dlsch_pdu_rel15_t;
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typedef struct {
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@@ -598,7 +643,7 @@ typedef struct {
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typedef struct {
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uint8_t dmrs_type;
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uint8_t dmrs_addition_position;
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uint8_t ptrs_uplink_config; // to indicate if PTRS Uplink is configured of not
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uint8_t ptrs_type; //cp-OFDM, dft-S-OFDM
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uint16_t ptrs_frequency_density[2];
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uint8_t ptrs_time_density[3];
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@@ -624,9 +669,15 @@ typedef struct {
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uint8_t delta_mcs;
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} fapi_nr_pusch_power_control_t;
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typedef enum {tx_config_codebook = 1, tx_config_nonCodebook = 2} tx_config_t;
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typedef enum {transform_precoder_disabled = 0, transform_precoder_enabled = 1} transform_precoder_t;
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typedef enum {
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codebook_subset_fullyAndPartialAndNonCoherent = 1,
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codebook_subset_partialAndNonCoherent = 2,
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codebook_subset_nonCoherent = 3} codebook_subset_t;
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typedef struct {
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uint16_t data_scrambling_identity;
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uint8_t tx_config;
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tx_config_t tx_config;
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fapi_nr_dmrs_uplink_config_t dmrs_ul_for_pusch_mapping_type_a;
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fapi_nr_dmrs_uplink_config_t dmrs_ul_for_pusch_mapping_type_b;
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fapi_nr_pusch_power_control_t pusch_power_control;
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@@ -637,8 +688,8 @@ typedef struct {
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uint8_t pusch_aggregation_factor;
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uint8_t mcs_table;
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uint8_t mcs_table_transform_precoder;
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uint8_t transform_precoder;
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uint8_t codebook_subset;
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transform_precoder_t transform_precoder;
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codebook_subset_t codebook_subset;
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uint8_t max_rank;
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uint8_t rbg_size;
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