12 Commits
Author SHA1 Message Date
Romain BeurdoucheandLaurent Thomas 06c81030dc fix(nrLDPC_coding_segment_encoder): address review
1. nrLDPC_coding_segment_encoding: Clarifying encoder parameters
   The way the encoder implementation params was used could be made clearer:
   * `macro_num` was always used in order to calculate segment indexes.
     It is clearer to pass directly the first segment index.
   * The initialisation of a common implementation parameters structure can be made clearer.

2. nrLDPC_coding_segment_encoder: Remove multi segment dimension in encoder output
   The output of `LDPCencoder` was a 2D unsigned char array.
   But all the segments were actually packed in the first segment, 8 bits of different segments per byte of the first segment.
   So the first dimension was useless. This commit removes this dimension.

3. nrLDPC_coding_segment_encoder: Rename `nrLDPC_prepare_TB_encoding` into `nrLDPC_launch_TB_encoding`

4. nrLDPC_coding_segment_encoder: Remove the useless second rate matching for E2, one rate matching with max(E, E2) does the job.

5. nr_interleaving_ldpc: cleanup
   Rewrite code to use different SIMD sizes in a linear fashion.
   This means cascading preprocessor directives are used to start from a high SIMD size an decrease it progressively.

6. ldpc_encoder_optim8segmulti: linear usage of SIMD
   Use cascading preprocessor directives to include different SIMD sizes and types depending on which are available on the system.
   The different loops use a common index that is progressively incremented.
   Also add AVX512 version of bits distribution from 8 segments into one byte.

Co-authored-by: Laurent Thomas <laurent.thomas@open-cells.com>
2025-05-13 14:08:33 +00:00
Raymond Knopp 8964fdb6a2 AVX512 modifications for LDPC encoding: interleaving, ZC384 BG1, output formatting for encoder, segmentation (memcpy) 2025-05-13 14:08:33 +00:00
mir fc8d0c59c6 Scan build: Result of operation is garbage or undefined 2024-03-07 11:00:57 +01:00
Laurent THOMAS 99ca87a1c1 Refactor LDPC API to make common API with various implementations 2023-11-28 09:37:37 +01:00
Raymond Knopp a7bc282302 First-level of support for new aarch64 machines
Testing on Neoverse N1 (Ampere 3GHz). Tested only on a subset of phy-simulators.

- Changes:
- use SIMDE consistently
- adaptations of LDPC decoder generator for ARMv8 performance
- SIMDe modifications of Intel CRC to allow for aarch64 build.
  optimizations for 128-bit to improve performance of LDPC encode/decode
  on aarch64 (Neoverse 1)
- added BG2 files for 128-bit ldpc encoder (aarch64)
- testing on Xeon
- testing on x86
- minor changes to build/run on x86
- change in crc.h after returning to aarch64
- removed some warning in ldpc decoder generator for x86_64
- char
- Delete irrelevant constants
- Correctly declare variables
- Define stdbool for all architectures
- Remove definition of _MM_SHUFFLE and use SIMDE_MM_SHUFFLE
- Remove commented code
- Fix CMakeLists.txt
- Include SIMDE avx2 functions in tools_defs.h
2023-09-13 17:19:20 +02:00
Bruno Mongazon-Cazavet fe1dc24e28 Add Intrinsics usage by SIMDE 2022-09-28 18:21:19 +02:00
Robert Schmidt 76d609f7fa Delete unused code 2022-02-25 17:27:02 +01:00
frtabu 8928cfe57d move ldpc coder/decoder into a shared lib dymically loaded. Also fix a record player bug 2020-03-11 17:32:13 +01:00
Hongzhi Wang feb461bafb add missing fix for bg2 2019-11-14 16:25:23 +01:00
Florian Kaltenberger 6e29ff0872 patch from Milan Zivkovic (Nokia Bell Labs) 2018-09-07 06:48:09 -07:00
Florian Kaltenberger 714cdc091f adding llr clipping + other bugfixes 2018-08-24 12:50:12 -07:00
Florian Kaltenberger b61e800764 adding LDPC encoder and decoder (from mwc18 branch) 2018-04-09 13:10:17 -07:00