Wilson Thong
0487631c76
#221 fixed crash when processing false DCI1A due to incorrect HARQ-PID checking
2017-03-28 10:39:09 +08:00
Cedric Roux
5485f131c3
bugfix: Rel14 was missing
2017-03-24 18:05:11 +01:00
Cedric Roux
fc5c876a81
Merge remote-tracking branch 'origin/feature-228-rrc-rel14' into develop_integration_w12
2017-03-24 17:08:27 +01:00
Cedric Roux
c54cb41805
Merge remote-tracking branch 'origin/various-fixes-w12' into develop_integration_w12
2017-03-24 17:07:26 +01:00
Cedric Roux
5db0548af0
bugfix
2017-03-24 16:55:30 +01:00
Cedric Roux
6448738e9b
bugfix/compilation warning removal in ulsim
2017-03-24 15:53:52 +01:00
Cedric Roux
583123e042
bugfix/compilation warning removal in dlsim
2017-03-24 15:49:19 +01:00
Cedric Roux
ac437d3d12
compilation warning removal
2017-03-24 12:30:06 +01:00
Cedric Roux
92ee6017cd
compilation warning removal
2017-03-24 12:09:09 +01:00
Cedric Roux
7514e7139a
compilation warning removal
2017-03-24 12:08:31 +01:00
Cedric Roux
048f07f67f
compilation warning removal
2017-03-24 12:07:51 +01:00
Cedric Roux
3ce5f50755
compilation warning removal
2017-03-24 12:03:56 +01:00
Cedric Roux
a3f7ceb395
compilation warning removal
2017-03-24 12:02:08 +01:00
Cedric Roux
1789b3de59
compilation warning removal
2017-03-24 12:00:58 +01:00
Cedric Roux
e82c6764f9
compilation warning removal
2017-03-24 12:00:23 +01:00
Cedric Roux
bf3a4f6464
compilation warning removal
2017-03-24 12:00:04 +01:00
Cedric Roux
d8627b5e3f
compilation warning removal
2017-03-24 11:59:27 +01:00
Cedric Roux
2291f4ebec
compilation warning removal
2017-03-24 11:58:01 +01:00
Cedric Roux
216cd0bf02
compilation warning removal
2017-03-24 11:56:34 +01:00
Cedric Roux
8dd8a97c34
compilation warning removal
2017-03-24 11:55:32 +01:00
Cedric Roux
11856c6b00
compilation warning removal: allocate_REs set but not used
...
I removed this variable entirely because it's not used.
Maybe the bug is that it's not used after being set?
To be checked and fixed at some point.
2017-03-24 11:53:34 +01:00
Cedric Roux
774452bbbb
compilation warning removal
...
this variable does not seem to be used, to be removed?
2017-03-24 11:50:56 +01:00
Cedric Roux
4fcb6272f4
RRC Rel14
...
- import RRC ASN.1 defintions from the specifications
(file openair2/RRC/LITE/MESSAGES/asn1c/ASN1_files/RRC-e10.asn)
contrary to rel8/10, all modules have been imported, maybe it's too much
to refine in case of problems
- deal with rel14 in fix_asn1
- all code that was for Rel10 is now for Rel10/Rel14
- some incompatible changes (mostly in naming) were resolved in favor
of rel14, see in openair2/RRC/LITE/defs.h
- unsure about the rlc layer, some arrays have changed (values appended),
I only changed the definition and in tests in the code, I changed
the index limit, maybe it's not enough
Rel14 is the default compilation mode.
2017-03-23 18:06:40 +01:00
Calisson
9d3eed3b43
fixing ulsim
2017-03-21 15:02:20 +01:00
Calisson
7685cf1811
fixing srs in msg3. now all SRS subframe configs work.
2017-03-21 14:16:19 +01:00
Calisson
98efcd5220
fixing a bug related to SRS procedures
2017-03-21 09:37:08 +01:00
Calisson
1677e8f847
Merge remote-tracking branch 'origin/develop' into feature-218-srs
2017-03-20 17:15:26 +01:00
Calisson
e2d46f8040
adding mechanism for SRS scheduling of multiple UEs.
2017-03-20 17:13:42 +01:00
Cedric Roux
e2350103f4
hotfix: LLR was calling qam64_qam16_avx2 instead of qam64_qam64_avx2
...
Not sure of this one, to be checked by TCL.
2017-03-20 13:33:27 +01:00
Cedric Roux
1218cc8f65
bugfix: fix dump_dlsch2
...
the argument 'coded_bits_per_codeword' has to be an array in
case of several codewords.
The calling sites have been adapted.
Today, only the first index is used, so calling sites where
'coded_bits_per_codeword' is an integer pass the address
of it. It is expected that 'dump_dlsch2' will check in the
future that there is one or two codewords and only access
'coded_bits_per_codeword[1]' when it's sure there are
really two codewords.
2017-03-20 11:15:57 +01:00
Cedric Roux
7ffc20426b
integration fix: let simulators compile again
...
- pucchsim
- prachsim
- pdcchsim
- pbchsim
- mbmssim
Mostly, add and initialize the variable 'cpuf'.
Also, pdcchsim was calling rx_pdcch with wrong
arguments.
2017-03-20 11:00:41 +01:00
Cedric Roux
5014b84c30
integration fix: let ulsim compile again + minor modification in dlsim_tm4
2017-03-20 10:43:50 +01:00
Cedric Roux
f2e9e3f2dc
integration fix: let dlsim compile again
...
Same as previous commit 41dda3d3de
2017-03-20 10:40:26 +01:00
Cedric Roux
41dda3d3de
integration fix: let dlsim_tm4 compile again
...
The variables that were duplicated per processing thread
were adapted. 'cpuf' was defined and initialized.
2017-03-20 10:38:25 +01:00
gabrielC
1e2f952a9c
Remove to frequent log in 20 MHz
2017-03-20 09:18:02 +01:00
Cedric Roux
2011c7d689
Merge remote-tracking branch 'origin/ulsim-bugfix-w11' into develop_integration_w11
2017-03-18 00:10:50 +01:00
Cedric Roux
1c57eadd33
fix: remove useless test
...
One check introduced by previous commit was not necessary.
2017-03-18 00:09:48 +01:00
Cedric Roux
7847143610
Merge remote-tracking branch 'origin/bugfix-224-ue-tcrnti' into develop_integration_w11
2017-03-17 19:33:56 +01:00
fnabet
7f9b19cce8
UE Issue224 fix on TCRNTI
2017-03-17 10:52:59 +01:00
Florian Kaltenberger
c13d5c21f3
added null pointer check for ulsim
2017-03-16 18:05:23 +01:00
Cedric Roux
639d2eefc6
Merge remote-tracking branch 'origin/phy-test-fix' into develop_integration_w11
2017-03-16 18:01:23 +01:00
gabrielC
d5a9334306
20MHz improvement for scope (still need to be fixed for 20MHz LLR) and Log
2017-03-16 17:06:34 +01:00
gabrielC
950c1c060e
Correction of dlsch channel calculation
2017-03-16 11:45:07 +01:00
Florian Kaltenberger
65f49f9ffd
bugfixes to previous commit and ulsim. now srs estimaton seems to work. at least in ulsim.
2017-03-15 17:43:18 +01:00
Cedric Roux
f5aa0135b1
hotfix: fix buffer size for phy-test mode 20MHz
...
768*8 is too small, in 20MHz, the phy-test mode
(in default mode?) has a buffer of size 6378.
Let's set the buffer size to the input's one plus 4 bytes
(to accomodate for CRC, not sure about this).
2017-03-15 17:17:54 +01:00
Calisson
1e193853eb
WIP: adding srs channel estimation to eNB. estimation results yet to be checked.
2017-03-14 17:13:14 +01:00
gabrielC
752b305270
Merge branch 'pdcch_dual_buffer' into develop_integration_w11
2017-03-14 15:44:13 +01:00
gabrielC
28a50c15e9
Remove some print and correct rnti for the pdcch_vars odd/even subframe
2017-03-14 15:35:21 +01:00
hbilel
bd4898222f
pdcch dual buffer
2017-03-13 15:50:10 +01:00
Cedric Roux
a500b2b293
integration fix: fix compilation of ulsim
...
We use the odd/even dlsch corresponding to the configured
subframe. It may not be the right thing to do.
2017-03-13 15:43:43 +01:00
Wilson Thong