Cedric Roux
048f07f67f
compilation warning removal
2017-03-24 12:07:51 +01:00
Cedric Roux
3ce5f50755
compilation warning removal
2017-03-24 12:03:56 +01:00
Cedric Roux
a3f7ceb395
compilation warning removal
2017-03-24 12:02:08 +01:00
Cedric Roux
1789b3de59
compilation warning removal
2017-03-24 12:00:58 +01:00
Cedric Roux
e82c6764f9
compilation warning removal
2017-03-24 12:00:23 +01:00
Cedric Roux
bf3a4f6464
compilation warning removal
2017-03-24 12:00:04 +01:00
Cedric Roux
d8627b5e3f
compilation warning removal
2017-03-24 11:59:27 +01:00
Cedric Roux
2291f4ebec
compilation warning removal
2017-03-24 11:58:01 +01:00
Cedric Roux
216cd0bf02
compilation warning removal
2017-03-24 11:56:34 +01:00
Cedric Roux
8dd8a97c34
compilation warning removal
2017-03-24 11:55:32 +01:00
Cedric Roux
11856c6b00
compilation warning removal: allocate_REs set but not used
...
I removed this variable entirely because it's not used.
Maybe the bug is that it's not used after being set?
To be checked and fixed at some point.
2017-03-24 11:53:34 +01:00
Cedric Roux
774452bbbb
compilation warning removal
...
this variable does not seem to be used, to be removed?
2017-03-24 11:50:56 +01:00
Cedric Roux
e2350103f4
hotfix: LLR was calling qam64_qam16_avx2 instead of qam64_qam64_avx2
...
Not sure of this one, to be checked by TCL.
2017-03-20 13:33:27 +01:00
Cedric Roux
1218cc8f65
bugfix: fix dump_dlsch2
...
the argument 'coded_bits_per_codeword' has to be an array in
case of several codewords.
The calling sites have been adapted.
Today, only the first index is used, so calling sites where
'coded_bits_per_codeword' is an integer pass the address
of it. It is expected that 'dump_dlsch2' will check in the
future that there is one or two codewords and only access
'coded_bits_per_codeword[1]' when it's sure there are
really two codewords.
2017-03-20 11:15:57 +01:00
Cedric Roux
7ffc20426b
integration fix: let simulators compile again
...
- pucchsim
- prachsim
- pdcchsim
- pbchsim
- mbmssim
Mostly, add and initialize the variable 'cpuf'.
Also, pdcchsim was calling rx_pdcch with wrong
arguments.
2017-03-20 11:00:41 +01:00
Cedric Roux
5014b84c30
integration fix: let ulsim compile again + minor modification in dlsim_tm4
2017-03-20 10:43:50 +01:00
Cedric Roux
f2e9e3f2dc
integration fix: let dlsim compile again
...
Same as previous commit 41dda3d3de
2017-03-20 10:40:26 +01:00
Cedric Roux
41dda3d3de
integration fix: let dlsim_tm4 compile again
...
The variables that were duplicated per processing thread
were adapted. 'cpuf' was defined and initialized.
2017-03-20 10:38:25 +01:00
gabrielC
1e2f952a9c
Remove to frequent log in 20 MHz
2017-03-20 09:18:02 +01:00
Cedric Roux
2011c7d689
Merge remote-tracking branch 'origin/ulsim-bugfix-w11' into develop_integration_w11
2017-03-18 00:10:50 +01:00
Cedric Roux
1c57eadd33
fix: remove useless test
...
One check introduced by previous commit was not necessary.
2017-03-18 00:09:48 +01:00
Cedric Roux
7847143610
Merge remote-tracking branch 'origin/bugfix-224-ue-tcrnti' into develop_integration_w11
2017-03-17 19:33:56 +01:00
fnabet
7f9b19cce8
UE Issue224 fix on TCRNTI
2017-03-17 10:52:59 +01:00
Florian Kaltenberger
c13d5c21f3
added null pointer check for ulsim
2017-03-16 18:05:23 +01:00
Cedric Roux
639d2eefc6
Merge remote-tracking branch 'origin/phy-test-fix' into develop_integration_w11
2017-03-16 18:01:23 +01:00
gabrielC
d5a9334306
20MHz improvement for scope (still need to be fixed for 20MHz LLR) and Log
2017-03-16 17:06:34 +01:00
gabrielC
950c1c060e
Correction of dlsch channel calculation
2017-03-16 11:45:07 +01:00
Cedric Roux
f5aa0135b1
hotfix: fix buffer size for phy-test mode 20MHz
...
768*8 is too small, in 20MHz, the phy-test mode
(in default mode?) has a buffer of size 6378.
Let's set the buffer size to the input's one plus 4 bytes
(to accomodate for CRC, not sure about this).
2017-03-15 17:17:54 +01:00
gabrielC
752b305270
Merge branch 'pdcch_dual_buffer' into develop_integration_w11
2017-03-14 15:44:13 +01:00
gabrielC
28a50c15e9
Remove some print and correct rnti for the pdcch_vars odd/even subframe
2017-03-14 15:35:21 +01:00
hbilel
bd4898222f
pdcch dual buffer
2017-03-13 15:50:10 +01:00
Cedric Roux
a500b2b293
integration fix: fix compilation of ulsim
...
We use the odd/even dlsch corresponding to the configured
subframe. It may not be the right thing to do.
2017-03-13 15:43:43 +01:00
hbilel
cec9cb7662
fix compilation error for dlsim
2017-03-13 12:05:47 +01:00
hbilel
b82b7781ee
integration fix clear tx-buffer of ue in case of empty subframe
...
for all processing including oaisim
2017-03-13 10:14:26 +01:00
Cedric Roux
a194009e00
integration fix: put dlsch_demod_shift into dlsch_demodulation
2017-03-13 10:06:26 +01:00
gabrielC
4abc1d21e3
20 MHz UE fix
2017-03-09 16:33:07 +01:00
gabrielC
28c009a072
Chenge LOG_I to LOG_D
2017-03-09 10:20:52 +01:00
hbilel
305ebf5c4b
rebase branch to develop 2017.w09
2017-03-08 14:57:30 +01:00
hbilel
9dd65f2801
[OAI-UE] remove unused debug-printf
2017-03-08 14:21:14 +01:00
hbilel
05fe029a62
[OAI-UE] fix in de-precoding for tm3/4
2017-03-08 13:59:49 +01:00
hbilel
3d1e01e283
[OAI-UE] llr computation clean up
2017-03-08 12:16:38 +01:00
hbilel
bb8c6b2c52
[OAI-UE] code clean up for merge
2017-03-08 12:16:38 +01:00
hbilel
3dc1963a2d
[OAI-UE] MIMO fixes + disabling MIB/SIB decoding on connected mode
2017-03-08 12:16:38 +01:00
Sebastian Wagner
42b834d64c
Changes for 64qam_64qam for avx2
...
Conflicts:
openair1/PHY/LTE_TRANSPORT/dlsch_llr_computation.c
2017-03-08 12:16:38 +01:00
hbilel
ba55fcac27
[OAI-UE] Mimo LLR computation AVX2 + fix in TM3 deprecoding
2017-03-08 12:16:38 +01:00
hbilel
ff6d41b6e8
[OAI-UE] Mimo feature
2017-03-08 12:15:02 +01:00
Elena_Lukashova
b2c57f42fc
Fixing bug in modulation for TM4 64QAM.
2017-03-02 22:40:54 +01:00
Elena_Lukashova
74e2cf77fa
Fixing throughput computations for multiple rounds in TM4.
2017-03-01 16:43:30 +01:00
Elena_Lukashova
7d649f432b
Fixing bler limits for different receivers.
2017-03-01 16:00:56 +01:00
Elena_Lukashova
2e9dfe0fbb
Changing names for bler and abstraction output files
...
in dlsim_tm4 to distinguish from the old runs.
2017-03-01 15:33:55 +01:00
Cedric Roux