In SA mode, there were DCI_INDs and RX_INDS that
were allocated on the stack and were assigned to
pointers used in the MAC instance. In NSA mode we
allocated these members on the heap so we free'd
them once we were done. In SA mode, they were not
allocated on the heap so this free call caused an
a free() error. We have now allocated these pointers
on the heap to avoid this error and ensure the
pointers are correct.
Also, reverted some init_pdcp logic to match
the develop branch and added NSA mode. Lastly,
added additional error checking for cellConfig
to avoid crash in MAC layer.
Also, this commit changes the len argument in the
pusharray32 to match the actual field type (uint16_t).
There is also simple name change from sf -> slot.
The new queueing system is not a permanent solution.
It was simply a way for us to try to handle late
dl_tti_requests. If we queue every single ul_tti_req
that we get, the queue gets full very quickly becasue
we only remove ul_ttis from the queue when a uci has
been populated with a matching sfn/sf. Because of this,
we only queue ul_ttis if we have a uci_indication
prepared already. Rarely, a dl_tti_req will arrive at
the NRUE too late, and the NRUE does not have time
to create the uci_ind so we dont process the corresponding
ul_tti. A seprate queue was made to hold all other ul_ttis
the arrive in the NRUE (this queue will continuously
get full and then emptied) but will occasionally hold
a ul_tti that corresponds to a uci that hasnt
been populated yet.
This commit is properly allocating the NR nFAPI
messages on the heap; however, when we do this,
it makes the NR UE behind the gNB even more and
casuses us to not finish the CFRA procedure. This
is because the RAR is recevied in the NR UE, but
the slot indications are too far in advance, so
the CRC/RX pair (msg3) is never sent because
the scheduled ul_slot and ul_frame already was
received prior to getting the RAR.
Need to fix this!!
This commit allows us to call the scheduler for
every slot indication we get to ensure we properly
configure the DCI. Also, we are sure to process the
DCI only when we have both the config (dl_tti) and
the payload (tx_req). Lastly, removed the hack
to the slot indication (we do not shift the slot
indication by -6 anymore). We are passing up to 4
NSA UEs, but sometimes one will not complete the CFRA
procedure.
- replaced taus with a random seed + random number generation
- this fixes the bug with multiple UEs starting RA in the same time frame and slot
and selecting the same preamble index
Melissa Elkadi