Wang Tsu-Han
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57421caae5
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adding tracer for tx fronthaul
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2019-11-04 15:32:25 +01:00 |
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Wang Tsu-Han
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131ad5383d
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adding precoding into feptx thread and having 2 threads per antenna
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2019-08-30 15:06:16 +02:00 |
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Francesco Mani
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a292f82fe2
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conficts solved after merge with develop-nr
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2019-08-13 17:52:07 +02:00 |
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Francesco Mani
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794aac4137
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initializing beam_weights to I
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2019-08-07 16:46:36 +02:00 |
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yilmazt
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2b05aba106
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--phy_simulators compile up to nr_dlsim
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2019-05-22 21:49:19 +02:00 |
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Raymond Knopp
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81c1e1b309
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tested with slot-based processing for 40 and 80 MHz channels
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2018-12-30 00:32:57 +01:00 |
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Raymond Knopp
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2932d172a5
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dlsim and ulsim are functional
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2018-08-25 21:09:58 +02:00 |
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WEI-TAI CHEN
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bd88e8b4b1
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Amend L1 instant to nr
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2018-07-02 05:03:00 -07:00 |
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Guy De Souza
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3ac00170b2
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Compiling version- Merge with UE directory split
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2018-05-16 11:37:57 +02:00 |
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Guy De Souza
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db326bbf44
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SSB repositioning
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2018-04-25 10:14:54 +02:00 |
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Guy De Souza
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fb23ffd61c
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malloc clear fix
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2018-04-24 14:41:09 +02:00 |
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Guy De Souza
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75471ff721
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malloc fix 2
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2018-04-18 12:07:52 +02:00 |
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Guy De Souza
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ad358decce
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txdata malloc fix
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2018-04-18 11:57:24 +02:00 |
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Guy De Souza
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7e7c15c3b9
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NR RU init
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2018-04-11 14:31:08 +02:00 |
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