Commit Graph
415 Commits
Author SHA1 Message Date
Laurent THOMAS ce7bdf71e9 fix simde lacking refix 2025-02-17 11:06:08 +01:00
Raymond Knopp 1d538592fe fixed compilation warnings and minor errors for aarch64 2025-02-12 11:59:52 +01:00
Laurent THOMAS 3edd989aff simplify nr_layer_mapping(), and use all simd sizes for the tail 2025-02-12 11:59:52 +01:00
Laurent THOMAS 9004787171 group two symbol loops to make one with smaller tsack size and smaller variables 2025-02-12 11:59:52 +01:00
Laurent THOMAS 2fad8796b1 clean no_ptrs_dmrs_case() 2025-02-12 11:51:28 +01:00
Laurent THOMAS 889b4b00e3 SIMD optimizations for Neon/AVX2/AVX512 in the PDSCH transmit path 2025-02-12 11:51:28 +01:00
Laurent THOMAS 43b981247e error-simd-intrinsic-name 2025-02-04 13:21:43 +01:00
Bartosz Podrygajlo 55b5e04e8d Change alignment of temporary IDFT buffer in PHY_ofdm_mod
Alignment of temporary IDFT buffer was changed to 64 bytes. This is in preparation
for possible use of different IDFT implementation which could use AVX-512, requiring
64-byte alignment.
2024-12-17 23:04:30 +01:00
Bartosz Podrygajlo 9e6c0c8c78 Fix unused code paths in PHY_ofdm_mod
For completeness sake, unused CYCLIC_SUFFIX and NONE extension
types were fixed to match CYCLIC_PREFIX memcpy usage.
2024-12-16 15:37:56 +01:00
Bartosz Podrygajlo 5ab9bd95bd Add const to input argument in PHY_ofdm_mod 2024-12-16 15:35:07 +01:00
Bartosz Podrygajlo 1481d89dfd Optimize PHY_ofdm_mod CYCLIC_PREFIX in case of incidentally aligned pointers
It seems that the cyclic prefix is in most cases a multiple of 512 samples.
This means that in most cases the idft output pointer is already aligned and
there is no need to perform an extra memcpy. This saves the memcpy time in
most cyclic prefix insertion cases.
2024-12-16 15:04:03 +01:00
Bartosz Podrygajlo 31b8d98bb5 Formating for PHY_ofdm_mod 2024-12-16 15:04:03 +01:00
Robert Schmidt da7a028a3f Merge remote-tracking branch 'origin/logs-refactor-orange' into integration_2024_w44 (!3078)
Simplify logs in gNB&UE

- reduce the amount of printf() that outputs useless info
- in MAC, PHY, NGAP, RRC, mark some "important" UE events with LOG_A for
  better visibility -> can put log_config.global_log_level analysis to
  only see important stuff
- in RRC, use some macro to consistently print logs
- track the cellID of a UE in RRC
2024-11-01 11:58:47 +01:00
Laurent THOMAS f1f02ec0a1 use existing functions to retrieve (i)dft enum value 2024-10-29 18:47:15 +01:00
Robert Schmidt 68f8ef7c7a Reduce amount of logs in L1/L2
This commit removes many logs that just show memory addresses, indices,
etc., which, I presume, do not mean anything to the "average user" and
developers alike.
2024-10-29 16:36:13 +01:00
francescomani 2a9a038dbd improvements in RU beamforming handling procedures 2024-10-11 07:59:31 +02:00
Jaroslava Fiedlerova 01524428d4 Merge remote-tracking branch 'origin/NR_UE_SLOTFEP_MERGE' into integration_2024_w39 2024-09-27 14:10:04 +02:00
Raghavendra Dinavahi 114ea60c42 removed nr_slot_fep_init_sync and used nr_slot_fep in UE 2024-09-25 09:50:34 +02:00
Raghavendra Dinavahi dfbedadd5f Use nr_slot_fep for sidelink, removed sl_nr_slot_fep 2024-09-18 17:17:19 +02:00
Sakthivel Velumani 2b7e0a0519 Change loop order to maximize cache hit
It is better to write to memory that are grouped together to reduce
probability of cache miss. This simple change improved the function's
execution speed by 70%.

Removed the unnecessary memset for the buffer.
2024-09-03 09:18:26 +02:00
Jaroslava Fiedlerova fc9c5084eb Merge remote-tracking branch 'origin/nr-ue-pdsch-time-stats-fix' into integration_2024_w31 2024-08-02 16:27:58 +02:00
Bartosz Podrygajlo b242a483f1 Rewrite NR UE PHY cpu measurements 2024-07-30 19:23:54 +02:00
Robert Schmidt 9e0bcb7fe4 nr_modulation(): make non-changing input parameter const ptr 2024-07-26 12:04:35 +02:00
Raghavendra Dinavahi 798ceeeef2 SL PSBCH: MAC->PHY cfg, PSBCH scheduler + supporting functions + enable system testing & scope
- Phy config update and Sidelink frame parameters initialisation
	- PSBCH scheduler to trigger TX PSBCH/RX PSBCH actions
	- Sidelink indication with rx ind to trigger send SL-MIB to MAC
	- Enable Scope for PSBCH use -d or --dqt
	- Enable system testing of PSBCH for example using RFSIMULATOR:

		- UE1 is a SYNCRONISATION SOURCE UE which transmits PSBCH

		  started using command -
		  sudo ./nr-uesoftmodem --sl-mode 2 --sync-ref 4 --rfsim --rfsimulator.serveraddr server

		- UE2 syncs onto UE1 during sidelink search, gets the timing and continues to receive PSBCH

		  started using command -
		  sudo ./nr-uesoftmodem --sl-mode 2 --rfsim --rfsimulator.serveraddr 127.0.0.1

		- In the default use case 2 Sidelink SSBs sent over 16 frames.

		- In case SL-SSB configuration needs to be changed use -O option in the above command like

		-O ../../../targets/PROJECTS/NR-SIDELINK/CONF/sidelink_preconfig_1txpool.conf
2024-06-21 09:40:16 +02:00
Robert Schmidt 5b53f4ee0f Merge remote-tracking branch 'origin/NR_UE_cell_search' into integration_2024_w22 2024-06-03 21:35:51 +02:00
Sakthivel Velumani 043da0c440 NR UE scan for SSB within current bandwidth
Till this commit, the UE gets the position of SSB in frequency from
command line and does the syncronization by locating the SSB in time. It
does this by generating a PSS time signal during initialization with the
SSB offset given via command line. Then PSS detection is done by
correlation.

In this commit, the UE computes a list of GSCN in the current NR band
that falls within the current bandwidth for the set center frequency.
For each GSCN in the list, the UE starts a thread and performs the
following:
1. Generate PSS time signal with SSB offset for current GSCN.
2. Detect PSS, SSS and decode PBCH (this step remains the same).
After all threads finishes, the results are collected.

For now, only the first detected PBCH is used to proceed further. So
this PBCH is indicated to MAC and UE exits initial sync.

Future work: The cell search can be standalone feature where the UE
could scan for SSB in the entire NR band. This would require changing
radio's frequency on the fly as the UE's bandwidth would not cover an
entire NR band. The cell detection can futher be imporved by looking
for SIB1 for each decoded PBCH.
2024-05-30 10:20:45 -04:00
Raymond Knopp e3aff6c37b fix in nr_modulation.c: avoid fail for 64QAM and G < 192 bits
Adds a check for these short payloads and handle correctly
2024-05-24 09:25:44 +02:00
Robert Schmidt ebeb26528a Merge remote-tracking branch 'origin/NR_PSBCH_MERGE1' into integration_2024_w15 2024-04-15 14:34:36 +02:00
Jaroslava Fiedlerova de263d4a40 Merge remote-tracking branch 'origin/fft_size_fix_3072' into integration_2024_w15 2024-04-15 08:29:34 +02:00
Robert Schmidt 9a2e080f77 Apply clang-format 2024-04-13 08:54:15 +02:00
Jaroslava Fiedlerova 9d2ad34b1b Merge remote-tracking branch 'origin/improve-layer-mapping' into integration_2024_w15 2024-04-12 16:54:50 +02:00
Raghavendra Dinavahi 94b23d1eb0 PSBCH RX TX and SLSS search procedures
- RX/TX Phy processing accg to 38.211, 38.212 Rel16
	- PSBCH simulator used to validate TX/RX phy processing
	- PSBCH SLSS Search procedures
	- PSBCH SIM also tests SLSS SEARCH
2024-04-12 16:07:00 +02:00
Laurent Thomas be3452a10e Reduce stack memory size for layer mapping
Delete small pieces of dead code
2024-04-12 11:14:08 +02:00
rakesh mundlamuri 47d1f8bb82 harmonizing the IDFT index at different places 2024-04-11 16:47:32 -04:00
francescomani 9cc53a43b1 invalidPrintfArgType_uint 2024-04-09 16:44:56 +02:00
francescomani 686da85d05 invalidPrintfArgType_sint 2024-04-09 16:44:56 +02:00
Laurent THOMAS a95dffc80e delete dead files 2024-03-26 20:57:31 +01:00
Laurent THOMAS 88fb3c3598 change type to c16_t around dmrs computation pieces of code 2024-03-26 20:57:31 +01:00
francescomani c8afb25d3b moving generation of precoding matrices at MAC and trying to adapt to SCF (1st version) 2024-01-19 09:21:08 +01:00
Laurent THOMAS b5e169ec07 add const or other simple C code improvement 2024-01-09 16:15:14 +01:00
Quency Lin fcb23b441a Refactor: Do SIMD precoding in a function
Use blend instead of set and extract to rearrange, faster
Use 256 SIMD for every 2 RB, use 128 SIMD for ARM and last RB
2023-12-14 11:31:10 +01:00
Quency Lin b240bc485f Feat: improve layer mapping by 32 bits assignment 2023-12-07 14:04:06 +01:00
Laurent THOMAS bba9aac079 fix most of doxygen warnings and errors 2023-10-26 16:47:19 +02:00
Raymond Knopp a7bc282302 First-level of support for new aarch64 machines
Testing on Neoverse N1 (Ampere 3GHz). Tested only on a subset of phy-simulators.

- Changes:
- use SIMDE consistently
- adaptations of LDPC decoder generator for ARMv8 performance
- SIMDe modifications of Intel CRC to allow for aarch64 build.
  optimizations for 128-bit to improve performance of LDPC encode/decode
  on aarch64 (Neoverse 1)
- added BG2 files for 128-bit ldpc encoder (aarch64)
- testing on Xeon
- testing on x86
- minor changes to build/run on x86
- change in crc.h after returning to aarch64
- removed some warning in ldpc decoder generator for x86_64
- char
- Delete irrelevant constants
- Correctly declare variables
- Define stdbool for all architectures
- Remove definition of _MM_SHUFFLE and use SIMDE_MM_SHUFFLE
- Remove commented code
- Fix CMakeLists.txt
- Include SIMDE avx2 functions in tools_defs.h
2023-09-13 17:19:20 +02:00
Laurent THOMAS 4c3d8e7581 fix-mem-overflow_64qam
fix the 64QAM modulator case, that process 192 bits per iteration, then 24 bits per iteration of the tail bits, then added the last two symboles processing (no odd number of symbols case)
2023-08-23 11:14:42 +02:00
Robert Schmidt da17b17b83 Merge remote-tracking branch 'origin/fix_nr_slot_fep_init_sync' into integration_2023_w30 2023-07-28 12:03:06 +02:00
Robert Schmidt 04dee38c71 Merge remote-tracking branch 'origin/NR_FR2_sanitize' into integration_2023_w29 2023-07-21 14:06:29 +02:00
Thomas Schlichter 5bc77ad169 fix typo in nr_slot_fep_init_sync()
This function is used during initial synchronization, only.
This typo leads to wrong computation of the OFDM symbol start within a slot, after PBCH decoding.
The result is a time offset and therefore a rotation in frequency domain for the initial PDCCH and PDSCH (SIB1) reception.
2023-07-21 13:34:49 +02:00
francescomani e198b74155 fixes running FR2 test with sanitize 2023-07-13 16:27:34 +02:00
laurent 9121541b3c only cleaning 2023-07-10 12:00:25 +02:00