NR UE: consider the ratio of PUSCH EPRE to DMRS EPRE when calculating PUSCH
DMRS power scaling
When calculating DMRS scaling ratio, we should consider PUSCH EPRE to DMRS
EPRE according to TS 38.214 Table 6.2.2-1.
Close#929
Long PRACH extends beyond a slot. Changes necessary to mark future slots
that may contain prach in ru, phy and mac functions.
In RU, the PRACH IDFT is done only after receiving last slot and marks
for L1 to start processing. The L1 processes at the last prach slot and
reports to MAC with the first slot index.
In MAC scheduler, the VRB for future slots are also marked as used.
PRACH scheduler is called in advance one frame minus num prach slots.
Changes to support multiple TDD patterns
- Updated the configuration changes for 2 Patterns
- Update the TDD table configuration for NFAPI
- Added the tdd bitmap for the period
- Adapted the bitmap for UL/DL for the multi TDD pattern
- Updated the RACH procedure for multi TDD pattern
- Updated DL and UL scheduler for multi TDD pattern
* the function is returning the index of the first full UL slot in tdd_slot_bitmap
or the first UL slot (including mixed) if the "mixed" flag is provided
* set_tdd_bmap_period, config_tdd_patterns: to configure TDD period, including bitmap, in the frame structure
* get_tdd_periodicity: to retrieve the periodicity in milliseconds for the given TDD pattern
* get_tdd_period_idx: to get the TDD period index based on pattern periodicities
* get_ul_slots_per_period: get the number of UL slots (including mixed with UL symbols) in period
* get_full_ul_slots_per_period: get the number of full UL slots in period
* get_dl_slots_per_period: get the number of DL slots (including mixed with DL symbols) in period
* get_full_dl_slots_per_period: get the number of full DL slots in period
Co-authored-by: vijay chadachan <vijay.chadachan@firecell.io>
Pass consistently the NR_timer_t object through a pointer. Since we have
to modify all occurrences of is_nr_timer_active(), we use that occasion
and rename that function to nr_timer_is_active() to make it consistent
with all other functions, starting with nr_timer.
A new phy scope based on ImGui and ImPlot. This scope uses a different concurrency model than previous
scopes.
The PHY thread writing the data first checks if the data is ready to be written. If its not, nothing is copied.
The GUI thread reads data if available and marks it ready to write. This makes sure that the PHY threads are not
busy copying data that would never be displayed.
Some of the scopes also have a freeze functionality that further limit the amount of data that needs to be copied
from PHY threads. If a scope is "frozen" it still allows the user to explore the data using plots zoom/pan functions
but doesn't cause PHY threads to perform extra writes on the displayed data.
A compile option was added to enable/disable the scope. Use cmake -DENABLE_IMSCOPE=ON to enable the scope.
Update CXX standard to 17; it is required by some libraries (e.g., dear imgui). The oldest gcc version in
use by a distribution supported is Ubuntu 20, which has gcc 9.4 with c++17 support.
- MAX HARQ PROCESSES set to 32
- for PDSCH - default setting in OAI is 16, according to 3GPP rel17 38.331 these are the possible configs
- if no IES are defined then 8
- if nrofHARQ-ProcessesForPDSCH is defined then these values- {n2, n4, n6, n10, n12, n16}
- if nrofHARQ-ProcessesForPDSCH-v1700 is defined then 32
- for harq bits in DCI
- DCI 1_0 - 4 bits spec 38.212, section 7.3.1.2.1
- DCI 1_1 - 4/5 bits according to IE harq-ProcessNumberSizeDCI-1-1, spec 38.212, section 7.3.1.2.2
- for PUSCH - default setting in OAI is 16, according to 3GPP rel17 38.331 these are possible configs
- if no IES are defined then 16
- if nrofHARQ-ProcessesForPUSCH-v1700 is defined then 32
- for harq bits in DCI
- DCI 0_0 - 4 bits spec 38.212, section 7.3.1.1.1
- DCI 0_1 - 4/5 bits according to IE harq-ProcessNumberSizeDCI-0-1, spec 38.212, section 7.3.1.1.2
- FOR HARQ32 , DCI 1_1, DCI 0_1 should be configured in UE dedicated search space. In OAI it is set.
This assert and assumption is incorrect, according to 38.101-1 UE channel is defined only by the BWP size
and BWP size can be any value supported by the RRC parameters defining the BWP.
To determine the UE channel the smallest bandwidth supporting the BWP is selected. This is an assumption based
on references in the same document to UE channel bandwidth being equal to one of the values in set
{5, 10, 15, 20, 25, 30, 35, 40, 50, 60, 70, 80, 90, 100}.
Also:
- calculated P_CMIN during BWP setup since the parameter doesn't depend on DCI.
- initiialize uniqCfg structure in test_nr_ue_power_procedures main function which enables LOG prints during tests
Till this commit, the UE gets the position of SSB in frequency from
command line and does the syncronization by locating the SSB in time. It
does this by generating a PSS time signal during initialization with the
SSB offset given via command line. Then PSS detection is done by
correlation.
In this commit, the UE computes a list of GSCN in the current NR band
that falls within the current bandwidth for the set center frequency.
For each GSCN in the list, the UE starts a thread and performs the
following:
1. Generate PSS time signal with SSB offset for current GSCN.
2. Detect PSS, SSS and decode PBCH (this step remains the same).
After all threads finishes, the results are collected.
For now, only the first detected PBCH is used to proceed further. So
this PBCH is indicated to MAC and UE exits initial sync.
Future work: The cell search can be standalone feature where the UE
could scan for SSB in the entire NR band. This would require changing
radio's frequency on the fly as the UE's bandwidth would not cover an
entire NR band. The cell detection can futher be imporved by looking
for SIB1 for each decoded PBCH.
Jaroslava Fiedlerova