fix NTN LEO scenario
NR UE: in nr_slot_fep() perform FO compensation in local tmp_dft_in
array instead of global rxdata array.
This avoids problems if nr_slot_fep() is called more than once for an
OFDM symbol.
Correct block_length to Kprime for LDPC decoder
When compile the OAI by CMake, it shows the following error:
../openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_decoder_CL.c:353:40: error: no member named 'block_length' in 'struct nrLDPC_dec_params'
int block_length = p_decParams->block_length;
NR UE: consider the ratio of PUSCH EPRE to DMRS EPRE when calculating PUSCH
DMRS power scaling
When calculating DMRS scaling ratio, we should consider PUSCH EPRE to DMRS
EPRE according to TS 38.214 Table 6.2.2-1.
Close#929
NR UE: add support for continuous frequency offset compensation (in particular NTN LEO Doppler)
- move function add_noise() to file
openair1/SIMULATION/TOOLS/phase_noise.c
- refactor (co)sinus calculation out of phase_noise() into get_sin_cos()
in nr_common.c
- NR UE: continuously estimate the frequency offset using PBCH DMRS
- NR UE: add command line parameter --initial-fo to specify known
initial frequency offset
- NR UE: add support for continuous DL frequency offset compensation
--cont-fo-comp
- NR UE: add support for continuous UL frequency offset
pre-compensation. Depending on the main source of frequency offset,
pre-compensate the UL frequency offset (FO) accordingly. Therefore
modify the flag --cont-fo-comp to accept an integer value, where
* 1 specifies, that the main FO contribution comes from the accuracy of the local oscillator (LO)
* 2 specifies, that the main FO contribution comes from Doppler shift
- NR UE: add PI controller to continuous frequency offset compensation
- rfsimulator: enable and correct NTN LEO doppler simulation
- use SIMD to speed up nr_fo_compensation()
- Extend NTN LEO example in RUNMODEM.md to include continuous Doppler
compensation
- NR UE: in nr_adjust_synch_ue() extend the peak search to +/- cyclic
prefix size, esp. for LEO NTN scenarios the timing drifts during
initial sync, which is mostly compensated with
--ntn-initial-time-drift. But there might be a residual time offset,
and by extending the peak search window we make this more tolerant.
- NR UE: remove unused nr_slot_tx_offset, it is unused since commit
f3e60a14
- NR UE: remove now unnecessary local variable
update_ntn_system_information, directly use
UE->ntn_config_message->update instead
NR UE: enable concurrent UL slot processing
This commit introduces support for concurrent UL slot processing
Key changes:
- Increased number of UL actors from 1 to 2
- fix several issues related to writing to global variables inside processSlotTX
- Ensure in-order execution of if_module calls by utilizing the preexisting dynamic_barrier structure.
Note: for NTN, concurrent UL slot processing does not work. A flag
`--num-ul-actors X` has been introduced that allows to fix the number of
UL actors to `X` (default is 2).
esp. for LEO NTN scenarios the timing drifts during initial sync, which is mostly compensated with --ntn-initial-time-drift.
But there might be a residual time offset, and by extending the peak search window we make this more tolerant.
This commit introduces support for concurrent UL slot processing
Key changes:
- Increased number of UL actors from 1 to 2
- fix several issues related to writing to global variables inside
processSlotTX
- Ensure in-order execution of if_module calls by utilizing the
preexisting dynamic_barrier structure.
Optimization for unused symbols in NR UE
After processing TX frequency domain data skip IFFT call for symbols
that aren't used, the time domain buffer is memset instead.
Biggest benefit is when UE does not transmit PUSCH, or PUSCH is using <
14 symbols
feat(oran_fhlib_5g): O-RAN 7.2 FrontHaul Interface on Arm
This MR is enabling the 7.2 FHI on Arm systems.
Even though the performance are yet very bad (UE connection is very
difficult, 100Mbps DL, almost no UL), still I would like to merge this
now since the matter of making the FHI work is rather orthogonal to the
performance issues.
So merging this feature would provide a reliable settlement on top of
which we could then progressively enhance the porting of OAI to Arm.
Especially that would make our work easier by having less features to
rebase regularly on develop.
The main features this MR is made of are:
1. Make the xran patches dual
We provide patches for both E and F releases of xran that handles x86
targets as well as Arm targets. Both patches have been tested on both
types of machines (armix, broadbill). Thanks to @brobert and @changy
for their work on xran.
2. Perform 9-bits BFP compression with ArmRAL
Since the BFP compression implementation provided with xran does rely
heavily on AVX512, we provide an alternative implementation that is
relying on Arm's RAN Acceleration Library (ArmRAL).
As of writing this commit description, only 9-bits compression is
supported. Other IQ width will be added.
This upcoming change does not prevent review to be performed since the
BFP compression functions of ArmRAL are identical except for the IQ
width. Adding further IQ width is therefore very straightforward.
3. Fixes in oran_fhlib_5g to support Arm
The library oran_fhlib_5g needed few changes to successfully compile and
run on Arm systems. Thanks to @brobert for his work on oran_fhlib_5g.
Remove include of SIMDE Neon header sse_intrinsic.h to compile on ARM. Otherwise the error below is issued.
```
/usr/include/simde/arm/neon/get_lane.h:279:5: error: incompatible type for argument 1 of ‘vget_lane_f16’
279 | SIMDE_CONSTIFY_8_(vget_lane_f16, r, (HEDLEY_UNREACHABLE(), SIMDE_FLOAT16_VALUE(0.0)), lane, v);
removed the inclusion of neon.h
```
remove ul_ch_estimates_time to save memory
remove ul_ch_estimates_time that saves 50MB memory to access in RAM, and
make better quality scope data passing (no race)
Add support for ARM build pipeline
Modify the existing python code to be able to build images where the
image tag can be prepended with a prefix, here arm_. This is preparatory
work to create the ARM build image pipeline, and reuse the existing
internal registry on porcepix to have x86 and ARM images coexist.
Fix various bugs in the build system to allow to build on a system with
as many cores as gracehopper.
Also, fix two programs (usim, nvram) to work correctly under ARM.
Harmonize and update Frequency Range computation to the current values
specified by the standard
3GPP TS 38.101-1 Version 19.0.0 Table 5.1-1: Definition of frequency
ranges
- FR1 from 410 MHz to 7125 MHz
- FR2 from 24.25 GHz to 71 GHz
Laurent THOMAS