Robert Schmidt
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5f15662444
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Merge remote-tracking branch 'origin/rfsim-bug-multi-listners' into integration_2022_wk44
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2022-11-04 11:03:33 +01:00 |
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Robert Schmidt
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6b80da0baa
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Merge remote-tracking branch 'origin/NR_UE_dlsch_local_var' into integration_2022_wk44
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2022-11-04 11:00:41 +01:00 |
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Robert Schmidt
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408a1c01d7
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Merge remote-tracking branch 'origin/NR_RRC_config_cleanup' into integration_2022_wk44
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2022-11-04 11:00:12 +01:00 |
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Robert Schmidt
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e5eabe203e
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Merge remote-tracking branch 'origin/NR_DeltaTF_hotfix' into integration_2022_wk44
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2022-11-04 10:59:55 +01:00 |
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Robert Schmidt
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b89daf68b7
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Merge remote-tracking branch 'origin/Fix_BWP_switching_when_Msg3_DCCH' into integration_2022_wk44
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2022-11-04 10:59:50 +01:00 |
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Robert Schmidt
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bacce39af7
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Merge remote-tracking branch 'origin/rrc-meas' into integration_2022_wk44
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2022-11-04 10:57:37 +01:00 |
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Robert Schmidt
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3e0efbdeb2
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Merge remote-tracking branch 'origin/nr_ue_improve_time_and_freq_sync' into integration_2022_wk44
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2022-11-04 10:55:56 +01:00 |
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Arash Sahbafard
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ec25c623d1
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Fix: check RFsim bind() return code
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2022-11-04 09:26:46 +01:00 |
|
Sakthivel Velumani
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662897e0c5
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Remove mlock
Modern hardware have large RAM and don't need mlock.
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2022-11-03 16:27:25 -04:00 |
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Robert Schmidt
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00106a7ec8
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Merge remote-tracking branch 'origin/configurable_rounds_in_sim' into integration_2022_wk44
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2022-11-03 20:10:00 +01:00 |
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Robert Schmidt
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e9126363ea
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Merge remote-tracking branch 'origin/removing_calltotimers_for_msg3_dcch_dtch' into integration_2022_wk44
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2022-11-03 20:09:51 +01:00 |
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Robert Schmidt
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4214f3971d
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Merge remote-tracking branch 'origin/NR_RRC_PDSCH_config_harmonization' into integration_2022_wk44
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2022-11-03 20:09:43 +01:00 |
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francescomani
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4e80dc4a20
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move PL comutation at MAC
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2022-11-03 17:56:20 +01:00 |
|
Robert Schmidt
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1c73dec53f
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Update FEATURE_SET.md
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2022-11-03 17:19:22 +01:00 |
|
Robert Schmidt
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1ae1b0aa9f
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Print RRC meas periodically
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2022-11-03 17:19:22 +01:00 |
|
Robert Schmidt
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6762342d25
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Add periodic RRC measurements
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2022-11-03 17:19:22 +01:00 |
|
Robert Schmidt
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1c778ef382
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Refactor and enable logging in nrRRC_stats.log
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2022-11-03 17:18:57 +01:00 |
|
francescomani
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a962ba8d5b
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replacing call to RRC processing timers for msg3 dcch
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2022-11-03 13:55:07 +01:00 |
|
Thomas Schlichter
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5063957a16
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fix merge artefact in nr_dl_channel_estimation.c
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2022-11-03 09:43:03 +01:00 |
|
Thomas Schlichter
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c5e68e146c
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NR_UE: increase the accuracy of the filtered peak position value
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2022-11-03 09:42:57 +01:00 |
|
Thomas Schlichter
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39fe985681
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NR_UE: slightly improve timing synchronization by minimizing the adjustment of the filtered peak position value
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2022-11-03 09:42:47 +01:00 |
|
Thomas Schlichter
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a7d9f94ef3
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NR_UE scope: show complete CIR
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2022-11-03 09:42:41 +01:00 |
|
Thomas Schlichter
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cd8122d24d
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NR_UE: fix frequency offset estimation/compensation if SSB is in the second captured frame
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2022-11-03 09:42:27 +01:00 |
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Thomas Schlichter
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f73fcd94ee
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NR_UE: fix/add some debugging in nr_adjust_synch_ue.c and nr_dl_channel_estimation.c
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2022-11-03 09:41:51 +01:00 |
|
Thomas Schlichter
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a2c6ad42e4
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NR_UE: minor improvements in nr_initial_sync()
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2022-11-03 09:41:14 +01:00 |
|
Thomas Schlichter
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b94d6b5b33
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remove unsupported "thread_pool_size" parameter from conf files
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2022-11-03 09:37:41 +01:00 |
|
Thomas Schlichter
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9ae6095a78
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nr_ulsim: fix calculation of statistics
|
2022-11-03 09:37:28 +01:00 |
|
Thomas Schlichter
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54b7fde0aa
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NR_UE: fix noise in PDCCH scope
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2022-11-03 09:31:57 +01:00 |
|
Sakthivel Velumani
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ea72306c38
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Moved DLSCH PHY structure to stack
|
2022-10-31 18:22:27 -04:00 |
|
francescomani
|
3cd342f74a
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remove unused RRC code
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2022-10-31 10:42:37 +01:00 |
|
francescomani
|
847044a5a6
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fix bad merge
|
2022-10-31 09:48:45 +01:00 |
|
luis_pereira87
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dbb6182124
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Fix BWP switching to the previous active BWP when there is a RA with Msg3 through DCCH or DTCH
|
2022-10-30 09:38:56 +00:00 |
|
francescomani
|
1304a682fc
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fix usage of FAPI new data indicator for PUSCH
|
2022-10-29 14:29:35 +02:00 |
|
francescomani
|
c2e80ffe9f
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ndi init fix
|
2022-10-29 14:29:35 +02:00 |
|
francescomani
|
254491481f
|
addressing review and correcting indentation
|
2022-10-29 14:29:35 +02:00 |
|
francescomani
|
3a8db593d9
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removing unnecessary code for re-transmission in ulsch decoding
|
2022-10-29 14:25:05 +02:00 |
|
francescomani
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c3d863a6e5
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configurable max nb of rounds in dlsim
|
2022-10-29 14:25:05 +02:00 |
|
francescomani
|
4c21c2d172
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configurable max nb of rounds in ulsim
|
2022-10-29 14:25:05 +02:00 |
|
francescomani
|
3b53d82b26
|
avoiding to use tx_lev since it was breaking prachsim (also some formatting)
|
2022-10-29 14:16:12 +02:00 |
|
francescomani
|
21b14dddb4
|
removing unused code in dummy functions
|
2022-10-29 14:16:12 +02:00 |
|
francescomani
|
c07cbce037
|
better handling of PRACH TX power to improve separation between PHY and MAC
|
2022-10-29 14:16:12 +02:00 |
|
francescomani
|
c9553fe696
|
moving prach_resources to MAC
|
2022-10-29 14:16:12 +02:00 |
|
francescomani
|
e0cdf278b5
|
remove init_msg1 and sync_frame from prach structure
|
2022-10-29 14:02:23 +02:00 |
|
Robert Schmidt
|
a50a14a9aa
|
CI: Collect all *.log
|
2022-10-29 12:48:55 +02:00 |
|
Robert Schmidt
|
3ae26431eb
|
Do not require "Bye." to be in last line
|
2022-10-29 12:48:55 +02:00 |
|
Robert Schmidt
|
e17575f52a
|
SA test monolithic: no timing measurements
|
2022-10-29 12:48:55 +02:00 |
|
Robert Schmidt
|
68f8914868
|
Add iperf for Quectel 20MHz SA test
|
2022-10-29 12:48:55 +02:00 |
|
Robert Schmidt
|
a40baf6957
|
Add scenario XML for SA F1 with Quectel
|
2022-10-29 12:48:55 +02:00 |
|
Robert Schmidt
|
3f32164e2c
|
Add docker-compose for SA F1 test with Quectel
|
2022-10-29 12:48:55 +02:00 |
|
Robert Schmidt
|
c985210668
|
Update SA b200 Quectel config to 20 MHz
|
2022-10-29 12:48:55 +02:00 |
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