avoid UBsan error:
openair1/PHY/NR_TRANSPORT/pucch_rx.c:266:21: runtime error: signed integer overflow: 2113190528 + 117251752 cannot be represented in type 'int'
fixes the overflow issue in the PUCCH2 RX with 4+ RX antennas and 12+
bits (polar code format). The fix scales the polar decoding LLR
computation according to the number of RX antennas. The issue was clear
for 100 MHz 4 RX antennas. Even
nr_pucchsim -s -5 -q 8 -P 2 -b 12 -R 273 -z4 -n1000
doesn't converge to 0 BLER with increasing SNR. The issue didn't appear
in CI because of the bandwidth and antenna count limitations.
Do not assert if the list of phy statistics is full; instead return
NULL.
In most places, this is handled appropriately (we do not store anything
if we can't). In nr_decode_pucch0(), the return value of get_phy_stats()
is used a little bit all over the function, and a constant
if (uci_stats)
uci_stats->variable++;
would look ugly, so make uci_stats point to the stack if we cannot store
in the phy_stats.
the uci_stats variable (pointing to per-UE statistics for UCI) is used
in function nr_decode_pucch0() to store information which is important
beyond statistics, e.g., uci_stats->pucch0_thres as a threshold (which
comes from somewhere else)
This commit refactors to use original or intermediate variables to not
mix uci_stats usage with actual processing.
Also, group uci_stats a bit more.
This commit introduces a separate thread (l1_tx_thread) that processes
gNB DL/TX slots. It receives a message from the ru_thread when a new
slot started, and starts processing.
The DL part of the scheduler is run in the l1_tx_thread. Therefore,
only call UL indication (for scheduler) in UL slots. The UL indication
previously triggered the DL scheduler -- hence, it had to be called in
every slot. Now, since the DL scheduler is moved into the DL thread, we
don't have to call the scheduler in every slot anymore.
The reorder thread is removed, as reordering with this scheme is not
necessary anymore.
The main advantage of this version is that the TX can be scheduled
earlier (sl_ahead). Further, there can no longer be race conditions in
the TX path, since the scheduler/L2, TX L1 processing and the RU tx
function are all execute in the same thread (L1_tX_thread).
Also, the scheduler prepares PRACH/PUSCH/PUCCH FAPI PDUs. As of this
commit, the scheduler runs in the TX processing chain, whereas these
PDUs are destined for RX processing. Thus, too avoid data races,
instead of triggering the RX processing at the same time as TX
processing in the RU thread, this commit changes the code to trigger RX
processing after the scheduler has been run in TX processing to avoid
data races.
Finally, we synchronize RU and L1 threads. This is important for
rfsimulator, since unlike most radios, rfsimulator can run slower or
faster, depending on I/O and CPU (it does not have a stable "tick").
Co-authored-by: kiran <saikiran@iitj.ac.in>
Testing on Neoverse N1 (Ampere 3GHz). Tested only on a subset of phy-simulators.
- Changes:
- use SIMDE consistently
- adaptations of LDPC decoder generator for ARMv8 performance
- SIMDe modifications of Intel CRC to allow for aarch64 build.
optimizations for 128-bit to improve performance of LDPC encode/decode
on aarch64 (Neoverse 1)
- added BG2 files for 128-bit ldpc encoder (aarch64)
- testing on Xeon
- testing on x86
- minor changes to build/run on x86
- change in crc.h after returning to aarch64
- removed some warning in ldpc decoder generator for x86_64
- char
- Delete irrelevant constants
- Correctly declare variables
- Define stdbool for all architectures
- Remove definition of _MM_SHUFFLE and use SIMDE_MM_SHUFFLE
- Remove commented code
- Fix CMakeLists.txt
- Include SIMDE avx2 functions in tools_defs.h
This commit includes changes to the function
footprints for vaiours NR UE and gNB functions.
It does not updated the LTE code. For functions
shared by both LTE and 5G, we maintained the original
LTE footprint and argument structure.
Several of the simulators that use these functions
have been updated as well. The specific usage of these
functions which index into the int32_t buffers and
treat the first int16_t and the real and the second
as the complex should be modified in the near future.