rmagueta
bed43a2a79
Address review comments
2021-02-22 16:31:13 +00:00
rmagueta
4ea560f291
Address review comments
2021-02-22 16:01:05 +00:00
rmagueta
e7fb928758
Fix dlsch_config_pdu for DCI with format 1.1
2021-02-12 21:40:04 +00:00
luis_pereira87
9a55e64e54
Fix build errors in physical unitary tests simulators, minor update in the documentation
2021-02-12 12:28:17 +00:00
rmagueta
7011b04b75
Code clean up and minor correction in RA for SA
2021-02-12 00:24:31 +00:00
rmagueta
d2e9ca590c
Fix segmentation fault in PDSCH DMRS when using additional DMRS symbols
2021-02-11 22:21:45 +00:00
rmagueta
d0c5bea3be
Log improvements
2021-02-11 13:01:39 +00:00
rmagueta
c5ab33ffd9
Merge remote-tracking branch 'origin/develop' into develop-SA-RA
...
# Conflicts:
# openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_decoding.c
# openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c
# openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c
2021-02-11 12:27:06 +00:00
rmagueta
79e8098382
Minor code clean up
2021-02-10 15:15:35 +00:00
luis_pereira87
f4b3a869a6
minor fix at SIB1 decoding
2021-02-10 13:07:04 +00:00
Robert Schmidt
54a2d698db
Fix build: test for slot from within preprocessor
2021-02-09 16:46:44 +01:00
luis_pereira87
5a1e2b1db7
Add support for SIB1 and SI in BCCH-DL-SCH
2021-02-09 15:32:17 +00:00
hardy
665688681b
Merge remote-tracking branch 'origin/ue-fixes' into integration_2021_wk06_b
2021-02-09 10:54:58 +01:00
hardy
421cb60fa4
Merge remote-tracking branch 'origin/NR_DLUL_PF' into integration_2021_wk06_b
2021-02-09 10:49:28 +01:00
hardy
bcc009b2f9
Merge remote-tracking branch 'origin/nasmesh_kernel_5.8' into integration_2021_wk06_b
2021-02-09 10:48:57 +01:00
rmagueta
2b9d0f95c9
Fix develop merge conflicts in the RA-Msg3
2021-02-08 22:40:23 +00:00
rmagueta
5b7ae1228f
Fix develop merge conflicts
2021-02-08 19:18:00 +00:00
rmagueta
03b52cec84
Merge remote-tracking branch 'origin/develop' into develop-SA-RA
...
# Conflicts:
# openair2/LAYER2/NR_MAC_UE/nr_ra_procedures.c
# openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c
# openair2/LAYER2/NR_MAC_UE/rar_tools_nrUE.c
# openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c
# openair2/RRC/NR_UE/rrc_UE.c
2021-02-08 15:17:12 +00:00
Sakthivel Velumani
8902902706
Merge branch 'develop' into ue-fixes
2021-02-08 15:06:17 +01:00
Sakthivel Velumani
3380f1a455
send data from MAC to PHY when NDI toggles
2021-02-08 12:49:32 +01:00
Robert Schmidt
b86fdaf59b
Revert "Lower UE log level"
...
This reverts commit 71e297de9d
2021-02-08 11:20:23 +01:00
Robert Schmidt
9b77575af2
Use the MAX_BWP_SIZE macro everywhere
2021-02-07 10:45:57 +01:00
Robert Schmidt
318c4e0fd7
Skip DL HARQ feedbacks if the timing does not match
...
As the precedent commit, this commit deals with the realtime problems
that we currently have on the CI bench.
For DL HARQ feedback, nFAPI does not give us the HARQ process ID.
Instead, we have to figure this out "from timing", i.e., if we trigger
PUCCH reception, we will get a message with HARQ if we instructed the
PHY to do so. If we have real-time problems, it seems (I cannot verify:
don't have real time problems) that we do not get the nFAPI message with
HARQ feedback. Thus, we need to skip the HARQ processes that should have
been processed in the past, which happens in this commit.
2021-02-07 10:45:57 +01:00
Robert Schmidt
f23890e0b9
Search correct UL HARQ, don't assert on late slot
...
At the time of this commit, the CI has realtime issues. This can mean
that the HARQ result is delivered in a delayed fashion. Before this
commit, we were asserting on whether the slot corresponds to the HARQ
process's expected feedback slot, but a particular feedback might be
delayed under realtime issues, and we actually don't care about the
timing since we get the HARQ process ID.
Instead, we loop through the HARQ processes for which we wait for a
feedback in the beginning until we have the right process (which did not
seem to cause a problem till now, but who knows.
2021-02-07 10:45:57 +01:00
Robert Schmidt
423a0e4afe
Handle UL HARQ slot wrap around for slot = 0
2021-02-07 10:45:57 +01:00
Robert Schmidt
30d13ebf6d
Lower various log levels
2021-02-07 10:45:57 +01:00
ChiehChun
a8cc08ace5
Cannot allocate CCE error -> debug message
2021-02-07 10:45:57 +01:00
ChiehChun
8a823d22cf
Better format dump_mac_stats()
2021-02-07 10:45:57 +01:00
ChiehChun
c51cb3f40b
Enable 2 UL slots
2021-02-07 10:45:57 +01:00
Robert Schmidt
dcd591bd2b
Schedule BSR0 UE only one at a time, in round-robin
2021-02-07 10:45:57 +01:00
Robert Schmidt
3b972f6766
ULSCH fix: Only allocate CCEs when necessary
2021-02-07 10:45:57 +01:00
Robert Schmidt
77de70c82f
Calculate TBS for coefficient only when needed
2021-02-07 10:45:57 +01:00
ChiehChun
8bf2d1a12f
Remove assert of allocate CSI PUCCH
2021-02-07 10:45:57 +01:00
ChiehChun
fde6c46ef1
Remove assertion for single UE
2021-02-07 10:45:57 +01:00
Robert Schmidt
6294ce715e
Reorder pf_ul to process retransmission
2021-02-07 10:45:57 +01:00
ChiehChun
14614d74cf
Find max coeff & Decrease n_rb_sched
2021-02-07 10:45:57 +01:00
ChiehChun
56831038d0
Check BSR & Create UE_sched for UL new transmission
2021-02-07 10:39:40 +01:00
Robert Schmidt
c8168085dd
Calculate UL coefficient
2021-02-07 10:39:40 +01:00
ChiehChun
1b1411727c
Calculate UL throughput & Initial ulsch_current_bytes
2021-02-07 10:39:40 +01:00
ChiehChun
cf725a1801
Create find_CCE in primitive
2021-02-07 10:39:40 +01:00
ChiehChun
bec348405b
Find the largest contiguos region
2021-02-07 10:39:40 +01:00
ChiehChun
8f988e384d
Add pf_ul & pseudo code
2021-02-07 10:39:40 +01:00
ChiehChun
5573b8e18c
Change vrb_map_UL to rballoc_mask
2021-02-07 10:39:40 +01:00
ChiehChun
2becbb9210
Verify the same K2
2021-02-07 10:39:40 +01:00
ChiehChun
7da43c95d2
Change pre_precessor_ul type to bool
...
- To check the current slot is the scheduled slot(UL slot - K2) and
only execute the post processor in scheduled slot.
2021-02-07 10:39:40 +01:00
ChiehChun
0234015f8e
Check slot is DL slot to pre-schedule UL data
2021-02-07 10:39:40 +01:00
ChiehChun
2283e12560
Calculate rbSize from estimated buffer
2021-02-07 10:39:40 +01:00
ChiehChun
c7ffd5740f
Add sched_ul_bytes/ulsch_current_bytes & Update in rx_sdu/schedule_ulsch
2021-02-07 10:39:40 +01:00
ChiehChun
4d0a2e4877
Save selected UL HARQ PID in post-processor
2021-02-07 10:39:40 +01:00
Robert Schmidt
4b1be522a5
Add estimated_ul_buffer & Update in DTCH
2021-02-07 10:39:40 +01:00
rmagueta