Doing this before using set_master_clock_rate() on the B200 seems to
invalidate clock settings:
[HW] USRP clock set to 1759836386.000000 sec
[...]
[HW] current pps at 3.286750, starting streaming at 4.286750
In other words, the current time setting was reset. With this change
now, we see
[HW] USRP clock set to 1759929873.000000 sec
[...]
[HW] current pps at 1759929873.000000, starting streaming at 1759929874.000000
This is because changing clock sources (I assume setting the master
clock rate impacts the clock) can result in changing the time. From the
documentation of set_time_next_pps() [1]:
> Note: When changing clock sources, a previously set time will most
> likely be lost. It is recommended to set the time after changing the
> clock source. Otherwise, an unexpected time may line up with future PPS
> edges.
[1] https://files.ettus.com/manual/classuhd_1_1usrp_1_1multi__usrp.html#a75b1c5375549e6a446d686ee7d9b4e14
Corrected a logic bug in usrp_lib.cpp where the code mistakenly checked
openair0_cfg[0].clock_source instead of time_source when a time_source
was already specified in usrp_args.
Also improved the warning log to clarify that the config value is being
ignored in favor of the explicit user-provided usrp_args.
Co-authored-by: Alexandre Serio <alexandre.j.serio@altice.pt>
- removed some whitespace noise.
- cleaned up CMakeLists.txt
- reintegrated task_manager.c into thread-pool.c
- cleaned up some unnecessary code
Co-authored-by: Cedric Roux <cedric.roux@eurecom.fr>
Co-authored-by: Mikel Irazabal <mikel.irazabal@openairinterface.com>
- if search fails, keeps increasing the rx gain (set by --ue-rxgain) by
3 db until USRP max rx gain
- if initial sync is success, sets the rxgain to the value of
(TARGET_RX_POWER (50) - pbch digital power in dB/RE)
Testing on Neoverse N1 (Ampere 3GHz). Tested only on a subset of phy-simulators.
- Changes:
- use SIMDE consistently
- adaptations of LDPC decoder generator for ARMv8 performance
- SIMDe modifications of Intel CRC to allow for aarch64 build.
optimizations for 128-bit to improve performance of LDPC encode/decode
on aarch64 (Neoverse 1)
- added BG2 files for 128-bit ldpc encoder (aarch64)
- testing on Xeon
- testing on x86
- minor changes to build/run on x86
- change in crc.h after returning to aarch64
- removed some warning in ldpc decoder generator for x86_64
- char
- Delete irrelevant constants
- Correctly declare variables
- Define stdbool for all architectures
- Remove definition of _MM_SHUFFLE and use SIMDE_MM_SHUFFLE
- Remove commented code
- Fix CMakeLists.txt
- Include SIMDE avx2 functions in tools_defs.h
For FR2 and including analog beamforming, we control the beams via GPIO
on radio units.
In this commit, introduce a configuration option to switch the GPIO
control for different devices: "generic" is the current GPIO control,
"interdigital" configures the GPIO configuration to be used with an
InterDigital device.
- move following radios: AW2S, BladeRF, IRIS, LMSSDR, RFsimulator, USRP
- move following transports: Ethernet, benetel4g, benetel5g
- for each: create independent cmake variable to switch compilation
on/off, in order: OAI_AW2S, OAI_BLADERF, OAI_IRIS, OAI_LMSSDR,
OAI_SIMU, OAI_USRP, OAI_ETHERNET, OAI_BENETEL4G, OAI_BENETEL5G
- Remove RF_BOARD variable, allows to compile multiple boards at once
- where applicable: remove USERSPACE/LIB in path, i.e., move files up to
directories, as all are userspace libraries
Note that with the above, it is now mandatory to enable a radio
implementation before compiling it, e.g., for USRP:
./build_oai -w USRP
cmake .. -DOAI_USRP=ON && ninja oai_usrpdevif
Nick Hedberg